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1.1 root 1: /* Definitions of target machine for GNU compiler. 64 bit ABI support.
2: Copyright (C) 1994, 1995 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
6: GNU CC is free software; you can redistribute it and/or modify
7: it under the terms of the GNU General Public License as published by
8: the Free Software Foundation; either version 2, or (at your option)
9: any later version.
10:
11: GNU CC is distributed in the hope that it will be useful,
12: but WITHOUT ANY WARRANTY; without even the implied warranty of
13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14: GNU General Public License for more details.
15:
16: You should have received a copy of the GNU General Public License
17: along with GNU CC; see the file COPYING. If not, write to
18: the Free Software Foundation, 59 Temple Place - Suite 330,
19: Boston, MA 02111-1307, USA. */
20:
21: /* Macros to implement the 64 bit ABI. This file is meant to be included
22: after mips.h. */
23:
24: #undef ABI_64BIT
25: #define ABI_64BIT 1
26:
27: /* For Irix 6, -mips3 implies TARGET_LONG64. */
28: #undef TARGET_LONG64
29: #define TARGET_LONG64 (target_flags & MASK_64BIT)
30:
31: #undef CPP_PREDEFINES
32: #define CPP_PREDEFINES \
33: "-Dunix -Dmips -Dsgi -Dhost_mips -DMIPSEB -D_MIPSEB -DSYSTYPE_SVR4 \
34: -D_SVR4_SOURCE -D_MODERN_C -D__DSO__ \
35: -Asystem(unix) -Asystem(svr4) -Acpu(mips) -Amachine(sgi)"
36:
37: /* We must make -mips3 do what -mlong64 used to do. */
38: #undef CPP_SPEC
39: #define CPP_SPEC "\
40: %{!ansi:-D__EXTENSIONS__ -D_SGI_SOURCE -D_LONGLONG} \
41: %{.cc: -D_LANGUAGE_C_PLUS_PLUS} \
42: %{.cxx: -D_LANGUAGE_C_PLUS_PLUS} \
43: %{.C: -D_LANGUAGE_C_PLUS_PLUS} \
44: %{.m: -D_LANGUAGE_OBJECTIVE_C -D_LANGUAGE_C} \
45: %{.S: -D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
46: %{.s: -D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
47: %{!.S:%{!.s: %{!.cc: %{!.cxx: %{!.C: %{!.m: -D_LANGUAGE_C %{!ansi:-DLANGUAGE_C}}}}}}}\
48: %{mfp32: -D_MIPS_FPSET=16}%{!mfp32: -D_MIPS_FPSET=32} \
49: %{mips1: -D_MIPS_ISA=_MIPS_ISA_MIPS1} \
50: %{mips2: -D_MIPS_ISA=_MIPS_ISA_MIPS2} \
51: %{mips3: -D_MIPS_ISA=_MIPS_ISA_MIPS3} \
52: %{mips4: -D_MIPS_ISA=_MIPS_ISA_MIPS4} \
53: %{!mips1: %{!mips2: %{!mips3: %{!mips4: -D_MIPS_ISA=_MIPS_ISA_MIPS4}}}} \
54: %{mips1: -D_MIPS_SIM=_MIPS_SIM_ABI32} \
55: %{mips2: -D_MIPS_SIM=_MIPS_SIM_ABI32} \
56: %{mips3: -D_ABI64=3 -D_MIPS_SIM=_ABI64} \
57: %{mips4: -D_ABI64=3 -D_MIPS_SIM=_ABI64} \
58: %{!mips1: %{!mips2: %{!mips3: %{!mips4: -D_ABI64=3 -D_MIPS_SIM=_ABI64}}}} \
59: %{!mint64: -D_MIPS_SZINT=32}%{mint64: -D_MIPS_SZINT=64} \
60: %{mips1: -D_MIPS_SZLONG=32}%{mips2: -D_MIPS_SZLONG=32} \
61: %{!mips1:%{!mips2: -D_MIPS_SZLONG=64}} \
62: %{mips1: -D_MIPS_SZPTR=32}%{mips2: -D_MIPS_SZPTR=32} \
63: %{mips3: -D_MIPS_SZPTR=64}%{mips4: -D_MIPS_SZPTR=64} \
64: %{!mips1: %{!mips2: %{!mips3: %{!mips4: -D_MIPS_SZPTR=64}}}} \
65: %{!mips1:%{!mips2: -D_COMPILER_VERSION=601}} \
66: %{mips1: -D__SIZE_TYPE__=unsigned\\ int -D__PTRDIFF_TYPE__=int} \
67: %{mips2: -D__SIZE_TYPE__=unsigned\\ int -D__PTRDIFF_TYPE__=int} \
68: %{!mips1:%{!mips2: -D__SIZE_TYPE__=long\\ unsigned\\ int -D__PTRDIFF_TYPE__=long\\ int}} \
69: %{mips3:-U__mips -D__mips=3 -D__mips64} \
70: %{!mips1:%{!mips2:-U__mips -D__mips=4 -D__mips64}} \
71: %{mgp32:-U__mips64} %{mgp64:-D__mips64} \
72: %{EB:-UMIPSEL -U_MIPSEL -U__MIPSEL -U__MIPSEL__ -D_MIPSEB -D__MIPSEB -D__MIPSEB__ %{!ansi:-DMIPSEB}} \
73: %{EL:-UMIPSEB -U_MIPSEB -U__MIPSEB -U__MIPSEB__ -D_MIPSEL -D__MIPSEL -D__MIPSEL__ %{!ansi:-DMIPSEL}}"
74:
75: #undef EMPTY_FIELD_BOUNDARY
76: #define EMPTY_FIELD_BOUNDARY 32
77:
78: #undef STACK_BOUNDARY
79: #define STACK_BOUNDARY 128
80:
81: #undef MIPS_STACK_ALIGN
82: #define MIPS_STACK_ALIGN(LOC) (((LOC)+15) & ~15)
83:
84: #undef GP_ARG_LAST
85: #define GP_ARG_LAST (mips_isa < 3 ? GP_REG_FIRST + 7 : GP_REG_FIRST + 11)
86: #undef FP_ARG_LAST
87: #define FP_ARG_LAST (mips_isa < 3 ? FP_REG_FIRST + 15 : FP_REG_FIRST + 19)
88:
89: /* fp20-23 are now caller saved. */
90: #undef SUBTARGET_CONDITIONAL_REGISTER_USAGE
91: #define SUBTARGET_CONDITIONAL_REGISTER_USAGE \
92: { \
93: if (mips_isa >= 3) \
94: { \
95: int regno; \
96: for (regno = FP_REG_FIRST + 20; regno < FP_REG_FIRST + 24; regno++) \
97: call_used_regs[regno] = 1; \
98: } \
99: }
100:
101: #undef MAX_ARGS_IN_REGISTERS
102: #define MAX_ARGS_IN_REGISTERS (mips_isa < 3 ? 4 : 8)
103:
104: #undef REG_PARM_STACK_SPACE
105: #define REG_PARM_STACK_SPARC(FNDECL) \
106: (mips_abi < 3 \
107: ? (MAX_ARGS_IN_REGISTERS*UNITS_PER_WORD) - FIRST_PARM_OFFSET (FNDECL) \
108: : 0)
109:
110: #define FUNCTION_ARG_PADDING(MODE, TYPE) \
111: (! BYTES_BIG_ENDIAN \
112: ? upward \
113: : (((MODE) == BLKmode \
114: ? ((TYPE) && TREE_CODE (TYPE_SIZE (TYPE)) == INTEGER_CST \
115: && int_size_in_bytes (TYPE) < (PARM_BOUNDARY / BITS_PER_UNIT))\
116: : (GET_MODE_BITSIZE (MODE) < PARM_BOUNDARY \
117: && (mips_isa < 3 || GET_MODE_CLASS (MODE) == MODE_INT))) \
118: ? downward : upward))
119:
120: extern struct rtx_def *type_dependent_reg ();
121: #define TYPE_DEPENDENT_REG(REGNO, INDEX, TYPE) \
122: type_dependent_reg (REGNO, INDEX, TYPE)
123:
124: #undef RETURN_IN_MEMORY
125: #define RETURN_IN_MEMORY(TYPE) \
126: (mips_isa < 3 ? TYPE_MODE (TYPE) == BLKmode : int_size_in_bytes (TYPE) > 16)
127:
128: extern struct rtx_def *mips_function_value ();
129: #undef FUNCTION_VALUE
130: #define FUNCTION_VALUE(VALTYPE, FUNC) mips_function_value (VALTYPE, FUNC)
131:
132: /* For varargs, we must save the current argument, because it is the fake
133: argument va_alist, and will need to be converted to the real argument.
134: For stdarg, we do not need to save the current argument, because it
135: is a real argument. */
136: #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
137: { if (mips_isa >= 3 \
138: && ((CUM).arg_words \
139: < (MAX_ARGS_IN_REGISTERS - ! current_function_varargs))) \
140: { \
141: PRETEND_SIZE \
142: = (MAX_ARGS_IN_REGISTERS - (CUM).arg_words \
143: - ! current_function_varargs) * UNITS_PER_WORD; \
144: \
145: if (! (NO_RTL)) \
146: { \
147: rtx mem = gen_rtx (MEM, BLKmode, virtual_incoming_args_rtx); \
148: /* va_arg is an array access in this case, which causes it to \
149: get MEM_IN_STRUCT_P set. We must set it here so that the \
150: insn scheduler won't assume that these stores can't \
151: possibly overlap with the va_arg loads. */ \
152: if (BYTES_BIG_ENDIAN) \
153: MEM_IN_STRUCT_P (mem) = 1; \
154: move_block_from_reg \
155: ((CUM).arg_words + GP_ARG_FIRST + ! current_function_varargs, \
156: mem, \
157: (MAX_ARGS_IN_REGISTERS - (CUM).arg_words \
158: - ! current_function_varargs), \
159: PRETEND_SIZE); \
160: } \
161: } \
162: }
163:
164: #define STRICT_ARGUMENT_NAMING
165:
166: /* ??? Unimplemented stuff follows. */
167:
168: /* ??? Add support for 16 byte/128 bit long doubles here when
169: mips_isa >= 3. */
170:
171: /* ??? Make main return zero if user did not specify return value. */
172:
173: /* ??? Add support for .interfaces section, so as to get linker warnings
174: when stdarg functions called without prototype in scope? */
175:
176: /* ??? Could optimize structure passing by putting the right register rtx
177: into the field decl, so that if we use the field, we can take the value from
178: a register instead of from memory. */
179:
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