--- gcc/config/mips/iris3.h	2018/04/24 18:10:25	1.1.1.1
+++ gcc/config/mips/iris3.h	2018/04/24 18:29:28	1.1.1.4
@@ -1,5 +1,5 @@
 /* Definitions of target machine for GNU compiler.  Iris version.
-   Copyright (C) 1991 Free Software Foundation, Inc.
+   Copyright (C) 1991, 1993, 1995 Free Software Foundation, Inc.
 
 This file is part of GNU CC.
 
@@ -15,50 +15,40 @@ GNU General Public License for more deta
 
 You should have received a copy of the GNU General Public License
 along with GNU CC; see the file COPYING.  If not, write to
-the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA.  */
 
 #define SGI_TARGET 1		/* inform other mips files this is SGI */
 
 /* Names to predefine in the preprocessor for this target machine.  */
 
-#define CPP_PREDEFINES	"-Dunix -Dmips -Dsgi -DSVR3 -Dhost_mips -DMIPSEB -DSYSTYPE_SYSV"
+#define CPP_PREDEFINES	"\
+-Dunix -Dmips -Dsgi -DSVR3 -Dhost_mips -DMIPSEB -DSYSTYPE_SYSV \
+-Asystem(unix) -Asystem(svr3) -Acpu(mips) -Amachine(mips)"
 
 #define STARTFILE_SPEC	"%{pg:gcrt1.o%s}%{!pg:%{p:mcrt1.o%s}%{!p:crt1.o%s}}"
 
 #define CPP_SPEC "\
 %{!ansi:-D__EXTENSIONS__} -D_MIPSEB -D_SYSTYPE_SYSV \
 %{.S:	-D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
+%{.s:	-D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
 %{.cc:	-D_LANGUAGE_C_PLUS_PLUS} \
 %{.cxx:	-D_LANGUAGE_C_PLUS_PLUS} \
 %{.C:	-D_LANGUAGE_C_PLUS_PLUS} \
 %{.m:	-D_LANGUAGE_OBJECTIVE_C} \
-%{!.S: %{!.cc: %{!.cxx: %{!.C: %{!.m: -D_LANGUAGE_C %{!ansi:-DLANGUAGE_C}}}}}}"
+%{!.S: %{!.s: %{!.cc: %{!.cxx: %{!.C: %{!.m: -D_LANGUAGE_C %{!ansi:-DLANGUAGE_C}}}}}}} \
+%{mlong64:-D__SIZE_TYPE__=long\\ unsigned\\ int -D__PTRDIFF_TYPE__=long\\ int} \
+%{!mlong64:-D__SIZE_TYPE__=unsigned\\ int -D__PTRDIFF_TYPE__=int} \
+%{mips3:-U__mips -D__mips=3 -D__mips64} \
+%{mgp32:-U__mips64} %{mgp64:-D__mips64} \
+%{EB:-UMIPSEL -U_MIPSEL -U__MIPSEL -U__MIPSEL__ -D_MIPSEB -D__MIPSEB -D__MIPSEB__ %{!ansi:-DMIPSEB}} \
+%{EL:-UMIPSEB -U_MIPSEB -U__MIPSEB -U__MIPSEB__ -D_MIPSEL -D__MIPSEL -D__MIPSEL__ %{!ansi:-DMIPSEL}}"
 
-#define LIB_SPEC	"%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p} crtn.o%s"
+#define LIB_SPEC	\
+	"%{!p:%{!pg:%{!static:%{!g*:-lc_s}} -lc}}%{p:-lc_p}%{pg:-lc_p} crtn.o%s"
 
 #define MACHINE_TYPE	"Silicon Graphics Mips"
 
-/* SGI Iris doesn't support -EB/-EL like other MIPS processors.  */
-
-#define ASM_SPEC "\
-%{!mgas: \
-	%{!mrnames: %{!.s:-nocpp} %{.s: %{cpp} %{nocpp}}} \
-	%{pipe: %e-pipe is not supported.} \
-	%{mips1} %{mips2} %{mips3} \
-	%{noasmopt:-O0} \
-	%{!noasmopt:%{O:-O2} %{O1:-O2} %{O2:-O2} %{O3:-O3}} \
-	%{g} %{g0} %{g1} %{g2} %{g3} %{v} %{K} \
-	%{ggdb:-g} %{ggdb0:-g0} %{ggdb1:-g1} %{ggdb2:-g2} %{ggdb3:-g3} \
-	%{gstabs:-g} %{gstabs0:-g0} %{gstabs1:-g1} %{gstabs2:-g2} %{gstabs3:-g3} \
-	%{gstabs+:-g} %{gstabs+0:-g0} %{gstabs+1:-g1} %{gstabs+2:-g2} %{gstabs+3:-g3} \
-	%{gcoff:-g} %{gstabs0:-g0} %{gcoff1:-g1} %{gcoff2:-g2} %{gcoff3:-g3}} \
-%{G*}"
-
-#define LINK_SPEC "\
-%{G*} \
-%{!mgas: %{mips1} %{mips2} %{mips3} \
-	 %{bestGnum} %{shared} %{non_shared}}"
-
 /* Always use 1 for .file number.  I [meissner@osf.org] wonder why
    IRIS needs this.  */
 
@@ -89,9 +79,7 @@ the Free Software Foundation, 675 Mass A
 
 #define NO_DOLLAR_IN_LABEL 1
 
-/* Specify size_t, ptrdiff_t, and wchar_t types.  */
-#define SIZE_TYPE	"unsigned int"
-#define PTRDIFF_TYPE	"int"
+/* Specify wchar_t type.  */
 #define WCHAR_TYPE	"unsigned char"
 #define WCHAR_TYPE_SIZE BITS_PER_UNIT
 
@@ -101,35 +89,4 @@ the Free Software Foundation, 675 Mass A
 /* Plain char is unsigned in the SGI compiler.  */
 #define DEFAULT_SIGNED_CHAR 0
 
-
-/* A C statement to initialize the variable parts of a trampoline. 
-   ADDR is an RTX for the address of the trampoline; FNADDR is an
-   RTX for the address of the nested function; STATIC_CHAIN is an
-   RTX for the static chain value that should be passed to the
-   function when it is called.
-
-   Silicon Graphics machines are supposed to not have a mprotect
-   function to enable execute protection, but the stack already
-   has execute protection turned on.  Because the MIPS chips have
-   no method to flush the icache without a system call, this can lose
-   if the same address is used for multiple trampolines.  */
-
-#define INITIALIZE_TRAMPOLINE(ADDR, FUNC, CHAIN)			    \
-{									    \
-  rtx addr = ADDR;							    \
-  emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 28)), FUNC);   \
-  emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 32)), CHAIN);  \
-}
-
-
-/* Attempt to turn on access permissions for the stack.  */
-
-#define TRANSFER_FROM_TRAMPOLINE					\
-									\
-void									\
-__enable_execute_stack (addr)						\
-     char *addr;							\
-{									\
-}
-
 #include "mips/mips.h"