--- gcc/config/mips/mips.h 2018/04/24 18:10:25 1.1.1.1 +++ gcc/config/mips/mips.h 2018/04/24 18:15:38 1.1.1.2 @@ -1,7 +1,7 @@ /* Definitions of target machine for GNU compiler. MIPS version. + Copyright (C) 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc. Contributed by A. Lichnewsky, lich@inria.inria.fr Changed by Michael Meissner, meissner@osf.org - Copyright (C) 1989, 1990, 1991, 1992 Free Software Foundation, Inc. This file is part of GNU CC. @@ -73,6 +73,16 @@ enum processor_type { /* Recast the cpu class to be the cpu attribute. */ #define mips_cpu_attr ((enum attr_cpu)mips_cpu) +/* Whether to emit abicalls code sequences or not. */ + +enum mips_abicalls_type { + MIPS_ABICALLS_NO, + MIPS_ABICALLS_YES +}; + +/* Recast the abicalls class to be the abicalls attribute. */ +#define mips_abicalls_attr ((enum attr_abicalls)mips_abicalls) + /* Which type of block move to do (whether or not the last store is split out so it can fill a branch delay slot). */ @@ -105,6 +115,7 @@ extern char mips_rtx_classify[]; /* clas extern struct rtx_def *branch_cmp[2]; /* operands for compare */ extern enum cmp_type branch_type; /* what type of branch to use */ extern enum processor_type mips_cpu; /* which cpu are we scheduling for */ +extern enum mips_abicalls_type mips_abicalls;/* for svr4 abi pic calls */ extern int mips_isa; /* architectural level */ extern char *mips_cpu_string; /* for -mcpu= */ extern char *mips_isa_string; /* for -mips{1,2,3} */ @@ -206,7 +217,6 @@ extern char *permalloc (); extern int reg_mentioned_p (); /* Functions in the standard library that we reference. */ -extern void abort (); extern int atoi (); extern char *getenv (); extern char *mktemp (); @@ -484,7 +494,7 @@ while (0) { \ flag_omit_frame_pointer = TRUE; \ flag_schedule_insns_after_reload = TRUE; \ - target_flags &= MASK_GPOPT; \ + target_flags |= MASK_GPOPT; \ } \ } @@ -536,7 +546,8 @@ while (0) #ifndef CPP_PREDEFINES #define CPP_PREDEFINES "-Dmips -Dunix -Dhost_mips -DMIPSEB -DR3000 -DSYSTYPE_BSD43 \ --D_mips -D_unix -D_host_mips -D_MIPSEB -D_R3000 -D_SYSTYPE_BSD43" +-D_mips -D_unix -D_host_mips -D_MIPSEB -D_R3000 -D_SYSTYPE_BSD43 \ +-Asystem(unix) -Asystem(bsd) -Acpu(mips) -Amachine(mips)" #endif /* Extra switches sometimes passed to the assembler. */ @@ -633,7 +644,8 @@ while (0) %{.C: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \ %{.m: -D__LANGUAGE_OBJECTIVE_C -D_LANGUAGE_OBJECTIVE_C} \ %{.S: -D__LANGUAGE_ASSEMBLY -D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \ -%{!.S: -D__LANGUAGE_C -D_LANGUAGE_C %{!ansi:-DLANGUAGE_C}}" +%{.s: -D__LANGUAGE_ASSEMBLY -D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \ +%{!.S:%{!.s: -D__LANGUAGE_C -D_LANGUAGE_C %{!ansi:-DLANGUAGE_C}}}" #endif /* If defined, this macro is an additional prefix to try after @@ -1049,12 +1061,15 @@ do { \ #define PROMOTE_PROTOTYPES -/* Define this macro if an instruction to load a value narrower - than a word from memory into a register also zero-extends the - value to the whole register. */ - -#define BYTE_LOADS_ZERO_EXTEND - +/* Define if operations between registers always perform the operation + on the full register even if a narrower mode is specified. */ +#define WORD_REGISTER_OPERATIONS + +/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD + will either zero-extend or sign-extend. The value of this macro should + be the code that says which one of the two operations is implicitly + done, NIL if none. */ +#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND /* Standard register usage. */ @@ -1243,6 +1258,8 @@ extern char mips_hard_regno_mode_ok[][FI files to allocate such a register (if necessary). */ #define PIC_OFFSET_TABLE_REGNUM (GP_REG_FIRST + 28) +#define PIC_FUNCTION_ADDR_REGNUM (GP_REG_FIRST + 25) + /* Define the classes of registers for register constraints in the machine description. Also define ranges of constants. @@ -1468,15 +1485,15 @@ extern enum reg_class mips_char_to_class /* Return the maximum number of consecutive registers needed to represent mode MODE in a register of class CLASS. */ -#define CLASS_UNITS(mode, num) \ - ((GET_MODE_SIZE (mode) + ((num) * UNITS_PER_WORD) - 1) / ((num) * UNITS_PER_WORD)) +#define CLASS_UNITS(mode, size) \ + ((GET_MODE_SIZE (mode) + (size) - 1) / (size)) #define CLASS_MAX_NREGS(CLASS, MODE) \ - (((CLASS) == FP_REGS && TARGET_FLOAT64) \ - ? CLASS_UNITS (MODE, 2) \ - : (((CLASS) == FP_REGS) \ - ? (2*CLASS_UNITS (MODE, 1)) \ - : CLASS_UNITS (MODE, 1))) + ((CLASS) == FP_REGS \ + ? (TARGET_FLOAT64 \ + ? CLASS_UNITS (MODE, 8) \ + : 2 * CLASS_UNITS (MODE, 8)) \ + : CLASS_UNITS (MODE, UNITS_PER_WORD)) /* If defined, this is a C expression whose value should be nonzero if the insn INSN has the effect of mysteriously @@ -1508,7 +1525,9 @@ extern enum reg_class mips_char_to_class If FRAME_GROWS_DOWNWARD, this is the offset to the END of the first local allocated. Otherwise, it is the offset to the BEGINNING of the first local allocated. */ -#define STARTING_FRAME_OFFSET current_function_outgoing_args_size +#define STARTING_FRAME_OFFSET \ + (current_function_outgoing_args_size \ + + (TARGET_ABICALLS ? MIPS_STACK_ALIGN (UNITS_PER_WORD) : 0)) /* Offset from the stack pointer register to an item dynamically allocated on the stack, e.g., by `alloca'. @@ -1810,7 +1829,10 @@ typedef struct mips_args { int arg_words; /* # total words the arguments take */ int num_adjusts; /* number of adjustments made */ /* Adjustments made to args pass in regs. */ - struct rtx_def *adjust[MAX_ARGS_IN_REGISTERS]; + /* ??? The size is doubled to work around a + bug in the code that sets the adjustments + in function_arg. */ + struct rtx_def *adjust[MAX_ARGS_IN_REGISTERS*2]; } CUMULATIVE_ARGS; /* Initialize a variable CUM of type CUMULATIVE_ARGS @@ -1978,45 +2000,28 @@ typedef struct mips_args { RTX for the static chain value that should be passed to the function when it is called. */ -#ifndef INITIALIZE_TRAMPOLINE #define INITIALIZE_TRAMPOLINE(ADDR, FUNC, CHAIN) \ { \ rtx addr = ADDR; \ emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 28)), FUNC); \ emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 32)), CHAIN); \ \ - /* Attempt to make stack executable */ \ - emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "__enable_execute_stack"), \ + /* Flush the instruction cache. */ \ + emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "__gcc_flush_cache"), \ 0, VOIDmode, 1, addr, Pmode); \ } -#endif /* INITIALIZE_TRAMPOLINE */ +/* Flush the instruction cache. */ -/* Attempt to turn on access permissions for the stack. */ - -#ifndef TRANSFER_FROM_TRAMPOLINE #define TRANSFER_FROM_TRAMPOLINE \ \ void \ -__enable_execute_stack (addr) \ +__gcc_flush_cache (addr) \ char *addr; \ { \ - int size = getpagesize (); \ - int mask = ~(size-1); \ - char *page = (char *) (((int) addr) & mask); \ - char *end = (char *) ((((int) (addr + TRAMPOLINE_SIZE)) & mask) + size); \ - \ - /* 7 is PROT_READ | PROT_WRITE | PROT_EXEC */ \ - if (mprotect (page, end - page, 7) < 0) \ - perror ("mprotect of trampoline code"); \ - \ -/* \ if (cacheflush (addr, TRAMPOLINE_SIZE, 1) < 0) \ perror ("cacheflush of trampoline code"); \ - */ \ } -#endif /* TRANSFER_FROM_TRAMPOLINE */ - /* Addressing modes, and classification of registers for them. */ @@ -2402,13 +2407,9 @@ while (0) /* Define this if zero-extension is slow (more than one real instruction). */ #define SLOW_ZERO_EXTEND -/* Define if shifts truncate the shift count - which implies one can omit a sign-extension or zero-extension - of a shift count. - - Only 5 bits are used in SLLV and SRLV */ - -#define SHIFT_COUNT_TRUNCATED +/* Define this to be nonzero if shift instructions ignore all but the low-order + few bits. */ +#define SHIFT_COUNT_TRUNCATED 1 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits is done just by pretending it is already truncated. */ @@ -2726,6 +2727,8 @@ while (0) {"cmp2_op", { EQ, NE, GT, GE, GTU, GEU, LT, LE, \ LTU, LEU }}, \ {"fcmp_op", { EQ, NE, GT, GE, LT, LE }}, \ + {"pc_or_label_operand", { PC, LABEL_REF }}, \ + {"call_insn_operand", { MEM }}, \ {"uns_cmp_op", { GTU, GEU, LTU, LEU }}, @@ -3447,8 +3450,9 @@ rdata_section () \ #define SELECT_SECTION(DECL, RELOC) \ { \ - if (int_size_in_bytes (TREE_TYPE (DECL)) <= mips_section_threshold \ - && mips_section_threshold > 0) \ + int size = int_size_in_bytes (TREE_TYPE (DECL)); \ + \ + if (size > 0 && size <= mips_section_threshold) \ sdata_section (); \ \ else if (RELOC) \