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1.1 root 1: /* Definitions of target machine for GNU compiler. MIPS version.
2: Contributed by A. Lichnewsky, [email protected]
3: Changed by Michael Meissner, [email protected]
4: Copyright (C) 1989, 1990, 1991, 1992 Free Software Foundation, Inc.
5:
6: This file is part of GNU CC.
7:
8: GNU CC is free software; you can redistribute it and/or modify
9: it under the terms of the GNU General Public License as published by
10: the Free Software Foundation; either version 2, or (at your option)
11: any later version.
12:
13: GNU CC is distributed in the hope that it will be useful,
14: but WITHOUT ANY WARRANTY; without even the implied warranty of
15: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16: GNU General Public License for more details.
17:
18: You should have received a copy of the GNU General Public License
19: along with GNU CC; see the file COPYING. If not, write to
20: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21:
22:
23: /* Make Saber happier on obstack.[ch]. */
24: #if defined(__mips__) || defined(mips)
25: #define __PTR_TO_INT(P) ((int)(P))
26: #define __INT_TO_PTR(P) ((char *)(P))
27: #endif
28:
29: /* Standard GCC variables that we reference. */
30:
31: extern char *asm_file_name;
32: extern char call_used_regs[];
33: extern int current_function_calls_alloca;
34: extern int flag_omit_frame_pointer;
35: extern int frame_pointer_needed;
36: extern char *language_string;
37: extern int may_call_alloca;
38: extern int optimize;
39: extern char **save_argv;
40: extern int target_flags;
41: extern char *version_string;
42:
43: /* MIPS external variables defined in mips.c. */
44:
45: /* comparison type */
46: enum cmp_type {
47: CMP_SI, /* compare integers */
48: CMP_SF, /* compare single precision floats */
49: CMP_DF, /* compare double precision floats */
50: CMP_MAX /* max comparison type */
51: };
52:
53: /* types of delay slot */
54: enum delay_type {
55: DELAY_NONE, /* no delay slot */
56: DELAY_LOAD, /* load from memory delay */
57: DELAY_HILO, /* move from/to hi/lo registers */
58: DELAY_FCMP /* delay after doing c.<xx>.{d,s} */
59: };
60:
61: /* Which processor to schedule for. Since there is no difference between
62: a R2000 and R3000 in terms of the scheduler, we collapse them into
63: just an R3000. The elements of the enumeration must match exactly
64: the cpu attribute in the mips.md machine description. */
65:
66: enum processor_type {
67: PROCESSOR_DEFAULT,
68: PROCESSOR_R3000,
69: PROCESSOR_R6000,
70: PROCESSOR_R4000
71: };
72:
73: /* Recast the cpu class to be the cpu attribute. */
74: #define mips_cpu_attr ((enum attr_cpu)mips_cpu)
75:
76: /* Which type of block move to do (whether or not the last store is
77: split out so it can fill a branch delay slot). */
78:
79: enum block_move_type {
80: BLOCK_MOVE_NORMAL, /* generate complete block move */
81: BLOCK_MOVE_NOT_LAST, /* generate all but last store */
82: BLOCK_MOVE_LAST /* generate just the last store */
83: };
84:
85: extern char mips_reg_names[][8]; /* register names (a0 vs. $4). */
86: extern char mips_print_operand_punct[]; /* print_operand punctuation chars */
87: extern char *current_function_name; /* current function being compiled */
88: extern char *current_function_file; /* filename current function is in */
89: extern int num_source_filenames; /* current .file # */
90: extern int inside_function; /* != 0 if inside of a function */
91: extern int ignore_line_number; /* != 0 if we are to ignore next .loc */
92: extern int file_in_function_warning; /* warning given about .file in func */
93: extern int sdb_label_count; /* block start/end next label # */
94: extern int mips_section_threshold; /* # bytes of data/sdata cutoff */
95: extern int g_switch_value; /* value of the -G xx switch */
96: extern int g_switch_set; /* whether -G xx was passed. */
97: extern int sym_lineno; /* sgi next label # for each stmt */
98: extern int set_noreorder; /* # of nested .set noreorder's */
99: extern int set_nomacro; /* # of nested .set nomacro's */
100: extern int set_noat; /* # of nested .set noat's */
101: extern int set_volatile; /* # of nested .set volatile's */
102: extern int mips_branch_likely; /* emit 'l' after br (branch likely) */
103: extern int mips_dbx_regno[]; /* Map register # to debug register # */
104: extern char mips_rtx_classify[]; /* classify an RTX code */
105: extern struct rtx_def *branch_cmp[2]; /* operands for compare */
106: extern enum cmp_type branch_type; /* what type of branch to use */
107: extern enum processor_type mips_cpu; /* which cpu are we scheduling for */
108: extern int mips_isa; /* architectural level */
109: extern char *mips_cpu_string; /* for -mcpu=<xxx> */
110: extern char *mips_isa_string; /* for -mips{1,2,3} */
111: extern int dslots_load_total; /* total # load related delay slots */
112: extern int dslots_load_filled; /* # filled load delay slots */
113: extern int dslots_jump_total; /* total # jump related delay slots */
114: extern int dslots_jump_filled; /* # filled jump delay slots */
115: extern int dslots_number_nops; /* # of nops needed by previous insn */
116: extern int num_refs[3]; /* # 1/2/3 word references */
117: extern struct rtx_def *mips_load_reg; /* register to check for load delay */
118: extern struct rtx_def *mips_load_reg2; /* 2nd reg to check for load delay */
119: extern struct rtx_def *mips_load_reg3; /* 3rd reg to check for load delay */
120: extern struct rtx_def *mips_load_reg4; /* 4th reg to check for load delay */
121:
122: /* Functions within mips.c that we reference. */
123:
124: extern void abort_with_insn ();
125: extern int arith32_operand ();
126: extern int arith_operand ();
127: extern int cmp_op ();
128: extern int cmp2_op ();
129: extern long compute_frame_size ();
130: extern int epilogue_reg_mentioned_p ();
131: extern void expand_block_move ();
132: extern int equality_op ();
133: extern int fcmp_op ();
134: extern void final_prescan_insn ();
135: extern int fpsw_register_operand ();
136: extern struct rtx_def * function_arg ();
137: extern void function_arg_advance ();
138: extern int function_arg_partial_nregs ();
139: extern void function_epilogue ();
140: extern void function_prologue ();
141: extern void gen_conditional_branch ();
142: extern struct rtx_def * gen_int_relational ();
143: extern void init_cumulative_args ();
144: extern int large_int ();
145: extern int md_register_operand ();
146: extern int mips_address_cost ();
147: extern void mips_asm_file_end ();
148: extern void mips_asm_file_start ();
149: extern int mips_const_double_ok ();
150: extern void mips_count_memory_refs ();
151: extern int mips_debugger_offset ();
152: extern void mips_declare_object ();
153: extern int mips_epilogue_delay_slots ();
154: extern void mips_expand_epilogue ();
155: extern void mips_expand_prologue ();
156: extern char *mips_fill_delay_slot ();
157: extern char *mips_move_1word ();
158: extern char *mips_move_2words ();
159: extern void mips_output_double ();
160: extern int mips_output_external ();
161: extern void mips_output_float ();
162: extern void mips_output_filename ();
163: extern void mips_output_lineno ();
164: extern char *output_block_move ();
165: extern void override_options ();
166: extern int pc_or_label_operand ();
167: extern void print_operand_address ();
168: extern void print_operand ();
169: extern void print_options ();
170: extern int reg_or_0_operand ();
171: extern int simple_epilogue_p ();
172: extern int simple_memory_operand ();
173: extern int small_int ();
174: extern void trace();
175: extern int uns_arith_operand ();
176: extern int uns_cmp_op ();
177:
178: /* Recognition functions that return if a condition is true. */
179: extern int address_operand ();
180: extern int const_double_operand ();
181: extern int const_int_operand ();
182: extern int general_operand ();
183: extern int immediate_operand ();
184: extern int memory_address_p ();
185: extern int memory_operand ();
186: extern int nonimmediate_operand ();
187: extern int nonmemory_operand ();
188: extern int register_operand ();
189: extern int scratch_operand ();
190:
191: /* Functions to change what output section we are using. */
192: extern void data_section ();
193: extern void rdata_section ();
194: extern void readonly_data_section ();
195: extern void sdata_section ();
196: extern void text_section ();
197:
198: /* Functions in the rest of the compiler that we reference. */
199: extern void abort_with_insn ();
200: extern void debug_rtx ();
201: extern void fatal_io_error ();
202: extern int get_frame_size ();
203: extern int offsettable_address_p ();
204: extern void output_address ();
205: extern char *permalloc ();
206: extern int reg_mentioned_p ();
207:
208: /* Functions in the standard library that we reference. */
209: extern void abort ();
210: extern int atoi ();
211: extern char *getenv ();
212: extern char *mktemp ();
213:
214:
215: /* Stubs for half-pic support if not OSF/1 reference platform. */
216:
217: #ifndef HALF_PIC_P
218: #define HALF_PIC_P() 0
219: #define HALF_PIC_NUMBER_PTRS 0
220: #define HALF_PIC_NUMBER_REFS 0
221: #define HALF_PIC_ENCODE(DECL)
222: #define HALF_PIC_DECLARE(NAME)
223: #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
224: #define HALF_PIC_ADDRESS_P(X) 0
225: #define HALF_PIC_PTR(X) X
226: #define HALF_PIC_FINISH(STREAM)
227: #endif
228:
229:
230: /* Run-time compilation parameters selecting different hardware subsets. */
231:
232: /* Macros used in the machine description to test the flags. */
233:
234: /* Bits for real switches */
235: #define MASK_INT64 0x00000001 /* ints are 64 bits */
236: #define MASK_LONG64 0x00000002 /* longs are 64 bits */
237: #define MASK_LLONG128 0x00000004 /* long longs are 128 bits */
238: #define MASK_GPOPT 0x00000008 /* Optimize for global pointer */
239: #define MASK_GAS 0x00000010 /* Gas used instead of MIPS as */
240: #define MASK_NAME_REGS 0x00000020 /* Use MIPS s/w reg name convention */
241: #define MASK_STATS 0x00000040 /* print statistics to stderr */
242: #define MASK_MEMCPY 0x00000080 /* call memcpy instead of inline code*/
243: #define MASK_SOFT_FLOAT 0x00000100 /* software floating point */
244: #define MASK_FLOAT64 0x00000200 /* fp registers are 64 bits */
245: #define MASK_ABICALLS 0x00000400 /* emit .abicalls/.cprestore/.cpload */
246: #define MASK_HALF_PIC 0x00000800 /* Emit OSF-style pic refs to externs*/
247: #define MASK_LONG_CALLS 0x00001000 /* Always call through a register */
248: #define MASK_UNUSED1 0x00002000
249: #define MASK_UNUSED2 0x00004000
250: #define MASK_UNUSED3 0x00008000
251: #define MASK_UNUSED4 0x00010000
252: #define MASK_UNUSED5 0x00020000
253: #define MASK_UNUSED6 0x00040000
254: #define MASK_UNUSED7 0x00080000
255:
256: /* Dummy switches used only in spec's*/
257: #define MASK_MIPS_TFILE 0x00000000 /* flag for mips-tfile usage */
258:
259: /* Debug switches, not documented */
260: #define MASK_DEBUG 0x40000000 /* Eliminate version # in .s file */
261: #define MASK_DEBUG_A 0x20000000 /* don't allow <label>($reg) addrs */
262: #define MASK_DEBUG_B 0x10000000 /* GO_IF_LEGITIMATE_ADDRESS debug */
263: #define MASK_DEBUG_C 0x08000000 /* don't expand seq, etc. */
264: #define MASK_DEBUG_D 0x04000000 /* don't do define_split's */
265: #define MASK_DEBUG_E 0x02000000 /* function_arg debug */
266: #define MASK_DEBUG_F 0x01000000 /* don't try to suppress load nop's */
267: #define MASK_DEBUG_G 0x00800000 /* don't support 64 bit arithmetic */
268: #define MASK_DEBUG_H 0x00400000 /* allow ints in FP registers */
269: #define MASK_DEBUG_I 0x00200000 /* unused */
270: #define MASK_DEBUG_J 0x00100000 /* unused */
271:
272: /* r4000 64 bit sizes */
273: #define TARGET_INT64 (target_flags & MASK_INT64)
274: #define TARGET_LONG64 (target_flags & MASK_LONG64)
275: #define TARGET_LLONG128 (target_flags & MASK_LLONG128)
276: #define TARGET_FLOAT64 (target_flags & MASK_FLOAT64)
277:
278: /* Mips vs. GNU assembler */
279: #define TARGET_GAS (target_flags & MASK_GAS)
280: #define TARGET_UNIX_ASM (!TARGET_GAS)
281: #define TARGET_MIPS_AS TARGET_UNIX_ASM
282:
283: /* Debug Mode */
284: #define TARGET_DEBUG_MODE (target_flags & MASK_DEBUG)
285: #define TARGET_DEBUG_A_MODE (target_flags & MASK_DEBUG_A)
286: #define TARGET_DEBUG_B_MODE (target_flags & MASK_DEBUG_B)
287: #define TARGET_DEBUG_C_MODE (target_flags & MASK_DEBUG_C)
288: #define TARGET_DEBUG_D_MODE (target_flags & MASK_DEBUG_D)
289: #define TARGET_DEBUG_E_MODE (target_flags & MASK_DEBUG_E)
290: #define TARGET_DEBUG_F_MODE (target_flags & MASK_DEBUG_F)
291: #define TARGET_DEBUG_G_MODE (target_flags & MASK_DEBUG_G)
292: #define TARGET_DEBUG_H_MODE (target_flags & MASK_DEBUG_H)
293: #define TARGET_DEBUG_I_MODE (target_flags & MASK_DEBUG_I)
294: #define TARGET_DEBUG_J_MODE (target_flags & MASK_DEBUG_J)
295:
296: /* Reg. Naming in .s ($21 vs. $a0) */
297: #define TARGET_NAME_REGS (target_flags & MASK_NAME_REGS)
298:
299: /* Optimize for Sdata/Sbss */
300: #define TARGET_GP_OPT (target_flags & MASK_GPOPT)
301:
302: /* print program statistics */
303: #define TARGET_STATS (target_flags & MASK_STATS)
304:
305: /* call memcpy instead of inline code */
306: #define TARGET_MEMCPY (target_flags & MASK_MEMCPY)
307:
308: /* .abicalls, etc from Pyramid V.4 */
309: #define TARGET_ABICALLS (target_flags & MASK_ABICALLS)
310:
311: /* OSF pic references to externs */
312: #define TARGET_HALF_PIC (target_flags & MASK_HALF_PIC)
313:
314: /* software floating point */
315: #define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT)
316: #define TARGET_HARD_FLOAT (! TARGET_SOFT_FLOAT)
317:
318: /* always call through a register */
319: #define TARGET_LONG_CALLS (target_flags & MASK_LONG_CALLS)
320:
321: /* Macro to define tables used to set the flags.
322: This is a list in braces of pairs in braces,
323: each pair being { "NAME", VALUE }
324: where VALUE is the bits to set or minus the bits to clear.
325: An empty string NAME is used to identify the default VALUE. */
326:
327: #define TARGET_SWITCHES \
328: { \
329: {"int64", MASK_INT64 | MASK_LONG64}, \
330: {"long64", MASK_LONG64}, \
331: {"longlong128", MASK_INT64 | MASK_LONG64 | MASK_LLONG128}, \
332: {"mips-as", -MASK_GAS}, \
333: {"gas", MASK_GAS}, \
334: {"rnames", MASK_NAME_REGS}, \
335: {"no-rnames", -MASK_NAME_REGS}, \
336: {"gpOPT", MASK_GPOPT}, \
337: {"gpopt", MASK_GPOPT}, \
338: {"no-gpOPT", -MASK_GPOPT}, \
339: {"no-gpopt", -MASK_GPOPT}, \
340: {"stats", MASK_STATS}, \
341: {"no-stats", -MASK_STATS}, \
342: {"memcpy", MASK_MEMCPY}, \
343: {"no-memcpy", -MASK_MEMCPY}, \
344: {"mips-tfile", MASK_MIPS_TFILE}, \
345: {"no-mips-tfile", -MASK_MIPS_TFILE}, \
346: {"soft-float", MASK_SOFT_FLOAT}, \
347: {"hard-float", -MASK_SOFT_FLOAT}, \
348: {"fp64", MASK_FLOAT64}, \
349: {"fp32", -MASK_FLOAT64}, \
350: {"abicalls", MASK_ABICALLS}, \
351: {"no-abicalls", -MASK_ABICALLS}, \
352: {"half-pic", MASK_HALF_PIC}, \
353: {"no-half-pic", -MASK_HALF_PIC}, \
354: {"long-calls", MASK_LONG_CALLS}, \
355: {"no-long-calls", -MASK_LONG_CALLS}, \
356: {"debug", MASK_DEBUG}, \
357: {"debuga", MASK_DEBUG_A}, \
358: {"debugb", MASK_DEBUG_B}, \
359: {"debugc", MASK_DEBUG_C}, \
360: {"debugd", MASK_DEBUG_D}, \
361: {"debuge", MASK_DEBUG_E}, \
362: {"debugf", MASK_DEBUG_F}, \
363: {"debugg", MASK_DEBUG_G}, \
364: {"debugh", MASK_DEBUG_H}, \
365: {"debugi", MASK_DEBUG_I}, \
366: {"debugj", MASK_DEBUG_J}, \
367: {"", TARGET_DEFAULT | TARGET_CPU_DEFAULT} \
368: }
369:
370: /* Default target_flags if no switches are specified */
371:
372: #ifndef TARGET_DEFAULT
373: #define TARGET_DEFAULT 0
374: #endif
375:
376: #ifndef TARGET_CPU_DEFAULT
377: #define TARGET_CPU_DEFAULT 0
378: #endif
379:
380: /* This macro is similar to `TARGET_SWITCHES' but defines names of
381: command options that have values. Its definition is an
382: initializer with a subgrouping for each command option.
383:
384: Each subgrouping contains a string constant, that defines the
385: fixed part of the option name, and the address of a variable.
386: The variable, type `char *', is set to the variable part of the
387: given option if the fixed part matches. The actual option name
388: is made by appending `-m' to the specified name.
389:
390: Here is an example which defines `-mshort-data-NUMBER'. If the
391: given option is `-mshort-data-512', the variable `m88k_short_data'
392: will be set to the string `"512"'.
393:
394: extern char *m88k_short_data;
395: #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */
396:
397: #define TARGET_OPTIONS \
398: { \
399: { "cpu=", &mips_cpu_string }, \
400: { "ips", &mips_isa_string } \
401: }
402:
403: /* Macros to decide whether certain features are available or not,
404: depending on the instruction set architecture level. */
405:
406: #define BRANCH_LIKELY_P() (mips_isa >= 2)
407: #define HAVE_64BIT_P() (mips_isa >= 3)
408: #define HAVE_SQRT_P() (mips_isa >= 2)
409:
410:
411: /* Switch Recognition by gcc.c. Add -G xx support */
412:
413: #ifdef SWITCH_TAKES_ARG
414: #undef SWITCH_TAKES_ARG
415: #endif
416:
417: #define SWITCH_TAKES_ARG(CHAR) \
418: ((CHAR) == 'D' || (CHAR) == 'U' || (CHAR) == 'o' \
419: || (CHAR) == 'e' || (CHAR) == 'T' || (CHAR) == 'u' \
420: || (CHAR) == 'I' || (CHAR) == 'm' \
421: || (CHAR) == 'L' || (CHAR) == 'A' || (CHAR) == 'G')
422:
423: /* Sometimes certain combinations of command options do not make sense
424: on a particular target machine. You can define a macro
425: `OVERRIDE_OPTIONS' to take account of this. This macro, if
426: defined, is executed once just after all the command options have
427: been parsed.
428:
429: On the MIPS, it is used to handle -G. We also use it to set up all
430: of the tables referenced in the other macros. */
431:
432: #define OVERRIDE_OPTIONS override_options ()
433:
434: /* Zero or more C statements that may conditionally modify two
435: variables `fixed_regs' and `call_used_regs' (both of type `char
436: []') after they have been initialized from the two preceding
437: macros.
438:
439: This is necessary in case the fixed or call-clobbered registers
440: depend on target flags.
441:
442: You need not define this macro if it has no work to do.
443:
444: If the usage of an entire class of registers depends on the target
445: flags, you may indicate this to GCC by using this macro to modify
446: `fixed_regs' and `call_used_regs' to 1 for each of the registers in
447: the classes which should not be used by GCC. Also define the macro
448: `REG_CLASS_FROM_LETTER' to return `NO_REGS' if it is called with a
449: letter for a class that shouldn't be used.
450:
451: (However, if this class is not included in `GENERAL_REGS' and all
452: of the insn patterns whose constraints permit this class are
453: controlled by target switches, then GCC will automatically avoid
454: using these registers when the target switches are opposed to
455: them.) */
456:
457: #define CONDITIONAL_REGISTER_USAGE \
458: do \
459: { \
460: if (!TARGET_HARD_FLOAT) \
461: { \
462: int regno; \
463: \
464: for (regno = FP_REG_FIRST; regno <= FP_REG_LAST; regno++) \
465: fixed_regs[regno] = call_used_regs[regno] = 1; \
466: } \
467: } \
468: while (0)
469:
470:
471: /* Some machines may desire to change what optimizations are
472: performed for various optimization levels. This macro, if
473: defined, is executed once just after the optimization level is
474: determined and before the remainder of the command options have
475: been parsed. Values set in this macro are used as the default
476: values for the other command line options.
477:
478: LEVEL is the optimization level specified; 2 if -O2 is
479: specified, 1 if -O is specified, and 0 if neither is specified. */
480:
481: #define OPTIMIZATION_OPTIONS(LEVEL) \
482: { \
483: if (LEVEL) \
484: { \
485: flag_omit_frame_pointer = TRUE; \
486: flag_schedule_insns_after_reload = TRUE; \
487: target_flags &= MASK_GPOPT; \
488: } \
489: }
490:
491:
492: /* Complain about missing specs and predefines that should be defined in each
493: of the target tm files to override the defaults. This is mostly a place-
494: holder until I can get each of the files updated [mm]. */
495:
496: #if defined(OSF_OS) \
497: || defined(DECSTATION) \
498: || defined(SGI_TARGET) \
499: || defined(MIPS_NEWS) \
500: || defined(MIPS_SYSV) \
501: || defined(MIPS_SVR4) \
502: || defined(MIPS_BSD43)
503:
504: #ifndef CPP_PREDEFINES
505: #error "Define CPP_PREDEFINES in the appropriate tm.h file"
506: #endif
507:
508: #ifndef CPP_SPEC
509: #error "Define CPP_SPEC in the appropriate tm.h file"
510: #endif
511:
512: #ifndef LINK_SPEC
513: #error "Define LINK_SPEC in the appropriate tm.h file"
514: #endif
515:
516: #ifndef LIB_SPEC
517: #error "Define LIB_SPEC in the appropriate tm.h file"
518: #endif
519:
520: #ifndef STARTFILE_SPEC
521: #error "Define STARTFILE_SPEC in the appropriate tm.h file"
522: #endif
523:
524: #ifndef MACHINE_TYPE
525: #error "Define MACHINE_TYPE in the appropriate tm.h file"
526: #endif
527: #endif
528:
529: /* Tell collect what flags to pass to nm. */
530: #ifndef NM_FLAGS
531: #define NM_FLAGS "-Bp"
532: #endif
533:
534:
535: /* Names to predefine in the preprocessor for this target machine. */
536:
537: #ifndef CPP_PREDEFINES
538: #define CPP_PREDEFINES "-Dmips -Dunix -Dhost_mips -DMIPSEB -DR3000 -DSYSTYPE_BSD43 \
539: -D_mips -D_unix -D_host_mips -D_MIPSEB -D_R3000 -D_SYSTYPE_BSD43"
540: #endif
541:
542: /* Extra switches sometimes passed to the assembler. */
543:
544: #ifndef ASM_SPEC
545: #define ASM_SPEC "\
546: %{!mgas: \
547: %{!mrnames: %{!.s:-nocpp} %{.s: %{cpp} %{nocpp}}} \
548: %{pipe: %e-pipe is not supported.} \
549: %{EB} %{!EB:-EB} \
550: %{EL: %e-EL not supported} \
551: %{mips1} %{mips2} %{mips3} \
552: %{noasmopt:-O0} \
553: %{!noasmopt:%{O:-O2} %{O1:-O2} %{O2:-O2} %{O3:-O3}} \
554: %{g} %{g0} %{g1} %{g2} %{g3} %{v} %{K} \
555: %{ggdb:-g} %{ggdb0:-g0} %{ggdb1:-g1} %{ggdb2:-g2} %{ggdb3:-g3} \
556: %{gstabs:-g} %{gstabs0:-g0} %{gstabs1:-g1} %{gstabs2:-g2} %{gstabs3:-g3} \
557: %{gstabs+:-g} %{gstabs+0:-g0} %{gstabs+1:-g1} %{gstabs+2:-g2} %{gstabs+3:-g3} \
558: %{gcoff:-g} %{gstabs0:-g0} %{gcoff1:-g1} %{gcoff2:-g2} %{gcoff3:-g3}} \
559: %{G*}"
560:
561: #endif /* ASM_SPEC */
562:
563: /* Specify to run a post-processor, mips-tfile after the assembler
564: has run to stuff the mips debug information into the object file.
565: This is needed because the $#!%^ MIPS assembler provides no way
566: of specifying such information in the assembly file. If we are
567: cross compiling, disable mips-tfile unless the user specifies
568: -mmips-tfile. */
569:
570: #ifndef ASM_FINAL_SPEC
571: #if ((TARGET_CPU_DEFAULT | TARGET_DEFAULT) & MASK_GAS) != 0 || defined (CROSS_COMPILE)
572: /* GAS */
573: #define ASM_FINAL_SPEC "\
574: %{mmips-as: %{!mno-mips-tfile: \
575: \n mips-tfile %{v*: -v} \
576: %{K: -I %b.o~} \
577: %{!K: %{save-temps: -I %b.o~}} \
578: %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
579: %{.s:%i} %{!.s:%g.s}}}"
580:
581: #else /* not GAS, clean up after MIPS assembler */
582: #define ASM_FINAL_SPEC "\
583: %{!mgas: %{!mno-mips-tfile: \
584: \n mips-tfile %{v*: -v} \
585: %{K: -I %b.o~} \
586: %{!K: %{save-temps: -I %b.o~}} \
587: %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
588: %{.s:%i} %{!.s:%g.s}}}"
589:
590: #endif /* GAS */
591: #endif /* ASM_FINAL_SPEC */
592:
593: /* Redefinition of libraries used. Mips doesn't support normal
594: UNIX style profiling via calling _mcount. It does offer
595: profiling that samples the PC, so do what we can... */
596:
597: #ifndef LIB_SPEC
598: #define LIB_SPEC "%{pg:-lprof1} %{p:-lprof1} -lc"
599: #endif
600:
601: /* Extra switches sometimes passed to the linker. */
602:
603: #ifndef LINK_SPEC
604: #define LINK_SPEC "\
605: %{G*} \
606: %{!mgas: \
607: %{pipe: %e-pipe is not supported.} \
608: %{EB} %{!EB:-EB} \
609: %{EL: %e-EL not supported} \
610: %{mips1} %{mips2} %{mips3} \
611: %{bestGnum} %{shared} %{non_shared}}"
612: #endif /* LINK_SPEC defined */
613:
614: /* Specs for the compiler proper */
615:
616: #ifndef CC1_SPEC
617: #define CC1_SPEC "\
618: %{gline:%{!g:%{!g0:%{!g1:%{!g2: -g1}}}}} \
619: %{G*} \
620: %{pic-none: -mno-half-pic} \
621: %{pic-lib: -mhalf-pic} \
622: %{pic-extern: -mhalf-pic} \
623: %{pic-calls: -mhalf-pic} \
624: %{save-temps: }"
625: #endif
626:
627: /* Preprocessor specs */
628:
629: #ifndef CPP_SPEC
630: #define CPP_SPEC "\
631: %{.cc: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
632: %{.cxx: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
633: %{.C: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
634: %{.m: -D__LANGUAGE_OBJECTIVE_C -D_LANGUAGE_OBJECTIVE_C} \
635: %{.S: -D__LANGUAGE_ASSEMBLY -D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
636: %{!.S: -D__LANGUAGE_C -D_LANGUAGE_C %{!ansi:-DLANGUAGE_C}}"
637: #endif
638:
639: /* If defined, this macro is an additional prefix to try after
640: `STANDARD_EXEC_PREFIX'. */
641:
642: #ifndef MD_EXEC_PREFIX
643: #define MD_EXEC_PREFIX "/usr/lib/cmplrs/cc/"
644: #endif
645:
646: #ifndef MD_STARTFILE_PREFIX
647: #define MD_STARTFILE_PREFIX "/usr/lib/cmplrs/cc/"
648: #endif
649:
650:
651: /* Print subsidiary information on the compiler version in use. */
652:
653: #define MIPS_VERSION "[AL 1.1, MM 40]"
654:
655: #ifndef MACHINE_TYPE
656: #define MACHINE_TYPE "BSD Mips"
657: #endif
658:
659: #ifndef TARGET_VERSION_INTERNAL
660: #define TARGET_VERSION_INTERNAL(STREAM) \
661: fprintf (STREAM, " %s %s", MIPS_VERSION, MACHINE_TYPE)
662: #endif
663:
664: #ifndef TARGET_VERSION
665: #define TARGET_VERSION TARGET_VERSION_INTERNAL (stderr)
666: #endif
667:
668:
669: #define SDB_DEBUGGING_INFO /* generate info for mips-tfile */
670: #define DBX_DEBUGGING_INFO /* generate stabs (OSF/rose) */
671: #define MIPS_DEBUGGING_INFO /* MIPS specific debugging info */
672:
673: #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */
674: #define PREFERRED_DEBUGGING_TYPE ((len > 1 && !strncmp (str, "ggdb", len)) ? DBX_DEBUG : SDB_DEBUG)
675: #endif
676:
677: /* By default, turn on GDB extensions. */
678: #define DEFAULT_GDB_EXTENSIONS 1
679:
680: /* If we are passing smuggling stabs through the MIPS ECOFF object
681: format, put a comment in front of the .stab<x> operation so
682: that the MIPS assembler does not choke. The mips-tfile program
683: will correctly put the stab into the object file. */
684:
685: #define ASM_STABS_OP ((TARGET_GAS) ? ".stabs" : " #.stabs")
686: #define ASM_STABN_OP ((TARGET_GAS) ? ".stabn" : " #.stabn")
687: #define ASM_STABD_OP ((TARGET_GAS) ? ".stabd" : " #.stabd")
688:
689: /* Forward references to tags are allowed. */
690: #define SDB_ALLOW_FORWARD_REFERENCES
691:
692: /* Unknown tags are also allowed. */
693: #define SDB_ALLOW_UNKNOWN_REFERENCES
694:
695: /* On Sun 4, this limit is 2048. We use 1500 to be safe,
696: since the length can run past this up to a continuation point. */
697: #define DBX_CONTIN_LENGTH 1500
698:
699:
700: /* How to renumber registers for dbx and gdb. */
701: #define DBX_REGISTER_NUMBER(REGNO) mips_dbx_regno[ (REGNO) ]
702:
703:
704: /* Overrides for the COFF debug format. */
705: #define PUT_SDB_SCL(a) \
706: do { \
707: extern FILE *asm_out_text_file; \
708: fprintf (asm_out_text_file, "\t.scl\t%d;", (a)); \
709: } while (0)
710:
711: #define PUT_SDB_INT_VAL(a) \
712: do { \
713: extern FILE *asm_out_text_file; \
714: fprintf (asm_out_text_file, "\t.val\t%d;", (a)); \
715: } while (0)
716:
717: #define PUT_SDB_VAL(a) \
718: do { \
719: extern FILE *asm_out_text_file; \
720: fputs ("\t.val\t", asm_out_text_file); \
721: output_addr_const (asm_out_text_file, (a)); \
722: fputc (';', asm_out_text_file); \
723: } while (0)
724:
725: #define PUT_SDB_DEF(a) \
726: do { \
727: extern FILE *asm_out_text_file; \
728: fprintf (asm_out_text_file, "\t%s.def\t", \
729: (TARGET_GAS) ? "" : "#"); \
730: ASM_OUTPUT_LABELREF (asm_out_text_file, a); \
731: fputc (';', asm_out_text_file); \
732: } while (0)
733:
734: #define PUT_SDB_PLAIN_DEF(a) \
735: do { \
736: extern FILE *asm_out_text_file; \
737: fprintf (asm_out_text_file, "\t%s.def\t.%s;", \
738: (TARGET_GAS) ? "" : "#", (a)); \
739: } while (0)
740:
741: #define PUT_SDB_ENDEF \
742: do { \
743: extern FILE *asm_out_text_file; \
744: fprintf (asm_out_text_file, "\t.endef\n"); \
745: } while (0)
746:
747: #define PUT_SDB_TYPE(a) \
748: do { \
749: extern FILE *asm_out_text_file; \
750: fprintf (asm_out_text_file, "\t.type\t0x%x;", (a)); \
751: } while (0)
752:
753: #define PUT_SDB_SIZE(a) \
754: do { \
755: extern FILE *asm_out_text_file; \
756: fprintf (asm_out_text_file, "\t.size\t%d;", (a)); \
757: } while (0)
758:
759: #define PUT_SDB_DIM(a) \
760: do { \
761: extern FILE *asm_out_text_file; \
762: fprintf (asm_out_text_file, "\t.dim\t%d;", (a)); \
763: } while (0)
764:
765: #ifndef PUT_SDB_START_DIM
766: #define PUT_SDB_START_DIM \
767: do { \
768: extern FILE *asm_out_text_file; \
769: fprintf (asm_out_text_file, "\t.dim\t"); \
770: } while (0)
771: #endif
772:
773: #ifndef PUT_SDB_NEXT_DIM
774: #define PUT_SDB_NEXT_DIM(a) \
775: do { \
776: extern FILE *asm_out_text_file; \
777: fprintf (asm_out_text_file, "%d,", a); \
778: } while (0)
779: #endif
780:
781: #ifndef PUT_SDB_LAST_DIM
782: #define PUT_SDB_LAST_DIM(a) \
783: do { \
784: extern FILE *asm_out_text_file; \
785: fprintf (asm_out_text_file, "%d;", a); \
786: } while (0)
787: #endif
788:
789: #define PUT_SDB_TAG(a) \
790: do { \
791: extern FILE *asm_out_text_file; \
792: fprintf (asm_out_text_file, "\t.tag\t"); \
793: ASM_OUTPUT_LABELREF (asm_out_text_file, a); \
794: fputc (';', asm_out_text_file); \
795: } while (0)
796:
797: /* For block start and end, we create labels, so that
798: later we can figure out where the correct offset is.
799: The normal .ent/.end serve well enough for functions,
800: so those are just commented out. */
801:
802: #define PUT_SDB_BLOCK_START(LINE) \
803: do { \
804: extern FILE *asm_out_text_file; \
805: fprintf (asm_out_text_file, \
806: "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \
807: sdb_label_count, \
808: (TARGET_GAS) ? "" : "#", \
809: sdb_label_count, \
810: (LINE)); \
811: sdb_label_count++; \
812: } while (0)
813:
814: #define PUT_SDB_BLOCK_END(LINE) \
815: do { \
816: extern FILE *asm_out_text_file; \
817: fprintf (asm_out_text_file, \
818: "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \
819: sdb_label_count, \
820: (TARGET_GAS) ? "" : "#", \
821: sdb_label_count, \
822: (LINE)); \
823: sdb_label_count++; \
824: } while (0)
825:
826: #define PUT_SDB_FUNCTION_START(LINE)
827:
828: #define PUT_SDB_FUNCTION_END(LINE)
829:
830: #define PUT_SDB_EPILOGUE_END(NAME)
831:
832: #define SDB_GENERATE_FAKE(BUFFER, NUMBER) \
833: sprintf ((BUFFER), ".%dfake", (NUMBER));
834:
835: /* Correct the offset of automatic variables and arguments. Note that
836: the MIPS debug format wants all automatic variables and arguments
837: to be in terms of the virtual frame pointer (stack pointer before
838: any adjustment in the function), while the MIPS 3.0 linker wants
839: the frame pointer to be the stack pointer after the initial
840: adjustment. */
841:
842: #define DEBUGGER_AUTO_OFFSET(X) mips_debugger_offset (X, 0)
843: #define DEBUGGER_ARG_OFFSET(OFFSET, X) mips_debugger_offset (X, OFFSET)
844:
845:
846: /* Tell collect that the object format is ECOFF */
847: #ifndef OBJECT_FORMAT_ROSE
848: #define OBJECT_FORMAT_COFF /* Object file looks like COFF */
849: #define EXTENDED_COFF /* ECOFF, not normal coff */
850: #endif
851:
852: #if 0 /* These definitions normally have no effect because
853: MIPS systems define USE_COLLECT2, so
854: assemble_constructor does nothing anyway. */
855:
856: /* Don't use the default definitions, because we don't have gld.
857: Also, we don't want stabs when generating ECOFF output.
858: Instead we depend on collect to handle these. */
859:
860: #define ASM_OUTPUT_CONSTRUCTOR(file, name)
861: #define ASM_OUTPUT_DESTRUCTOR(file, name)
862:
863: #endif /* 0 */
864:
865: /* Target machine storage layout */
866:
867: /* Define this if most significant bit is lowest numbered
868: in instructions that operate on numbered bit-fields.
869: */
870: #define BITS_BIG_ENDIAN 0
871:
872: /* Define this if most significant byte of a word is the lowest numbered. */
873: #ifndef BYTES_BIG_ENDIAN
874: #ifndef DECSTATION
875: #define BYTES_BIG_ENDIAN 1
876: #else
877: #define BYTES_BIG_ENDIAN 0
878: #endif
879: #endif
880:
881: /* Define this if most significant word of a multiword number is the lowest. */
882: #ifndef WORDS_BIG_ENDIAN
883: #ifndef DECSTATION
884: #define WORDS_BIG_ENDIAN 1
885: #else
886: #define WORDS_BIG_ENDIAN 0
887: #endif
888: #endif
889:
890: /* Define macros to easily access the most and least significant words
891: without a lot of #ifdef's. */
892:
893: #if WORDS_BIG_ENDIAN
894: #define MOST_SIGNIFICANT_WORD 0
895: #define LEAST_SIGNIFICANT_WORD 1
896:
897: #else
898: #define MOST_SIGNIFICANT_WORD 1
899: #define LEAST_SIGNIFICANT_WORD 0
900: #endif
901:
902: /* Number of bits in an addressable storage unit */
903: #define BITS_PER_UNIT 8
904:
905: /* Width in bits of a "word", which is the contents of a machine register.
906: Note that this is not necessarily the width of data type `int';
907: if using 16-bit ints on a 68000, this would still be 32.
908: But on a machine with 16-bit registers, this would be 16. */
909: #define BITS_PER_WORD 32
910:
911: /* Width of a word, in units (bytes). */
912: #define UNITS_PER_WORD 4
913:
914: /* A C expression for the size in bits of the type `int' on the
915: target machine. If you don't define this, the default is one
916: word. */
917: #define INT_TYPE_SIZE 32
918:
919: /* A C expression for the size in bits of the type `short' on the
920: target machine. If you don't define this, the default is half a
921: word. (If this would be less than one storage unit, it is
922: rounded up to one unit.) */
923: #define SHORT_TYPE_SIZE 16
924:
925: /* A C expression for the size in bits of the type `long' on the
926: target machine. If you don't define this, the default is one
927: word. */
928: #define LONG_TYPE_SIZE 32
929:
930: /* A C expression for the size in bits of the type `long long' on the
931: target machine. If you don't define this, the default is two
932: words. */
933: #define LONG_LONG_TYPE_SIZE 64
934:
935: /* A C expression for the size in bits of the type `char' on the
936: target machine. If you don't define this, the default is one
937: quarter of a word. (If this would be less than one storage unit,
938: it is rounded up to one unit.) */
939: #define CHAR_TYPE_SIZE BITS_PER_UNIT
940:
941: /* A C expression for the size in bits of the type `float' on the
942: target machine. If you don't define this, the default is one
943: word. */
944: #define FLOAT_TYPE_SIZE 32
945:
946: /* A C expression for the size in bits of the type `double' on the
947: target machine. If you don't define this, the default is two
948: words. */
949: #define DOUBLE_TYPE_SIZE 64
950:
951: /* A C expression for the size in bits of the type `long double' on
952: the target machine. If you don't define this, the default is two
953: words. */
954: #define LONG_DOUBLE_TYPE_SIZE 64
955:
956: /* Width in bits of a pointer.
957: See also the macro `Pmode' defined below. */
958: #define POINTER_SIZE 32
959:
960: /* Allocation boundary (in *bits*) for storing pointers in memory. */
961: #define POINTER_BOUNDARY 32
962:
963: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
964: #define PARM_BOUNDARY 32
965:
966: /* Allocation boundary (in *bits*) for the code of a function. */
967: #define FUNCTION_BOUNDARY 32
968:
969: /* Alignment of field after `int : 0' in a structure. */
970: #define EMPTY_FIELD_BOUNDARY 32
971:
972: /* Every structure's size must be a multiple of this. */
973: /* 8 is observed right on a DECstation and on riscos 4.02. */
974: #define STRUCTURE_SIZE_BOUNDARY 8
975:
976: /* There is no point aligning anything to a rounder boundary than this. */
977: #define BIGGEST_ALIGNMENT 64
978:
979: /* Biggest alignment any structure field can require in bits. */
980: #define BIGGEST_FIELD_ALIGNMENT 64
981:
982: /* Set this nonzero if move instructions will actually fail to work
983: when given unaligned data. */
984: #define STRICT_ALIGNMENT 1
985:
986: /* Define this if you wish to imitate the way many other C compilers
987: handle alignment of bitfields and the structures that contain
988: them.
989:
990: The behavior is that the type written for a bitfield (`int',
991: `short', or other integer type) imposes an alignment for the
992: entire structure, as if the structure really did contain an
993: ordinary field of that type. In addition, the bitfield is placed
994: within the structure so that it would fit within such a field,
995: not crossing a boundary for it.
996:
997: Thus, on most machines, a bitfield whose type is written as `int'
998: would not cross a four-byte boundary, and would force four-byte
999: alignment for the whole structure. (The alignment used may not
1000: be four bytes; it is controlled by the other alignment
1001: parameters.)
1002:
1003: If the macro is defined, its definition should be a C expression;
1004: a nonzero value for the expression enables this behavior. */
1005:
1006: #define PCC_BITFIELD_TYPE_MATTERS 1
1007:
1008: /* If defined, a C expression to compute the alignment given to a
1009: constant that is being placed in memory. CONSTANT is the constant
1010: and ALIGN is the alignment that the object would ordinarily have.
1011: The value of this macro is used instead of that alignment to align
1012: the object.
1013:
1014: If this macro is not defined, then ALIGN is used.
1015:
1016: The typical use of this macro is to increase alignment for string
1017: constants to be word aligned so that `strcpy' calls that copy
1018: constants can be done inline. */
1019:
1020: #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
1021: ((TREE_CODE (EXP) == STRING_CST || TREE_CODE (EXP) == CONSTRUCTOR) \
1022: && (ALIGN) < BITS_PER_WORD \
1023: ? BITS_PER_WORD \
1024: : (ALIGN))
1025:
1026: /* If defined, a C expression to compute the alignment for a static
1027: variable. TYPE is the data type, and ALIGN is the alignment that
1028: the object would ordinarily have. The value of this macro is used
1029: instead of that alignment to align the object.
1030:
1031: If this macro is not defined, then ALIGN is used.
1032:
1033: One use of this macro is to increase alignment of medium-size
1034: data to make it all fit in fewer cache lines. Another is to
1035: cause character arrays to be word-aligned so that `strcpy' calls
1036: that copy constants to character arrays can be done inline. */
1037:
1038: #undef DATA_ALIGNMENT
1039: #define DATA_ALIGNMENT(TYPE, ALIGN) \
1040: ((((ALIGN) < BITS_PER_WORD) \
1041: && (TREE_CODE (TYPE) == ARRAY_TYPE \
1042: || TREE_CODE (TYPE) == UNION_TYPE \
1043: || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
1044:
1045: /* Define this macro if an argument declared as `char' or `short' in a
1046: prototype should actually be passed as an `int'. In addition to
1047: avoiding errors in certain cases of mismatch, it also makes for
1048: better code on certain machines. */
1049:
1050: #define PROMOTE_PROTOTYPES
1051:
1052: /* Define this macro if an instruction to load a value narrower
1053: than a word from memory into a register also zero-extends the
1054: value to the whole register. */
1055:
1056: #define BYTE_LOADS_ZERO_EXTEND
1057:
1058:
1059: /* Standard register usage. */
1060:
1061: /* Number of actual hardware registers.
1062: The hardware registers are assigned numbers for the compiler
1063: from 0 to just below FIRST_PSEUDO_REGISTER.
1064: All registers that the compiler knows about must be given numbers,
1065: even those that are not normally considered general registers.
1066:
1067: On the Mips, we have 32 integer registers, 32 floating point registers
1068: and the special registers hi, lo, and fp status. */
1069:
1070: #define FIRST_PSEUDO_REGISTER 67
1071:
1072: /* 1 for registers that have pervasive standard uses
1073: and are not available for the register allocator.
1074:
1075: On the MIPS, see conventions, page D-2 */
1076:
1077: #define FIXED_REGISTERS \
1078: { \
1079: 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1080: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, \
1081: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1082: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1083: 1, 1, 1 \
1084: }
1085:
1086:
1087: /* 1 for registers not available across function calls.
1088: These must include the FIXED_REGISTERS and also any
1089: registers that can be used without being saved.
1090: The latter must include the registers where values are returned
1091: and the register where structure-value addresses are passed.
1092: Aside from that, you can include as many other registers as you like. */
1093:
1094: #define CALL_USED_REGISTERS \
1095: { \
1096: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1097: 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
1098: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1099: 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1100: 1, 1, 1 \
1101: }
1102:
1103:
1104: /* Internal macros to classify a register number as to whether it's a
1105: general purpose register, a floating point register, a
1106: multiply/divide register, or a status register.
1107:
1108: The macro FP_CALL_REG_P also allows registers $4 and $6 as floating
1109: point registers to pass floating point as per MIPS spec. */
1110:
1111: #define GP_REG_FIRST 0
1112: #define GP_REG_LAST 31
1113: #define GP_REG_NUM (GP_REG_LAST - GP_REG_FIRST + 1)
1114: #define GP_DBX_FIRST 0
1115:
1116: #define FP_REG_FIRST 32
1117: #define FP_REG_LAST 63
1118: #define FP_REG_NUM (FP_REG_LAST - FP_REG_FIRST + 1)
1119: #define FP_DBX_FIRST ((write_symbols == DBX_DEBUG) ? 38 : 32)
1120:
1121: #define MD_REG_FIRST 64
1122: #define MD_REG_LAST 65
1123: #define MD_REG_NUM (MD_REG_LAST - MD_REG_FIRST + 1)
1124:
1125: #define ST_REG_FIRST 66
1126: #define ST_REG_LAST 66
1127: #define ST_REG_NUM (ST_REG_LAST - ST_REG_FIRST + 1)
1128:
1129: #define AT_REGNUM (GP_REG_FIRST + 1)
1130: #define HI_REGNUM (MD_REG_FIRST + 0)
1131: #define LO_REGNUM (MD_REG_FIRST + 1)
1132: #define FPSW_REGNUM ST_REG_FIRST
1133:
1134: #define GP_REG_P(REGNO) ((unsigned) ((REGNO) - GP_REG_FIRST) < GP_REG_NUM)
1135: #define FP_REG_P(REGNO) ((unsigned) ((REGNO) - FP_REG_FIRST) < FP_REG_NUM)
1136: #define MD_REG_P(REGNO) ((unsigned) ((REGNO) - MD_REG_FIRST) < MD_REG_NUM)
1137: #define ST_REG_P(REGNO) ((REGNO) == ST_REG_FIRST)
1138:
1139: #define FP_CALL_REG_P(REGNO) \
1140: (FP_REG_P (REGNO) \
1141: || (REGNO) == (4 + GP_REG_FIRST) \
1142: || (REGNO) == (6 + GP_REG_FIRST))
1143:
1144: /* Return number of consecutive hard regs needed starting at reg REGNO
1145: to hold something of mode MODE.
1146: This is ordinarily the length in words of a value of mode MODE
1147: but can be less for certain modes in special long registers.
1148:
1149: On the MIPS, all general registers are one word long. Except on
1150: the R4000 with the FR bit set, the floating point uses register
1151: pairs, with the second register not being allocatable. */
1152:
1153: #define HARD_REGNO_NREGS(REGNO, MODE) \
1154: (! FP_REG_P (REGNO) \
1155: ? ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) \
1156: : (((GET_MODE_SIZE (MODE) + (2*UNITS_PER_WORD) - 1) / (2*UNITS_PER_WORD)) \
1157: << (TARGET_FLOAT64 == 0)))
1158:
1159: /* Value is 1 if hard register REGNO can hold a value of machine-mode
1160: MODE. Require that DImode and DFmode be in even registers. For
1161: DImode, this makes some of the insns easier to write, since you
1162: don't have to worry about a DImode value in registers 3 & 4,
1163: producing a result in 4 & 5.
1164:
1165: To make the code simpler HARD_REGNO_MODE_OK now just references an
1166: array built in override_options. Because machmodes.h is not yet
1167: included before this file is processed, the MODE bound can't be
1168: expressed here. */
1169:
1170: extern char mips_hard_regno_mode_ok[][FIRST_PSEUDO_REGISTER];
1171:
1172: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
1173: mips_hard_regno_mode_ok[ (int)(MODE) ][ (REGNO) ]
1174:
1175: /* Value is 1 if it is a good idea to tie two pseudo registers
1176: when one has mode MODE1 and one has mode MODE2.
1177: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
1178: for any hard reg, then this must be 0 for correct output. */
1179: #define MODES_TIEABLE_P(MODE1, MODE2) \
1180: ((GET_MODE_CLASS (MODE1) == MODE_FLOAT || \
1181: GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
1182: == (GET_MODE_CLASS (MODE2) == MODE_FLOAT || \
1183: GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
1184:
1185: /* MIPS pc is not overloaded on a register. */
1186: /* #define PC_REGNUM xx */
1187:
1188: /* Register to use for pushing function arguments. */
1189: #define STACK_POINTER_REGNUM (GP_REG_FIRST + 29)
1190:
1191: /* Offset from the stack pointer to the first available location. */
1192: #define STACK_POINTER_OFFSET 0
1193:
1194: /* Base register for access to local variables of the function. */
1195: #define FRAME_POINTER_REGNUM (GP_REG_FIRST + 30)
1196:
1197: /* Value should be nonzero if functions must have frame pointers.
1198: Zero means the frame pointer need not be set up (and parms
1199: may be accessed via the stack pointer) in functions that seem suitable.
1200: This is computed in `reload', in reload1.c. */
1201: #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
1202:
1203: /* Base register for access to arguments of the function. */
1204: #define ARG_POINTER_REGNUM GP_REG_FIRST
1205:
1206: /* Register in which static-chain is passed to a function. */
1207: #define STATIC_CHAIN_REGNUM (GP_REG_FIRST + 2)
1208:
1209: /* If the structure value address is passed in a register, then
1210: `STRUCT_VALUE_REGNUM' should be the number of that register. */
1211: /* #define STRUCT_VALUE_REGNUM (GP_REG_FIRST + 4) */
1212:
1213: /* If the structure value address is not passed in a register, define
1214: `STRUCT_VALUE' as an expression returning an RTX for the place
1215: where the address is passed. If it returns 0, the address is
1216: passed as an "invisible" first argument. */
1217: #define STRUCT_VALUE ((rtx)0)
1218:
1219: /* Mips registers used in prologue/epilogue code when the stack frame
1220: is larger than 32K bytes. These registers must come from the
1221: scratch register set, and not used for passing and returning
1222: arguments and any other information used in the calling sequence
1223: (such as pic). */
1224:
1225: #define MIPS_TEMP1_REGNUM (GP_REG_FIRST + 8)
1226: #define MIPS_TEMP2_REGNUM (GP_REG_FIRST + 9)
1227:
1228: /* Define this macro if it is as good or better to call a constant
1229: function address than to call an address kept in a register. */
1230: #define NO_FUNCTION_CSE 1
1231:
1232: /* Define this macro if it is as good or better for a function to
1233: call itself with an explicit address than to call an address
1234: kept in a register. */
1235: #define NO_RECURSIVE_FUNCTION_CSE 1
1236:
1237: /* The register number of the register used to address a table of
1238: static data addresses in memory. In some cases this register is
1239: defined by a processor's "application binary interface" (ABI).
1240: When this macro is defined, RTL is generated for this register
1241: once, as with the stack pointer and frame pointer registers. If
1242: this macro is not defined, it is up to the machine-dependent
1243: files to allocate such a register (if necessary). */
1244: #define PIC_OFFSET_TABLE_REGNUM (GP_REG_FIRST + 28)
1245:
1246:
1247: /* Define the classes of registers for register constraints in the
1248: machine description. Also define ranges of constants.
1249:
1250: One of the classes must always be named ALL_REGS and include all hard regs.
1251: If there is more than one class, another class must be named NO_REGS
1252: and contain no registers.
1253:
1254: The name GENERAL_REGS must be the name of a class (or an alias for
1255: another name such as ALL_REGS). This is the class of registers
1256: that is allowed by "g" or "r" in a register constraint.
1257: Also, registers outside this class are allocated only when
1258: instructions express preferences for them.
1259:
1260: The classes must be numbered in nondecreasing order; that is,
1261: a larger-numbered class must never be contained completely
1262: in a smaller-numbered class.
1263:
1264: For any two classes, it is very desirable that there be another
1265: class that represents their union. */
1266:
1267: enum reg_class
1268: {
1269: NO_REGS, /* no registers in set */
1270: GR_REGS, /* integer registers */
1271: FP_REGS, /* floating point registers */
1272: HI_REG, /* hi register */
1273: LO_REG, /* lo register */
1274: MD_REGS, /* multiply/divide registers (hi/lo) */
1275: ST_REGS, /* status registers (fp status) */
1276: ALL_REGS, /* all registers */
1277: LIM_REG_CLASSES /* max value + 1 */
1278: };
1279:
1280: #define N_REG_CLASSES (int) LIM_REG_CLASSES
1281:
1282: #define GENERAL_REGS GR_REGS
1283:
1284: /* An initializer containing the names of the register classes as C
1285: string constants. These names are used in writing some of the
1286: debugging dumps. */
1287:
1288: #define REG_CLASS_NAMES \
1289: { \
1290: "NO_REGS", \
1291: "GR_REGS", \
1292: "FP_REGS", \
1293: "HI_REG", \
1294: "LO_REG", \
1295: "MD_REGS", \
1296: "ST_REGS", \
1297: "ALL_REGS" \
1298: }
1299:
1300: /* An initializer containing the contents of the register classes,
1301: as integers which are bit masks. The Nth integer specifies the
1302: contents of class N. The way the integer MASK is interpreted is
1303: that register R is in the class if `MASK & (1 << R)' is 1.
1304:
1305: When the machine has more than 32 registers, an integer does not
1306: suffice. Then the integers are replaced by sub-initializers,
1307: braced groupings containing several integers. Each
1308: sub-initializer must be suitable as an initializer for the type
1309: `HARD_REG_SET' which is defined in `hard-reg-set.h'. */
1310:
1311: #define REG_CLASS_CONTENTS \
1312: { \
1313: { 0x00000000, 0x00000000, 0x00000000 }, /* no registers */ \
1314: { 0xffffffff, 0x00000000, 0x00000000 }, /* integer registers */ \
1315: { 0x00000000, 0xffffffff, 0x00000000 }, /* floating registers*/ \
1316: { 0x00000000, 0x00000000, 0x00000001 }, /* hi register */ \
1317: { 0x00000000, 0x00000000, 0x00000002 }, /* lo register */ \
1318: { 0x00000000, 0x00000000, 0x00000003 }, /* mul/div registers */ \
1319: { 0x00000000, 0x00000000, 0x00000004 }, /* status registers */ \
1320: { 0xffffffff, 0xffffffff, 0x00000007 } /* all registers */ \
1321: }
1322:
1323:
1324: /* A C expression whose value is a register class containing hard
1325: register REGNO. In general there is more that one such class;
1326: choose a class which is "minimal", meaning that no smaller class
1327: also contains the register. */
1328:
1329: extern enum reg_class mips_regno_to_class[];
1330:
1331: #define REGNO_REG_CLASS(REGNO) mips_regno_to_class[ (REGNO) ]
1332:
1333: /* A macro whose definition is the name of the class to which a
1334: valid base register must belong. A base register is one used in
1335: an address which is the register value plus a displacement. */
1336:
1337: #define BASE_REG_CLASS GR_REGS
1338:
1339: /* A macro whose definition is the name of the class to which a
1340: valid index register must belong. An index register is one used
1341: in an address where its value is either multiplied by a scale
1342: factor or added to another register (as well as added to a
1343: displacement). */
1344:
1345: #define INDEX_REG_CLASS GR_REGS
1346:
1347:
1348: /* REGISTER AND CONSTANT CLASSES */
1349:
1350: /* Get reg_class from a letter such as appears in the machine
1351: description.
1352:
1353: DEFINED REGISTER CLASSES:
1354:
1355: 'd' General (aka integer) registers
1356: 'f' Floating point registers
1357: 'h' Hi register
1358: 'l' Lo register
1359: 'x' Multiply/divide registers
1360: 'z' FP Status register */
1361:
1362: extern enum reg_class mips_char_to_class[];
1363:
1364: #define REG_CLASS_FROM_LETTER(C) mips_char_to_class[ (C) ]
1365:
1366: /* The letters I, J, K, L, M, N, O, and P in a register constraint
1367: string can be used to stand for particular ranges of immediate
1368: operands. This macro defines what the ranges are. C is the
1369: letter, and VALUE is a constant value. Return 1 if VALUE is
1370: in the range specified by C. */
1371:
1372: /* For MIPS:
1373:
1374: `I' is used for the range of constants an arithmetic insn can
1375: actually contain (16 bits signed integers).
1376:
1377: `J' is used for the range which is just zero (ie, $r0).
1378:
1379: `K' is used for the range of constants a logical insn can actually
1380: contain (16 bit zero-extended integers).
1381:
1382: `L' is used for the range of constants that be loaded with lui
1383: (ie, the bottom 16 bits are zero).
1384:
1385: `M' is used for the range of constants that take two words to load
1386: (ie, not matched by `I', `K', and `L').
1387:
1388: `N' is used for negative 16 bit constants.
1389:
1390: `O' is an exact power of 2 (not yet used in the md file).
1391:
1392: `P' is used for positive 16 bit constants. */
1393:
1394: #define SMALL_INT(X) ((unsigned) (INTVAL (X) + 0x8000) < 0x10000)
1395: #define SMALL_INT_UNSIGNED(X) ((unsigned) (INTVAL (X)) < 0x10000)
1396:
1397: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
1398: ((C) == 'I' ? ((unsigned) ((VALUE) + 0x8000) < 0x10000) \
1399: : (C) == 'J' ? ((VALUE) == 0) \
1400: : (C) == 'K' ? ((unsigned) (VALUE) < 0x10000) \
1401: : (C) == 'L' ? (((VALUE) & 0xffff0000) == (VALUE)) \
1402: : (C) == 'M' ? ((((VALUE) & ~0x0000ffff) != 0) \
1403: && (((VALUE) & ~0x0000ffff) != ~0x0000ffff) \
1404: && ((VALUE) & 0x0000ffff) != 0) \
1405: : (C) == 'N' ? (((VALUE) & ~0x0000ffff) == ~0x0000ffff) \
1406: : (C) == 'O' ? (exact_log2 (VALUE) >= 0) \
1407: : (C) == 'P' ? ((VALUE) != 0 && (((VALUE) & ~0x0000ffff) == 0)) \
1408: : 0)
1409:
1410: /* Similar, but for floating constants, and defining letters G and H.
1411: Here VALUE is the CONST_DOUBLE rtx itself. */
1412:
1413: /* For Mips
1414:
1415: 'G' : Floating point 0 */
1416:
1417: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
1418: ((C) == 'G' \
1419: && CONST_DOUBLE_HIGH (VALUE) == 0 \
1420: && CONST_DOUBLE_LOW (VALUE) == 0)
1421:
1422: /* Letters in the range `Q' through `U' may be defined in a
1423: machine-dependent fashion to stand for arbitrary operand types.
1424: The machine description macro `EXTRA_CONSTRAINT' is passed the
1425: operand as its first argument and the constraint letter as its
1426: second operand.
1427:
1428: `Q' is for memory references which take more than 1 instruction.
1429: `R' is for memory references which take 1 word for the instruction.
1430: `S' is for references to extern items which are PIC for OSF/rose. */
1431:
1432: #define EXTRA_CONSTRAINT(OP,CODE) \
1433: ((GET_CODE (OP) != MEM) ? FALSE \
1434: : ((CODE) == 'Q') ? !simple_memory_operand (OP, GET_MODE (OP)) \
1435: : ((CODE) == 'R') ? simple_memory_operand (OP, GET_MODE (OP)) \
1436: : ((CODE) == 'S') ? (HALF_PIC_P () && CONSTANT_P (OP) \
1437: && HALF_PIC_ADDRESS_P (OP)) \
1438: : FALSE)
1439:
1440: /* Given an rtx X being reloaded into a reg required to be
1441: in class CLASS, return the class of reg to actually use.
1442: In general this is just CLASS; but on some machines
1443: in some cases it is preferable to use a more restrictive class. */
1444:
1445: #define PREFERRED_RELOAD_CLASS(X,CLASS) \
1446: ((GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
1447: || GET_MODE_CLASS (GET_MODE (X)) == MODE_COMPLEX_FLOAT) \
1448: ? (TARGET_SOFT_FLOAT ? GR_REGS : FP_REGS) \
1449: : ((GET_MODE (X) == VOIDmode) \
1450: ? GR_REGS \
1451: : CLASS))
1452:
1453: /* Certain machines have the property that some registers cannot be
1454: copied to some other registers without using memory. Define this
1455: macro on those machines to be a C expression that is non-zero if
1456: objects of mode MODE in registers of CLASS1 can only be copied to
1457: registers of class CLASS2 by storing a register of CLASS1 into
1458: memory and loading that memory location into a register of CLASS2.
1459:
1460: Do not define this macro if its value would always be zero. */
1461:
1462: #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
1463: (!TARGET_DEBUG_H_MODE \
1464: && GET_MODE_CLASS (MODE) == MODE_INT \
1465: && ((CLASS1 == FP_REGS && CLASS2 == GR_REGS) \
1466: || (CLASS1 == GR_REGS && CLASS2 == FP_REGS)))
1467:
1468: /* Return the maximum number of consecutive registers
1469: needed to represent mode MODE in a register of class CLASS. */
1470:
1471: #define CLASS_UNITS(mode, num) \
1472: ((GET_MODE_SIZE (mode) + ((num) * UNITS_PER_WORD) - 1) / ((num) * UNITS_PER_WORD))
1473:
1474: #define CLASS_MAX_NREGS(CLASS, MODE) \
1475: (((CLASS) == FP_REGS && TARGET_FLOAT64) \
1476: ? CLASS_UNITS (MODE, 2) \
1477: : (((CLASS) == FP_REGS) \
1478: ? (2*CLASS_UNITS (MODE, 1)) \
1479: : CLASS_UNITS (MODE, 1)))
1480:
1481: /* If defined, this is a C expression whose value should be
1482: nonzero if the insn INSN has the effect of mysteriously
1483: clobbering the contents of hard register number REGNO. By
1484: "mysterious" we mean that the insn's RTL expression doesn't
1485: describe such an effect.
1486:
1487: If this macro is not defined, it means that no insn clobbers
1488: registers mysteriously. This is the usual situation; all else
1489: being equal, it is best for the RTL expression to show all the
1490: activity. */
1491:
1492: /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) */
1493:
1494:
1495: /* Stack layout; function entry, exit and calling. */
1496:
1497: /* Define this if pushing a word on the stack
1498: makes the stack pointer a smaller address. */
1499: #define STACK_GROWS_DOWNWARD
1500:
1501: /* Define this if the nominal address of the stack frame
1502: is at the high-address end of the local variables;
1503: that is, each additional local variable allocated
1504: goes at a more negative offset in the frame. */
1505: /* #define FRAME_GROWS_DOWNWARD */
1506:
1507: /* Offset within stack frame to start allocating local variables at.
1508: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
1509: first local allocated. Otherwise, it is the offset to the BEGINNING
1510: of the first local allocated. */
1511: #define STARTING_FRAME_OFFSET current_function_outgoing_args_size
1512:
1513: /* Offset from the stack pointer register to an item dynamically
1514: allocated on the stack, e.g., by `alloca'.
1515:
1516: The default value for this macro is `STACK_POINTER_OFFSET' plus the
1517: length of the outgoing arguments. The default is correct for most
1518: machines. See `function.c' for details.
1519:
1520: The MIPS ABI states that functions which dynamically allocate the
1521: stack must not have 0 for STACK_DYNAMIC_OFFSET, since it looks like
1522: we are trying to create a second frame pointer to the function, so
1523: allocate some stack space to make it happy.
1524:
1525: However, the linker currently complains about linking any code that
1526: dynamically allocates stack space, and there seems to be a bug in
1527: STACK_DYNAMIC_OFFSET, so don't define this right now. */
1528:
1529: #if 0
1530: #define STACK_DYNAMIC_OFFSET(FUNDECL) \
1531: ((current_function_outgoing_args_size == 0 && current_function_calls_alloca) \
1532: ? 4*UNITS_PER_WORD \
1533: : current_function_outgoing_args_size)
1534: #endif
1535:
1536: /* Structure to be filled in by compute_frame_size with register
1537: save masks, and offsets for the current function. */
1538:
1539: struct mips_frame_info
1540: {
1541: long total_size; /* # bytes that the entire frame takes up */
1542: long var_size; /* # bytes that variables take up */
1543: long args_size; /* # bytes that outgoing arguments take up */
1544: long extra_size; /* # bytes of extra gunk */
1545: int gp_reg_size; /* # bytes needed to store gp regs */
1546: int fp_reg_size; /* # bytes needed to store fp regs */
1547: long mask; /* mask of saved gp registers */
1548: long fmask; /* mask of saved fp registers */
1549: long gp_save_offset; /* offset from vfp to store gp registers */
1550: long fp_save_offset; /* offset from vfp to store fp registers */
1551: long gp_sp_offset; /* offset from new sp to store gp registers */
1552: long fp_sp_offset; /* offset from new sp to store fp registers */
1553: int initialized; /* != 0 if frame size already calculated */
1554: int num_gp; /* number of gp registers saved */
1555: int num_fp; /* number of fp registers saved */
1556: };
1557:
1558: extern struct mips_frame_info current_frame_info;
1559:
1560: /* Store in the variable DEPTH the initial difference between the
1561: frame pointer reg contents and the stack pointer reg contents,
1562: as of the start of the function body. This depends on the layout
1563: of the fixed parts of the stack frame and on how registers are saved. */
1564:
1565: /* #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
1566: ((VAR) = compute_frame_size (get_frame_size ())) */
1567:
1568: /* If defined, this macro specifies a table of register pairs used to
1569: eliminate unneeded registers that point into the stack frame. If
1570: it is not defined, the only elimination attempted by the compiler
1571: is to replace references to the frame pointer with references to
1572: the stack pointer.
1573:
1574: The definition of this macro is a list of structure
1575: initializations, each of which specifies an original and
1576: replacement register.
1577:
1578: On some machines, the position of the argument pointer is not
1579: known until the compilation is completed. In such a case, a
1580: separate hard register must be used for the argument pointer.
1581: This register can be eliminated by replacing it with either the
1582: frame pointer or the argument pointer, depending on whether or not
1583: the frame pointer has been eliminated.
1584:
1585: In this case, you might specify:
1586: #define ELIMINABLE_REGS \
1587: {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1588: {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1589: {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1590:
1591: Note that the elimination of the argument pointer with the stack
1592: pointer is specified first since that is the preferred elimination. */
1593:
1594: #define ELIMINABLE_REGS \
1595: {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1596: { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1597: { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1598:
1599:
1600: /* A C expression that returns non-zero if the compiler is allowed to
1601: try to replace register number FROM-REG with register number
1602: TO-REG. This macro need only be defined if `ELIMINABLE_REGS' is
1603: defined, and will usually be the constant 1, since most of the
1604: cases preventing register elimination are things that the compiler
1605: already knows about. */
1606:
1607: #define CAN_ELIMINATE(FROM, TO) \
1608: (!frame_pointer_needed \
1609: || ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM))
1610:
1611: /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It
1612: specifies the initial difference between the specified pair of
1613: registers. This macro must be defined if `ELIMINABLE_REGS' is
1614: defined. */
1615:
1616: #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1617: { compute_frame_size (get_frame_size ()); \
1618: if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1619: (OFFSET) = 0; \
1620: else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1621: (OFFSET) = current_frame_info.total_size; \
1622: else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1623: (OFFSET) = current_frame_info.total_size; \
1624: else \
1625: abort (); \
1626: }
1627:
1628:
1629: /* If we generate an insn to push BYTES bytes,
1630: this says how many the stack pointer really advances by.
1631: On the vax, sp@- in a byte insn really pushes a word. */
1632:
1633: /* #define PUSH_ROUNDING(BYTES) 0 */
1634:
1635: /* If defined, the maximum amount of space required for outgoing
1636: arguments will be computed and placed into the variable
1637: `current_function_outgoing_args_size'. No space will be pushed
1638: onto the stack for each call; instead, the function prologue
1639: should increase the stack frame size by this amount.
1640:
1641: It is not proper to define both `PUSH_ROUNDING' and
1642: `ACCUMULATE_OUTGOING_ARGS'. */
1643: #define ACCUMULATE_OUTGOING_ARGS
1644:
1645: /* Offset from the argument pointer register to the first argument's
1646: address. On some machines it may depend on the data type of the
1647: function.
1648:
1649: If `ARGS_GROW_DOWNWARD', this is the offset to the location above
1650: the first argument's address.
1651:
1652: On the MIPS, we must skip the first argument position if we are
1653: returning a structure or a union, to account for it's address being
1654: passed in $4. However, at the current time, this produces a compiler
1655: that can't bootstrap, so comment it out for now. */
1656:
1657: #if 0
1658: #define FIRST_PARM_OFFSET(FNDECL) \
1659: (FNDECL != 0 \
1660: && TREE_TYPE (FNDECL) != 0 \
1661: && TREE_TYPE (TREE_TYPE (FNDECL)) != 0 \
1662: && (TREE_CODE (TREE_TYPE (TREE_TYPE (FNDECL))) == RECORD_TYPE \
1663: || TREE_CODE (TREE_TYPE (TREE_TYPE (FNDECL))) == UNION_TYPE) \
1664: ? UNITS_PER_WORD \
1665: : 0)
1666: #else
1667: #define FIRST_PARM_OFFSET(FNDECL) 0
1668: #endif
1669:
1670: /* When a parameter is passed in a register, stack space is still
1671: allocated for it. For the MIPS, stack space must be allocated, cf
1672: Asm Lang Prog Guide page 7-8.
1673:
1674: BEWARE that some space is also allocated for non existing arguments
1675: in register. In case an argument list is of form GF used registers
1676: are a0 (a2,a3), but we should push over a1... */
1677:
1678: #define REG_PARM_STACK_SPACE(FNDECL) ((4*UNITS_PER_WORD) - FIRST_PARM_OFFSET (FNDECL))
1679:
1680: /* Define this if it is the responsibility of the caller to
1681: allocate the area reserved for arguments passed in registers.
1682: If `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect
1683: of this macro is to determine whether the space is included in
1684: `current_function_outgoing_args_size'. */
1685: #define OUTGOING_REG_PARM_STACK_SPACE
1686:
1687: /* Align stack frames on 64 bits (Double Word ). */
1688: #define STACK_BOUNDARY 64
1689:
1690: /* Make sure 16 bytes are always allocated on the stack. */
1691:
1692: #ifndef STACK_ARGS_ADJUST
1693: #define STACK_ARGS_ADJUST(SIZE) \
1694: { \
1695: if (SIZE.constant < 16) \
1696: SIZE.constant = 16; \
1697: }
1698: #endif
1699:
1700:
1701: /* A C expression that should indicate the number of bytes of its
1702: own arguments that a function function pops on returning, or 0
1703: if the function pops no arguments and the caller must therefore
1704: pop them all after the function returns.
1705:
1706: FUNTYPE is a C variable whose value is a tree node that
1707: describes the function in question. Normally it is a node of
1708: type `FUNCTION_TYPE' that describes the data type of the function.
1709: From this it is possible to obtain the data types of the value
1710: and arguments (if known).
1711:
1712: When a call to a library function is being considered, FUNTYPE
1713: will contain an identifier node for the library function. Thus,
1714: if you need to distinguish among various library functions, you
1715: can do so by their names. Note that "library function" in this
1716: context means a function used to perform arithmetic, whose name
1717: is known specially in the compiler and was not mentioned in the
1718: C code being compiled.
1719:
1720: STACK-SIZE is the number of bytes of arguments passed on the
1721: stack. If a variable number of bytes is passed, it is zero, and
1722: argument popping will always be the responsibility of the
1723: calling function. */
1724:
1725: #define RETURN_POPS_ARGS(FUNTYPE, SIZE) 0
1726:
1727:
1728: /* Symbolic macros for the registers used to return integer and floating
1729: point values. */
1730:
1731: #define GP_RETURN (GP_REG_FIRST + 2)
1732: #define FP_RETURN ((TARGET_SOFT_FLOAT) ? GP_RETURN : (FP_REG_FIRST + 0))
1733:
1734: /* Symbolic macros for the first/last argument registers. */
1735:
1736: #define GP_ARG_FIRST (GP_REG_FIRST + 4)
1737: #define GP_ARG_LAST (GP_REG_FIRST + 7)
1738: #define FP_ARG_FIRST (FP_REG_FIRST + 12)
1739: #define FP_ARG_LAST (FP_REG_FIRST + 15)
1740:
1741: #define MAX_ARGS_IN_REGISTERS 4
1742:
1743: /* Define how to find the value returned by a library function
1744: assuming the value has mode MODE. */
1745:
1746: #define LIBCALL_VALUE(MODE) \
1747: gen_rtx (REG, MODE, \
1748: (GET_MODE_CLASS (MODE) == MODE_FLOAT) \
1749: ? FP_RETURN \
1750: : GP_RETURN)
1751:
1752: /* Define how to find the value returned by a function.
1753: VALTYPE is the data type of the value (as a tree).
1754: If the precise function being called is known, FUNC is its FUNCTION_DECL;
1755: otherwise, FUNC is 0. */
1756:
1757: #define FUNCTION_VALUE(VALTYPE, FUNC) LIBCALL_VALUE (TYPE_MODE (VALTYPE))
1758:
1759:
1760: /* 1 if N is a possible register number for a function value.
1761: On the MIPS, R2 R3 and F0 F2 are the only register thus used.
1762: Currently, R2 and F0 are only implemented here (C has no complex type) */
1763:
1764: #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN || (N) == FP_RETURN)
1765:
1766: /* 1 if N is a possible register number for function argument passing. */
1767:
1768: #define FUNCTION_ARG_REGNO_P(N) (((N) >= GP_ARG_FIRST && (N) <= GP_ARG_LAST) \
1769: || ((N) >= FP_ARG_FIRST && (N) <= FP_ARG_LAST \
1770: && (0 == (N) % 2)))
1771:
1772: /* A C expression which can inhibit the returning of certain function
1773: values in registers, based on the type of value. A nonzero value says
1774: to return the function value in memory, just as large structures are
1775: always returned. Here TYPE will be a C expression of type
1776: `tree', representing the data type of the value.
1777:
1778: Note that values of mode `BLKmode' must be explicitly
1779: handled by this macro. Also, the option `-fpcc-struct-return'
1780: takes effect regardless of this macro. On most systems, it is
1781: possible to leave the macro undefined; this causes a default
1782: definition to be used, whose value is the constant 1 for BLKmode
1783: values, and 0 otherwise.
1784:
1785: GCC normally converts 1 byte structures into chars, 2 byte
1786: structs into shorts, and 4 byte structs into ints, and returns
1787: them this way. Defining the following macro overrides this,
1788: to give us MIPS cc compatibility. */
1789:
1790: #define RETURN_IN_MEMORY(TYPE) \
1791: (TYPE_MODE (TYPE) == BLKmode)
1792:
1793: /* A code distinguishing the floating point format of the target
1794: machine. There are three defined values: IEEE_FLOAT_FORMAT,
1795: VAX_FLOAT_FORMAT, and UNKNOWN_FLOAT_FORMAT. */
1796:
1797: #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
1798:
1799:
1800: /* Define a data type for recording info about an argument list
1801: during the scan of that argument list. This data type should
1802: hold all necessary information about the function itself
1803: and about the args processed so far, enough to enable macros
1804: such as FUNCTION_ARG to determine where the next arg should go.
1805: */
1806:
1807: typedef struct mips_args {
1808: int gp_reg_found; /* whether a gp register was found yet */
1809: int arg_number; /* argument number */
1810: int arg_words; /* # total words the arguments take */
1811: int num_adjusts; /* number of adjustments made */
1812: /* Adjustments made to args pass in regs. */
1813: struct rtx_def *adjust[MAX_ARGS_IN_REGISTERS];
1814: } CUMULATIVE_ARGS;
1815:
1816: /* Initialize a variable CUM of type CUMULATIVE_ARGS
1817: for a call to a function whose data type is FNTYPE.
1818: For a library call, FNTYPE is 0.
1819:
1820: */
1821:
1822: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
1823: init_cumulative_args (&CUM, FNTYPE, LIBNAME) \
1824:
1825: /* Update the data in CUM to advance over an argument
1826: of mode MODE and data type TYPE.
1827: (TYPE is null for libcalls where that information may not be available.) */
1828:
1829: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1830: function_arg_advance (&CUM, MODE, TYPE, NAMED)
1831:
1832: /* Determine where to put an argument to a function.
1833: Value is zero to push the argument on the stack,
1834: or a hard register in which to store the argument.
1835:
1836: MODE is the argument's machine mode.
1837: TYPE is the data type of the argument (as a tree).
1838: This is null for libcalls where that information may
1839: not be available.
1840: CUM is a variable of type CUMULATIVE_ARGS which gives info about
1841: the preceding args and about the function being called.
1842: NAMED is nonzero if this argument is a named parameter
1843: (otherwise it is an extra parameter matching an ellipsis). */
1844:
1845: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1846: function_arg( &CUM, MODE, TYPE, NAMED)
1847:
1848: /* For an arg passed partly in registers and partly in memory,
1849: this is the number of registers used.
1850: For args passed entirely in registers or entirely in memory, zero. */
1851:
1852: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1853: function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)
1854:
1855: /* If defined, a C expression that gives the alignment boundary, in
1856: bits, of an argument with the specified mode and type. If it is
1857: not defined, `PARM_BOUNDARY' is used for all arguments. */
1858:
1859: #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1860: (((TYPE) != 0) \
1861: ? ((TYPE_ALIGN(TYPE) <= PARM_BOUNDARY) \
1862: ? PARM_BOUNDARY \
1863: : TYPE_ALIGN(TYPE)) \
1864: : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
1865: ? PARM_BOUNDARY \
1866: : GET_MODE_ALIGNMENT(MODE)))
1867:
1868:
1869: /* This macro generates the assembly code for function entry.
1870: FILE is a stdio stream to output the code to.
1871: SIZE is an int: how many units of temporary storage to allocate.
1872: Refer to the array `regs_ever_live' to determine which registers
1873: to save; `regs_ever_live[I]' is nonzero if register number I
1874: is ever used in the function. This macro is responsible for
1875: knowing which registers should not be saved even if used. */
1876:
1877: #define FUNCTION_PROLOGUE(FILE, SIZE) function_prologue(FILE, SIZE)
1878:
1879: /* This macro generates the assembly code for function exit,
1880: on machines that need it. If FUNCTION_EPILOGUE is not defined
1881: then individual return instructions are generated for each
1882: return statement. Args are same as for FUNCTION_PROLOGUE. */
1883:
1884: #define FUNCTION_EPILOGUE(FILE, SIZE) function_epilogue(FILE, SIZE)
1885:
1886: /* Define the number of delay slots needed for the function epilogue.
1887:
1888: On the mips, we need a slot if either no stack has been allocated,
1889: or the only register saved is the return register. */
1890:
1891: #define DELAY_SLOTS_FOR_EPILOGUE mips_epilogue_delay_slots ()
1892:
1893: /* Define whether INSN can be placed in delay slot N for the epilogue.
1894: No references to the stack must be made, since on the MIPS, the
1895: delay slot is done after the stack has been cleaned up. */
1896:
1897: #define ELIGIBLE_FOR_EPILOGUE_DELAY(INSN,N) \
1898: (get_attr_dslot (INSN) == DSLOT_NO \
1899: && get_attr_length (INSN) == 1 \
1900: && ! epilogue_reg_mentioned_p (PATTERN (INSN)))
1901:
1902: /* Tell prologue and epilogue if register REGNO should be saved / restored. */
1903:
1904: #define MUST_SAVE_REGISTER(regno) \
1905: ((regs_ever_live[regno] && !call_used_regs[regno]) \
1906: || (regno == FRAME_POINTER_REGNUM && frame_pointer_needed) \
1907: || (regno == (GP_REG_FIRST + 31) && regs_ever_live[GP_REG_FIRST + 31]))
1908:
1909: /* ALIGN FRAMES on double word boundaries */
1910:
1911: #define MIPS_STACK_ALIGN(LOC) (((LOC)+7) & ~7)
1912:
1913:
1914: /* Output assembler code to FILE to increment profiler label # LABELNO
1915: for profiling a function entry. */
1916:
1917: #define FUNCTION_PROFILER(FILE, LABELNO) \
1918: { \
1919: fprintf (FILE, "\t.set\tnoreorder\n"); \
1920: fprintf (FILE, "\t.set\tnoat\n"); \
1921: fprintf (FILE, "\tmove\t%s,%s\t\t# save current return address\n", \
1922: reg_names[GP_REG_FIRST + 1], reg_names[GP_REG_FIRST + 31]); \
1923: fprintf (FILE, "\tjal\t_mcount\n"); \
1924: fprintf (FILE, "\tsubu\t%s,%s,8\t\t# _mcount pops 2 words from stack\n", \
1925: reg_names[STACK_POINTER_REGNUM], \
1926: reg_names[STACK_POINTER_REGNUM]); \
1927: fprintf (FILE, "\t.set\treorder\n"); \
1928: fprintf (FILE, "\t.set\tat\n"); \
1929: }
1930:
1931: /* Define this macro if the code for function profiling should come
1932: before the function prologue. Normally, the profiling code comes
1933: after. */
1934:
1935: /* #define PROFILE_BEFORE_PROLOGUE */
1936:
1937: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1938: the stack pointer does not matter. The value is tested only in
1939: functions that have frame pointers.
1940: No definition is equivalent to always zero. */
1941:
1942: #define EXIT_IGNORE_STACK 1
1943:
1944:
1945: /* A C statement to output, on the stream FILE, assembler code for a
1946: block of data that contains the constant parts of a trampoline.
1947: This code should not include a label--the label is taken care of
1948: automatically. */
1949:
1950: #define TRAMPOLINE_TEMPLATE(STREAM) \
1951: { \
1952: fprintf (STREAM, "\t.word\t0x03e00821\t\t# move $1,$31\n"); \
1953: fprintf (STREAM, "\t.word\t0x04110001\t\t# bgezal $0,.+8\n"); \
1954: fprintf (STREAM, "\t.word\t0x00000000\t\t# nop\n"); \
1955: fprintf (STREAM, "\t.word\t0x8fe30010\t\t# lw $3,16($31)\n"); \
1956: fprintf (STREAM, "\t.word\t0x8fe20014\t\t# lw $2,20($31)\n"); \
1957: fprintf (STREAM, "\t.word\t0x00600008\t\t# jr $3\n"); \
1958: fprintf (STREAM, "\t.word\t0x0020f821\t\t# move $31,$1\n"); \
1959: fprintf (STREAM, "\t.word\t0x00000000\t\t# <function address>\n"); \
1960: fprintf (STREAM, "\t.word\t0x00000000\t\t# <static chain value>\n"); \
1961: }
1962:
1963: /* A C expression for the size in bytes of the trampoline, as an
1964: integer. */
1965:
1966: #define TRAMPOLINE_SIZE (9*4)
1967:
1968: /* Alignment required for trampolines, in bits.
1969:
1970: If you don't define this macro, the value of `BIGGEST_ALIGNMENT'
1971: is used for aligning trampolines. */
1972:
1973: /* #define TRAMPOLINE_ALIGNMENT 32 */
1974:
1975: /* A C statement to initialize the variable parts of a trampoline.
1976: ADDR is an RTX for the address of the trampoline; FNADDR is an
1977: RTX for the address of the nested function; STATIC_CHAIN is an
1978: RTX for the static chain value that should be passed to the
1979: function when it is called. */
1980:
1981: #ifndef INITIALIZE_TRAMPOLINE
1982: #define INITIALIZE_TRAMPOLINE(ADDR, FUNC, CHAIN) \
1983: { \
1984: rtx addr = ADDR; \
1985: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 28)), FUNC); \
1986: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 32)), CHAIN); \
1987: \
1988: /* Attempt to make stack executable */ \
1989: emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "__enable_execute_stack"), \
1990: 0, VOIDmode, 1, addr, Pmode); \
1991: }
1992: #endif /* INITIALIZE_TRAMPOLINE */
1993:
1994:
1995: /* Attempt to turn on access permissions for the stack. */
1996:
1997: #ifndef TRANSFER_FROM_TRAMPOLINE
1998: #define TRANSFER_FROM_TRAMPOLINE \
1999: \
2000: void \
2001: __enable_execute_stack (addr) \
2002: char *addr; \
2003: { \
2004: int size = getpagesize (); \
2005: int mask = ~(size-1); \
2006: char *page = (char *) (((int) addr) & mask); \
2007: char *end = (char *) ((((int) (addr + TRAMPOLINE_SIZE)) & mask) + size); \
2008: \
2009: /* 7 is PROT_READ | PROT_WRITE | PROT_EXEC */ \
2010: if (mprotect (page, end - page, 7) < 0) \
2011: perror ("mprotect of trampoline code"); \
2012: \
2013: /* \
2014: if (cacheflush (addr, TRAMPOLINE_SIZE, 1) < 0) \
2015: perror ("cacheflush of trampoline code"); \
2016: */ \
2017: }
2018: #endif /* TRANSFER_FROM_TRAMPOLINE */
2019:
2020:
2021: /* Addressing modes, and classification of registers for them. */
2022:
2023: /* #define HAVE_POST_INCREMENT */
2024: /* #define HAVE_POST_DECREMENT */
2025:
2026: /* #define HAVE_PRE_DECREMENT */
2027: /* #define HAVE_PRE_INCREMENT */
2028:
2029: /* These assume that REGNO is a hard or pseudo reg number.
2030: They give nonzero only if REGNO is a hard reg of the suitable class
2031: or a pseudo reg currently allocated to a suitable hard reg.
2032: These definitions are NOT overridden anywhere. */
2033:
2034: #define GP_REG_OR_PSEUDO_STRICT_P(regno) \
2035: GP_REG_P((regno < FIRST_PSEUDO_REGISTER) ? regno : reg_renumber[regno])
2036:
2037: #define GP_REG_OR_PSEUDO_NONSTRICT_P(regno) \
2038: (((regno) >= FIRST_PSEUDO_REGISTER) || (GP_REG_P (regno)))
2039:
2040: #define REGNO_OK_FOR_INDEX_P(regno) GP_REG_OR_PSEUDO_STRICT_P (regno)
2041: #define REGNO_OK_FOR_BASE_P(regno) GP_REG_OR_PSEUDO_STRICT_P (regno)
2042:
2043: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
2044: and check its validity for a certain class.
2045: We have two alternate definitions for each of them.
2046: The usual definition accepts all pseudo regs; the other rejects them all.
2047: The symbol REG_OK_STRICT causes the latter definition to be used.
2048:
2049: Most source files want to accept pseudo regs in the hope that
2050: they will get allocated to the class that the insn wants them to be in.
2051: Some source files that are used after register allocation
2052: need to be strict. */
2053:
2054: #ifndef REG_OK_STRICT
2055:
2056: #define REG_OK_STRICT_P 0
2057: #define REG_OK_FOR_INDEX_P(X) GP_REG_OR_PSEUDO_NONSTRICT_P (REGNO (X))
2058: #define REG_OK_FOR_BASE_P(X) GP_REG_OR_PSEUDO_NONSTRICT_P (REGNO (X))
2059:
2060: #else
2061:
2062: #define REG_OK_STRICT_P 1
2063: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
2064: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
2065:
2066: #endif
2067:
2068:
2069: /* Maximum number of registers that can appear in a valid memory address. */
2070:
2071: #define MAX_REGS_PER_ADDRESS 1
2072:
2073: /* A C compound statement with a conditional `goto LABEL;' executed
2074: if X (an RTX) is a legitimate memory address on the target
2075: machine for a memory operand of mode MODE.
2076:
2077: It usually pays to define several simpler macros to serve as
2078: subroutines for this one. Otherwise it may be too complicated
2079: to understand.
2080:
2081: This macro must exist in two variants: a strict variant and a
2082: non-strict one. The strict variant is used in the reload pass.
2083: It must be defined so that any pseudo-register that has not been
2084: allocated a hard register is considered a memory reference. In
2085: contexts where some kind of register is required, a
2086: pseudo-register with no hard register must be rejected.
2087:
2088: The non-strict variant is used in other passes. It must be
2089: defined to accept all pseudo-registers in every context where
2090: some kind of register is required.
2091:
2092: Compiler source files that want to use the strict variant of
2093: this macro define the macro `REG_OK_STRICT'. You should use an
2094: `#ifdef REG_OK_STRICT' conditional to define the strict variant
2095: in that case and the non-strict variant otherwise.
2096:
2097: Typically among the subroutines used to define
2098: `GO_IF_LEGITIMATE_ADDRESS' are subroutines to check for
2099: acceptable registers for various purposes (one for base
2100: registers, one for index registers, and so on). Then only these
2101: subroutine macros need have two variants; the higher levels of
2102: macros may be the same whether strict or not.
2103:
2104: Normally, constant addresses which are the sum of a `symbol_ref'
2105: and an integer are stored inside a `const' RTX to mark them as
2106: constant. Therefore, there is no need to recognize such sums
2107: specifically as legitimate addresses. Normally you would simply
2108: recognize any `const' as legitimate.
2109:
2110: Usually `PRINT_OPERAND_ADDRESS' is not prepared to handle
2111: constant sums that are not marked with `const'. It assumes
2112: that a naked `plus' indicates indexing. If so, then you *must*
2113: reject such naked constant sums as illegitimate addresses, so
2114: that none of them will be given to `PRINT_OPERAND_ADDRESS'.
2115:
2116: On some machines, whether a symbolic address is legitimate
2117: depends on the section that the address refers to. On these
2118: machines, define the macro `ENCODE_SECTION_INFO' to store the
2119: information into the `symbol_ref', and then check for it here.
2120: When you see a `const', you will have to look inside it to find
2121: the `symbol_ref' in order to determine the section. */
2122:
2123: #if 1
2124: #define GO_PRINTF(x) trace(x)
2125: #define GO_PRINTF2(x,y) trace(x,y)
2126: #define GO_DEBUG_RTX(x) debug_rtx(x)
2127:
2128: #else
2129: #define GO_PRINTF(x)
2130: #define GO_PRINTF2(x,y)
2131: #define GO_DEBUG_RTX(x)
2132: #endif
2133:
2134: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
2135: { \
2136: register rtx xinsn = (X); \
2137: \
2138: if (TARGET_DEBUG_B_MODE) \
2139: { \
2140: GO_PRINTF2 ("\n========== GO_IF_LEGITIMATE_ADDRESS, %sstrict\n", \
2141: (REG_OK_STRICT_P) ? "" : "not "); \
2142: GO_DEBUG_RTX (xinsn); \
2143: } \
2144: \
2145: if (GET_CODE (xinsn) == REG && REG_OK_FOR_BASE_P (xinsn)) \
2146: goto ADDR; \
2147: \
2148: if (CONSTANT_ADDRESS_P (xinsn)) \
2149: goto ADDR; \
2150: \
2151: if (GET_CODE (xinsn) == PLUS) \
2152: { \
2153: register rtx xplus0 = XEXP (xinsn, 0); \
2154: register rtx xplus1 = XEXP (xinsn, 1); \
2155: register enum rtx_code code0 = GET_CODE (xplus0); \
2156: register enum rtx_code code1 = GET_CODE (xplus1); \
2157: \
2158: if (code0 != REG && code1 == REG) \
2159: { \
2160: xplus0 = XEXP (xinsn, 1); \
2161: xplus1 = XEXP (xinsn, 0); \
2162: code0 = GET_CODE (xplus0); \
2163: code1 = GET_CODE (xplus1); \
2164: } \
2165: \
2166: if (code0 == REG && REG_OK_FOR_BASE_P (xplus0)) \
2167: { \
2168: if (code1 == CONST_INT) \
2169: { \
2170: register unsigned adj_offset = INTVAL (xplus1) + 0x8000; \
2171: \
2172: if ((adj_offset <= 0xffff) \
2173: && (adj_offset + GET_MODE_SIZE (MODE) - 1 <= 0xffff)) \
2174: goto ADDR; \
2175: } \
2176: \
2177: /* For some code sequences, you actually get better code by \
2178: pretending that the MIPS supports an address mode of a \
2179: constant address + a register, even though the real \
2180: machine doesn't support it. This is because the \
2181: assembler can use $r1 to load just the high 16 bits, add \
2182: in the register, and fold the low 16 bits into the memory \
2183: reference, whereas the compiler generates a 4 instruction \
2184: sequence. On the other hand, CSE is not as effective. \
2185: It would be a win to generate the lui directly, but the \
2186: MIPS assembler does not have syntax to generate the \
2187: appropriate relocation. */ \
2188: \
2189: else if (!TARGET_DEBUG_A_MODE \
2190: && code0 == REG \
2191: && CONSTANT_ADDRESS_P (xplus1)) \
2192: goto ADDR; \
2193: } \
2194: } \
2195: \
2196: if (TARGET_DEBUG_B_MODE) \
2197: GO_PRINTF ("Not a legitimate address\n"); \
2198: }
2199:
2200:
2201: /* A C expression that is 1 if the RTX X is a constant which is a
2202: valid address. This is defined to be the same as `CONSTANT_P (X)',
2203: but rejecting CONST_DOUBLE. */
2204: #define CONSTANT_ADDRESS_P(X) \
2205: ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
2206: || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
2207: || GET_CODE (X) == HIGH) && (!HALF_PIC_P () || !HALF_PIC_ADDRESS_P (X)))
2208:
2209:
2210: /* Nonzero if the constant value X is a legitimate general operand.
2211: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
2212:
2213: At present, GAS doesn't understand li.[sd], so don't allow it
2214: to be generated at present. Also, the MIPS assembler does not
2215: grok li.d Infinity. */
2216:
2217: #define LEGITIMATE_CONSTANT_P(X) \
2218: (GET_CODE (X) != CONST_DOUBLE || mips_const_double_ok (X, GET_MODE (X)))
2219:
2220:
2221: /* A C compound statement that attempts to replace X with a valid
2222: memory address for an operand of mode MODE. WIN will be a C
2223: statement label elsewhere in the code; the macro definition may
2224: use
2225:
2226: GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN);
2227:
2228: to avoid further processing if the address has become legitimate.
2229:
2230: X will always be the result of a call to `break_out_memory_refs',
2231: and OLDX will be the operand that was given to that function to
2232: produce X.
2233:
2234: The code generated by this macro should not alter the
2235: substructure of X. If it transforms X into a more legitimate
2236: form, it should assign X (which will always be a C variable) a
2237: new value.
2238:
2239: It is not necessary for this macro to come up with a legitimate
2240: address. The compiler has standard ways of doing so in all
2241: cases. In fact, it is safe for this macro to do nothing. But
2242: often a machine-dependent strategy can generate better code.
2243:
2244: For the MIPS, transform:
2245:
2246: memory(X + <large int>)
2247:
2248: into:
2249:
2250: Y = <large int> & ~0x7fff;
2251: Z = X + Y
2252: memory (Z + (<large int> & 0x7fff));
2253:
2254: This is for CSE to find several similar references, and only use one Z. */
2255:
2256: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
2257: { \
2258: register rtx xinsn = (X); \
2259: \
2260: if (TARGET_DEBUG_B_MODE) \
2261: { \
2262: GO_PRINTF ("\n========== LEGITIMIZE_ADDRESS\n"); \
2263: GO_DEBUG_RTX (xinsn); \
2264: } \
2265: \
2266: if (GET_CODE (xinsn) == PLUS) \
2267: { \
2268: register rtx xplus0 = XEXP (xinsn, 0); \
2269: register rtx xplus1 = XEXP (xinsn, 1); \
2270: register enum rtx_code code0 = GET_CODE (xplus0); \
2271: register enum rtx_code code1 = GET_CODE (xplus1); \
2272: \
2273: if (code0 != REG && code1 == REG) \
2274: { \
2275: xplus0 = XEXP (xinsn, 1); \
2276: xplus1 = XEXP (xinsn, 0); \
2277: code0 = GET_CODE (xplus0); \
2278: code1 = GET_CODE (xplus1); \
2279: } \
2280: \
2281: if (code0 == REG && REG_OK_FOR_BASE_P (xplus0) \
2282: && code1 == CONST_INT && !SMALL_INT (xplus1)) \
2283: { \
2284: rtx int_reg = gen_reg_rtx (Pmode); \
2285: rtx ptr_reg = gen_reg_rtx (Pmode); \
2286: \
2287: emit_move_insn (int_reg, \
2288: GEN_INT (INTVAL (xplus1) & ~ 0x7fff)); \
2289: \
2290: emit_insn (gen_rtx (SET, VOIDmode, \
2291: ptr_reg, \
2292: gen_rtx (PLUS, Pmode, xplus0, int_reg))); \
2293: \
2294: X = gen_rtx (PLUS, Pmode, ptr_reg, \
2295: GEN_INT (INTVAL (xplus1) & 0x7fff)); \
2296: goto WIN; \
2297: } \
2298: } \
2299: \
2300: if (TARGET_DEBUG_B_MODE) \
2301: GO_PRINTF ("LEGITIMIZE_ADDRESS could not fix.\n"); \
2302: }
2303:
2304:
2305: /* A C statement or compound statement with a conditional `goto
2306: LABEL;' executed if memory address X (an RTX) can have different
2307: meanings depending on the machine mode of the memory reference it
2308: is used for.
2309:
2310: Autoincrement and autodecrement addresses typically have
2311: mode-dependent effects because the amount of the increment or
2312: decrement is the size of the operand being addressed. Some
2313: machines have other mode-dependent addresses. Many RISC machines
2314: have no mode-dependent addresses.
2315:
2316: You may assume that ADDR is a valid address for the machine. */
2317:
2318: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {}
2319:
2320:
2321: /* Define this macro if references to a symbol must be treated
2322: differently depending on something about the variable or
2323: function named by the symbol (such as what section it is in).
2324:
2325: The macro definition, if any, is executed immediately after the
2326: rtl for DECL has been created and stored in `DECL_RTL (DECL)'.
2327: The value of the rtl will be a `mem' whose address is a
2328: `symbol_ref'.
2329:
2330: The usual thing for this macro to do is to a flag in the
2331: `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
2332: name string in the `symbol_ref' (if one bit is not enough
2333: information).
2334:
2335: The best way to modify the name string is by adding text to the
2336: beginning, with suitable punctuation to prevent any ambiguity.
2337: Allocate the new name in `saveable_obstack'. You will have to
2338: modify `ASM_OUTPUT_LABELREF' to remove and decode the added text
2339: and output the name accordingly.
2340:
2341: You can also check the information stored in the `symbol_ref' in
2342: the definition of `GO_IF_LEGITIMATE_ADDRESS' or
2343: `PRINT_OPERAND_ADDRESS'. */
2344:
2345: #define ENCODE_SECTION_INFO(DECL) \
2346: do \
2347: { \
2348: if (optimize && mips_section_threshold > 0 && TARGET_GP_OPT \
2349: && TREE_CODE (DECL) == VAR_DECL) \
2350: { \
2351: int size = int_size_in_bytes (TREE_TYPE (DECL)); \
2352: \
2353: if (size > 0 && size <= mips_section_threshold) \
2354: SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \
2355: } \
2356: \
2357: else if (HALF_PIC_P ()) \
2358: HALF_PIC_ENCODE (DECL); \
2359: } \
2360: while (0)
2361:
2362:
2363: /* Specify the machine mode that this machine uses
2364: for the index in the tablejump instruction. */
2365: #define CASE_VECTOR_MODE SImode
2366:
2367: /* Define this if the tablejump instruction expects the table
2368: to contain offsets from the address of the table.
2369: Do not define this if the table should contain absolute addresses. */
2370: /* #define CASE_VECTOR_PC_RELATIVE */
2371:
2372: /* Specify the tree operation to be used to convert reals to integers. */
2373: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
2374:
2375: /* This is the kind of divide that is easiest to do in the general case. */
2376: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
2377:
2378: /* Define this as 1 if `char' should by default be signed; else as 0. */
2379: #ifndef DEFAULT_SIGNED_CHAR
2380: #define DEFAULT_SIGNED_CHAR 1
2381: #endif
2382:
2383: /* Max number of bytes we can move from memory to memory
2384: in one reasonably fast instruction. */
2385: #define MOVE_MAX 4
2386:
2387: /* Define this macro as a C expression which is nonzero if
2388: accessing less than a word of memory (i.e. a `char' or a
2389: `short') is no faster than accessing a word of memory, i.e., if
2390: such access require more than one instruction or if there is no
2391: difference in cost between byte and (aligned) word loads.
2392:
2393: On RISC machines, it tends to generate better code to define
2394: this as 1, since it avoids making a QI or HI mode register. */
2395: #define SLOW_BYTE_ACCESS 1
2396:
2397: /* We assume that the store-condition-codes instructions store 0 for false
2398: and some other value for true. This is the value stored for true. */
2399:
2400: #define STORE_FLAG_VALUE 1
2401:
2402: /* Define this if zero-extension is slow (more than one real instruction). */
2403: #define SLOW_ZERO_EXTEND
2404:
2405: /* Define if shifts truncate the shift count
2406: which implies one can omit a sign-extension or zero-extension
2407: of a shift count.
2408:
2409: Only 5 bits are used in SLLV and SRLV */
2410:
2411: #define SHIFT_COUNT_TRUNCATED
2412:
2413: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
2414: is done just by pretending it is already truncated. */
2415: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
2416:
2417: /* Define this macro to control use of the character `$' in
2418: identifier names. The value should be 0, 1, or 2. 0 means `$'
2419: is not allowed by default; 1 means it is allowed by default if
2420: `-traditional' is used; 2 means it is allowed by default provided
2421: `-ansi' is not used. 1 is the default; there is no need to
2422: define this macro in that case. */
2423:
2424: #ifndef DOLLARS_IN_IDENTIFIERS
2425: #define DOLLARS_IN_IDENTIFIERS 1
2426: #endif
2427:
2428: /* Specify the machine mode that pointers have.
2429: After generation of rtl, the compiler makes no further distinction
2430: between pointers and any other objects of this machine mode. */
2431: #define Pmode SImode
2432:
2433: /* A function address in a call instruction
2434: is a word address (for indexing purposes)
2435: so give the MEM rtx a words's mode. */
2436:
2437: #define FUNCTION_MODE SImode
2438:
2439: /* Define TARGET_MEM_FUNCTIONS if we want to use calls to memcpy and
2440: memset, instead of the BSD functions bcopy and bzero. */
2441:
2442: #if defined(MIPS_SYSV) || defined(OSF_OS)
2443: #define TARGET_MEM_FUNCTIONS
2444: #endif
2445:
2446:
2447: /* A part of a C `switch' statement that describes the relative
2448: costs of constant RTL expressions. It must contain `case'
2449: labels for expression codes `const_int', `const', `symbol_ref',
2450: `label_ref' and `const_double'. Each case must ultimately reach
2451: a `return' statement to return the relative cost of the use of
2452: that kind of constant value in an expression. The cost may
2453: depend on the precise value of the constant, which is available
2454: for examination in X.
2455:
2456: CODE is the expression code--redundant, since it can be obtained
2457: with `GET_CODE (X)'. */
2458:
2459: #define CONST_COSTS(X,CODE,OUTER_CODE) \
2460: case CONST_INT: \
2461: /* Always return 0, since we don't have different sized \
2462: instructions, hence different costs according to Richard \
2463: Kenner */ \
2464: return COSTS_N_INSNS (0); \
2465: \
2466: case LABEL_REF: \
2467: return COSTS_N_INSNS (2); \
2468: \
2469: case CONST: \
2470: { \
2471: rtx offset = const0_rtx; \
2472: rtx symref = eliminate_constant_term (X, &offset); \
2473: \
2474: if (GET_CODE (symref) == LABEL_REF) \
2475: return COSTS_N_INSNS (2); \
2476: \
2477: if (GET_CODE (symref) != SYMBOL_REF) \
2478: return COSTS_N_INSNS (4); \
2479: \
2480: /* let's be paranoid.... */ \
2481: if (INTVAL (offset) < -32768 || INTVAL (offset) > 32767) \
2482: return COSTS_N_INSNS (2); \
2483: \
2484: return COSTS_N_INSNS (SYMBOL_REF_FLAG (symref) ? 1 : 2); \
2485: } \
2486: \
2487: case SYMBOL_REF: \
2488: return COSTS_N_INSNS (SYMBOL_REF_FLAG (X) ? 1 : 2); \
2489: \
2490: case CONST_DOUBLE: \
2491: return COSTS_N_INSNS ((CONST_DOUBLE_HIGH (X) == 0 \
2492: && CONST_DOUBLE_LOW (X)) ? 2 : 4);
2493:
2494:
2495: /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
2496: This can be used, for example, to indicate how costly a multiply
2497: instruction is. In writing this macro, you can use the construct
2498: `COSTS_N_INSNS (N)' to specify a cost equal to N fast instructions.
2499:
2500: This macro is optional; do not define it if the default cost
2501: assumptions are adequate for the target machine.
2502:
2503: If -mdebugd is used, change the multiply cost to 2, so multiply by
2504: a constant isn't converted to a series of shifts. This helps
2505: strength reduction, and also makes it easier to identify what the
2506: compiler is doing. */
2507:
2508: #define RTX_COSTS(X,CODE,OUTER_CODE) \
2509: case MEM: \
2510: { \
2511: int num_words = (GET_MODE_SIZE (GET_MODE (X)) > UNITS_PER_WORD) ? 2 : 1; \
2512: if (simple_memory_operand (X, GET_MODE (X))) \
2513: return COSTS_N_INSNS (num_words); \
2514: \
2515: return COSTS_N_INSNS (2*num_words); \
2516: } \
2517: \
2518: case FFS: \
2519: return COSTS_N_INSNS (6); \
2520: \
2521: case NOT: \
2522: return COSTS_N_INSNS ((GET_MODE (X) == DImode) ? 2 : 1); \
2523: \
2524: case AND: \
2525: case IOR: \
2526: case XOR: \
2527: if (GET_MODE (X) == DImode) \
2528: return COSTS_N_INSNS (2); \
2529: \
2530: if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
2531: { \
2532: rtx number = XEXP (X, 1); \
2533: if (SMALL_INT_UNSIGNED (number)) \
2534: return COSTS_N_INSNS (1); \
2535: \
2536: else if (SMALL_INT (number)) \
2537: return COSTS_N_INSNS (2); \
2538: \
2539: return COSTS_N_INSNS (3); \
2540: } \
2541: \
2542: return COSTS_N_INSNS (1); \
2543: \
2544: case ASHIFT: \
2545: case ASHIFTRT: \
2546: case LSHIFT: \
2547: case LSHIFTRT: \
2548: if (GET_MODE (X) == DImode) \
2549: return COSTS_N_INSNS ((GET_CODE (XEXP (X, 1)) == CONST_INT) ? 12 : 4); \
2550: \
2551: return COSTS_N_INSNS (1); \
2552: \
2553: case ABS: \
2554: { \
2555: enum machine_mode xmode = GET_MODE (X); \
2556: if (xmode == SFmode || xmode == DFmode) \
2557: return COSTS_N_INSNS (1); \
2558: \
2559: return COSTS_N_INSNS (4); \
2560: } \
2561: \
2562: case PLUS: \
2563: case MINUS: \
2564: { \
2565: enum machine_mode xmode = GET_MODE (X); \
2566: if (xmode == SFmode || xmode == DFmode) \
2567: return COSTS_N_INSNS (2); \
2568: \
2569: if (xmode == DImode) \
2570: return COSTS_N_INSNS (4); \
2571: \
2572: return COSTS_N_INSNS (1); \
2573: } \
2574: \
2575: case NEG: \
2576: return COSTS_N_INSNS ((GET_MODE (X) == DImode) ? 4 : 1); \
2577: \
2578: case MULT: \
2579: { \
2580: enum machine_mode xmode = GET_MODE (X); \
2581: if (xmode == SFmode) \
2582: return COSTS_N_INSNS (4); \
2583: \
2584: if (xmode == DFmode) \
2585: return COSTS_N_INSNS (5); \
2586: \
2587: return COSTS_N_INSNS (12); \
2588: } \
2589: \
2590: case DIV: \
2591: case MOD: \
2592: { \
2593: enum machine_mode xmode = GET_MODE (X); \
2594: if (xmode == SFmode) \
2595: return COSTS_N_INSNS (12); \
2596: \
2597: if (xmode == DFmode) \
2598: return COSTS_N_INSNS (19); \
2599: } \
2600: /* fall through */ \
2601: \
2602: case UDIV: \
2603: case UMOD: \
2604: return COSTS_N_INSNS (35);
2605:
2606: /* An expression giving the cost of an addressing mode that
2607: contains ADDRESS. If not defined, the cost is computed from the
2608: form of the ADDRESS expression and the `CONST_COSTS' values.
2609:
2610: For most CISC machines, the default cost is a good approximation
2611: of the true cost of the addressing mode. However, on RISC
2612: machines, all instructions normally have the same length and
2613: execution time. Hence all addresses will have equal costs.
2614:
2615: In cases where more than one form of an address is known, the
2616: form with the lowest cost will be used. If multiple forms have
2617: the same, lowest, cost, the one that is the most complex will be
2618: used.
2619:
2620: For example, suppose an address that is equal to the sum of a
2621: register and a constant is used twice in the same basic block.
2622: When this macro is not defined, the address will be computed in
2623: a register and memory references will be indirect through that
2624: register. On machines where the cost of the addressing mode
2625: containing the sum is no higher than that of a simple indirect
2626: reference, this will produce an additional instruction and
2627: possibly require an additional register. Proper specification
2628: of this macro eliminates this overhead for such machines.
2629:
2630: Similar use of this macro is made in strength reduction of loops.
2631:
2632: ADDRESS need not be valid as an address. In such a case, the
2633: cost is not relevant and can be any value; invalid addresses
2634: need not be assigned a different cost.
2635:
2636: On machines where an address involving more than one register is
2637: as cheap as an address computation involving only one register,
2638: defining `ADDRESS_COST' to reflect this can cause two registers
2639: to be live over a region of code where only one would have been
2640: if `ADDRESS_COST' were not defined in that manner. This effect
2641: should be considered in the definition of this macro.
2642: Equivalent costs should probably only be given to addresses with
2643: different numbers of registers on machines with lots of registers.
2644:
2645: This macro will normally either not be defined or be defined as
2646: a constant. */
2647:
2648: #define ADDRESS_COST(ADDR) (REG_P (ADDR) ? 1 : mips_address_cost (ADDR))
2649:
2650: /* A C expression for the cost of moving data from a register in
2651: class FROM to one in class TO. The classes are expressed using
2652: the enumeration values such as `GENERAL_REGS'. A value of 2 is
2653: the default; other values are interpreted relative to that.
2654:
2655: It is not required that the cost always equal 2 when FROM is the
2656: same as TO; on some machines it is expensive to move between
2657: registers if they are not general registers.
2658:
2659: If reload sees an insn consisting of a single `set' between two
2660: hard registers, and if `REGISTER_MOVE_COST' applied to their
2661: classes returns a value of 2, reload does not check to ensure
2662: that the constraints of the insn are met. Setting a cost of
2663: other than 2 will allow reload to verify that the constraints are
2664: met. You should do this if the `movM' pattern's constraints do
2665: not allow such copying. */
2666:
2667: #define REGISTER_MOVE_COST(FROM, TO) 4 /* force reload to use constraints */
2668:
2669: /* A C expression for the cost of a branch instruction. A value of
2670: 1 is the default; other values are interpreted relative to that. */
2671:
2672: #define BRANCH_COST \
2673: ((mips_cpu == PROCESSOR_R4000 || mips_cpu == PROCESSOR_R6000) ? 2 : 1)
2674:
2675:
2676: /* Used in by the peephole code. */
2677: #define classify_op(op,mode) (mips_rtx_classify[ (int)GET_CODE (op) ])
2678: #define additive_op(op,mode) ((classify_op (op,mode) & CLASS_ADD_OP) != 0)
2679: #define divmod_op(op,mode) ((classify_op (op,mode) & CLASS_DIVMOD_OP) != 0)
2680: #define unsigned_op(op,mode) ((classify_op (op,mode) & CLASS_UNSIGNED_OP) != 0)
2681:
2682: #define CLASS_ADD_OP 0x01 /* operator is PLUS/MINUS */
2683: #define CLASS_DIVMOD_OP 0x02 /* operator is {,U}{DIV,MOD} */
2684: #define CLASS_UNSIGNED_OP 0x04 /* operator is U{DIV,MOD} */
2685: #define CLASS_CMP_OP 0x08 /* operator is comparison */
2686: #define CLASS_EQUALITY_OP 0x10 /* operator is == or != */
2687: #define CLASS_FCMP_OP 0x08 /* operator is fp. compare */
2688:
2689: #define CLASS_UNS_CMP_OP (CLASS_UNSIGNED_OP | CLASS_CMP_OP)
2690:
2691:
2692: /* Optionally define this if you have added predicates to
2693: `MACHINE.c'. This macro is called within an initializer of an
2694: array of structures. The first field in the structure is the
2695: name of a predicate and the second field is an array of rtl
2696: codes. For each predicate, list all rtl codes that can be in
2697: expressions matched by the predicate. The list should have a
2698: trailing comma. Here is an example of two entries in the list
2699: for a typical RISC machine:
2700:
2701: #define PREDICATE_CODES \
2702: {"gen_reg_rtx_operand", {SUBREG, REG}}, \
2703: {"reg_or_short_cint_operand", {SUBREG, REG, CONST_INT}},
2704:
2705: Defining this macro does not affect the generated code (however,
2706: incorrect definitions that omit an rtl code that may be matched
2707: by the predicate can cause the compiler to malfunction).
2708: Instead, it allows the table built by `genrecog' to be more
2709: compact and efficient, thus speeding up the compiler. The most
2710: important predicates to include in the list specified by this
2711: macro are thoses used in the most insn patterns. */
2712:
2713: #define PREDICATE_CODES \
2714: {"uns_arith_operand", { REG, CONST_INT, SUBREG }}, \
2715: {"arith_operand", { REG, CONST_INT, SUBREG }}, \
2716: {"arith32_operand", { REG, CONST_INT, SUBREG }}, \
2717: {"reg_or_0_operand", { REG, CONST_INT, SUBREG }}, \
2718: {"small_int", { CONST_INT }}, \
2719: {"large_int", { CONST_INT }}, \
2720: {"md_register_operand", { REG }}, \
2721: {"mips_const_double_ok", { CONST_DOUBLE }}, \
2722: {"simple_memory_operand", { MEM, SUBREG }}, \
2723: {"equality_op", { EQ, NE }}, \
2724: {"cmp_op", { EQ, NE, GT, GE, GTU, GEU, LT, LE, \
2725: LTU, LEU }}, \
2726: {"cmp2_op", { EQ, NE, GT, GE, GTU, GEU, LT, LE, \
2727: LTU, LEU }}, \
2728: {"fcmp_op", { EQ, NE, GT, GE, LT, LE }}, \
2729: {"uns_cmp_op", { GTU, GEU, LTU, LEU }},
2730:
2731:
2732: /* If defined, a C statement to be executed just prior to the
2733: output of assembler code for INSN, to modify the extracted
2734: operands so they will be output differently.
2735:
2736: Here the argument OPVEC is the vector containing the operands
2737: extracted from INSN, and NOPERANDS is the number of elements of
2738: the vector which contain meaningful data for this insn. The
2739: contents of this vector are what will be used to convert the
2740: insn template into assembler code, so you can change the
2741: assembler output by changing the contents of the vector.
2742:
2743: We use it to check if the current insn needs a nop in front of it
2744: because of load delays, and also to update the delay slot
2745: statistics. */
2746:
2747: #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \
2748: final_prescan_insn (INSN, OPVEC, NOPERANDS)
2749:
2750:
2751: /* Tell final.c how to eliminate redundant test instructions.
2752: Here we define machine-dependent flags and fields in cc_status
2753: (see `conditions.h'). */
2754:
2755: /* A C compound statement to set the components of `cc_status'
2756: appropriately for an insn INSN whose body is EXP. It is this
2757: macro's responsibility to recognize insns that set the condition
2758: code as a byproduct of other activity as well as those that
2759: explicitly set `(cc0)'.
2760:
2761: This macro is not used on machines that do not use `cc0'. */
2762:
2763: #define NOTICE_UPDATE_CC(EXP, INSN) \
2764: do \
2765: { \
2766: enum attr_type type = get_attr_type (INSN); \
2767: if (type == TYPE_ICMP || type == TYPE_FCMP) \
2768: CC_STATUS_INIT; \
2769: } \
2770: while (0)
2771:
2772: /* A list of names to be used for additional modes for condition code
2773: values in registers. These names are added to `enum machine_mode'
2774: and all have class `MODE_CC'. By convention, they should start
2775: with `CC' and end with `mode'.
2776:
2777: You should only define this macro if your machine does not use
2778: `cc0' and only if additional modes are required.
2779:
2780: On the MIPS, we use CC_FPmode for all floating point except for not
2781: equal, CC_REV_FPmode for not equal (to reverse the sense of the
2782: jump), CC_EQmode for integer equality/inequality comparisons,
2783: CC_0mode for comparisons against 0, and CCmode for other integer
2784: comparisons. */
2785:
2786: #define EXTRA_CC_MODES CC_EQmode, CC_FPmode, CC_0mode, CC_REV_FPmode
2787:
2788: /* A list of C strings giving the names for the modes listed in
2789: `EXTRA_CC_MODES'. */
2790:
2791: #define EXTRA_CC_NAMES "CC_EQ", "CC_FP", "CC_0", "CC_REV_FP"
2792:
2793: /* Returns a mode from class `MODE_CC' to be used when comparison
2794: operation code OP is applied to rtx X. */
2795:
2796: #define SELECT_CC_MODE(OP, X, Y) \
2797: (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
2798: ? SImode \
2799: : ((OP == NE) ? CC_REV_FPmode : CC_FPmode))
2800:
2801:
2802: /* Control the assembler format that we output. */
2803:
2804: /* Output at beginning of assembler file.
2805: If we are optimizing to use the global pointer, create a temporary
2806: file to hold all of the text stuff, and write it out to the end.
2807: This is needed because the MIPS assembler is evidently one pass,
2808: and if it hasn't seen the relevant .comm/.lcomm/.extern/.sdata
2809: declaration when the code is processed, it generates a two
2810: instruction sequence. */
2811:
2812: #define ASM_FILE_START(STREAM) mips_asm_file_start (STREAM)
2813:
2814: /* Output to assembler file text saying following lines
2815: may contain character constants, extra white space, comments, etc. */
2816:
2817: #define ASM_APP_ON " #APP\n"
2818:
2819: /* Output to assembler file text saying following lines
2820: no longer contain unusual constructs. */
2821:
2822: #define ASM_APP_OFF " #NO_APP\n"
2823:
2824: /* How to refer to registers in assembler output.
2825: This sequence is indexed by compiler's hard-register-number (see above).
2826:
2827: In order to support the two different conventions for register names,
2828: we use the name of a table set up in mips.c, which is overwritten
2829: if -mrnames is used. */
2830:
2831: #define REGISTER_NAMES \
2832: { \
2833: &mips_reg_names[ 0][0], \
2834: &mips_reg_names[ 1][0], \
2835: &mips_reg_names[ 2][0], \
2836: &mips_reg_names[ 3][0], \
2837: &mips_reg_names[ 4][0], \
2838: &mips_reg_names[ 5][0], \
2839: &mips_reg_names[ 6][0], \
2840: &mips_reg_names[ 7][0], \
2841: &mips_reg_names[ 8][0], \
2842: &mips_reg_names[ 9][0], \
2843: &mips_reg_names[10][0], \
2844: &mips_reg_names[11][0], \
2845: &mips_reg_names[12][0], \
2846: &mips_reg_names[13][0], \
2847: &mips_reg_names[14][0], \
2848: &mips_reg_names[15][0], \
2849: &mips_reg_names[16][0], \
2850: &mips_reg_names[17][0], \
2851: &mips_reg_names[18][0], \
2852: &mips_reg_names[19][0], \
2853: &mips_reg_names[20][0], \
2854: &mips_reg_names[21][0], \
2855: &mips_reg_names[22][0], \
2856: &mips_reg_names[23][0], \
2857: &mips_reg_names[24][0], \
2858: &mips_reg_names[25][0], \
2859: &mips_reg_names[26][0], \
2860: &mips_reg_names[27][0], \
2861: &mips_reg_names[28][0], \
2862: &mips_reg_names[29][0], \
2863: &mips_reg_names[30][0], \
2864: &mips_reg_names[31][0], \
2865: &mips_reg_names[32][0], \
2866: &mips_reg_names[33][0], \
2867: &mips_reg_names[34][0], \
2868: &mips_reg_names[35][0], \
2869: &mips_reg_names[36][0], \
2870: &mips_reg_names[37][0], \
2871: &mips_reg_names[38][0], \
2872: &mips_reg_names[39][0], \
2873: &mips_reg_names[40][0], \
2874: &mips_reg_names[41][0], \
2875: &mips_reg_names[42][0], \
2876: &mips_reg_names[43][0], \
2877: &mips_reg_names[44][0], \
2878: &mips_reg_names[45][0], \
2879: &mips_reg_names[46][0], \
2880: &mips_reg_names[47][0], \
2881: &mips_reg_names[48][0], \
2882: &mips_reg_names[49][0], \
2883: &mips_reg_names[50][0], \
2884: &mips_reg_names[51][0], \
2885: &mips_reg_names[52][0], \
2886: &mips_reg_names[53][0], \
2887: &mips_reg_names[54][0], \
2888: &mips_reg_names[55][0], \
2889: &mips_reg_names[56][0], \
2890: &mips_reg_names[57][0], \
2891: &mips_reg_names[58][0], \
2892: &mips_reg_names[59][0], \
2893: &mips_reg_names[60][0], \
2894: &mips_reg_names[61][0], \
2895: &mips_reg_names[62][0], \
2896: &mips_reg_names[63][0], \
2897: &mips_reg_names[64][0], \
2898: &mips_reg_names[65][0], \
2899: &mips_reg_names[66][0], \
2900: }
2901:
2902: /* print-rtl.c can't use REGISTER_NAMES, since it depends on mips.c.
2903: So define this for it. */
2904: #define DEBUG_REGISTER_NAMES \
2905: { \
2906: "$0", "at", "v0", "v1", "a0", "a1", "a2", "a3", \
2907: "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \
2908: "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
2909: "t8", "t9", "k0", "k1", "gp", "sp", "$fp", "ra", \
2910: "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", \
2911: "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
2912: "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", \
2913: "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", \
2914: "hi", "lo", "$fcr31" \
2915: }
2916:
2917: /* If defined, a C initializer for an array of structures
2918: containing a name and a register number. This macro defines
2919: additional names for hard registers, thus allowing the `asm'
2920: option in declarations to refer to registers using alternate
2921: names.
2922:
2923: We define both names for the integer registers here. */
2924:
2925: #define ADDITIONAL_REGISTER_NAMES \
2926: { \
2927: { "$0", 0 + GP_REG_FIRST }, \
2928: { "$1", 1 + GP_REG_FIRST }, \
2929: { "$2", 2 + GP_REG_FIRST }, \
2930: { "$3", 3 + GP_REG_FIRST }, \
2931: { "$4", 4 + GP_REG_FIRST }, \
2932: { "$5", 5 + GP_REG_FIRST }, \
2933: { "$6", 6 + GP_REG_FIRST }, \
2934: { "$7", 7 + GP_REG_FIRST }, \
2935: { "$8", 8 + GP_REG_FIRST }, \
2936: { "$9", 9 + GP_REG_FIRST }, \
2937: { "$10", 10 + GP_REG_FIRST }, \
2938: { "$11", 11 + GP_REG_FIRST }, \
2939: { "$12", 12 + GP_REG_FIRST }, \
2940: { "$13", 13 + GP_REG_FIRST }, \
2941: { "$14", 14 + GP_REG_FIRST }, \
2942: { "$15", 15 + GP_REG_FIRST }, \
2943: { "$16", 16 + GP_REG_FIRST }, \
2944: { "$17", 17 + GP_REG_FIRST }, \
2945: { "$18", 18 + GP_REG_FIRST }, \
2946: { "$19", 19 + GP_REG_FIRST }, \
2947: { "$20", 20 + GP_REG_FIRST }, \
2948: { "$21", 21 + GP_REG_FIRST }, \
2949: { "$22", 22 + GP_REG_FIRST }, \
2950: { "$23", 23 + GP_REG_FIRST }, \
2951: { "$24", 24 + GP_REG_FIRST }, \
2952: { "$25", 25 + GP_REG_FIRST }, \
2953: { "$26", 26 + GP_REG_FIRST }, \
2954: { "$27", 27 + GP_REG_FIRST }, \
2955: { "$28", 28 + GP_REG_FIRST }, \
2956: { "$29", 29 + GP_REG_FIRST }, \
2957: { "$30", 30 + GP_REG_FIRST }, \
2958: { "$31", 31 + GP_REG_FIRST }, \
2959: { "$sp", 29 + GP_REG_FIRST }, \
2960: { "$fp", 30 + GP_REG_FIRST }, \
2961: { "at", 1 + GP_REG_FIRST }, \
2962: { "v0", 2 + GP_REG_FIRST }, \
2963: { "v1", 3 + GP_REG_FIRST }, \
2964: { "a0", 4 + GP_REG_FIRST }, \
2965: { "a1", 5 + GP_REG_FIRST }, \
2966: { "a2", 6 + GP_REG_FIRST }, \
2967: { "a3", 7 + GP_REG_FIRST }, \
2968: { "t0", 8 + GP_REG_FIRST }, \
2969: { "t1", 9 + GP_REG_FIRST }, \
2970: { "t2", 10 + GP_REG_FIRST }, \
2971: { "t3", 11 + GP_REG_FIRST }, \
2972: { "t4", 12 + GP_REG_FIRST }, \
2973: { "t5", 13 + GP_REG_FIRST }, \
2974: { "t6", 14 + GP_REG_FIRST }, \
2975: { "t7", 15 + GP_REG_FIRST }, \
2976: { "s0", 16 + GP_REG_FIRST }, \
2977: { "s1", 17 + GP_REG_FIRST }, \
2978: { "s2", 18 + GP_REG_FIRST }, \
2979: { "s3", 19 + GP_REG_FIRST }, \
2980: { "s4", 20 + GP_REG_FIRST }, \
2981: { "s5", 21 + GP_REG_FIRST }, \
2982: { "s6", 22 + GP_REG_FIRST }, \
2983: { "s7", 23 + GP_REG_FIRST }, \
2984: { "t8", 24 + GP_REG_FIRST }, \
2985: { "t9", 25 + GP_REG_FIRST }, \
2986: { "k0", 26 + GP_REG_FIRST }, \
2987: { "k1", 27 + GP_REG_FIRST }, \
2988: { "gp", 28 + GP_REG_FIRST }, \
2989: { "sp", 29 + GP_REG_FIRST }, \
2990: { "fp", 30 + GP_REG_FIRST }, \
2991: { "ra", 31 + GP_REG_FIRST }, \
2992: { "$sp", 29 + GP_REG_FIRST }, \
2993: { "$fp", 30 + GP_REG_FIRST }, \
2994: { "cc", FPSW_REGNUM }, \
2995: }
2996:
2997: /* Define results of standard character escape sequences. */
2998: #define TARGET_BELL 007
2999: #define TARGET_BS 010
3000: #define TARGET_TAB 011
3001: #define TARGET_NEWLINE 012
3002: #define TARGET_VT 013
3003: #define TARGET_FF 014
3004: #define TARGET_CR 015
3005:
3006: /* A C compound statement to output to stdio stream STREAM the
3007: assembler syntax for an instruction operand X. X is an RTL
3008: expression.
3009:
3010: CODE is a value that can be used to specify one of several ways
3011: of printing the operand. It is used when identical operands
3012: must be printed differently depending on the context. CODE
3013: comes from the `%' specification that was used to request
3014: printing of the operand. If the specification was just `%DIGIT'
3015: then CODE is 0; if the specification was `%LTR DIGIT' then CODE
3016: is the ASCII code for LTR.
3017:
3018: If X is a register, this macro should print the register's name.
3019: The names can be found in an array `reg_names' whose type is
3020: `char *[]'. `reg_names' is initialized from `REGISTER_NAMES'.
3021:
3022: When the machine description has a specification `%PUNCT' (a `%'
3023: followed by a punctuation character), this macro is called with
3024: a null pointer for X and the punctuation character for CODE.
3025:
3026: See mips.c for the MIPS specific codes. */
3027:
3028: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
3029:
3030: /* A C expression which evaluates to true if CODE is a valid
3031: punctuation character for use in the `PRINT_OPERAND' macro. If
3032: `PRINT_OPERAND_PUNCT_VALID_P' is not defined, it means that no
3033: punctuation characters (except for the standard one, `%') are
3034: used in this way. */
3035:
3036: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) mips_print_operand_punct[CODE]
3037:
3038: /* A C compound statement to output to stdio stream STREAM the
3039: assembler syntax for an instruction operand that is a memory
3040: reference whose address is ADDR. ADDR is an RTL expression.
3041:
3042: On some machines, the syntax for a symbolic address depends on
3043: the section that the address refers to. On these machines,
3044: define the macro `ENCODE_SECTION_INFO' to store the information
3045: into the `symbol_ref', and then check for it here. */
3046:
3047: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
3048:
3049:
3050: /* A C statement, to be executed after all slot-filler instructions
3051: have been output. If necessary, call `dbr_sequence_length' to
3052: determine the number of slots filled in a sequence (zero if not
3053: currently outputting a sequence), to decide how many no-ops to
3054: output, or whatever.
3055:
3056: Don't define this macro if it has nothing to do, but it is
3057: helpful in reading assembly output if the extent of the delay
3058: sequence is made explicit (e.g. with white space).
3059:
3060: Note that output routines for instructions with delay slots must
3061: be prepared to deal with not being output as part of a sequence
3062: (i.e. when the scheduling pass is not run, or when no slot
3063: fillers could be found.) The variable `final_sequence' is null
3064: when not processing a sequence, otherwise it contains the
3065: `sequence' rtx being output. */
3066:
3067: #define DBR_OUTPUT_SEQEND(STREAM) \
3068: do \
3069: { \
3070: if (set_nomacro > 0 && --set_nomacro == 0) \
3071: fputs ("\t.set\tmacro\n", STREAM); \
3072: \
3073: if (set_noreorder > 0 && --set_noreorder == 0) \
3074: fputs ("\t.set\treorder\n", STREAM); \
3075: \
3076: dslots_jump_filled++; \
3077: fputs ("\n", STREAM); \
3078: } \
3079: while (0)
3080:
3081:
3082: /* How to tell the debugger about changes of source files. Note, the
3083: mips ECOFF format cannot deal with changes of files inside of
3084: functions, which means the output of parser generators like bison
3085: is generally not debuggable without using the -l switch. Lose,
3086: lose, lose. Silicon graphics seems to want all .file's hardwired
3087: to 1. */
3088:
3089: #ifndef SET_FILE_NUMBER
3090: #define SET_FILE_NUMBER() ++num_source_filenames
3091: #endif
3092:
3093: #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
3094: mips_output_filename (STREAM, NAME)
3095:
3096: /* This is how to output a note the debugger telling it the line number
3097: to which the following sequence of instructions corresponds.
3098: Silicon graphics puts a label after each .loc. */
3099:
3100: #ifndef LABEL_AFTER_LOC
3101: #define LABEL_AFTER_LOC(STREAM)
3102: #endif
3103:
3104: #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \
3105: mips_output_lineno (STREAM, LINE)
3106:
3107: /* The MIPS implementation uses some labels for it's own purposed. The
3108: following lists what labels are created, and are all formed by the
3109: pattern $L[a-z].*. The machine independent portion of GCC creates
3110: labels matching: $L[A-Z][0-9]+ and $L[0-9]+.
3111:
3112: LM[0-9]+ Silicon Graphics/ECOFF stabs label before each stmt.
3113: $Lb[0-9]+ Begin blocks for MIPS debug support
3114: $Lc[0-9]+ Label for use in s<xx> operation.
3115: $Le[0-9]+ End blocks for MIPS debug support
3116: $Lp\..+ Half-pic labels. */
3117:
3118: /* This is how to output the definition of a user-level label named NAME,
3119: such as the label on a static function or variable NAME.
3120:
3121: If we are optimizing the gp, remember that this label has been put
3122: out, so we know not to emit an .extern for it in mips_asm_file_end.
3123: We use one of the common bits in the IDENTIFIER tree node for this,
3124: since those bits seem to be unused, and we don't have any method
3125: of getting the decl nodes from the name. */
3126:
3127: #define ASM_OUTPUT_LABEL(STREAM,NAME) \
3128: do { \
3129: assemble_name (STREAM, NAME); \
3130: fputs (":\n", STREAM); \
3131: } while (0)
3132:
3133:
3134: /* A C statement (sans semicolon) to output to the stdio stream
3135: STREAM any text necessary for declaring the name NAME of an
3136: initialized variable which is being defined. This macro must
3137: output the label definition (perhaps using `ASM_OUTPUT_LABEL').
3138: The argument DECL is the `VAR_DECL' tree node representing the
3139: variable.
3140:
3141: If this macro is not defined, then the variable name is defined
3142: in the usual manner as a label (by means of `ASM_OUTPUT_LABEL'). */
3143:
3144: #define ASM_DECLARE_OBJECT_NAME(STREAM, NAME, DECL) \
3145: do \
3146: { \
3147: mips_declare_object (STREAM, NAME, "", ":\n", 0); \
3148: HALF_PIC_DECLARE (NAME); \
3149: } \
3150: while (0)
3151:
3152:
3153: /* This is how to output a command to make the user-level label named NAME
3154: defined for reference from other files. */
3155:
3156: #define ASM_GLOBALIZE_LABEL(STREAM,NAME) \
3157: do { \
3158: fputs ("\t.globl\t", STREAM); \
3159: assemble_name (STREAM, NAME); \
3160: fputs ("\n", STREAM); \
3161: } while (0)
3162:
3163: /* This says how to define a global common symbol. */
3164:
3165: #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
3166: mips_declare_object (STREAM, NAME, "\n\t.comm\t", ",%u\n", (ROUNDED))
3167:
3168: /* This says how to define a local common symbol (ie, not visible to
3169: linker). */
3170:
3171: #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \
3172: mips_declare_object (STREAM, NAME, "\n\t.lcomm\t", ",%u\n", (ROUNDED))
3173:
3174:
3175: /* This says how to output an external. It would be possible not to
3176: output anything and let undefined symbol become external. However
3177: the assembler uses length information on externals to allocate in
3178: data/sdata bss/sbss, thereby saving exec time. */
3179:
3180: #define ASM_OUTPUT_EXTERNAL(STREAM,DECL,NAME) \
3181: mips_output_external(STREAM,DECL,NAME)
3182:
3183: /* This says what to print at the end of the assembly file */
3184: #define ASM_FILE_END(STREAM) mips_asm_file_end(STREAM)
3185:
3186:
3187: /* This is how to declare a function name. The actual work of
3188: emitting the label is moved to function_prologue, so that we can
3189: get the line number correctly emitted before the .ent directive,
3190: and after any .file directives.
3191:
3192: Also, switch files if we are optimizing the global pointer. */
3193:
3194: #define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL) \
3195: { \
3196: extern FILE *asm_out_text_file; \
3197: if (TARGET_GP_OPT) \
3198: STREAM = asm_out_text_file; \
3199: \
3200: current_function_name = NAME; \
3201: HALF_PIC_DECLARE (NAME); \
3202: }
3203:
3204: /* This is how to output a reference to a user-level label named NAME.
3205: `assemble_name' uses this. */
3206:
3207: #define ASM_OUTPUT_LABELREF(STREAM,NAME) fprintf (STREAM, "%s", NAME)
3208:
3209: /* This is how to output an internal numbered label where
3210: PREFIX is the class of label and NUM is the number within the class. */
3211:
3212: #define ASM_OUTPUT_INTERNAL_LABEL(STREAM,PREFIX,NUM) \
3213: fprintf (STREAM, "$%s%d:\n", PREFIX, NUM)
3214:
3215: /* This is how to store into the string LABEL
3216: the symbol_ref name of an internal numbered label where
3217: PREFIX is the class of label and NUM is the number within the class.
3218: This is suitable for output with `assemble_name'. */
3219:
3220: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
3221: sprintf (LABEL, "*$%s%d", PREFIX, NUM)
3222:
3223: /* This is how to output an assembler line defining a `double' constant. */
3224:
3225: #define ASM_OUTPUT_DOUBLE(STREAM,VALUE) \
3226: mips_output_double (STREAM, VALUE)
3227:
3228:
3229: /* This is how to output an assembler line defining a `float' constant. */
3230:
3231: #define ASM_OUTPUT_FLOAT(STREAM,VALUE) \
3232: mips_output_float (STREAM, VALUE)
3233:
3234:
3235: /* This is how to output an assembler line defining an `int' constant. */
3236:
3237: #define ASM_OUTPUT_INT(STREAM,VALUE) \
3238: do { \
3239: fprintf (STREAM, "\t.word\t"); \
3240: output_addr_const (STREAM, (VALUE)); \
3241: fprintf (STREAM, "\n"); \
3242: } while (0)
3243:
3244: /* Likewise for `char' and `short' constants. */
3245:
3246: #define ASM_OUTPUT_SHORT(STREAM,VALUE) \
3247: { \
3248: fprintf (STREAM, "\t.half\t"); \
3249: output_addr_const (STREAM, (VALUE)); \
3250: fprintf (STREAM, "\n"); \
3251: }
3252:
3253: #define ASM_OUTPUT_CHAR(STREAM,VALUE) \
3254: { \
3255: fprintf (STREAM, "\t.byte\t"); \
3256: output_addr_const (STREAM, (VALUE)); \
3257: fprintf (STREAM, "\n"); \
3258: }
3259:
3260: /* This is how to output an assembler line for a numeric constant byte. */
3261:
3262: #define ASM_OUTPUT_BYTE(STREAM,VALUE) \
3263: fprintf (STREAM, "\t.byte\t0x%x\n", (VALUE))
3264:
3265: /* This is how to output an element of a case-vector that is absolute. */
3266:
3267: #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
3268: fprintf (STREAM, "\t.word\t$L%d\n", VALUE)
3269:
3270: /* This is how to output an element of a case-vector that is relative.
3271: (We do not use such vectors,
3272: but we must define this macro anyway.) */
3273:
3274: #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, VALUE, REL) \
3275: fprintf (STREAM, "\t.word\t$L%d-$L%d\n", VALUE, REL)
3276:
3277: /* This is how to emit the initial label for switch statements. We
3278: need to put the switch labels somewhere else from the text section,
3279: because the MIPS assembler gets real confused about line numbers if
3280: .word's appear in the text section. */
3281:
3282: #define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, JUMPTABLE) \
3283: { \
3284: rdata_section (); \
3285: ASM_OUTPUT_ALIGN (STREAM, 2); \
3286: ASM_OUTPUT_INTERNAL_LABEL (STREAM, PREFIX, NUM); \
3287: }
3288:
3289: /* This is how to output an assembler line
3290: that says to advance the location counter
3291: to a multiple of 2**LOG bytes. */
3292:
3293: #define ASM_OUTPUT_ALIGN(STREAM,LOG) \
3294: { \
3295: int mask = (1 << (LOG)) - 1; \
3296: fprintf (STREAM, "\t.align\t%d\n", (LOG)); \
3297: }
3298:
3299: /* This is how to output an assembler line to to advance the location
3300: counter by SIZE bytes. */
3301:
3302: #define ASM_OUTPUT_SKIP(STREAM,SIZE) \
3303: fprintf (STREAM, "\t.space\t%u\n", (SIZE))
3304:
3305:
3306: /* This is how to output a string. */
3307: #define ASM_OUTPUT_ASCII(STREAM, STRING, LEN) \
3308: do { \
3309: register int i, c, len = (LEN), cur_pos = 17; \
3310: register unsigned char *string = (unsigned char *)(STRING); \
3311: fprintf ((STREAM), "\t.ascii\t\""); \
3312: for (i = 0; i < len; i++) \
3313: { \
3314: register int c = string[i]; \
3315: \
3316: switch (c) \
3317: { \
3318: case '\"': \
3319: case '\\': \
3320: putc ('\\', (STREAM)); \
3321: putc (c, (STREAM)); \
3322: cur_pos += 2; \
3323: break; \
3324: \
3325: case TARGET_NEWLINE: \
3326: fputs ("\\n", (STREAM)); \
3327: if (i+1 < len \
3328: && (((c = string[i+1]) >= '\040' && c <= '~') \
3329: || c == TARGET_TAB)) \
3330: cur_pos = 32767; /* break right here */ \
3331: else \
3332: cur_pos += 2; \
3333: break; \
3334: \
3335: case TARGET_TAB: \
3336: fputs ("\\t", (STREAM)); \
3337: cur_pos += 2; \
3338: break; \
3339: \
3340: case TARGET_FF: \
3341: fputs ("\\f", (STREAM)); \
3342: cur_pos += 2; \
3343: break; \
3344: \
3345: case TARGET_BS: \
3346: fputs ("\\b", (STREAM)); \
3347: cur_pos += 2; \
3348: break; \
3349: \
3350: case TARGET_CR: \
3351: fputs ("\\r", (STREAM)); \
3352: cur_pos += 2; \
3353: break; \
3354: \
3355: default: \
3356: if (c >= ' ' && c < 0177) \
3357: { \
3358: putc (c, (STREAM)); \
3359: cur_pos++; \
3360: } \
3361: else \
3362: { \
3363: fprintf ((STREAM), "\\%03o", c); \
3364: cur_pos += 4; \
3365: } \
3366: } \
3367: \
3368: if (cur_pos > 72 && i+1 < len) \
3369: { \
3370: cur_pos = 17; \
3371: fprintf ((STREAM), "\"\n\t.ascii\t\""); \
3372: } \
3373: } \
3374: fprintf ((STREAM), "\"\n"); \
3375: } while (0)
3376:
3377: /* Handle certain cpp directives used in header files on sysV. */
3378: #define SCCS_DIRECTIVE
3379:
3380: /* Output #ident as a in the read-only data section. */
3381: #define ASM_OUTPUT_IDENT(FILE, STRING) \
3382: { \
3383: char *p = STRING; \
3384: int size = strlen (p) + 1; \
3385: rdata_section (); \
3386: assemble_string (p, size); \
3387: }
3388:
3389: /* Default to -G 8 */
3390: #ifndef MIPS_DEFAULT_GVALUE
3391: #define MIPS_DEFAULT_GVALUE 8
3392: #endif
3393:
3394: /* Define the strings to put out for each section in the object file. */
3395: #define TEXT_SECTION_ASM_OP "\t.text" /* instructions */
3396: #define DATA_SECTION_ASM_OP "\t.data" /* large data */
3397: #define SDATA_SECTION_ASM_OP "\t.sdata" /* small data */
3398: #define RDATA_SECTION_ASM_OP "\t.rdata" /* read-only data */
3399: #define READONLY_DATA_SECTION rdata_section
3400:
3401: /* What other sections we support other than the normal .data/.text. */
3402:
3403: #define EXTRA_SECTIONS in_sdata, in_rdata, in_last_p1
3404:
3405: /* Define the additional functions to select our additional sections. */
3406:
3407: /* on the MIPS it is not a good idea to put constants in the text
3408: section, since this defeats the sdata/data mechanism. This is
3409: especially true when -O is used. In this case an effort is made to
3410: address with faster (gp) register relative addressing, which can
3411: only get at sdata and sbss items (there is no stext !!) However,
3412: if the constant is too large for sdata, and it's readonly, it
3413: will go into the .rdata section. */
3414:
3415: #define EXTRA_SECTION_FUNCTIONS \
3416: void \
3417: sdata_section () \
3418: { \
3419: if (in_section != in_sdata) \
3420: { \
3421: fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \
3422: in_section = in_sdata; \
3423: } \
3424: } \
3425: \
3426: void \
3427: rdata_section () \
3428: { \
3429: if (in_section != in_rdata) \
3430: { \
3431: fprintf (asm_out_file, "%s\n", RDATA_SECTION_ASM_OP); \
3432: in_section = in_rdata; \
3433: } \
3434: }
3435:
3436: /* Given a decl node or constant node, choose the section to output it in
3437: and select that section. */
3438:
3439: #define SELECT_RTX_SECTION(MODE,RTX) \
3440: { \
3441: if ((GET_MODE_SIZE(MODE) / BITS_PER_UNIT) <= mips_section_threshold \
3442: && mips_section_threshold > 0) \
3443: sdata_section (); \
3444: else \
3445: rdata_section (); \
3446: } \
3447:
3448: #define SELECT_SECTION(DECL, RELOC) \
3449: { \
3450: if (int_size_in_bytes (TREE_TYPE (DECL)) <= mips_section_threshold \
3451: && mips_section_threshold > 0) \
3452: sdata_section (); \
3453: \
3454: else if (RELOC) \
3455: data_section (); \
3456: \
3457: else if (TREE_CODE (DECL) == STRING_CST) \
3458: { \
3459: if (flag_writable_strings) \
3460: data_section (); \
3461: else \
3462: rdata_section (); \
3463: } \
3464: \
3465: else if (TREE_CODE (DECL) != VAR_DECL) \
3466: rdata_section (); \
3467: \
3468: else if (!TREE_READONLY (DECL)) \
3469: data_section (); \
3470: \
3471: else \
3472: rdata_section (); \
3473: }
3474:
3475:
3476: /* Store in OUTPUT a string (made with alloca) containing
3477: an assembler-name for a local static variable named NAME.
3478: LABELNO is an integer which is different for each call. */
3479:
3480: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
3481: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
3482: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
3483:
3484: #define ASM_OUTPUT_REG_PUSH(STREAM,REGNO) \
3485: do \
3486: { \
3487: fprintf (STREAM, "\tsubu\t%s,%s,8\n\tsw\t%s,0(%s)\n", \
3488: reg_names[STACK_POINTER_REGNUM], \
3489: reg_names[STACK_POINTER_REGNUM], \
3490: reg_names[REGNO], \
3491: reg_names[STACK_POINTER_REGNUM]); \
3492: } \
3493: while (0)
3494:
3495: #define ASM_OUTPUT_REG_POP(STREAM,REGNO) \
3496: do \
3497: { \
3498: if (! set_noreorder) \
3499: fprintf (STREAM, "\t.set\tnoreorder\n"); \
3500: \
3501: dslots_load_total++; \
3502: dslots_load_filled++; \
3503: fprintf (STREAM, "\tlw\t%s,0(%s)\n\taddu\t%s,%s,8\n", \
3504: reg_names[REGNO], \
3505: reg_names[STACK_POINTER_REGNUM], \
3506: reg_names[STACK_POINTER_REGNUM], \
3507: reg_names[STACK_POINTER_REGNUM]); \
3508: \
3509: if (! set_noreorder) \
3510: fprintf (STREAM, "\t.set\treorder\n"); \
3511: } \
3512: while (0)
3513:
3514: /* Define the parentheses used to group arithmetic operations
3515: in assembler code. */
3516:
3517: #define ASM_OPEN_PAREN "("
3518: #define ASM_CLOSE_PAREN ")"
3519:
3520: /* How to start an assembler comment. */
3521: #ifndef ASM_COMMENT_START
3522: #define ASM_COMMENT_START "\t\t# "
3523: #endif
3524:
3525:
3526:
3527: /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for
3528: and mips-tdump.c to print them out.
3529:
3530: These must match the corresponding definitions in gdb/mipsread.c.
3531: Unfortunately, gcc and gdb do not currently share any directories. */
3532:
3533: #define CODE_MASK 0x8F300
3534: #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
3535: #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
3536: #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
3537:
3538:
3539: /* Default definitions for size_t and ptrdiff_t. */
3540:
3541: #ifndef SIZE_TYPE
3542: #define SIZE_TYPE "unsigned int"
3543: #endif
3544:
3545: #ifndef PTRDIFF_TYPE
3546: #define PTRDIFF_TYPE "int"
3547: #endif
3548:
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