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1.1 root 1: /* Definitions of target machine for GNU compiler. MIPS version. 1.1.1.2 ! root 2: Copyright (C) 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc. 1.1 root 3: Contributed by A. Lichnewsky, [email protected] 4: Changed by Michael Meissner, [email protected] 5: 6: This file is part of GNU CC. 7: 8: GNU CC is free software; you can redistribute it and/or modify 9: it under the terms of the GNU General Public License as published by 10: the Free Software Foundation; either version 2, or (at your option) 11: any later version. 12: 13: GNU CC is distributed in the hope that it will be useful, 14: but WITHOUT ANY WARRANTY; without even the implied warranty of 15: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16: GNU General Public License for more details. 17: 18: You should have received a copy of the GNU General Public License 19: along with GNU CC; see the file COPYING. If not, write to 20: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ 21: 22: 23: /* Make Saber happier on obstack.[ch]. */ 24: #if defined(__mips__) || defined(mips) 25: #define __PTR_TO_INT(P) ((int)(P)) 26: #define __INT_TO_PTR(P) ((char *)(P)) 27: #endif 28: 29: /* Standard GCC variables that we reference. */ 30: 31: extern char *asm_file_name; 32: extern char call_used_regs[]; 33: extern int current_function_calls_alloca; 34: extern int flag_omit_frame_pointer; 35: extern int frame_pointer_needed; 36: extern char *language_string; 37: extern int may_call_alloca; 38: extern int optimize; 39: extern char **save_argv; 40: extern int target_flags; 41: extern char *version_string; 42: 43: /* MIPS external variables defined in mips.c. */ 44: 45: /* comparison type */ 46: enum cmp_type { 47: CMP_SI, /* compare integers */ 48: CMP_SF, /* compare single precision floats */ 49: CMP_DF, /* compare double precision floats */ 50: CMP_MAX /* max comparison type */ 51: }; 52: 53: /* types of delay slot */ 54: enum delay_type { 55: DELAY_NONE, /* no delay slot */ 56: DELAY_LOAD, /* load from memory delay */ 57: DELAY_HILO, /* move from/to hi/lo registers */ 58: DELAY_FCMP /* delay after doing c.<xx>.{d,s} */ 59: }; 60: 61: /* Which processor to schedule for. Since there is no difference between 62: a R2000 and R3000 in terms of the scheduler, we collapse them into 63: just an R3000. The elements of the enumeration must match exactly 64: the cpu attribute in the mips.md machine description. */ 65: 66: enum processor_type { 67: PROCESSOR_DEFAULT, 68: PROCESSOR_R3000, 69: PROCESSOR_R6000, 70: PROCESSOR_R4000 71: }; 72: 73: /* Recast the cpu class to be the cpu attribute. */ 74: #define mips_cpu_attr ((enum attr_cpu)mips_cpu) 75: 1.1.1.2 ! root 76: /* Whether to emit abicalls code sequences or not. */ ! 77: ! 78: enum mips_abicalls_type { ! 79: MIPS_ABICALLS_NO, ! 80: MIPS_ABICALLS_YES ! 81: }; ! 82: ! 83: /* Recast the abicalls class to be the abicalls attribute. */ ! 84: #define mips_abicalls_attr ((enum attr_abicalls)mips_abicalls) ! 85: 1.1 root 86: /* Which type of block move to do (whether or not the last store is 87: split out so it can fill a branch delay slot). */ 88: 89: enum block_move_type { 90: BLOCK_MOVE_NORMAL, /* generate complete block move */ 91: BLOCK_MOVE_NOT_LAST, /* generate all but last store */ 92: BLOCK_MOVE_LAST /* generate just the last store */ 93: }; 94: 95: extern char mips_reg_names[][8]; /* register names (a0 vs. $4). */ 96: extern char mips_print_operand_punct[]; /* print_operand punctuation chars */ 97: extern char *current_function_name; /* current function being compiled */ 98: extern char *current_function_file; /* filename current function is in */ 99: extern int num_source_filenames; /* current .file # */ 100: extern int inside_function; /* != 0 if inside of a function */ 101: extern int ignore_line_number; /* != 0 if we are to ignore next .loc */ 102: extern int file_in_function_warning; /* warning given about .file in func */ 103: extern int sdb_label_count; /* block start/end next label # */ 104: extern int mips_section_threshold; /* # bytes of data/sdata cutoff */ 105: extern int g_switch_value; /* value of the -G xx switch */ 106: extern int g_switch_set; /* whether -G xx was passed. */ 107: extern int sym_lineno; /* sgi next label # for each stmt */ 108: extern int set_noreorder; /* # of nested .set noreorder's */ 109: extern int set_nomacro; /* # of nested .set nomacro's */ 110: extern int set_noat; /* # of nested .set noat's */ 111: extern int set_volatile; /* # of nested .set volatile's */ 112: extern int mips_branch_likely; /* emit 'l' after br (branch likely) */ 113: extern int mips_dbx_regno[]; /* Map register # to debug register # */ 114: extern char mips_rtx_classify[]; /* classify an RTX code */ 115: extern struct rtx_def *branch_cmp[2]; /* operands for compare */ 116: extern enum cmp_type branch_type; /* what type of branch to use */ 117: extern enum processor_type mips_cpu; /* which cpu are we scheduling for */ 1.1.1.2 ! root 118: extern enum mips_abicalls_type mips_abicalls;/* for svr4 abi pic calls */ 1.1 root 119: extern int mips_isa; /* architectural level */ 120: extern char *mips_cpu_string; /* for -mcpu=<xxx> */ 121: extern char *mips_isa_string; /* for -mips{1,2,3} */ 122: extern int dslots_load_total; /* total # load related delay slots */ 123: extern int dslots_load_filled; /* # filled load delay slots */ 124: extern int dslots_jump_total; /* total # jump related delay slots */ 125: extern int dslots_jump_filled; /* # filled jump delay slots */ 126: extern int dslots_number_nops; /* # of nops needed by previous insn */ 127: extern int num_refs[3]; /* # 1/2/3 word references */ 128: extern struct rtx_def *mips_load_reg; /* register to check for load delay */ 129: extern struct rtx_def *mips_load_reg2; /* 2nd reg to check for load delay */ 130: extern struct rtx_def *mips_load_reg3; /* 3rd reg to check for load delay */ 131: extern struct rtx_def *mips_load_reg4; /* 4th reg to check for load delay */ 132: 133: /* Functions within mips.c that we reference. */ 134: 135: extern void abort_with_insn (); 136: extern int arith32_operand (); 137: extern int arith_operand (); 138: extern int cmp_op (); 139: extern int cmp2_op (); 140: extern long compute_frame_size (); 141: extern int epilogue_reg_mentioned_p (); 142: extern void expand_block_move (); 143: extern int equality_op (); 144: extern int fcmp_op (); 145: extern void final_prescan_insn (); 146: extern int fpsw_register_operand (); 147: extern struct rtx_def * function_arg (); 148: extern void function_arg_advance (); 149: extern int function_arg_partial_nregs (); 150: extern void function_epilogue (); 151: extern void function_prologue (); 152: extern void gen_conditional_branch (); 153: extern struct rtx_def * gen_int_relational (); 154: extern void init_cumulative_args (); 155: extern int large_int (); 156: extern int md_register_operand (); 157: extern int mips_address_cost (); 158: extern void mips_asm_file_end (); 159: extern void mips_asm_file_start (); 160: extern int mips_const_double_ok (); 161: extern void mips_count_memory_refs (); 162: extern int mips_debugger_offset (); 163: extern void mips_declare_object (); 164: extern int mips_epilogue_delay_slots (); 165: extern void mips_expand_epilogue (); 166: extern void mips_expand_prologue (); 167: extern char *mips_fill_delay_slot (); 168: extern char *mips_move_1word (); 169: extern char *mips_move_2words (); 170: extern void mips_output_double (); 171: extern int mips_output_external (); 172: extern void mips_output_float (); 173: extern void mips_output_filename (); 174: extern void mips_output_lineno (); 175: extern char *output_block_move (); 176: extern void override_options (); 177: extern int pc_or_label_operand (); 178: extern void print_operand_address (); 179: extern void print_operand (); 180: extern void print_options (); 181: extern int reg_or_0_operand (); 182: extern int simple_epilogue_p (); 183: extern int simple_memory_operand (); 184: extern int small_int (); 185: extern void trace(); 186: extern int uns_arith_operand (); 187: extern int uns_cmp_op (); 188: 189: /* Recognition functions that return if a condition is true. */ 190: extern int address_operand (); 191: extern int const_double_operand (); 192: extern int const_int_operand (); 193: extern int general_operand (); 194: extern int immediate_operand (); 195: extern int memory_address_p (); 196: extern int memory_operand (); 197: extern int nonimmediate_operand (); 198: extern int nonmemory_operand (); 199: extern int register_operand (); 200: extern int scratch_operand (); 201: 202: /* Functions to change what output section we are using. */ 203: extern void data_section (); 204: extern void rdata_section (); 205: extern void readonly_data_section (); 206: extern void sdata_section (); 207: extern void text_section (); 208: 209: /* Functions in the rest of the compiler that we reference. */ 210: extern void abort_with_insn (); 211: extern void debug_rtx (); 212: extern void fatal_io_error (); 213: extern int get_frame_size (); 214: extern int offsettable_address_p (); 215: extern void output_address (); 216: extern char *permalloc (); 217: extern int reg_mentioned_p (); 218: 219: /* Functions in the standard library that we reference. */ 220: extern int atoi (); 221: extern char *getenv (); 222: extern char *mktemp (); 223: 224: 225: /* Stubs for half-pic support if not OSF/1 reference platform. */ 226: 227: #ifndef HALF_PIC_P 228: #define HALF_PIC_P() 0 229: #define HALF_PIC_NUMBER_PTRS 0 230: #define HALF_PIC_NUMBER_REFS 0 231: #define HALF_PIC_ENCODE(DECL) 232: #define HALF_PIC_DECLARE(NAME) 233: #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.") 234: #define HALF_PIC_ADDRESS_P(X) 0 235: #define HALF_PIC_PTR(X) X 236: #define HALF_PIC_FINISH(STREAM) 237: #endif 238: 239: 240: /* Run-time compilation parameters selecting different hardware subsets. */ 241: 242: /* Macros used in the machine description to test the flags. */ 243: 244: /* Bits for real switches */ 245: #define MASK_INT64 0x00000001 /* ints are 64 bits */ 246: #define MASK_LONG64 0x00000002 /* longs are 64 bits */ 247: #define MASK_LLONG128 0x00000004 /* long longs are 128 bits */ 248: #define MASK_GPOPT 0x00000008 /* Optimize for global pointer */ 249: #define MASK_GAS 0x00000010 /* Gas used instead of MIPS as */ 250: #define MASK_NAME_REGS 0x00000020 /* Use MIPS s/w reg name convention */ 251: #define MASK_STATS 0x00000040 /* print statistics to stderr */ 252: #define MASK_MEMCPY 0x00000080 /* call memcpy instead of inline code*/ 253: #define MASK_SOFT_FLOAT 0x00000100 /* software floating point */ 254: #define MASK_FLOAT64 0x00000200 /* fp registers are 64 bits */ 255: #define MASK_ABICALLS 0x00000400 /* emit .abicalls/.cprestore/.cpload */ 256: #define MASK_HALF_PIC 0x00000800 /* Emit OSF-style pic refs to externs*/ 257: #define MASK_LONG_CALLS 0x00001000 /* Always call through a register */ 258: #define MASK_UNUSED1 0x00002000 259: #define MASK_UNUSED2 0x00004000 260: #define MASK_UNUSED3 0x00008000 261: #define MASK_UNUSED4 0x00010000 262: #define MASK_UNUSED5 0x00020000 263: #define MASK_UNUSED6 0x00040000 264: #define MASK_UNUSED7 0x00080000 265: 266: /* Dummy switches used only in spec's*/ 267: #define MASK_MIPS_TFILE 0x00000000 /* flag for mips-tfile usage */ 268: 269: /* Debug switches, not documented */ 270: #define MASK_DEBUG 0x40000000 /* Eliminate version # in .s file */ 271: #define MASK_DEBUG_A 0x20000000 /* don't allow <label>($reg) addrs */ 272: #define MASK_DEBUG_B 0x10000000 /* GO_IF_LEGITIMATE_ADDRESS debug */ 273: #define MASK_DEBUG_C 0x08000000 /* don't expand seq, etc. */ 274: #define MASK_DEBUG_D 0x04000000 /* don't do define_split's */ 275: #define MASK_DEBUG_E 0x02000000 /* function_arg debug */ 276: #define MASK_DEBUG_F 0x01000000 /* don't try to suppress load nop's */ 277: #define MASK_DEBUG_G 0x00800000 /* don't support 64 bit arithmetic */ 278: #define MASK_DEBUG_H 0x00400000 /* allow ints in FP registers */ 279: #define MASK_DEBUG_I 0x00200000 /* unused */ 280: #define MASK_DEBUG_J 0x00100000 /* unused */ 281: 282: /* r4000 64 bit sizes */ 283: #define TARGET_INT64 (target_flags & MASK_INT64) 284: #define TARGET_LONG64 (target_flags & MASK_LONG64) 285: #define TARGET_LLONG128 (target_flags & MASK_LLONG128) 286: #define TARGET_FLOAT64 (target_flags & MASK_FLOAT64) 287: 288: /* Mips vs. GNU assembler */ 289: #define TARGET_GAS (target_flags & MASK_GAS) 290: #define TARGET_UNIX_ASM (!TARGET_GAS) 291: #define TARGET_MIPS_AS TARGET_UNIX_ASM 292: 293: /* Debug Mode */ 294: #define TARGET_DEBUG_MODE (target_flags & MASK_DEBUG) 295: #define TARGET_DEBUG_A_MODE (target_flags & MASK_DEBUG_A) 296: #define TARGET_DEBUG_B_MODE (target_flags & MASK_DEBUG_B) 297: #define TARGET_DEBUG_C_MODE (target_flags & MASK_DEBUG_C) 298: #define TARGET_DEBUG_D_MODE (target_flags & MASK_DEBUG_D) 299: #define TARGET_DEBUG_E_MODE (target_flags & MASK_DEBUG_E) 300: #define TARGET_DEBUG_F_MODE (target_flags & MASK_DEBUG_F) 301: #define TARGET_DEBUG_G_MODE (target_flags & MASK_DEBUG_G) 302: #define TARGET_DEBUG_H_MODE (target_flags & MASK_DEBUG_H) 303: #define TARGET_DEBUG_I_MODE (target_flags & MASK_DEBUG_I) 304: #define TARGET_DEBUG_J_MODE (target_flags & MASK_DEBUG_J) 305: 306: /* Reg. Naming in .s ($21 vs. $a0) */ 307: #define TARGET_NAME_REGS (target_flags & MASK_NAME_REGS) 308: 309: /* Optimize for Sdata/Sbss */ 310: #define TARGET_GP_OPT (target_flags & MASK_GPOPT) 311: 312: /* print program statistics */ 313: #define TARGET_STATS (target_flags & MASK_STATS) 314: 315: /* call memcpy instead of inline code */ 316: #define TARGET_MEMCPY (target_flags & MASK_MEMCPY) 317: 318: /* .abicalls, etc from Pyramid V.4 */ 319: #define TARGET_ABICALLS (target_flags & MASK_ABICALLS) 320: 321: /* OSF pic references to externs */ 322: #define TARGET_HALF_PIC (target_flags & MASK_HALF_PIC) 323: 324: /* software floating point */ 325: #define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT) 326: #define TARGET_HARD_FLOAT (! TARGET_SOFT_FLOAT) 327: 328: /* always call through a register */ 329: #define TARGET_LONG_CALLS (target_flags & MASK_LONG_CALLS) 330: 331: /* Macro to define tables used to set the flags. 332: This is a list in braces of pairs in braces, 333: each pair being { "NAME", VALUE } 334: where VALUE is the bits to set or minus the bits to clear. 335: An empty string NAME is used to identify the default VALUE. */ 336: 337: #define TARGET_SWITCHES \ 338: { \ 339: {"int64", MASK_INT64 | MASK_LONG64}, \ 340: {"long64", MASK_LONG64}, \ 341: {"longlong128", MASK_INT64 | MASK_LONG64 | MASK_LLONG128}, \ 342: {"mips-as", -MASK_GAS}, \ 343: {"gas", MASK_GAS}, \ 344: {"rnames", MASK_NAME_REGS}, \ 345: {"no-rnames", -MASK_NAME_REGS}, \ 346: {"gpOPT", MASK_GPOPT}, \ 347: {"gpopt", MASK_GPOPT}, \ 348: {"no-gpOPT", -MASK_GPOPT}, \ 349: {"no-gpopt", -MASK_GPOPT}, \ 350: {"stats", MASK_STATS}, \ 351: {"no-stats", -MASK_STATS}, \ 352: {"memcpy", MASK_MEMCPY}, \ 353: {"no-memcpy", -MASK_MEMCPY}, \ 354: {"mips-tfile", MASK_MIPS_TFILE}, \ 355: {"no-mips-tfile", -MASK_MIPS_TFILE}, \ 356: {"soft-float", MASK_SOFT_FLOAT}, \ 357: {"hard-float", -MASK_SOFT_FLOAT}, \ 358: {"fp64", MASK_FLOAT64}, \ 359: {"fp32", -MASK_FLOAT64}, \ 360: {"abicalls", MASK_ABICALLS}, \ 361: {"no-abicalls", -MASK_ABICALLS}, \ 362: {"half-pic", MASK_HALF_PIC}, \ 363: {"no-half-pic", -MASK_HALF_PIC}, \ 364: {"long-calls", MASK_LONG_CALLS}, \ 365: {"no-long-calls", -MASK_LONG_CALLS}, \ 366: {"debug", MASK_DEBUG}, \ 367: {"debuga", MASK_DEBUG_A}, \ 368: {"debugb", MASK_DEBUG_B}, \ 369: {"debugc", MASK_DEBUG_C}, \ 370: {"debugd", MASK_DEBUG_D}, \ 371: {"debuge", MASK_DEBUG_E}, \ 372: {"debugf", MASK_DEBUG_F}, \ 373: {"debugg", MASK_DEBUG_G}, \ 374: {"debugh", MASK_DEBUG_H}, \ 375: {"debugi", MASK_DEBUG_I}, \ 376: {"debugj", MASK_DEBUG_J}, \ 377: {"", TARGET_DEFAULT | TARGET_CPU_DEFAULT} \ 378: } 379: 380: /* Default target_flags if no switches are specified */ 381: 382: #ifndef TARGET_DEFAULT 383: #define TARGET_DEFAULT 0 384: #endif 385: 386: #ifndef TARGET_CPU_DEFAULT 387: #define TARGET_CPU_DEFAULT 0 388: #endif 389: 390: /* This macro is similar to `TARGET_SWITCHES' but defines names of 391: command options that have values. Its definition is an 392: initializer with a subgrouping for each command option. 393: 394: Each subgrouping contains a string constant, that defines the 395: fixed part of the option name, and the address of a variable. 396: The variable, type `char *', is set to the variable part of the 397: given option if the fixed part matches. The actual option name 398: is made by appending `-m' to the specified name. 399: 400: Here is an example which defines `-mshort-data-NUMBER'. If the 401: given option is `-mshort-data-512', the variable `m88k_short_data' 402: will be set to the string `"512"'. 403: 404: extern char *m88k_short_data; 405: #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */ 406: 407: #define TARGET_OPTIONS \ 408: { \ 409: { "cpu=", &mips_cpu_string }, \ 410: { "ips", &mips_isa_string } \ 411: } 412: 413: /* Macros to decide whether certain features are available or not, 414: depending on the instruction set architecture level. */ 415: 416: #define BRANCH_LIKELY_P() (mips_isa >= 2) 417: #define HAVE_64BIT_P() (mips_isa >= 3) 418: #define HAVE_SQRT_P() (mips_isa >= 2) 419: 420: 421: /* Switch Recognition by gcc.c. Add -G xx support */ 422: 423: #ifdef SWITCH_TAKES_ARG 424: #undef SWITCH_TAKES_ARG 425: #endif 426: 427: #define SWITCH_TAKES_ARG(CHAR) \ 428: ((CHAR) == 'D' || (CHAR) == 'U' || (CHAR) == 'o' \ 429: || (CHAR) == 'e' || (CHAR) == 'T' || (CHAR) == 'u' \ 430: || (CHAR) == 'I' || (CHAR) == 'm' \ 431: || (CHAR) == 'L' || (CHAR) == 'A' || (CHAR) == 'G') 432: 433: /* Sometimes certain combinations of command options do not make sense 434: on a particular target machine. You can define a macro 435: `OVERRIDE_OPTIONS' to take account of this. This macro, if 436: defined, is executed once just after all the command options have 437: been parsed. 438: 439: On the MIPS, it is used to handle -G. We also use it to set up all 440: of the tables referenced in the other macros. */ 441: 442: #define OVERRIDE_OPTIONS override_options () 443: 444: /* Zero or more C statements that may conditionally modify two 445: variables `fixed_regs' and `call_used_regs' (both of type `char 446: []') after they have been initialized from the two preceding 447: macros. 448: 449: This is necessary in case the fixed or call-clobbered registers 450: depend on target flags. 451: 452: You need not define this macro if it has no work to do. 453: 454: If the usage of an entire class of registers depends on the target 455: flags, you may indicate this to GCC by using this macro to modify 456: `fixed_regs' and `call_used_regs' to 1 for each of the registers in 457: the classes which should not be used by GCC. Also define the macro 458: `REG_CLASS_FROM_LETTER' to return `NO_REGS' if it is called with a 459: letter for a class that shouldn't be used. 460: 461: (However, if this class is not included in `GENERAL_REGS' and all 462: of the insn patterns whose constraints permit this class are 463: controlled by target switches, then GCC will automatically avoid 464: using these registers when the target switches are opposed to 465: them.) */ 466: 467: #define CONDITIONAL_REGISTER_USAGE \ 468: do \ 469: { \ 470: if (!TARGET_HARD_FLOAT) \ 471: { \ 472: int regno; \ 473: \ 474: for (regno = FP_REG_FIRST; regno <= FP_REG_LAST; regno++) \ 475: fixed_regs[regno] = call_used_regs[regno] = 1; \ 476: } \ 477: } \ 478: while (0) 479: 480: 481: /* Some machines may desire to change what optimizations are 482: performed for various optimization levels. This macro, if 483: defined, is executed once just after the optimization level is 484: determined and before the remainder of the command options have 485: been parsed. Values set in this macro are used as the default 486: values for the other command line options. 487: 488: LEVEL is the optimization level specified; 2 if -O2 is 489: specified, 1 if -O is specified, and 0 if neither is specified. */ 490: 491: #define OPTIMIZATION_OPTIONS(LEVEL) \ 492: { \ 493: if (LEVEL) \ 494: { \ 495: flag_omit_frame_pointer = TRUE; \ 496: flag_schedule_insns_after_reload = TRUE; \ 1.1.1.2 ! root 497: target_flags |= MASK_GPOPT; \ 1.1 root 498: } \ 499: } 500: 501: 502: /* Complain about missing specs and predefines that should be defined in each 503: of the target tm files to override the defaults. This is mostly a place- 504: holder until I can get each of the files updated [mm]. */ 505: 506: #if defined(OSF_OS) \ 507: || defined(DECSTATION) \ 508: || defined(SGI_TARGET) \ 509: || defined(MIPS_NEWS) \ 510: || defined(MIPS_SYSV) \ 511: || defined(MIPS_SVR4) \ 512: || defined(MIPS_BSD43) 513: 514: #ifndef CPP_PREDEFINES 515: #error "Define CPP_PREDEFINES in the appropriate tm.h file" 516: #endif 517: 518: #ifndef CPP_SPEC 519: #error "Define CPP_SPEC in the appropriate tm.h file" 520: #endif 521: 522: #ifndef LINK_SPEC 523: #error "Define LINK_SPEC in the appropriate tm.h file" 524: #endif 525: 526: #ifndef LIB_SPEC 527: #error "Define LIB_SPEC in the appropriate tm.h file" 528: #endif 529: 530: #ifndef STARTFILE_SPEC 531: #error "Define STARTFILE_SPEC in the appropriate tm.h file" 532: #endif 533: 534: #ifndef MACHINE_TYPE 535: #error "Define MACHINE_TYPE in the appropriate tm.h file" 536: #endif 537: #endif 538: 539: /* Tell collect what flags to pass to nm. */ 540: #ifndef NM_FLAGS 541: #define NM_FLAGS "-Bp" 542: #endif 543: 544: 545: /* Names to predefine in the preprocessor for this target machine. */ 546: 547: #ifndef CPP_PREDEFINES 548: #define CPP_PREDEFINES "-Dmips -Dunix -Dhost_mips -DMIPSEB -DR3000 -DSYSTYPE_BSD43 \ 1.1.1.2 ! root 549: -D_mips -D_unix -D_host_mips -D_MIPSEB -D_R3000 -D_SYSTYPE_BSD43 \ ! 550: -Asystem(unix) -Asystem(bsd) -Acpu(mips) -Amachine(mips)" 1.1 root 551: #endif 552: 553: /* Extra switches sometimes passed to the assembler. */ 554: 555: #ifndef ASM_SPEC 556: #define ASM_SPEC "\ 557: %{!mgas: \ 558: %{!mrnames: %{!.s:-nocpp} %{.s: %{cpp} %{nocpp}}} \ 559: %{pipe: %e-pipe is not supported.} \ 560: %{EB} %{!EB:-EB} \ 561: %{EL: %e-EL not supported} \ 562: %{mips1} %{mips2} %{mips3} \ 563: %{noasmopt:-O0} \ 564: %{!noasmopt:%{O:-O2} %{O1:-O2} %{O2:-O2} %{O3:-O3}} \ 565: %{g} %{g0} %{g1} %{g2} %{g3} %{v} %{K} \ 566: %{ggdb:-g} %{ggdb0:-g0} %{ggdb1:-g1} %{ggdb2:-g2} %{ggdb3:-g3} \ 567: %{gstabs:-g} %{gstabs0:-g0} %{gstabs1:-g1} %{gstabs2:-g2} %{gstabs3:-g3} \ 568: %{gstabs+:-g} %{gstabs+0:-g0} %{gstabs+1:-g1} %{gstabs+2:-g2} %{gstabs+3:-g3} \ 569: %{gcoff:-g} %{gstabs0:-g0} %{gcoff1:-g1} %{gcoff2:-g2} %{gcoff3:-g3}} \ 570: %{G*}" 571: 572: #endif /* ASM_SPEC */ 573: 574: /* Specify to run a post-processor, mips-tfile after the assembler 575: has run to stuff the mips debug information into the object file. 576: This is needed because the $#!%^ MIPS assembler provides no way 577: of specifying such information in the assembly file. If we are 578: cross compiling, disable mips-tfile unless the user specifies 579: -mmips-tfile. */ 580: 581: #ifndef ASM_FINAL_SPEC 582: #if ((TARGET_CPU_DEFAULT | TARGET_DEFAULT) & MASK_GAS) != 0 || defined (CROSS_COMPILE) 583: /* GAS */ 584: #define ASM_FINAL_SPEC "\ 585: %{mmips-as: %{!mno-mips-tfile: \ 586: \n mips-tfile %{v*: -v} \ 587: %{K: -I %b.o~} \ 588: %{!K: %{save-temps: -I %b.o~}} \ 589: %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \ 590: %{.s:%i} %{!.s:%g.s}}}" 591: 592: #else /* not GAS, clean up after MIPS assembler */ 593: #define ASM_FINAL_SPEC "\ 594: %{!mgas: %{!mno-mips-tfile: \ 595: \n mips-tfile %{v*: -v} \ 596: %{K: -I %b.o~} \ 597: %{!K: %{save-temps: -I %b.o~}} \ 598: %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \ 599: %{.s:%i} %{!.s:%g.s}}}" 600: 601: #endif /* GAS */ 602: #endif /* ASM_FINAL_SPEC */ 603: 604: /* Redefinition of libraries used. Mips doesn't support normal 605: UNIX style profiling via calling _mcount. It does offer 606: profiling that samples the PC, so do what we can... */ 607: 608: #ifndef LIB_SPEC 609: #define LIB_SPEC "%{pg:-lprof1} %{p:-lprof1} -lc" 610: #endif 611: 612: /* Extra switches sometimes passed to the linker. */ 613: 614: #ifndef LINK_SPEC 615: #define LINK_SPEC "\ 616: %{G*} \ 617: %{!mgas: \ 618: %{pipe: %e-pipe is not supported.} \ 619: %{EB} %{!EB:-EB} \ 620: %{EL: %e-EL not supported} \ 621: %{mips1} %{mips2} %{mips3} \ 622: %{bestGnum} %{shared} %{non_shared}}" 623: #endif /* LINK_SPEC defined */ 624: 625: /* Specs for the compiler proper */ 626: 627: #ifndef CC1_SPEC 628: #define CC1_SPEC "\ 629: %{gline:%{!g:%{!g0:%{!g1:%{!g2: -g1}}}}} \ 630: %{G*} \ 631: %{pic-none: -mno-half-pic} \ 632: %{pic-lib: -mhalf-pic} \ 633: %{pic-extern: -mhalf-pic} \ 634: %{pic-calls: -mhalf-pic} \ 635: %{save-temps: }" 636: #endif 637: 638: /* Preprocessor specs */ 639: 640: #ifndef CPP_SPEC 641: #define CPP_SPEC "\ 642: %{.cc: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \ 643: %{.cxx: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \ 644: %{.C: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \ 645: %{.m: -D__LANGUAGE_OBJECTIVE_C -D_LANGUAGE_OBJECTIVE_C} \ 646: %{.S: -D__LANGUAGE_ASSEMBLY -D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \ 1.1.1.2 ! root 647: %{.s: -D__LANGUAGE_ASSEMBLY -D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \ ! 648: %{!.S:%{!.s: -D__LANGUAGE_C -D_LANGUAGE_C %{!ansi:-DLANGUAGE_C}}}" 1.1 root 649: #endif 650: 651: /* If defined, this macro is an additional prefix to try after 652: `STANDARD_EXEC_PREFIX'. */ 653: 654: #ifndef MD_EXEC_PREFIX 655: #define MD_EXEC_PREFIX "/usr/lib/cmplrs/cc/" 656: #endif 657: 658: #ifndef MD_STARTFILE_PREFIX 659: #define MD_STARTFILE_PREFIX "/usr/lib/cmplrs/cc/" 660: #endif 661: 662: 663: /* Print subsidiary information on the compiler version in use. */ 664: 665: #define MIPS_VERSION "[AL 1.1, MM 40]" 666: 667: #ifndef MACHINE_TYPE 668: #define MACHINE_TYPE "BSD Mips" 669: #endif 670: 671: #ifndef TARGET_VERSION_INTERNAL 672: #define TARGET_VERSION_INTERNAL(STREAM) \ 673: fprintf (STREAM, " %s %s", MIPS_VERSION, MACHINE_TYPE) 674: #endif 675: 676: #ifndef TARGET_VERSION 677: #define TARGET_VERSION TARGET_VERSION_INTERNAL (stderr) 678: #endif 679: 680: 681: #define SDB_DEBUGGING_INFO /* generate info for mips-tfile */ 682: #define DBX_DEBUGGING_INFO /* generate stabs (OSF/rose) */ 683: #define MIPS_DEBUGGING_INFO /* MIPS specific debugging info */ 684: 685: #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */ 686: #define PREFERRED_DEBUGGING_TYPE ((len > 1 && !strncmp (str, "ggdb", len)) ? DBX_DEBUG : SDB_DEBUG) 687: #endif 688: 689: /* By default, turn on GDB extensions. */ 690: #define DEFAULT_GDB_EXTENSIONS 1 691: 692: /* If we are passing smuggling stabs through the MIPS ECOFF object 693: format, put a comment in front of the .stab<x> operation so 694: that the MIPS assembler does not choke. The mips-tfile program 695: will correctly put the stab into the object file. */ 696: 697: #define ASM_STABS_OP ((TARGET_GAS) ? ".stabs" : " #.stabs") 698: #define ASM_STABN_OP ((TARGET_GAS) ? ".stabn" : " #.stabn") 699: #define ASM_STABD_OP ((TARGET_GAS) ? ".stabd" : " #.stabd") 700: 701: /* Forward references to tags are allowed. */ 702: #define SDB_ALLOW_FORWARD_REFERENCES 703: 704: /* Unknown tags are also allowed. */ 705: #define SDB_ALLOW_UNKNOWN_REFERENCES 706: 707: /* On Sun 4, this limit is 2048. We use 1500 to be safe, 708: since the length can run past this up to a continuation point. */ 709: #define DBX_CONTIN_LENGTH 1500 710: 711: 712: /* How to renumber registers for dbx and gdb. */ 713: #define DBX_REGISTER_NUMBER(REGNO) mips_dbx_regno[ (REGNO) ] 714: 715: 716: /* Overrides for the COFF debug format. */ 717: #define PUT_SDB_SCL(a) \ 718: do { \ 719: extern FILE *asm_out_text_file; \ 720: fprintf (asm_out_text_file, "\t.scl\t%d;", (a)); \ 721: } while (0) 722: 723: #define PUT_SDB_INT_VAL(a) \ 724: do { \ 725: extern FILE *asm_out_text_file; \ 726: fprintf (asm_out_text_file, "\t.val\t%d;", (a)); \ 727: } while (0) 728: 729: #define PUT_SDB_VAL(a) \ 730: do { \ 731: extern FILE *asm_out_text_file; \ 732: fputs ("\t.val\t", asm_out_text_file); \ 733: output_addr_const (asm_out_text_file, (a)); \ 734: fputc (';', asm_out_text_file); \ 735: } while (0) 736: 737: #define PUT_SDB_DEF(a) \ 738: do { \ 739: extern FILE *asm_out_text_file; \ 740: fprintf (asm_out_text_file, "\t%s.def\t", \ 741: (TARGET_GAS) ? "" : "#"); \ 742: ASM_OUTPUT_LABELREF (asm_out_text_file, a); \ 743: fputc (';', asm_out_text_file); \ 744: } while (0) 745: 746: #define PUT_SDB_PLAIN_DEF(a) \ 747: do { \ 748: extern FILE *asm_out_text_file; \ 749: fprintf (asm_out_text_file, "\t%s.def\t.%s;", \ 750: (TARGET_GAS) ? "" : "#", (a)); \ 751: } while (0) 752: 753: #define PUT_SDB_ENDEF \ 754: do { \ 755: extern FILE *asm_out_text_file; \ 756: fprintf (asm_out_text_file, "\t.endef\n"); \ 757: } while (0) 758: 759: #define PUT_SDB_TYPE(a) \ 760: do { \ 761: extern FILE *asm_out_text_file; \ 762: fprintf (asm_out_text_file, "\t.type\t0x%x;", (a)); \ 763: } while (0) 764: 765: #define PUT_SDB_SIZE(a) \ 766: do { \ 767: extern FILE *asm_out_text_file; \ 768: fprintf (asm_out_text_file, "\t.size\t%d;", (a)); \ 769: } while (0) 770: 771: #define PUT_SDB_DIM(a) \ 772: do { \ 773: extern FILE *asm_out_text_file; \ 774: fprintf (asm_out_text_file, "\t.dim\t%d;", (a)); \ 775: } while (0) 776: 777: #ifndef PUT_SDB_START_DIM 778: #define PUT_SDB_START_DIM \ 779: do { \ 780: extern FILE *asm_out_text_file; \ 781: fprintf (asm_out_text_file, "\t.dim\t"); \ 782: } while (0) 783: #endif 784: 785: #ifndef PUT_SDB_NEXT_DIM 786: #define PUT_SDB_NEXT_DIM(a) \ 787: do { \ 788: extern FILE *asm_out_text_file; \ 789: fprintf (asm_out_text_file, "%d,", a); \ 790: } while (0) 791: #endif 792: 793: #ifndef PUT_SDB_LAST_DIM 794: #define PUT_SDB_LAST_DIM(a) \ 795: do { \ 796: extern FILE *asm_out_text_file; \ 797: fprintf (asm_out_text_file, "%d;", a); \ 798: } while (0) 799: #endif 800: 801: #define PUT_SDB_TAG(a) \ 802: do { \ 803: extern FILE *asm_out_text_file; \ 804: fprintf (asm_out_text_file, "\t.tag\t"); \ 805: ASM_OUTPUT_LABELREF (asm_out_text_file, a); \ 806: fputc (';', asm_out_text_file); \ 807: } while (0) 808: 809: /* For block start and end, we create labels, so that 810: later we can figure out where the correct offset is. 811: The normal .ent/.end serve well enough for functions, 812: so those are just commented out. */ 813: 814: #define PUT_SDB_BLOCK_START(LINE) \ 815: do { \ 816: extern FILE *asm_out_text_file; \ 817: fprintf (asm_out_text_file, \ 818: "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \ 819: sdb_label_count, \ 820: (TARGET_GAS) ? "" : "#", \ 821: sdb_label_count, \ 822: (LINE)); \ 823: sdb_label_count++; \ 824: } while (0) 825: 826: #define PUT_SDB_BLOCK_END(LINE) \ 827: do { \ 828: extern FILE *asm_out_text_file; \ 829: fprintf (asm_out_text_file, \ 830: "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \ 831: sdb_label_count, \ 832: (TARGET_GAS) ? "" : "#", \ 833: sdb_label_count, \ 834: (LINE)); \ 835: sdb_label_count++; \ 836: } while (0) 837: 838: #define PUT_SDB_FUNCTION_START(LINE) 839: 840: #define PUT_SDB_FUNCTION_END(LINE) 841: 842: #define PUT_SDB_EPILOGUE_END(NAME) 843: 844: #define SDB_GENERATE_FAKE(BUFFER, NUMBER) \ 845: sprintf ((BUFFER), ".%dfake", (NUMBER)); 846: 847: /* Correct the offset of automatic variables and arguments. Note that 848: the MIPS debug format wants all automatic variables and arguments 849: to be in terms of the virtual frame pointer (stack pointer before 850: any adjustment in the function), while the MIPS 3.0 linker wants 851: the frame pointer to be the stack pointer after the initial 852: adjustment. */ 853: 854: #define DEBUGGER_AUTO_OFFSET(X) mips_debugger_offset (X, 0) 855: #define DEBUGGER_ARG_OFFSET(OFFSET, X) mips_debugger_offset (X, OFFSET) 856: 857: 858: /* Tell collect that the object format is ECOFF */ 859: #ifndef OBJECT_FORMAT_ROSE 860: #define OBJECT_FORMAT_COFF /* Object file looks like COFF */ 861: #define EXTENDED_COFF /* ECOFF, not normal coff */ 862: #endif 863: 864: #if 0 /* These definitions normally have no effect because 865: MIPS systems define USE_COLLECT2, so 866: assemble_constructor does nothing anyway. */ 867: 868: /* Don't use the default definitions, because we don't have gld. 869: Also, we don't want stabs when generating ECOFF output. 870: Instead we depend on collect to handle these. */ 871: 872: #define ASM_OUTPUT_CONSTRUCTOR(file, name) 873: #define ASM_OUTPUT_DESTRUCTOR(file, name) 874: 875: #endif /* 0 */ 876: 877: /* Target machine storage layout */ 878: 879: /* Define this if most significant bit is lowest numbered 880: in instructions that operate on numbered bit-fields. 881: */ 882: #define BITS_BIG_ENDIAN 0 883: 884: /* Define this if most significant byte of a word is the lowest numbered. */ 885: #ifndef BYTES_BIG_ENDIAN 886: #ifndef DECSTATION 887: #define BYTES_BIG_ENDIAN 1 888: #else 889: #define BYTES_BIG_ENDIAN 0 890: #endif 891: #endif 892: 893: /* Define this if most significant word of a multiword number is the lowest. */ 894: #ifndef WORDS_BIG_ENDIAN 895: #ifndef DECSTATION 896: #define WORDS_BIG_ENDIAN 1 897: #else 898: #define WORDS_BIG_ENDIAN 0 899: #endif 900: #endif 901: 902: /* Define macros to easily access the most and least significant words 903: without a lot of #ifdef's. */ 904: 905: #if WORDS_BIG_ENDIAN 906: #define MOST_SIGNIFICANT_WORD 0 907: #define LEAST_SIGNIFICANT_WORD 1 908: 909: #else 910: #define MOST_SIGNIFICANT_WORD 1 911: #define LEAST_SIGNIFICANT_WORD 0 912: #endif 913: 914: /* Number of bits in an addressable storage unit */ 915: #define BITS_PER_UNIT 8 916: 917: /* Width in bits of a "word", which is the contents of a machine register. 918: Note that this is not necessarily the width of data type `int'; 919: if using 16-bit ints on a 68000, this would still be 32. 920: But on a machine with 16-bit registers, this would be 16. */ 921: #define BITS_PER_WORD 32 922: 923: /* Width of a word, in units (bytes). */ 924: #define UNITS_PER_WORD 4 925: 926: /* A C expression for the size in bits of the type `int' on the 927: target machine. If you don't define this, the default is one 928: word. */ 929: #define INT_TYPE_SIZE 32 930: 931: /* A C expression for the size in bits of the type `short' on the 932: target machine. If you don't define this, the default is half a 933: word. (If this would be less than one storage unit, it is 934: rounded up to one unit.) */ 935: #define SHORT_TYPE_SIZE 16 936: 937: /* A C expression for the size in bits of the type `long' on the 938: target machine. If you don't define this, the default is one 939: word. */ 940: #define LONG_TYPE_SIZE 32 941: 942: /* A C expression for the size in bits of the type `long long' on the 943: target machine. If you don't define this, the default is two 944: words. */ 945: #define LONG_LONG_TYPE_SIZE 64 946: 947: /* A C expression for the size in bits of the type `char' on the 948: target machine. If you don't define this, the default is one 949: quarter of a word. (If this would be less than one storage unit, 950: it is rounded up to one unit.) */ 951: #define CHAR_TYPE_SIZE BITS_PER_UNIT 952: 953: /* A C expression for the size in bits of the type `float' on the 954: target machine. If you don't define this, the default is one 955: word. */ 956: #define FLOAT_TYPE_SIZE 32 957: 958: /* A C expression for the size in bits of the type `double' on the 959: target machine. If you don't define this, the default is two 960: words. */ 961: #define DOUBLE_TYPE_SIZE 64 962: 963: /* A C expression for the size in bits of the type `long double' on 964: the target machine. If you don't define this, the default is two 965: words. */ 966: #define LONG_DOUBLE_TYPE_SIZE 64 967: 968: /* Width in bits of a pointer. 969: See also the macro `Pmode' defined below. */ 970: #define POINTER_SIZE 32 971: 972: /* Allocation boundary (in *bits*) for storing pointers in memory. */ 973: #define POINTER_BOUNDARY 32 974: 975: /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 976: #define PARM_BOUNDARY 32 977: 978: /* Allocation boundary (in *bits*) for the code of a function. */ 979: #define FUNCTION_BOUNDARY 32 980: 981: /* Alignment of field after `int : 0' in a structure. */ 982: #define EMPTY_FIELD_BOUNDARY 32 983: 984: /* Every structure's size must be a multiple of this. */ 985: /* 8 is observed right on a DECstation and on riscos 4.02. */ 986: #define STRUCTURE_SIZE_BOUNDARY 8 987: 988: /* There is no point aligning anything to a rounder boundary than this. */ 989: #define BIGGEST_ALIGNMENT 64 990: 991: /* Biggest alignment any structure field can require in bits. */ 992: #define BIGGEST_FIELD_ALIGNMENT 64 993: 994: /* Set this nonzero if move instructions will actually fail to work 995: when given unaligned data. */ 996: #define STRICT_ALIGNMENT 1 997: 998: /* Define this if you wish to imitate the way many other C compilers 999: handle alignment of bitfields and the structures that contain 1000: them. 1001: 1002: The behavior is that the type written for a bitfield (`int', 1003: `short', or other integer type) imposes an alignment for the 1004: entire structure, as if the structure really did contain an 1005: ordinary field of that type. In addition, the bitfield is placed 1006: within the structure so that it would fit within such a field, 1007: not crossing a boundary for it. 1008: 1009: Thus, on most machines, a bitfield whose type is written as `int' 1010: would not cross a four-byte boundary, and would force four-byte 1011: alignment for the whole structure. (The alignment used may not 1012: be four bytes; it is controlled by the other alignment 1013: parameters.) 1014: 1015: If the macro is defined, its definition should be a C expression; 1016: a nonzero value for the expression enables this behavior. */ 1017: 1018: #define PCC_BITFIELD_TYPE_MATTERS 1 1019: 1020: /* If defined, a C expression to compute the alignment given to a 1021: constant that is being placed in memory. CONSTANT is the constant 1022: and ALIGN is the alignment that the object would ordinarily have. 1023: The value of this macro is used instead of that alignment to align 1024: the object. 1025: 1026: If this macro is not defined, then ALIGN is used. 1027: 1028: The typical use of this macro is to increase alignment for string 1029: constants to be word aligned so that `strcpy' calls that copy 1030: constants can be done inline. */ 1031: 1032: #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ 1033: ((TREE_CODE (EXP) == STRING_CST || TREE_CODE (EXP) == CONSTRUCTOR) \ 1034: && (ALIGN) < BITS_PER_WORD \ 1035: ? BITS_PER_WORD \ 1036: : (ALIGN)) 1037: 1038: /* If defined, a C expression to compute the alignment for a static 1039: variable. TYPE is the data type, and ALIGN is the alignment that 1040: the object would ordinarily have. The value of this macro is used 1041: instead of that alignment to align the object. 1042: 1043: If this macro is not defined, then ALIGN is used. 1044: 1045: One use of this macro is to increase alignment of medium-size 1046: data to make it all fit in fewer cache lines. Another is to 1047: cause character arrays to be word-aligned so that `strcpy' calls 1048: that copy constants to character arrays can be done inline. */ 1049: 1050: #undef DATA_ALIGNMENT 1051: #define DATA_ALIGNMENT(TYPE, ALIGN) \ 1052: ((((ALIGN) < BITS_PER_WORD) \ 1053: && (TREE_CODE (TYPE) == ARRAY_TYPE \ 1054: || TREE_CODE (TYPE) == UNION_TYPE \ 1055: || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN)) 1056: 1057: /* Define this macro if an argument declared as `char' or `short' in a 1058: prototype should actually be passed as an `int'. In addition to 1059: avoiding errors in certain cases of mismatch, it also makes for 1060: better code on certain machines. */ 1061: 1062: #define PROMOTE_PROTOTYPES 1063: 1.1.1.2 ! root 1064: /* Define if operations between registers always perform the operation ! 1065: on the full register even if a narrower mode is specified. */ ! 1066: #define WORD_REGISTER_OPERATIONS ! 1067: ! 1068: /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD ! 1069: will either zero-extend or sign-extend. The value of this macro should ! 1070: be the code that says which one of the two operations is implicitly ! 1071: done, NIL if none. */ ! 1072: #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND 1.1 root 1073: 1074: /* Standard register usage. */ 1075: 1076: /* Number of actual hardware registers. 1077: The hardware registers are assigned numbers for the compiler 1078: from 0 to just below FIRST_PSEUDO_REGISTER. 1079: All registers that the compiler knows about must be given numbers, 1080: even those that are not normally considered general registers. 1081: 1082: On the Mips, we have 32 integer registers, 32 floating point registers 1083: and the special registers hi, lo, and fp status. */ 1084: 1085: #define FIRST_PSEUDO_REGISTER 67 1086: 1087: /* 1 for registers that have pervasive standard uses 1088: and are not available for the register allocator. 1089: 1090: On the MIPS, see conventions, page D-2 */ 1091: 1092: #define FIXED_REGISTERS \ 1093: { \ 1094: 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 1095: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, \ 1096: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 1097: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 1098: 1, 1, 1 \ 1099: } 1100: 1101: 1102: /* 1 for registers not available across function calls. 1103: These must include the FIXED_REGISTERS and also any 1104: registers that can be used without being saved. 1105: The latter must include the registers where values are returned 1106: and the register where structure-value addresses are passed. 1107: Aside from that, you can include as many other registers as you like. */ 1108: 1109: #define CALL_USED_REGISTERS \ 1110: { \ 1111: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 1112: 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, \ 1113: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 1114: 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 1115: 1, 1, 1 \ 1116: } 1117: 1118: 1119: /* Internal macros to classify a register number as to whether it's a 1120: general purpose register, a floating point register, a 1121: multiply/divide register, or a status register. 1122: 1123: The macro FP_CALL_REG_P also allows registers $4 and $6 as floating 1124: point registers to pass floating point as per MIPS spec. */ 1125: 1126: #define GP_REG_FIRST 0 1127: #define GP_REG_LAST 31 1128: #define GP_REG_NUM (GP_REG_LAST - GP_REG_FIRST + 1) 1129: #define GP_DBX_FIRST 0 1130: 1131: #define FP_REG_FIRST 32 1132: #define FP_REG_LAST 63 1133: #define FP_REG_NUM (FP_REG_LAST - FP_REG_FIRST + 1) 1134: #define FP_DBX_FIRST ((write_symbols == DBX_DEBUG) ? 38 : 32) 1135: 1136: #define MD_REG_FIRST 64 1137: #define MD_REG_LAST 65 1138: #define MD_REG_NUM (MD_REG_LAST - MD_REG_FIRST + 1) 1139: 1140: #define ST_REG_FIRST 66 1141: #define ST_REG_LAST 66 1142: #define ST_REG_NUM (ST_REG_LAST - ST_REG_FIRST + 1) 1143: 1144: #define AT_REGNUM (GP_REG_FIRST + 1) 1145: #define HI_REGNUM (MD_REG_FIRST + 0) 1146: #define LO_REGNUM (MD_REG_FIRST + 1) 1147: #define FPSW_REGNUM ST_REG_FIRST 1148: 1149: #define GP_REG_P(REGNO) ((unsigned) ((REGNO) - GP_REG_FIRST) < GP_REG_NUM) 1150: #define FP_REG_P(REGNO) ((unsigned) ((REGNO) - FP_REG_FIRST) < FP_REG_NUM) 1151: #define MD_REG_P(REGNO) ((unsigned) ((REGNO) - MD_REG_FIRST) < MD_REG_NUM) 1152: #define ST_REG_P(REGNO) ((REGNO) == ST_REG_FIRST) 1153: 1154: #define FP_CALL_REG_P(REGNO) \ 1155: (FP_REG_P (REGNO) \ 1156: || (REGNO) == (4 + GP_REG_FIRST) \ 1157: || (REGNO) == (6 + GP_REG_FIRST)) 1158: 1159: /* Return number of consecutive hard regs needed starting at reg REGNO 1160: to hold something of mode MODE. 1161: This is ordinarily the length in words of a value of mode MODE 1162: but can be less for certain modes in special long registers. 1163: 1164: On the MIPS, all general registers are one word long. Except on 1165: the R4000 with the FR bit set, the floating point uses register 1166: pairs, with the second register not being allocatable. */ 1167: 1168: #define HARD_REGNO_NREGS(REGNO, MODE) \ 1169: (! FP_REG_P (REGNO) \ 1170: ? ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) \ 1171: : (((GET_MODE_SIZE (MODE) + (2*UNITS_PER_WORD) - 1) / (2*UNITS_PER_WORD)) \ 1172: << (TARGET_FLOAT64 == 0))) 1173: 1174: /* Value is 1 if hard register REGNO can hold a value of machine-mode 1175: MODE. Require that DImode and DFmode be in even registers. For 1176: DImode, this makes some of the insns easier to write, since you 1177: don't have to worry about a DImode value in registers 3 & 4, 1178: producing a result in 4 & 5. 1179: 1180: To make the code simpler HARD_REGNO_MODE_OK now just references an 1181: array built in override_options. Because machmodes.h is not yet 1182: included before this file is processed, the MODE bound can't be 1183: expressed here. */ 1184: 1185: extern char mips_hard_regno_mode_ok[][FIRST_PSEUDO_REGISTER]; 1186: 1187: #define HARD_REGNO_MODE_OK(REGNO, MODE) \ 1188: mips_hard_regno_mode_ok[ (int)(MODE) ][ (REGNO) ] 1189: 1190: /* Value is 1 if it is a good idea to tie two pseudo registers 1191: when one has mode MODE1 and one has mode MODE2. 1192: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 1193: for any hard reg, then this must be 0 for correct output. */ 1194: #define MODES_TIEABLE_P(MODE1, MODE2) \ 1195: ((GET_MODE_CLASS (MODE1) == MODE_FLOAT || \ 1196: GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \ 1197: == (GET_MODE_CLASS (MODE2) == MODE_FLOAT || \ 1198: GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT)) 1199: 1200: /* MIPS pc is not overloaded on a register. */ 1201: /* #define PC_REGNUM xx */ 1202: 1203: /* Register to use for pushing function arguments. */ 1204: #define STACK_POINTER_REGNUM (GP_REG_FIRST + 29) 1205: 1206: /* Offset from the stack pointer to the first available location. */ 1207: #define STACK_POINTER_OFFSET 0 1208: 1209: /* Base register for access to local variables of the function. */ 1210: #define FRAME_POINTER_REGNUM (GP_REG_FIRST + 30) 1211: 1212: /* Value should be nonzero if functions must have frame pointers. 1213: Zero means the frame pointer need not be set up (and parms 1214: may be accessed via the stack pointer) in functions that seem suitable. 1215: This is computed in `reload', in reload1.c. */ 1216: #define FRAME_POINTER_REQUIRED (current_function_calls_alloca) 1217: 1218: /* Base register for access to arguments of the function. */ 1219: #define ARG_POINTER_REGNUM GP_REG_FIRST 1220: 1221: /* Register in which static-chain is passed to a function. */ 1222: #define STATIC_CHAIN_REGNUM (GP_REG_FIRST + 2) 1223: 1224: /* If the structure value address is passed in a register, then 1225: `STRUCT_VALUE_REGNUM' should be the number of that register. */ 1226: /* #define STRUCT_VALUE_REGNUM (GP_REG_FIRST + 4) */ 1227: 1228: /* If the structure value address is not passed in a register, define 1229: `STRUCT_VALUE' as an expression returning an RTX for the place 1230: where the address is passed. If it returns 0, the address is 1231: passed as an "invisible" first argument. */ 1232: #define STRUCT_VALUE ((rtx)0) 1233: 1234: /* Mips registers used in prologue/epilogue code when the stack frame 1235: is larger than 32K bytes. These registers must come from the 1236: scratch register set, and not used for passing and returning 1237: arguments and any other information used in the calling sequence 1238: (such as pic). */ 1239: 1240: #define MIPS_TEMP1_REGNUM (GP_REG_FIRST + 8) 1241: #define MIPS_TEMP2_REGNUM (GP_REG_FIRST + 9) 1242: 1243: /* Define this macro if it is as good or better to call a constant 1244: function address than to call an address kept in a register. */ 1245: #define NO_FUNCTION_CSE 1 1246: 1247: /* Define this macro if it is as good or better for a function to 1248: call itself with an explicit address than to call an address 1249: kept in a register. */ 1250: #define NO_RECURSIVE_FUNCTION_CSE 1 1251: 1252: /* The register number of the register used to address a table of 1253: static data addresses in memory. In some cases this register is 1254: defined by a processor's "application binary interface" (ABI). 1255: When this macro is defined, RTL is generated for this register 1256: once, as with the stack pointer and frame pointer registers. If 1257: this macro is not defined, it is up to the machine-dependent 1258: files to allocate such a register (if necessary). */ 1259: #define PIC_OFFSET_TABLE_REGNUM (GP_REG_FIRST + 28) 1260: 1.1.1.2 ! root 1261: #define PIC_FUNCTION_ADDR_REGNUM (GP_REG_FIRST + 25) ! 1262: 1.1 root 1263: 1264: /* Define the classes of registers for register constraints in the 1265: machine description. Also define ranges of constants. 1266: 1267: One of the classes must always be named ALL_REGS and include all hard regs. 1268: If there is more than one class, another class must be named NO_REGS 1269: and contain no registers. 1270: 1271: The name GENERAL_REGS must be the name of a class (or an alias for 1272: another name such as ALL_REGS). This is the class of registers 1273: that is allowed by "g" or "r" in a register constraint. 1274: Also, registers outside this class are allocated only when 1275: instructions express preferences for them. 1276: 1277: The classes must be numbered in nondecreasing order; that is, 1278: a larger-numbered class must never be contained completely 1279: in a smaller-numbered class. 1280: 1281: For any two classes, it is very desirable that there be another 1282: class that represents their union. */ 1283: 1284: enum reg_class 1285: { 1286: NO_REGS, /* no registers in set */ 1287: GR_REGS, /* integer registers */ 1288: FP_REGS, /* floating point registers */ 1289: HI_REG, /* hi register */ 1290: LO_REG, /* lo register */ 1291: MD_REGS, /* multiply/divide registers (hi/lo) */ 1292: ST_REGS, /* status registers (fp status) */ 1293: ALL_REGS, /* all registers */ 1294: LIM_REG_CLASSES /* max value + 1 */ 1295: }; 1296: 1297: #define N_REG_CLASSES (int) LIM_REG_CLASSES 1298: 1299: #define GENERAL_REGS GR_REGS 1300: 1301: /* An initializer containing the names of the register classes as C 1302: string constants. These names are used in writing some of the 1303: debugging dumps. */ 1304: 1305: #define REG_CLASS_NAMES \ 1306: { \ 1307: "NO_REGS", \ 1308: "GR_REGS", \ 1309: "FP_REGS", \ 1310: "HI_REG", \ 1311: "LO_REG", \ 1312: "MD_REGS", \ 1313: "ST_REGS", \ 1314: "ALL_REGS" \ 1315: } 1316: 1317: /* An initializer containing the contents of the register classes, 1318: as integers which are bit masks. The Nth integer specifies the 1319: contents of class N. The way the integer MASK is interpreted is 1320: that register R is in the class if `MASK & (1 << R)' is 1. 1321: 1322: When the machine has more than 32 registers, an integer does not 1323: suffice. Then the integers are replaced by sub-initializers, 1324: braced groupings containing several integers. Each 1325: sub-initializer must be suitable as an initializer for the type 1326: `HARD_REG_SET' which is defined in `hard-reg-set.h'. */ 1327: 1328: #define REG_CLASS_CONTENTS \ 1329: { \ 1330: { 0x00000000, 0x00000000, 0x00000000 }, /* no registers */ \ 1331: { 0xffffffff, 0x00000000, 0x00000000 }, /* integer registers */ \ 1332: { 0x00000000, 0xffffffff, 0x00000000 }, /* floating registers*/ \ 1333: { 0x00000000, 0x00000000, 0x00000001 }, /* hi register */ \ 1334: { 0x00000000, 0x00000000, 0x00000002 }, /* lo register */ \ 1335: { 0x00000000, 0x00000000, 0x00000003 }, /* mul/div registers */ \ 1336: { 0x00000000, 0x00000000, 0x00000004 }, /* status registers */ \ 1337: { 0xffffffff, 0xffffffff, 0x00000007 } /* all registers */ \ 1338: } 1339: 1340: 1341: /* A C expression whose value is a register class containing hard 1342: register REGNO. In general there is more that one such class; 1343: choose a class which is "minimal", meaning that no smaller class 1344: also contains the register. */ 1345: 1346: extern enum reg_class mips_regno_to_class[]; 1347: 1348: #define REGNO_REG_CLASS(REGNO) mips_regno_to_class[ (REGNO) ] 1349: 1350: /* A macro whose definition is the name of the class to which a 1351: valid base register must belong. A base register is one used in 1352: an address which is the register value plus a displacement. */ 1353: 1354: #define BASE_REG_CLASS GR_REGS 1355: 1356: /* A macro whose definition is the name of the class to which a 1357: valid index register must belong. An index register is one used 1358: in an address where its value is either multiplied by a scale 1359: factor or added to another register (as well as added to a 1360: displacement). */ 1361: 1362: #define INDEX_REG_CLASS GR_REGS 1363: 1364: 1365: /* REGISTER AND CONSTANT CLASSES */ 1366: 1367: /* Get reg_class from a letter such as appears in the machine 1368: description. 1369: 1370: DEFINED REGISTER CLASSES: 1371: 1372: 'd' General (aka integer) registers 1373: 'f' Floating point registers 1374: 'h' Hi register 1375: 'l' Lo register 1376: 'x' Multiply/divide registers 1377: 'z' FP Status register */ 1378: 1379: extern enum reg_class mips_char_to_class[]; 1380: 1381: #define REG_CLASS_FROM_LETTER(C) mips_char_to_class[ (C) ] 1382: 1383: /* The letters I, J, K, L, M, N, O, and P in a register constraint 1384: string can be used to stand for particular ranges of immediate 1385: operands. This macro defines what the ranges are. C is the 1386: letter, and VALUE is a constant value. Return 1 if VALUE is 1387: in the range specified by C. */ 1388: 1389: /* For MIPS: 1390: 1391: `I' is used for the range of constants an arithmetic insn can 1392: actually contain (16 bits signed integers). 1393: 1394: `J' is used for the range which is just zero (ie, $r0). 1395: 1396: `K' is used for the range of constants a logical insn can actually 1397: contain (16 bit zero-extended integers). 1398: 1399: `L' is used for the range of constants that be loaded with lui 1400: (ie, the bottom 16 bits are zero). 1401: 1402: `M' is used for the range of constants that take two words to load 1403: (ie, not matched by `I', `K', and `L'). 1404: 1405: `N' is used for negative 16 bit constants. 1406: 1407: `O' is an exact power of 2 (not yet used in the md file). 1408: 1409: `P' is used for positive 16 bit constants. */ 1410: 1411: #define SMALL_INT(X) ((unsigned) (INTVAL (X) + 0x8000) < 0x10000) 1412: #define SMALL_INT_UNSIGNED(X) ((unsigned) (INTVAL (X)) < 0x10000) 1413: 1414: #define CONST_OK_FOR_LETTER_P(VALUE, C) \ 1415: ((C) == 'I' ? ((unsigned) ((VALUE) + 0x8000) < 0x10000) \ 1416: : (C) == 'J' ? ((VALUE) == 0) \ 1417: : (C) == 'K' ? ((unsigned) (VALUE) < 0x10000) \ 1418: : (C) == 'L' ? (((VALUE) & 0xffff0000) == (VALUE)) \ 1419: : (C) == 'M' ? ((((VALUE) & ~0x0000ffff) != 0) \ 1420: && (((VALUE) & ~0x0000ffff) != ~0x0000ffff) \ 1421: && ((VALUE) & 0x0000ffff) != 0) \ 1422: : (C) == 'N' ? (((VALUE) & ~0x0000ffff) == ~0x0000ffff) \ 1423: : (C) == 'O' ? (exact_log2 (VALUE) >= 0) \ 1424: : (C) == 'P' ? ((VALUE) != 0 && (((VALUE) & ~0x0000ffff) == 0)) \ 1425: : 0) 1426: 1427: /* Similar, but for floating constants, and defining letters G and H. 1428: Here VALUE is the CONST_DOUBLE rtx itself. */ 1429: 1430: /* For Mips 1431: 1432: 'G' : Floating point 0 */ 1433: 1434: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 1435: ((C) == 'G' \ 1436: && CONST_DOUBLE_HIGH (VALUE) == 0 \ 1437: && CONST_DOUBLE_LOW (VALUE) == 0) 1438: 1439: /* Letters in the range `Q' through `U' may be defined in a 1440: machine-dependent fashion to stand for arbitrary operand types. 1441: The machine description macro `EXTRA_CONSTRAINT' is passed the 1442: operand as its first argument and the constraint letter as its 1443: second operand. 1444: 1445: `Q' is for memory references which take more than 1 instruction. 1446: `R' is for memory references which take 1 word for the instruction. 1447: `S' is for references to extern items which are PIC for OSF/rose. */ 1448: 1449: #define EXTRA_CONSTRAINT(OP,CODE) \ 1450: ((GET_CODE (OP) != MEM) ? FALSE \ 1451: : ((CODE) == 'Q') ? !simple_memory_operand (OP, GET_MODE (OP)) \ 1452: : ((CODE) == 'R') ? simple_memory_operand (OP, GET_MODE (OP)) \ 1453: : ((CODE) == 'S') ? (HALF_PIC_P () && CONSTANT_P (OP) \ 1454: && HALF_PIC_ADDRESS_P (OP)) \ 1455: : FALSE) 1456: 1457: /* Given an rtx X being reloaded into a reg required to be 1458: in class CLASS, return the class of reg to actually use. 1459: In general this is just CLASS; but on some machines 1460: in some cases it is preferable to use a more restrictive class. */ 1461: 1462: #define PREFERRED_RELOAD_CLASS(X,CLASS) \ 1463: ((GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \ 1464: || GET_MODE_CLASS (GET_MODE (X)) == MODE_COMPLEX_FLOAT) \ 1465: ? (TARGET_SOFT_FLOAT ? GR_REGS : FP_REGS) \ 1466: : ((GET_MODE (X) == VOIDmode) \ 1467: ? GR_REGS \ 1468: : CLASS)) 1469: 1470: /* Certain machines have the property that some registers cannot be 1471: copied to some other registers without using memory. Define this 1472: macro on those machines to be a C expression that is non-zero if 1473: objects of mode MODE in registers of CLASS1 can only be copied to 1474: registers of class CLASS2 by storing a register of CLASS1 into 1475: memory and loading that memory location into a register of CLASS2. 1476: 1477: Do not define this macro if its value would always be zero. */ 1478: 1479: #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \ 1480: (!TARGET_DEBUG_H_MODE \ 1481: && GET_MODE_CLASS (MODE) == MODE_INT \ 1482: && ((CLASS1 == FP_REGS && CLASS2 == GR_REGS) \ 1483: || (CLASS1 == GR_REGS && CLASS2 == FP_REGS))) 1484: 1485: /* Return the maximum number of consecutive registers 1486: needed to represent mode MODE in a register of class CLASS. */ 1487: 1.1.1.2 ! root 1488: #define CLASS_UNITS(mode, size) \ ! 1489: ((GET_MODE_SIZE (mode) + (size) - 1) / (size)) 1.1 root 1490: 1491: #define CLASS_MAX_NREGS(CLASS, MODE) \ 1.1.1.2 ! root 1492: ((CLASS) == FP_REGS \ ! 1493: ? (TARGET_FLOAT64 \ ! 1494: ? CLASS_UNITS (MODE, 8) \ ! 1495: : 2 * CLASS_UNITS (MODE, 8)) \ ! 1496: : CLASS_UNITS (MODE, UNITS_PER_WORD)) 1.1 root 1497: 1498: /* If defined, this is a C expression whose value should be 1499: nonzero if the insn INSN has the effect of mysteriously 1500: clobbering the contents of hard register number REGNO. By 1501: "mysterious" we mean that the insn's RTL expression doesn't 1502: describe such an effect. 1503: 1504: If this macro is not defined, it means that no insn clobbers 1505: registers mysteriously. This is the usual situation; all else 1506: being equal, it is best for the RTL expression to show all the 1507: activity. */ 1508: 1509: /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) */ 1510: 1511: 1512: /* Stack layout; function entry, exit and calling. */ 1513: 1514: /* Define this if pushing a word on the stack 1515: makes the stack pointer a smaller address. */ 1516: #define STACK_GROWS_DOWNWARD 1517: 1518: /* Define this if the nominal address of the stack frame 1519: is at the high-address end of the local variables; 1520: that is, each additional local variable allocated 1521: goes at a more negative offset in the frame. */ 1522: /* #define FRAME_GROWS_DOWNWARD */ 1523: 1524: /* Offset within stack frame to start allocating local variables at. 1525: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 1526: first local allocated. Otherwise, it is the offset to the BEGINNING 1527: of the first local allocated. */ 1.1.1.2 ! root 1528: #define STARTING_FRAME_OFFSET \ ! 1529: (current_function_outgoing_args_size \ ! 1530: + (TARGET_ABICALLS ? MIPS_STACK_ALIGN (UNITS_PER_WORD) : 0)) 1.1 root 1531: 1532: /* Offset from the stack pointer register to an item dynamically 1533: allocated on the stack, e.g., by `alloca'. 1534: 1535: The default value for this macro is `STACK_POINTER_OFFSET' plus the 1536: length of the outgoing arguments. The default is correct for most 1537: machines. See `function.c' for details. 1538: 1539: The MIPS ABI states that functions which dynamically allocate the 1540: stack must not have 0 for STACK_DYNAMIC_OFFSET, since it looks like 1541: we are trying to create a second frame pointer to the function, so 1542: allocate some stack space to make it happy. 1543: 1544: However, the linker currently complains about linking any code that 1545: dynamically allocates stack space, and there seems to be a bug in 1546: STACK_DYNAMIC_OFFSET, so don't define this right now. */ 1547: 1548: #if 0 1549: #define STACK_DYNAMIC_OFFSET(FUNDECL) \ 1550: ((current_function_outgoing_args_size == 0 && current_function_calls_alloca) \ 1551: ? 4*UNITS_PER_WORD \ 1552: : current_function_outgoing_args_size) 1553: #endif 1554: 1555: /* Structure to be filled in by compute_frame_size with register 1556: save masks, and offsets for the current function. */ 1557: 1558: struct mips_frame_info 1559: { 1560: long total_size; /* # bytes that the entire frame takes up */ 1561: long var_size; /* # bytes that variables take up */ 1562: long args_size; /* # bytes that outgoing arguments take up */ 1563: long extra_size; /* # bytes of extra gunk */ 1564: int gp_reg_size; /* # bytes needed to store gp regs */ 1565: int fp_reg_size; /* # bytes needed to store fp regs */ 1566: long mask; /* mask of saved gp registers */ 1567: long fmask; /* mask of saved fp registers */ 1568: long gp_save_offset; /* offset from vfp to store gp registers */ 1569: long fp_save_offset; /* offset from vfp to store fp registers */ 1570: long gp_sp_offset; /* offset from new sp to store gp registers */ 1571: long fp_sp_offset; /* offset from new sp to store fp registers */ 1572: int initialized; /* != 0 if frame size already calculated */ 1573: int num_gp; /* number of gp registers saved */ 1574: int num_fp; /* number of fp registers saved */ 1575: }; 1576: 1577: extern struct mips_frame_info current_frame_info; 1578: 1579: /* Store in the variable DEPTH the initial difference between the 1580: frame pointer reg contents and the stack pointer reg contents, 1581: as of the start of the function body. This depends on the layout 1582: of the fixed parts of the stack frame and on how registers are saved. */ 1583: 1584: /* #define INITIAL_FRAME_POINTER_OFFSET(VAR) \ 1585: ((VAR) = compute_frame_size (get_frame_size ())) */ 1586: 1587: /* If defined, this macro specifies a table of register pairs used to 1588: eliminate unneeded registers that point into the stack frame. If 1589: it is not defined, the only elimination attempted by the compiler 1590: is to replace references to the frame pointer with references to 1591: the stack pointer. 1592: 1593: The definition of this macro is a list of structure 1594: initializations, each of which specifies an original and 1595: replacement register. 1596: 1597: On some machines, the position of the argument pointer is not 1598: known until the compilation is completed. In such a case, a 1599: separate hard register must be used for the argument pointer. 1600: This register can be eliminated by replacing it with either the 1601: frame pointer or the argument pointer, depending on whether or not 1602: the frame pointer has been eliminated. 1603: 1604: In this case, you might specify: 1605: #define ELIMINABLE_REGS \ 1606: {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 1607: {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ 1608: {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} 1609: 1610: Note that the elimination of the argument pointer with the stack 1611: pointer is specified first since that is the preferred elimination. */ 1612: 1613: #define ELIMINABLE_REGS \ 1614: {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 1615: { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ 1616: { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} 1617: 1618: 1619: /* A C expression that returns non-zero if the compiler is allowed to 1620: try to replace register number FROM-REG with register number 1621: TO-REG. This macro need only be defined if `ELIMINABLE_REGS' is 1622: defined, and will usually be the constant 1, since most of the 1623: cases preventing register elimination are things that the compiler 1624: already knows about. */ 1625: 1626: #define CAN_ELIMINATE(FROM, TO) \ 1627: (!frame_pointer_needed \ 1628: || ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM)) 1629: 1630: /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It 1631: specifies the initial difference between the specified pair of 1632: registers. This macro must be defined if `ELIMINABLE_REGS' is 1633: defined. */ 1634: 1635: #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 1636: { compute_frame_size (get_frame_size ()); \ 1637: if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ 1638: (OFFSET) = 0; \ 1639: else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \ 1640: (OFFSET) = current_frame_info.total_size; \ 1641: else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ 1642: (OFFSET) = current_frame_info.total_size; \ 1643: else \ 1644: abort (); \ 1645: } 1646: 1647: 1648: /* If we generate an insn to push BYTES bytes, 1649: this says how many the stack pointer really advances by. 1650: On the vax, sp@- in a byte insn really pushes a word. */ 1651: 1652: /* #define PUSH_ROUNDING(BYTES) 0 */ 1653: 1654: /* If defined, the maximum amount of space required for outgoing 1655: arguments will be computed and placed into the variable 1656: `current_function_outgoing_args_size'. No space will be pushed 1657: onto the stack for each call; instead, the function prologue 1658: should increase the stack frame size by this amount. 1659: 1660: It is not proper to define both `PUSH_ROUNDING' and 1661: `ACCUMULATE_OUTGOING_ARGS'. */ 1662: #define ACCUMULATE_OUTGOING_ARGS 1663: 1664: /* Offset from the argument pointer register to the first argument's 1665: address. On some machines it may depend on the data type of the 1666: function. 1667: 1668: If `ARGS_GROW_DOWNWARD', this is the offset to the location above 1669: the first argument's address. 1670: 1671: On the MIPS, we must skip the first argument position if we are 1672: returning a structure or a union, to account for it's address being 1673: passed in $4. However, at the current time, this produces a compiler 1674: that can't bootstrap, so comment it out for now. */ 1675: 1676: #if 0 1677: #define FIRST_PARM_OFFSET(FNDECL) \ 1678: (FNDECL != 0 \ 1679: && TREE_TYPE (FNDECL) != 0 \ 1680: && TREE_TYPE (TREE_TYPE (FNDECL)) != 0 \ 1681: && (TREE_CODE (TREE_TYPE (TREE_TYPE (FNDECL))) == RECORD_TYPE \ 1682: || TREE_CODE (TREE_TYPE (TREE_TYPE (FNDECL))) == UNION_TYPE) \ 1683: ? UNITS_PER_WORD \ 1684: : 0) 1685: #else 1686: #define FIRST_PARM_OFFSET(FNDECL) 0 1687: #endif 1688: 1689: /* When a parameter is passed in a register, stack space is still 1690: allocated for it. For the MIPS, stack space must be allocated, cf 1691: Asm Lang Prog Guide page 7-8. 1692: 1693: BEWARE that some space is also allocated for non existing arguments 1694: in register. In case an argument list is of form GF used registers 1695: are a0 (a2,a3), but we should push over a1... */ 1696: 1697: #define REG_PARM_STACK_SPACE(FNDECL) ((4*UNITS_PER_WORD) - FIRST_PARM_OFFSET (FNDECL)) 1698: 1699: /* Define this if it is the responsibility of the caller to 1700: allocate the area reserved for arguments passed in registers. 1701: If `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect 1702: of this macro is to determine whether the space is included in 1703: `current_function_outgoing_args_size'. */ 1704: #define OUTGOING_REG_PARM_STACK_SPACE 1705: 1706: /* Align stack frames on 64 bits (Double Word ). */ 1707: #define STACK_BOUNDARY 64 1708: 1709: /* Make sure 16 bytes are always allocated on the stack. */ 1710: 1711: #ifndef STACK_ARGS_ADJUST 1712: #define STACK_ARGS_ADJUST(SIZE) \ 1713: { \ 1714: if (SIZE.constant < 16) \ 1715: SIZE.constant = 16; \ 1716: } 1717: #endif 1718: 1719: 1720: /* A C expression that should indicate the number of bytes of its 1721: own arguments that a function function pops on returning, or 0 1722: if the function pops no arguments and the caller must therefore 1723: pop them all after the function returns. 1724: 1725: FUNTYPE is a C variable whose value is a tree node that 1726: describes the function in question. Normally it is a node of 1727: type `FUNCTION_TYPE' that describes the data type of the function. 1728: From this it is possible to obtain the data types of the value 1729: and arguments (if known). 1730: 1731: When a call to a library function is being considered, FUNTYPE 1732: will contain an identifier node for the library function. Thus, 1733: if you need to distinguish among various library functions, you 1734: can do so by their names. Note that "library function" in this 1735: context means a function used to perform arithmetic, whose name 1736: is known specially in the compiler and was not mentioned in the 1737: C code being compiled. 1738: 1739: STACK-SIZE is the number of bytes of arguments passed on the 1740: stack. If a variable number of bytes is passed, it is zero, and 1741: argument popping will always be the responsibility of the 1742: calling function. */ 1743: 1744: #define RETURN_POPS_ARGS(FUNTYPE, SIZE) 0 1745: 1746: 1747: /* Symbolic macros for the registers used to return integer and floating 1748: point values. */ 1749: 1750: #define GP_RETURN (GP_REG_FIRST + 2) 1751: #define FP_RETURN ((TARGET_SOFT_FLOAT) ? GP_RETURN : (FP_REG_FIRST + 0)) 1752: 1753: /* Symbolic macros for the first/last argument registers. */ 1754: 1755: #define GP_ARG_FIRST (GP_REG_FIRST + 4) 1756: #define GP_ARG_LAST (GP_REG_FIRST + 7) 1757: #define FP_ARG_FIRST (FP_REG_FIRST + 12) 1758: #define FP_ARG_LAST (FP_REG_FIRST + 15) 1759: 1760: #define MAX_ARGS_IN_REGISTERS 4 1761: 1762: /* Define how to find the value returned by a library function 1763: assuming the value has mode MODE. */ 1764: 1765: #define LIBCALL_VALUE(MODE) \ 1766: gen_rtx (REG, MODE, \ 1767: (GET_MODE_CLASS (MODE) == MODE_FLOAT) \ 1768: ? FP_RETURN \ 1769: : GP_RETURN) 1770: 1771: /* Define how to find the value returned by a function. 1772: VALTYPE is the data type of the value (as a tree). 1773: If the precise function being called is known, FUNC is its FUNCTION_DECL; 1774: otherwise, FUNC is 0. */ 1775: 1776: #define FUNCTION_VALUE(VALTYPE, FUNC) LIBCALL_VALUE (TYPE_MODE (VALTYPE)) 1777: 1778: 1779: /* 1 if N is a possible register number for a function value. 1780: On the MIPS, R2 R3 and F0 F2 are the only register thus used. 1781: Currently, R2 and F0 are only implemented here (C has no complex type) */ 1782: 1783: #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN || (N) == FP_RETURN) 1784: 1785: /* 1 if N is a possible register number for function argument passing. */ 1786: 1787: #define FUNCTION_ARG_REGNO_P(N) (((N) >= GP_ARG_FIRST && (N) <= GP_ARG_LAST) \ 1788: || ((N) >= FP_ARG_FIRST && (N) <= FP_ARG_LAST \ 1789: && (0 == (N) % 2))) 1790: 1791: /* A C expression which can inhibit the returning of certain function 1792: values in registers, based on the type of value. A nonzero value says 1793: to return the function value in memory, just as large structures are 1794: always returned. Here TYPE will be a C expression of type 1795: `tree', representing the data type of the value. 1796: 1797: Note that values of mode `BLKmode' must be explicitly 1798: handled by this macro. Also, the option `-fpcc-struct-return' 1799: takes effect regardless of this macro. On most systems, it is 1800: possible to leave the macro undefined; this causes a default 1801: definition to be used, whose value is the constant 1 for BLKmode 1802: values, and 0 otherwise. 1803: 1804: GCC normally converts 1 byte structures into chars, 2 byte 1805: structs into shorts, and 4 byte structs into ints, and returns 1806: them this way. Defining the following macro overrides this, 1807: to give us MIPS cc compatibility. */ 1808: 1809: #define RETURN_IN_MEMORY(TYPE) \ 1810: (TYPE_MODE (TYPE) == BLKmode) 1811: 1812: /* A code distinguishing the floating point format of the target 1813: machine. There are three defined values: IEEE_FLOAT_FORMAT, 1814: VAX_FLOAT_FORMAT, and UNKNOWN_FLOAT_FORMAT. */ 1815: 1816: #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT 1817: 1818: 1819: /* Define a data type for recording info about an argument list 1820: during the scan of that argument list. This data type should 1821: hold all necessary information about the function itself 1822: and about the args processed so far, enough to enable macros 1823: such as FUNCTION_ARG to determine where the next arg should go. 1824: */ 1825: 1826: typedef struct mips_args { 1827: int gp_reg_found; /* whether a gp register was found yet */ 1828: int arg_number; /* argument number */ 1829: int arg_words; /* # total words the arguments take */ 1830: int num_adjusts; /* number of adjustments made */ 1831: /* Adjustments made to args pass in regs. */ 1.1.1.2 ! root 1832: /* ??? The size is doubled to work around a ! 1833: bug in the code that sets the adjustments ! 1834: in function_arg. */ ! 1835: struct rtx_def *adjust[MAX_ARGS_IN_REGISTERS*2]; 1.1 root 1836: } CUMULATIVE_ARGS; 1837: 1838: /* Initialize a variable CUM of type CUMULATIVE_ARGS 1839: for a call to a function whose data type is FNTYPE. 1840: For a library call, FNTYPE is 0. 1841: 1842: */ 1843: 1844: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \ 1845: init_cumulative_args (&CUM, FNTYPE, LIBNAME) \ 1846: 1847: /* Update the data in CUM to advance over an argument 1848: of mode MODE and data type TYPE. 1849: (TYPE is null for libcalls where that information may not be available.) */ 1850: 1851: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 1852: function_arg_advance (&CUM, MODE, TYPE, NAMED) 1853: 1854: /* Determine where to put an argument to a function. 1855: Value is zero to push the argument on the stack, 1856: or a hard register in which to store the argument. 1857: 1858: MODE is the argument's machine mode. 1859: TYPE is the data type of the argument (as a tree). 1860: This is null for libcalls where that information may 1861: not be available. 1862: CUM is a variable of type CUMULATIVE_ARGS which gives info about 1863: the preceding args and about the function being called. 1864: NAMED is nonzero if this argument is a named parameter 1865: (otherwise it is an extra parameter matching an ellipsis). */ 1866: 1867: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 1868: function_arg( &CUM, MODE, TYPE, NAMED) 1869: 1870: /* For an arg passed partly in registers and partly in memory, 1871: this is the number of registers used. 1872: For args passed entirely in registers or entirely in memory, zero. */ 1873: 1874: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ 1875: function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED) 1876: 1877: /* If defined, a C expression that gives the alignment boundary, in 1878: bits, of an argument with the specified mode and type. If it is 1879: not defined, `PARM_BOUNDARY' is used for all arguments. */ 1880: 1881: #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ 1882: (((TYPE) != 0) \ 1883: ? ((TYPE_ALIGN(TYPE) <= PARM_BOUNDARY) \ 1884: ? PARM_BOUNDARY \ 1885: : TYPE_ALIGN(TYPE)) \ 1886: : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \ 1887: ? PARM_BOUNDARY \ 1888: : GET_MODE_ALIGNMENT(MODE))) 1889: 1890: 1891: /* This macro generates the assembly code for function entry. 1892: FILE is a stdio stream to output the code to. 1893: SIZE is an int: how many units of temporary storage to allocate. 1894: Refer to the array `regs_ever_live' to determine which registers 1895: to save; `regs_ever_live[I]' is nonzero if register number I 1896: is ever used in the function. This macro is responsible for 1897: knowing which registers should not be saved even if used. */ 1898: 1899: #define FUNCTION_PROLOGUE(FILE, SIZE) function_prologue(FILE, SIZE) 1900: 1901: /* This macro generates the assembly code for function exit, 1902: on machines that need it. If FUNCTION_EPILOGUE is not defined 1903: then individual return instructions are generated for each 1904: return statement. Args are same as for FUNCTION_PROLOGUE. */ 1905: 1906: #define FUNCTION_EPILOGUE(FILE, SIZE) function_epilogue(FILE, SIZE) 1907: 1908: /* Define the number of delay slots needed for the function epilogue. 1909: 1910: On the mips, we need a slot if either no stack has been allocated, 1911: or the only register saved is the return register. */ 1912: 1913: #define DELAY_SLOTS_FOR_EPILOGUE mips_epilogue_delay_slots () 1914: 1915: /* Define whether INSN can be placed in delay slot N for the epilogue. 1916: No references to the stack must be made, since on the MIPS, the 1917: delay slot is done after the stack has been cleaned up. */ 1918: 1919: #define ELIGIBLE_FOR_EPILOGUE_DELAY(INSN,N) \ 1920: (get_attr_dslot (INSN) == DSLOT_NO \ 1921: && get_attr_length (INSN) == 1 \ 1922: && ! epilogue_reg_mentioned_p (PATTERN (INSN))) 1923: 1924: /* Tell prologue and epilogue if register REGNO should be saved / restored. */ 1925: 1926: #define MUST_SAVE_REGISTER(regno) \ 1927: ((regs_ever_live[regno] && !call_used_regs[regno]) \ 1928: || (regno == FRAME_POINTER_REGNUM && frame_pointer_needed) \ 1929: || (regno == (GP_REG_FIRST + 31) && regs_ever_live[GP_REG_FIRST + 31])) 1930: 1931: /* ALIGN FRAMES on double word boundaries */ 1932: 1933: #define MIPS_STACK_ALIGN(LOC) (((LOC)+7) & ~7) 1934: 1935: 1936: /* Output assembler code to FILE to increment profiler label # LABELNO 1937: for profiling a function entry. */ 1938: 1939: #define FUNCTION_PROFILER(FILE, LABELNO) \ 1940: { \ 1941: fprintf (FILE, "\t.set\tnoreorder\n"); \ 1942: fprintf (FILE, "\t.set\tnoat\n"); \ 1943: fprintf (FILE, "\tmove\t%s,%s\t\t# save current return address\n", \ 1944: reg_names[GP_REG_FIRST + 1], reg_names[GP_REG_FIRST + 31]); \ 1945: fprintf (FILE, "\tjal\t_mcount\n"); \ 1946: fprintf (FILE, "\tsubu\t%s,%s,8\t\t# _mcount pops 2 words from stack\n", \ 1947: reg_names[STACK_POINTER_REGNUM], \ 1948: reg_names[STACK_POINTER_REGNUM]); \ 1949: fprintf (FILE, "\t.set\treorder\n"); \ 1950: fprintf (FILE, "\t.set\tat\n"); \ 1951: } 1952: 1953: /* Define this macro if the code for function profiling should come 1954: before the function prologue. Normally, the profiling code comes 1955: after. */ 1956: 1957: /* #define PROFILE_BEFORE_PROLOGUE */ 1958: 1959: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 1960: the stack pointer does not matter. The value is tested only in 1961: functions that have frame pointers. 1962: No definition is equivalent to always zero. */ 1963: 1964: #define EXIT_IGNORE_STACK 1 1965: 1966: 1967: /* A C statement to output, on the stream FILE, assembler code for a 1968: block of data that contains the constant parts of a trampoline. 1969: This code should not include a label--the label is taken care of 1970: automatically. */ 1971: 1972: #define TRAMPOLINE_TEMPLATE(STREAM) \ 1973: { \ 1974: fprintf (STREAM, "\t.word\t0x03e00821\t\t# move $1,$31\n"); \ 1975: fprintf (STREAM, "\t.word\t0x04110001\t\t# bgezal $0,.+8\n"); \ 1976: fprintf (STREAM, "\t.word\t0x00000000\t\t# nop\n"); \ 1977: fprintf (STREAM, "\t.word\t0x8fe30010\t\t# lw $3,16($31)\n"); \ 1978: fprintf (STREAM, "\t.word\t0x8fe20014\t\t# lw $2,20($31)\n"); \ 1979: fprintf (STREAM, "\t.word\t0x00600008\t\t# jr $3\n"); \ 1980: fprintf (STREAM, "\t.word\t0x0020f821\t\t# move $31,$1\n"); \ 1981: fprintf (STREAM, "\t.word\t0x00000000\t\t# <function address>\n"); \ 1982: fprintf (STREAM, "\t.word\t0x00000000\t\t# <static chain value>\n"); \ 1983: } 1984: 1985: /* A C expression for the size in bytes of the trampoline, as an 1986: integer. */ 1987: 1988: #define TRAMPOLINE_SIZE (9*4) 1989: 1990: /* Alignment required for trampolines, in bits. 1991: 1992: If you don't define this macro, the value of `BIGGEST_ALIGNMENT' 1993: is used for aligning trampolines. */ 1994: 1995: /* #define TRAMPOLINE_ALIGNMENT 32 */ 1996: 1997: /* A C statement to initialize the variable parts of a trampoline. 1998: ADDR is an RTX for the address of the trampoline; FNADDR is an 1999: RTX for the address of the nested function; STATIC_CHAIN is an 2000: RTX for the static chain value that should be passed to the 2001: function when it is called. */ 2002: 2003: #define INITIALIZE_TRAMPOLINE(ADDR, FUNC, CHAIN) \ 2004: { \ 2005: rtx addr = ADDR; \ 2006: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 28)), FUNC); \ 2007: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 32)), CHAIN); \ 2008: \ 1.1.1.2 ! root 2009: /* Flush the instruction cache. */ \ ! 2010: emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "__gcc_flush_cache"), \ 1.1 root 2011: 0, VOIDmode, 1, addr, Pmode); \ 2012: } 2013: 1.1.1.2 ! root 2014: /* Flush the instruction cache. */ 1.1 root 2015: 2016: #define TRANSFER_FROM_TRAMPOLINE \ 2017: \ 2018: void \ 1.1.1.2 ! root 2019: __gcc_flush_cache (addr) \ 1.1 root 2020: char *addr; \ 2021: { \ 2022: if (cacheflush (addr, TRAMPOLINE_SIZE, 1) < 0) \ 2023: perror ("cacheflush of trampoline code"); \ 2024: } 2025: 2026: /* Addressing modes, and classification of registers for them. */ 2027: 2028: /* #define HAVE_POST_INCREMENT */ 2029: /* #define HAVE_POST_DECREMENT */ 2030: 2031: /* #define HAVE_PRE_DECREMENT */ 2032: /* #define HAVE_PRE_INCREMENT */ 2033: 2034: /* These assume that REGNO is a hard or pseudo reg number. 2035: They give nonzero only if REGNO is a hard reg of the suitable class 2036: or a pseudo reg currently allocated to a suitable hard reg. 2037: These definitions are NOT overridden anywhere. */ 2038: 2039: #define GP_REG_OR_PSEUDO_STRICT_P(regno) \ 2040: GP_REG_P((regno < FIRST_PSEUDO_REGISTER) ? regno : reg_renumber[regno]) 2041: 2042: #define GP_REG_OR_PSEUDO_NONSTRICT_P(regno) \ 2043: (((regno) >= FIRST_PSEUDO_REGISTER) || (GP_REG_P (regno))) 2044: 2045: #define REGNO_OK_FOR_INDEX_P(regno) GP_REG_OR_PSEUDO_STRICT_P (regno) 2046: #define REGNO_OK_FOR_BASE_P(regno) GP_REG_OR_PSEUDO_STRICT_P (regno) 2047: 2048: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 2049: and check its validity for a certain class. 2050: We have two alternate definitions for each of them. 2051: The usual definition accepts all pseudo regs; the other rejects them all. 2052: The symbol REG_OK_STRICT causes the latter definition to be used. 2053: 2054: Most source files want to accept pseudo regs in the hope that 2055: they will get allocated to the class that the insn wants them to be in. 2056: Some source files that are used after register allocation 2057: need to be strict. */ 2058: 2059: #ifndef REG_OK_STRICT 2060: 2061: #define REG_OK_STRICT_P 0 2062: #define REG_OK_FOR_INDEX_P(X) GP_REG_OR_PSEUDO_NONSTRICT_P (REGNO (X)) 2063: #define REG_OK_FOR_BASE_P(X) GP_REG_OR_PSEUDO_NONSTRICT_P (REGNO (X)) 2064: 2065: #else 2066: 2067: #define REG_OK_STRICT_P 1 2068: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 2069: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 2070: 2071: #endif 2072: 2073: 2074: /* Maximum number of registers that can appear in a valid memory address. */ 2075: 2076: #define MAX_REGS_PER_ADDRESS 1 2077: 2078: /* A C compound statement with a conditional `goto LABEL;' executed 2079: if X (an RTX) is a legitimate memory address on the target 2080: machine for a memory operand of mode MODE. 2081: 2082: It usually pays to define several simpler macros to serve as 2083: subroutines for this one. Otherwise it may be too complicated 2084: to understand. 2085: 2086: This macro must exist in two variants: a strict variant and a 2087: non-strict one. The strict variant is used in the reload pass. 2088: It must be defined so that any pseudo-register that has not been 2089: allocated a hard register is considered a memory reference. In 2090: contexts where some kind of register is required, a 2091: pseudo-register with no hard register must be rejected. 2092: 2093: The non-strict variant is used in other passes. It must be 2094: defined to accept all pseudo-registers in every context where 2095: some kind of register is required. 2096: 2097: Compiler source files that want to use the strict variant of 2098: this macro define the macro `REG_OK_STRICT'. You should use an 2099: `#ifdef REG_OK_STRICT' conditional to define the strict variant 2100: in that case and the non-strict variant otherwise. 2101: 2102: Typically among the subroutines used to define 2103: `GO_IF_LEGITIMATE_ADDRESS' are subroutines to check for 2104: acceptable registers for various purposes (one for base 2105: registers, one for index registers, and so on). Then only these 2106: subroutine macros need have two variants; the higher levels of 2107: macros may be the same whether strict or not. 2108: 2109: Normally, constant addresses which are the sum of a `symbol_ref' 2110: and an integer are stored inside a `const' RTX to mark them as 2111: constant. Therefore, there is no need to recognize such sums 2112: specifically as legitimate addresses. Normally you would simply 2113: recognize any `const' as legitimate. 2114: 2115: Usually `PRINT_OPERAND_ADDRESS' is not prepared to handle 2116: constant sums that are not marked with `const'. It assumes 2117: that a naked `plus' indicates indexing. If so, then you *must* 2118: reject such naked constant sums as illegitimate addresses, so 2119: that none of them will be given to `PRINT_OPERAND_ADDRESS'. 2120: 2121: On some machines, whether a symbolic address is legitimate 2122: depends on the section that the address refers to. On these 2123: machines, define the macro `ENCODE_SECTION_INFO' to store the 2124: information into the `symbol_ref', and then check for it here. 2125: When you see a `const', you will have to look inside it to find 2126: the `symbol_ref' in order to determine the section. */ 2127: 2128: #if 1 2129: #define GO_PRINTF(x) trace(x) 2130: #define GO_PRINTF2(x,y) trace(x,y) 2131: #define GO_DEBUG_RTX(x) debug_rtx(x) 2132: 2133: #else 2134: #define GO_PRINTF(x) 2135: #define GO_PRINTF2(x,y) 2136: #define GO_DEBUG_RTX(x) 2137: #endif 2138: 2139: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 2140: { \ 2141: register rtx xinsn = (X); \ 2142: \ 2143: if (TARGET_DEBUG_B_MODE) \ 2144: { \ 2145: GO_PRINTF2 ("\n========== GO_IF_LEGITIMATE_ADDRESS, %sstrict\n", \ 2146: (REG_OK_STRICT_P) ? "" : "not "); \ 2147: GO_DEBUG_RTX (xinsn); \ 2148: } \ 2149: \ 2150: if (GET_CODE (xinsn) == REG && REG_OK_FOR_BASE_P (xinsn)) \ 2151: goto ADDR; \ 2152: \ 2153: if (CONSTANT_ADDRESS_P (xinsn)) \ 2154: goto ADDR; \ 2155: \ 2156: if (GET_CODE (xinsn) == PLUS) \ 2157: { \ 2158: register rtx xplus0 = XEXP (xinsn, 0); \ 2159: register rtx xplus1 = XEXP (xinsn, 1); \ 2160: register enum rtx_code code0 = GET_CODE (xplus0); \ 2161: register enum rtx_code code1 = GET_CODE (xplus1); \ 2162: \ 2163: if (code0 != REG && code1 == REG) \ 2164: { \ 2165: xplus0 = XEXP (xinsn, 1); \ 2166: xplus1 = XEXP (xinsn, 0); \ 2167: code0 = GET_CODE (xplus0); \ 2168: code1 = GET_CODE (xplus1); \ 2169: } \ 2170: \ 2171: if (code0 == REG && REG_OK_FOR_BASE_P (xplus0)) \ 2172: { \ 2173: if (code1 == CONST_INT) \ 2174: { \ 2175: register unsigned adj_offset = INTVAL (xplus1) + 0x8000; \ 2176: \ 2177: if ((adj_offset <= 0xffff) \ 2178: && (adj_offset + GET_MODE_SIZE (MODE) - 1 <= 0xffff)) \ 2179: goto ADDR; \ 2180: } \ 2181: \ 2182: /* For some code sequences, you actually get better code by \ 2183: pretending that the MIPS supports an address mode of a \ 2184: constant address + a register, even though the real \ 2185: machine doesn't support it. This is because the \ 2186: assembler can use $r1 to load just the high 16 bits, add \ 2187: in the register, and fold the low 16 bits into the memory \ 2188: reference, whereas the compiler generates a 4 instruction \ 2189: sequence. On the other hand, CSE is not as effective. \ 2190: It would be a win to generate the lui directly, but the \ 2191: MIPS assembler does not have syntax to generate the \ 2192: appropriate relocation. */ \ 2193: \ 2194: else if (!TARGET_DEBUG_A_MODE \ 2195: && code0 == REG \ 2196: && CONSTANT_ADDRESS_P (xplus1)) \ 2197: goto ADDR; \ 2198: } \ 2199: } \ 2200: \ 2201: if (TARGET_DEBUG_B_MODE) \ 2202: GO_PRINTF ("Not a legitimate address\n"); \ 2203: } 2204: 2205: 2206: /* A C expression that is 1 if the RTX X is a constant which is a 2207: valid address. This is defined to be the same as `CONSTANT_P (X)', 2208: but rejecting CONST_DOUBLE. */ 2209: #define CONSTANT_ADDRESS_P(X) \ 2210: ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ 2211: || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ 2212: || GET_CODE (X) == HIGH) && (!HALF_PIC_P () || !HALF_PIC_ADDRESS_P (X))) 2213: 2214: 2215: /* Nonzero if the constant value X is a legitimate general operand. 2216: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. 2217: 2218: At present, GAS doesn't understand li.[sd], so don't allow it 2219: to be generated at present. Also, the MIPS assembler does not 2220: grok li.d Infinity. */ 2221: 2222: #define LEGITIMATE_CONSTANT_P(X) \ 2223: (GET_CODE (X) != CONST_DOUBLE || mips_const_double_ok (X, GET_MODE (X))) 2224: 2225: 2226: /* A C compound statement that attempts to replace X with a valid 2227: memory address for an operand of mode MODE. WIN will be a C 2228: statement label elsewhere in the code; the macro definition may 2229: use 2230: 2231: GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); 2232: 2233: to avoid further processing if the address has become legitimate. 2234: 2235: X will always be the result of a call to `break_out_memory_refs', 2236: and OLDX will be the operand that was given to that function to 2237: produce X. 2238: 2239: The code generated by this macro should not alter the 2240: substructure of X. If it transforms X into a more legitimate 2241: form, it should assign X (which will always be a C variable) a 2242: new value. 2243: 2244: It is not necessary for this macro to come up with a legitimate 2245: address. The compiler has standard ways of doing so in all 2246: cases. In fact, it is safe for this macro to do nothing. But 2247: often a machine-dependent strategy can generate better code. 2248: 2249: For the MIPS, transform: 2250: 2251: memory(X + <large int>) 2252: 2253: into: 2254: 2255: Y = <large int> & ~0x7fff; 2256: Z = X + Y 2257: memory (Z + (<large int> & 0x7fff)); 2258: 2259: This is for CSE to find several similar references, and only use one Z. */ 2260: 2261: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ 2262: { \ 2263: register rtx xinsn = (X); \ 2264: \ 2265: if (TARGET_DEBUG_B_MODE) \ 2266: { \ 2267: GO_PRINTF ("\n========== LEGITIMIZE_ADDRESS\n"); \ 2268: GO_DEBUG_RTX (xinsn); \ 2269: } \ 2270: \ 2271: if (GET_CODE (xinsn) == PLUS) \ 2272: { \ 2273: register rtx xplus0 = XEXP (xinsn, 0); \ 2274: register rtx xplus1 = XEXP (xinsn, 1); \ 2275: register enum rtx_code code0 = GET_CODE (xplus0); \ 2276: register enum rtx_code code1 = GET_CODE (xplus1); \ 2277: \ 2278: if (code0 != REG && code1 == REG) \ 2279: { \ 2280: xplus0 = XEXP (xinsn, 1); \ 2281: xplus1 = XEXP (xinsn, 0); \ 2282: code0 = GET_CODE (xplus0); \ 2283: code1 = GET_CODE (xplus1); \ 2284: } \ 2285: \ 2286: if (code0 == REG && REG_OK_FOR_BASE_P (xplus0) \ 2287: && code1 == CONST_INT && !SMALL_INT (xplus1)) \ 2288: { \ 2289: rtx int_reg = gen_reg_rtx (Pmode); \ 2290: rtx ptr_reg = gen_reg_rtx (Pmode); \ 2291: \ 2292: emit_move_insn (int_reg, \ 2293: GEN_INT (INTVAL (xplus1) & ~ 0x7fff)); \ 2294: \ 2295: emit_insn (gen_rtx (SET, VOIDmode, \ 2296: ptr_reg, \ 2297: gen_rtx (PLUS, Pmode, xplus0, int_reg))); \ 2298: \ 2299: X = gen_rtx (PLUS, Pmode, ptr_reg, \ 2300: GEN_INT (INTVAL (xplus1) & 0x7fff)); \ 2301: goto WIN; \ 2302: } \ 2303: } \ 2304: \ 2305: if (TARGET_DEBUG_B_MODE) \ 2306: GO_PRINTF ("LEGITIMIZE_ADDRESS could not fix.\n"); \ 2307: } 2308: 2309: 2310: /* A C statement or compound statement with a conditional `goto 2311: LABEL;' executed if memory address X (an RTX) can have different 2312: meanings depending on the machine mode of the memory reference it 2313: is used for. 2314: 2315: Autoincrement and autodecrement addresses typically have 2316: mode-dependent effects because the amount of the increment or 2317: decrement is the size of the operand being addressed. Some 2318: machines have other mode-dependent addresses. Many RISC machines 2319: have no mode-dependent addresses. 2320: 2321: You may assume that ADDR is a valid address for the machine. */ 2322: 2323: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {} 2324: 2325: 2326: /* Define this macro if references to a symbol must be treated 2327: differently depending on something about the variable or 2328: function named by the symbol (such as what section it is in). 2329: 2330: The macro definition, if any, is executed immediately after the 2331: rtl for DECL has been created and stored in `DECL_RTL (DECL)'. 2332: The value of the rtl will be a `mem' whose address is a 2333: `symbol_ref'. 2334: 2335: The usual thing for this macro to do is to a flag in the 2336: `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified 2337: name string in the `symbol_ref' (if one bit is not enough 2338: information). 2339: 2340: The best way to modify the name string is by adding text to the 2341: beginning, with suitable punctuation to prevent any ambiguity. 2342: Allocate the new name in `saveable_obstack'. You will have to 2343: modify `ASM_OUTPUT_LABELREF' to remove and decode the added text 2344: and output the name accordingly. 2345: 2346: You can also check the information stored in the `symbol_ref' in 2347: the definition of `GO_IF_LEGITIMATE_ADDRESS' or 2348: `PRINT_OPERAND_ADDRESS'. */ 2349: 2350: #define ENCODE_SECTION_INFO(DECL) \ 2351: do \ 2352: { \ 2353: if (optimize && mips_section_threshold > 0 && TARGET_GP_OPT \ 2354: && TREE_CODE (DECL) == VAR_DECL) \ 2355: { \ 2356: int size = int_size_in_bytes (TREE_TYPE (DECL)); \ 2357: \ 2358: if (size > 0 && size <= mips_section_threshold) \ 2359: SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \ 2360: } \ 2361: \ 2362: else if (HALF_PIC_P ()) \ 2363: HALF_PIC_ENCODE (DECL); \ 2364: } \ 2365: while (0) 2366: 2367: 2368: /* Specify the machine mode that this machine uses 2369: for the index in the tablejump instruction. */ 2370: #define CASE_VECTOR_MODE SImode 2371: 2372: /* Define this if the tablejump instruction expects the table 2373: to contain offsets from the address of the table. 2374: Do not define this if the table should contain absolute addresses. */ 2375: /* #define CASE_VECTOR_PC_RELATIVE */ 2376: 2377: /* Specify the tree operation to be used to convert reals to integers. */ 2378: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR 2379: 2380: /* This is the kind of divide that is easiest to do in the general case. */ 2381: #define EASY_DIV_EXPR TRUNC_DIV_EXPR 2382: 2383: /* Define this as 1 if `char' should by default be signed; else as 0. */ 2384: #ifndef DEFAULT_SIGNED_CHAR 2385: #define DEFAULT_SIGNED_CHAR 1 2386: #endif 2387: 2388: /* Max number of bytes we can move from memory to memory 2389: in one reasonably fast instruction. */ 2390: #define MOVE_MAX 4 2391: 2392: /* Define this macro as a C expression which is nonzero if 2393: accessing less than a word of memory (i.e. a `char' or a 2394: `short') is no faster than accessing a word of memory, i.e., if 2395: such access require more than one instruction or if there is no 2396: difference in cost between byte and (aligned) word loads. 2397: 2398: On RISC machines, it tends to generate better code to define 2399: this as 1, since it avoids making a QI or HI mode register. */ 2400: #define SLOW_BYTE_ACCESS 1 2401: 2402: /* We assume that the store-condition-codes instructions store 0 for false 2403: and some other value for true. This is the value stored for true. */ 2404: 2405: #define STORE_FLAG_VALUE 1 2406: 2407: /* Define this if zero-extension is slow (more than one real instruction). */ 2408: #define SLOW_ZERO_EXTEND 2409: 1.1.1.2 ! root 2410: /* Define this to be nonzero if shift instructions ignore all but the low-order ! 2411: few bits. */ ! 2412: #define SHIFT_COUNT_TRUNCATED 1 1.1 root 2413: 2414: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 2415: is done just by pretending it is already truncated. */ 2416: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 2417: 2418: /* Define this macro to control use of the character `$' in 2419: identifier names. The value should be 0, 1, or 2. 0 means `$' 2420: is not allowed by default; 1 means it is allowed by default if 2421: `-traditional' is used; 2 means it is allowed by default provided 2422: `-ansi' is not used. 1 is the default; there is no need to 2423: define this macro in that case. */ 2424: 2425: #ifndef DOLLARS_IN_IDENTIFIERS 2426: #define DOLLARS_IN_IDENTIFIERS 1 2427: #endif 2428: 2429: /* Specify the machine mode that pointers have. 2430: After generation of rtl, the compiler makes no further distinction 2431: between pointers and any other objects of this machine mode. */ 2432: #define Pmode SImode 2433: 2434: /* A function address in a call instruction 2435: is a word address (for indexing purposes) 2436: so give the MEM rtx a words's mode. */ 2437: 2438: #define FUNCTION_MODE SImode 2439: 2440: /* Define TARGET_MEM_FUNCTIONS if we want to use calls to memcpy and 2441: memset, instead of the BSD functions bcopy and bzero. */ 2442: 2443: #if defined(MIPS_SYSV) || defined(OSF_OS) 2444: #define TARGET_MEM_FUNCTIONS 2445: #endif 2446: 2447: 2448: /* A part of a C `switch' statement that describes the relative 2449: costs of constant RTL expressions. It must contain `case' 2450: labels for expression codes `const_int', `const', `symbol_ref', 2451: `label_ref' and `const_double'. Each case must ultimately reach 2452: a `return' statement to return the relative cost of the use of 2453: that kind of constant value in an expression. The cost may 2454: depend on the precise value of the constant, which is available 2455: for examination in X. 2456: 2457: CODE is the expression code--redundant, since it can be obtained 2458: with `GET_CODE (X)'. */ 2459: 2460: #define CONST_COSTS(X,CODE,OUTER_CODE) \ 2461: case CONST_INT: \ 2462: /* Always return 0, since we don't have different sized \ 2463: instructions, hence different costs according to Richard \ 2464: Kenner */ \ 2465: return COSTS_N_INSNS (0); \ 2466: \ 2467: case LABEL_REF: \ 2468: return COSTS_N_INSNS (2); \ 2469: \ 2470: case CONST: \ 2471: { \ 2472: rtx offset = const0_rtx; \ 2473: rtx symref = eliminate_constant_term (X, &offset); \ 2474: \ 2475: if (GET_CODE (symref) == LABEL_REF) \ 2476: return COSTS_N_INSNS (2); \ 2477: \ 2478: if (GET_CODE (symref) != SYMBOL_REF) \ 2479: return COSTS_N_INSNS (4); \ 2480: \ 2481: /* let's be paranoid.... */ \ 2482: if (INTVAL (offset) < -32768 || INTVAL (offset) > 32767) \ 2483: return COSTS_N_INSNS (2); \ 2484: \ 2485: return COSTS_N_INSNS (SYMBOL_REF_FLAG (symref) ? 1 : 2); \ 2486: } \ 2487: \ 2488: case SYMBOL_REF: \ 2489: return COSTS_N_INSNS (SYMBOL_REF_FLAG (X) ? 1 : 2); \ 2490: \ 2491: case CONST_DOUBLE: \ 2492: return COSTS_N_INSNS ((CONST_DOUBLE_HIGH (X) == 0 \ 2493: && CONST_DOUBLE_LOW (X)) ? 2 : 4); 2494: 2495: 2496: /* Like `CONST_COSTS' but applies to nonconstant RTL expressions. 2497: This can be used, for example, to indicate how costly a multiply 2498: instruction is. In writing this macro, you can use the construct 2499: `COSTS_N_INSNS (N)' to specify a cost equal to N fast instructions. 2500: 2501: This macro is optional; do not define it if the default cost 2502: assumptions are adequate for the target machine. 2503: 2504: If -mdebugd is used, change the multiply cost to 2, so multiply by 2505: a constant isn't converted to a series of shifts. This helps 2506: strength reduction, and also makes it easier to identify what the 2507: compiler is doing. */ 2508: 2509: #define RTX_COSTS(X,CODE,OUTER_CODE) \ 2510: case MEM: \ 2511: { \ 2512: int num_words = (GET_MODE_SIZE (GET_MODE (X)) > UNITS_PER_WORD) ? 2 : 1; \ 2513: if (simple_memory_operand (X, GET_MODE (X))) \ 2514: return COSTS_N_INSNS (num_words); \ 2515: \ 2516: return COSTS_N_INSNS (2*num_words); \ 2517: } \ 2518: \ 2519: case FFS: \ 2520: return COSTS_N_INSNS (6); \ 2521: \ 2522: case NOT: \ 2523: return COSTS_N_INSNS ((GET_MODE (X) == DImode) ? 2 : 1); \ 2524: \ 2525: case AND: \ 2526: case IOR: \ 2527: case XOR: \ 2528: if (GET_MODE (X) == DImode) \ 2529: return COSTS_N_INSNS (2); \ 2530: \ 2531: if (GET_CODE (XEXP (X, 1)) == CONST_INT) \ 2532: { \ 2533: rtx number = XEXP (X, 1); \ 2534: if (SMALL_INT_UNSIGNED (number)) \ 2535: return COSTS_N_INSNS (1); \ 2536: \ 2537: else if (SMALL_INT (number)) \ 2538: return COSTS_N_INSNS (2); \ 2539: \ 2540: return COSTS_N_INSNS (3); \ 2541: } \ 2542: \ 2543: return COSTS_N_INSNS (1); \ 2544: \ 2545: case ASHIFT: \ 2546: case ASHIFTRT: \ 2547: case LSHIFT: \ 2548: case LSHIFTRT: \ 2549: if (GET_MODE (X) == DImode) \ 2550: return COSTS_N_INSNS ((GET_CODE (XEXP (X, 1)) == CONST_INT) ? 12 : 4); \ 2551: \ 2552: return COSTS_N_INSNS (1); \ 2553: \ 2554: case ABS: \ 2555: { \ 2556: enum machine_mode xmode = GET_MODE (X); \ 2557: if (xmode == SFmode || xmode == DFmode) \ 2558: return COSTS_N_INSNS (1); \ 2559: \ 2560: return COSTS_N_INSNS (4); \ 2561: } \ 2562: \ 2563: case PLUS: \ 2564: case MINUS: \ 2565: { \ 2566: enum machine_mode xmode = GET_MODE (X); \ 2567: if (xmode == SFmode || xmode == DFmode) \ 2568: return COSTS_N_INSNS (2); \ 2569: \ 2570: if (xmode == DImode) \ 2571: return COSTS_N_INSNS (4); \ 2572: \ 2573: return COSTS_N_INSNS (1); \ 2574: } \ 2575: \ 2576: case NEG: \ 2577: return COSTS_N_INSNS ((GET_MODE (X) == DImode) ? 4 : 1); \ 2578: \ 2579: case MULT: \ 2580: { \ 2581: enum machine_mode xmode = GET_MODE (X); \ 2582: if (xmode == SFmode) \ 2583: return COSTS_N_INSNS (4); \ 2584: \ 2585: if (xmode == DFmode) \ 2586: return COSTS_N_INSNS (5); \ 2587: \ 2588: return COSTS_N_INSNS (12); \ 2589: } \ 2590: \ 2591: case DIV: \ 2592: case MOD: \ 2593: { \ 2594: enum machine_mode xmode = GET_MODE (X); \ 2595: if (xmode == SFmode) \ 2596: return COSTS_N_INSNS (12); \ 2597: \ 2598: if (xmode == DFmode) \ 2599: return COSTS_N_INSNS (19); \ 2600: } \ 2601: /* fall through */ \ 2602: \ 2603: case UDIV: \ 2604: case UMOD: \ 2605: return COSTS_N_INSNS (35); 2606: 2607: /* An expression giving the cost of an addressing mode that 2608: contains ADDRESS. If not defined, the cost is computed from the 2609: form of the ADDRESS expression and the `CONST_COSTS' values. 2610: 2611: For most CISC machines, the default cost is a good approximation 2612: of the true cost of the addressing mode. However, on RISC 2613: machines, all instructions normally have the same length and 2614: execution time. Hence all addresses will have equal costs. 2615: 2616: In cases where more than one form of an address is known, the 2617: form with the lowest cost will be used. If multiple forms have 2618: the same, lowest, cost, the one that is the most complex will be 2619: used. 2620: 2621: For example, suppose an address that is equal to the sum of a 2622: register and a constant is used twice in the same basic block. 2623: When this macro is not defined, the address will be computed in 2624: a register and memory references will be indirect through that 2625: register. On machines where the cost of the addressing mode 2626: containing the sum is no higher than that of a simple indirect 2627: reference, this will produce an additional instruction and 2628: possibly require an additional register. Proper specification 2629: of this macro eliminates this overhead for such machines. 2630: 2631: Similar use of this macro is made in strength reduction of loops. 2632: 2633: ADDRESS need not be valid as an address. In such a case, the 2634: cost is not relevant and can be any value; invalid addresses 2635: need not be assigned a different cost. 2636: 2637: On machines where an address involving more than one register is 2638: as cheap as an address computation involving only one register, 2639: defining `ADDRESS_COST' to reflect this can cause two registers 2640: to be live over a region of code where only one would have been 2641: if `ADDRESS_COST' were not defined in that manner. This effect 2642: should be considered in the definition of this macro. 2643: Equivalent costs should probably only be given to addresses with 2644: different numbers of registers on machines with lots of registers. 2645: 2646: This macro will normally either not be defined or be defined as 2647: a constant. */ 2648: 2649: #define ADDRESS_COST(ADDR) (REG_P (ADDR) ? 1 : mips_address_cost (ADDR)) 2650: 2651: /* A C expression for the cost of moving data from a register in 2652: class FROM to one in class TO. The classes are expressed using 2653: the enumeration values such as `GENERAL_REGS'. A value of 2 is 2654: the default; other values are interpreted relative to that. 2655: 2656: It is not required that the cost always equal 2 when FROM is the 2657: same as TO; on some machines it is expensive to move between 2658: registers if they are not general registers. 2659: 2660: If reload sees an insn consisting of a single `set' between two 2661: hard registers, and if `REGISTER_MOVE_COST' applied to their 2662: classes returns a value of 2, reload does not check to ensure 2663: that the constraints of the insn are met. Setting a cost of 2664: other than 2 will allow reload to verify that the constraints are 2665: met. You should do this if the `movM' pattern's constraints do 2666: not allow such copying. */ 2667: 2668: #define REGISTER_MOVE_COST(FROM, TO) 4 /* force reload to use constraints */ 2669: 2670: /* A C expression for the cost of a branch instruction. A value of 2671: 1 is the default; other values are interpreted relative to that. */ 2672: 2673: #define BRANCH_COST \ 2674: ((mips_cpu == PROCESSOR_R4000 || mips_cpu == PROCESSOR_R6000) ? 2 : 1) 2675: 2676: 2677: /* Used in by the peephole code. */ 2678: #define classify_op(op,mode) (mips_rtx_classify[ (int)GET_CODE (op) ]) 2679: #define additive_op(op,mode) ((classify_op (op,mode) & CLASS_ADD_OP) != 0) 2680: #define divmod_op(op,mode) ((classify_op (op,mode) & CLASS_DIVMOD_OP) != 0) 2681: #define unsigned_op(op,mode) ((classify_op (op,mode) & CLASS_UNSIGNED_OP) != 0) 2682: 2683: #define CLASS_ADD_OP 0x01 /* operator is PLUS/MINUS */ 2684: #define CLASS_DIVMOD_OP 0x02 /* operator is {,U}{DIV,MOD} */ 2685: #define CLASS_UNSIGNED_OP 0x04 /* operator is U{DIV,MOD} */ 2686: #define CLASS_CMP_OP 0x08 /* operator is comparison */ 2687: #define CLASS_EQUALITY_OP 0x10 /* operator is == or != */ 2688: #define CLASS_FCMP_OP 0x08 /* operator is fp. compare */ 2689: 2690: #define CLASS_UNS_CMP_OP (CLASS_UNSIGNED_OP | CLASS_CMP_OP) 2691: 2692: 2693: /* Optionally define this if you have added predicates to 2694: `MACHINE.c'. This macro is called within an initializer of an 2695: array of structures. The first field in the structure is the 2696: name of a predicate and the second field is an array of rtl 2697: codes. For each predicate, list all rtl codes that can be in 2698: expressions matched by the predicate. The list should have a 2699: trailing comma. Here is an example of two entries in the list 2700: for a typical RISC machine: 2701: 2702: #define PREDICATE_CODES \ 2703: {"gen_reg_rtx_operand", {SUBREG, REG}}, \ 2704: {"reg_or_short_cint_operand", {SUBREG, REG, CONST_INT}}, 2705: 2706: Defining this macro does not affect the generated code (however, 2707: incorrect definitions that omit an rtl code that may be matched 2708: by the predicate can cause the compiler to malfunction). 2709: Instead, it allows the table built by `genrecog' to be more 2710: compact and efficient, thus speeding up the compiler. The most 2711: important predicates to include in the list specified by this 2712: macro are thoses used in the most insn patterns. */ 2713: 2714: #define PREDICATE_CODES \ 2715: {"uns_arith_operand", { REG, CONST_INT, SUBREG }}, \ 2716: {"arith_operand", { REG, CONST_INT, SUBREG }}, \ 2717: {"arith32_operand", { REG, CONST_INT, SUBREG }}, \ 2718: {"reg_or_0_operand", { REG, CONST_INT, SUBREG }}, \ 2719: {"small_int", { CONST_INT }}, \ 2720: {"large_int", { CONST_INT }}, \ 2721: {"md_register_operand", { REG }}, \ 2722: {"mips_const_double_ok", { CONST_DOUBLE }}, \ 2723: {"simple_memory_operand", { MEM, SUBREG }}, \ 2724: {"equality_op", { EQ, NE }}, \ 2725: {"cmp_op", { EQ, NE, GT, GE, GTU, GEU, LT, LE, \ 2726: LTU, LEU }}, \ 2727: {"cmp2_op", { EQ, NE, GT, GE, GTU, GEU, LT, LE, \ 2728: LTU, LEU }}, \ 2729: {"fcmp_op", { EQ, NE, GT, GE, LT, LE }}, \ 1.1.1.2 ! root 2730: {"pc_or_label_operand", { PC, LABEL_REF }}, \ ! 2731: {"call_insn_operand", { MEM }}, \ 1.1 root 2732: {"uns_cmp_op", { GTU, GEU, LTU, LEU }}, 2733: 2734: 2735: /* If defined, a C statement to be executed just prior to the 2736: output of assembler code for INSN, to modify the extracted 2737: operands so they will be output differently. 2738: 2739: Here the argument OPVEC is the vector containing the operands 2740: extracted from INSN, and NOPERANDS is the number of elements of 2741: the vector which contain meaningful data for this insn. The 2742: contents of this vector are what will be used to convert the 2743: insn template into assembler code, so you can change the 2744: assembler output by changing the contents of the vector. 2745: 2746: We use it to check if the current insn needs a nop in front of it 2747: because of load delays, and also to update the delay slot 2748: statistics. */ 2749: 2750: #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \ 2751: final_prescan_insn (INSN, OPVEC, NOPERANDS) 2752: 2753: 2754: /* Tell final.c how to eliminate redundant test instructions. 2755: Here we define machine-dependent flags and fields in cc_status 2756: (see `conditions.h'). */ 2757: 2758: /* A C compound statement to set the components of `cc_status' 2759: appropriately for an insn INSN whose body is EXP. It is this 2760: macro's responsibility to recognize insns that set the condition 2761: code as a byproduct of other activity as well as those that 2762: explicitly set `(cc0)'. 2763: 2764: This macro is not used on machines that do not use `cc0'. */ 2765: 2766: #define NOTICE_UPDATE_CC(EXP, INSN) \ 2767: do \ 2768: { \ 2769: enum attr_type type = get_attr_type (INSN); \ 2770: if (type == TYPE_ICMP || type == TYPE_FCMP) \ 2771: CC_STATUS_INIT; \ 2772: } \ 2773: while (0) 2774: 2775: /* A list of names to be used for additional modes for condition code 2776: values in registers. These names are added to `enum machine_mode' 2777: and all have class `MODE_CC'. By convention, they should start 2778: with `CC' and end with `mode'. 2779: 2780: You should only define this macro if your machine does not use 2781: `cc0' and only if additional modes are required. 2782: 2783: On the MIPS, we use CC_FPmode for all floating point except for not 2784: equal, CC_REV_FPmode for not equal (to reverse the sense of the 2785: jump), CC_EQmode for integer equality/inequality comparisons, 2786: CC_0mode for comparisons against 0, and CCmode for other integer 2787: comparisons. */ 2788: 2789: #define EXTRA_CC_MODES CC_EQmode, CC_FPmode, CC_0mode, CC_REV_FPmode 2790: 2791: /* A list of C strings giving the names for the modes listed in 2792: `EXTRA_CC_MODES'. */ 2793: 2794: #define EXTRA_CC_NAMES "CC_EQ", "CC_FP", "CC_0", "CC_REV_FP" 2795: 2796: /* Returns a mode from class `MODE_CC' to be used when comparison 2797: operation code OP is applied to rtx X. */ 2798: 2799: #define SELECT_CC_MODE(OP, X, Y) \ 2800: (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \ 2801: ? SImode \ 2802: : ((OP == NE) ? CC_REV_FPmode : CC_FPmode)) 2803: 2804: 2805: /* Control the assembler format that we output. */ 2806: 2807: /* Output at beginning of assembler file. 2808: If we are optimizing to use the global pointer, create a temporary 2809: file to hold all of the text stuff, and write it out to the end. 2810: This is needed because the MIPS assembler is evidently one pass, 2811: and if it hasn't seen the relevant .comm/.lcomm/.extern/.sdata 2812: declaration when the code is processed, it generates a two 2813: instruction sequence. */ 2814: 2815: #define ASM_FILE_START(STREAM) mips_asm_file_start (STREAM) 2816: 2817: /* Output to assembler file text saying following lines 2818: may contain character constants, extra white space, comments, etc. */ 2819: 2820: #define ASM_APP_ON " #APP\n" 2821: 2822: /* Output to assembler file text saying following lines 2823: no longer contain unusual constructs. */ 2824: 2825: #define ASM_APP_OFF " #NO_APP\n" 2826: 2827: /* How to refer to registers in assembler output. 2828: This sequence is indexed by compiler's hard-register-number (see above). 2829: 2830: In order to support the two different conventions for register names, 2831: we use the name of a table set up in mips.c, which is overwritten 2832: if -mrnames is used. */ 2833: 2834: #define REGISTER_NAMES \ 2835: { \ 2836: &mips_reg_names[ 0][0], \ 2837: &mips_reg_names[ 1][0], \ 2838: &mips_reg_names[ 2][0], \ 2839: &mips_reg_names[ 3][0], \ 2840: &mips_reg_names[ 4][0], \ 2841: &mips_reg_names[ 5][0], \ 2842: &mips_reg_names[ 6][0], \ 2843: &mips_reg_names[ 7][0], \ 2844: &mips_reg_names[ 8][0], \ 2845: &mips_reg_names[ 9][0], \ 2846: &mips_reg_names[10][0], \ 2847: &mips_reg_names[11][0], \ 2848: &mips_reg_names[12][0], \ 2849: &mips_reg_names[13][0], \ 2850: &mips_reg_names[14][0], \ 2851: &mips_reg_names[15][0], \ 2852: &mips_reg_names[16][0], \ 2853: &mips_reg_names[17][0], \ 2854: &mips_reg_names[18][0], \ 2855: &mips_reg_names[19][0], \ 2856: &mips_reg_names[20][0], \ 2857: &mips_reg_names[21][0], \ 2858: &mips_reg_names[22][0], \ 2859: &mips_reg_names[23][0], \ 2860: &mips_reg_names[24][0], \ 2861: &mips_reg_names[25][0], \ 2862: &mips_reg_names[26][0], \ 2863: &mips_reg_names[27][0], \ 2864: &mips_reg_names[28][0], \ 2865: &mips_reg_names[29][0], \ 2866: &mips_reg_names[30][0], \ 2867: &mips_reg_names[31][0], \ 2868: &mips_reg_names[32][0], \ 2869: &mips_reg_names[33][0], \ 2870: &mips_reg_names[34][0], \ 2871: &mips_reg_names[35][0], \ 2872: &mips_reg_names[36][0], \ 2873: &mips_reg_names[37][0], \ 2874: &mips_reg_names[38][0], \ 2875: &mips_reg_names[39][0], \ 2876: &mips_reg_names[40][0], \ 2877: &mips_reg_names[41][0], \ 2878: &mips_reg_names[42][0], \ 2879: &mips_reg_names[43][0], \ 2880: &mips_reg_names[44][0], \ 2881: &mips_reg_names[45][0], \ 2882: &mips_reg_names[46][0], \ 2883: &mips_reg_names[47][0], \ 2884: &mips_reg_names[48][0], \ 2885: &mips_reg_names[49][0], \ 2886: &mips_reg_names[50][0], \ 2887: &mips_reg_names[51][0], \ 2888: &mips_reg_names[52][0], \ 2889: &mips_reg_names[53][0], \ 2890: &mips_reg_names[54][0], \ 2891: &mips_reg_names[55][0], \ 2892: &mips_reg_names[56][0], \ 2893: &mips_reg_names[57][0], \ 2894: &mips_reg_names[58][0], \ 2895: &mips_reg_names[59][0], \ 2896: &mips_reg_names[60][0], \ 2897: &mips_reg_names[61][0], \ 2898: &mips_reg_names[62][0], \ 2899: &mips_reg_names[63][0], \ 2900: &mips_reg_names[64][0], \ 2901: &mips_reg_names[65][0], \ 2902: &mips_reg_names[66][0], \ 2903: } 2904: 2905: /* print-rtl.c can't use REGISTER_NAMES, since it depends on mips.c. 2906: So define this for it. */ 2907: #define DEBUG_REGISTER_NAMES \ 2908: { \ 2909: "$0", "at", "v0", "v1", "a0", "a1", "a2", "a3", \ 2910: "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \ 2911: "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \ 2912: "t8", "t9", "k0", "k1", "gp", "sp", "$fp", "ra", \ 2913: "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", \ 2914: "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \ 2915: "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", \ 2916: "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", \ 2917: "hi", "lo", "$fcr31" \ 2918: } 2919: 2920: /* If defined, a C initializer for an array of structures 2921: containing a name and a register number. This macro defines 2922: additional names for hard registers, thus allowing the `asm' 2923: option in declarations to refer to registers using alternate 2924: names. 2925: 2926: We define both names for the integer registers here. */ 2927: 2928: #define ADDITIONAL_REGISTER_NAMES \ 2929: { \ 2930: { "$0", 0 + GP_REG_FIRST }, \ 2931: { "$1", 1 + GP_REG_FIRST }, \ 2932: { "$2", 2 + GP_REG_FIRST }, \ 2933: { "$3", 3 + GP_REG_FIRST }, \ 2934: { "$4", 4 + GP_REG_FIRST }, \ 2935: { "$5", 5 + GP_REG_FIRST }, \ 2936: { "$6", 6 + GP_REG_FIRST }, \ 2937: { "$7", 7 + GP_REG_FIRST }, \ 2938: { "$8", 8 + GP_REG_FIRST }, \ 2939: { "$9", 9 + GP_REG_FIRST }, \ 2940: { "$10", 10 + GP_REG_FIRST }, \ 2941: { "$11", 11 + GP_REG_FIRST }, \ 2942: { "$12", 12 + GP_REG_FIRST }, \ 2943: { "$13", 13 + GP_REG_FIRST }, \ 2944: { "$14", 14 + GP_REG_FIRST }, \ 2945: { "$15", 15 + GP_REG_FIRST }, \ 2946: { "$16", 16 + GP_REG_FIRST }, \ 2947: { "$17", 17 + GP_REG_FIRST }, \ 2948: { "$18", 18 + GP_REG_FIRST }, \ 2949: { "$19", 19 + GP_REG_FIRST }, \ 2950: { "$20", 20 + GP_REG_FIRST }, \ 2951: { "$21", 21 + GP_REG_FIRST }, \ 2952: { "$22", 22 + GP_REG_FIRST }, \ 2953: { "$23", 23 + GP_REG_FIRST }, \ 2954: { "$24", 24 + GP_REG_FIRST }, \ 2955: { "$25", 25 + GP_REG_FIRST }, \ 2956: { "$26", 26 + GP_REG_FIRST }, \ 2957: { "$27", 27 + GP_REG_FIRST }, \ 2958: { "$28", 28 + GP_REG_FIRST }, \ 2959: { "$29", 29 + GP_REG_FIRST }, \ 2960: { "$30", 30 + GP_REG_FIRST }, \ 2961: { "$31", 31 + GP_REG_FIRST }, \ 2962: { "$sp", 29 + GP_REG_FIRST }, \ 2963: { "$fp", 30 + GP_REG_FIRST }, \ 2964: { "at", 1 + GP_REG_FIRST }, \ 2965: { "v0", 2 + GP_REG_FIRST }, \ 2966: { "v1", 3 + GP_REG_FIRST }, \ 2967: { "a0", 4 + GP_REG_FIRST }, \ 2968: { "a1", 5 + GP_REG_FIRST }, \ 2969: { "a2", 6 + GP_REG_FIRST }, \ 2970: { "a3", 7 + GP_REG_FIRST }, \ 2971: { "t0", 8 + GP_REG_FIRST }, \ 2972: { "t1", 9 + GP_REG_FIRST }, \ 2973: { "t2", 10 + GP_REG_FIRST }, \ 2974: { "t3", 11 + GP_REG_FIRST }, \ 2975: { "t4", 12 + GP_REG_FIRST }, \ 2976: { "t5", 13 + GP_REG_FIRST }, \ 2977: { "t6", 14 + GP_REG_FIRST }, \ 2978: { "t7", 15 + GP_REG_FIRST }, \ 2979: { "s0", 16 + GP_REG_FIRST }, \ 2980: { "s1", 17 + GP_REG_FIRST }, \ 2981: { "s2", 18 + GP_REG_FIRST }, \ 2982: { "s3", 19 + GP_REG_FIRST }, \ 2983: { "s4", 20 + GP_REG_FIRST }, \ 2984: { "s5", 21 + GP_REG_FIRST }, \ 2985: { "s6", 22 + GP_REG_FIRST }, \ 2986: { "s7", 23 + GP_REG_FIRST }, \ 2987: { "t8", 24 + GP_REG_FIRST }, \ 2988: { "t9", 25 + GP_REG_FIRST }, \ 2989: { "k0", 26 + GP_REG_FIRST }, \ 2990: { "k1", 27 + GP_REG_FIRST }, \ 2991: { "gp", 28 + GP_REG_FIRST }, \ 2992: { "sp", 29 + GP_REG_FIRST }, \ 2993: { "fp", 30 + GP_REG_FIRST }, \ 2994: { "ra", 31 + GP_REG_FIRST }, \ 2995: { "$sp", 29 + GP_REG_FIRST }, \ 2996: { "$fp", 30 + GP_REG_FIRST }, \ 2997: { "cc", FPSW_REGNUM }, \ 2998: } 2999: 3000: /* Define results of standard character escape sequences. */ 3001: #define TARGET_BELL 007 3002: #define TARGET_BS 010 3003: #define TARGET_TAB 011 3004: #define TARGET_NEWLINE 012 3005: #define TARGET_VT 013 3006: #define TARGET_FF 014 3007: #define TARGET_CR 015 3008: 3009: /* A C compound statement to output to stdio stream STREAM the 3010: assembler syntax for an instruction operand X. X is an RTL 3011: expression. 3012: 3013: CODE is a value that can be used to specify one of several ways 3014: of printing the operand. It is used when identical operands 3015: must be printed differently depending on the context. CODE 3016: comes from the `%' specification that was used to request 3017: printing of the operand. If the specification was just `%DIGIT' 3018: then CODE is 0; if the specification was `%LTR DIGIT' then CODE 3019: is the ASCII code for LTR. 3020: 3021: If X is a register, this macro should print the register's name. 3022: The names can be found in an array `reg_names' whose type is 3023: `char *[]'. `reg_names' is initialized from `REGISTER_NAMES'. 3024: 3025: When the machine description has a specification `%PUNCT' (a `%' 3026: followed by a punctuation character), this macro is called with 3027: a null pointer for X and the punctuation character for CODE. 3028: 3029: See mips.c for the MIPS specific codes. */ 3030: 3031: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) 3032: 3033: /* A C expression which evaluates to true if CODE is a valid 3034: punctuation character for use in the `PRINT_OPERAND' macro. If 3035: `PRINT_OPERAND_PUNCT_VALID_P' is not defined, it means that no 3036: punctuation characters (except for the standard one, `%') are 3037: used in this way. */ 3038: 3039: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) mips_print_operand_punct[CODE] 3040: 3041: /* A C compound statement to output to stdio stream STREAM the 3042: assembler syntax for an instruction operand that is a memory 3043: reference whose address is ADDR. ADDR is an RTL expression. 3044: 3045: On some machines, the syntax for a symbolic address depends on 3046: the section that the address refers to. On these machines, 3047: define the macro `ENCODE_SECTION_INFO' to store the information 3048: into the `symbol_ref', and then check for it here. */ 3049: 3050: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) 3051: 3052: 3053: /* A C statement, to be executed after all slot-filler instructions 3054: have been output. If necessary, call `dbr_sequence_length' to 3055: determine the number of slots filled in a sequence (zero if not 3056: currently outputting a sequence), to decide how many no-ops to 3057: output, or whatever. 3058: 3059: Don't define this macro if it has nothing to do, but it is 3060: helpful in reading assembly output if the extent of the delay 3061: sequence is made explicit (e.g. with white space). 3062: 3063: Note that output routines for instructions with delay slots must 3064: be prepared to deal with not being output as part of a sequence 3065: (i.e. when the scheduling pass is not run, or when no slot 3066: fillers could be found.) The variable `final_sequence' is null 3067: when not processing a sequence, otherwise it contains the 3068: `sequence' rtx being output. */ 3069: 3070: #define DBR_OUTPUT_SEQEND(STREAM) \ 3071: do \ 3072: { \ 3073: if (set_nomacro > 0 && --set_nomacro == 0) \ 3074: fputs ("\t.set\tmacro\n", STREAM); \ 3075: \ 3076: if (set_noreorder > 0 && --set_noreorder == 0) \ 3077: fputs ("\t.set\treorder\n", STREAM); \ 3078: \ 3079: dslots_jump_filled++; \ 3080: fputs ("\n", STREAM); \ 3081: } \ 3082: while (0) 3083: 3084: 3085: /* How to tell the debugger about changes of source files. Note, the 3086: mips ECOFF format cannot deal with changes of files inside of 3087: functions, which means the output of parser generators like bison 3088: is generally not debuggable without using the -l switch. Lose, 3089: lose, lose. Silicon graphics seems to want all .file's hardwired 3090: to 1. */ 3091: 3092: #ifndef SET_FILE_NUMBER 3093: #define SET_FILE_NUMBER() ++num_source_filenames 3094: #endif 3095: 3096: #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \ 3097: mips_output_filename (STREAM, NAME) 3098: 3099: /* This is how to output a note the debugger telling it the line number 3100: to which the following sequence of instructions corresponds. 3101: Silicon graphics puts a label after each .loc. */ 3102: 3103: #ifndef LABEL_AFTER_LOC 3104: #define LABEL_AFTER_LOC(STREAM) 3105: #endif 3106: 3107: #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \ 3108: mips_output_lineno (STREAM, LINE) 3109: 3110: /* The MIPS implementation uses some labels for it's own purposed. The 3111: following lists what labels are created, and are all formed by the 3112: pattern $L[a-z].*. The machine independent portion of GCC creates 3113: labels matching: $L[A-Z][0-9]+ and $L[0-9]+. 3114: 3115: LM[0-9]+ Silicon Graphics/ECOFF stabs label before each stmt. 3116: $Lb[0-9]+ Begin blocks for MIPS debug support 3117: $Lc[0-9]+ Label for use in s<xx> operation. 3118: $Le[0-9]+ End blocks for MIPS debug support 3119: $Lp\..+ Half-pic labels. */ 3120: 3121: /* This is how to output the definition of a user-level label named NAME, 3122: such as the label on a static function or variable NAME. 3123: 3124: If we are optimizing the gp, remember that this label has been put 3125: out, so we know not to emit an .extern for it in mips_asm_file_end. 3126: We use one of the common bits in the IDENTIFIER tree node for this, 3127: since those bits seem to be unused, and we don't have any method 3128: of getting the decl nodes from the name. */ 3129: 3130: #define ASM_OUTPUT_LABEL(STREAM,NAME) \ 3131: do { \ 3132: assemble_name (STREAM, NAME); \ 3133: fputs (":\n", STREAM); \ 3134: } while (0) 3135: 3136: 3137: /* A C statement (sans semicolon) to output to the stdio stream 3138: STREAM any text necessary for declaring the name NAME of an 3139: initialized variable which is being defined. This macro must 3140: output the label definition (perhaps using `ASM_OUTPUT_LABEL'). 3141: The argument DECL is the `VAR_DECL' tree node representing the 3142: variable. 3143: 3144: If this macro is not defined, then the variable name is defined 3145: in the usual manner as a label (by means of `ASM_OUTPUT_LABEL'). */ 3146: 3147: #define ASM_DECLARE_OBJECT_NAME(STREAM, NAME, DECL) \ 3148: do \ 3149: { \ 3150: mips_declare_object (STREAM, NAME, "", ":\n", 0); \ 3151: HALF_PIC_DECLARE (NAME); \ 3152: } \ 3153: while (0) 3154: 3155: 3156: /* This is how to output a command to make the user-level label named NAME 3157: defined for reference from other files. */ 3158: 3159: #define ASM_GLOBALIZE_LABEL(STREAM,NAME) \ 3160: do { \ 3161: fputs ("\t.globl\t", STREAM); \ 3162: assemble_name (STREAM, NAME); \ 3163: fputs ("\n", STREAM); \ 3164: } while (0) 3165: 3166: /* This says how to define a global common symbol. */ 3167: 3168: #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \ 3169: mips_declare_object (STREAM, NAME, "\n\t.comm\t", ",%u\n", (ROUNDED)) 3170: 3171: /* This says how to define a local common symbol (ie, not visible to 3172: linker). */ 3173: 3174: #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \ 3175: mips_declare_object (STREAM, NAME, "\n\t.lcomm\t", ",%u\n", (ROUNDED)) 3176: 3177: 3178: /* This says how to output an external. It would be possible not to 3179: output anything and let undefined symbol become external. However 3180: the assembler uses length information on externals to allocate in 3181: data/sdata bss/sbss, thereby saving exec time. */ 3182: 3183: #define ASM_OUTPUT_EXTERNAL(STREAM,DECL,NAME) \ 3184: mips_output_external(STREAM,DECL,NAME) 3185: 3186: /* This says what to print at the end of the assembly file */ 3187: #define ASM_FILE_END(STREAM) mips_asm_file_end(STREAM) 3188: 3189: 3190: /* This is how to declare a function name. The actual work of 3191: emitting the label is moved to function_prologue, so that we can 3192: get the line number correctly emitted before the .ent directive, 3193: and after any .file directives. 3194: 3195: Also, switch files if we are optimizing the global pointer. */ 3196: 3197: #define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL) \ 3198: { \ 3199: extern FILE *asm_out_text_file; \ 3200: if (TARGET_GP_OPT) \ 3201: STREAM = asm_out_text_file; \ 3202: \ 3203: current_function_name = NAME; \ 3204: HALF_PIC_DECLARE (NAME); \ 3205: } 3206: 3207: /* This is how to output a reference to a user-level label named NAME. 3208: `assemble_name' uses this. */ 3209: 3210: #define ASM_OUTPUT_LABELREF(STREAM,NAME) fprintf (STREAM, "%s", NAME) 3211: 3212: /* This is how to output an internal numbered label where 3213: PREFIX is the class of label and NUM is the number within the class. */ 3214: 3215: #define ASM_OUTPUT_INTERNAL_LABEL(STREAM,PREFIX,NUM) \ 3216: fprintf (STREAM, "$%s%d:\n", PREFIX, NUM) 3217: 3218: /* This is how to store into the string LABEL 3219: the symbol_ref name of an internal numbered label where 3220: PREFIX is the class of label and NUM is the number within the class. 3221: This is suitable for output with `assemble_name'. */ 3222: 3223: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ 3224: sprintf (LABEL, "*$%s%d", PREFIX, NUM) 3225: 3226: /* This is how to output an assembler line defining a `double' constant. */ 3227: 3228: #define ASM_OUTPUT_DOUBLE(STREAM,VALUE) \ 3229: mips_output_double (STREAM, VALUE) 3230: 3231: 3232: /* This is how to output an assembler line defining a `float' constant. */ 3233: 3234: #define ASM_OUTPUT_FLOAT(STREAM,VALUE) \ 3235: mips_output_float (STREAM, VALUE) 3236: 3237: 3238: /* This is how to output an assembler line defining an `int' constant. */ 3239: 3240: #define ASM_OUTPUT_INT(STREAM,VALUE) \ 3241: do { \ 3242: fprintf (STREAM, "\t.word\t"); \ 3243: output_addr_const (STREAM, (VALUE)); \ 3244: fprintf (STREAM, "\n"); \ 3245: } while (0) 3246: 3247: /* Likewise for `char' and `short' constants. */ 3248: 3249: #define ASM_OUTPUT_SHORT(STREAM,VALUE) \ 3250: { \ 3251: fprintf (STREAM, "\t.half\t"); \ 3252: output_addr_const (STREAM, (VALUE)); \ 3253: fprintf (STREAM, "\n"); \ 3254: } 3255: 3256: #define ASM_OUTPUT_CHAR(STREAM,VALUE) \ 3257: { \ 3258: fprintf (STREAM, "\t.byte\t"); \ 3259: output_addr_const (STREAM, (VALUE)); \ 3260: fprintf (STREAM, "\n"); \ 3261: } 3262: 3263: /* This is how to output an assembler line for a numeric constant byte. */ 3264: 3265: #define ASM_OUTPUT_BYTE(STREAM,VALUE) \ 3266: fprintf (STREAM, "\t.byte\t0x%x\n", (VALUE)) 3267: 3268: /* This is how to output an element of a case-vector that is absolute. */ 3269: 3270: #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \ 3271: fprintf (STREAM, "\t.word\t$L%d\n", VALUE) 3272: 3273: /* This is how to output an element of a case-vector that is relative. 3274: (We do not use such vectors, 3275: but we must define this macro anyway.) */ 3276: 3277: #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, VALUE, REL) \ 3278: fprintf (STREAM, "\t.word\t$L%d-$L%d\n", VALUE, REL) 3279: 3280: /* This is how to emit the initial label for switch statements. We 3281: need to put the switch labels somewhere else from the text section, 3282: because the MIPS assembler gets real confused about line numbers if 3283: .word's appear in the text section. */ 3284: 3285: #define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, JUMPTABLE) \ 3286: { \ 3287: rdata_section (); \ 3288: ASM_OUTPUT_ALIGN (STREAM, 2); \ 3289: ASM_OUTPUT_INTERNAL_LABEL (STREAM, PREFIX, NUM); \ 3290: } 3291: 3292: /* This is how to output an assembler line 3293: that says to advance the location counter 3294: to a multiple of 2**LOG bytes. */ 3295: 3296: #define ASM_OUTPUT_ALIGN(STREAM,LOG) \ 3297: { \ 3298: int mask = (1 << (LOG)) - 1; \ 3299: fprintf (STREAM, "\t.align\t%d\n", (LOG)); \ 3300: } 3301: 3302: /* This is how to output an assembler line to to advance the location 3303: counter by SIZE bytes. */ 3304: 3305: #define ASM_OUTPUT_SKIP(STREAM,SIZE) \ 3306: fprintf (STREAM, "\t.space\t%u\n", (SIZE)) 3307: 3308: 3309: /* This is how to output a string. */ 3310: #define ASM_OUTPUT_ASCII(STREAM, STRING, LEN) \ 3311: do { \ 3312: register int i, c, len = (LEN), cur_pos = 17; \ 3313: register unsigned char *string = (unsigned char *)(STRING); \ 3314: fprintf ((STREAM), "\t.ascii\t\""); \ 3315: for (i = 0; i < len; i++) \ 3316: { \ 3317: register int c = string[i]; \ 3318: \ 3319: switch (c) \ 3320: { \ 3321: case '\"': \ 3322: case '\\': \ 3323: putc ('\\', (STREAM)); \ 3324: putc (c, (STREAM)); \ 3325: cur_pos += 2; \ 3326: break; \ 3327: \ 3328: case TARGET_NEWLINE: \ 3329: fputs ("\\n", (STREAM)); \ 3330: if (i+1 < len \ 3331: && (((c = string[i+1]) >= '\040' && c <= '~') \ 3332: || c == TARGET_TAB)) \ 3333: cur_pos = 32767; /* break right here */ \ 3334: else \ 3335: cur_pos += 2; \ 3336: break; \ 3337: \ 3338: case TARGET_TAB: \ 3339: fputs ("\\t", (STREAM)); \ 3340: cur_pos += 2; \ 3341: break; \ 3342: \ 3343: case TARGET_FF: \ 3344: fputs ("\\f", (STREAM)); \ 3345: cur_pos += 2; \ 3346: break; \ 3347: \ 3348: case TARGET_BS: \ 3349: fputs ("\\b", (STREAM)); \ 3350: cur_pos += 2; \ 3351: break; \ 3352: \ 3353: case TARGET_CR: \ 3354: fputs ("\\r", (STREAM)); \ 3355: cur_pos += 2; \ 3356: break; \ 3357: \ 3358: default: \ 3359: if (c >= ' ' && c < 0177) \ 3360: { \ 3361: putc (c, (STREAM)); \ 3362: cur_pos++; \ 3363: } \ 3364: else \ 3365: { \ 3366: fprintf ((STREAM), "\\%03o", c); \ 3367: cur_pos += 4; \ 3368: } \ 3369: } \ 3370: \ 3371: if (cur_pos > 72 && i+1 < len) \ 3372: { \ 3373: cur_pos = 17; \ 3374: fprintf ((STREAM), "\"\n\t.ascii\t\""); \ 3375: } \ 3376: } \ 3377: fprintf ((STREAM), "\"\n"); \ 3378: } while (0) 3379: 3380: /* Handle certain cpp directives used in header files on sysV. */ 3381: #define SCCS_DIRECTIVE 3382: 3383: /* Output #ident as a in the read-only data section. */ 3384: #define ASM_OUTPUT_IDENT(FILE, STRING) \ 3385: { \ 3386: char *p = STRING; \ 3387: int size = strlen (p) + 1; \ 3388: rdata_section (); \ 3389: assemble_string (p, size); \ 3390: } 3391: 3392: /* Default to -G 8 */ 3393: #ifndef MIPS_DEFAULT_GVALUE 3394: #define MIPS_DEFAULT_GVALUE 8 3395: #endif 3396: 3397: /* Define the strings to put out for each section in the object file. */ 3398: #define TEXT_SECTION_ASM_OP "\t.text" /* instructions */ 3399: #define DATA_SECTION_ASM_OP "\t.data" /* large data */ 3400: #define SDATA_SECTION_ASM_OP "\t.sdata" /* small data */ 3401: #define RDATA_SECTION_ASM_OP "\t.rdata" /* read-only data */ 3402: #define READONLY_DATA_SECTION rdata_section 3403: 3404: /* What other sections we support other than the normal .data/.text. */ 3405: 3406: #define EXTRA_SECTIONS in_sdata, in_rdata, in_last_p1 3407: 3408: /* Define the additional functions to select our additional sections. */ 3409: 3410: /* on the MIPS it is not a good idea to put constants in the text 3411: section, since this defeats the sdata/data mechanism. This is 3412: especially true when -O is used. In this case an effort is made to 3413: address with faster (gp) register relative addressing, which can 3414: only get at sdata and sbss items (there is no stext !!) However, 3415: if the constant is too large for sdata, and it's readonly, it 3416: will go into the .rdata section. */ 3417: 3418: #define EXTRA_SECTION_FUNCTIONS \ 3419: void \ 3420: sdata_section () \ 3421: { \ 3422: if (in_section != in_sdata) \ 3423: { \ 3424: fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \ 3425: in_section = in_sdata; \ 3426: } \ 3427: } \ 3428: \ 3429: void \ 3430: rdata_section () \ 3431: { \ 3432: if (in_section != in_rdata) \ 3433: { \ 3434: fprintf (asm_out_file, "%s\n", RDATA_SECTION_ASM_OP); \ 3435: in_section = in_rdata; \ 3436: } \ 3437: } 3438: 3439: /* Given a decl node or constant node, choose the section to output it in 3440: and select that section. */ 3441: 3442: #define SELECT_RTX_SECTION(MODE,RTX) \ 3443: { \ 3444: if ((GET_MODE_SIZE(MODE) / BITS_PER_UNIT) <= mips_section_threshold \ 3445: && mips_section_threshold > 0) \ 3446: sdata_section (); \ 3447: else \ 3448: rdata_section (); \ 3449: } \ 3450: 3451: #define SELECT_SECTION(DECL, RELOC) \ 3452: { \ 1.1.1.2 ! root 3453: int size = int_size_in_bytes (TREE_TYPE (DECL)); \ ! 3454: \ ! 3455: if (size > 0 && size <= mips_section_threshold) \ 1.1 root 3456: sdata_section (); \ 3457: \ 3458: else if (RELOC) \ 3459: data_section (); \ 3460: \ 3461: else if (TREE_CODE (DECL) == STRING_CST) \ 3462: { \ 3463: if (flag_writable_strings) \ 3464: data_section (); \ 3465: else \ 3466: rdata_section (); \ 3467: } \ 3468: \ 3469: else if (TREE_CODE (DECL) != VAR_DECL) \ 3470: rdata_section (); \ 3471: \ 3472: else if (!TREE_READONLY (DECL)) \ 3473: data_section (); \ 3474: \ 3475: else \ 3476: rdata_section (); \ 3477: } 3478: 3479: 3480: /* Store in OUTPUT a string (made with alloca) containing 3481: an assembler-name for a local static variable named NAME. 3482: LABELNO is an integer which is different for each call. */ 3483: 3484: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ 3485: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ 3486: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) 3487: 3488: #define ASM_OUTPUT_REG_PUSH(STREAM,REGNO) \ 3489: do \ 3490: { \ 3491: fprintf (STREAM, "\tsubu\t%s,%s,8\n\tsw\t%s,0(%s)\n", \ 3492: reg_names[STACK_POINTER_REGNUM], \ 3493: reg_names[STACK_POINTER_REGNUM], \ 3494: reg_names[REGNO], \ 3495: reg_names[STACK_POINTER_REGNUM]); \ 3496: } \ 3497: while (0) 3498: 3499: #define ASM_OUTPUT_REG_POP(STREAM,REGNO) \ 3500: do \ 3501: { \ 3502: if (! set_noreorder) \ 3503: fprintf (STREAM, "\t.set\tnoreorder\n"); \ 3504: \ 3505: dslots_load_total++; \ 3506: dslots_load_filled++; \ 3507: fprintf (STREAM, "\tlw\t%s,0(%s)\n\taddu\t%s,%s,8\n", \ 3508: reg_names[REGNO], \ 3509: reg_names[STACK_POINTER_REGNUM], \ 3510: reg_names[STACK_POINTER_REGNUM], \ 3511: reg_names[STACK_POINTER_REGNUM]); \ 3512: \ 3513: if (! set_noreorder) \ 3514: fprintf (STREAM, "\t.set\treorder\n"); \ 3515: } \ 3516: while (0) 3517: 3518: /* Define the parentheses used to group arithmetic operations 3519: in assembler code. */ 3520: 3521: #define ASM_OPEN_PAREN "(" 3522: #define ASM_CLOSE_PAREN ")" 3523: 3524: /* How to start an assembler comment. */ 3525: #ifndef ASM_COMMENT_START 3526: #define ASM_COMMENT_START "\t\t# " 3527: #endif 3528: 3529: 3530: 3531: /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for 3532: and mips-tdump.c to print them out. 3533: 3534: These must match the corresponding definitions in gdb/mipsread.c. 3535: Unfortunately, gcc and gdb do not currently share any directories. */ 3536: 3537: #define CODE_MASK 0x8F300 3538: #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK) 3539: #define MIPS_MARK_STAB(code) ((code)+CODE_MASK) 3540: #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK) 3541: 3542: 3543: /* Default definitions for size_t and ptrdiff_t. */ 3544: 3545: #ifndef SIZE_TYPE 3546: #define SIZE_TYPE "unsigned int" 3547: #endif 3548: 3549: #ifndef PTRDIFF_TYPE 3550: #define PTRDIFF_TYPE "int" 3551: #endif 3552:
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