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1.1 root 1: /* Definitions of target machine for GNU compiler. MIPS version.
2: Contributed by A. Lichnewsky, [email protected]
3: Changed by Michael Meissner, [email protected]
1.1.1.3 ! root 4: 64 bit r4000 support by Ian Lance Taylor, [email protected], and
! 5: Brendan Eich, [email protected].
! 6: Copyright (C) 1989, 90, 91, 92, 93, 1994 Free Software Foundation, Inc.
1.1 root 7:
8: This file is part of GNU CC.
9:
10: GNU CC is free software; you can redistribute it and/or modify
11: it under the terms of the GNU General Public License as published by
12: the Free Software Foundation; either version 2, or (at your option)
13: any later version.
14:
15: GNU CC is distributed in the hope that it will be useful,
16: but WITHOUT ANY WARRANTY; without even the implied warranty of
17: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18: GNU General Public License for more details.
19:
20: You should have received a copy of the GNU General Public License
21: along with GNU CC; see the file COPYING. If not, write to
22: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
23:
24:
25: /* Make Saber happier on obstack.[ch]. */
26: #if defined(__mips__) || defined(mips)
27: #define __PTR_TO_INT(P) ((int)(P))
28: #define __INT_TO_PTR(P) ((char *)(P))
29: #endif
30:
31: /* Standard GCC variables that we reference. */
32:
33: extern char *asm_file_name;
34: extern char call_used_regs[];
35: extern int current_function_calls_alloca;
36: extern int flag_omit_frame_pointer;
37: extern int frame_pointer_needed;
38: extern char *language_string;
39: extern int may_call_alloca;
40: extern int optimize;
41: extern char **save_argv;
42: extern int target_flags;
43: extern char *version_string;
44:
45: /* MIPS external variables defined in mips.c. */
46:
47: /* comparison type */
48: enum cmp_type {
1.1.1.3 ! root 49: CMP_SI, /* compare four byte integers */
! 50: CMP_DI, /* compare eight byte integers */
1.1 root 51: CMP_SF, /* compare single precision floats */
52: CMP_DF, /* compare double precision floats */
53: CMP_MAX /* max comparison type */
54: };
55:
56: /* types of delay slot */
57: enum delay_type {
58: DELAY_NONE, /* no delay slot */
59: DELAY_LOAD, /* load from memory delay */
60: DELAY_HILO, /* move from/to hi/lo registers */
61: DELAY_FCMP /* delay after doing c.<xx>.{d,s} */
62: };
63:
64: /* Which processor to schedule for. Since there is no difference between
65: a R2000 and R3000 in terms of the scheduler, we collapse them into
66: just an R3000. The elements of the enumeration must match exactly
67: the cpu attribute in the mips.md machine description. */
68:
69: enum processor_type {
70: PROCESSOR_DEFAULT,
71: PROCESSOR_R3000,
72: PROCESSOR_R6000,
1.1.1.3 ! root 73: PROCESSOR_R4000,
! 74: PROCESSOR_R4600
1.1 root 75: };
76:
77: /* Recast the cpu class to be the cpu attribute. */
78: #define mips_cpu_attr ((enum attr_cpu)mips_cpu)
79:
1.1.1.2 root 80: /* Whether to emit abicalls code sequences or not. */
81:
82: enum mips_abicalls_type {
83: MIPS_ABICALLS_NO,
84: MIPS_ABICALLS_YES
85: };
86:
87: /* Recast the abicalls class to be the abicalls attribute. */
88: #define mips_abicalls_attr ((enum attr_abicalls)mips_abicalls)
89:
1.1 root 90: /* Which type of block move to do (whether or not the last store is
91: split out so it can fill a branch delay slot). */
92:
93: enum block_move_type {
94: BLOCK_MOVE_NORMAL, /* generate complete block move */
95: BLOCK_MOVE_NOT_LAST, /* generate all but last store */
96: BLOCK_MOVE_LAST /* generate just the last store */
97: };
98:
99: extern char mips_reg_names[][8]; /* register names (a0 vs. $4). */
100: extern char mips_print_operand_punct[]; /* print_operand punctuation chars */
101: extern char *current_function_name; /* current function being compiled */
102: extern char *current_function_file; /* filename current function is in */
103: extern int num_source_filenames; /* current .file # */
104: extern int inside_function; /* != 0 if inside of a function */
105: extern int ignore_line_number; /* != 0 if we are to ignore next .loc */
106: extern int file_in_function_warning; /* warning given about .file in func */
107: extern int sdb_label_count; /* block start/end next label # */
108: extern int mips_section_threshold; /* # bytes of data/sdata cutoff */
109: extern int g_switch_value; /* value of the -G xx switch */
110: extern int g_switch_set; /* whether -G xx was passed. */
111: extern int sym_lineno; /* sgi next label # for each stmt */
112: extern int set_noreorder; /* # of nested .set noreorder's */
113: extern int set_nomacro; /* # of nested .set nomacro's */
114: extern int set_noat; /* # of nested .set noat's */
115: extern int set_volatile; /* # of nested .set volatile's */
116: extern int mips_branch_likely; /* emit 'l' after br (branch likely) */
117: extern int mips_dbx_regno[]; /* Map register # to debug register # */
118: extern struct rtx_def *branch_cmp[2]; /* operands for compare */
119: extern enum cmp_type branch_type; /* what type of branch to use */
120: extern enum processor_type mips_cpu; /* which cpu are we scheduling for */
1.1.1.2 root 121: extern enum mips_abicalls_type mips_abicalls;/* for svr4 abi pic calls */
1.1 root 122: extern int mips_isa; /* architectural level */
123: extern char *mips_cpu_string; /* for -mcpu=<xxx> */
124: extern char *mips_isa_string; /* for -mips{1,2,3} */
125: extern int dslots_load_total; /* total # load related delay slots */
126: extern int dslots_load_filled; /* # filled load delay slots */
127: extern int dslots_jump_total; /* total # jump related delay slots */
128: extern int dslots_jump_filled; /* # filled jump delay slots */
129: extern int dslots_number_nops; /* # of nops needed by previous insn */
130: extern int num_refs[3]; /* # 1/2/3 word references */
131: extern struct rtx_def *mips_load_reg; /* register to check for load delay */
132: extern struct rtx_def *mips_load_reg2; /* 2nd reg to check for load delay */
133: extern struct rtx_def *mips_load_reg3; /* 3rd reg to check for load delay */
134: extern struct rtx_def *mips_load_reg4; /* 4th reg to check for load delay */
1.1.1.3 ! root 135: extern struct rtx_def *embedded_pic_fnaddr_rtx; /* function address */
1.1 root 136:
137: /* Functions within mips.c that we reference. */
138:
139: extern void abort_with_insn ();
140: extern int arith32_operand ();
141: extern int arith_operand ();
142: extern int cmp_op ();
143: extern long compute_frame_size ();
144: extern int epilogue_reg_mentioned_p ();
145: extern void expand_block_move ();
146: extern int equality_op ();
147: extern void final_prescan_insn ();
148: extern struct rtx_def * function_arg ();
149: extern void function_arg_advance ();
150: extern int function_arg_partial_nregs ();
151: extern void function_epilogue ();
152: extern void function_prologue ();
153: extern void gen_conditional_branch ();
154: extern struct rtx_def * gen_int_relational ();
155: extern void init_cumulative_args ();
156: extern int large_int ();
157: extern int mips_address_cost ();
158: extern void mips_asm_file_end ();
159: extern void mips_asm_file_start ();
160: extern int mips_const_double_ok ();
161: extern void mips_count_memory_refs ();
162: extern int mips_debugger_offset ();
163: extern void mips_declare_object ();
164: extern int mips_epilogue_delay_slots ();
165: extern void mips_expand_epilogue ();
166: extern void mips_expand_prologue ();
167: extern char *mips_fill_delay_slot ();
168: extern char *mips_move_1word ();
169: extern char *mips_move_2words ();
170: extern void mips_output_double ();
171: extern int mips_output_external ();
172: extern void mips_output_float ();
173: extern void mips_output_filename ();
174: extern void mips_output_lineno ();
175: extern char *output_block_move ();
176: extern void override_options ();
177: extern int pc_or_label_operand ();
178: extern void print_operand_address ();
179: extern void print_operand ();
180: extern void print_options ();
181: extern int reg_or_0_operand ();
182: extern int simple_epilogue_p ();
183: extern int simple_memory_operand ();
184: extern int small_int ();
185: extern void trace();
186: extern int uns_arith_operand ();
1.1.1.3 ! root 187: extern struct rtx_def * embedded_pic_offset ();
! 188: extern void mips_finalize_pic ();
1.1 root 189:
190: /* Recognition functions that return if a condition is true. */
191: extern int address_operand ();
192: extern int const_double_operand ();
193: extern int const_int_operand ();
194: extern int general_operand ();
195: extern int immediate_operand ();
196: extern int memory_address_p ();
197: extern int memory_operand ();
198: extern int nonimmediate_operand ();
199: extern int nonmemory_operand ();
200: extern int register_operand ();
201: extern int scratch_operand ();
202:
203: /* Functions to change what output section we are using. */
204: extern void data_section ();
205: extern void rdata_section ();
206: extern void readonly_data_section ();
207: extern void sdata_section ();
208: extern void text_section ();
209:
210: /* Functions in the rest of the compiler that we reference. */
211: extern void abort_with_insn ();
212: extern void debug_rtx ();
213: extern void fatal_io_error ();
214: extern int get_frame_size ();
215: extern int offsettable_address_p ();
216: extern void output_address ();
217: extern char *permalloc ();
218: extern int reg_mentioned_p ();
219:
220: /* Functions in the standard library that we reference. */
221: extern int atoi ();
222: extern char *getenv ();
223: extern char *mktemp ();
224:
225:
226: /* Stubs for half-pic support if not OSF/1 reference platform. */
227:
228: #ifndef HALF_PIC_P
229: #define HALF_PIC_P() 0
230: #define HALF_PIC_NUMBER_PTRS 0
231: #define HALF_PIC_NUMBER_REFS 0
232: #define HALF_PIC_ENCODE(DECL)
233: #define HALF_PIC_DECLARE(NAME)
234: #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
235: #define HALF_PIC_ADDRESS_P(X) 0
236: #define HALF_PIC_PTR(X) X
237: #define HALF_PIC_FINISH(STREAM)
238: #endif
239:
240:
241: /* Run-time compilation parameters selecting different hardware subsets. */
242:
243: /* Macros used in the machine description to test the flags. */
244:
245: /* Bits for real switches */
246: #define MASK_INT64 0x00000001 /* ints are 64 bits */
1.1.1.3 ! root 247: #define MASK_LONG64 0x00000002 /* longs and pointers are 64 bits */
! 248: #define MASK_UNUSED 0x00000004
1.1 root 249: #define MASK_GPOPT 0x00000008 /* Optimize for global pointer */
250: #define MASK_GAS 0x00000010 /* Gas used instead of MIPS as */
251: #define MASK_NAME_REGS 0x00000020 /* Use MIPS s/w reg name convention */
252: #define MASK_STATS 0x00000040 /* print statistics to stderr */
253: #define MASK_MEMCPY 0x00000080 /* call memcpy instead of inline code*/
254: #define MASK_SOFT_FLOAT 0x00000100 /* software floating point */
255: #define MASK_FLOAT64 0x00000200 /* fp registers are 64 bits */
256: #define MASK_ABICALLS 0x00000400 /* emit .abicalls/.cprestore/.cpload */
257: #define MASK_HALF_PIC 0x00000800 /* Emit OSF-style pic refs to externs*/
258: #define MASK_LONG_CALLS 0x00001000 /* Always call through a register */
1.1.1.3 ! root 259: #define MASK_64BIT 0x00002000 /* Use 64 bit GP registers and insns */
! 260: #define MASK_EMBEDDED_PIC 0x00004000 /* Generate embedded PIC code */
! 261: #define MASK_EMBEDDED_DATA 0x00008000 /* Reduce RAM usage, not fast code */
1.1 root 262: #define MASK_UNUSED4 0x00010000
1.1.1.3 ! root 263: #define MASK_UNUSED3 0x00020000
! 264: #define MASK_UNUSED2 0x00040000
! 265: #define MASK_UNUSED1 0x00080000
1.1 root 266:
267: /* Dummy switches used only in spec's*/
268: #define MASK_MIPS_TFILE 0x00000000 /* flag for mips-tfile usage */
269:
270: /* Debug switches, not documented */
271: #define MASK_DEBUG 0x40000000 /* Eliminate version # in .s file */
272: #define MASK_DEBUG_A 0x20000000 /* don't allow <label>($reg) addrs */
273: #define MASK_DEBUG_B 0x10000000 /* GO_IF_LEGITIMATE_ADDRESS debug */
274: #define MASK_DEBUG_C 0x08000000 /* don't expand seq, etc. */
275: #define MASK_DEBUG_D 0x04000000 /* don't do define_split's */
276: #define MASK_DEBUG_E 0x02000000 /* function_arg debug */
277: #define MASK_DEBUG_F 0x01000000 /* don't try to suppress load nop's */
278: #define MASK_DEBUG_G 0x00800000 /* don't support 64 bit arithmetic */
279: #define MASK_DEBUG_H 0x00400000 /* allow ints in FP registers */
280: #define MASK_DEBUG_I 0x00200000 /* unused */
281: #define MASK_DEBUG_J 0x00100000 /* unused */
282:
283: /* r4000 64 bit sizes */
284: #define TARGET_INT64 (target_flags & MASK_INT64)
285: #define TARGET_LONG64 (target_flags & MASK_LONG64)
286: #define TARGET_FLOAT64 (target_flags & MASK_FLOAT64)
1.1.1.3 ! root 287: #define TARGET_64BIT (target_flags & MASK_64BIT)
1.1 root 288:
289: /* Mips vs. GNU assembler */
290: #define TARGET_GAS (target_flags & MASK_GAS)
291: #define TARGET_UNIX_ASM (!TARGET_GAS)
292: #define TARGET_MIPS_AS TARGET_UNIX_ASM
293:
294: /* Debug Mode */
295: #define TARGET_DEBUG_MODE (target_flags & MASK_DEBUG)
296: #define TARGET_DEBUG_A_MODE (target_flags & MASK_DEBUG_A)
297: #define TARGET_DEBUG_B_MODE (target_flags & MASK_DEBUG_B)
298: #define TARGET_DEBUG_C_MODE (target_flags & MASK_DEBUG_C)
299: #define TARGET_DEBUG_D_MODE (target_flags & MASK_DEBUG_D)
300: #define TARGET_DEBUG_E_MODE (target_flags & MASK_DEBUG_E)
301: #define TARGET_DEBUG_F_MODE (target_flags & MASK_DEBUG_F)
302: #define TARGET_DEBUG_G_MODE (target_flags & MASK_DEBUG_G)
303: #define TARGET_DEBUG_H_MODE (target_flags & MASK_DEBUG_H)
304: #define TARGET_DEBUG_I_MODE (target_flags & MASK_DEBUG_I)
305: #define TARGET_DEBUG_J_MODE (target_flags & MASK_DEBUG_J)
306:
307: /* Reg. Naming in .s ($21 vs. $a0) */
308: #define TARGET_NAME_REGS (target_flags & MASK_NAME_REGS)
309:
310: /* Optimize for Sdata/Sbss */
311: #define TARGET_GP_OPT (target_flags & MASK_GPOPT)
312:
313: /* print program statistics */
314: #define TARGET_STATS (target_flags & MASK_STATS)
315:
316: /* call memcpy instead of inline code */
317: #define TARGET_MEMCPY (target_flags & MASK_MEMCPY)
318:
319: /* .abicalls, etc from Pyramid V.4 */
320: #define TARGET_ABICALLS (target_flags & MASK_ABICALLS)
321:
322: /* OSF pic references to externs */
323: #define TARGET_HALF_PIC (target_flags & MASK_HALF_PIC)
324:
325: /* software floating point */
326: #define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT)
327: #define TARGET_HARD_FLOAT (! TARGET_SOFT_FLOAT)
328:
329: /* always call through a register */
330: #define TARGET_LONG_CALLS (target_flags & MASK_LONG_CALLS)
331:
1.1.1.3 ! root 332: /* generate embedded PIC code;
! 333: requires gas. */
! 334: #define TARGET_EMBEDDED_PIC (target_flags & MASK_EMBEDDED_PIC)
! 335:
! 336: /* for embedded systems, optimize for
! 337: reduced RAM space instead of for
! 338: fastest code. */
! 339: #define TARGET_EMBEDDED_DATA (target_flags & MASK_EMBEDDED_DATA)
! 340:
1.1 root 341: /* Macro to define tables used to set the flags.
342: This is a list in braces of pairs in braces,
343: each pair being { "NAME", VALUE }
344: where VALUE is the bits to set or minus the bits to clear.
345: An empty string NAME is used to identify the default VALUE. */
346:
347: #define TARGET_SWITCHES \
348: { \
349: {"int64", MASK_INT64 | MASK_LONG64}, \
350: {"long64", MASK_LONG64}, \
351: {"mips-as", -MASK_GAS}, \
352: {"gas", MASK_GAS}, \
353: {"rnames", MASK_NAME_REGS}, \
354: {"no-rnames", -MASK_NAME_REGS}, \
355: {"gpOPT", MASK_GPOPT}, \
356: {"gpopt", MASK_GPOPT}, \
357: {"no-gpOPT", -MASK_GPOPT}, \
358: {"no-gpopt", -MASK_GPOPT}, \
359: {"stats", MASK_STATS}, \
360: {"no-stats", -MASK_STATS}, \
361: {"memcpy", MASK_MEMCPY}, \
362: {"no-memcpy", -MASK_MEMCPY}, \
363: {"mips-tfile", MASK_MIPS_TFILE}, \
364: {"no-mips-tfile", -MASK_MIPS_TFILE}, \
365: {"soft-float", MASK_SOFT_FLOAT}, \
366: {"hard-float", -MASK_SOFT_FLOAT}, \
367: {"fp64", MASK_FLOAT64}, \
368: {"fp32", -MASK_FLOAT64}, \
1.1.1.3 ! root 369: {"gp64", MASK_64BIT}, \
! 370: {"gp32", -MASK_64BIT}, \
1.1 root 371: {"abicalls", MASK_ABICALLS}, \
372: {"no-abicalls", -MASK_ABICALLS}, \
373: {"half-pic", MASK_HALF_PIC}, \
374: {"no-half-pic", -MASK_HALF_PIC}, \
375: {"long-calls", MASK_LONG_CALLS}, \
376: {"no-long-calls", -MASK_LONG_CALLS}, \
1.1.1.3 ! root 377: {"embedded-pic", MASK_EMBEDDED_PIC}, \
! 378: {"no-embedded-pic", -MASK_EMBEDDED_PIC}, \
! 379: {"embedded-data", MASK_EMBEDDED_DATA}, \
! 380: {"no-embedded-data", -MASK_EMBEDDED_DATA}, \
1.1 root 381: {"debug", MASK_DEBUG}, \
382: {"debuga", MASK_DEBUG_A}, \
383: {"debugb", MASK_DEBUG_B}, \
384: {"debugc", MASK_DEBUG_C}, \
385: {"debugd", MASK_DEBUG_D}, \
386: {"debuge", MASK_DEBUG_E}, \
387: {"debugf", MASK_DEBUG_F}, \
388: {"debugg", MASK_DEBUG_G}, \
389: {"debugh", MASK_DEBUG_H}, \
390: {"debugi", MASK_DEBUG_I}, \
391: {"debugj", MASK_DEBUG_J}, \
392: {"", TARGET_DEFAULT | TARGET_CPU_DEFAULT} \
393: }
394:
395: /* Default target_flags if no switches are specified */
396:
397: #ifndef TARGET_DEFAULT
398: #define TARGET_DEFAULT 0
399: #endif
400:
401: #ifndef TARGET_CPU_DEFAULT
402: #define TARGET_CPU_DEFAULT 0
403: #endif
404:
405: /* This macro is similar to `TARGET_SWITCHES' but defines names of
406: command options that have values. Its definition is an
407: initializer with a subgrouping for each command option.
408:
409: Each subgrouping contains a string constant, that defines the
410: fixed part of the option name, and the address of a variable.
411: The variable, type `char *', is set to the variable part of the
412: given option if the fixed part matches. The actual option name
413: is made by appending `-m' to the specified name.
414:
415: Here is an example which defines `-mshort-data-NUMBER'. If the
416: given option is `-mshort-data-512', the variable `m88k_short_data'
417: will be set to the string `"512"'.
418:
419: extern char *m88k_short_data;
420: #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */
421:
422: #define TARGET_OPTIONS \
423: { \
424: { "cpu=", &mips_cpu_string }, \
425: { "ips", &mips_isa_string } \
426: }
427:
428: /* Macros to decide whether certain features are available or not,
429: depending on the instruction set architecture level. */
430:
431: #define BRANCH_LIKELY_P() (mips_isa >= 2)
432: #define HAVE_SQRT_P() (mips_isa >= 2)
433:
1.1.1.3 ! root 434: /* CC1_SPEC causes -mips3 to set -mfp64 and -mgp64; -mips1 or -mips2
! 435: sets -mfp32 and -mgp32. This can be overridden by an explicit
! 436: -mfp32, -mfp64, -mgp32 or -mgp64. -mfp64 sets MASK_FLOAT64 in
! 437: target_flags, and -mgp64 sets MASK_64BIT.
! 438:
! 439: Setting MASK_64BIT in target_flags will cause gcc to assume that
! 440: registers are 64 bits wide. int, long and void * will be 32 bit;
! 441: this may be changed with -mint64 or -mlong64.
! 442:
! 443: The gen* programs link code that refers to MASK_64BIT. They don't
! 444: actually use the information in target_flags; they just refer to
! 445: it. */
1.1 root 446:
447: /* Switch Recognition by gcc.c. Add -G xx support */
448:
449: #ifdef SWITCH_TAKES_ARG
450: #undef SWITCH_TAKES_ARG
451: #endif
452:
453: #define SWITCH_TAKES_ARG(CHAR) \
454: ((CHAR) == 'D' || (CHAR) == 'U' || (CHAR) == 'o' \
455: || (CHAR) == 'e' || (CHAR) == 'T' || (CHAR) == 'u' \
456: || (CHAR) == 'I' || (CHAR) == 'm' \
457: || (CHAR) == 'L' || (CHAR) == 'A' || (CHAR) == 'G')
458:
459: /* Sometimes certain combinations of command options do not make sense
460: on a particular target machine. You can define a macro
461: `OVERRIDE_OPTIONS' to take account of this. This macro, if
462: defined, is executed once just after all the command options have
463: been parsed.
464:
465: On the MIPS, it is used to handle -G. We also use it to set up all
466: of the tables referenced in the other macros. */
467:
468: #define OVERRIDE_OPTIONS override_options ()
469:
470: /* Zero or more C statements that may conditionally modify two
471: variables `fixed_regs' and `call_used_regs' (both of type `char
472: []') after they have been initialized from the two preceding
473: macros.
474:
475: This is necessary in case the fixed or call-clobbered registers
476: depend on target flags.
477:
478: You need not define this macro if it has no work to do.
479:
480: If the usage of an entire class of registers depends on the target
481: flags, you may indicate this to GCC by using this macro to modify
482: `fixed_regs' and `call_used_regs' to 1 for each of the registers in
483: the classes which should not be used by GCC. Also define the macro
484: `REG_CLASS_FROM_LETTER' to return `NO_REGS' if it is called with a
485: letter for a class that shouldn't be used.
486:
487: (However, if this class is not included in `GENERAL_REGS' and all
488: of the insn patterns whose constraints permit this class are
489: controlled by target switches, then GCC will automatically avoid
490: using these registers when the target switches are opposed to
491: them.) */
492:
493: #define CONDITIONAL_REGISTER_USAGE \
494: do \
495: { \
496: if (!TARGET_HARD_FLOAT) \
497: { \
498: int regno; \
499: \
500: for (regno = FP_REG_FIRST; regno <= FP_REG_LAST; regno++) \
501: fixed_regs[regno] = call_used_regs[regno] = 1; \
502: } \
503: } \
504: while (0)
505:
1.1.1.3 ! root 506: /* Show we can debug even without a frame pointer. */
! 507: #define CAN_DEBUG_WITHOUT_FP
1.1 root 508:
509: /* Complain about missing specs and predefines that should be defined in each
510: of the target tm files to override the defaults. This is mostly a place-
511: holder until I can get each of the files updated [mm]. */
512:
513: #if defined(OSF_OS) \
514: || defined(DECSTATION) \
515: || defined(SGI_TARGET) \
516: || defined(MIPS_NEWS) \
517: || defined(MIPS_SYSV) \
518: || defined(MIPS_SVR4) \
519: || defined(MIPS_BSD43)
520:
521: #ifndef CPP_PREDEFINES
522: #error "Define CPP_PREDEFINES in the appropriate tm.h file"
523: #endif
524:
525: #ifndef LIB_SPEC
526: #error "Define LIB_SPEC in the appropriate tm.h file"
527: #endif
528:
529: #ifndef STARTFILE_SPEC
530: #error "Define STARTFILE_SPEC in the appropriate tm.h file"
531: #endif
532:
533: #ifndef MACHINE_TYPE
534: #error "Define MACHINE_TYPE in the appropriate tm.h file"
535: #endif
536: #endif
537:
538: /* Tell collect what flags to pass to nm. */
539: #ifndef NM_FLAGS
540: #define NM_FLAGS "-Bp"
541: #endif
542:
543:
544: /* Names to predefine in the preprocessor for this target machine. */
545:
546: #ifndef CPP_PREDEFINES
547: #define CPP_PREDEFINES "-Dmips -Dunix -Dhost_mips -DMIPSEB -DR3000 -DSYSTYPE_BSD43 \
1.1.1.2 root 548: -D_mips -D_unix -D_host_mips -D_MIPSEB -D_R3000 -D_SYSTYPE_BSD43 \
549: -Asystem(unix) -Asystem(bsd) -Acpu(mips) -Amachine(mips)"
1.1 root 550: #endif
551:
552: /* Extra switches sometimes passed to the assembler. */
553:
554: #ifndef ASM_SPEC
1.1.1.3 ! root 555: #if ((TARGET_CPU_DEFAULT | TARGET_DEFAULT) & MASK_GAS) != 0
! 556: /* GAS */
! 557: #define ASM_SPEC "\
! 558: %{mmips-as: \
! 559: %{!.s:-nocpp} %{.s: %{cpp} %{nocpp}} \
! 560: %{pipe: %e-pipe is not supported.} \
! 561: %{K}} \
! 562: %{!mmips-as: \
! 563: %{mcpu=*}} \
! 564: %{G*} %{EB} %{EL} %{mips1} %{mips2} %{mips3} %{v} \
! 565: %{noasmopt:-O0} \
! 566: %{!noasmopt:%{O:-O2} %{O1:-O2} %{O2:-O2} %{O3:-O3}} \
! 567: %{g} %{g0} %{g1} %{g2} %{g3} \
! 568: %{ggdb:-g} %{ggdb0:-g0} %{ggdb1:-g1} %{ggdb2:-g2} %{ggdb3:-g3} \
! 569: %{gstabs:-g} %{gstabs0:-g0} %{gstabs1:-g1} %{gstabs2:-g2} %{gstabs3:-g3} \
! 570: %{gstabs+:-g} %{gstabs+0:-g0} %{gstabs+1:-g1} %{gstabs+2:-g2} %{gstabs+3:-g3} \
! 571: %{gcoff:-g} %{gcoff0:-g0} %{gcoff1:-g1} %{gcoff2:-g2} %{gcoff3:-g3} \
! 572: %{membedded-pic}"
! 573:
! 574: #else
! 575: /* not GAS */
1.1 root 576: #define ASM_SPEC "\
577: %{!mgas: \
1.1.1.3 ! root 578: %{!.s:-nocpp} %{.s: %{cpp} %{nocpp}} \
1.1 root 579: %{pipe: %e-pipe is not supported.} \
1.1.1.3 ! root 580: %{K}} \
! 581: %{mgas: \
! 582: %{mcpu=*}} \
! 583: %{G*} %{EB} %{EL} %{mips1} %{mips2} %{mips3} %{v} \
! 584: %{noasmopt:-O0} \
! 585: %{!noasmopt:%{O:-O2} %{O1:-O2} %{O2:-O2} %{O3:-O3}} \
! 586: %{g} %{g0} %{g1} %{g2} %{g3} \
! 587: %{ggdb:-g} %{ggdb0:-g0} %{ggdb1:-g1} %{ggdb2:-g2} %{ggdb3:-g3} \
! 588: %{gstabs:-g} %{gstabs0:-g0} %{gstabs1:-g1} %{gstabs2:-g2} %{gstabs3:-g3} \
! 589: %{gstabs+:-g} %{gstabs+0:-g0} %{gstabs+1:-g1} %{gstabs+2:-g2} %{gstabs+3:-g3} \
! 590: %{gcoff:-g} %{gcoff0:-g0} %{gcoff1:-g1} %{gcoff2:-g2} %{gcoff3:-g3} \
! 591: %{membedded-pic}"
1.1 root 592:
1.1.1.3 ! root 593: #endif
! 594: #endif /* ASM_SPEC */
1.1 root 595:
596: /* Specify to run a post-processor, mips-tfile after the assembler
597: has run to stuff the mips debug information into the object file.
598: This is needed because the $#!%^ MIPS assembler provides no way
599: of specifying such information in the assembly file. If we are
600: cross compiling, disable mips-tfile unless the user specifies
601: -mmips-tfile. */
602:
603: #ifndef ASM_FINAL_SPEC
1.1.1.3 ! root 604: #if ((TARGET_CPU_DEFAULT | TARGET_DEFAULT) & MASK_GAS) != 0
! 605: /* GAS */
1.1 root 606: #define ASM_FINAL_SPEC "\
607: %{mmips-as: %{!mno-mips-tfile: \
608: \n mips-tfile %{v*: -v} \
609: %{K: -I %b.o~} \
610: %{!K: %{save-temps: -I %b.o~}} \
611: %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
612: %{.s:%i} %{!.s:%g.s}}}"
613:
1.1.1.3 ! root 614: #else
! 615: /* not GAS */
1.1 root 616: #define ASM_FINAL_SPEC "\
617: %{!mgas: %{!mno-mips-tfile: \
618: \n mips-tfile %{v*: -v} \
619: %{K: -I %b.o~} \
620: %{!K: %{save-temps: -I %b.o~}} \
621: %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
622: %{.s:%i} %{!.s:%g.s}}}"
623:
1.1.1.3 ! root 624: #endif
1.1 root 625: #endif /* ASM_FINAL_SPEC */
626:
627: /* Redefinition of libraries used. Mips doesn't support normal
628: UNIX style profiling via calling _mcount. It does offer
629: profiling that samples the PC, so do what we can... */
630:
631: #ifndef LIB_SPEC
632: #define LIB_SPEC "%{pg:-lprof1} %{p:-lprof1} -lc"
633: #endif
634:
635: /* Extra switches sometimes passed to the linker. */
1.1.1.3 ! root 636: /* ??? The bestGnum will never be passed to the linker, because the gcc driver
! 637: will interpret it as a -b option. */
1.1 root 638:
639: #ifndef LINK_SPEC
640: #define LINK_SPEC "\
1.1.1.3 ! root 641: %{G*} %{EB} %{EL} %{mips1} %{mips2} %{mips3} \
! 642: %{bestGnum} %{shared} %{non_shared}"
! 643: #endif /* LINK_SPEC defined */
1.1 root 644:
645: /* Specs for the compiler proper */
646:
647: #ifndef CC1_SPEC
648: #define CC1_SPEC "\
649: %{gline:%{!g:%{!g0:%{!g1:%{!g2: -g1}}}}} \
1.1.1.3 ! root 650: %{mips1:-mfp32 -mgp32}%{mips2:-mfp32 -mgp32}%{mips3:-mfp64 -mgp64} \
1.1 root 651: %{G*} \
652: %{pic-none: -mno-half-pic} \
653: %{pic-lib: -mhalf-pic} \
654: %{pic-extern: -mhalf-pic} \
655: %{pic-calls: -mhalf-pic} \
656: %{save-temps: }"
657: #endif
658:
659: /* Preprocessor specs */
660:
661: #ifndef CPP_SPEC
662: #define CPP_SPEC "\
663: %{.cc: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
664: %{.cxx: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
665: %{.C: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
666: %{.m: -D__LANGUAGE_OBJECTIVE_C -D_LANGUAGE_OBJECTIVE_C} \
667: %{.S: -D__LANGUAGE_ASSEMBLY -D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
1.1.1.2 root 668: %{.s: -D__LANGUAGE_ASSEMBLY -D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
1.1.1.3 ! root 669: %{!.S:%{!.s: -D__LANGUAGE_C -D_LANGUAGE_C %{!ansi:-DLANGUAGE_C}}} \
! 670: %{mlong64:-D__SIZE_TYPE__=long\\ unsigned\\ int -D__PTRDIFF_TYPE__=long\\ int} \
! 671: %{!mlong64:-D__SIZE_TYPE__=unsigned\\ int -D__PTRDIFF_TYPE__=int} \
! 672: %{mips3:-U__mips -D__mips=3}"
1.1 root 673: #endif
674:
675: /* If defined, this macro is an additional prefix to try after
676: `STANDARD_EXEC_PREFIX'. */
677:
678: #ifndef MD_EXEC_PREFIX
679: #define MD_EXEC_PREFIX "/usr/lib/cmplrs/cc/"
680: #endif
681:
682: #ifndef MD_STARTFILE_PREFIX
683: #define MD_STARTFILE_PREFIX "/usr/lib/cmplrs/cc/"
684: #endif
685:
686:
687: /* Print subsidiary information on the compiler version in use. */
688:
689: #define MIPS_VERSION "[AL 1.1, MM 40]"
690:
691: #ifndef MACHINE_TYPE
692: #define MACHINE_TYPE "BSD Mips"
693: #endif
694:
695: #ifndef TARGET_VERSION_INTERNAL
696: #define TARGET_VERSION_INTERNAL(STREAM) \
697: fprintf (STREAM, " %s %s", MIPS_VERSION, MACHINE_TYPE)
698: #endif
699:
700: #ifndef TARGET_VERSION
701: #define TARGET_VERSION TARGET_VERSION_INTERNAL (stderr)
702: #endif
703:
704:
705: #define SDB_DEBUGGING_INFO /* generate info for mips-tfile */
706: #define DBX_DEBUGGING_INFO /* generate stabs (OSF/rose) */
707: #define MIPS_DEBUGGING_INFO /* MIPS specific debugging info */
708:
709: #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */
710: #define PREFERRED_DEBUGGING_TYPE ((len > 1 && !strncmp (str, "ggdb", len)) ? DBX_DEBUG : SDB_DEBUG)
711: #endif
712:
713: /* By default, turn on GDB extensions. */
714: #define DEFAULT_GDB_EXTENSIONS 1
715:
716: /* If we are passing smuggling stabs through the MIPS ECOFF object
717: format, put a comment in front of the .stab<x> operation so
718: that the MIPS assembler does not choke. The mips-tfile program
719: will correctly put the stab into the object file. */
720:
721: #define ASM_STABS_OP ((TARGET_GAS) ? ".stabs" : " #.stabs")
722: #define ASM_STABN_OP ((TARGET_GAS) ? ".stabn" : " #.stabn")
723: #define ASM_STABD_OP ((TARGET_GAS) ? ".stabd" : " #.stabd")
724:
725: /* Forward references to tags are allowed. */
726: #define SDB_ALLOW_FORWARD_REFERENCES
727:
728: /* Unknown tags are also allowed. */
729: #define SDB_ALLOW_UNKNOWN_REFERENCES
730:
731: /* On Sun 4, this limit is 2048. We use 1500 to be safe,
732: since the length can run past this up to a continuation point. */
733: #define DBX_CONTIN_LENGTH 1500
734:
735:
736: /* How to renumber registers for dbx and gdb. */
737: #define DBX_REGISTER_NUMBER(REGNO) mips_dbx_regno[ (REGNO) ]
738:
739:
740: /* Overrides for the COFF debug format. */
741: #define PUT_SDB_SCL(a) \
742: do { \
743: extern FILE *asm_out_text_file; \
744: fprintf (asm_out_text_file, "\t.scl\t%d;", (a)); \
745: } while (0)
746:
747: #define PUT_SDB_INT_VAL(a) \
748: do { \
749: extern FILE *asm_out_text_file; \
750: fprintf (asm_out_text_file, "\t.val\t%d;", (a)); \
751: } while (0)
752:
753: #define PUT_SDB_VAL(a) \
754: do { \
755: extern FILE *asm_out_text_file; \
756: fputs ("\t.val\t", asm_out_text_file); \
757: output_addr_const (asm_out_text_file, (a)); \
758: fputc (';', asm_out_text_file); \
759: } while (0)
760:
761: #define PUT_SDB_DEF(a) \
762: do { \
763: extern FILE *asm_out_text_file; \
764: fprintf (asm_out_text_file, "\t%s.def\t", \
765: (TARGET_GAS) ? "" : "#"); \
766: ASM_OUTPUT_LABELREF (asm_out_text_file, a); \
767: fputc (';', asm_out_text_file); \
768: } while (0)
769:
770: #define PUT_SDB_PLAIN_DEF(a) \
771: do { \
772: extern FILE *asm_out_text_file; \
773: fprintf (asm_out_text_file, "\t%s.def\t.%s;", \
774: (TARGET_GAS) ? "" : "#", (a)); \
775: } while (0)
776:
777: #define PUT_SDB_ENDEF \
778: do { \
779: extern FILE *asm_out_text_file; \
780: fprintf (asm_out_text_file, "\t.endef\n"); \
781: } while (0)
782:
783: #define PUT_SDB_TYPE(a) \
784: do { \
785: extern FILE *asm_out_text_file; \
786: fprintf (asm_out_text_file, "\t.type\t0x%x;", (a)); \
787: } while (0)
788:
789: #define PUT_SDB_SIZE(a) \
790: do { \
791: extern FILE *asm_out_text_file; \
792: fprintf (asm_out_text_file, "\t.size\t%d;", (a)); \
793: } while (0)
794:
795: #define PUT_SDB_DIM(a) \
796: do { \
797: extern FILE *asm_out_text_file; \
798: fprintf (asm_out_text_file, "\t.dim\t%d;", (a)); \
799: } while (0)
800:
801: #ifndef PUT_SDB_START_DIM
802: #define PUT_SDB_START_DIM \
803: do { \
804: extern FILE *asm_out_text_file; \
805: fprintf (asm_out_text_file, "\t.dim\t"); \
806: } while (0)
807: #endif
808:
809: #ifndef PUT_SDB_NEXT_DIM
810: #define PUT_SDB_NEXT_DIM(a) \
811: do { \
812: extern FILE *asm_out_text_file; \
813: fprintf (asm_out_text_file, "%d,", a); \
814: } while (0)
815: #endif
816:
817: #ifndef PUT_SDB_LAST_DIM
818: #define PUT_SDB_LAST_DIM(a) \
819: do { \
820: extern FILE *asm_out_text_file; \
821: fprintf (asm_out_text_file, "%d;", a); \
822: } while (0)
823: #endif
824:
825: #define PUT_SDB_TAG(a) \
826: do { \
827: extern FILE *asm_out_text_file; \
828: fprintf (asm_out_text_file, "\t.tag\t"); \
829: ASM_OUTPUT_LABELREF (asm_out_text_file, a); \
830: fputc (';', asm_out_text_file); \
831: } while (0)
832:
833: /* For block start and end, we create labels, so that
834: later we can figure out where the correct offset is.
835: The normal .ent/.end serve well enough for functions,
836: so those are just commented out. */
837:
838: #define PUT_SDB_BLOCK_START(LINE) \
839: do { \
840: extern FILE *asm_out_text_file; \
841: fprintf (asm_out_text_file, \
842: "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \
843: sdb_label_count, \
844: (TARGET_GAS) ? "" : "#", \
845: sdb_label_count, \
846: (LINE)); \
847: sdb_label_count++; \
848: } while (0)
849:
850: #define PUT_SDB_BLOCK_END(LINE) \
851: do { \
852: extern FILE *asm_out_text_file; \
853: fprintf (asm_out_text_file, \
854: "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \
855: sdb_label_count, \
856: (TARGET_GAS) ? "" : "#", \
857: sdb_label_count, \
858: (LINE)); \
859: sdb_label_count++; \
860: } while (0)
861:
862: #define PUT_SDB_FUNCTION_START(LINE)
863:
864: #define PUT_SDB_FUNCTION_END(LINE)
865:
866: #define PUT_SDB_EPILOGUE_END(NAME)
867:
868: #define SDB_GENERATE_FAKE(BUFFER, NUMBER) \
869: sprintf ((BUFFER), ".%dfake", (NUMBER));
870:
871: /* Correct the offset of automatic variables and arguments. Note that
872: the MIPS debug format wants all automatic variables and arguments
873: to be in terms of the virtual frame pointer (stack pointer before
874: any adjustment in the function), while the MIPS 3.0 linker wants
875: the frame pointer to be the stack pointer after the initial
876: adjustment. */
877:
878: #define DEBUGGER_AUTO_OFFSET(X) mips_debugger_offset (X, 0)
879: #define DEBUGGER_ARG_OFFSET(OFFSET, X) mips_debugger_offset (X, OFFSET)
880:
881:
882: /* Tell collect that the object format is ECOFF */
883: #ifndef OBJECT_FORMAT_ROSE
884: #define OBJECT_FORMAT_COFF /* Object file looks like COFF */
885: #define EXTENDED_COFF /* ECOFF, not normal coff */
886: #endif
887:
888: #if 0 /* These definitions normally have no effect because
889: MIPS systems define USE_COLLECT2, so
890: assemble_constructor does nothing anyway. */
891:
892: /* Don't use the default definitions, because we don't have gld.
893: Also, we don't want stabs when generating ECOFF output.
894: Instead we depend on collect to handle these. */
895:
896: #define ASM_OUTPUT_CONSTRUCTOR(file, name)
897: #define ASM_OUTPUT_DESTRUCTOR(file, name)
898:
899: #endif /* 0 */
900:
901: /* Target machine storage layout */
902:
903: /* Define this if most significant bit is lowest numbered
904: in instructions that operate on numbered bit-fields.
905: */
906: #define BITS_BIG_ENDIAN 0
907:
908: /* Define this if most significant byte of a word is the lowest numbered. */
909: #ifndef BYTES_BIG_ENDIAN
910: #ifndef DECSTATION
911: #define BYTES_BIG_ENDIAN 1
912: #else
913: #define BYTES_BIG_ENDIAN 0
914: #endif
915: #endif
916:
917: /* Define this if most significant word of a multiword number is the lowest. */
918: #ifndef WORDS_BIG_ENDIAN
919: #ifndef DECSTATION
920: #define WORDS_BIG_ENDIAN 1
921: #else
922: #define WORDS_BIG_ENDIAN 0
923: #endif
924: #endif
925:
926: /* Define macros to easily access the most and least significant words
927: without a lot of #ifdef's. */
928:
929: #if WORDS_BIG_ENDIAN
930: #define MOST_SIGNIFICANT_WORD 0
931: #define LEAST_SIGNIFICANT_WORD 1
932:
933: #else
934: #define MOST_SIGNIFICANT_WORD 1
935: #define LEAST_SIGNIFICANT_WORD 0
936: #endif
937:
938: /* Number of bits in an addressable storage unit */
939: #define BITS_PER_UNIT 8
940:
941: /* Width in bits of a "word", which is the contents of a machine register.
942: Note that this is not necessarily the width of data type `int';
943: if using 16-bit ints on a 68000, this would still be 32.
944: But on a machine with 16-bit registers, this would be 16. */
1.1.1.3 ! root 945: #define BITS_PER_WORD (TARGET_64BIT ? 64 : 32)
! 946: #define MAX_BITS_PER_WORD 64
1.1 root 947:
948: /* Width of a word, in units (bytes). */
1.1.1.3 ! root 949: #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
! 950: #define MAX_UNITS_PER_WORD 8
! 951:
! 952: /* For MIPS, width of a floating point register. */
! 953: #define UNITS_PER_FPREG (TARGET_FLOAT64 ? 8 : 4)
1.1 root 954:
955: /* A C expression for the size in bits of the type `int' on the
956: target machine. If you don't define this, the default is one
957: word. */
1.1.1.3 ! root 958: #define INT_TYPE_SIZE (TARGET_INT64 ? 64 : 32)
! 959: #define MAX_INT_TYPE_SIZE 64
! 960:
! 961: /* Tell the preprocessor the maximum size of wchar_t. */
! 962: #ifndef MAX_WCHAR_TYPE_SIZE
! 963: #ifndef WCHAR_TYPE_SIZE
! 964: #define MAX_WCHAR_TYPE_SIZE MAX_INT_TYPE_SIZE
! 965: #endif
! 966: #endif
1.1 root 967:
968: /* A C expression for the size in bits of the type `short' on the
969: target machine. If you don't define this, the default is half a
970: word. (If this would be less than one storage unit, it is
971: rounded up to one unit.) */
972: #define SHORT_TYPE_SIZE 16
973:
974: /* A C expression for the size in bits of the type `long' on the
975: target machine. If you don't define this, the default is one
976: word. */
1.1.1.3 ! root 977: #define LONG_TYPE_SIZE (TARGET_LONG64 ? 64 : 32)
! 978: #define MAX_LONG_TYPE_SIZE 64
1.1 root 979:
980: /* A C expression for the size in bits of the type `long long' on the
981: target machine. If you don't define this, the default is two
982: words. */
983: #define LONG_LONG_TYPE_SIZE 64
984:
985: /* A C expression for the size in bits of the type `char' on the
986: target machine. If you don't define this, the default is one
987: quarter of a word. (If this would be less than one storage unit,
988: it is rounded up to one unit.) */
989: #define CHAR_TYPE_SIZE BITS_PER_UNIT
990:
991: /* A C expression for the size in bits of the type `float' on the
992: target machine. If you don't define this, the default is one
993: word. */
994: #define FLOAT_TYPE_SIZE 32
995:
996: /* A C expression for the size in bits of the type `double' on the
997: target machine. If you don't define this, the default is two
998: words. */
999: #define DOUBLE_TYPE_SIZE 64
1000:
1001: /* A C expression for the size in bits of the type `long double' on
1002: the target machine. If you don't define this, the default is two
1003: words. */
1004: #define LONG_DOUBLE_TYPE_SIZE 64
1005:
1006: /* Width in bits of a pointer.
1007: See also the macro `Pmode' defined below. */
1.1.1.3 ! root 1008: #define POINTER_SIZE (TARGET_LONG64 ? 64 : 32)
1.1 root 1009:
1010: /* Allocation boundary (in *bits*) for storing pointers in memory. */
1.1.1.3 ! root 1011: #define POINTER_BOUNDARY (TARGET_LONG64 ? 64 : 32)
1.1 root 1012:
1013: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
1.1.1.3 ! root 1014: #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
1.1 root 1015:
1016: /* Allocation boundary (in *bits*) for the code of a function. */
1017: #define FUNCTION_BOUNDARY 32
1018:
1019: /* Alignment of field after `int : 0' in a structure. */
1.1.1.3 ! root 1020: #define EMPTY_FIELD_BOUNDARY (TARGET_LONG64 ? 64 : 32)
1.1 root 1021:
1022: /* Every structure's size must be a multiple of this. */
1023: /* 8 is observed right on a DECstation and on riscos 4.02. */
1024: #define STRUCTURE_SIZE_BOUNDARY 8
1025:
1026: /* There is no point aligning anything to a rounder boundary than this. */
1027: #define BIGGEST_ALIGNMENT 64
1028:
1029: /* Biggest alignment any structure field can require in bits. */
1030: #define BIGGEST_FIELD_ALIGNMENT 64
1031:
1032: /* Set this nonzero if move instructions will actually fail to work
1033: when given unaligned data. */
1034: #define STRICT_ALIGNMENT 1
1035:
1036: /* Define this if you wish to imitate the way many other C compilers
1037: handle alignment of bitfields and the structures that contain
1038: them.
1039:
1040: The behavior is that the type written for a bitfield (`int',
1041: `short', or other integer type) imposes an alignment for the
1042: entire structure, as if the structure really did contain an
1043: ordinary field of that type. In addition, the bitfield is placed
1044: within the structure so that it would fit within such a field,
1045: not crossing a boundary for it.
1046:
1047: Thus, on most machines, a bitfield whose type is written as `int'
1048: would not cross a four-byte boundary, and would force four-byte
1049: alignment for the whole structure. (The alignment used may not
1050: be four bytes; it is controlled by the other alignment
1051: parameters.)
1052:
1053: If the macro is defined, its definition should be a C expression;
1054: a nonzero value for the expression enables this behavior. */
1055:
1056: #define PCC_BITFIELD_TYPE_MATTERS 1
1057:
1058: /* If defined, a C expression to compute the alignment given to a
1059: constant that is being placed in memory. CONSTANT is the constant
1060: and ALIGN is the alignment that the object would ordinarily have.
1061: The value of this macro is used instead of that alignment to align
1062: the object.
1063:
1064: If this macro is not defined, then ALIGN is used.
1065:
1066: The typical use of this macro is to increase alignment for string
1067: constants to be word aligned so that `strcpy' calls that copy
1068: constants can be done inline. */
1069:
1070: #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
1071: ((TREE_CODE (EXP) == STRING_CST || TREE_CODE (EXP) == CONSTRUCTOR) \
1072: && (ALIGN) < BITS_PER_WORD \
1073: ? BITS_PER_WORD \
1074: : (ALIGN))
1075:
1076: /* If defined, a C expression to compute the alignment for a static
1077: variable. TYPE is the data type, and ALIGN is the alignment that
1078: the object would ordinarily have. The value of this macro is used
1079: instead of that alignment to align the object.
1080:
1081: If this macro is not defined, then ALIGN is used.
1082:
1083: One use of this macro is to increase alignment of medium-size
1084: data to make it all fit in fewer cache lines. Another is to
1085: cause character arrays to be word-aligned so that `strcpy' calls
1086: that copy constants to character arrays can be done inline. */
1087:
1088: #undef DATA_ALIGNMENT
1089: #define DATA_ALIGNMENT(TYPE, ALIGN) \
1090: ((((ALIGN) < BITS_PER_WORD) \
1091: && (TREE_CODE (TYPE) == ARRAY_TYPE \
1092: || TREE_CODE (TYPE) == UNION_TYPE \
1093: || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
1094:
1095: /* Define this macro if an argument declared as `char' or `short' in a
1096: prototype should actually be passed as an `int'. In addition to
1097: avoiding errors in certain cases of mismatch, it also makes for
1098: better code on certain machines. */
1099:
1100: #define PROMOTE_PROTOTYPES
1101:
1.1.1.2 root 1102: /* Define if operations between registers always perform the operation
1103: on the full register even if a narrower mode is specified. */
1104: #define WORD_REGISTER_OPERATIONS
1105:
1106: /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1107: will either zero-extend or sign-extend. The value of this macro should
1108: be the code that says which one of the two operations is implicitly
1109: done, NIL if none. */
1110: #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1.1 root 1111:
1112: /* Standard register usage. */
1113:
1114: /* Number of actual hardware registers.
1115: The hardware registers are assigned numbers for the compiler
1116: from 0 to just below FIRST_PSEUDO_REGISTER.
1117: All registers that the compiler knows about must be given numbers,
1118: even those that are not normally considered general registers.
1119:
1120: On the Mips, we have 32 integer registers, 32 floating point registers
1121: and the special registers hi, lo, and fp status. */
1122:
1123: #define FIRST_PSEUDO_REGISTER 67
1124:
1125: /* 1 for registers that have pervasive standard uses
1126: and are not available for the register allocator.
1127:
1128: On the MIPS, see conventions, page D-2 */
1129:
1130: #define FIXED_REGISTERS \
1131: { \
1132: 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1133: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, \
1134: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1135: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1136: 1, 1, 1 \
1137: }
1138:
1139:
1140: /* 1 for registers not available across function calls.
1141: These must include the FIXED_REGISTERS and also any
1142: registers that can be used without being saved.
1143: The latter must include the registers where values are returned
1144: and the register where structure-value addresses are passed.
1145: Aside from that, you can include as many other registers as you like. */
1146:
1147: #define CALL_USED_REGISTERS \
1148: { \
1149: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1150: 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
1151: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1152: 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1153: 1, 1, 1 \
1154: }
1155:
1156:
1157: /* Internal macros to classify a register number as to whether it's a
1158: general purpose register, a floating point register, a
1159: multiply/divide register, or a status register.
1160:
1161: The macro FP_CALL_REG_P also allows registers $4 and $6 as floating
1162: point registers to pass floating point as per MIPS spec. */
1163:
1164: #define GP_REG_FIRST 0
1165: #define GP_REG_LAST 31
1166: #define GP_REG_NUM (GP_REG_LAST - GP_REG_FIRST + 1)
1167: #define GP_DBX_FIRST 0
1168:
1169: #define FP_REG_FIRST 32
1170: #define FP_REG_LAST 63
1171: #define FP_REG_NUM (FP_REG_LAST - FP_REG_FIRST + 1)
1172: #define FP_DBX_FIRST ((write_symbols == DBX_DEBUG) ? 38 : 32)
1173:
1174: #define MD_REG_FIRST 64
1175: #define MD_REG_LAST 65
1176: #define MD_REG_NUM (MD_REG_LAST - MD_REG_FIRST + 1)
1177:
1178: #define ST_REG_FIRST 66
1179: #define ST_REG_LAST 66
1180: #define ST_REG_NUM (ST_REG_LAST - ST_REG_FIRST + 1)
1181:
1182: #define AT_REGNUM (GP_REG_FIRST + 1)
1183: #define HI_REGNUM (MD_REG_FIRST + 0)
1184: #define LO_REGNUM (MD_REG_FIRST + 1)
1185: #define FPSW_REGNUM ST_REG_FIRST
1186:
1187: #define GP_REG_P(REGNO) ((unsigned) ((REGNO) - GP_REG_FIRST) < GP_REG_NUM)
1188: #define FP_REG_P(REGNO) ((unsigned) ((REGNO) - FP_REG_FIRST) < FP_REG_NUM)
1189: #define MD_REG_P(REGNO) ((unsigned) ((REGNO) - MD_REG_FIRST) < MD_REG_NUM)
1190: #define ST_REG_P(REGNO) ((REGNO) == ST_REG_FIRST)
1191:
1192: #define FP_CALL_REG_P(REGNO) \
1193: (FP_REG_P (REGNO) \
1194: || (REGNO) == (4 + GP_REG_FIRST) \
1195: || (REGNO) == (6 + GP_REG_FIRST))
1196:
1197: /* Return number of consecutive hard regs needed starting at reg REGNO
1198: to hold something of mode MODE.
1199: This is ordinarily the length in words of a value of mode MODE
1200: but can be less for certain modes in special long registers.
1201:
1202: On the MIPS, all general registers are one word long. Except on
1203: the R4000 with the FR bit set, the floating point uses register
1204: pairs, with the second register not being allocatable. */
1205:
1206: #define HARD_REGNO_NREGS(REGNO, MODE) \
1207: (! FP_REG_P (REGNO) \
1208: ? ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) \
1.1.1.3 ! root 1209: : (((GET_MODE_SIZE (MODE) + 7) / 8) << (TARGET_FLOAT64 == 0)))
1.1 root 1210:
1211: /* Value is 1 if hard register REGNO can hold a value of machine-mode
1.1.1.3 ! root 1212: MODE. In 32 bit mode, require that DImode and DFmode be in even
! 1213: registers. For DImode, this makes some of the insns easier to
! 1214: write, since you don't have to worry about a DImode value in
! 1215: registers 3 & 4, producing a result in 4 & 5.
1.1 root 1216:
1217: To make the code simpler HARD_REGNO_MODE_OK now just references an
1218: array built in override_options. Because machmodes.h is not yet
1219: included before this file is processed, the MODE bound can't be
1220: expressed here. */
1221:
1222: extern char mips_hard_regno_mode_ok[][FIRST_PSEUDO_REGISTER];
1223:
1224: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
1225: mips_hard_regno_mode_ok[ (int)(MODE) ][ (REGNO) ]
1226:
1227: /* Value is 1 if it is a good idea to tie two pseudo registers
1228: when one has mode MODE1 and one has mode MODE2.
1229: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
1230: for any hard reg, then this must be 0 for correct output. */
1231: #define MODES_TIEABLE_P(MODE1, MODE2) \
1232: ((GET_MODE_CLASS (MODE1) == MODE_FLOAT || \
1233: GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
1234: == (GET_MODE_CLASS (MODE2) == MODE_FLOAT || \
1235: GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
1236:
1237: /* MIPS pc is not overloaded on a register. */
1238: /* #define PC_REGNUM xx */
1239:
1240: /* Register to use for pushing function arguments. */
1241: #define STACK_POINTER_REGNUM (GP_REG_FIRST + 29)
1242:
1243: /* Offset from the stack pointer to the first available location. */
1244: #define STACK_POINTER_OFFSET 0
1245:
1246: /* Base register for access to local variables of the function. */
1247: #define FRAME_POINTER_REGNUM (GP_REG_FIRST + 30)
1248:
1249: /* Value should be nonzero if functions must have frame pointers.
1250: Zero means the frame pointer need not be set up (and parms
1251: may be accessed via the stack pointer) in functions that seem suitable.
1252: This is computed in `reload', in reload1.c. */
1253: #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
1254:
1255: /* Base register for access to arguments of the function. */
1256: #define ARG_POINTER_REGNUM GP_REG_FIRST
1257:
1258: /* Register in which static-chain is passed to a function. */
1259: #define STATIC_CHAIN_REGNUM (GP_REG_FIRST + 2)
1260:
1261: /* If the structure value address is passed in a register, then
1262: `STRUCT_VALUE_REGNUM' should be the number of that register. */
1263: /* #define STRUCT_VALUE_REGNUM (GP_REG_FIRST + 4) */
1264:
1265: /* If the structure value address is not passed in a register, define
1266: `STRUCT_VALUE' as an expression returning an RTX for the place
1267: where the address is passed. If it returns 0, the address is
1268: passed as an "invisible" first argument. */
1.1.1.3 ! root 1269: #define STRUCT_VALUE 0
1.1 root 1270:
1271: /* Mips registers used in prologue/epilogue code when the stack frame
1272: is larger than 32K bytes. These registers must come from the
1273: scratch register set, and not used for passing and returning
1274: arguments and any other information used in the calling sequence
1275: (such as pic). */
1276:
1277: #define MIPS_TEMP1_REGNUM (GP_REG_FIRST + 8)
1278: #define MIPS_TEMP2_REGNUM (GP_REG_FIRST + 9)
1279:
1280: /* Define this macro if it is as good or better to call a constant
1281: function address than to call an address kept in a register. */
1282: #define NO_FUNCTION_CSE 1
1283:
1284: /* Define this macro if it is as good or better for a function to
1285: call itself with an explicit address than to call an address
1286: kept in a register. */
1287: #define NO_RECURSIVE_FUNCTION_CSE 1
1288:
1289: /* The register number of the register used to address a table of
1290: static data addresses in memory. In some cases this register is
1291: defined by a processor's "application binary interface" (ABI).
1292: When this macro is defined, RTL is generated for this register
1293: once, as with the stack pointer and frame pointer registers. If
1294: this macro is not defined, it is up to the machine-dependent
1295: files to allocate such a register (if necessary). */
1296: #define PIC_OFFSET_TABLE_REGNUM (GP_REG_FIRST + 28)
1297:
1.1.1.2 root 1298: #define PIC_FUNCTION_ADDR_REGNUM (GP_REG_FIRST + 25)
1299:
1.1.1.3 ! root 1300: #define FINALIZE_PIC mips_finalize_pic ()
1.1 root 1301:
1302: /* Define the classes of registers for register constraints in the
1303: machine description. Also define ranges of constants.
1304:
1305: One of the classes must always be named ALL_REGS and include all hard regs.
1306: If there is more than one class, another class must be named NO_REGS
1307: and contain no registers.
1308:
1309: The name GENERAL_REGS must be the name of a class (or an alias for
1310: another name such as ALL_REGS). This is the class of registers
1311: that is allowed by "g" or "r" in a register constraint.
1312: Also, registers outside this class are allocated only when
1313: instructions express preferences for them.
1314:
1315: The classes must be numbered in nondecreasing order; that is,
1316: a larger-numbered class must never be contained completely
1317: in a smaller-numbered class.
1318:
1319: For any two classes, it is very desirable that there be another
1320: class that represents their union. */
1321:
1322: enum reg_class
1323: {
1324: NO_REGS, /* no registers in set */
1325: GR_REGS, /* integer registers */
1326: FP_REGS, /* floating point registers */
1327: HI_REG, /* hi register */
1328: LO_REG, /* lo register */
1329: MD_REGS, /* multiply/divide registers (hi/lo) */
1330: ST_REGS, /* status registers (fp status) */
1331: ALL_REGS, /* all registers */
1332: LIM_REG_CLASSES /* max value + 1 */
1333: };
1334:
1335: #define N_REG_CLASSES (int) LIM_REG_CLASSES
1336:
1337: #define GENERAL_REGS GR_REGS
1338:
1339: /* An initializer containing the names of the register classes as C
1340: string constants. These names are used in writing some of the
1341: debugging dumps. */
1342:
1343: #define REG_CLASS_NAMES \
1344: { \
1345: "NO_REGS", \
1346: "GR_REGS", \
1347: "FP_REGS", \
1348: "HI_REG", \
1349: "LO_REG", \
1350: "MD_REGS", \
1351: "ST_REGS", \
1352: "ALL_REGS" \
1353: }
1354:
1355: /* An initializer containing the contents of the register classes,
1356: as integers which are bit masks. The Nth integer specifies the
1357: contents of class N. The way the integer MASK is interpreted is
1358: that register R is in the class if `MASK & (1 << R)' is 1.
1359:
1360: When the machine has more than 32 registers, an integer does not
1361: suffice. Then the integers are replaced by sub-initializers,
1362: braced groupings containing several integers. Each
1363: sub-initializer must be suitable as an initializer for the type
1364: `HARD_REG_SET' which is defined in `hard-reg-set.h'. */
1365:
1366: #define REG_CLASS_CONTENTS \
1367: { \
1368: { 0x00000000, 0x00000000, 0x00000000 }, /* no registers */ \
1369: { 0xffffffff, 0x00000000, 0x00000000 }, /* integer registers */ \
1370: { 0x00000000, 0xffffffff, 0x00000000 }, /* floating registers*/ \
1371: { 0x00000000, 0x00000000, 0x00000001 }, /* hi register */ \
1372: { 0x00000000, 0x00000000, 0x00000002 }, /* lo register */ \
1373: { 0x00000000, 0x00000000, 0x00000003 }, /* mul/div registers */ \
1374: { 0x00000000, 0x00000000, 0x00000004 }, /* status registers */ \
1375: { 0xffffffff, 0xffffffff, 0x00000007 } /* all registers */ \
1376: }
1377:
1378:
1379: /* A C expression whose value is a register class containing hard
1380: register REGNO. In general there is more that one such class;
1381: choose a class which is "minimal", meaning that no smaller class
1382: also contains the register. */
1383:
1384: extern enum reg_class mips_regno_to_class[];
1385:
1386: #define REGNO_REG_CLASS(REGNO) mips_regno_to_class[ (REGNO) ]
1387:
1388: /* A macro whose definition is the name of the class to which a
1389: valid base register must belong. A base register is one used in
1390: an address which is the register value plus a displacement. */
1391:
1392: #define BASE_REG_CLASS GR_REGS
1393:
1394: /* A macro whose definition is the name of the class to which a
1395: valid index register must belong. An index register is one used
1396: in an address where its value is either multiplied by a scale
1397: factor or added to another register (as well as added to a
1398: displacement). */
1399:
1.1.1.3 ! root 1400: #define INDEX_REG_CLASS NO_REGS
1.1 root 1401:
1402:
1403: /* REGISTER AND CONSTANT CLASSES */
1404:
1405: /* Get reg_class from a letter such as appears in the machine
1406: description.
1407:
1408: DEFINED REGISTER CLASSES:
1409:
1410: 'd' General (aka integer) registers
1411: 'f' Floating point registers
1412: 'h' Hi register
1413: 'l' Lo register
1414: 'x' Multiply/divide registers
1415: 'z' FP Status register */
1416:
1417: extern enum reg_class mips_char_to_class[];
1418:
1419: #define REG_CLASS_FROM_LETTER(C) mips_char_to_class[ (C) ]
1420:
1421: /* The letters I, J, K, L, M, N, O, and P in a register constraint
1422: string can be used to stand for particular ranges of immediate
1423: operands. This macro defines what the ranges are. C is the
1424: letter, and VALUE is a constant value. Return 1 if VALUE is
1425: in the range specified by C. */
1426:
1427: /* For MIPS:
1428:
1429: `I' is used for the range of constants an arithmetic insn can
1430: actually contain (16 bits signed integers).
1431:
1432: `J' is used for the range which is just zero (ie, $r0).
1433:
1434: `K' is used for the range of constants a logical insn can actually
1435: contain (16 bit zero-extended integers).
1436:
1437: `L' is used for the range of constants that be loaded with lui
1438: (ie, the bottom 16 bits are zero).
1439:
1440: `M' is used for the range of constants that take two words to load
1441: (ie, not matched by `I', `K', and `L').
1442:
1443: `N' is used for negative 16 bit constants.
1444:
1445: `O' is an exact power of 2 (not yet used in the md file).
1446:
1447: `P' is used for positive 16 bit constants. */
1448:
1449: #define SMALL_INT(X) ((unsigned) (INTVAL (X) + 0x8000) < 0x10000)
1450: #define SMALL_INT_UNSIGNED(X) ((unsigned) (INTVAL (X)) < 0x10000)
1451:
1452: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
1453: ((C) == 'I' ? ((unsigned) ((VALUE) + 0x8000) < 0x10000) \
1454: : (C) == 'J' ? ((VALUE) == 0) \
1455: : (C) == 'K' ? ((unsigned) (VALUE) < 0x10000) \
1.1.1.3 ! root 1456: : (C) == 'L' ? (((VALUE) & 0x0000ffff) == 0 \
! 1457: && (((VALUE) & ~2147483647) == 0 \
! 1458: || ((VALUE) & ~2147483647) == ~2147483647)) \
1.1 root 1459: : (C) == 'M' ? ((((VALUE) & ~0x0000ffff) != 0) \
1460: && (((VALUE) & ~0x0000ffff) != ~0x0000ffff) \
1.1.1.3 ! root 1461: && (((VALUE) & 0x0000ffff) != 0 \
! 1462: || (((VALUE) & ~2147483647) != 0 \
! 1463: && ((VALUE) & ~2147483647) != ~2147483647))) \
1.1 root 1464: : (C) == 'N' ? (((VALUE) & ~0x0000ffff) == ~0x0000ffff) \
1465: : (C) == 'O' ? (exact_log2 (VALUE) >= 0) \
1466: : (C) == 'P' ? ((VALUE) != 0 && (((VALUE) & ~0x0000ffff) == 0)) \
1467: : 0)
1468:
1469: /* Similar, but for floating constants, and defining letters G and H.
1470: Here VALUE is the CONST_DOUBLE rtx itself. */
1471:
1472: /* For Mips
1473:
1474: 'G' : Floating point 0 */
1475:
1476: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
1477: ((C) == 'G' \
1.1.1.3 ! root 1478: && (VALUE) == CONST0_RTX (GET_MODE (VALUE)))
1.1 root 1479:
1480: /* Letters in the range `Q' through `U' may be defined in a
1481: machine-dependent fashion to stand for arbitrary operand types.
1482: The machine description macro `EXTRA_CONSTRAINT' is passed the
1483: operand as its first argument and the constraint letter as its
1484: second operand.
1485:
1486: `Q' is for memory references which take more than 1 instruction.
1487: `R' is for memory references which take 1 word for the instruction.
1488: `S' is for references to extern items which are PIC for OSF/rose. */
1489:
1490: #define EXTRA_CONSTRAINT(OP,CODE) \
1491: ((GET_CODE (OP) != MEM) ? FALSE \
1492: : ((CODE) == 'Q') ? !simple_memory_operand (OP, GET_MODE (OP)) \
1493: : ((CODE) == 'R') ? simple_memory_operand (OP, GET_MODE (OP)) \
1494: : ((CODE) == 'S') ? (HALF_PIC_P () && CONSTANT_P (OP) \
1495: && HALF_PIC_ADDRESS_P (OP)) \
1496: : FALSE)
1497:
1498: /* Given an rtx X being reloaded into a reg required to be
1499: in class CLASS, return the class of reg to actually use.
1500: In general this is just CLASS; but on some machines
1501: in some cases it is preferable to use a more restrictive class. */
1502:
1503: #define PREFERRED_RELOAD_CLASS(X,CLASS) \
1.1.1.3 ! root 1504: ((CLASS) != ALL_REGS \
! 1505: ? (CLASS) \
! 1506: : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
! 1507: || GET_MODE_CLASS (GET_MODE (X)) == MODE_COMPLEX_FLOAT) \
! 1508: ? (TARGET_SOFT_FLOAT ? GR_REGS : FP_REGS) \
! 1509: : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_INT \
! 1510: || GET_MODE (X) == VOIDmode) \
! 1511: ? GR_REGS \
! 1512: : (CLASS))))
1.1 root 1513:
1514: /* Certain machines have the property that some registers cannot be
1515: copied to some other registers without using memory. Define this
1516: macro on those machines to be a C expression that is non-zero if
1517: objects of mode MODE in registers of CLASS1 can only be copied to
1518: registers of class CLASS2 by storing a register of CLASS1 into
1519: memory and loading that memory location into a register of CLASS2.
1520:
1521: Do not define this macro if its value would always be zero. */
1522:
1523: #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
1.1.1.3 ! root 1524: ((!TARGET_DEBUG_H_MODE \
! 1525: && GET_MODE_CLASS (MODE) == MODE_INT \
! 1526: && ((CLASS1 == FP_REGS && CLASS2 == GR_REGS) \
! 1527: || (CLASS1 == GR_REGS && CLASS2 == FP_REGS))) \
! 1528: || (TARGET_FLOAT64 && !TARGET_64BIT && (MODE) == DFmode \
! 1529: && ((CLASS1 == GR_REGS && CLASS2 == FP_REGS) \
! 1530: || (CLASS2 == GR_REGS && CLASS1 == FP_REGS))))
1.1 root 1531:
1532: /* Return the maximum number of consecutive registers
1533: needed to represent mode MODE in a register of class CLASS. */
1534:
1.1.1.2 root 1535: #define CLASS_UNITS(mode, size) \
1536: ((GET_MODE_SIZE (mode) + (size) - 1) / (size))
1.1 root 1537:
1538: #define CLASS_MAX_NREGS(CLASS, MODE) \
1.1.1.2 root 1539: ((CLASS) == FP_REGS \
1540: ? (TARGET_FLOAT64 \
1541: ? CLASS_UNITS (MODE, 8) \
1542: : 2 * CLASS_UNITS (MODE, 8)) \
1543: : CLASS_UNITS (MODE, UNITS_PER_WORD))
1.1 root 1544:
1545: /* If defined, this is a C expression whose value should be
1546: nonzero if the insn INSN has the effect of mysteriously
1547: clobbering the contents of hard register number REGNO. By
1548: "mysterious" we mean that the insn's RTL expression doesn't
1549: describe such an effect.
1550:
1551: If this macro is not defined, it means that no insn clobbers
1552: registers mysteriously. This is the usual situation; all else
1553: being equal, it is best for the RTL expression to show all the
1554: activity. */
1555:
1556: /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) */
1557:
1558:
1559: /* Stack layout; function entry, exit and calling. */
1560:
1561: /* Define this if pushing a word on the stack
1562: makes the stack pointer a smaller address. */
1563: #define STACK_GROWS_DOWNWARD
1564:
1565: /* Define this if the nominal address of the stack frame
1566: is at the high-address end of the local variables;
1567: that is, each additional local variable allocated
1568: goes at a more negative offset in the frame. */
1569: /* #define FRAME_GROWS_DOWNWARD */
1570:
1571: /* Offset within stack frame to start allocating local variables at.
1572: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
1573: first local allocated. Otherwise, it is the offset to the BEGINNING
1574: of the first local allocated. */
1.1.1.2 root 1575: #define STARTING_FRAME_OFFSET \
1576: (current_function_outgoing_args_size \
1577: + (TARGET_ABICALLS ? MIPS_STACK_ALIGN (UNITS_PER_WORD) : 0))
1.1 root 1578:
1579: /* Offset from the stack pointer register to an item dynamically
1580: allocated on the stack, e.g., by `alloca'.
1581:
1582: The default value for this macro is `STACK_POINTER_OFFSET' plus the
1583: length of the outgoing arguments. The default is correct for most
1584: machines. See `function.c' for details.
1585:
1586: The MIPS ABI states that functions which dynamically allocate the
1587: stack must not have 0 for STACK_DYNAMIC_OFFSET, since it looks like
1588: we are trying to create a second frame pointer to the function, so
1589: allocate some stack space to make it happy.
1590:
1591: However, the linker currently complains about linking any code that
1592: dynamically allocates stack space, and there seems to be a bug in
1593: STACK_DYNAMIC_OFFSET, so don't define this right now. */
1594:
1595: #if 0
1596: #define STACK_DYNAMIC_OFFSET(FUNDECL) \
1597: ((current_function_outgoing_args_size == 0 && current_function_calls_alloca) \
1598: ? 4*UNITS_PER_WORD \
1599: : current_function_outgoing_args_size)
1600: #endif
1601:
1602: /* Structure to be filled in by compute_frame_size with register
1603: save masks, and offsets for the current function. */
1604:
1605: struct mips_frame_info
1606: {
1607: long total_size; /* # bytes that the entire frame takes up */
1608: long var_size; /* # bytes that variables take up */
1609: long args_size; /* # bytes that outgoing arguments take up */
1610: long extra_size; /* # bytes of extra gunk */
1611: int gp_reg_size; /* # bytes needed to store gp regs */
1612: int fp_reg_size; /* # bytes needed to store fp regs */
1613: long mask; /* mask of saved gp registers */
1614: long fmask; /* mask of saved fp registers */
1615: long gp_save_offset; /* offset from vfp to store gp registers */
1616: long fp_save_offset; /* offset from vfp to store fp registers */
1617: long gp_sp_offset; /* offset from new sp to store gp registers */
1618: long fp_sp_offset; /* offset from new sp to store fp registers */
1619: int initialized; /* != 0 if frame size already calculated */
1620: int num_gp; /* number of gp registers saved */
1621: int num_fp; /* number of fp registers saved */
1622: };
1623:
1624: extern struct mips_frame_info current_frame_info;
1625:
1626: /* Store in the variable DEPTH the initial difference between the
1627: frame pointer reg contents and the stack pointer reg contents,
1628: as of the start of the function body. This depends on the layout
1629: of the fixed parts of the stack frame and on how registers are saved. */
1630:
1631: /* #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
1632: ((VAR) = compute_frame_size (get_frame_size ())) */
1633:
1634: /* If defined, this macro specifies a table of register pairs used to
1635: eliminate unneeded registers that point into the stack frame. If
1636: it is not defined, the only elimination attempted by the compiler
1637: is to replace references to the frame pointer with references to
1638: the stack pointer.
1639:
1640: The definition of this macro is a list of structure
1641: initializations, each of which specifies an original and
1642: replacement register.
1643:
1644: On some machines, the position of the argument pointer is not
1645: known until the compilation is completed. In such a case, a
1646: separate hard register must be used for the argument pointer.
1647: This register can be eliminated by replacing it with either the
1648: frame pointer or the argument pointer, depending on whether or not
1649: the frame pointer has been eliminated.
1650:
1651: In this case, you might specify:
1652: #define ELIMINABLE_REGS \
1653: {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1654: {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1655: {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1656:
1657: Note that the elimination of the argument pointer with the stack
1658: pointer is specified first since that is the preferred elimination. */
1659:
1660: #define ELIMINABLE_REGS \
1661: {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1662: { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1663: { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1664:
1665:
1666: /* A C expression that returns non-zero if the compiler is allowed to
1667: try to replace register number FROM-REG with register number
1668: TO-REG. This macro need only be defined if `ELIMINABLE_REGS' is
1669: defined, and will usually be the constant 1, since most of the
1670: cases preventing register elimination are things that the compiler
1671: already knows about. */
1672:
1673: #define CAN_ELIMINATE(FROM, TO) \
1674: (!frame_pointer_needed \
1675: || ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM))
1676:
1677: /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It
1678: specifies the initial difference between the specified pair of
1679: registers. This macro must be defined if `ELIMINABLE_REGS' is
1680: defined. */
1681:
1682: #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1683: { compute_frame_size (get_frame_size ()); \
1684: if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1685: (OFFSET) = 0; \
1686: else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1687: (OFFSET) = current_frame_info.total_size; \
1688: else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1689: (OFFSET) = current_frame_info.total_size; \
1690: else \
1691: abort (); \
1692: }
1693:
1694:
1695: /* If we generate an insn to push BYTES bytes,
1696: this says how many the stack pointer really advances by.
1697: On the vax, sp@- in a byte insn really pushes a word. */
1698:
1699: /* #define PUSH_ROUNDING(BYTES) 0 */
1700:
1701: /* If defined, the maximum amount of space required for outgoing
1702: arguments will be computed and placed into the variable
1703: `current_function_outgoing_args_size'. No space will be pushed
1704: onto the stack for each call; instead, the function prologue
1705: should increase the stack frame size by this amount.
1706:
1707: It is not proper to define both `PUSH_ROUNDING' and
1708: `ACCUMULATE_OUTGOING_ARGS'. */
1709: #define ACCUMULATE_OUTGOING_ARGS
1710:
1711: /* Offset from the argument pointer register to the first argument's
1712: address. On some machines it may depend on the data type of the
1713: function.
1714:
1715: If `ARGS_GROW_DOWNWARD', this is the offset to the location above
1716: the first argument's address.
1717:
1718: On the MIPS, we must skip the first argument position if we are
1.1.1.3 ! root 1719: returning a structure or a union, to account for its address being
1.1 root 1720: passed in $4. However, at the current time, this produces a compiler
1721: that can't bootstrap, so comment it out for now. */
1722:
1723: #if 0
1724: #define FIRST_PARM_OFFSET(FNDECL) \
1725: (FNDECL != 0 \
1726: && TREE_TYPE (FNDECL) != 0 \
1727: && TREE_TYPE (TREE_TYPE (FNDECL)) != 0 \
1728: && (TREE_CODE (TREE_TYPE (TREE_TYPE (FNDECL))) == RECORD_TYPE \
1729: || TREE_CODE (TREE_TYPE (TREE_TYPE (FNDECL))) == UNION_TYPE) \
1730: ? UNITS_PER_WORD \
1731: : 0)
1732: #else
1733: #define FIRST_PARM_OFFSET(FNDECL) 0
1734: #endif
1735:
1736: /* When a parameter is passed in a register, stack space is still
1737: allocated for it. For the MIPS, stack space must be allocated, cf
1738: Asm Lang Prog Guide page 7-8.
1739:
1740: BEWARE that some space is also allocated for non existing arguments
1741: in register. In case an argument list is of form GF used registers
1742: are a0 (a2,a3), but we should push over a1... */
1743:
1744: #define REG_PARM_STACK_SPACE(FNDECL) ((4*UNITS_PER_WORD) - FIRST_PARM_OFFSET (FNDECL))
1745:
1746: /* Define this if it is the responsibility of the caller to
1747: allocate the area reserved for arguments passed in registers.
1748: If `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect
1749: of this macro is to determine whether the space is included in
1750: `current_function_outgoing_args_size'. */
1751: #define OUTGOING_REG_PARM_STACK_SPACE
1752:
1753: /* Align stack frames on 64 bits (Double Word ). */
1754: #define STACK_BOUNDARY 64
1755:
1.1.1.3 ! root 1756: /* Make sure 4 words are always allocated on the stack. */
1.1 root 1757:
1758: #ifndef STACK_ARGS_ADJUST
1759: #define STACK_ARGS_ADJUST(SIZE) \
1760: { \
1.1.1.3 ! root 1761: if (SIZE.constant < 4 * UNITS_PER_WORD) \
! 1762: SIZE.constant = 4 * UNITS_PER_WORD; \
1.1 root 1763: }
1764: #endif
1765:
1766:
1767: /* A C expression that should indicate the number of bytes of its
1768: own arguments that a function function pops on returning, or 0
1769: if the function pops no arguments and the caller must therefore
1770: pop them all after the function returns.
1771:
1772: FUNTYPE is a C variable whose value is a tree node that
1773: describes the function in question. Normally it is a node of
1774: type `FUNCTION_TYPE' that describes the data type of the function.
1775: From this it is possible to obtain the data types of the value
1776: and arguments (if known).
1777:
1778: When a call to a library function is being considered, FUNTYPE
1779: will contain an identifier node for the library function. Thus,
1780: if you need to distinguish among various library functions, you
1781: can do so by their names. Note that "library function" in this
1782: context means a function used to perform arithmetic, whose name
1783: is known specially in the compiler and was not mentioned in the
1784: C code being compiled.
1785:
1786: STACK-SIZE is the number of bytes of arguments passed on the
1787: stack. If a variable number of bytes is passed, it is zero, and
1788: argument popping will always be the responsibility of the
1789: calling function. */
1790:
1791: #define RETURN_POPS_ARGS(FUNTYPE, SIZE) 0
1792:
1793:
1794: /* Symbolic macros for the registers used to return integer and floating
1795: point values. */
1796:
1797: #define GP_RETURN (GP_REG_FIRST + 2)
1798: #define FP_RETURN ((TARGET_SOFT_FLOAT) ? GP_RETURN : (FP_REG_FIRST + 0))
1799:
1800: /* Symbolic macros for the first/last argument registers. */
1801:
1802: #define GP_ARG_FIRST (GP_REG_FIRST + 4)
1803: #define GP_ARG_LAST (GP_REG_FIRST + 7)
1804: #define FP_ARG_FIRST (FP_REG_FIRST + 12)
1805: #define FP_ARG_LAST (FP_REG_FIRST + 15)
1806:
1807: #define MAX_ARGS_IN_REGISTERS 4
1808:
1809: /* Define how to find the value returned by a library function
1810: assuming the value has mode MODE. */
1811:
1812: #define LIBCALL_VALUE(MODE) \
1813: gen_rtx (REG, MODE, \
1814: (GET_MODE_CLASS (MODE) == MODE_FLOAT) \
1815: ? FP_RETURN \
1816: : GP_RETURN)
1817:
1818: /* Define how to find the value returned by a function.
1819: VALTYPE is the data type of the value (as a tree).
1820: If the precise function being called is known, FUNC is its FUNCTION_DECL;
1821: otherwise, FUNC is 0. */
1822:
1823: #define FUNCTION_VALUE(VALTYPE, FUNC) LIBCALL_VALUE (TYPE_MODE (VALTYPE))
1824:
1825:
1826: /* 1 if N is a possible register number for a function value.
1827: On the MIPS, R2 R3 and F0 F2 are the only register thus used.
1828: Currently, R2 and F0 are only implemented here (C has no complex type) */
1829:
1830: #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN || (N) == FP_RETURN)
1831:
1832: /* 1 if N is a possible register number for function argument passing. */
1833:
1834: #define FUNCTION_ARG_REGNO_P(N) (((N) >= GP_ARG_FIRST && (N) <= GP_ARG_LAST) \
1835: || ((N) >= FP_ARG_FIRST && (N) <= FP_ARG_LAST \
1836: && (0 == (N) % 2)))
1837:
1838: /* A C expression which can inhibit the returning of certain function
1839: values in registers, based on the type of value. A nonzero value says
1840: to return the function value in memory, just as large structures are
1841: always returned. Here TYPE will be a C expression of type
1842: `tree', representing the data type of the value.
1843:
1844: Note that values of mode `BLKmode' must be explicitly
1845: handled by this macro. Also, the option `-fpcc-struct-return'
1846: takes effect regardless of this macro. On most systems, it is
1847: possible to leave the macro undefined; this causes a default
1848: definition to be used, whose value is the constant 1 for BLKmode
1849: values, and 0 otherwise.
1850:
1851: GCC normally converts 1 byte structures into chars, 2 byte
1852: structs into shorts, and 4 byte structs into ints, and returns
1853: them this way. Defining the following macro overrides this,
1854: to give us MIPS cc compatibility. */
1855:
1856: #define RETURN_IN_MEMORY(TYPE) \
1857: (TYPE_MODE (TYPE) == BLKmode)
1858:
1859: /* A code distinguishing the floating point format of the target
1860: machine. There are three defined values: IEEE_FLOAT_FORMAT,
1861: VAX_FLOAT_FORMAT, and UNKNOWN_FLOAT_FORMAT. */
1862:
1863: #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
1864:
1865:
1866: /* Define a data type for recording info about an argument list
1867: during the scan of that argument list. This data type should
1868: hold all necessary information about the function itself
1869: and about the args processed so far, enough to enable macros
1870: such as FUNCTION_ARG to determine where the next arg should go.
1871: */
1872:
1873: typedef struct mips_args {
1874: int gp_reg_found; /* whether a gp register was found yet */
1875: int arg_number; /* argument number */
1876: int arg_words; /* # total words the arguments take */
1877: int num_adjusts; /* number of adjustments made */
1878: /* Adjustments made to args pass in regs. */
1.1.1.2 root 1879: /* ??? The size is doubled to work around a
1880: bug in the code that sets the adjustments
1881: in function_arg. */
1882: struct rtx_def *adjust[MAX_ARGS_IN_REGISTERS*2];
1.1 root 1883: } CUMULATIVE_ARGS;
1884:
1885: /* Initialize a variable CUM of type CUMULATIVE_ARGS
1886: for a call to a function whose data type is FNTYPE.
1887: For a library call, FNTYPE is 0.
1888:
1889: */
1890:
1891: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
1892: init_cumulative_args (&CUM, FNTYPE, LIBNAME) \
1893:
1894: /* Update the data in CUM to advance over an argument
1895: of mode MODE and data type TYPE.
1896: (TYPE is null for libcalls where that information may not be available.) */
1897:
1898: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1899: function_arg_advance (&CUM, MODE, TYPE, NAMED)
1900:
1901: /* Determine where to put an argument to a function.
1902: Value is zero to push the argument on the stack,
1903: or a hard register in which to store the argument.
1904:
1905: MODE is the argument's machine mode.
1906: TYPE is the data type of the argument (as a tree).
1907: This is null for libcalls where that information may
1908: not be available.
1909: CUM is a variable of type CUMULATIVE_ARGS which gives info about
1910: the preceding args and about the function being called.
1911: NAMED is nonzero if this argument is a named parameter
1912: (otherwise it is an extra parameter matching an ellipsis). */
1913:
1914: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1915: function_arg( &CUM, MODE, TYPE, NAMED)
1916:
1917: /* For an arg passed partly in registers and partly in memory,
1918: this is the number of registers used.
1919: For args passed entirely in registers or entirely in memory, zero. */
1920:
1921: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1922: function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)
1923:
1924: /* If defined, a C expression that gives the alignment boundary, in
1925: bits, of an argument with the specified mode and type. If it is
1926: not defined, `PARM_BOUNDARY' is used for all arguments. */
1927:
1928: #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1929: (((TYPE) != 0) \
1930: ? ((TYPE_ALIGN(TYPE) <= PARM_BOUNDARY) \
1931: ? PARM_BOUNDARY \
1932: : TYPE_ALIGN(TYPE)) \
1933: : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
1934: ? PARM_BOUNDARY \
1935: : GET_MODE_ALIGNMENT(MODE)))
1936:
1937:
1938: /* This macro generates the assembly code for function entry.
1939: FILE is a stdio stream to output the code to.
1940: SIZE is an int: how many units of temporary storage to allocate.
1941: Refer to the array `regs_ever_live' to determine which registers
1942: to save; `regs_ever_live[I]' is nonzero if register number I
1943: is ever used in the function. This macro is responsible for
1944: knowing which registers should not be saved even if used. */
1945:
1946: #define FUNCTION_PROLOGUE(FILE, SIZE) function_prologue(FILE, SIZE)
1947:
1948: /* This macro generates the assembly code for function exit,
1949: on machines that need it. If FUNCTION_EPILOGUE is not defined
1950: then individual return instructions are generated for each
1951: return statement. Args are same as for FUNCTION_PROLOGUE. */
1952:
1953: #define FUNCTION_EPILOGUE(FILE, SIZE) function_epilogue(FILE, SIZE)
1954:
1955: /* Define the number of delay slots needed for the function epilogue.
1956:
1957: On the mips, we need a slot if either no stack has been allocated,
1958: or the only register saved is the return register. */
1959:
1960: #define DELAY_SLOTS_FOR_EPILOGUE mips_epilogue_delay_slots ()
1961:
1962: /* Define whether INSN can be placed in delay slot N for the epilogue.
1963: No references to the stack must be made, since on the MIPS, the
1964: delay slot is done after the stack has been cleaned up. */
1965:
1966: #define ELIGIBLE_FOR_EPILOGUE_DELAY(INSN,N) \
1967: (get_attr_dslot (INSN) == DSLOT_NO \
1968: && get_attr_length (INSN) == 1 \
1969: && ! epilogue_reg_mentioned_p (PATTERN (INSN)))
1970:
1971: /* Tell prologue and epilogue if register REGNO should be saved / restored. */
1972:
1973: #define MUST_SAVE_REGISTER(regno) \
1974: ((regs_ever_live[regno] && !call_used_regs[regno]) \
1975: || (regno == FRAME_POINTER_REGNUM && frame_pointer_needed) \
1976: || (regno == (GP_REG_FIRST + 31) && regs_ever_live[GP_REG_FIRST + 31]))
1977:
1978: /* ALIGN FRAMES on double word boundaries */
1979:
1980: #define MIPS_STACK_ALIGN(LOC) (((LOC)+7) & ~7)
1981:
1982:
1983: /* Output assembler code to FILE to increment profiler label # LABELNO
1984: for profiling a function entry. */
1985:
1986: #define FUNCTION_PROFILER(FILE, LABELNO) \
1987: { \
1988: fprintf (FILE, "\t.set\tnoreorder\n"); \
1989: fprintf (FILE, "\t.set\tnoat\n"); \
1990: fprintf (FILE, "\tmove\t%s,%s\t\t# save current return address\n", \
1991: reg_names[GP_REG_FIRST + 1], reg_names[GP_REG_FIRST + 31]); \
1992: fprintf (FILE, "\tjal\t_mcount\n"); \
1.1.1.3 ! root 1993: fprintf (FILE, \
! 1994: "\t%s\t%s,%s,%d\t\t# _mcount pops 2 words from stack\n", \
! 1995: TARGET_64BIT ? "dsubu" : "subu", \
! 1996: reg_names[STACK_POINTER_REGNUM], \
1.1 root 1997: reg_names[STACK_POINTER_REGNUM], \
1.1.1.3 ! root 1998: TARGET_LONG64 ? 16 : 8); \
1.1 root 1999: fprintf (FILE, "\t.set\treorder\n"); \
2000: fprintf (FILE, "\t.set\tat\n"); \
2001: }
2002:
2003: /* Define this macro if the code for function profiling should come
2004: before the function prologue. Normally, the profiling code comes
2005: after. */
2006:
2007: /* #define PROFILE_BEFORE_PROLOGUE */
2008:
2009: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
2010: the stack pointer does not matter. The value is tested only in
2011: functions that have frame pointers.
2012: No definition is equivalent to always zero. */
2013:
2014: #define EXIT_IGNORE_STACK 1
2015:
2016:
2017: /* A C statement to output, on the stream FILE, assembler code for a
2018: block of data that contains the constant parts of a trampoline.
2019: This code should not include a label--the label is taken care of
2020: automatically. */
2021:
2022: #define TRAMPOLINE_TEMPLATE(STREAM) \
2023: { \
2024: fprintf (STREAM, "\t.word\t0x03e00821\t\t# move $1,$31\n"); \
2025: fprintf (STREAM, "\t.word\t0x04110001\t\t# bgezal $0,.+8\n"); \
2026: fprintf (STREAM, "\t.word\t0x00000000\t\t# nop\n"); \
1.1.1.3 ! root 2027: if (TARGET_LONG64) \
! 2028: { \
! 2029: fprintf (STREAM, "\t.word\t0xdfe30014\t\t# ld $3,20($31)\n"); \
! 2030: fprintf (STREAM, "\t.word\t0xdfe2001c\t\t# ld $2,28($31)\n"); \
! 2031: } \
! 2032: else \
! 2033: { \
! 2034: fprintf (STREAM, "\t.word\t0x8fe30014\t\t# lw $3,20($31)\n"); \
! 2035: fprintf (STREAM, "\t.word\t0x8fe20018\t\t# lw $2,24($31)\n"); \
! 2036: } \
! 2037: fprintf (STREAM, "\t.word\t0x0060c821\t\t# move $25,$3 (abicalls)\n"); \
1.1 root 2038: fprintf (STREAM, "\t.word\t0x00600008\t\t# jr $3\n"); \
2039: fprintf (STREAM, "\t.word\t0x0020f821\t\t# move $31,$1\n"); \
1.1.1.3 ! root 2040: if (TARGET_LONG64) \
! 2041: { \
! 2042: fprintf (STREAM, "\t.dword\t0x00000000\t\t# <function address>\n"); \
! 2043: fprintf (STREAM, "\t.dword\t0x00000000\t\t# <static chain value>\n"); \
! 2044: } \
! 2045: else \
! 2046: { \
! 2047: fprintf (STREAM, "\t.word\t0x00000000\t\t# <function address>\n"); \
! 2048: fprintf (STREAM, "\t.word\t0x00000000\t\t# <static chain value>\n"); \
! 2049: } \
1.1 root 2050: }
2051:
2052: /* A C expression for the size in bytes of the trampoline, as an
2053: integer. */
2054:
1.1.1.3 ! root 2055: #define TRAMPOLINE_SIZE (32 + (TARGET_LONG64 ? 16 : 8))
1.1 root 2056:
1.1.1.3 ! root 2057: /* Alignment required for trampolines, in bits. */
1.1 root 2058:
1.1.1.3 ! root 2059: #define TRAMPOLINE_ALIGNMENT (TARGET_LONG64 ? 64 : 32)
1.1 root 2060:
2061: /* A C statement to initialize the variable parts of a trampoline.
2062: ADDR is an RTX for the address of the trampoline; FNADDR is an
2063: RTX for the address of the nested function; STATIC_CHAIN is an
2064: RTX for the static chain value that should be passed to the
2065: function when it is called. */
2066:
2067: #define INITIALIZE_TRAMPOLINE(ADDR, FUNC, CHAIN) \
2068: { \
2069: rtx addr = ADDR; \
1.1.1.3 ! root 2070: if (TARGET_LONG64) \
! 2071: { \
! 2072: emit_move_insn (gen_rtx (MEM, DImode, plus_constant (addr, 32)), FUNC); \
! 2073: emit_move_insn (gen_rtx (MEM, DImode, plus_constant (addr, 40)), CHAIN);\
! 2074: } \
! 2075: else \
! 2076: { \
! 2077: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 32)), FUNC); \
! 2078: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 36)), CHAIN);\
! 2079: } \
1.1 root 2080: \
1.1.1.2 root 2081: /* Flush the instruction cache. */ \
1.1.1.3 ! root 2082: /* ??? Are the modes right? Maybe they should depend on -mint64/-mlong64? */\
! 2083: /* ??? Should check the return value for errors. */ \
! 2084: emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "cacheflush"), \
! 2085: 0, VOIDmode, 3, addr, Pmode, \
! 2086: GEN_INT (TRAMPOLINE_SIZE), SImode, \
! 2087: GEN_INT (1), SImode); \
1.1 root 2088: }
2089:
2090: /* Addressing modes, and classification of registers for them. */
2091:
2092: /* #define HAVE_POST_INCREMENT */
2093: /* #define HAVE_POST_DECREMENT */
2094:
2095: /* #define HAVE_PRE_DECREMENT */
2096: /* #define HAVE_PRE_INCREMENT */
2097:
2098: /* These assume that REGNO is a hard or pseudo reg number.
2099: They give nonzero only if REGNO is a hard reg of the suitable class
2100: or a pseudo reg currently allocated to a suitable hard reg.
2101: These definitions are NOT overridden anywhere. */
2102:
2103: #define GP_REG_OR_PSEUDO_STRICT_P(regno) \
2104: GP_REG_P((regno < FIRST_PSEUDO_REGISTER) ? regno : reg_renumber[regno])
2105:
2106: #define GP_REG_OR_PSEUDO_NONSTRICT_P(regno) \
2107: (((regno) >= FIRST_PSEUDO_REGISTER) || (GP_REG_P (regno)))
2108:
1.1.1.3 ! root 2109: #define REGNO_OK_FOR_INDEX_P(regno) 0
1.1 root 2110: #define REGNO_OK_FOR_BASE_P(regno) GP_REG_OR_PSEUDO_STRICT_P (regno)
2111:
2112: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
2113: and check its validity for a certain class.
2114: We have two alternate definitions for each of them.
2115: The usual definition accepts all pseudo regs; the other rejects them all.
2116: The symbol REG_OK_STRICT causes the latter definition to be used.
2117:
2118: Most source files want to accept pseudo regs in the hope that
2119: they will get allocated to the class that the insn wants them to be in.
2120: Some source files that are used after register allocation
2121: need to be strict. */
2122:
2123: #ifndef REG_OK_STRICT
2124:
2125: #define REG_OK_STRICT_P 0
1.1.1.3 ! root 2126: #define REG_OK_FOR_INDEX_P(X) 0
1.1 root 2127: #define REG_OK_FOR_BASE_P(X) GP_REG_OR_PSEUDO_NONSTRICT_P (REGNO (X))
2128:
2129: #else
2130:
2131: #define REG_OK_STRICT_P 1
1.1.1.3 ! root 2132: #define REG_OK_FOR_INDEX_P(X) 0
1.1 root 2133: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
2134:
2135: #endif
2136:
2137:
2138: /* Maximum number of registers that can appear in a valid memory address. */
2139:
2140: #define MAX_REGS_PER_ADDRESS 1
2141:
2142: /* A C compound statement with a conditional `goto LABEL;' executed
2143: if X (an RTX) is a legitimate memory address on the target
2144: machine for a memory operand of mode MODE.
2145:
2146: It usually pays to define several simpler macros to serve as
2147: subroutines for this one. Otherwise it may be too complicated
2148: to understand.
2149:
2150: This macro must exist in two variants: a strict variant and a
2151: non-strict one. The strict variant is used in the reload pass.
2152: It must be defined so that any pseudo-register that has not been
2153: allocated a hard register is considered a memory reference. In
2154: contexts where some kind of register is required, a
2155: pseudo-register with no hard register must be rejected.
2156:
2157: The non-strict variant is used in other passes. It must be
2158: defined to accept all pseudo-registers in every context where
2159: some kind of register is required.
2160:
2161: Compiler source files that want to use the strict variant of
2162: this macro define the macro `REG_OK_STRICT'. You should use an
2163: `#ifdef REG_OK_STRICT' conditional to define the strict variant
2164: in that case and the non-strict variant otherwise.
2165:
2166: Typically among the subroutines used to define
2167: `GO_IF_LEGITIMATE_ADDRESS' are subroutines to check for
2168: acceptable registers for various purposes (one for base
2169: registers, one for index registers, and so on). Then only these
2170: subroutine macros need have two variants; the higher levels of
2171: macros may be the same whether strict or not.
2172:
2173: Normally, constant addresses which are the sum of a `symbol_ref'
2174: and an integer are stored inside a `const' RTX to mark them as
2175: constant. Therefore, there is no need to recognize such sums
2176: specifically as legitimate addresses. Normally you would simply
2177: recognize any `const' as legitimate.
2178:
2179: Usually `PRINT_OPERAND_ADDRESS' is not prepared to handle
2180: constant sums that are not marked with `const'. It assumes
2181: that a naked `plus' indicates indexing. If so, then you *must*
2182: reject such naked constant sums as illegitimate addresses, so
2183: that none of them will be given to `PRINT_OPERAND_ADDRESS'.
2184:
2185: On some machines, whether a symbolic address is legitimate
2186: depends on the section that the address refers to. On these
2187: machines, define the macro `ENCODE_SECTION_INFO' to store the
2188: information into the `symbol_ref', and then check for it here.
2189: When you see a `const', you will have to look inside it to find
2190: the `symbol_ref' in order to determine the section. */
2191:
2192: #if 1
2193: #define GO_PRINTF(x) trace(x)
2194: #define GO_PRINTF2(x,y) trace(x,y)
2195: #define GO_DEBUG_RTX(x) debug_rtx(x)
2196:
2197: #else
2198: #define GO_PRINTF(x)
2199: #define GO_PRINTF2(x,y)
2200: #define GO_DEBUG_RTX(x)
2201: #endif
2202:
2203: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
2204: { \
2205: register rtx xinsn = (X); \
2206: \
2207: if (TARGET_DEBUG_B_MODE) \
2208: { \
2209: GO_PRINTF2 ("\n========== GO_IF_LEGITIMATE_ADDRESS, %sstrict\n", \
2210: (REG_OK_STRICT_P) ? "" : "not "); \
2211: GO_DEBUG_RTX (xinsn); \
2212: } \
2213: \
2214: if (GET_CODE (xinsn) == REG && REG_OK_FOR_BASE_P (xinsn)) \
2215: goto ADDR; \
2216: \
2217: if (CONSTANT_ADDRESS_P (xinsn)) \
2218: goto ADDR; \
2219: \
2220: if (GET_CODE (xinsn) == PLUS) \
2221: { \
2222: register rtx xplus0 = XEXP (xinsn, 0); \
2223: register rtx xplus1 = XEXP (xinsn, 1); \
2224: register enum rtx_code code0 = GET_CODE (xplus0); \
2225: register enum rtx_code code1 = GET_CODE (xplus1); \
2226: \
2227: if (code0 != REG && code1 == REG) \
2228: { \
2229: xplus0 = XEXP (xinsn, 1); \
2230: xplus1 = XEXP (xinsn, 0); \
2231: code0 = GET_CODE (xplus0); \
2232: code1 = GET_CODE (xplus1); \
2233: } \
2234: \
2235: if (code0 == REG && REG_OK_FOR_BASE_P (xplus0)) \
2236: { \
1.1.1.3 ! root 2237: if (code1 == CONST_INT \
! 2238: && INTVAL (xplus1) >= -32768 \
! 2239: && INTVAL (xplus1) + GET_MODE_SIZE (MODE) - 1 <= 32767) \
! 2240: goto ADDR; \
1.1 root 2241: \
2242: /* For some code sequences, you actually get better code by \
2243: pretending that the MIPS supports an address mode of a \
2244: constant address + a register, even though the real \
2245: machine doesn't support it. This is because the \
2246: assembler can use $r1 to load just the high 16 bits, add \
2247: in the register, and fold the low 16 bits into the memory \
2248: reference, whereas the compiler generates a 4 instruction \
2249: sequence. On the other hand, CSE is not as effective. \
2250: It would be a win to generate the lui directly, but the \
2251: MIPS assembler does not have syntax to generate the \
2252: appropriate relocation. */ \
2253: \
1.1.1.3 ! root 2254: /* Also accept CONST_INT addresses here, so no else. */ \
! 2255: /* Reject combining an embedded PIC text segment reference \
! 2256: with a register. That requires an additional \
! 2257: instruction. */ \
! 2258: if (!TARGET_DEBUG_A_MODE \
! 2259: && CONSTANT_ADDRESS_P (xplus1) \
! 2260: && (!TARGET_EMBEDDED_PIC \
! 2261: || code1 != CONST \
! 2262: || GET_CODE (XEXP (xplus1, 0)) != MINUS)) \
1.1 root 2263: goto ADDR; \
2264: } \
2265: } \
2266: \
2267: if (TARGET_DEBUG_B_MODE) \
2268: GO_PRINTF ("Not a legitimate address\n"); \
2269: }
2270:
2271:
2272: /* A C expression that is 1 if the RTX X is a constant which is a
2273: valid address. This is defined to be the same as `CONSTANT_P (X)',
2274: but rejecting CONST_DOUBLE. */
1.1.1.3 ! root 2275: /* When pic, we must reject addresses of the form symbol+large int.
! 2276: This is because an instruction `sw $4,s+70000' needs to be converted
! 2277: by the assembler to `lw $at,s($gp);sw $4,70000($at)'. Normally the
! 2278: assembler would use $at as a temp to load in the large offset. In this
! 2279: case $at is already in use. We convert such problem addresses to
! 2280: `la $5,s;sw $4,70000($5)' via LEGITIMIZE_ADDRESS. */
1.1 root 2281: #define CONSTANT_ADDRESS_P(X) \
2282: ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1.1.1.3 ! root 2283: || GET_CODE (X) == CONST_INT || GET_CODE (X) == HIGH \
! 2284: || (GET_CODE (X) == CONST \
! 2285: && ! (flag_pic && pic_address_needs_scratch (X)))) \
! 2286: && (!HALF_PIC_P () || !HALF_PIC_ADDRESS_P (X)))
1.1 root 2287:
1.1.1.3 ! root 2288: /* Define this, so that when PIC, reload won't try to reload invalid
! 2289: addresses which require two reload registers. */
! 2290:
! 2291: #define LEGITIMATE_PIC_OPERAND_P(X) (! pic_address_needs_scratch (X))
1.1 root 2292:
2293: /* Nonzero if the constant value X is a legitimate general operand.
2294: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
2295:
2296: At present, GAS doesn't understand li.[sd], so don't allow it
2297: to be generated at present. Also, the MIPS assembler does not
2298: grok li.d Infinity. */
2299:
2300: #define LEGITIMATE_CONSTANT_P(X) \
2301: (GET_CODE (X) != CONST_DOUBLE || mips_const_double_ok (X, GET_MODE (X)))
2302:
2303:
2304: /* A C compound statement that attempts to replace X with a valid
2305: memory address for an operand of mode MODE. WIN will be a C
2306: statement label elsewhere in the code; the macro definition may
2307: use
2308:
2309: GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN);
2310:
2311: to avoid further processing if the address has become legitimate.
2312:
2313: X will always be the result of a call to `break_out_memory_refs',
2314: and OLDX will be the operand that was given to that function to
2315: produce X.
2316:
2317: The code generated by this macro should not alter the
2318: substructure of X. If it transforms X into a more legitimate
2319: form, it should assign X (which will always be a C variable) a
2320: new value.
2321:
2322: It is not necessary for this macro to come up with a legitimate
2323: address. The compiler has standard ways of doing so in all
2324: cases. In fact, it is safe for this macro to do nothing. But
2325: often a machine-dependent strategy can generate better code.
2326:
2327: For the MIPS, transform:
2328:
2329: memory(X + <large int>)
2330:
2331: into:
2332:
2333: Y = <large int> & ~0x7fff;
2334: Z = X + Y
2335: memory (Z + (<large int> & 0x7fff));
2336:
1.1.1.3 ! root 2337: This is for CSE to find several similar references, and only use one Z.
! 2338:
! 2339: When PIC, convert addresses of the form memory (symbol+large int) to
! 2340: memory (reg+large int). */
! 2341:
1.1 root 2342:
2343: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
2344: { \
2345: register rtx xinsn = (X); \
2346: \
2347: if (TARGET_DEBUG_B_MODE) \
2348: { \
2349: GO_PRINTF ("\n========== LEGITIMIZE_ADDRESS\n"); \
2350: GO_DEBUG_RTX (xinsn); \
2351: } \
2352: \
2353: if (GET_CODE (xinsn) == PLUS) \
2354: { \
2355: register rtx xplus0 = XEXP (xinsn, 0); \
2356: register rtx xplus1 = XEXP (xinsn, 1); \
2357: register enum rtx_code code0 = GET_CODE (xplus0); \
2358: register enum rtx_code code1 = GET_CODE (xplus1); \
2359: \
2360: if (code0 != REG && code1 == REG) \
2361: { \
2362: xplus0 = XEXP (xinsn, 1); \
2363: xplus1 = XEXP (xinsn, 0); \
2364: code0 = GET_CODE (xplus0); \
2365: code1 = GET_CODE (xplus1); \
2366: } \
2367: \
2368: if (code0 == REG && REG_OK_FOR_BASE_P (xplus0) \
2369: && code1 == CONST_INT && !SMALL_INT (xplus1)) \
2370: { \
2371: rtx int_reg = gen_reg_rtx (Pmode); \
2372: rtx ptr_reg = gen_reg_rtx (Pmode); \
2373: \
2374: emit_move_insn (int_reg, \
2375: GEN_INT (INTVAL (xplus1) & ~ 0x7fff)); \
2376: \
2377: emit_insn (gen_rtx (SET, VOIDmode, \
2378: ptr_reg, \
2379: gen_rtx (PLUS, Pmode, xplus0, int_reg))); \
2380: \
2381: X = gen_rtx (PLUS, Pmode, ptr_reg, \
2382: GEN_INT (INTVAL (xplus1) & 0x7fff)); \
2383: goto WIN; \
2384: } \
2385: } \
2386: \
1.1.1.3 ! root 2387: if (flag_pic && pic_address_needs_scratch (xinsn)) \
! 2388: { \
! 2389: rtx ptr_reg = gen_reg_rtx (Pmode); \
! 2390: \
! 2391: emit_move_insn (ptr_reg, XEXP (XEXP (xinsn, 0), 0)); \
! 2392: \
! 2393: X = gen_rtx (PLUS, Pmode, ptr_reg, XEXP (XEXP (xinsn, 0), 1)); \
! 2394: goto WIN; \
! 2395: } \
! 2396: \
1.1 root 2397: if (TARGET_DEBUG_B_MODE) \
2398: GO_PRINTF ("LEGITIMIZE_ADDRESS could not fix.\n"); \
2399: }
2400:
2401:
2402: /* A C statement or compound statement with a conditional `goto
2403: LABEL;' executed if memory address X (an RTX) can have different
2404: meanings depending on the machine mode of the memory reference it
2405: is used for.
2406:
2407: Autoincrement and autodecrement addresses typically have
2408: mode-dependent effects because the amount of the increment or
2409: decrement is the size of the operand being addressed. Some
2410: machines have other mode-dependent addresses. Many RISC machines
2411: have no mode-dependent addresses.
2412:
2413: You may assume that ADDR is a valid address for the machine. */
2414:
2415: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {}
2416:
2417:
2418: /* Define this macro if references to a symbol must be treated
2419: differently depending on something about the variable or
2420: function named by the symbol (such as what section it is in).
2421:
2422: The macro definition, if any, is executed immediately after the
2423: rtl for DECL has been created and stored in `DECL_RTL (DECL)'.
2424: The value of the rtl will be a `mem' whose address is a
2425: `symbol_ref'.
2426:
2427: The usual thing for this macro to do is to a flag in the
2428: `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
2429: name string in the `symbol_ref' (if one bit is not enough
2430: information).
2431:
2432: The best way to modify the name string is by adding text to the
2433: beginning, with suitable punctuation to prevent any ambiguity.
2434: Allocate the new name in `saveable_obstack'. You will have to
2435: modify `ASM_OUTPUT_LABELREF' to remove and decode the added text
2436: and output the name accordingly.
2437:
2438: You can also check the information stored in the `symbol_ref' in
2439: the definition of `GO_IF_LEGITIMATE_ADDRESS' or
2440: `PRINT_OPERAND_ADDRESS'. */
2441:
2442: #define ENCODE_SECTION_INFO(DECL) \
2443: do \
2444: { \
1.1.1.3 ! root 2445: if (TARGET_EMBEDDED_PIC) \
! 2446: { \
! 2447: if (TREE_CODE (DECL) == VAR_DECL) \
! 2448: SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \
! 2449: else if (TREE_CODE (DECL) == FUNCTION_DECL) \
! 2450: SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 0; \
! 2451: else if (TREE_CODE (DECL) == STRING_CST \
! 2452: && ! flag_writable_strings) \
! 2453: SYMBOL_REF_FLAG (XEXP (TREE_CST_RTL (DECL), 0)) = 0; \
! 2454: else \
! 2455: SYMBOL_REF_FLAG (XEXP (TREE_CST_RTL (DECL), 0)) = 1; \
! 2456: } \
! 2457: \
! 2458: else if (TARGET_GP_OPT && TREE_CODE (DECL) == VAR_DECL) \
1.1 root 2459: { \
2460: int size = int_size_in_bytes (TREE_TYPE (DECL)); \
2461: \
2462: if (size > 0 && size <= mips_section_threshold) \
2463: SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \
2464: } \
2465: \
2466: else if (HALF_PIC_P ()) \
2467: HALF_PIC_ENCODE (DECL); \
2468: } \
2469: while (0)
2470:
2471:
2472: /* Specify the machine mode that this machine uses
2473: for the index in the tablejump instruction. */
1.1.1.3 ! root 2474: #define CASE_VECTOR_MODE (TARGET_LONG64 ? DImode : SImode)
1.1 root 2475:
2476: /* Define this if the tablejump instruction expects the table
2477: to contain offsets from the address of the table.
2478: Do not define this if the table should contain absolute addresses. */
2479: /* #define CASE_VECTOR_PC_RELATIVE */
2480:
2481: /* Specify the tree operation to be used to convert reals to integers. */
2482: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
2483:
2484: /* This is the kind of divide that is easiest to do in the general case. */
2485: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
2486:
2487: /* Define this as 1 if `char' should by default be signed; else as 0. */
2488: #ifndef DEFAULT_SIGNED_CHAR
2489: #define DEFAULT_SIGNED_CHAR 1
2490: #endif
2491:
2492: /* Max number of bytes we can move from memory to memory
2493: in one reasonably fast instruction. */
1.1.1.3 ! root 2494: #define MOVE_MAX (TARGET_64BIT ? 8 : 4)
! 2495: #define MAX_MOVE_MAX 8
1.1 root 2496:
2497: /* Define this macro as a C expression which is nonzero if
2498: accessing less than a word of memory (i.e. a `char' or a
2499: `short') is no faster than accessing a word of memory, i.e., if
2500: such access require more than one instruction or if there is no
2501: difference in cost between byte and (aligned) word loads.
2502:
2503: On RISC machines, it tends to generate better code to define
2504: this as 1, since it avoids making a QI or HI mode register. */
2505: #define SLOW_BYTE_ACCESS 1
2506:
2507: /* We assume that the store-condition-codes instructions store 0 for false
2508: and some other value for true. This is the value stored for true. */
2509:
2510: #define STORE_FLAG_VALUE 1
2511:
2512: /* Define this if zero-extension is slow (more than one real instruction). */
2513: #define SLOW_ZERO_EXTEND
2514:
1.1.1.2 root 2515: /* Define this to be nonzero if shift instructions ignore all but the low-order
2516: few bits. */
2517: #define SHIFT_COUNT_TRUNCATED 1
1.1 root 2518:
2519: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
2520: is done just by pretending it is already truncated. */
1.1.1.3 ! root 2521: /* In 64 bit mode, 32 bit instructions require that register values be properly
! 2522: sign-extended to 64 bits. As a result, a truncate is not a no-op if it
! 2523: converts a value >32 bits to a value <32 bits. */
! 2524: /* ??? This results in inefficient code for 64 bit to 32 conversions.
! 2525: Something needs to be done about this. Perhaps not use any 32 bit
! 2526: instructions? Perhaps use PROMOTE_MODE? */
! 2527: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) \
! 2528: (TARGET_64BIT ? ((INPREC) <= 32 || (OUTPREC) > 32) : 1)
1.1 root 2529:
2530: /* Define this macro to control use of the character `$' in
2531: identifier names. The value should be 0, 1, or 2. 0 means `$'
2532: is not allowed by default; 1 means it is allowed by default if
2533: `-traditional' is used; 2 means it is allowed by default provided
2534: `-ansi' is not used. 1 is the default; there is no need to
2535: define this macro in that case. */
2536:
2537: #ifndef DOLLARS_IN_IDENTIFIERS
2538: #define DOLLARS_IN_IDENTIFIERS 1
2539: #endif
2540:
2541: /* Specify the machine mode that pointers have.
2542: After generation of rtl, the compiler makes no further distinction
2543: between pointers and any other objects of this machine mode. */
1.1.1.3 ! root 2544:
! 2545: #define Pmode (TARGET_LONG64 ? DImode : SImode)
1.1 root 2546:
2547: /* A function address in a call instruction
2548: is a word address (for indexing purposes)
2549: so give the MEM rtx a words's mode. */
2550:
1.1.1.3 ! root 2551: #define FUNCTION_MODE (TARGET_LONG64 ? DImode : SImode)
1.1 root 2552:
2553: /* Define TARGET_MEM_FUNCTIONS if we want to use calls to memcpy and
2554: memset, instead of the BSD functions bcopy and bzero. */
2555:
2556: #if defined(MIPS_SYSV) || defined(OSF_OS)
2557: #define TARGET_MEM_FUNCTIONS
2558: #endif
2559:
2560:
2561: /* A part of a C `switch' statement that describes the relative
2562: costs of constant RTL expressions. It must contain `case'
2563: labels for expression codes `const_int', `const', `symbol_ref',
2564: `label_ref' and `const_double'. Each case must ultimately reach
2565: a `return' statement to return the relative cost of the use of
2566: that kind of constant value in an expression. The cost may
2567: depend on the precise value of the constant, which is available
2568: for examination in X.
2569:
2570: CODE is the expression code--redundant, since it can be obtained
2571: with `GET_CODE (X)'. */
2572:
2573: #define CONST_COSTS(X,CODE,OUTER_CODE) \
2574: case CONST_INT: \
2575: /* Always return 0, since we don't have different sized \
2576: instructions, hence different costs according to Richard \
2577: Kenner */ \
1.1.1.3 ! root 2578: return 0; \
1.1 root 2579: \
2580: case LABEL_REF: \
2581: return COSTS_N_INSNS (2); \
2582: \
2583: case CONST: \
2584: { \
2585: rtx offset = const0_rtx; \
1.1.1.3 ! root 2586: rtx symref = eliminate_constant_term (XEXP (X, 0), &offset); \
1.1 root 2587: \
2588: if (GET_CODE (symref) == LABEL_REF) \
2589: return COSTS_N_INSNS (2); \
2590: \
2591: if (GET_CODE (symref) != SYMBOL_REF) \
2592: return COSTS_N_INSNS (4); \
2593: \
2594: /* let's be paranoid.... */ \
2595: if (INTVAL (offset) < -32768 || INTVAL (offset) > 32767) \
2596: return COSTS_N_INSNS (2); \
2597: \
2598: return COSTS_N_INSNS (SYMBOL_REF_FLAG (symref) ? 1 : 2); \
2599: } \
2600: \
2601: case SYMBOL_REF: \
2602: return COSTS_N_INSNS (SYMBOL_REF_FLAG (X) ? 1 : 2); \
2603: \
2604: case CONST_DOUBLE: \
2605: return COSTS_N_INSNS ((CONST_DOUBLE_HIGH (X) == 0 \
2606: && CONST_DOUBLE_LOW (X)) ? 2 : 4);
2607:
2608:
2609: /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
2610: This can be used, for example, to indicate how costly a multiply
2611: instruction is. In writing this macro, you can use the construct
2612: `COSTS_N_INSNS (N)' to specify a cost equal to N fast instructions.
2613:
2614: This macro is optional; do not define it if the default cost
2615: assumptions are adequate for the target machine.
2616:
2617: If -mdebugd is used, change the multiply cost to 2, so multiply by
2618: a constant isn't converted to a series of shifts. This helps
2619: strength reduction, and also makes it easier to identify what the
2620: compiler is doing. */
2621:
2622: #define RTX_COSTS(X,CODE,OUTER_CODE) \
2623: case MEM: \
2624: { \
2625: int num_words = (GET_MODE_SIZE (GET_MODE (X)) > UNITS_PER_WORD) ? 2 : 1; \
2626: if (simple_memory_operand (X, GET_MODE (X))) \
2627: return COSTS_N_INSNS (num_words); \
2628: \
2629: return COSTS_N_INSNS (2*num_words); \
2630: } \
2631: \
2632: case FFS: \
2633: return COSTS_N_INSNS (6); \
2634: \
2635: case NOT: \
1.1.1.3 ! root 2636: return COSTS_N_INSNS ((GET_MODE (X) == DImode && !TARGET_64BIT) ? 2 : 1); \
1.1 root 2637: \
2638: case AND: \
2639: case IOR: \
2640: case XOR: \
1.1.1.3 ! root 2641: if (GET_MODE (X) == DImode && !TARGET_64BIT) \
1.1 root 2642: return COSTS_N_INSNS (2); \
2643: \
2644: return COSTS_N_INSNS (1); \
2645: \
2646: case ASHIFT: \
2647: case ASHIFTRT: \
2648: case LSHIFTRT: \
1.1.1.3 ! root 2649: if (GET_MODE (X) == DImode && !TARGET_64BIT) \
! 2650: return COSTS_N_INSNS ((GET_CODE (XEXP (X, 1)) == CONST_INT) ? 4 : 12); \
1.1 root 2651: \
2652: return COSTS_N_INSNS (1); \
2653: \
2654: case ABS: \
2655: { \
2656: enum machine_mode xmode = GET_MODE (X); \
2657: if (xmode == SFmode || xmode == DFmode) \
2658: return COSTS_N_INSNS (1); \
2659: \
2660: return COSTS_N_INSNS (4); \
2661: } \
2662: \
2663: case PLUS: \
2664: case MINUS: \
2665: { \
2666: enum machine_mode xmode = GET_MODE (X); \
2667: if (xmode == SFmode || xmode == DFmode) \
1.1.1.3 ! root 2668: { \
! 2669: if (mips_cpu == PROCESSOR_R3000) \
! 2670: return COSTS_N_INSNS (2); \
! 2671: else if (mips_cpu == PROCESSOR_R6000) \
! 2672: return COSTS_N_INSNS (3); \
! 2673: else \
! 2674: return COSTS_N_INSNS (6); \
! 2675: } \
1.1 root 2676: \
1.1.1.3 ! root 2677: if (xmode == DImode && !TARGET_64BIT) \
1.1 root 2678: return COSTS_N_INSNS (4); \
2679: \
2680: return COSTS_N_INSNS (1); \
2681: } \
2682: \
2683: case NEG: \
1.1.1.3 ! root 2684: return COSTS_N_INSNS ((GET_MODE (X) == DImode && !TARGET_64BIT) ? 4 : 1); \
1.1 root 2685: \
2686: case MULT: \
2687: { \
2688: enum machine_mode xmode = GET_MODE (X); \
2689: if (xmode == SFmode) \
1.1.1.3 ! root 2690: { \
! 2691: if (mips_cpu == PROCESSOR_R3000) \
! 2692: return COSTS_N_INSNS (4); \
! 2693: else if (mips_cpu == PROCESSOR_R6000) \
! 2694: return COSTS_N_INSNS (5); \
! 2695: else \
! 2696: return COSTS_N_INSNS (7); \
! 2697: } \
1.1 root 2698: \
2699: if (xmode == DFmode) \
1.1.1.3 ! root 2700: { \
! 2701: if (mips_cpu == PROCESSOR_R3000) \
! 2702: return COSTS_N_INSNS (5); \
! 2703: else if (mips_cpu == PROCESSOR_R6000) \
! 2704: return COSTS_N_INSNS (6); \
! 2705: else \
! 2706: return COSTS_N_INSNS (8); \
! 2707: } \
1.1 root 2708: \
1.1.1.3 ! root 2709: if (mips_cpu == PROCESSOR_R3000) \
! 2710: return COSTS_N_INSNS (12); \
! 2711: else if (mips_cpu == PROCESSOR_R6000) \
! 2712: return COSTS_N_INSNS (17); \
! 2713: else \
! 2714: return COSTS_N_INSNS (10); \
1.1 root 2715: } \
2716: \
2717: case DIV: \
2718: case MOD: \
2719: { \
2720: enum machine_mode xmode = GET_MODE (X); \
2721: if (xmode == SFmode) \
1.1.1.3 ! root 2722: { \
! 2723: if (mips_cpu == PROCESSOR_R3000) \
! 2724: return COSTS_N_INSNS (12); \
! 2725: else if (mips_cpu == PROCESSOR_R6000) \
! 2726: return COSTS_N_INSNS (15); \
! 2727: else \
! 2728: return COSTS_N_INSNS (23); \
! 2729: } \
1.1 root 2730: \
2731: if (xmode == DFmode) \
1.1.1.3 ! root 2732: { \
! 2733: if (mips_cpu == PROCESSOR_R3000) \
! 2734: return COSTS_N_INSNS (19); \
! 2735: else if (mips_cpu == PROCESSOR_R6000) \
! 2736: return COSTS_N_INSNS (16); \
! 2737: else \
! 2738: return COSTS_N_INSNS (36); \
! 2739: } \
1.1 root 2740: } \
2741: /* fall through */ \
2742: \
2743: case UDIV: \
2744: case UMOD: \
1.1.1.3 ! root 2745: if (mips_cpu == PROCESSOR_R3000) \
! 2746: return COSTS_N_INSNS (35); \
! 2747: else if (mips_cpu == PROCESSOR_R6000) \
! 2748: return COSTS_N_INSNS (38); \
! 2749: else \
! 2750: return COSTS_N_INSNS (69);
1.1 root 2751:
2752: /* An expression giving the cost of an addressing mode that
2753: contains ADDRESS. If not defined, the cost is computed from the
2754: form of the ADDRESS expression and the `CONST_COSTS' values.
2755:
2756: For most CISC machines, the default cost is a good approximation
2757: of the true cost of the addressing mode. However, on RISC
2758: machines, all instructions normally have the same length and
2759: execution time. Hence all addresses will have equal costs.
2760:
2761: In cases where more than one form of an address is known, the
2762: form with the lowest cost will be used. If multiple forms have
2763: the same, lowest, cost, the one that is the most complex will be
2764: used.
2765:
2766: For example, suppose an address that is equal to the sum of a
2767: register and a constant is used twice in the same basic block.
2768: When this macro is not defined, the address will be computed in
2769: a register and memory references will be indirect through that
2770: register. On machines where the cost of the addressing mode
2771: containing the sum is no higher than that of a simple indirect
2772: reference, this will produce an additional instruction and
2773: possibly require an additional register. Proper specification
2774: of this macro eliminates this overhead for such machines.
2775:
2776: Similar use of this macro is made in strength reduction of loops.
2777:
2778: ADDRESS need not be valid as an address. In such a case, the
2779: cost is not relevant and can be any value; invalid addresses
2780: need not be assigned a different cost.
2781:
2782: On machines where an address involving more than one register is
2783: as cheap as an address computation involving only one register,
2784: defining `ADDRESS_COST' to reflect this can cause two registers
2785: to be live over a region of code where only one would have been
2786: if `ADDRESS_COST' were not defined in that manner. This effect
2787: should be considered in the definition of this macro.
2788: Equivalent costs should probably only be given to addresses with
2789: different numbers of registers on machines with lots of registers.
2790:
2791: This macro will normally either not be defined or be defined as
2792: a constant. */
2793:
2794: #define ADDRESS_COST(ADDR) (REG_P (ADDR) ? 1 : mips_address_cost (ADDR))
2795:
2796: /* A C expression for the cost of moving data from a register in
2797: class FROM to one in class TO. The classes are expressed using
2798: the enumeration values such as `GENERAL_REGS'. A value of 2 is
2799: the default; other values are interpreted relative to that.
2800:
2801: It is not required that the cost always equal 2 when FROM is the
2802: same as TO; on some machines it is expensive to move between
2803: registers if they are not general registers.
2804:
2805: If reload sees an insn consisting of a single `set' between two
2806: hard registers, and if `REGISTER_MOVE_COST' applied to their
2807: classes returns a value of 2, reload does not check to ensure
2808: that the constraints of the insn are met. Setting a cost of
2809: other than 2 will allow reload to verify that the constraints are
2810: met. You should do this if the `movM' pattern's constraints do
2811: not allow such copying. */
2812:
1.1.1.3 ! root 2813: #define REGISTER_MOVE_COST(FROM, TO) \
! 2814: ((FROM) == GR_REGS && (TO) == GR_REGS ? 2 \
! 2815: : (FROM) == FP_REGS && (TO) == FP_REGS ? 2 \
! 2816: : (FROM) == GR_REGS && (TO) == FP_REGS ? 4 \
! 2817: : (FROM) == FP_REGS && (TO) == GR_REGS ? 4 \
! 2818: : 6)
! 2819:
! 2820: #define MEMORY_MOVE_COST(MODE) \
! 2821: ((mips_cpu == PROCESSOR_R4000 || mips_cpu == PROCESSOR_R6000) ? 6 : 4)
1.1 root 2822:
2823: /* A C expression for the cost of a branch instruction. A value of
2824: 1 is the default; other values are interpreted relative to that. */
2825:
2826: #define BRANCH_COST \
2827: ((mips_cpu == PROCESSOR_R4000 || mips_cpu == PROCESSOR_R6000) ? 2 : 1)
2828:
1.1.1.3 ! root 2829: /* A C statement (sans semicolon) to update the integer variable COST
! 2830: based on the relationship between INSN that is dependent on
! 2831: DEP_INSN through the dependence LINK. The default is to make no
! 2832: adjustment to COST. On the MIPS, ignore the cost of anti- and
! 2833: output-dependencies. */
! 2834:
! 2835: #define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \
! 2836: if (REG_NOTE_KIND (LINK) != 0) \
! 2837: (COST) = 0; /* Anti or output dependence. */
1.1 root 2838:
2839: /* Optionally define this if you have added predicates to
2840: `MACHINE.c'. This macro is called within an initializer of an
2841: array of structures. The first field in the structure is the
2842: name of a predicate and the second field is an array of rtl
2843: codes. For each predicate, list all rtl codes that can be in
2844: expressions matched by the predicate. The list should have a
2845: trailing comma. Here is an example of two entries in the list
2846: for a typical RISC machine:
2847:
2848: #define PREDICATE_CODES \
2849: {"gen_reg_rtx_operand", {SUBREG, REG}}, \
2850: {"reg_or_short_cint_operand", {SUBREG, REG, CONST_INT}},
2851:
2852: Defining this macro does not affect the generated code (however,
2853: incorrect definitions that omit an rtl code that may be matched
2854: by the predicate can cause the compiler to malfunction).
2855: Instead, it allows the table built by `genrecog' to be more
2856: compact and efficient, thus speeding up the compiler. The most
2857: important predicates to include in the list specified by this
2858: macro are thoses used in the most insn patterns. */
2859:
2860: #define PREDICATE_CODES \
2861: {"uns_arith_operand", { REG, CONST_INT, SUBREG }}, \
2862: {"arith_operand", { REG, CONST_INT, SUBREG }}, \
2863: {"arith32_operand", { REG, CONST_INT, SUBREG }}, \
2864: {"reg_or_0_operand", { REG, CONST_INT, SUBREG }}, \
2865: {"small_int", { CONST_INT }}, \
2866: {"large_int", { CONST_INT }}, \
2867: {"mips_const_double_ok", { CONST_DOUBLE }}, \
2868: {"simple_memory_operand", { MEM, SUBREG }}, \
2869: {"equality_op", { EQ, NE }}, \
2870: {"cmp_op", { EQ, NE, GT, GE, GTU, GEU, LT, LE, \
2871: LTU, LEU }}, \
1.1.1.2 root 2872: {"pc_or_label_operand", { PC, LABEL_REF }}, \
2873: {"call_insn_operand", { MEM }}, \
1.1 root 2874:
2875:
2876: /* If defined, a C statement to be executed just prior to the
2877: output of assembler code for INSN, to modify the extracted
2878: operands so they will be output differently.
2879:
2880: Here the argument OPVEC is the vector containing the operands
2881: extracted from INSN, and NOPERANDS is the number of elements of
2882: the vector which contain meaningful data for this insn. The
2883: contents of this vector are what will be used to convert the
2884: insn template into assembler code, so you can change the
2885: assembler output by changing the contents of the vector.
2886:
2887: We use it to check if the current insn needs a nop in front of it
2888: because of load delays, and also to update the delay slot
2889: statistics. */
2890:
2891: #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \
2892: final_prescan_insn (INSN, OPVEC, NOPERANDS)
2893:
2894:
2895: /* Tell final.c how to eliminate redundant test instructions.
2896: Here we define machine-dependent flags and fields in cc_status
2897: (see `conditions.h'). */
2898:
2899: /* A list of names to be used for additional modes for condition code
2900: values in registers. These names are added to `enum machine_mode'
2901: and all have class `MODE_CC'. By convention, they should start
2902: with `CC' and end with `mode'.
2903:
2904: You should only define this macro if your machine does not use
2905: `cc0' and only if additional modes are required.
2906:
2907: On the MIPS, we use CC_FPmode for all floating point except for not
2908: equal, CC_REV_FPmode for not equal (to reverse the sense of the
2909: jump), CC_EQmode for integer equality/inequality comparisons,
2910: CC_0mode for comparisons against 0, and CCmode for other integer
2911: comparisons. */
2912:
2913: #define EXTRA_CC_MODES CC_EQmode, CC_FPmode, CC_0mode, CC_REV_FPmode
2914:
2915: /* A list of C strings giving the names for the modes listed in
2916: `EXTRA_CC_MODES'. */
2917:
2918: #define EXTRA_CC_NAMES "CC_EQ", "CC_FP", "CC_0", "CC_REV_FP"
2919:
2920: /* Returns a mode from class `MODE_CC' to be used when comparison
2921: operation code OP is applied to rtx X. */
2922:
2923: #define SELECT_CC_MODE(OP, X, Y) \
2924: (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
2925: ? SImode \
2926: : ((OP == NE) ? CC_REV_FPmode : CC_FPmode))
2927:
2928:
2929: /* Control the assembler format that we output. */
2930:
2931: /* Output at beginning of assembler file.
2932: If we are optimizing to use the global pointer, create a temporary
2933: file to hold all of the text stuff, and write it out to the end.
2934: This is needed because the MIPS assembler is evidently one pass,
2935: and if it hasn't seen the relevant .comm/.lcomm/.extern/.sdata
2936: declaration when the code is processed, it generates a two
2937: instruction sequence. */
2938:
2939: #define ASM_FILE_START(STREAM) mips_asm_file_start (STREAM)
2940:
2941: /* Output to assembler file text saying following lines
2942: may contain character constants, extra white space, comments, etc. */
2943:
2944: #define ASM_APP_ON " #APP\n"
2945:
2946: /* Output to assembler file text saying following lines
2947: no longer contain unusual constructs. */
2948:
2949: #define ASM_APP_OFF " #NO_APP\n"
2950:
2951: /* How to refer to registers in assembler output.
2952: This sequence is indexed by compiler's hard-register-number (see above).
2953:
2954: In order to support the two different conventions for register names,
2955: we use the name of a table set up in mips.c, which is overwritten
2956: if -mrnames is used. */
2957:
2958: #define REGISTER_NAMES \
2959: { \
2960: &mips_reg_names[ 0][0], \
2961: &mips_reg_names[ 1][0], \
2962: &mips_reg_names[ 2][0], \
2963: &mips_reg_names[ 3][0], \
2964: &mips_reg_names[ 4][0], \
2965: &mips_reg_names[ 5][0], \
2966: &mips_reg_names[ 6][0], \
2967: &mips_reg_names[ 7][0], \
2968: &mips_reg_names[ 8][0], \
2969: &mips_reg_names[ 9][0], \
2970: &mips_reg_names[10][0], \
2971: &mips_reg_names[11][0], \
2972: &mips_reg_names[12][0], \
2973: &mips_reg_names[13][0], \
2974: &mips_reg_names[14][0], \
2975: &mips_reg_names[15][0], \
2976: &mips_reg_names[16][0], \
2977: &mips_reg_names[17][0], \
2978: &mips_reg_names[18][0], \
2979: &mips_reg_names[19][0], \
2980: &mips_reg_names[20][0], \
2981: &mips_reg_names[21][0], \
2982: &mips_reg_names[22][0], \
2983: &mips_reg_names[23][0], \
2984: &mips_reg_names[24][0], \
2985: &mips_reg_names[25][0], \
2986: &mips_reg_names[26][0], \
2987: &mips_reg_names[27][0], \
2988: &mips_reg_names[28][0], \
2989: &mips_reg_names[29][0], \
2990: &mips_reg_names[30][0], \
2991: &mips_reg_names[31][0], \
2992: &mips_reg_names[32][0], \
2993: &mips_reg_names[33][0], \
2994: &mips_reg_names[34][0], \
2995: &mips_reg_names[35][0], \
2996: &mips_reg_names[36][0], \
2997: &mips_reg_names[37][0], \
2998: &mips_reg_names[38][0], \
2999: &mips_reg_names[39][0], \
3000: &mips_reg_names[40][0], \
3001: &mips_reg_names[41][0], \
3002: &mips_reg_names[42][0], \
3003: &mips_reg_names[43][0], \
3004: &mips_reg_names[44][0], \
3005: &mips_reg_names[45][0], \
3006: &mips_reg_names[46][0], \
3007: &mips_reg_names[47][0], \
3008: &mips_reg_names[48][0], \
3009: &mips_reg_names[49][0], \
3010: &mips_reg_names[50][0], \
3011: &mips_reg_names[51][0], \
3012: &mips_reg_names[52][0], \
3013: &mips_reg_names[53][0], \
3014: &mips_reg_names[54][0], \
3015: &mips_reg_names[55][0], \
3016: &mips_reg_names[56][0], \
3017: &mips_reg_names[57][0], \
3018: &mips_reg_names[58][0], \
3019: &mips_reg_names[59][0], \
3020: &mips_reg_names[60][0], \
3021: &mips_reg_names[61][0], \
3022: &mips_reg_names[62][0], \
3023: &mips_reg_names[63][0], \
3024: &mips_reg_names[64][0], \
3025: &mips_reg_names[65][0], \
3026: &mips_reg_names[66][0], \
3027: }
3028:
3029: /* print-rtl.c can't use REGISTER_NAMES, since it depends on mips.c.
3030: So define this for it. */
3031: #define DEBUG_REGISTER_NAMES \
3032: { \
3033: "$0", "at", "v0", "v1", "a0", "a1", "a2", "a3", \
3034: "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \
3035: "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
3036: "t8", "t9", "k0", "k1", "gp", "sp", "$fp", "ra", \
3037: "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", \
3038: "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
3039: "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", \
3040: "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", \
3041: "hi", "lo", "$fcr31" \
3042: }
3043:
3044: /* If defined, a C initializer for an array of structures
3045: containing a name and a register number. This macro defines
3046: additional names for hard registers, thus allowing the `asm'
3047: option in declarations to refer to registers using alternate
3048: names.
3049:
3050: We define both names for the integer registers here. */
3051:
3052: #define ADDITIONAL_REGISTER_NAMES \
3053: { \
3054: { "$0", 0 + GP_REG_FIRST }, \
3055: { "$1", 1 + GP_REG_FIRST }, \
3056: { "$2", 2 + GP_REG_FIRST }, \
3057: { "$3", 3 + GP_REG_FIRST }, \
3058: { "$4", 4 + GP_REG_FIRST }, \
3059: { "$5", 5 + GP_REG_FIRST }, \
3060: { "$6", 6 + GP_REG_FIRST }, \
3061: { "$7", 7 + GP_REG_FIRST }, \
3062: { "$8", 8 + GP_REG_FIRST }, \
3063: { "$9", 9 + GP_REG_FIRST }, \
3064: { "$10", 10 + GP_REG_FIRST }, \
3065: { "$11", 11 + GP_REG_FIRST }, \
3066: { "$12", 12 + GP_REG_FIRST }, \
3067: { "$13", 13 + GP_REG_FIRST }, \
3068: { "$14", 14 + GP_REG_FIRST }, \
3069: { "$15", 15 + GP_REG_FIRST }, \
3070: { "$16", 16 + GP_REG_FIRST }, \
3071: { "$17", 17 + GP_REG_FIRST }, \
3072: { "$18", 18 + GP_REG_FIRST }, \
3073: { "$19", 19 + GP_REG_FIRST }, \
3074: { "$20", 20 + GP_REG_FIRST }, \
3075: { "$21", 21 + GP_REG_FIRST }, \
3076: { "$22", 22 + GP_REG_FIRST }, \
3077: { "$23", 23 + GP_REG_FIRST }, \
3078: { "$24", 24 + GP_REG_FIRST }, \
3079: { "$25", 25 + GP_REG_FIRST }, \
3080: { "$26", 26 + GP_REG_FIRST }, \
3081: { "$27", 27 + GP_REG_FIRST }, \
3082: { "$28", 28 + GP_REG_FIRST }, \
3083: { "$29", 29 + GP_REG_FIRST }, \
3084: { "$30", 30 + GP_REG_FIRST }, \
3085: { "$31", 31 + GP_REG_FIRST }, \
3086: { "$sp", 29 + GP_REG_FIRST }, \
3087: { "$fp", 30 + GP_REG_FIRST }, \
3088: { "at", 1 + GP_REG_FIRST }, \
3089: { "v0", 2 + GP_REG_FIRST }, \
3090: { "v1", 3 + GP_REG_FIRST }, \
3091: { "a0", 4 + GP_REG_FIRST }, \
3092: { "a1", 5 + GP_REG_FIRST }, \
3093: { "a2", 6 + GP_REG_FIRST }, \
3094: { "a3", 7 + GP_REG_FIRST }, \
3095: { "t0", 8 + GP_REG_FIRST }, \
3096: { "t1", 9 + GP_REG_FIRST }, \
3097: { "t2", 10 + GP_REG_FIRST }, \
3098: { "t3", 11 + GP_REG_FIRST }, \
3099: { "t4", 12 + GP_REG_FIRST }, \
3100: { "t5", 13 + GP_REG_FIRST }, \
3101: { "t6", 14 + GP_REG_FIRST }, \
3102: { "t7", 15 + GP_REG_FIRST }, \
3103: { "s0", 16 + GP_REG_FIRST }, \
3104: { "s1", 17 + GP_REG_FIRST }, \
3105: { "s2", 18 + GP_REG_FIRST }, \
3106: { "s3", 19 + GP_REG_FIRST }, \
3107: { "s4", 20 + GP_REG_FIRST }, \
3108: { "s5", 21 + GP_REG_FIRST }, \
3109: { "s6", 22 + GP_REG_FIRST }, \
3110: { "s7", 23 + GP_REG_FIRST }, \
3111: { "t8", 24 + GP_REG_FIRST }, \
3112: { "t9", 25 + GP_REG_FIRST }, \
3113: { "k0", 26 + GP_REG_FIRST }, \
3114: { "k1", 27 + GP_REG_FIRST }, \
3115: { "gp", 28 + GP_REG_FIRST }, \
3116: { "sp", 29 + GP_REG_FIRST }, \
3117: { "fp", 30 + GP_REG_FIRST }, \
3118: { "ra", 31 + GP_REG_FIRST }, \
3119: { "$sp", 29 + GP_REG_FIRST }, \
3120: { "$fp", 30 + GP_REG_FIRST }, \
3121: { "cc", FPSW_REGNUM }, \
3122: }
3123:
3124: /* Define results of standard character escape sequences. */
3125: #define TARGET_BELL 007
3126: #define TARGET_BS 010
3127: #define TARGET_TAB 011
3128: #define TARGET_NEWLINE 012
3129: #define TARGET_VT 013
3130: #define TARGET_FF 014
3131: #define TARGET_CR 015
3132:
3133: /* A C compound statement to output to stdio stream STREAM the
3134: assembler syntax for an instruction operand X. X is an RTL
3135: expression.
3136:
3137: CODE is a value that can be used to specify one of several ways
3138: of printing the operand. It is used when identical operands
3139: must be printed differently depending on the context. CODE
3140: comes from the `%' specification that was used to request
3141: printing of the operand. If the specification was just `%DIGIT'
3142: then CODE is 0; if the specification was `%LTR DIGIT' then CODE
3143: is the ASCII code for LTR.
3144:
3145: If X is a register, this macro should print the register's name.
3146: The names can be found in an array `reg_names' whose type is
3147: `char *[]'. `reg_names' is initialized from `REGISTER_NAMES'.
3148:
3149: When the machine description has a specification `%PUNCT' (a `%'
3150: followed by a punctuation character), this macro is called with
3151: a null pointer for X and the punctuation character for CODE.
3152:
3153: See mips.c for the MIPS specific codes. */
3154:
3155: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
3156:
3157: /* A C expression which evaluates to true if CODE is a valid
3158: punctuation character for use in the `PRINT_OPERAND' macro. If
3159: `PRINT_OPERAND_PUNCT_VALID_P' is not defined, it means that no
3160: punctuation characters (except for the standard one, `%') are
3161: used in this way. */
3162:
3163: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) mips_print_operand_punct[CODE]
3164:
3165: /* A C compound statement to output to stdio stream STREAM the
3166: assembler syntax for an instruction operand that is a memory
3167: reference whose address is ADDR. ADDR is an RTL expression.
3168:
3169: On some machines, the syntax for a symbolic address depends on
3170: the section that the address refers to. On these machines,
3171: define the macro `ENCODE_SECTION_INFO' to store the information
3172: into the `symbol_ref', and then check for it here. */
3173:
3174: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
3175:
3176:
3177: /* A C statement, to be executed after all slot-filler instructions
3178: have been output. If necessary, call `dbr_sequence_length' to
3179: determine the number of slots filled in a sequence (zero if not
3180: currently outputting a sequence), to decide how many no-ops to
3181: output, or whatever.
3182:
3183: Don't define this macro if it has nothing to do, but it is
3184: helpful in reading assembly output if the extent of the delay
3185: sequence is made explicit (e.g. with white space).
3186:
3187: Note that output routines for instructions with delay slots must
3188: be prepared to deal with not being output as part of a sequence
3189: (i.e. when the scheduling pass is not run, or when no slot
3190: fillers could be found.) The variable `final_sequence' is null
3191: when not processing a sequence, otherwise it contains the
3192: `sequence' rtx being output. */
3193:
3194: #define DBR_OUTPUT_SEQEND(STREAM) \
3195: do \
3196: { \
3197: if (set_nomacro > 0 && --set_nomacro == 0) \
3198: fputs ("\t.set\tmacro\n", STREAM); \
3199: \
3200: if (set_noreorder > 0 && --set_noreorder == 0) \
3201: fputs ("\t.set\treorder\n", STREAM); \
3202: \
3203: dslots_jump_filled++; \
3204: fputs ("\n", STREAM); \
3205: } \
3206: while (0)
3207:
3208:
3209: /* How to tell the debugger about changes of source files. Note, the
3210: mips ECOFF format cannot deal with changes of files inside of
3211: functions, which means the output of parser generators like bison
3212: is generally not debuggable without using the -l switch. Lose,
3213: lose, lose. Silicon graphics seems to want all .file's hardwired
3214: to 1. */
3215:
3216: #ifndef SET_FILE_NUMBER
3217: #define SET_FILE_NUMBER() ++num_source_filenames
3218: #endif
3219:
3220: #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
3221: mips_output_filename (STREAM, NAME)
3222:
3223: /* This is how to output a note the debugger telling it the line number
3224: to which the following sequence of instructions corresponds.
3225: Silicon graphics puts a label after each .loc. */
3226:
3227: #ifndef LABEL_AFTER_LOC
3228: #define LABEL_AFTER_LOC(STREAM)
3229: #endif
3230:
3231: #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \
3232: mips_output_lineno (STREAM, LINE)
3233:
1.1.1.3 ! root 3234: /* The MIPS implementation uses some labels for it's own purpose. The
1.1 root 3235: following lists what labels are created, and are all formed by the
3236: pattern $L[a-z].*. The machine independent portion of GCC creates
3237: labels matching: $L[A-Z][0-9]+ and $L[0-9]+.
3238:
3239: LM[0-9]+ Silicon Graphics/ECOFF stabs label before each stmt.
3240: $Lb[0-9]+ Begin blocks for MIPS debug support
3241: $Lc[0-9]+ Label for use in s<xx> operation.
3242: $Le[0-9]+ End blocks for MIPS debug support
3243: $Lp\..+ Half-pic labels. */
3244:
3245: /* This is how to output the definition of a user-level label named NAME,
3246: such as the label on a static function or variable NAME.
3247:
3248: If we are optimizing the gp, remember that this label has been put
3249: out, so we know not to emit an .extern for it in mips_asm_file_end.
3250: We use one of the common bits in the IDENTIFIER tree node for this,
3251: since those bits seem to be unused, and we don't have any method
3252: of getting the decl nodes from the name. */
3253:
3254: #define ASM_OUTPUT_LABEL(STREAM,NAME) \
3255: do { \
3256: assemble_name (STREAM, NAME); \
3257: fputs (":\n", STREAM); \
3258: } while (0)
3259:
3260:
3261: /* A C statement (sans semicolon) to output to the stdio stream
3262: STREAM any text necessary for declaring the name NAME of an
3263: initialized variable which is being defined. This macro must
3264: output the label definition (perhaps using `ASM_OUTPUT_LABEL').
3265: The argument DECL is the `VAR_DECL' tree node representing the
3266: variable.
3267:
3268: If this macro is not defined, then the variable name is defined
3269: in the usual manner as a label (by means of `ASM_OUTPUT_LABEL'). */
3270:
3271: #define ASM_DECLARE_OBJECT_NAME(STREAM, NAME, DECL) \
3272: do \
3273: { \
3274: mips_declare_object (STREAM, NAME, "", ":\n", 0); \
3275: HALF_PIC_DECLARE (NAME); \
3276: } \
3277: while (0)
3278:
3279:
3280: /* This is how to output a command to make the user-level label named NAME
3281: defined for reference from other files. */
3282:
3283: #define ASM_GLOBALIZE_LABEL(STREAM,NAME) \
3284: do { \
3285: fputs ("\t.globl\t", STREAM); \
3286: assemble_name (STREAM, NAME); \
3287: fputs ("\n", STREAM); \
3288: } while (0)
3289:
3290: /* This says how to define a global common symbol. */
3291:
3292: #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
1.1.1.3 ! root 3293: mips_declare_object (STREAM, NAME, "\n\t.comm\t", ",%u\n", (SIZE))
1.1 root 3294:
3295: /* This says how to define a local common symbol (ie, not visible to
3296: linker). */
3297:
3298: #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \
1.1.1.3 ! root 3299: mips_declare_object (STREAM, NAME, "\n\t.lcomm\t", ",%u\n", (SIZE))
1.1 root 3300:
3301:
3302: /* This says how to output an external. It would be possible not to
3303: output anything and let undefined symbol become external. However
3304: the assembler uses length information on externals to allocate in
3305: data/sdata bss/sbss, thereby saving exec time. */
3306:
3307: #define ASM_OUTPUT_EXTERNAL(STREAM,DECL,NAME) \
3308: mips_output_external(STREAM,DECL,NAME)
3309:
3310: /* This says what to print at the end of the assembly file */
3311: #define ASM_FILE_END(STREAM) mips_asm_file_end(STREAM)
3312:
3313:
3314: /* This is how to declare a function name. The actual work of
3315: emitting the label is moved to function_prologue, so that we can
3316: get the line number correctly emitted before the .ent directive,
3317: and after any .file directives.
3318:
3319: Also, switch files if we are optimizing the global pointer. */
3320:
3321: #define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL) \
3322: { \
3323: extern FILE *asm_out_text_file; \
3324: if (TARGET_GP_OPT) \
3325: STREAM = asm_out_text_file; \
3326: \
3327: current_function_name = NAME; \
3328: HALF_PIC_DECLARE (NAME); \
3329: }
3330:
3331: /* This is how to output a reference to a user-level label named NAME.
3332: `assemble_name' uses this. */
3333:
3334: #define ASM_OUTPUT_LABELREF(STREAM,NAME) fprintf (STREAM, "%s", NAME)
3335:
3336: /* This is how to output an internal numbered label where
3337: PREFIX is the class of label and NUM is the number within the class. */
3338:
3339: #define ASM_OUTPUT_INTERNAL_LABEL(STREAM,PREFIX,NUM) \
3340: fprintf (STREAM, "$%s%d:\n", PREFIX, NUM)
3341:
3342: /* This is how to store into the string LABEL
3343: the symbol_ref name of an internal numbered label where
3344: PREFIX is the class of label and NUM is the number within the class.
3345: This is suitable for output with `assemble_name'. */
3346:
3347: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
3348: sprintf (LABEL, "*$%s%d", PREFIX, NUM)
3349:
3350: /* This is how to output an assembler line defining a `double' constant. */
3351:
3352: #define ASM_OUTPUT_DOUBLE(STREAM,VALUE) \
3353: mips_output_double (STREAM, VALUE)
3354:
3355:
3356: /* This is how to output an assembler line defining a `float' constant. */
3357:
3358: #define ASM_OUTPUT_FLOAT(STREAM,VALUE) \
3359: mips_output_float (STREAM, VALUE)
3360:
3361:
3362: /* This is how to output an assembler line defining an `int' constant. */
3363:
3364: #define ASM_OUTPUT_INT(STREAM,VALUE) \
3365: do { \
3366: fprintf (STREAM, "\t.word\t"); \
3367: output_addr_const (STREAM, (VALUE)); \
3368: fprintf (STREAM, "\n"); \
3369: } while (0)
3370:
1.1.1.3 ! root 3371: /* Likewise for 64 bit, `char' and `short' constants. */
! 3372:
! 3373: #define ASM_OUTPUT_DOUBLE_INT(STREAM,VALUE) \
! 3374: do { \
! 3375: if (TARGET_64BIT) \
! 3376: { \
! 3377: fprintf (STREAM, "\t.dword\t"); \
! 3378: output_addr_const (STREAM, (VALUE)); \
! 3379: fprintf (STREAM, "\n"); \
! 3380: } \
! 3381: else \
! 3382: { \
! 3383: assemble_integer (operand_subword ((VALUE), 0, 0, DImode), \
! 3384: UNITS_PER_WORD, 1); \
! 3385: assemble_integer (operand_subword ((VALUE), 1, 0, DImode), \
! 3386: UNITS_PER_WORD, 1); \
! 3387: } \
! 3388: } while (0)
1.1 root 3389:
3390: #define ASM_OUTPUT_SHORT(STREAM,VALUE) \
3391: { \
3392: fprintf (STREAM, "\t.half\t"); \
3393: output_addr_const (STREAM, (VALUE)); \
3394: fprintf (STREAM, "\n"); \
3395: }
3396:
3397: #define ASM_OUTPUT_CHAR(STREAM,VALUE) \
3398: { \
3399: fprintf (STREAM, "\t.byte\t"); \
3400: output_addr_const (STREAM, (VALUE)); \
3401: fprintf (STREAM, "\n"); \
3402: }
3403:
3404: /* This is how to output an assembler line for a numeric constant byte. */
3405:
3406: #define ASM_OUTPUT_BYTE(STREAM,VALUE) \
3407: fprintf (STREAM, "\t.byte\t0x%x\n", (VALUE))
3408:
3409: /* This is how to output an element of a case-vector that is absolute. */
3410:
3411: #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
1.1.1.3 ! root 3412: fprintf (STREAM, "\t%s\t$L%d\n", \
! 3413: TARGET_LONG64 ? ".dword" : ".word", \
! 3414: VALUE)
1.1 root 3415:
3416: /* This is how to output an element of a case-vector that is relative.
1.1.1.3 ! root 3417: This is used for pc-relative code (e.g. when TARGET_ABICALLS or
! 3418: TARGET_EMBEDDED_PIC). */
1.1 root 3419:
3420: #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, VALUE, REL) \
1.1.1.3 ! root 3421: do { \
! 3422: if (TARGET_EMBEDDED_PIC) \
! 3423: fprintf (STREAM, "\t%s\t$L%d-$LS%d\n", \
! 3424: TARGET_LONG64 ? ".dword" : ".word", \
! 3425: VALUE, REL); \
! 3426: else \
! 3427: fprintf (STREAM, "\t%s\t$L%d\n", \
! 3428: TARGET_LONG64 ? ".gpdword" : ".gpword", \
! 3429: VALUE); \
! 3430: } while (0)
1.1 root 3431:
1.1.1.3 ! root 3432: /* When generating embedded PIC code we want to put the jump table in
! 3433: the .text section. In all other cases, we want to put the jump
! 3434: table in the .rdata section. Unfortunately, we can't use
! 3435: JUMP_TABLES_IN_TEXT_SECTION, because it is not conditional.
! 3436: Instead, we use ASM_OUTPUT_CASE_LABEL to switch back to the .text
! 3437: section if appropriate. */
! 3438: #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, INSN) \
! 3439: do { \
! 3440: if (TARGET_EMBEDDED_PIC) \
! 3441: text_section (); \
! 3442: ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); \
! 3443: } while (0)
1.1 root 3444:
3445: /* This is how to output an assembler line
3446: that says to advance the location counter
3447: to a multiple of 2**LOG bytes. */
3448:
3449: #define ASM_OUTPUT_ALIGN(STREAM,LOG) \
3450: { \
3451: int mask = (1 << (LOG)) - 1; \
3452: fprintf (STREAM, "\t.align\t%d\n", (LOG)); \
3453: }
3454:
3455: /* This is how to output an assembler line to to advance the location
3456: counter by SIZE bytes. */
3457:
3458: #define ASM_OUTPUT_SKIP(STREAM,SIZE) \
3459: fprintf (STREAM, "\t.space\t%u\n", (SIZE))
3460:
3461: /* This is how to output a string. */
3462: #define ASM_OUTPUT_ASCII(STREAM, STRING, LEN) \
3463: do { \
3464: register int i, c, len = (LEN), cur_pos = 17; \
3465: register unsigned char *string = (unsigned char *)(STRING); \
3466: fprintf ((STREAM), "\t.ascii\t\""); \
3467: for (i = 0; i < len; i++) \
3468: { \
3469: register int c = string[i]; \
3470: \
3471: switch (c) \
3472: { \
3473: case '\"': \
3474: case '\\': \
3475: putc ('\\', (STREAM)); \
3476: putc (c, (STREAM)); \
3477: cur_pos += 2; \
3478: break; \
3479: \
3480: case TARGET_NEWLINE: \
3481: fputs ("\\n", (STREAM)); \
3482: if (i+1 < len \
3483: && (((c = string[i+1]) >= '\040' && c <= '~') \
3484: || c == TARGET_TAB)) \
3485: cur_pos = 32767; /* break right here */ \
3486: else \
3487: cur_pos += 2; \
3488: break; \
3489: \
3490: case TARGET_TAB: \
3491: fputs ("\\t", (STREAM)); \
3492: cur_pos += 2; \
3493: break; \
3494: \
3495: case TARGET_FF: \
3496: fputs ("\\f", (STREAM)); \
3497: cur_pos += 2; \
3498: break; \
3499: \
3500: case TARGET_BS: \
3501: fputs ("\\b", (STREAM)); \
3502: cur_pos += 2; \
3503: break; \
3504: \
3505: case TARGET_CR: \
3506: fputs ("\\r", (STREAM)); \
3507: cur_pos += 2; \
3508: break; \
3509: \
3510: default: \
3511: if (c >= ' ' && c < 0177) \
3512: { \
3513: putc (c, (STREAM)); \
3514: cur_pos++; \
3515: } \
3516: else \
3517: { \
3518: fprintf ((STREAM), "\\%03o", c); \
3519: cur_pos += 4; \
3520: } \
3521: } \
3522: \
3523: if (cur_pos > 72 && i+1 < len) \
3524: { \
3525: cur_pos = 17; \
3526: fprintf ((STREAM), "\"\n\t.ascii\t\""); \
3527: } \
3528: } \
3529: fprintf ((STREAM), "\"\n"); \
3530: } while (0)
3531:
3532: /* Handle certain cpp directives used in header files on sysV. */
3533: #define SCCS_DIRECTIVE
3534:
3535: /* Output #ident as a in the read-only data section. */
3536: #define ASM_OUTPUT_IDENT(FILE, STRING) \
3537: { \
3538: char *p = STRING; \
3539: int size = strlen (p) + 1; \
3540: rdata_section (); \
3541: assemble_string (p, size); \
3542: }
3543:
3544: /* Default to -G 8 */
3545: #ifndef MIPS_DEFAULT_GVALUE
3546: #define MIPS_DEFAULT_GVALUE 8
3547: #endif
3548:
3549: /* Define the strings to put out for each section in the object file. */
3550: #define TEXT_SECTION_ASM_OP "\t.text" /* instructions */
3551: #define DATA_SECTION_ASM_OP "\t.data" /* large data */
3552: #define SDATA_SECTION_ASM_OP "\t.sdata" /* small data */
3553: #define RDATA_SECTION_ASM_OP "\t.rdata" /* read-only data */
3554: #define READONLY_DATA_SECTION rdata_section
3555:
3556: /* What other sections we support other than the normal .data/.text. */
3557:
1.1.1.3 ! root 3558: #define EXTRA_SECTIONS in_sdata, in_rdata
1.1 root 3559:
3560: /* Define the additional functions to select our additional sections. */
3561:
3562: /* on the MIPS it is not a good idea to put constants in the text
3563: section, since this defeats the sdata/data mechanism. This is
3564: especially true when -O is used. In this case an effort is made to
3565: address with faster (gp) register relative addressing, which can
3566: only get at sdata and sbss items (there is no stext !!) However,
3567: if the constant is too large for sdata, and it's readonly, it
3568: will go into the .rdata section. */
3569:
3570: #define EXTRA_SECTION_FUNCTIONS \
3571: void \
3572: sdata_section () \
3573: { \
3574: if (in_section != in_sdata) \
3575: { \
3576: fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \
3577: in_section = in_sdata; \
3578: } \
3579: } \
3580: \
3581: void \
3582: rdata_section () \
3583: { \
3584: if (in_section != in_rdata) \
3585: { \
3586: fprintf (asm_out_file, "%s\n", RDATA_SECTION_ASM_OP); \
3587: in_section = in_rdata; \
3588: } \
3589: }
3590:
3591: /* Given a decl node or constant node, choose the section to output it in
3592: and select that section. */
3593:
1.1.1.3 ! root 3594: #define SELECT_RTX_SECTION(MODE,RTX) mips_select_rtx_section (MODE, RTX)
1.1 root 3595:
1.1.1.3 ! root 3596: #define SELECT_SECTION(DECL, RELOC) mips_select_section (DECL, RELOC)
1.1 root 3597:
3598:
3599: /* Store in OUTPUT a string (made with alloca) containing
3600: an assembler-name for a local static variable named NAME.
3601: LABELNO is an integer which is different for each call. */
3602:
3603: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
3604: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
3605: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
3606:
3607: #define ASM_OUTPUT_REG_PUSH(STREAM,REGNO) \
3608: do \
3609: { \
1.1.1.3 ! root 3610: fprintf (STREAM, "\t%s\t%s,%s,8\n\t%s\t%s,0(%s)\n", \
! 3611: TARGET_64BIT ? "dsubu" : "subu", \
1.1 root 3612: reg_names[STACK_POINTER_REGNUM], \
3613: reg_names[STACK_POINTER_REGNUM], \
1.1.1.3 ! root 3614: TARGET_64BIT ? "sd" : "sw", \
1.1 root 3615: reg_names[REGNO], \
3616: reg_names[STACK_POINTER_REGNUM]); \
3617: } \
3618: while (0)
3619:
3620: #define ASM_OUTPUT_REG_POP(STREAM,REGNO) \
3621: do \
3622: { \
3623: if (! set_noreorder) \
3624: fprintf (STREAM, "\t.set\tnoreorder\n"); \
3625: \
3626: dslots_load_total++; \
3627: dslots_load_filled++; \
1.1.1.3 ! root 3628: fprintf (STREAM, "\t%s\t%s,0(%s)\n\t%s\t%s,%s,8\n", \
! 3629: TARGET_64BIT ? "ld" : "lw", \
1.1 root 3630: reg_names[REGNO], \
3631: reg_names[STACK_POINTER_REGNUM], \
1.1.1.3 ! root 3632: TARGET_64BIT ? "daddu" : "addu", \
1.1 root 3633: reg_names[STACK_POINTER_REGNUM], \
3634: reg_names[STACK_POINTER_REGNUM]); \
3635: \
3636: if (! set_noreorder) \
3637: fprintf (STREAM, "\t.set\treorder\n"); \
3638: } \
3639: while (0)
3640:
3641: /* Define the parentheses used to group arithmetic operations
3642: in assembler code. */
3643:
3644: #define ASM_OPEN_PAREN "("
3645: #define ASM_CLOSE_PAREN ")"
3646:
3647: /* How to start an assembler comment. */
3648: #ifndef ASM_COMMENT_START
3649: #define ASM_COMMENT_START "\t\t# "
3650: #endif
3651:
3652:
3653:
3654: /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for
3655: and mips-tdump.c to print them out.
3656:
3657: These must match the corresponding definitions in gdb/mipsread.c.
3658: Unfortunately, gcc and gdb do not currently share any directories. */
3659:
3660: #define CODE_MASK 0x8F300
3661: #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
3662: #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
3663: #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
3664:
3665:
3666: /* Default definitions for size_t and ptrdiff_t. */
3667:
3668: #ifndef SIZE_TYPE
1.1.1.3 ! root 3669: #define NO_BUILTIN_SIZE_TYPE
! 3670: #define SIZE_TYPE (TARGET_LONG64 ? "long unsigned int" : "unsigned int")
1.1 root 3671: #endif
3672:
3673: #ifndef PTRDIFF_TYPE
1.1.1.3 ! root 3674: #define NO_BUILTIN_PTRDIFF_TYPE
! 3675: #define PTRDIFF_TYPE (TARGET_LONG64 ? "long int" : "int")
1.1 root 3676: #endif
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