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1.1 root 1: /* Definitions of target machine for GNU compiler. MIPS version.
2: Contributed by A. Lichnewsky, [email protected]
3: Changed by Michael Meissner, [email protected]
1.1.1.3 root 4: 64 bit r4000 support by Ian Lance Taylor, [email protected], and
5: Brendan Eich, [email protected].
1.1.1.4 ! root 6: Copyright (C) 1989, 90, 91, 92, 93, 94, 1995 Free Software Foundation, Inc.
1.1 root 7:
8: This file is part of GNU CC.
9:
10: GNU CC is free software; you can redistribute it and/or modify
11: it under the terms of the GNU General Public License as published by
12: the Free Software Foundation; either version 2, or (at your option)
13: any later version.
14:
15: GNU CC is distributed in the hope that it will be useful,
16: but WITHOUT ANY WARRANTY; without even the implied warranty of
17: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18: GNU General Public License for more details.
19:
20: You should have received a copy of the GNU General Public License
21: along with GNU CC; see the file COPYING. If not, write to
1.1.1.4 ! root 22: the Free Software Foundation, 59 Temple Place - Suite 330,
! 23: Boston, MA 02111-1307, USA. */
1.1 root 24:
25:
26: /* Standard GCC variables that we reference. */
27:
28: extern char *asm_file_name;
29: extern char call_used_regs[];
30: extern int current_function_calls_alloca;
31: extern int flag_omit_frame_pointer;
32: extern int frame_pointer_needed;
33: extern char *language_string;
34: extern int may_call_alloca;
35: extern int optimize;
36: extern char **save_argv;
37: extern int target_flags;
38: extern char *version_string;
39:
40: /* MIPS external variables defined in mips.c. */
41:
42: /* comparison type */
43: enum cmp_type {
1.1.1.3 root 44: CMP_SI, /* compare four byte integers */
45: CMP_DI, /* compare eight byte integers */
1.1 root 46: CMP_SF, /* compare single precision floats */
47: CMP_DF, /* compare double precision floats */
48: CMP_MAX /* max comparison type */
49: };
50:
51: /* types of delay slot */
52: enum delay_type {
53: DELAY_NONE, /* no delay slot */
54: DELAY_LOAD, /* load from memory delay */
55: DELAY_HILO, /* move from/to hi/lo registers */
56: DELAY_FCMP /* delay after doing c.<xx>.{d,s} */
57: };
58:
59: /* Which processor to schedule for. Since there is no difference between
60: a R2000 and R3000 in terms of the scheduler, we collapse them into
61: just an R3000. The elements of the enumeration must match exactly
62: the cpu attribute in the mips.md machine description. */
63:
64: enum processor_type {
65: PROCESSOR_DEFAULT,
66: PROCESSOR_R3000,
67: PROCESSOR_R6000,
1.1.1.3 root 68: PROCESSOR_R4000,
1.1.1.4 ! root 69: PROCESSOR_R4600,
! 70: PROCESSOR_R4650,
! 71: PROCESSOR_R8000
1.1 root 72: };
73:
74: /* Recast the cpu class to be the cpu attribute. */
75: #define mips_cpu_attr ((enum attr_cpu)mips_cpu)
76:
1.1.1.2 root 77: /* Whether to emit abicalls code sequences or not. */
78:
79: enum mips_abicalls_type {
80: MIPS_ABICALLS_NO,
81: MIPS_ABICALLS_YES
82: };
83:
84: /* Recast the abicalls class to be the abicalls attribute. */
85: #define mips_abicalls_attr ((enum attr_abicalls)mips_abicalls)
86:
1.1 root 87: /* Which type of block move to do (whether or not the last store is
88: split out so it can fill a branch delay slot). */
89:
90: enum block_move_type {
91: BLOCK_MOVE_NORMAL, /* generate complete block move */
92: BLOCK_MOVE_NOT_LAST, /* generate all but last store */
93: BLOCK_MOVE_LAST /* generate just the last store */
94: };
95:
96: extern char mips_reg_names[][8]; /* register names (a0 vs. $4). */
97: extern char mips_print_operand_punct[]; /* print_operand punctuation chars */
98: extern char *current_function_file; /* filename current function is in */
99: extern int num_source_filenames; /* current .file # */
100: extern int inside_function; /* != 0 if inside of a function */
101: extern int ignore_line_number; /* != 0 if we are to ignore next .loc */
102: extern int file_in_function_warning; /* warning given about .file in func */
103: extern int sdb_label_count; /* block start/end next label # */
1.1.1.4 ! root 104: extern int sdb_begin_function_line; /* Starting Line of current function */
1.1 root 105: extern int mips_section_threshold; /* # bytes of data/sdata cutoff */
106: extern int g_switch_value; /* value of the -G xx switch */
107: extern int g_switch_set; /* whether -G xx was passed. */
108: extern int sym_lineno; /* sgi next label # for each stmt */
109: extern int set_noreorder; /* # of nested .set noreorder's */
110: extern int set_nomacro; /* # of nested .set nomacro's */
111: extern int set_noat; /* # of nested .set noat's */
112: extern int set_volatile; /* # of nested .set volatile's */
113: extern int mips_branch_likely; /* emit 'l' after br (branch likely) */
114: extern int mips_dbx_regno[]; /* Map register # to debug register # */
115: extern struct rtx_def *branch_cmp[2]; /* operands for compare */
116: extern enum cmp_type branch_type; /* what type of branch to use */
117: extern enum processor_type mips_cpu; /* which cpu are we scheduling for */
1.1.1.2 root 118: extern enum mips_abicalls_type mips_abicalls;/* for svr4 abi pic calls */
1.1 root 119: extern int mips_isa; /* architectural level */
120: extern char *mips_cpu_string; /* for -mcpu=<xxx> */
1.1.1.4 ! root 121: extern char *mips_isa_string; /* for -mips{1,2,3,4} */
1.1 root 122: extern int dslots_load_total; /* total # load related delay slots */
123: extern int dslots_load_filled; /* # filled load delay slots */
124: extern int dslots_jump_total; /* total # jump related delay slots */
125: extern int dslots_jump_filled; /* # filled jump delay slots */
126: extern int dslots_number_nops; /* # of nops needed by previous insn */
127: extern int num_refs[3]; /* # 1/2/3 word references */
128: extern struct rtx_def *mips_load_reg; /* register to check for load delay */
129: extern struct rtx_def *mips_load_reg2; /* 2nd reg to check for load delay */
130: extern struct rtx_def *mips_load_reg3; /* 3rd reg to check for load delay */
131: extern struct rtx_def *mips_load_reg4; /* 4th reg to check for load delay */
1.1.1.3 root 132: extern struct rtx_def *embedded_pic_fnaddr_rtx; /* function address */
1.1 root 133:
134: /* Functions within mips.c that we reference. */
135:
136: extern void abort_with_insn ();
137: extern int arith32_operand ();
138: extern int arith_operand ();
139: extern int cmp_op ();
140: extern long compute_frame_size ();
141: extern int epilogue_reg_mentioned_p ();
142: extern void expand_block_move ();
143: extern int equality_op ();
144: extern void final_prescan_insn ();
145: extern struct rtx_def * function_arg ();
146: extern void function_arg_advance ();
147: extern int function_arg_partial_nregs ();
148: extern void function_epilogue ();
149: extern void function_prologue ();
150: extern void gen_conditional_branch ();
151: extern struct rtx_def * gen_int_relational ();
152: extern void init_cumulative_args ();
153: extern int large_int ();
154: extern int mips_address_cost ();
155: extern void mips_asm_file_end ();
156: extern void mips_asm_file_start ();
157: extern int mips_const_double_ok ();
158: extern void mips_count_memory_refs ();
159: extern int mips_debugger_offset ();
160: extern void mips_declare_object ();
161: extern int mips_epilogue_delay_slots ();
162: extern void mips_expand_epilogue ();
163: extern void mips_expand_prologue ();
164: extern char *mips_fill_delay_slot ();
165: extern char *mips_move_1word ();
166: extern char *mips_move_2words ();
167: extern void mips_output_double ();
168: extern int mips_output_external ();
169: extern void mips_output_float ();
170: extern void mips_output_filename ();
171: extern void mips_output_lineno ();
172: extern char *output_block_move ();
173: extern void override_options ();
174: extern int pc_or_label_operand ();
175: extern void print_operand_address ();
176: extern void print_operand ();
177: extern void print_options ();
178: extern int reg_or_0_operand ();
179: extern int simple_epilogue_p ();
180: extern int simple_memory_operand ();
181: extern int small_int ();
182: extern void trace();
183: extern int uns_arith_operand ();
1.1.1.3 root 184: extern struct rtx_def * embedded_pic_offset ();
1.1 root 185:
186: /* Recognition functions that return if a condition is true. */
187: extern int address_operand ();
188: extern int const_double_operand ();
189: extern int const_int_operand ();
190: extern int general_operand ();
191: extern int immediate_operand ();
192: extern int memory_address_p ();
193: extern int memory_operand ();
194: extern int nonimmediate_operand ();
195: extern int nonmemory_operand ();
196: extern int register_operand ();
197: extern int scratch_operand ();
198:
199: /* Functions to change what output section we are using. */
200: extern void data_section ();
201: extern void rdata_section ();
202: extern void readonly_data_section ();
203: extern void sdata_section ();
204: extern void text_section ();
205:
206: /* Functions in the rest of the compiler that we reference. */
207: extern void abort_with_insn ();
208: extern void debug_rtx ();
209: extern void fatal_io_error ();
210: extern int get_frame_size ();
211: extern int offsettable_address_p ();
212: extern void output_address ();
213: extern char *permalloc ();
214: extern int reg_mentioned_p ();
215:
216: /* Functions in the standard library that we reference. */
217: extern int atoi ();
218: extern char *getenv ();
219: extern char *mktemp ();
220:
221:
222: /* Stubs for half-pic support if not OSF/1 reference platform. */
223:
224: #ifndef HALF_PIC_P
225: #define HALF_PIC_P() 0
226: #define HALF_PIC_NUMBER_PTRS 0
227: #define HALF_PIC_NUMBER_REFS 0
228: #define HALF_PIC_ENCODE(DECL)
229: #define HALF_PIC_DECLARE(NAME)
230: #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
231: #define HALF_PIC_ADDRESS_P(X) 0
232: #define HALF_PIC_PTR(X) X
233: #define HALF_PIC_FINISH(STREAM)
234: #endif
235:
236:
237: /* Run-time compilation parameters selecting different hardware subsets. */
238:
239: /* Macros used in the machine description to test the flags. */
240:
241: /* Bits for real switches */
242: #define MASK_INT64 0x00000001 /* ints are 64 bits */
1.1.1.3 root 243: #define MASK_LONG64 0x00000002 /* longs and pointers are 64 bits */
244: #define MASK_UNUSED 0x00000004
1.1 root 245: #define MASK_GPOPT 0x00000008 /* Optimize for global pointer */
246: #define MASK_GAS 0x00000010 /* Gas used instead of MIPS as */
247: #define MASK_NAME_REGS 0x00000020 /* Use MIPS s/w reg name convention */
248: #define MASK_STATS 0x00000040 /* print statistics to stderr */
249: #define MASK_MEMCPY 0x00000080 /* call memcpy instead of inline code*/
250: #define MASK_SOFT_FLOAT 0x00000100 /* software floating point */
251: #define MASK_FLOAT64 0x00000200 /* fp registers are 64 bits */
252: #define MASK_ABICALLS 0x00000400 /* emit .abicalls/.cprestore/.cpload */
253: #define MASK_HALF_PIC 0x00000800 /* Emit OSF-style pic refs to externs*/
254: #define MASK_LONG_CALLS 0x00001000 /* Always call through a register */
1.1.1.3 root 255: #define MASK_64BIT 0x00002000 /* Use 64 bit GP registers and insns */
256: #define MASK_EMBEDDED_PIC 0x00004000 /* Generate embedded PIC code */
257: #define MASK_EMBEDDED_DATA 0x00008000 /* Reduce RAM usage, not fast code */
1.1.1.4 ! root 258: #define MASK_BIG_ENDIAN 0x00010000 /* Generate big endian code */
! 259: #define MASK_SINGLE_FLOAT 0x00020000 /* Only single precision FPU. */
! 260: #define MASK_MAD 0x00040000 /* Generate mad/madu as on 4650. */
1.1.1.3 root 261: #define MASK_UNUSED1 0x00080000
1.1 root 262:
263: /* Dummy switches used only in spec's*/
264: #define MASK_MIPS_TFILE 0x00000000 /* flag for mips-tfile usage */
265:
266: /* Debug switches, not documented */
267: #define MASK_DEBUG 0x40000000 /* Eliminate version # in .s file */
268: #define MASK_DEBUG_A 0x20000000 /* don't allow <label>($reg) addrs */
269: #define MASK_DEBUG_B 0x10000000 /* GO_IF_LEGITIMATE_ADDRESS debug */
270: #define MASK_DEBUG_C 0x08000000 /* don't expand seq, etc. */
271: #define MASK_DEBUG_D 0x04000000 /* don't do define_split's */
272: #define MASK_DEBUG_E 0x02000000 /* function_arg debug */
273: #define MASK_DEBUG_F 0x01000000 /* don't try to suppress load nop's */
274: #define MASK_DEBUG_G 0x00800000 /* don't support 64 bit arithmetic */
275: #define MASK_DEBUG_H 0x00400000 /* allow ints in FP registers */
276: #define MASK_DEBUG_I 0x00200000 /* unused */
277: #define MASK_DEBUG_J 0x00100000 /* unused */
278:
279: /* r4000 64 bit sizes */
280: #define TARGET_INT64 (target_flags & MASK_INT64)
281: #define TARGET_LONG64 (target_flags & MASK_LONG64)
282: #define TARGET_FLOAT64 (target_flags & MASK_FLOAT64)
1.1.1.3 root 283: #define TARGET_64BIT (target_flags & MASK_64BIT)
1.1 root 284:
285: /* Mips vs. GNU assembler */
286: #define TARGET_GAS (target_flags & MASK_GAS)
287: #define TARGET_UNIX_ASM (!TARGET_GAS)
288: #define TARGET_MIPS_AS TARGET_UNIX_ASM
289:
290: /* Debug Mode */
291: #define TARGET_DEBUG_MODE (target_flags & MASK_DEBUG)
292: #define TARGET_DEBUG_A_MODE (target_flags & MASK_DEBUG_A)
293: #define TARGET_DEBUG_B_MODE (target_flags & MASK_DEBUG_B)
294: #define TARGET_DEBUG_C_MODE (target_flags & MASK_DEBUG_C)
295: #define TARGET_DEBUG_D_MODE (target_flags & MASK_DEBUG_D)
296: #define TARGET_DEBUG_E_MODE (target_flags & MASK_DEBUG_E)
297: #define TARGET_DEBUG_F_MODE (target_flags & MASK_DEBUG_F)
298: #define TARGET_DEBUG_G_MODE (target_flags & MASK_DEBUG_G)
299: #define TARGET_DEBUG_H_MODE (target_flags & MASK_DEBUG_H)
300: #define TARGET_DEBUG_I_MODE (target_flags & MASK_DEBUG_I)
301: #define TARGET_DEBUG_J_MODE (target_flags & MASK_DEBUG_J)
302:
303: /* Reg. Naming in .s ($21 vs. $a0) */
304: #define TARGET_NAME_REGS (target_flags & MASK_NAME_REGS)
305:
306: /* Optimize for Sdata/Sbss */
307: #define TARGET_GP_OPT (target_flags & MASK_GPOPT)
308:
309: /* print program statistics */
310: #define TARGET_STATS (target_flags & MASK_STATS)
311:
312: /* call memcpy instead of inline code */
313: #define TARGET_MEMCPY (target_flags & MASK_MEMCPY)
314:
315: /* .abicalls, etc from Pyramid V.4 */
316: #define TARGET_ABICALLS (target_flags & MASK_ABICALLS)
317:
318: /* OSF pic references to externs */
319: #define TARGET_HALF_PIC (target_flags & MASK_HALF_PIC)
320:
321: /* software floating point */
322: #define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT)
323: #define TARGET_HARD_FLOAT (! TARGET_SOFT_FLOAT)
324:
325: /* always call through a register */
326: #define TARGET_LONG_CALLS (target_flags & MASK_LONG_CALLS)
327:
1.1.1.3 root 328: /* generate embedded PIC code;
329: requires gas. */
330: #define TARGET_EMBEDDED_PIC (target_flags & MASK_EMBEDDED_PIC)
331:
332: /* for embedded systems, optimize for
333: reduced RAM space instead of for
334: fastest code. */
335: #define TARGET_EMBEDDED_DATA (target_flags & MASK_EMBEDDED_DATA)
336:
1.1.1.4 ! root 337: /* generate big endian code. */
! 338: #define TARGET_BIG_ENDIAN (target_flags & MASK_BIG_ENDIAN)
! 339:
! 340: #define TARGET_SINGLE_FLOAT (target_flags & MASK_SINGLE_FLOAT)
! 341: #define TARGET_DOUBLE_FLOAT (! TARGET_SINGLE_FLOAT)
! 342:
! 343: #define TARGET_MAD (target_flags & MASK_MAD)
! 344:
1.1 root 345: /* Macro to define tables used to set the flags.
346: This is a list in braces of pairs in braces,
347: each pair being { "NAME", VALUE }
348: where VALUE is the bits to set or minus the bits to clear.
349: An empty string NAME is used to identify the default VALUE. */
350:
351: #define TARGET_SWITCHES \
352: { \
353: {"int64", MASK_INT64 | MASK_LONG64}, \
354: {"long64", MASK_LONG64}, \
355: {"mips-as", -MASK_GAS}, \
356: {"gas", MASK_GAS}, \
357: {"rnames", MASK_NAME_REGS}, \
358: {"no-rnames", -MASK_NAME_REGS}, \
359: {"gpOPT", MASK_GPOPT}, \
360: {"gpopt", MASK_GPOPT}, \
361: {"no-gpOPT", -MASK_GPOPT}, \
362: {"no-gpopt", -MASK_GPOPT}, \
363: {"stats", MASK_STATS}, \
364: {"no-stats", -MASK_STATS}, \
365: {"memcpy", MASK_MEMCPY}, \
366: {"no-memcpy", -MASK_MEMCPY}, \
367: {"mips-tfile", MASK_MIPS_TFILE}, \
368: {"no-mips-tfile", -MASK_MIPS_TFILE}, \
369: {"soft-float", MASK_SOFT_FLOAT}, \
370: {"hard-float", -MASK_SOFT_FLOAT}, \
371: {"fp64", MASK_FLOAT64}, \
372: {"fp32", -MASK_FLOAT64}, \
1.1.1.3 root 373: {"gp64", MASK_64BIT}, \
374: {"gp32", -MASK_64BIT}, \
1.1 root 375: {"abicalls", MASK_ABICALLS}, \
376: {"no-abicalls", -MASK_ABICALLS}, \
377: {"half-pic", MASK_HALF_PIC}, \
378: {"no-half-pic", -MASK_HALF_PIC}, \
379: {"long-calls", MASK_LONG_CALLS}, \
380: {"no-long-calls", -MASK_LONG_CALLS}, \
1.1.1.3 root 381: {"embedded-pic", MASK_EMBEDDED_PIC}, \
382: {"no-embedded-pic", -MASK_EMBEDDED_PIC}, \
383: {"embedded-data", MASK_EMBEDDED_DATA}, \
384: {"no-embedded-data", -MASK_EMBEDDED_DATA}, \
1.1.1.4 ! root 385: {"eb", MASK_BIG_ENDIAN}, \
! 386: {"el", -MASK_BIG_ENDIAN}, \
! 387: {"single-float", MASK_SINGLE_FLOAT}, \
! 388: {"double-float", -MASK_SINGLE_FLOAT}, \
! 389: {"mad", MASK_MAD}, \
! 390: {"no-mad", -MASK_MAD}, \
! 391: {"4650", MASK_MAD | MASK_SINGLE_FLOAT}, \
1.1 root 392: {"debug", MASK_DEBUG}, \
393: {"debuga", MASK_DEBUG_A}, \
394: {"debugb", MASK_DEBUG_B}, \
395: {"debugc", MASK_DEBUG_C}, \
396: {"debugd", MASK_DEBUG_D}, \
397: {"debuge", MASK_DEBUG_E}, \
398: {"debugf", MASK_DEBUG_F}, \
399: {"debugg", MASK_DEBUG_G}, \
400: {"debugh", MASK_DEBUG_H}, \
401: {"debugi", MASK_DEBUG_I}, \
402: {"debugj", MASK_DEBUG_J}, \
1.1.1.4 ! root 403: {"", (TARGET_DEFAULT \
! 404: | TARGET_CPU_DEFAULT \
! 405: | TARGET_ENDIAN_DEFAULT)} \
1.1 root 406: }
407:
408: /* Default target_flags if no switches are specified */
409:
410: #ifndef TARGET_DEFAULT
411: #define TARGET_DEFAULT 0
412: #endif
413:
414: #ifndef TARGET_CPU_DEFAULT
415: #define TARGET_CPU_DEFAULT 0
416: #endif
417:
1.1.1.4 ! root 418: #ifndef TARGET_ENDIAN_DEFAULT
! 419: #ifndef DECSTATION
! 420: #define TARGET_ENDIAN_DEFAULT MASK_BIG_ENDIAN
! 421: #else
! 422: #define TARGET_ENDIAN_DEFAULT 0
! 423: #endif
! 424: #endif
! 425:
! 426: #ifndef MULTILIB_DEFAULTS
! 427: #if TARGET_ENDIAN_DEFAULT == 0
! 428: #define MULTILIB_DEFAULTS { "EL", "mips1" }
! 429: #else
! 430: #define MULTILIB_DEFAULTS { "EB", "mips1" }
! 431: #endif
! 432: #endif
! 433:
1.1 root 434: /* This macro is similar to `TARGET_SWITCHES' but defines names of
435: command options that have values. Its definition is an
436: initializer with a subgrouping for each command option.
437:
438: Each subgrouping contains a string constant, that defines the
439: fixed part of the option name, and the address of a variable.
440: The variable, type `char *', is set to the variable part of the
441: given option if the fixed part matches. The actual option name
442: is made by appending `-m' to the specified name.
443:
444: Here is an example which defines `-mshort-data-NUMBER'. If the
445: given option is `-mshort-data-512', the variable `m88k_short_data'
446: will be set to the string `"512"'.
447:
448: extern char *m88k_short_data;
449: #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */
450:
451: #define TARGET_OPTIONS \
452: { \
453: { "cpu=", &mips_cpu_string }, \
454: { "ips", &mips_isa_string } \
455: }
456:
457: /* Macros to decide whether certain features are available or not,
458: depending on the instruction set architecture level. */
459:
460: #define BRANCH_LIKELY_P() (mips_isa >= 2)
461: #define HAVE_SQRT_P() (mips_isa >= 2)
462:
1.1.1.4 ! root 463: /* CC1_SPEC causes -mips3 and -mips4 to set -mfp64 and -mgp64; -mips1 or
! 464: -mips2 sets -mfp32 and -mgp32. This can be overridden by an explicit
1.1.1.3 root 465: -mfp32, -mfp64, -mgp32 or -mgp64. -mfp64 sets MASK_FLOAT64 in
466: target_flags, and -mgp64 sets MASK_64BIT.
467:
468: Setting MASK_64BIT in target_flags will cause gcc to assume that
469: registers are 64 bits wide. int, long and void * will be 32 bit;
470: this may be changed with -mint64 or -mlong64.
471:
472: The gen* programs link code that refers to MASK_64BIT. They don't
473: actually use the information in target_flags; they just refer to
474: it. */
1.1 root 475:
476: /* Switch Recognition by gcc.c. Add -G xx support */
477:
478: #ifdef SWITCH_TAKES_ARG
479: #undef SWITCH_TAKES_ARG
480: #endif
481:
482: #define SWITCH_TAKES_ARG(CHAR) \
483: ((CHAR) == 'D' || (CHAR) == 'U' || (CHAR) == 'o' \
484: || (CHAR) == 'e' || (CHAR) == 'T' || (CHAR) == 'u' \
485: || (CHAR) == 'I' || (CHAR) == 'm' \
486: || (CHAR) == 'L' || (CHAR) == 'A' || (CHAR) == 'G')
487:
488: /* Sometimes certain combinations of command options do not make sense
489: on a particular target machine. You can define a macro
490: `OVERRIDE_OPTIONS' to take account of this. This macro, if
491: defined, is executed once just after all the command options have
492: been parsed.
493:
494: On the MIPS, it is used to handle -G. We also use it to set up all
495: of the tables referenced in the other macros. */
496:
497: #define OVERRIDE_OPTIONS override_options ()
498:
499: /* Zero or more C statements that may conditionally modify two
500: variables `fixed_regs' and `call_used_regs' (both of type `char
501: []') after they have been initialized from the two preceding
502: macros.
503:
504: This is necessary in case the fixed or call-clobbered registers
505: depend on target flags.
506:
507: You need not define this macro if it has no work to do.
508:
509: If the usage of an entire class of registers depends on the target
510: flags, you may indicate this to GCC by using this macro to modify
511: `fixed_regs' and `call_used_regs' to 1 for each of the registers in
512: the classes which should not be used by GCC. Also define the macro
513: `REG_CLASS_FROM_LETTER' to return `NO_REGS' if it is called with a
514: letter for a class that shouldn't be used.
515:
516: (However, if this class is not included in `GENERAL_REGS' and all
517: of the insn patterns whose constraints permit this class are
518: controlled by target switches, then GCC will automatically avoid
519: using these registers when the target switches are opposed to
520: them.) */
521:
522: #define CONDITIONAL_REGISTER_USAGE \
523: do \
524: { \
525: if (!TARGET_HARD_FLOAT) \
526: { \
527: int regno; \
528: \
529: for (regno = FP_REG_FIRST; regno <= FP_REG_LAST; regno++) \
530: fixed_regs[regno] = call_used_regs[regno] = 1; \
531: } \
1.1.1.4 ! root 532: SUBTARGET_CONDITIONAL_REGISTER_USAGE \
1.1 root 533: } \
534: while (0)
535:
1.1.1.4 ! root 536: /* This is meant to be redefined in the host dependent files */
! 537: #define SUBTARGET_CONDITIONAL_REGISTER_USAGE
! 538:
1.1.1.3 root 539: /* Show we can debug even without a frame pointer. */
540: #define CAN_DEBUG_WITHOUT_FP
1.1 root 541:
542: /* Complain about missing specs and predefines that should be defined in each
543: of the target tm files to override the defaults. This is mostly a place-
544: holder until I can get each of the files updated [mm]. */
545:
546: #if defined(OSF_OS) \
547: || defined(DECSTATION) \
548: || defined(SGI_TARGET) \
549: || defined(MIPS_NEWS) \
550: || defined(MIPS_SYSV) \
551: || defined(MIPS_SVR4) \
552: || defined(MIPS_BSD43)
553:
554: #ifndef CPP_PREDEFINES
555: #error "Define CPP_PREDEFINES in the appropriate tm.h file"
556: #endif
557:
558: #ifndef LIB_SPEC
559: #error "Define LIB_SPEC in the appropriate tm.h file"
560: #endif
561:
562: #ifndef STARTFILE_SPEC
563: #error "Define STARTFILE_SPEC in the appropriate tm.h file"
564: #endif
565:
566: #ifndef MACHINE_TYPE
567: #error "Define MACHINE_TYPE in the appropriate tm.h file"
568: #endif
569: #endif
570:
571: /* Tell collect what flags to pass to nm. */
572: #ifndef NM_FLAGS
573: #define NM_FLAGS "-Bp"
574: #endif
575:
576:
577: /* Names to predefine in the preprocessor for this target machine. */
578:
579: #ifndef CPP_PREDEFINES
580: #define CPP_PREDEFINES "-Dmips -Dunix -Dhost_mips -DMIPSEB -DR3000 -DSYSTYPE_BSD43 \
1.1.1.2 root 581: -D_mips -D_unix -D_host_mips -D_MIPSEB -D_R3000 -D_SYSTYPE_BSD43 \
582: -Asystem(unix) -Asystem(bsd) -Acpu(mips) -Amachine(mips)"
1.1 root 583: #endif
584:
585: /* Extra switches sometimes passed to the assembler. */
586:
587: #ifndef ASM_SPEC
1.1.1.3 root 588: #if ((TARGET_CPU_DEFAULT | TARGET_DEFAULT) & MASK_GAS) != 0
589: /* GAS */
590: #define ASM_SPEC "\
591: %{mmips-as: \
592: %{!.s:-nocpp} %{.s: %{cpp} %{nocpp}} \
593: %{pipe: %e-pipe is not supported.} \
594: %{K}} \
595: %{!mmips-as: \
1.1.1.4 ! root 596: %{mcpu=*} %{m4650} %{mmad:-m4650}} \
! 597: %{G*} %{EB} %{EL} %{mips1} %{mips2} %{mips3} %{mips4} %{v} \
1.1.1.3 root 598: %{noasmopt:-O0} \
599: %{!noasmopt:%{O:-O2} %{O1:-O2} %{O2:-O2} %{O3:-O3}} \
600: %{g} %{g0} %{g1} %{g2} %{g3} \
601: %{ggdb:-g} %{ggdb0:-g0} %{ggdb1:-g1} %{ggdb2:-g2} %{ggdb3:-g3} \
602: %{gstabs:-g} %{gstabs0:-g0} %{gstabs1:-g1} %{gstabs2:-g2} %{gstabs3:-g3} \
603: %{gstabs+:-g} %{gstabs+0:-g0} %{gstabs+1:-g1} %{gstabs+2:-g2} %{gstabs+3:-g3} \
604: %{gcoff:-g} %{gcoff0:-g0} %{gcoff1:-g1} %{gcoff2:-g2} %{gcoff3:-g3} \
605: %{membedded-pic}"
606:
607: #else
608: /* not GAS */
1.1 root 609: #define ASM_SPEC "\
610: %{!mgas: \
1.1.1.3 root 611: %{!.s:-nocpp} %{.s: %{cpp} %{nocpp}} \
1.1 root 612: %{pipe: %e-pipe is not supported.} \
1.1.1.3 root 613: %{K}} \
614: %{mgas: \
1.1.1.4 ! root 615: %{mcpu=*} %{m4650} %{mmad:-m4650}} \
! 616: %{G*} %{EB} %{EL} %{mips1} %{mips2} %{mips3} %{mips4} %{v} \
1.1.1.3 root 617: %{noasmopt:-O0} \
618: %{!noasmopt:%{O:-O2} %{O1:-O2} %{O2:-O2} %{O3:-O3}} \
619: %{g} %{g0} %{g1} %{g2} %{g3} \
620: %{ggdb:-g} %{ggdb0:-g0} %{ggdb1:-g1} %{ggdb2:-g2} %{ggdb3:-g3} \
621: %{gstabs:-g} %{gstabs0:-g0} %{gstabs1:-g1} %{gstabs2:-g2} %{gstabs3:-g3} \
622: %{gstabs+:-g} %{gstabs+0:-g0} %{gstabs+1:-g1} %{gstabs+2:-g2} %{gstabs+3:-g3} \
623: %{gcoff:-g} %{gcoff0:-g0} %{gcoff1:-g1} %{gcoff2:-g2} %{gcoff3:-g3} \
624: %{membedded-pic}"
1.1 root 625:
1.1.1.3 root 626: #endif
627: #endif /* ASM_SPEC */
1.1 root 628:
629: /* Specify to run a post-processor, mips-tfile after the assembler
630: has run to stuff the mips debug information into the object file.
631: This is needed because the $#!%^ MIPS assembler provides no way
632: of specifying such information in the assembly file. If we are
633: cross compiling, disable mips-tfile unless the user specifies
634: -mmips-tfile. */
635:
636: #ifndef ASM_FINAL_SPEC
1.1.1.3 root 637: #if ((TARGET_CPU_DEFAULT | TARGET_DEFAULT) & MASK_GAS) != 0
638: /* GAS */
1.1 root 639: #define ASM_FINAL_SPEC "\
640: %{mmips-as: %{!mno-mips-tfile: \
641: \n mips-tfile %{v*: -v} \
642: %{K: -I %b.o~} \
643: %{!K: %{save-temps: -I %b.o~}} \
644: %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
645: %{.s:%i} %{!.s:%g.s}}}"
646:
1.1.1.3 root 647: #else
648: /* not GAS */
1.1 root 649: #define ASM_FINAL_SPEC "\
650: %{!mgas: %{!mno-mips-tfile: \
651: \n mips-tfile %{v*: -v} \
652: %{K: -I %b.o~} \
653: %{!K: %{save-temps: -I %b.o~}} \
654: %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
655: %{.s:%i} %{!.s:%g.s}}}"
656:
1.1.1.3 root 657: #endif
1.1 root 658: #endif /* ASM_FINAL_SPEC */
659:
660: /* Redefinition of libraries used. Mips doesn't support normal
661: UNIX style profiling via calling _mcount. It does offer
662: profiling that samples the PC, so do what we can... */
663:
664: #ifndef LIB_SPEC
665: #define LIB_SPEC "%{pg:-lprof1} %{p:-lprof1} -lc"
666: #endif
667:
668: /* Extra switches sometimes passed to the linker. */
1.1.1.3 root 669: /* ??? The bestGnum will never be passed to the linker, because the gcc driver
670: will interpret it as a -b option. */
1.1 root 671:
672: #ifndef LINK_SPEC
673: #define LINK_SPEC "\
1.1.1.4 ! root 674: %{G*} %{EB} %{EL} %{mips1} %{mips2} %{mips3} %{mips4} \
1.1.1.3 root 675: %{bestGnum} %{shared} %{non_shared}"
676: #endif /* LINK_SPEC defined */
1.1 root 677:
678: /* Specs for the compiler proper */
679:
680: #ifndef CC1_SPEC
681: #define CC1_SPEC "\
682: %{gline:%{!g:%{!g0:%{!g1:%{!g2: -g1}}}}} \
1.1.1.4 ! root 683: %{mips1:-mfp32 -mgp32}%{mips2:-mfp32 -mgp32}\
! 684: %{mips3:%{!msingle-float:%{!m4650:-mfp64}} -mgp64} \
! 685: %{mips4:%{!msingle-float:%{!m4650:-mfp64}} -mgp64} \
! 686: %{mfp64:%{msingle-float:%emay not use both -mfp64 and -msingle-float}} \
! 687: %{mfp64:%{m4650:%emay not use both -mfp64 and -m4650}} \
! 688: %{m4650:-mcpu=r4650} \
! 689: %{G*} %{EB:-meb} %{EL:-mel} %{EB:%{EL:%emay not use both -EB and -EL}} \
1.1 root 690: %{pic-none: -mno-half-pic} \
691: %{pic-lib: -mhalf-pic} \
692: %{pic-extern: -mhalf-pic} \
693: %{pic-calls: -mhalf-pic} \
694: %{save-temps: }"
695: #endif
696:
697: /* Preprocessor specs */
698:
699: #ifndef CPP_SPEC
700: #define CPP_SPEC "\
701: %{.cc: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
702: %{.cxx: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
703: %{.C: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
704: %{.m: -D__LANGUAGE_OBJECTIVE_C -D_LANGUAGE_OBJECTIVE_C} \
705: %{.S: -D__LANGUAGE_ASSEMBLY -D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
1.1.1.2 root 706: %{.s: -D__LANGUAGE_ASSEMBLY -D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
1.1.1.3 root 707: %{!.S:%{!.s: -D__LANGUAGE_C -D_LANGUAGE_C %{!ansi:-DLANGUAGE_C}}} \
708: %{mlong64:-D__SIZE_TYPE__=long\\ unsigned\\ int -D__PTRDIFF_TYPE__=long\\ int} \
709: %{!mlong64:-D__SIZE_TYPE__=unsigned\\ int -D__PTRDIFF_TYPE__=int} \
1.1.1.4 ! root 710: %{mips3:-U__mips -D__mips=3 -D__mips64} \
! 711: %{mips4:-U__mips -D__mips=4 -D__mips64} \
! 712: %{mgp32:-U__mips64} %{mgp64:-D__mips64} \
! 713: %{EB:-UMIPSEL -U_MIPSEL -U__MIPSEL -U__MIPSEL__ -D_MIPSEB -D__MIPSEB -D__MIPSEB__ %{!ansi:-DMIPSEB}} \
! 714: %{EL:-UMIPSEB -U_MIPSEB -U__MIPSEB -U__MIPSEB__ -D_MIPSEL -D__MIPSEL -D__MIPSEL__ %{!ansi:-DMIPSEL}}"
1.1 root 715: #endif
716:
717: /* If defined, this macro is an additional prefix to try after
718: `STANDARD_EXEC_PREFIX'. */
719:
720: #ifndef MD_EXEC_PREFIX
721: #define MD_EXEC_PREFIX "/usr/lib/cmplrs/cc/"
722: #endif
723:
724: #ifndef MD_STARTFILE_PREFIX
725: #define MD_STARTFILE_PREFIX "/usr/lib/cmplrs/cc/"
726: #endif
727:
728:
729: /* Print subsidiary information on the compiler version in use. */
730:
731: #define MIPS_VERSION "[AL 1.1, MM 40]"
732:
733: #ifndef MACHINE_TYPE
734: #define MACHINE_TYPE "BSD Mips"
735: #endif
736:
737: #ifndef TARGET_VERSION_INTERNAL
738: #define TARGET_VERSION_INTERNAL(STREAM) \
739: fprintf (STREAM, " %s %s", MIPS_VERSION, MACHINE_TYPE)
740: #endif
741:
742: #ifndef TARGET_VERSION
743: #define TARGET_VERSION TARGET_VERSION_INTERNAL (stderr)
744: #endif
745:
746:
747: #define SDB_DEBUGGING_INFO /* generate info for mips-tfile */
748: #define DBX_DEBUGGING_INFO /* generate stabs (OSF/rose) */
749: #define MIPS_DEBUGGING_INFO /* MIPS specific debugging info */
750:
751: #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */
752: #define PREFERRED_DEBUGGING_TYPE ((len > 1 && !strncmp (str, "ggdb", len)) ? DBX_DEBUG : SDB_DEBUG)
753: #endif
754:
755: /* By default, turn on GDB extensions. */
756: #define DEFAULT_GDB_EXTENSIONS 1
757:
758: /* If we are passing smuggling stabs through the MIPS ECOFF object
759: format, put a comment in front of the .stab<x> operation so
760: that the MIPS assembler does not choke. The mips-tfile program
761: will correctly put the stab into the object file. */
762:
763: #define ASM_STABS_OP ((TARGET_GAS) ? ".stabs" : " #.stabs")
764: #define ASM_STABN_OP ((TARGET_GAS) ? ".stabn" : " #.stabn")
765: #define ASM_STABD_OP ((TARGET_GAS) ? ".stabd" : " #.stabd")
766:
1.1.1.4 ! root 767: /* Local compiler-generated symbols must have a prefix that the assembler
! 768: understands. By default, this is $, although some targets (e.g.,
! 769: NetBSD-ELF) need to override this. */
! 770:
! 771: #ifndef LOCAL_LABEL_PREFIX
! 772: #define LOCAL_LABEL_PREFIX "$"
! 773: #endif
! 774:
! 775: /* By default on the mips, external symbols do not have an underscore
! 776: prepended, but some targets (e.g., NetBSD) require this. */
! 777:
! 778: #ifndef USER_LABEL_PREFIX
! 779: #define USER_LABEL_PREFIX ""
! 780: #endif
! 781:
1.1 root 782: /* Forward references to tags are allowed. */
783: #define SDB_ALLOW_FORWARD_REFERENCES
784:
785: /* Unknown tags are also allowed. */
786: #define SDB_ALLOW_UNKNOWN_REFERENCES
787:
788: /* On Sun 4, this limit is 2048. We use 1500 to be safe,
789: since the length can run past this up to a continuation point. */
790: #define DBX_CONTIN_LENGTH 1500
791:
792:
793: /* How to renumber registers for dbx and gdb. */
794: #define DBX_REGISTER_NUMBER(REGNO) mips_dbx_regno[ (REGNO) ]
795:
796:
797: /* Overrides for the COFF debug format. */
798: #define PUT_SDB_SCL(a) \
799: do { \
800: extern FILE *asm_out_text_file; \
801: fprintf (asm_out_text_file, "\t.scl\t%d;", (a)); \
802: } while (0)
803:
804: #define PUT_SDB_INT_VAL(a) \
805: do { \
806: extern FILE *asm_out_text_file; \
807: fprintf (asm_out_text_file, "\t.val\t%d;", (a)); \
808: } while (0)
809:
810: #define PUT_SDB_VAL(a) \
811: do { \
812: extern FILE *asm_out_text_file; \
813: fputs ("\t.val\t", asm_out_text_file); \
814: output_addr_const (asm_out_text_file, (a)); \
815: fputc (';', asm_out_text_file); \
816: } while (0)
817:
818: #define PUT_SDB_DEF(a) \
819: do { \
820: extern FILE *asm_out_text_file; \
821: fprintf (asm_out_text_file, "\t%s.def\t", \
822: (TARGET_GAS) ? "" : "#"); \
823: ASM_OUTPUT_LABELREF (asm_out_text_file, a); \
824: fputc (';', asm_out_text_file); \
825: } while (0)
826:
827: #define PUT_SDB_PLAIN_DEF(a) \
828: do { \
829: extern FILE *asm_out_text_file; \
830: fprintf (asm_out_text_file, "\t%s.def\t.%s;", \
831: (TARGET_GAS) ? "" : "#", (a)); \
832: } while (0)
833:
834: #define PUT_SDB_ENDEF \
835: do { \
836: extern FILE *asm_out_text_file; \
837: fprintf (asm_out_text_file, "\t.endef\n"); \
838: } while (0)
839:
840: #define PUT_SDB_TYPE(a) \
841: do { \
842: extern FILE *asm_out_text_file; \
843: fprintf (asm_out_text_file, "\t.type\t0x%x;", (a)); \
844: } while (0)
845:
846: #define PUT_SDB_SIZE(a) \
847: do { \
848: extern FILE *asm_out_text_file; \
849: fprintf (asm_out_text_file, "\t.size\t%d;", (a)); \
850: } while (0)
851:
852: #define PUT_SDB_DIM(a) \
853: do { \
854: extern FILE *asm_out_text_file; \
855: fprintf (asm_out_text_file, "\t.dim\t%d;", (a)); \
856: } while (0)
857:
858: #ifndef PUT_SDB_START_DIM
859: #define PUT_SDB_START_DIM \
860: do { \
861: extern FILE *asm_out_text_file; \
862: fprintf (asm_out_text_file, "\t.dim\t"); \
863: } while (0)
864: #endif
865:
866: #ifndef PUT_SDB_NEXT_DIM
867: #define PUT_SDB_NEXT_DIM(a) \
868: do { \
869: extern FILE *asm_out_text_file; \
870: fprintf (asm_out_text_file, "%d,", a); \
871: } while (0)
872: #endif
873:
874: #ifndef PUT_SDB_LAST_DIM
875: #define PUT_SDB_LAST_DIM(a) \
876: do { \
877: extern FILE *asm_out_text_file; \
878: fprintf (asm_out_text_file, "%d;", a); \
879: } while (0)
880: #endif
881:
882: #define PUT_SDB_TAG(a) \
883: do { \
884: extern FILE *asm_out_text_file; \
885: fprintf (asm_out_text_file, "\t.tag\t"); \
886: ASM_OUTPUT_LABELREF (asm_out_text_file, a); \
887: fputc (';', asm_out_text_file); \
888: } while (0)
889:
890: /* For block start and end, we create labels, so that
891: later we can figure out where the correct offset is.
892: The normal .ent/.end serve well enough for functions,
893: so those are just commented out. */
894:
895: #define PUT_SDB_BLOCK_START(LINE) \
896: do { \
897: extern FILE *asm_out_text_file; \
898: fprintf (asm_out_text_file, \
1.1.1.4 ! root 899: "%sLb%d:\n\t%s.begin\t%sLb%d\t%d\n", \
! 900: LOCAL_LABEL_PREFIX, \
1.1 root 901: sdb_label_count, \
902: (TARGET_GAS) ? "" : "#", \
1.1.1.4 ! root 903: LOCAL_LABEL_PREFIX, \
1.1 root 904: sdb_label_count, \
905: (LINE)); \
906: sdb_label_count++; \
907: } while (0)
908:
909: #define PUT_SDB_BLOCK_END(LINE) \
910: do { \
911: extern FILE *asm_out_text_file; \
912: fprintf (asm_out_text_file, \
1.1.1.4 ! root 913: "%sLe%d:\n\t%s.bend\t%sLe%d\t%d\n", \
! 914: LOCAL_LABEL_PREFIX, \
1.1 root 915: sdb_label_count, \
916: (TARGET_GAS) ? "" : "#", \
1.1.1.4 ! root 917: LOCAL_LABEL_PREFIX, \
1.1 root 918: sdb_label_count, \
919: (LINE)); \
920: sdb_label_count++; \
921: } while (0)
922:
923: #define PUT_SDB_FUNCTION_START(LINE)
924:
1.1.1.4 ! root 925: #define PUT_SDB_FUNCTION_END(LINE) \
! 926: do { \
! 927: extern FILE *asm_out_text_file; \
! 928: ASM_OUTPUT_SOURCE_LINE (asm_out_text_file, LINE + sdb_begin_function_line); \
! 929: } while (0)
1.1 root 930:
931: #define PUT_SDB_EPILOGUE_END(NAME)
932:
933: #define SDB_GENERATE_FAKE(BUFFER, NUMBER) \
934: sprintf ((BUFFER), ".%dfake", (NUMBER));
935:
936: /* Correct the offset of automatic variables and arguments. Note that
937: the MIPS debug format wants all automatic variables and arguments
938: to be in terms of the virtual frame pointer (stack pointer before
939: any adjustment in the function), while the MIPS 3.0 linker wants
940: the frame pointer to be the stack pointer after the initial
941: adjustment. */
942:
943: #define DEBUGGER_AUTO_OFFSET(X) mips_debugger_offset (X, 0)
944: #define DEBUGGER_ARG_OFFSET(OFFSET, X) mips_debugger_offset (X, OFFSET)
945:
946:
947: /* Tell collect that the object format is ECOFF */
948: #ifndef OBJECT_FORMAT_ROSE
949: #define OBJECT_FORMAT_COFF /* Object file looks like COFF */
950: #define EXTENDED_COFF /* ECOFF, not normal coff */
951: #endif
952:
953: #if 0 /* These definitions normally have no effect because
954: MIPS systems define USE_COLLECT2, so
955: assemble_constructor does nothing anyway. */
956:
957: /* Don't use the default definitions, because we don't have gld.
958: Also, we don't want stabs when generating ECOFF output.
959: Instead we depend on collect to handle these. */
960:
961: #define ASM_OUTPUT_CONSTRUCTOR(file, name)
962: #define ASM_OUTPUT_DESTRUCTOR(file, name)
963:
964: #endif /* 0 */
965:
966: /* Target machine storage layout */
967:
1.1.1.4 ! root 968: /* Define in order to support both big and little endian float formats
! 969: in the same gcc binary. */
! 970: #define REAL_ARITHMETIC
! 971:
1.1 root 972: /* Define this if most significant bit is lowest numbered
973: in instructions that operate on numbered bit-fields.
974: */
975: #define BITS_BIG_ENDIAN 0
976:
977: /* Define this if most significant byte of a word is the lowest numbered. */
1.1.1.4 ! root 978: #define BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
1.1 root 979:
980: /* Define this if most significant word of a multiword number is the lowest. */
1.1.1.4 ! root 981: #define WORDS_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
1.1 root 982:
1.1.1.4 ! root 983: /* Define this to set the endianness to use in libgcc2.c, which can
! 984: not depend on target_flags. */
! 985: #if !defined(MIPSEL) && !defined(__MIPSEL__)
! 986: #define LIBGCC2_WORDS_BIG_ENDIAN 1
1.1 root 987: #else
1.1.1.4 ! root 988: #define LIBGCC2_WORDS_BIG_ENDIAN 0
1.1 root 989: #endif
990:
991: /* Number of bits in an addressable storage unit */
992: #define BITS_PER_UNIT 8
993:
994: /* Width in bits of a "word", which is the contents of a machine register.
995: Note that this is not necessarily the width of data type `int';
996: if using 16-bit ints on a 68000, this would still be 32.
997: But on a machine with 16-bit registers, this would be 16. */
1.1.1.3 root 998: #define BITS_PER_WORD (TARGET_64BIT ? 64 : 32)
999: #define MAX_BITS_PER_WORD 64
1.1 root 1000:
1001: /* Width of a word, in units (bytes). */
1.1.1.3 root 1002: #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
1.1.1.4 ! root 1003: #define MIN_UNITS_PER_WORD 4
1.1.1.3 root 1004:
1005: /* For MIPS, width of a floating point register. */
1006: #define UNITS_PER_FPREG (TARGET_FLOAT64 ? 8 : 4)
1.1 root 1007:
1008: /* A C expression for the size in bits of the type `int' on the
1009: target machine. If you don't define this, the default is one
1010: word. */
1.1.1.3 root 1011: #define INT_TYPE_SIZE (TARGET_INT64 ? 64 : 32)
1012: #define MAX_INT_TYPE_SIZE 64
1013:
1014: /* Tell the preprocessor the maximum size of wchar_t. */
1015: #ifndef MAX_WCHAR_TYPE_SIZE
1016: #ifndef WCHAR_TYPE_SIZE
1017: #define MAX_WCHAR_TYPE_SIZE MAX_INT_TYPE_SIZE
1018: #endif
1019: #endif
1.1 root 1020:
1021: /* A C expression for the size in bits of the type `short' on the
1022: target machine. If you don't define this, the default is half a
1023: word. (If this would be less than one storage unit, it is
1024: rounded up to one unit.) */
1025: #define SHORT_TYPE_SIZE 16
1026:
1027: /* A C expression for the size in bits of the type `long' on the
1028: target machine. If you don't define this, the default is one
1029: word. */
1.1.1.3 root 1030: #define LONG_TYPE_SIZE (TARGET_LONG64 ? 64 : 32)
1031: #define MAX_LONG_TYPE_SIZE 64
1.1 root 1032:
1033: /* A C expression for the size in bits of the type `long long' on the
1034: target machine. If you don't define this, the default is two
1035: words. */
1036: #define LONG_LONG_TYPE_SIZE 64
1037:
1038: /* A C expression for the size in bits of the type `char' on the
1039: target machine. If you don't define this, the default is one
1040: quarter of a word. (If this would be less than one storage unit,
1041: it is rounded up to one unit.) */
1042: #define CHAR_TYPE_SIZE BITS_PER_UNIT
1043:
1044: /* A C expression for the size in bits of the type `float' on the
1045: target machine. If you don't define this, the default is one
1046: word. */
1047: #define FLOAT_TYPE_SIZE 32
1048:
1049: /* A C expression for the size in bits of the type `double' on the
1050: target machine. If you don't define this, the default is two
1051: words. */
1052: #define DOUBLE_TYPE_SIZE 64
1053:
1054: /* A C expression for the size in bits of the type `long double' on
1055: the target machine. If you don't define this, the default is two
1056: words. */
1057: #define LONG_DOUBLE_TYPE_SIZE 64
1058:
1059: /* Width in bits of a pointer.
1060: See also the macro `Pmode' defined below. */
1.1.1.3 root 1061: #define POINTER_SIZE (TARGET_LONG64 ? 64 : 32)
1.1 root 1062:
1063: /* Allocation boundary (in *bits*) for storing pointers in memory. */
1.1.1.3 root 1064: #define POINTER_BOUNDARY (TARGET_LONG64 ? 64 : 32)
1.1 root 1065:
1066: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
1.1.1.3 root 1067: #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
1.1 root 1068:
1069: /* Allocation boundary (in *bits*) for the code of a function. */
1070: #define FUNCTION_BOUNDARY 32
1071:
1072: /* Alignment of field after `int : 0' in a structure. */
1.1.1.3 root 1073: #define EMPTY_FIELD_BOUNDARY (TARGET_LONG64 ? 64 : 32)
1.1 root 1074:
1075: /* Every structure's size must be a multiple of this. */
1076: /* 8 is observed right on a DECstation and on riscos 4.02. */
1077: #define STRUCTURE_SIZE_BOUNDARY 8
1078:
1079: /* There is no point aligning anything to a rounder boundary than this. */
1080: #define BIGGEST_ALIGNMENT 64
1081:
1082: /* Biggest alignment any structure field can require in bits. */
1083: #define BIGGEST_FIELD_ALIGNMENT 64
1084:
1085: /* Set this nonzero if move instructions will actually fail to work
1086: when given unaligned data. */
1087: #define STRICT_ALIGNMENT 1
1088:
1089: /* Define this if you wish to imitate the way many other C compilers
1090: handle alignment of bitfields and the structures that contain
1091: them.
1092:
1093: The behavior is that the type written for a bitfield (`int',
1094: `short', or other integer type) imposes an alignment for the
1095: entire structure, as if the structure really did contain an
1096: ordinary field of that type. In addition, the bitfield is placed
1097: within the structure so that it would fit within such a field,
1098: not crossing a boundary for it.
1099:
1100: Thus, on most machines, a bitfield whose type is written as `int'
1101: would not cross a four-byte boundary, and would force four-byte
1102: alignment for the whole structure. (The alignment used may not
1103: be four bytes; it is controlled by the other alignment
1104: parameters.)
1105:
1106: If the macro is defined, its definition should be a C expression;
1107: a nonzero value for the expression enables this behavior. */
1108:
1109: #define PCC_BITFIELD_TYPE_MATTERS 1
1110:
1111: /* If defined, a C expression to compute the alignment given to a
1112: constant that is being placed in memory. CONSTANT is the constant
1113: and ALIGN is the alignment that the object would ordinarily have.
1114: The value of this macro is used instead of that alignment to align
1115: the object.
1116:
1117: If this macro is not defined, then ALIGN is used.
1118:
1119: The typical use of this macro is to increase alignment for string
1120: constants to be word aligned so that `strcpy' calls that copy
1121: constants can be done inline. */
1122:
1123: #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
1124: ((TREE_CODE (EXP) == STRING_CST || TREE_CODE (EXP) == CONSTRUCTOR) \
1125: && (ALIGN) < BITS_PER_WORD \
1126: ? BITS_PER_WORD \
1127: : (ALIGN))
1128:
1129: /* If defined, a C expression to compute the alignment for a static
1130: variable. TYPE is the data type, and ALIGN is the alignment that
1131: the object would ordinarily have. The value of this macro is used
1132: instead of that alignment to align the object.
1133:
1134: If this macro is not defined, then ALIGN is used.
1135:
1136: One use of this macro is to increase alignment of medium-size
1137: data to make it all fit in fewer cache lines. Another is to
1138: cause character arrays to be word-aligned so that `strcpy' calls
1139: that copy constants to character arrays can be done inline. */
1140:
1141: #undef DATA_ALIGNMENT
1142: #define DATA_ALIGNMENT(TYPE, ALIGN) \
1143: ((((ALIGN) < BITS_PER_WORD) \
1144: && (TREE_CODE (TYPE) == ARRAY_TYPE \
1145: || TREE_CODE (TYPE) == UNION_TYPE \
1146: || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
1147:
1148: /* Define this macro if an argument declared as `char' or `short' in a
1149: prototype should actually be passed as an `int'. In addition to
1150: avoiding errors in certain cases of mismatch, it also makes for
1151: better code on certain machines. */
1152:
1153: #define PROMOTE_PROTOTYPES
1154:
1.1.1.2 root 1155: /* Define if operations between registers always perform the operation
1156: on the full register even if a narrower mode is specified. */
1157: #define WORD_REGISTER_OPERATIONS
1158:
1159: /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1160: will either zero-extend or sign-extend. The value of this macro should
1161: be the code that says which one of the two operations is implicitly
1162: done, NIL if none. */
1163: #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1.1 root 1164:
1165: /* Standard register usage. */
1166:
1167: /* Number of actual hardware registers.
1168: The hardware registers are assigned numbers for the compiler
1169: from 0 to just below FIRST_PSEUDO_REGISTER.
1170: All registers that the compiler knows about must be given numbers,
1171: even those that are not normally considered general registers.
1172:
1.1.1.4 ! root 1173: On the Mips, we have 32 integer registers, 32 floating point
! 1174: registers and the special registers hi, lo, hilo, and fp status.
! 1175: The hilo register is only used in 64 bit mode. It represents a 64
! 1176: bit value stored as two 32 bit values in the hi and lo registers;
! 1177: this is the result of the mult instruction. */
1.1 root 1178:
1.1.1.4 ! root 1179: #define FIRST_PSEUDO_REGISTER 68
1.1 root 1180:
1181: /* 1 for registers that have pervasive standard uses
1182: and are not available for the register allocator.
1183:
1184: On the MIPS, see conventions, page D-2 */
1185:
1186: #define FIXED_REGISTERS \
1187: { \
1188: 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1189: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, \
1190: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1191: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1.1.1.4 ! root 1192: 0, 0, 0, 1 \
1.1 root 1193: }
1194:
1195:
1196: /* 1 for registers not available across function calls.
1197: These must include the FIXED_REGISTERS and also any
1198: registers that can be used without being saved.
1199: The latter must include the registers where values are returned
1200: and the register where structure-value addresses are passed.
1201: Aside from that, you can include as many other registers as you like. */
1202:
1203: #define CALL_USED_REGISTERS \
1204: { \
1205: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1206: 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
1207: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1208: 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1.1.1.4 ! root 1209: 1, 1, 1, 1 \
1.1 root 1210: }
1211:
1212:
1213: /* Internal macros to classify a register number as to whether it's a
1214: general purpose register, a floating point register, a
1.1.1.4 ! root 1215: multiply/divide register, or a status register. */
1.1 root 1216:
1217: #define GP_REG_FIRST 0
1218: #define GP_REG_LAST 31
1219: #define GP_REG_NUM (GP_REG_LAST - GP_REG_FIRST + 1)
1220: #define GP_DBX_FIRST 0
1221:
1222: #define FP_REG_FIRST 32
1223: #define FP_REG_LAST 63
1224: #define FP_REG_NUM (FP_REG_LAST - FP_REG_FIRST + 1)
1225: #define FP_DBX_FIRST ((write_symbols == DBX_DEBUG) ? 38 : 32)
1226:
1227: #define MD_REG_FIRST 64
1.1.1.4 ! root 1228: #define MD_REG_LAST 66
1.1 root 1229: #define MD_REG_NUM (MD_REG_LAST - MD_REG_FIRST + 1)
1230:
1.1.1.4 ! root 1231: #define ST_REG_FIRST 67
! 1232: #define ST_REG_LAST 67
1.1 root 1233: #define ST_REG_NUM (ST_REG_LAST - ST_REG_FIRST + 1)
1234:
1235: #define AT_REGNUM (GP_REG_FIRST + 1)
1236: #define HI_REGNUM (MD_REG_FIRST + 0)
1237: #define LO_REGNUM (MD_REG_FIRST + 1)
1.1.1.4 ! root 1238: #define HILO_REGNUM (MD_REG_FIRST + 2)
1.1 root 1239: #define FPSW_REGNUM ST_REG_FIRST
1240:
1241: #define GP_REG_P(REGNO) ((unsigned) ((REGNO) - GP_REG_FIRST) < GP_REG_NUM)
1242: #define FP_REG_P(REGNO) ((unsigned) ((REGNO) - FP_REG_FIRST) < FP_REG_NUM)
1243: #define MD_REG_P(REGNO) ((unsigned) ((REGNO) - MD_REG_FIRST) < MD_REG_NUM)
1244: #define ST_REG_P(REGNO) ((REGNO) == ST_REG_FIRST)
1245:
1246: /* Return number of consecutive hard regs needed starting at reg REGNO
1247: to hold something of mode MODE.
1248: This is ordinarily the length in words of a value of mode MODE
1249: but can be less for certain modes in special long registers.
1250:
1251: On the MIPS, all general registers are one word long. Except on
1252: the R4000 with the FR bit set, the floating point uses register
1253: pairs, with the second register not being allocatable. */
1254:
1255: #define HARD_REGNO_NREGS(REGNO, MODE) \
1256: (! FP_REG_P (REGNO) \
1257: ? ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) \
1.1.1.4 ! root 1258: : ((GET_MODE_SIZE (MODE) + UNITS_PER_FPREG - 1) / UNITS_PER_FPREG))
1.1 root 1259:
1260: /* Value is 1 if hard register REGNO can hold a value of machine-mode
1.1.1.3 root 1261: MODE. In 32 bit mode, require that DImode and DFmode be in even
1262: registers. For DImode, this makes some of the insns easier to
1263: write, since you don't have to worry about a DImode value in
1264: registers 3 & 4, producing a result in 4 & 5.
1.1 root 1265:
1266: To make the code simpler HARD_REGNO_MODE_OK now just references an
1267: array built in override_options. Because machmodes.h is not yet
1268: included before this file is processed, the MODE bound can't be
1269: expressed here. */
1270:
1271: extern char mips_hard_regno_mode_ok[][FIRST_PSEUDO_REGISTER];
1272:
1273: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
1274: mips_hard_regno_mode_ok[ (int)(MODE) ][ (REGNO) ]
1275:
1276: /* Value is 1 if it is a good idea to tie two pseudo registers
1277: when one has mode MODE1 and one has mode MODE2.
1278: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
1279: for any hard reg, then this must be 0 for correct output. */
1280: #define MODES_TIEABLE_P(MODE1, MODE2) \
1281: ((GET_MODE_CLASS (MODE1) == MODE_FLOAT || \
1282: GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
1283: == (GET_MODE_CLASS (MODE2) == MODE_FLOAT || \
1284: GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
1285:
1286: /* MIPS pc is not overloaded on a register. */
1287: /* #define PC_REGNUM xx */
1288:
1289: /* Register to use for pushing function arguments. */
1290: #define STACK_POINTER_REGNUM (GP_REG_FIRST + 29)
1291:
1292: /* Offset from the stack pointer to the first available location. */
1293: #define STACK_POINTER_OFFSET 0
1294:
1295: /* Base register for access to local variables of the function. */
1296: #define FRAME_POINTER_REGNUM (GP_REG_FIRST + 30)
1297:
1298: /* Value should be nonzero if functions must have frame pointers.
1299: Zero means the frame pointer need not be set up (and parms
1300: may be accessed via the stack pointer) in functions that seem suitable.
1301: This is computed in `reload', in reload1.c. */
1302: #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
1303:
1304: /* Base register for access to arguments of the function. */
1305: #define ARG_POINTER_REGNUM GP_REG_FIRST
1306:
1307: /* Register in which static-chain is passed to a function. */
1308: #define STATIC_CHAIN_REGNUM (GP_REG_FIRST + 2)
1309:
1310: /* If the structure value address is passed in a register, then
1311: `STRUCT_VALUE_REGNUM' should be the number of that register. */
1312: /* #define STRUCT_VALUE_REGNUM (GP_REG_FIRST + 4) */
1313:
1314: /* If the structure value address is not passed in a register, define
1315: `STRUCT_VALUE' as an expression returning an RTX for the place
1316: where the address is passed. If it returns 0, the address is
1317: passed as an "invisible" first argument. */
1.1.1.3 root 1318: #define STRUCT_VALUE 0
1.1 root 1319:
1320: /* Mips registers used in prologue/epilogue code when the stack frame
1321: is larger than 32K bytes. These registers must come from the
1322: scratch register set, and not used for passing and returning
1323: arguments and any other information used in the calling sequence
1.1.1.4 ! root 1324: (such as pic). Must start at 12, since t0/t3 are parameter passing
! 1325: registers in the 64 bit ABI. */
1.1 root 1326:
1.1.1.4 ! root 1327: #define MIPS_TEMP1_REGNUM (GP_REG_FIRST + 12)
! 1328: #define MIPS_TEMP2_REGNUM (GP_REG_FIRST + 13)
1.1 root 1329:
1330: /* Define this macro if it is as good or better to call a constant
1331: function address than to call an address kept in a register. */
1332: #define NO_FUNCTION_CSE 1
1333:
1334: /* Define this macro if it is as good or better for a function to
1335: call itself with an explicit address than to call an address
1336: kept in a register. */
1337: #define NO_RECURSIVE_FUNCTION_CSE 1
1338:
1339: /* The register number of the register used to address a table of
1340: static data addresses in memory. In some cases this register is
1341: defined by a processor's "application binary interface" (ABI).
1342: When this macro is defined, RTL is generated for this register
1343: once, as with the stack pointer and frame pointer registers. If
1344: this macro is not defined, it is up to the machine-dependent
1345: files to allocate such a register (if necessary). */
1346: #define PIC_OFFSET_TABLE_REGNUM (GP_REG_FIRST + 28)
1347:
1.1.1.2 root 1348: #define PIC_FUNCTION_ADDR_REGNUM (GP_REG_FIRST + 25)
1349:
1.1.1.4 ! root 1350: /* Initialize embedded_pic_fnaddr_rtx before RTL generation for
! 1351: each function. We used to do this in FINALIZE_PIC, but FINALIZE_PIC
! 1352: isn't always called for static inline functions. */
! 1353: #define INIT_EXPANDERS embedded_pic_fnaddr_rtx = NULL;
1.1 root 1354:
1355: /* Define the classes of registers for register constraints in the
1356: machine description. Also define ranges of constants.
1357:
1358: One of the classes must always be named ALL_REGS and include all hard regs.
1359: If there is more than one class, another class must be named NO_REGS
1360: and contain no registers.
1361:
1362: The name GENERAL_REGS must be the name of a class (or an alias for
1363: another name such as ALL_REGS). This is the class of registers
1364: that is allowed by "g" or "r" in a register constraint.
1365: Also, registers outside this class are allocated only when
1366: instructions express preferences for them.
1367:
1368: The classes must be numbered in nondecreasing order; that is,
1369: a larger-numbered class must never be contained completely
1370: in a smaller-numbered class.
1371:
1372: For any two classes, it is very desirable that there be another
1373: class that represents their union. */
1374:
1375: enum reg_class
1376: {
1377: NO_REGS, /* no registers in set */
1378: GR_REGS, /* integer registers */
1379: FP_REGS, /* floating point registers */
1380: HI_REG, /* hi register */
1381: LO_REG, /* lo register */
1.1.1.4 ! root 1382: HILO_REG, /* hilo register pair for 64 bit mode mult */
1.1 root 1383: MD_REGS, /* multiply/divide registers (hi/lo) */
1384: ST_REGS, /* status registers (fp status) */
1385: ALL_REGS, /* all registers */
1386: LIM_REG_CLASSES /* max value + 1 */
1387: };
1388:
1389: #define N_REG_CLASSES (int) LIM_REG_CLASSES
1390:
1391: #define GENERAL_REGS GR_REGS
1392:
1393: /* An initializer containing the names of the register classes as C
1394: string constants. These names are used in writing some of the
1395: debugging dumps. */
1396:
1397: #define REG_CLASS_NAMES \
1398: { \
1399: "NO_REGS", \
1400: "GR_REGS", \
1401: "FP_REGS", \
1402: "HI_REG", \
1403: "LO_REG", \
1.1.1.4 ! root 1404: "HILO_REG", \
1.1 root 1405: "MD_REGS", \
1406: "ST_REGS", \
1407: "ALL_REGS" \
1408: }
1409:
1410: /* An initializer containing the contents of the register classes,
1411: as integers which are bit masks. The Nth integer specifies the
1412: contents of class N. The way the integer MASK is interpreted is
1413: that register R is in the class if `MASK & (1 << R)' is 1.
1414:
1415: When the machine has more than 32 registers, an integer does not
1416: suffice. Then the integers are replaced by sub-initializers,
1417: braced groupings containing several integers. Each
1418: sub-initializer must be suitable as an initializer for the type
1419: `HARD_REG_SET' which is defined in `hard-reg-set.h'. */
1420:
1421: #define REG_CLASS_CONTENTS \
1422: { \
1423: { 0x00000000, 0x00000000, 0x00000000 }, /* no registers */ \
1424: { 0xffffffff, 0x00000000, 0x00000000 }, /* integer registers */ \
1425: { 0x00000000, 0xffffffff, 0x00000000 }, /* floating registers*/ \
1426: { 0x00000000, 0x00000000, 0x00000001 }, /* hi register */ \
1427: { 0x00000000, 0x00000000, 0x00000002 }, /* lo register */ \
1.1.1.4 ! root 1428: { 0x00000000, 0x00000000, 0x00000004 }, /* hilo register */ \
1.1 root 1429: { 0x00000000, 0x00000000, 0x00000003 }, /* mul/div registers */ \
1.1.1.4 ! root 1430: { 0x00000000, 0x00000000, 0x00000008 }, /* status registers */ \
! 1431: { 0xffffffff, 0xffffffff, 0x0000000f } /* all registers */ \
1.1 root 1432: }
1433:
1434:
1435: /* A C expression whose value is a register class containing hard
1436: register REGNO. In general there is more that one such class;
1437: choose a class which is "minimal", meaning that no smaller class
1438: also contains the register. */
1439:
1440: extern enum reg_class mips_regno_to_class[];
1441:
1442: #define REGNO_REG_CLASS(REGNO) mips_regno_to_class[ (REGNO) ]
1443:
1444: /* A macro whose definition is the name of the class to which a
1445: valid base register must belong. A base register is one used in
1446: an address which is the register value plus a displacement. */
1447:
1448: #define BASE_REG_CLASS GR_REGS
1449:
1450: /* A macro whose definition is the name of the class to which a
1451: valid index register must belong. An index register is one used
1452: in an address where its value is either multiplied by a scale
1453: factor or added to another register (as well as added to a
1454: displacement). */
1455:
1.1.1.3 root 1456: #define INDEX_REG_CLASS NO_REGS
1.1 root 1457:
1458:
1459: /* REGISTER AND CONSTANT CLASSES */
1460:
1461: /* Get reg_class from a letter such as appears in the machine
1462: description.
1463:
1464: DEFINED REGISTER CLASSES:
1465:
1466: 'd' General (aka integer) registers
1467: 'f' Floating point registers
1468: 'h' Hi register
1469: 'l' Lo register
1470: 'x' Multiply/divide registers
1.1.1.4 ! root 1471: 'a' HILO_REG
! 1472: 'z' FP Status register
! 1473: 'b' All registers */
1.1 root 1474:
1475: extern enum reg_class mips_char_to_class[];
1476:
1477: #define REG_CLASS_FROM_LETTER(C) mips_char_to_class[ (C) ]
1478:
1479: /* The letters I, J, K, L, M, N, O, and P in a register constraint
1480: string can be used to stand for particular ranges of immediate
1481: operands. This macro defines what the ranges are. C is the
1482: letter, and VALUE is a constant value. Return 1 if VALUE is
1483: in the range specified by C. */
1484:
1485: /* For MIPS:
1486:
1487: `I' is used for the range of constants an arithmetic insn can
1488: actually contain (16 bits signed integers).
1489:
1490: `J' is used for the range which is just zero (ie, $r0).
1491:
1492: `K' is used for the range of constants a logical insn can actually
1493: contain (16 bit zero-extended integers).
1494:
1495: `L' is used for the range of constants that be loaded with lui
1496: (ie, the bottom 16 bits are zero).
1497:
1498: `M' is used for the range of constants that take two words to load
1499: (ie, not matched by `I', `K', and `L').
1500:
1501: `N' is used for negative 16 bit constants.
1502:
1503: `O' is an exact power of 2 (not yet used in the md file).
1504:
1505: `P' is used for positive 16 bit constants. */
1506:
1.1.1.4 ! root 1507: #define SMALL_INT(X) ((unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
! 1508: #define SMALL_INT_UNSIGNED(X) ((unsigned HOST_WIDE_INT) (INTVAL (X)) < 0x10000)
1.1 root 1509:
1510: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
1.1.1.4 ! root 1511: ((C) == 'I' ? ((unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000) \
1.1 root 1512: : (C) == 'J' ? ((VALUE) == 0) \
1.1.1.4 ! root 1513: : (C) == 'K' ? ((unsigned HOST_WIDE_INT) (VALUE) < 0x10000) \
1.1.1.3 root 1514: : (C) == 'L' ? (((VALUE) & 0x0000ffff) == 0 \
1515: && (((VALUE) & ~2147483647) == 0 \
1516: || ((VALUE) & ~2147483647) == ~2147483647)) \
1.1 root 1517: : (C) == 'M' ? ((((VALUE) & ~0x0000ffff) != 0) \
1518: && (((VALUE) & ~0x0000ffff) != ~0x0000ffff) \
1.1.1.3 root 1519: && (((VALUE) & 0x0000ffff) != 0 \
1520: || (((VALUE) & ~2147483647) != 0 \
1521: && ((VALUE) & ~2147483647) != ~2147483647))) \
1.1 root 1522: : (C) == 'N' ? (((VALUE) & ~0x0000ffff) == ~0x0000ffff) \
1523: : (C) == 'O' ? (exact_log2 (VALUE) >= 0) \
1524: : (C) == 'P' ? ((VALUE) != 0 && (((VALUE) & ~0x0000ffff) == 0)) \
1525: : 0)
1526:
1527: /* Similar, but for floating constants, and defining letters G and H.
1528: Here VALUE is the CONST_DOUBLE rtx itself. */
1529:
1530: /* For Mips
1531:
1532: 'G' : Floating point 0 */
1533:
1534: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
1535: ((C) == 'G' \
1.1.1.3 root 1536: && (VALUE) == CONST0_RTX (GET_MODE (VALUE)))
1.1 root 1537:
1538: /* Letters in the range `Q' through `U' may be defined in a
1539: machine-dependent fashion to stand for arbitrary operand types.
1540: The machine description macro `EXTRA_CONSTRAINT' is passed the
1541: operand as its first argument and the constraint letter as its
1542: second operand.
1543:
1544: `Q' is for memory references which take more than 1 instruction.
1545: `R' is for memory references which take 1 word for the instruction.
1546: `S' is for references to extern items which are PIC for OSF/rose. */
1547:
1548: #define EXTRA_CONSTRAINT(OP,CODE) \
1549: ((GET_CODE (OP) != MEM) ? FALSE \
1550: : ((CODE) == 'Q') ? !simple_memory_operand (OP, GET_MODE (OP)) \
1551: : ((CODE) == 'R') ? simple_memory_operand (OP, GET_MODE (OP)) \
1552: : ((CODE) == 'S') ? (HALF_PIC_P () && CONSTANT_P (OP) \
1553: && HALF_PIC_ADDRESS_P (OP)) \
1554: : FALSE)
1555:
1556: /* Given an rtx X being reloaded into a reg required to be
1557: in class CLASS, return the class of reg to actually use.
1558: In general this is just CLASS; but on some machines
1559: in some cases it is preferable to use a more restrictive class. */
1560:
1561: #define PREFERRED_RELOAD_CLASS(X,CLASS) \
1.1.1.3 root 1562: ((CLASS) != ALL_REGS \
1563: ? (CLASS) \
1564: : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
1565: || GET_MODE_CLASS (GET_MODE (X)) == MODE_COMPLEX_FLOAT) \
1566: ? (TARGET_SOFT_FLOAT ? GR_REGS : FP_REGS) \
1567: : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_INT \
1568: || GET_MODE (X) == VOIDmode) \
1569: ? GR_REGS \
1570: : (CLASS))))
1.1 root 1571:
1572: /* Certain machines have the property that some registers cannot be
1573: copied to some other registers without using memory. Define this
1574: macro on those machines to be a C expression that is non-zero if
1575: objects of mode MODE in registers of CLASS1 can only be copied to
1576: registers of class CLASS2 by storing a register of CLASS1 into
1577: memory and loading that memory location into a register of CLASS2.
1578:
1579: Do not define this macro if its value would always be zero. */
1580:
1581: #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
1.1.1.3 root 1582: ((!TARGET_DEBUG_H_MODE \
1583: && GET_MODE_CLASS (MODE) == MODE_INT \
1584: && ((CLASS1 == FP_REGS && CLASS2 == GR_REGS) \
1585: || (CLASS1 == GR_REGS && CLASS2 == FP_REGS))) \
1586: || (TARGET_FLOAT64 && !TARGET_64BIT && (MODE) == DFmode \
1587: && ((CLASS1 == GR_REGS && CLASS2 == FP_REGS) \
1588: || (CLASS2 == GR_REGS && CLASS1 == FP_REGS))))
1.1 root 1589:
1.1.1.4 ! root 1590: /* The HI and LO registers can only be reloaded via the general
! 1591: registers. */
! 1592:
! 1593: #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
! 1594: mips_secondary_reload_class (CLASS, MODE, X, 1)
! 1595: #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
! 1596: mips_secondary_reload_class (CLASS, MODE, X, 0)
! 1597:
! 1598: /* Not declared above, with the other functions, because enum
! 1599: reg_class is not declared yet. */
! 1600: extern enum reg_class mips_secondary_reload_class ();
! 1601:
1.1 root 1602: /* Return the maximum number of consecutive registers
1603: needed to represent mode MODE in a register of class CLASS. */
1604:
1.1.1.2 root 1605: #define CLASS_UNITS(mode, size) \
1606: ((GET_MODE_SIZE (mode) + (size) - 1) / (size))
1.1 root 1607:
1608: #define CLASS_MAX_NREGS(CLASS, MODE) \
1.1.1.2 root 1609: ((CLASS) == FP_REGS \
1610: ? (TARGET_FLOAT64 \
1611: ? CLASS_UNITS (MODE, 8) \
1612: : 2 * CLASS_UNITS (MODE, 8)) \
1613: : CLASS_UNITS (MODE, UNITS_PER_WORD))
1.1 root 1614:
1615: /* If defined, this is a C expression whose value should be
1616: nonzero if the insn INSN has the effect of mysteriously
1617: clobbering the contents of hard register number REGNO. By
1618: "mysterious" we mean that the insn's RTL expression doesn't
1619: describe such an effect.
1620:
1621: If this macro is not defined, it means that no insn clobbers
1622: registers mysteriously. This is the usual situation; all else
1623: being equal, it is best for the RTL expression to show all the
1624: activity. */
1625:
1626: /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) */
1627:
1628:
1629: /* Stack layout; function entry, exit and calling. */
1630:
1.1.1.4 ! root 1631: /* Don't enable support for the 64 bit ABI calling convention.
! 1632: Some embedded code depends on the old 64 bit calling convention. */
! 1633: #define ABI_64BIT 0
! 1634:
1.1 root 1635: /* Define this if pushing a word on the stack
1636: makes the stack pointer a smaller address. */
1637: #define STACK_GROWS_DOWNWARD
1638:
1639: /* Define this if the nominal address of the stack frame
1640: is at the high-address end of the local variables;
1641: that is, each additional local variable allocated
1642: goes at a more negative offset in the frame. */
1643: /* #define FRAME_GROWS_DOWNWARD */
1644:
1645: /* Offset within stack frame to start allocating local variables at.
1646: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
1647: first local allocated. Otherwise, it is the offset to the BEGINNING
1648: of the first local allocated. */
1.1.1.2 root 1649: #define STARTING_FRAME_OFFSET \
1650: (current_function_outgoing_args_size \
1651: + (TARGET_ABICALLS ? MIPS_STACK_ALIGN (UNITS_PER_WORD) : 0))
1.1 root 1652:
1653: /* Offset from the stack pointer register to an item dynamically
1654: allocated on the stack, e.g., by `alloca'.
1655:
1656: The default value for this macro is `STACK_POINTER_OFFSET' plus the
1657: length of the outgoing arguments. The default is correct for most
1658: machines. See `function.c' for details.
1659:
1660: The MIPS ABI states that functions which dynamically allocate the
1661: stack must not have 0 for STACK_DYNAMIC_OFFSET, since it looks like
1662: we are trying to create a second frame pointer to the function, so
1663: allocate some stack space to make it happy.
1664:
1665: However, the linker currently complains about linking any code that
1666: dynamically allocates stack space, and there seems to be a bug in
1667: STACK_DYNAMIC_OFFSET, so don't define this right now. */
1668:
1669: #if 0
1670: #define STACK_DYNAMIC_OFFSET(FUNDECL) \
1671: ((current_function_outgoing_args_size == 0 && current_function_calls_alloca) \
1672: ? 4*UNITS_PER_WORD \
1673: : current_function_outgoing_args_size)
1674: #endif
1675:
1676: /* Structure to be filled in by compute_frame_size with register
1677: save masks, and offsets for the current function. */
1678:
1679: struct mips_frame_info
1680: {
1681: long total_size; /* # bytes that the entire frame takes up */
1682: long var_size; /* # bytes that variables take up */
1683: long args_size; /* # bytes that outgoing arguments take up */
1684: long extra_size; /* # bytes of extra gunk */
1685: int gp_reg_size; /* # bytes needed to store gp regs */
1686: int fp_reg_size; /* # bytes needed to store fp regs */
1687: long mask; /* mask of saved gp registers */
1688: long fmask; /* mask of saved fp registers */
1689: long gp_save_offset; /* offset from vfp to store gp registers */
1690: long fp_save_offset; /* offset from vfp to store fp registers */
1691: long gp_sp_offset; /* offset from new sp to store gp registers */
1692: long fp_sp_offset; /* offset from new sp to store fp registers */
1693: int initialized; /* != 0 if frame size already calculated */
1694: int num_gp; /* number of gp registers saved */
1695: int num_fp; /* number of fp registers saved */
1696: };
1697:
1698: extern struct mips_frame_info current_frame_info;
1699:
1700: /* Store in the variable DEPTH the initial difference between the
1701: frame pointer reg contents and the stack pointer reg contents,
1702: as of the start of the function body. This depends on the layout
1703: of the fixed parts of the stack frame and on how registers are saved. */
1704:
1705: /* #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
1706: ((VAR) = compute_frame_size (get_frame_size ())) */
1707:
1708: /* If defined, this macro specifies a table of register pairs used to
1709: eliminate unneeded registers that point into the stack frame. If
1710: it is not defined, the only elimination attempted by the compiler
1711: is to replace references to the frame pointer with references to
1712: the stack pointer.
1713:
1714: The definition of this macro is a list of structure
1715: initializations, each of which specifies an original and
1716: replacement register.
1717:
1718: On some machines, the position of the argument pointer is not
1719: known until the compilation is completed. In such a case, a
1720: separate hard register must be used for the argument pointer.
1721: This register can be eliminated by replacing it with either the
1722: frame pointer or the argument pointer, depending on whether or not
1723: the frame pointer has been eliminated.
1724:
1725: In this case, you might specify:
1726: #define ELIMINABLE_REGS \
1727: {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1728: {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1729: {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1730:
1731: Note that the elimination of the argument pointer with the stack
1732: pointer is specified first since that is the preferred elimination. */
1733:
1734: #define ELIMINABLE_REGS \
1735: {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1736: { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1737: { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1738:
1739:
1740: /* A C expression that returns non-zero if the compiler is allowed to
1741: try to replace register number FROM-REG with register number
1742: TO-REG. This macro need only be defined if `ELIMINABLE_REGS' is
1743: defined, and will usually be the constant 1, since most of the
1744: cases preventing register elimination are things that the compiler
1745: already knows about. */
1746:
1747: #define CAN_ELIMINATE(FROM, TO) \
1748: (!frame_pointer_needed \
1749: || ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM))
1750:
1751: /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It
1752: specifies the initial difference between the specified pair of
1753: registers. This macro must be defined if `ELIMINABLE_REGS' is
1754: defined. */
1755:
1756: #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1757: { compute_frame_size (get_frame_size ()); \
1758: if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1759: (OFFSET) = 0; \
1.1.1.4 ! root 1760: else if ((FROM) == ARG_POINTER_REGNUM \
! 1761: && ((TO) == FRAME_POINTER_REGNUM \
! 1762: || (TO) == STACK_POINTER_REGNUM)) \
! 1763: (OFFSET) = (current_frame_info.total_size \
! 1764: - (ABI_64BIT && mips_isa >= 3 \
! 1765: ? current_function_pretend_args_size \
! 1766: : 0)); \
1.1 root 1767: else \
1768: abort (); \
1769: }
1770:
1771: /* If we generate an insn to push BYTES bytes,
1772: this says how many the stack pointer really advances by.
1773: On the vax, sp@- in a byte insn really pushes a word. */
1774:
1775: /* #define PUSH_ROUNDING(BYTES) 0 */
1776:
1777: /* If defined, the maximum amount of space required for outgoing
1778: arguments will be computed and placed into the variable
1779: `current_function_outgoing_args_size'. No space will be pushed
1780: onto the stack for each call; instead, the function prologue
1781: should increase the stack frame size by this amount.
1782:
1783: It is not proper to define both `PUSH_ROUNDING' and
1784: `ACCUMULATE_OUTGOING_ARGS'. */
1785: #define ACCUMULATE_OUTGOING_ARGS
1786:
1787: /* Offset from the argument pointer register to the first argument's
1788: address. On some machines it may depend on the data type of the
1789: function.
1790:
1791: If `ARGS_GROW_DOWNWARD', this is the offset to the location above
1792: the first argument's address.
1793:
1794: On the MIPS, we must skip the first argument position if we are
1.1.1.3 root 1795: returning a structure or a union, to account for its address being
1.1 root 1796: passed in $4. However, at the current time, this produces a compiler
1797: that can't bootstrap, so comment it out for now. */
1798:
1799: #if 0
1800: #define FIRST_PARM_OFFSET(FNDECL) \
1801: (FNDECL != 0 \
1802: && TREE_TYPE (FNDECL) != 0 \
1803: && TREE_TYPE (TREE_TYPE (FNDECL)) != 0 \
1804: && (TREE_CODE (TREE_TYPE (TREE_TYPE (FNDECL))) == RECORD_TYPE \
1805: || TREE_CODE (TREE_TYPE (TREE_TYPE (FNDECL))) == UNION_TYPE) \
1806: ? UNITS_PER_WORD \
1807: : 0)
1808: #else
1809: #define FIRST_PARM_OFFSET(FNDECL) 0
1810: #endif
1811:
1812: /* When a parameter is passed in a register, stack space is still
1813: allocated for it. For the MIPS, stack space must be allocated, cf
1814: Asm Lang Prog Guide page 7-8.
1815:
1816: BEWARE that some space is also allocated for non existing arguments
1817: in register. In case an argument list is of form GF used registers
1818: are a0 (a2,a3), but we should push over a1... */
1819:
1.1.1.4 ! root 1820: #define REG_PARM_STACK_SPACE(FNDECL) \
! 1821: ((MAX_ARGS_IN_REGISTERS*UNITS_PER_WORD) - FIRST_PARM_OFFSET (FNDECL))
1.1 root 1822:
1823: /* Define this if it is the responsibility of the caller to
1824: allocate the area reserved for arguments passed in registers.
1825: If `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect
1826: of this macro is to determine whether the space is included in
1827: `current_function_outgoing_args_size'. */
1828: #define OUTGOING_REG_PARM_STACK_SPACE
1829:
1830: /* Align stack frames on 64 bits (Double Word ). */
1831: #define STACK_BOUNDARY 64
1832:
1.1.1.3 root 1833: /* Make sure 4 words are always allocated on the stack. */
1.1 root 1834:
1835: #ifndef STACK_ARGS_ADJUST
1836: #define STACK_ARGS_ADJUST(SIZE) \
1837: { \
1.1.1.3 root 1838: if (SIZE.constant < 4 * UNITS_PER_WORD) \
1839: SIZE.constant = 4 * UNITS_PER_WORD; \
1.1 root 1840: }
1841: #endif
1842:
1843:
1844: /* A C expression that should indicate the number of bytes of its
1845: own arguments that a function function pops on returning, or 0
1846: if the function pops no arguments and the caller must therefore
1847: pop them all after the function returns.
1848:
1.1.1.4 ! root 1849: FUNDECL is the declaration node of the function (as a tree).
! 1850:
1.1 root 1851: FUNTYPE is a C variable whose value is a tree node that
1852: describes the function in question. Normally it is a node of
1853: type `FUNCTION_TYPE' that describes the data type of the function.
1854: From this it is possible to obtain the data types of the value
1855: and arguments (if known).
1856:
1857: When a call to a library function is being considered, FUNTYPE
1858: will contain an identifier node for the library function. Thus,
1859: if you need to distinguish among various library functions, you
1860: can do so by their names. Note that "library function" in this
1861: context means a function used to perform arithmetic, whose name
1862: is known specially in the compiler and was not mentioned in the
1863: C code being compiled.
1864:
1865: STACK-SIZE is the number of bytes of arguments passed on the
1866: stack. If a variable number of bytes is passed, it is zero, and
1867: argument popping will always be the responsibility of the
1868: calling function. */
1869:
1.1.1.4 ! root 1870: #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
1.1 root 1871:
1872:
1873: /* Symbolic macros for the registers used to return integer and floating
1874: point values. */
1875:
1876: #define GP_RETURN (GP_REG_FIRST + 2)
1877: #define FP_RETURN ((TARGET_SOFT_FLOAT) ? GP_RETURN : (FP_REG_FIRST + 0))
1878:
1879: /* Symbolic macros for the first/last argument registers. */
1880:
1881: #define GP_ARG_FIRST (GP_REG_FIRST + 4)
1882: #define GP_ARG_LAST (GP_REG_FIRST + 7)
1883: #define FP_ARG_FIRST (FP_REG_FIRST + 12)
1884: #define FP_ARG_LAST (FP_REG_FIRST + 15)
1885:
1886: #define MAX_ARGS_IN_REGISTERS 4
1887:
1888: /* Define how to find the value returned by a library function
1889: assuming the value has mode MODE. */
1890:
1891: #define LIBCALL_VALUE(MODE) \
1892: gen_rtx (REG, MODE, \
1.1.1.4 ! root 1893: ((GET_MODE_CLASS (MODE) == MODE_FLOAT \
! 1894: && (! TARGET_SINGLE_FLOAT \
! 1895: || GET_MODE_SIZE (MODE) <= 4)) \
! 1896: ? FP_RETURN \
! 1897: : GP_RETURN))
1.1 root 1898:
1899: /* Define how to find the value returned by a function.
1900: VALTYPE is the data type of the value (as a tree).
1901: If the precise function being called is known, FUNC is its FUNCTION_DECL;
1902: otherwise, FUNC is 0. */
1903:
1904: #define FUNCTION_VALUE(VALTYPE, FUNC) LIBCALL_VALUE (TYPE_MODE (VALTYPE))
1905:
1906:
1907: /* 1 if N is a possible register number for a function value.
1908: On the MIPS, R2 R3 and F0 F2 are the only register thus used.
1909: Currently, R2 and F0 are only implemented here (C has no complex type) */
1910:
1911: #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN || (N) == FP_RETURN)
1912:
1913: /* 1 if N is a possible register number for function argument passing. */
1914:
1915: #define FUNCTION_ARG_REGNO_P(N) (((N) >= GP_ARG_FIRST && (N) <= GP_ARG_LAST) \
1916: || ((N) >= FP_ARG_FIRST && (N) <= FP_ARG_LAST \
1917: && (0 == (N) % 2)))
1918:
1919: /* A C expression which can inhibit the returning of certain function
1920: values in registers, based on the type of value. A nonzero value says
1921: to return the function value in memory, just as large structures are
1922: always returned. Here TYPE will be a C expression of type
1923: `tree', representing the data type of the value.
1924:
1925: Note that values of mode `BLKmode' must be explicitly
1926: handled by this macro. Also, the option `-fpcc-struct-return'
1927: takes effect regardless of this macro. On most systems, it is
1928: possible to leave the macro undefined; this causes a default
1929: definition to be used, whose value is the constant 1 for BLKmode
1930: values, and 0 otherwise.
1931:
1932: GCC normally converts 1 byte structures into chars, 2 byte
1933: structs into shorts, and 4 byte structs into ints, and returns
1934: them this way. Defining the following macro overrides this,
1935: to give us MIPS cc compatibility. */
1936:
1937: #define RETURN_IN_MEMORY(TYPE) \
1938: (TYPE_MODE (TYPE) == BLKmode)
1939:
1940: /* A code distinguishing the floating point format of the target
1941: machine. There are three defined values: IEEE_FLOAT_FORMAT,
1942: VAX_FLOAT_FORMAT, and UNKNOWN_FLOAT_FORMAT. */
1943:
1944: #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
1945:
1946:
1947: /* Define a data type for recording info about an argument list
1948: during the scan of that argument list. This data type should
1949: hold all necessary information about the function itself
1950: and about the args processed so far, enough to enable macros
1951: such as FUNCTION_ARG to determine where the next arg should go.
1952: */
1953:
1954: typedef struct mips_args {
1955: int gp_reg_found; /* whether a gp register was found yet */
1956: int arg_number; /* argument number */
1957: int arg_words; /* # total words the arguments take */
1958: int num_adjusts; /* number of adjustments made */
1959: /* Adjustments made to args pass in regs. */
1.1.1.2 root 1960: /* ??? The size is doubled to work around a
1961: bug in the code that sets the adjustments
1962: in function_arg. */
1963: struct rtx_def *adjust[MAX_ARGS_IN_REGISTERS*2];
1.1 root 1964: } CUMULATIVE_ARGS;
1965:
1966: /* Initialize a variable CUM of type CUMULATIVE_ARGS
1967: for a call to a function whose data type is FNTYPE.
1968: For a library call, FNTYPE is 0.
1969:
1970: */
1971:
1972: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
1973: init_cumulative_args (&CUM, FNTYPE, LIBNAME) \
1974:
1975: /* Update the data in CUM to advance over an argument
1976: of mode MODE and data type TYPE.
1977: (TYPE is null for libcalls where that information may not be available.) */
1978:
1979: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1980: function_arg_advance (&CUM, MODE, TYPE, NAMED)
1981:
1982: /* Determine where to put an argument to a function.
1983: Value is zero to push the argument on the stack,
1984: or a hard register in which to store the argument.
1985:
1986: MODE is the argument's machine mode.
1987: TYPE is the data type of the argument (as a tree).
1988: This is null for libcalls where that information may
1989: not be available.
1990: CUM is a variable of type CUMULATIVE_ARGS which gives info about
1991: the preceding args and about the function being called.
1992: NAMED is nonzero if this argument is a named parameter
1993: (otherwise it is an extra parameter matching an ellipsis). */
1994:
1995: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1996: function_arg( &CUM, MODE, TYPE, NAMED)
1997:
1998: /* For an arg passed partly in registers and partly in memory,
1999: this is the number of registers used.
2000: For args passed entirely in registers or entirely in memory, zero. */
2001:
2002: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
2003: function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)
2004:
2005: /* If defined, a C expression that gives the alignment boundary, in
2006: bits, of an argument with the specified mode and type. If it is
2007: not defined, `PARM_BOUNDARY' is used for all arguments. */
2008:
2009: #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
2010: (((TYPE) != 0) \
2011: ? ((TYPE_ALIGN(TYPE) <= PARM_BOUNDARY) \
2012: ? PARM_BOUNDARY \
2013: : TYPE_ALIGN(TYPE)) \
2014: : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
2015: ? PARM_BOUNDARY \
2016: : GET_MODE_ALIGNMENT(MODE)))
2017:
2018:
2019: /* This macro generates the assembly code for function entry.
2020: FILE is a stdio stream to output the code to.
2021: SIZE is an int: how many units of temporary storage to allocate.
2022: Refer to the array `regs_ever_live' to determine which registers
2023: to save; `regs_ever_live[I]' is nonzero if register number I
2024: is ever used in the function. This macro is responsible for
2025: knowing which registers should not be saved even if used. */
2026:
2027: #define FUNCTION_PROLOGUE(FILE, SIZE) function_prologue(FILE, SIZE)
2028:
2029: /* This macro generates the assembly code for function exit,
2030: on machines that need it. If FUNCTION_EPILOGUE is not defined
2031: then individual return instructions are generated for each
2032: return statement. Args are same as for FUNCTION_PROLOGUE. */
2033:
2034: #define FUNCTION_EPILOGUE(FILE, SIZE) function_epilogue(FILE, SIZE)
2035:
2036: /* Define the number of delay slots needed for the function epilogue.
2037:
2038: On the mips, we need a slot if either no stack has been allocated,
2039: or the only register saved is the return register. */
2040:
2041: #define DELAY_SLOTS_FOR_EPILOGUE mips_epilogue_delay_slots ()
2042:
2043: /* Define whether INSN can be placed in delay slot N for the epilogue.
2044: No references to the stack must be made, since on the MIPS, the
2045: delay slot is done after the stack has been cleaned up. */
2046:
2047: #define ELIGIBLE_FOR_EPILOGUE_DELAY(INSN,N) \
2048: (get_attr_dslot (INSN) == DSLOT_NO \
2049: && get_attr_length (INSN) == 1 \
2050: && ! epilogue_reg_mentioned_p (PATTERN (INSN)))
2051:
2052: /* Tell prologue and epilogue if register REGNO should be saved / restored. */
2053:
2054: #define MUST_SAVE_REGISTER(regno) \
2055: ((regs_ever_live[regno] && !call_used_regs[regno]) \
2056: || (regno == FRAME_POINTER_REGNUM && frame_pointer_needed) \
2057: || (regno == (GP_REG_FIRST + 31) && regs_ever_live[GP_REG_FIRST + 31]))
2058:
2059: /* ALIGN FRAMES on double word boundaries */
2060:
2061: #define MIPS_STACK_ALIGN(LOC) (((LOC)+7) & ~7)
2062:
2063:
2064: /* Output assembler code to FILE to increment profiler label # LABELNO
2065: for profiling a function entry. */
2066:
2067: #define FUNCTION_PROFILER(FILE, LABELNO) \
2068: { \
2069: fprintf (FILE, "\t.set\tnoreorder\n"); \
2070: fprintf (FILE, "\t.set\tnoat\n"); \
2071: fprintf (FILE, "\tmove\t%s,%s\t\t# save current return address\n", \
2072: reg_names[GP_REG_FIRST + 1], reg_names[GP_REG_FIRST + 31]); \
2073: fprintf (FILE, "\tjal\t_mcount\n"); \
1.1.1.3 root 2074: fprintf (FILE, \
2075: "\t%s\t%s,%s,%d\t\t# _mcount pops 2 words from stack\n", \
2076: TARGET_64BIT ? "dsubu" : "subu", \
2077: reg_names[STACK_POINTER_REGNUM], \
1.1 root 2078: reg_names[STACK_POINTER_REGNUM], \
1.1.1.3 root 2079: TARGET_LONG64 ? 16 : 8); \
1.1 root 2080: fprintf (FILE, "\t.set\treorder\n"); \
2081: fprintf (FILE, "\t.set\tat\n"); \
2082: }
2083:
2084: /* Define this macro if the code for function profiling should come
2085: before the function prologue. Normally, the profiling code comes
2086: after. */
2087:
2088: /* #define PROFILE_BEFORE_PROLOGUE */
2089:
2090: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
2091: the stack pointer does not matter. The value is tested only in
2092: functions that have frame pointers.
2093: No definition is equivalent to always zero. */
2094:
2095: #define EXIT_IGNORE_STACK 1
2096:
2097:
2098: /* A C statement to output, on the stream FILE, assembler code for a
2099: block of data that contains the constant parts of a trampoline.
2100: This code should not include a label--the label is taken care of
2101: automatically. */
2102:
2103: #define TRAMPOLINE_TEMPLATE(STREAM) \
2104: { \
2105: fprintf (STREAM, "\t.word\t0x03e00821\t\t# move $1,$31\n"); \
2106: fprintf (STREAM, "\t.word\t0x04110001\t\t# bgezal $0,.+8\n"); \
2107: fprintf (STREAM, "\t.word\t0x00000000\t\t# nop\n"); \
1.1.1.3 root 2108: if (TARGET_LONG64) \
2109: { \
2110: fprintf (STREAM, "\t.word\t0xdfe30014\t\t# ld $3,20($31)\n"); \
2111: fprintf (STREAM, "\t.word\t0xdfe2001c\t\t# ld $2,28($31)\n"); \
2112: } \
2113: else \
2114: { \
2115: fprintf (STREAM, "\t.word\t0x8fe30014\t\t# lw $3,20($31)\n"); \
2116: fprintf (STREAM, "\t.word\t0x8fe20018\t\t# lw $2,24($31)\n"); \
2117: } \
2118: fprintf (STREAM, "\t.word\t0x0060c821\t\t# move $25,$3 (abicalls)\n"); \
1.1 root 2119: fprintf (STREAM, "\t.word\t0x00600008\t\t# jr $3\n"); \
2120: fprintf (STREAM, "\t.word\t0x0020f821\t\t# move $31,$1\n"); \
1.1.1.3 root 2121: if (TARGET_LONG64) \
2122: { \
2123: fprintf (STREAM, "\t.dword\t0x00000000\t\t# <function address>\n"); \
2124: fprintf (STREAM, "\t.dword\t0x00000000\t\t# <static chain value>\n"); \
2125: } \
2126: else \
2127: { \
2128: fprintf (STREAM, "\t.word\t0x00000000\t\t# <function address>\n"); \
2129: fprintf (STREAM, "\t.word\t0x00000000\t\t# <static chain value>\n"); \
2130: } \
1.1 root 2131: }
2132:
2133: /* A C expression for the size in bytes of the trampoline, as an
2134: integer. */
2135:
1.1.1.3 root 2136: #define TRAMPOLINE_SIZE (32 + (TARGET_LONG64 ? 16 : 8))
1.1 root 2137:
1.1.1.3 root 2138: /* Alignment required for trampolines, in bits. */
1.1 root 2139:
1.1.1.3 root 2140: #define TRAMPOLINE_ALIGNMENT (TARGET_LONG64 ? 64 : 32)
1.1 root 2141:
2142: /* A C statement to initialize the variable parts of a trampoline.
2143: ADDR is an RTX for the address of the trampoline; FNADDR is an
2144: RTX for the address of the nested function; STATIC_CHAIN is an
2145: RTX for the static chain value that should be passed to the
2146: function when it is called. */
2147:
2148: #define INITIALIZE_TRAMPOLINE(ADDR, FUNC, CHAIN) \
2149: { \
2150: rtx addr = ADDR; \
1.1.1.3 root 2151: if (TARGET_LONG64) \
2152: { \
2153: emit_move_insn (gen_rtx (MEM, DImode, plus_constant (addr, 32)), FUNC); \
2154: emit_move_insn (gen_rtx (MEM, DImode, plus_constant (addr, 40)), CHAIN);\
2155: } \
2156: else \
2157: { \
2158: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 32)), FUNC); \
2159: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 36)), CHAIN);\
2160: } \
1.1 root 2161: \
1.1.1.2 root 2162: /* Flush the instruction cache. */ \
1.1.1.3 root 2163: /* ??? Are the modes right? Maybe they should depend on -mint64/-mlong64? */\
2164: /* ??? Should check the return value for errors. */ \
2165: emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "cacheflush"), \
2166: 0, VOIDmode, 3, addr, Pmode, \
2167: GEN_INT (TRAMPOLINE_SIZE), SImode, \
2168: GEN_INT (1), SImode); \
1.1 root 2169: }
2170:
2171: /* Addressing modes, and classification of registers for them. */
2172:
2173: /* #define HAVE_POST_INCREMENT */
2174: /* #define HAVE_POST_DECREMENT */
2175:
2176: /* #define HAVE_PRE_DECREMENT */
2177: /* #define HAVE_PRE_INCREMENT */
2178:
2179: /* These assume that REGNO is a hard or pseudo reg number.
2180: They give nonzero only if REGNO is a hard reg of the suitable class
2181: or a pseudo reg currently allocated to a suitable hard reg.
2182: These definitions are NOT overridden anywhere. */
2183:
2184: #define GP_REG_OR_PSEUDO_STRICT_P(regno) \
2185: GP_REG_P((regno < FIRST_PSEUDO_REGISTER) ? regno : reg_renumber[regno])
2186:
2187: #define GP_REG_OR_PSEUDO_NONSTRICT_P(regno) \
2188: (((regno) >= FIRST_PSEUDO_REGISTER) || (GP_REG_P (regno)))
2189:
1.1.1.3 root 2190: #define REGNO_OK_FOR_INDEX_P(regno) 0
1.1 root 2191: #define REGNO_OK_FOR_BASE_P(regno) GP_REG_OR_PSEUDO_STRICT_P (regno)
2192:
2193: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
2194: and check its validity for a certain class.
2195: We have two alternate definitions for each of them.
2196: The usual definition accepts all pseudo regs; the other rejects them all.
2197: The symbol REG_OK_STRICT causes the latter definition to be used.
2198:
2199: Most source files want to accept pseudo regs in the hope that
2200: they will get allocated to the class that the insn wants them to be in.
2201: Some source files that are used after register allocation
2202: need to be strict. */
2203:
2204: #ifndef REG_OK_STRICT
2205:
2206: #define REG_OK_STRICT_P 0
1.1.1.3 root 2207: #define REG_OK_FOR_INDEX_P(X) 0
1.1 root 2208: #define REG_OK_FOR_BASE_P(X) GP_REG_OR_PSEUDO_NONSTRICT_P (REGNO (X))
2209:
2210: #else
2211:
2212: #define REG_OK_STRICT_P 1
1.1.1.3 root 2213: #define REG_OK_FOR_INDEX_P(X) 0
1.1 root 2214: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
2215:
2216: #endif
2217:
2218:
2219: /* Maximum number of registers that can appear in a valid memory address. */
2220:
2221: #define MAX_REGS_PER_ADDRESS 1
2222:
2223: /* A C compound statement with a conditional `goto LABEL;' executed
2224: if X (an RTX) is a legitimate memory address on the target
2225: machine for a memory operand of mode MODE.
2226:
2227: It usually pays to define several simpler macros to serve as
2228: subroutines for this one. Otherwise it may be too complicated
2229: to understand.
2230:
2231: This macro must exist in two variants: a strict variant and a
2232: non-strict one. The strict variant is used in the reload pass.
2233: It must be defined so that any pseudo-register that has not been
2234: allocated a hard register is considered a memory reference. In
2235: contexts where some kind of register is required, a
2236: pseudo-register with no hard register must be rejected.
2237:
2238: The non-strict variant is used in other passes. It must be
2239: defined to accept all pseudo-registers in every context where
2240: some kind of register is required.
2241:
2242: Compiler source files that want to use the strict variant of
2243: this macro define the macro `REG_OK_STRICT'. You should use an
2244: `#ifdef REG_OK_STRICT' conditional to define the strict variant
2245: in that case and the non-strict variant otherwise.
2246:
2247: Typically among the subroutines used to define
2248: `GO_IF_LEGITIMATE_ADDRESS' are subroutines to check for
2249: acceptable registers for various purposes (one for base
2250: registers, one for index registers, and so on). Then only these
2251: subroutine macros need have two variants; the higher levels of
2252: macros may be the same whether strict or not.
2253:
2254: Normally, constant addresses which are the sum of a `symbol_ref'
2255: and an integer are stored inside a `const' RTX to mark them as
2256: constant. Therefore, there is no need to recognize such sums
2257: specifically as legitimate addresses. Normally you would simply
2258: recognize any `const' as legitimate.
2259:
2260: Usually `PRINT_OPERAND_ADDRESS' is not prepared to handle
2261: constant sums that are not marked with `const'. It assumes
2262: that a naked `plus' indicates indexing. If so, then you *must*
2263: reject such naked constant sums as illegitimate addresses, so
2264: that none of them will be given to `PRINT_OPERAND_ADDRESS'.
2265:
2266: On some machines, whether a symbolic address is legitimate
2267: depends on the section that the address refers to. On these
2268: machines, define the macro `ENCODE_SECTION_INFO' to store the
2269: information into the `symbol_ref', and then check for it here.
2270: When you see a `const', you will have to look inside it to find
2271: the `symbol_ref' in order to determine the section. */
2272:
2273: #if 1
2274: #define GO_PRINTF(x) trace(x)
2275: #define GO_PRINTF2(x,y) trace(x,y)
2276: #define GO_DEBUG_RTX(x) debug_rtx(x)
2277:
2278: #else
2279: #define GO_PRINTF(x)
2280: #define GO_PRINTF2(x,y)
2281: #define GO_DEBUG_RTX(x)
2282: #endif
2283:
2284: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
2285: { \
2286: register rtx xinsn = (X); \
2287: \
2288: if (TARGET_DEBUG_B_MODE) \
2289: { \
2290: GO_PRINTF2 ("\n========== GO_IF_LEGITIMATE_ADDRESS, %sstrict\n", \
2291: (REG_OK_STRICT_P) ? "" : "not "); \
2292: GO_DEBUG_RTX (xinsn); \
2293: } \
2294: \
2295: if (GET_CODE (xinsn) == REG && REG_OK_FOR_BASE_P (xinsn)) \
2296: goto ADDR; \
2297: \
2298: if (CONSTANT_ADDRESS_P (xinsn)) \
2299: goto ADDR; \
2300: \
2301: if (GET_CODE (xinsn) == PLUS) \
2302: { \
2303: register rtx xplus0 = XEXP (xinsn, 0); \
2304: register rtx xplus1 = XEXP (xinsn, 1); \
2305: register enum rtx_code code0 = GET_CODE (xplus0); \
2306: register enum rtx_code code1 = GET_CODE (xplus1); \
2307: \
2308: if (code0 != REG && code1 == REG) \
2309: { \
2310: xplus0 = XEXP (xinsn, 1); \
2311: xplus1 = XEXP (xinsn, 0); \
2312: code0 = GET_CODE (xplus0); \
2313: code1 = GET_CODE (xplus1); \
2314: } \
2315: \
2316: if (code0 == REG && REG_OK_FOR_BASE_P (xplus0)) \
2317: { \
1.1.1.3 root 2318: if (code1 == CONST_INT \
2319: && INTVAL (xplus1) >= -32768 \
2320: && INTVAL (xplus1) + GET_MODE_SIZE (MODE) - 1 <= 32767) \
2321: goto ADDR; \
1.1 root 2322: \
2323: /* For some code sequences, you actually get better code by \
2324: pretending that the MIPS supports an address mode of a \
2325: constant address + a register, even though the real \
2326: machine doesn't support it. This is because the \
2327: assembler can use $r1 to load just the high 16 bits, add \
2328: in the register, and fold the low 16 bits into the memory \
2329: reference, whereas the compiler generates a 4 instruction \
2330: sequence. On the other hand, CSE is not as effective. \
2331: It would be a win to generate the lui directly, but the \
2332: MIPS assembler does not have syntax to generate the \
2333: appropriate relocation. */ \
2334: \
1.1.1.3 root 2335: /* Also accept CONST_INT addresses here, so no else. */ \
2336: /* Reject combining an embedded PIC text segment reference \
2337: with a register. That requires an additional \
2338: instruction. */ \
1.1.1.4 ! root 2339: /* ??? Reject combining an address with a register for the MIPS \
! 2340: 64 bit ABI, because the SGI assembler can not handle this. */ \
1.1.1.3 root 2341: if (!TARGET_DEBUG_A_MODE \
1.1.1.4 ! root 2342: && ! ABI_64BIT \
1.1.1.3 root 2343: && CONSTANT_ADDRESS_P (xplus1) \
2344: && (!TARGET_EMBEDDED_PIC \
2345: || code1 != CONST \
2346: || GET_CODE (XEXP (xplus1, 0)) != MINUS)) \
1.1 root 2347: goto ADDR; \
2348: } \
2349: } \
2350: \
2351: if (TARGET_DEBUG_B_MODE) \
2352: GO_PRINTF ("Not a legitimate address\n"); \
2353: }
2354:
2355:
2356: /* A C expression that is 1 if the RTX X is a constant which is a
2357: valid address. This is defined to be the same as `CONSTANT_P (X)',
2358: but rejecting CONST_DOUBLE. */
1.1.1.3 root 2359: /* When pic, we must reject addresses of the form symbol+large int.
2360: This is because an instruction `sw $4,s+70000' needs to be converted
2361: by the assembler to `lw $at,s($gp);sw $4,70000($at)'. Normally the
2362: assembler would use $at as a temp to load in the large offset. In this
2363: case $at is already in use. We convert such problem addresses to
2364: `la $5,s;sw $4,70000($5)' via LEGITIMIZE_ADDRESS. */
1.1.1.4 ! root 2365: /* ??? SGI Irix 6 assembler fails for CONST address, so reject them. */
1.1 root 2366: #define CONSTANT_ADDRESS_P(X) \
2367: ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1.1.1.3 root 2368: || GET_CODE (X) == CONST_INT || GET_CODE (X) == HIGH \
2369: || (GET_CODE (X) == CONST \
1.1.1.4 ! root 2370: && ! (flag_pic && pic_address_needs_scratch (X)) \
! 2371: && ! ABI_64BIT)) \
1.1.1.3 root 2372: && (!HALF_PIC_P () || !HALF_PIC_ADDRESS_P (X)))
1.1 root 2373:
1.1.1.3 root 2374: /* Define this, so that when PIC, reload won't try to reload invalid
2375: addresses which require two reload registers. */
2376:
2377: #define LEGITIMATE_PIC_OPERAND_P(X) (! pic_address_needs_scratch (X))
1.1 root 2378:
2379: /* Nonzero if the constant value X is a legitimate general operand.
2380: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
2381:
2382: At present, GAS doesn't understand li.[sd], so don't allow it
2383: to be generated at present. Also, the MIPS assembler does not
2384: grok li.d Infinity. */
2385:
1.1.1.4 ! root 2386: /* ??? SGI Irix 6 assembler fails for CONST address, so reject them. */
1.1 root 2387: #define LEGITIMATE_CONSTANT_P(X) \
1.1.1.4 ! root 2388: ((GET_CODE (X) != CONST_DOUBLE \
! 2389: || mips_const_double_ok (X, GET_MODE (X))) \
! 2390: && ! (GET_CODE (X) == CONST && ABI_64BIT))
1.1 root 2391:
2392: /* A C compound statement that attempts to replace X with a valid
2393: memory address for an operand of mode MODE. WIN will be a C
2394: statement label elsewhere in the code; the macro definition may
2395: use
2396:
2397: GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN);
2398:
2399: to avoid further processing if the address has become legitimate.
2400:
2401: X will always be the result of a call to `break_out_memory_refs',
2402: and OLDX will be the operand that was given to that function to
2403: produce X.
2404:
2405: The code generated by this macro should not alter the
2406: substructure of X. If it transforms X into a more legitimate
2407: form, it should assign X (which will always be a C variable) a
2408: new value.
2409:
2410: It is not necessary for this macro to come up with a legitimate
2411: address. The compiler has standard ways of doing so in all
2412: cases. In fact, it is safe for this macro to do nothing. But
2413: often a machine-dependent strategy can generate better code.
2414:
2415: For the MIPS, transform:
2416:
2417: memory(X + <large int>)
2418:
2419: into:
2420:
2421: Y = <large int> & ~0x7fff;
2422: Z = X + Y
2423: memory (Z + (<large int> & 0x7fff));
2424:
1.1.1.3 root 2425: This is for CSE to find several similar references, and only use one Z.
2426:
2427: When PIC, convert addresses of the form memory (symbol+large int) to
2428: memory (reg+large int). */
2429:
1.1 root 2430:
2431: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
2432: { \
2433: register rtx xinsn = (X); \
2434: \
2435: if (TARGET_DEBUG_B_MODE) \
2436: { \
2437: GO_PRINTF ("\n========== LEGITIMIZE_ADDRESS\n"); \
2438: GO_DEBUG_RTX (xinsn); \
2439: } \
2440: \
1.1.1.4 ! root 2441: if (GET_CODE (xinsn) == CONST \
! 2442: && ((flag_pic && pic_address_needs_scratch (xinsn)) \
! 2443: /* ??? SGI's Irix 6 assembler can't handle CONST. */ \
! 2444: || ABI_64BIT)) \
! 2445: { \
! 2446: rtx ptr_reg = gen_reg_rtx (Pmode); \
! 2447: rtx constant = XEXP (XEXP (xinsn, 0), 1); \
! 2448: \
! 2449: emit_move_insn (ptr_reg, XEXP (XEXP (xinsn, 0), 0)); \
! 2450: \
! 2451: X = gen_rtx (PLUS, Pmode, ptr_reg, constant); \
! 2452: if (SMALL_INT (constant)) \
! 2453: goto WIN; \
! 2454: /* Otherwise we fall through so the code below will fix the \
! 2455: constant. */ \
! 2456: xinsn = X; \
! 2457: } \
! 2458: \
1.1 root 2459: if (GET_CODE (xinsn) == PLUS) \
2460: { \
2461: register rtx xplus0 = XEXP (xinsn, 0); \
2462: register rtx xplus1 = XEXP (xinsn, 1); \
2463: register enum rtx_code code0 = GET_CODE (xplus0); \
2464: register enum rtx_code code1 = GET_CODE (xplus1); \
2465: \
2466: if (code0 != REG && code1 == REG) \
2467: { \
2468: xplus0 = XEXP (xinsn, 1); \
2469: xplus1 = XEXP (xinsn, 0); \
2470: code0 = GET_CODE (xplus0); \
2471: code1 = GET_CODE (xplus1); \
2472: } \
2473: \
2474: if (code0 == REG && REG_OK_FOR_BASE_P (xplus0) \
2475: && code1 == CONST_INT && !SMALL_INT (xplus1)) \
2476: { \
2477: rtx int_reg = gen_reg_rtx (Pmode); \
2478: rtx ptr_reg = gen_reg_rtx (Pmode); \
2479: \
2480: emit_move_insn (int_reg, \
2481: GEN_INT (INTVAL (xplus1) & ~ 0x7fff)); \
2482: \
2483: emit_insn (gen_rtx (SET, VOIDmode, \
2484: ptr_reg, \
2485: gen_rtx (PLUS, Pmode, xplus0, int_reg))); \
2486: \
2487: X = gen_rtx (PLUS, Pmode, ptr_reg, \
2488: GEN_INT (INTVAL (xplus1) & 0x7fff)); \
2489: goto WIN; \
2490: } \
2491: } \
2492: \
2493: if (TARGET_DEBUG_B_MODE) \
2494: GO_PRINTF ("LEGITIMIZE_ADDRESS could not fix.\n"); \
2495: }
2496:
2497:
2498: /* A C statement or compound statement with a conditional `goto
2499: LABEL;' executed if memory address X (an RTX) can have different
2500: meanings depending on the machine mode of the memory reference it
2501: is used for.
2502:
2503: Autoincrement and autodecrement addresses typically have
2504: mode-dependent effects because the amount of the increment or
2505: decrement is the size of the operand being addressed. Some
2506: machines have other mode-dependent addresses. Many RISC machines
2507: have no mode-dependent addresses.
2508:
2509: You may assume that ADDR is a valid address for the machine. */
2510:
2511: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {}
2512:
2513:
2514: /* Define this macro if references to a symbol must be treated
2515: differently depending on something about the variable or
2516: function named by the symbol (such as what section it is in).
2517:
2518: The macro definition, if any, is executed immediately after the
2519: rtl for DECL has been created and stored in `DECL_RTL (DECL)'.
2520: The value of the rtl will be a `mem' whose address is a
2521: `symbol_ref'.
2522:
2523: The usual thing for this macro to do is to a flag in the
2524: `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
2525: name string in the `symbol_ref' (if one bit is not enough
2526: information).
2527:
2528: The best way to modify the name string is by adding text to the
2529: beginning, with suitable punctuation to prevent any ambiguity.
2530: Allocate the new name in `saveable_obstack'. You will have to
2531: modify `ASM_OUTPUT_LABELREF' to remove and decode the added text
2532: and output the name accordingly.
2533:
2534: You can also check the information stored in the `symbol_ref' in
2535: the definition of `GO_IF_LEGITIMATE_ADDRESS' or
2536: `PRINT_OPERAND_ADDRESS'. */
2537:
2538: #define ENCODE_SECTION_INFO(DECL) \
2539: do \
2540: { \
1.1.1.3 root 2541: if (TARGET_EMBEDDED_PIC) \
2542: { \
2543: if (TREE_CODE (DECL) == VAR_DECL) \
2544: SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \
2545: else if (TREE_CODE (DECL) == FUNCTION_DECL) \
2546: SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 0; \
2547: else if (TREE_CODE (DECL) == STRING_CST \
2548: && ! flag_writable_strings) \
2549: SYMBOL_REF_FLAG (XEXP (TREE_CST_RTL (DECL), 0)) = 0; \
2550: else \
2551: SYMBOL_REF_FLAG (XEXP (TREE_CST_RTL (DECL), 0)) = 1; \
2552: } \
2553: \
2554: else if (TARGET_GP_OPT && TREE_CODE (DECL) == VAR_DECL) \
1.1 root 2555: { \
2556: int size = int_size_in_bytes (TREE_TYPE (DECL)); \
2557: \
2558: if (size > 0 && size <= mips_section_threshold) \
2559: SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \
2560: } \
2561: \
2562: else if (HALF_PIC_P ()) \
2563: HALF_PIC_ENCODE (DECL); \
2564: } \
2565: while (0)
2566:
2567:
2568: /* Specify the machine mode that this machine uses
2569: for the index in the tablejump instruction. */
1.1.1.3 root 2570: #define CASE_VECTOR_MODE (TARGET_LONG64 ? DImode : SImode)
1.1 root 2571:
2572: /* Define this if the tablejump instruction expects the table
2573: to contain offsets from the address of the table.
2574: Do not define this if the table should contain absolute addresses. */
2575: /* #define CASE_VECTOR_PC_RELATIVE */
2576:
2577: /* Specify the tree operation to be used to convert reals to integers. */
2578: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
2579:
2580: /* This is the kind of divide that is easiest to do in the general case. */
2581: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
2582:
2583: /* Define this as 1 if `char' should by default be signed; else as 0. */
2584: #ifndef DEFAULT_SIGNED_CHAR
2585: #define DEFAULT_SIGNED_CHAR 1
2586: #endif
2587:
2588: /* Max number of bytes we can move from memory to memory
2589: in one reasonably fast instruction. */
1.1.1.3 root 2590: #define MOVE_MAX (TARGET_64BIT ? 8 : 4)
2591: #define MAX_MOVE_MAX 8
1.1 root 2592:
2593: /* Define this macro as a C expression which is nonzero if
2594: accessing less than a word of memory (i.e. a `char' or a
2595: `short') is no faster than accessing a word of memory, i.e., if
2596: such access require more than one instruction or if there is no
2597: difference in cost between byte and (aligned) word loads.
2598:
2599: On RISC machines, it tends to generate better code to define
2600: this as 1, since it avoids making a QI or HI mode register. */
2601: #define SLOW_BYTE_ACCESS 1
2602:
2603: /* We assume that the store-condition-codes instructions store 0 for false
2604: and some other value for true. This is the value stored for true. */
2605:
2606: #define STORE_FLAG_VALUE 1
2607:
2608: /* Define this if zero-extension is slow (more than one real instruction). */
2609: #define SLOW_ZERO_EXTEND
2610:
1.1.1.2 root 2611: /* Define this to be nonzero if shift instructions ignore all but the low-order
2612: few bits. */
2613: #define SHIFT_COUNT_TRUNCATED 1
1.1 root 2614:
2615: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
2616: is done just by pretending it is already truncated. */
1.1.1.3 root 2617: /* In 64 bit mode, 32 bit instructions require that register values be properly
2618: sign-extended to 64 bits. As a result, a truncate is not a no-op if it
2619: converts a value >32 bits to a value <32 bits. */
2620: /* ??? This results in inefficient code for 64 bit to 32 conversions.
2621: Something needs to be done about this. Perhaps not use any 32 bit
2622: instructions? Perhaps use PROMOTE_MODE? */
2623: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) \
2624: (TARGET_64BIT ? ((INPREC) <= 32 || (OUTPREC) > 32) : 1)
1.1 root 2625:
2626: /* Define this macro to control use of the character `$' in
2627: identifier names. The value should be 0, 1, or 2. 0 means `$'
2628: is not allowed by default; 1 means it is allowed by default if
2629: `-traditional' is used; 2 means it is allowed by default provided
2630: `-ansi' is not used. 1 is the default; there is no need to
2631: define this macro in that case. */
2632:
2633: #ifndef DOLLARS_IN_IDENTIFIERS
2634: #define DOLLARS_IN_IDENTIFIERS 1
2635: #endif
2636:
2637: /* Specify the machine mode that pointers have.
2638: After generation of rtl, the compiler makes no further distinction
2639: between pointers and any other objects of this machine mode. */
1.1.1.3 root 2640:
2641: #define Pmode (TARGET_LONG64 ? DImode : SImode)
1.1 root 2642:
2643: /* A function address in a call instruction
2644: is a word address (for indexing purposes)
2645: so give the MEM rtx a words's mode. */
2646:
1.1.1.3 root 2647: #define FUNCTION_MODE (TARGET_LONG64 ? DImode : SImode)
1.1 root 2648:
2649: /* Define TARGET_MEM_FUNCTIONS if we want to use calls to memcpy and
2650: memset, instead of the BSD functions bcopy and bzero. */
2651:
2652: #if defined(MIPS_SYSV) || defined(OSF_OS)
2653: #define TARGET_MEM_FUNCTIONS
2654: #endif
2655:
2656:
2657: /* A part of a C `switch' statement that describes the relative
2658: costs of constant RTL expressions. It must contain `case'
2659: labels for expression codes `const_int', `const', `symbol_ref',
2660: `label_ref' and `const_double'. Each case must ultimately reach
2661: a `return' statement to return the relative cost of the use of
2662: that kind of constant value in an expression. The cost may
2663: depend on the precise value of the constant, which is available
2664: for examination in X.
2665:
2666: CODE is the expression code--redundant, since it can be obtained
2667: with `GET_CODE (X)'. */
2668:
2669: #define CONST_COSTS(X,CODE,OUTER_CODE) \
2670: case CONST_INT: \
2671: /* Always return 0, since we don't have different sized \
2672: instructions, hence different costs according to Richard \
2673: Kenner */ \
1.1.1.3 root 2674: return 0; \
1.1 root 2675: \
2676: case LABEL_REF: \
2677: return COSTS_N_INSNS (2); \
2678: \
2679: case CONST: \
2680: { \
2681: rtx offset = const0_rtx; \
1.1.1.3 root 2682: rtx symref = eliminate_constant_term (XEXP (X, 0), &offset); \
1.1 root 2683: \
2684: if (GET_CODE (symref) == LABEL_REF) \
2685: return COSTS_N_INSNS (2); \
2686: \
2687: if (GET_CODE (symref) != SYMBOL_REF) \
2688: return COSTS_N_INSNS (4); \
2689: \
2690: /* let's be paranoid.... */ \
2691: if (INTVAL (offset) < -32768 || INTVAL (offset) > 32767) \
2692: return COSTS_N_INSNS (2); \
2693: \
2694: return COSTS_N_INSNS (SYMBOL_REF_FLAG (symref) ? 1 : 2); \
2695: } \
2696: \
2697: case SYMBOL_REF: \
2698: return COSTS_N_INSNS (SYMBOL_REF_FLAG (X) ? 1 : 2); \
2699: \
2700: case CONST_DOUBLE: \
1.1.1.4 ! root 2701: { \
! 2702: rtx high, low; \
! 2703: split_double (X, &high, &low); \
! 2704: return COSTS_N_INSNS ((high == CONST0_RTX (GET_MODE (high)) \
! 2705: || low == CONST0_RTX (GET_MODE (low))) \
! 2706: ? 2 : 4); \
! 2707: }
1.1 root 2708:
2709: /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
2710: This can be used, for example, to indicate how costly a multiply
2711: instruction is. In writing this macro, you can use the construct
2712: `COSTS_N_INSNS (N)' to specify a cost equal to N fast instructions.
2713:
2714: This macro is optional; do not define it if the default cost
2715: assumptions are adequate for the target machine.
2716:
2717: If -mdebugd is used, change the multiply cost to 2, so multiply by
2718: a constant isn't converted to a series of shifts. This helps
2719: strength reduction, and also makes it easier to identify what the
2720: compiler is doing. */
2721:
1.1.1.4 ! root 2722: /* ??? Fix this to be right for the R8000. */
1.1 root 2723: #define RTX_COSTS(X,CODE,OUTER_CODE) \
2724: case MEM: \
2725: { \
2726: int num_words = (GET_MODE_SIZE (GET_MODE (X)) > UNITS_PER_WORD) ? 2 : 1; \
2727: if (simple_memory_operand (X, GET_MODE (X))) \
2728: return COSTS_N_INSNS (num_words); \
2729: \
2730: return COSTS_N_INSNS (2*num_words); \
2731: } \
2732: \
2733: case FFS: \
2734: return COSTS_N_INSNS (6); \
2735: \
2736: case NOT: \
1.1.1.3 root 2737: return COSTS_N_INSNS ((GET_MODE (X) == DImode && !TARGET_64BIT) ? 2 : 1); \
1.1 root 2738: \
2739: case AND: \
2740: case IOR: \
2741: case XOR: \
1.1.1.3 root 2742: if (GET_MODE (X) == DImode && !TARGET_64BIT) \
1.1 root 2743: return COSTS_N_INSNS (2); \
2744: \
2745: return COSTS_N_INSNS (1); \
2746: \
2747: case ASHIFT: \
2748: case ASHIFTRT: \
2749: case LSHIFTRT: \
1.1.1.3 root 2750: if (GET_MODE (X) == DImode && !TARGET_64BIT) \
2751: return COSTS_N_INSNS ((GET_CODE (XEXP (X, 1)) == CONST_INT) ? 4 : 12); \
1.1 root 2752: \
2753: return COSTS_N_INSNS (1); \
2754: \
2755: case ABS: \
2756: { \
2757: enum machine_mode xmode = GET_MODE (X); \
2758: if (xmode == SFmode || xmode == DFmode) \
2759: return COSTS_N_INSNS (1); \
2760: \
2761: return COSTS_N_INSNS (4); \
2762: } \
2763: \
2764: case PLUS: \
2765: case MINUS: \
2766: { \
2767: enum machine_mode xmode = GET_MODE (X); \
2768: if (xmode == SFmode || xmode == DFmode) \
1.1.1.3 root 2769: { \
2770: if (mips_cpu == PROCESSOR_R3000) \
2771: return COSTS_N_INSNS (2); \
2772: else if (mips_cpu == PROCESSOR_R6000) \
2773: return COSTS_N_INSNS (3); \
2774: else \
2775: return COSTS_N_INSNS (6); \
2776: } \
1.1 root 2777: \
1.1.1.3 root 2778: if (xmode == DImode && !TARGET_64BIT) \
1.1 root 2779: return COSTS_N_INSNS (4); \
2780: \
2781: return COSTS_N_INSNS (1); \
2782: } \
2783: \
2784: case NEG: \
1.1.1.3 root 2785: return COSTS_N_INSNS ((GET_MODE (X) == DImode && !TARGET_64BIT) ? 4 : 1); \
1.1 root 2786: \
2787: case MULT: \
2788: { \
2789: enum machine_mode xmode = GET_MODE (X); \
2790: if (xmode == SFmode) \
1.1.1.3 root 2791: { \
2792: if (mips_cpu == PROCESSOR_R3000) \
2793: return COSTS_N_INSNS (4); \
2794: else if (mips_cpu == PROCESSOR_R6000) \
2795: return COSTS_N_INSNS (5); \
2796: else \
2797: return COSTS_N_INSNS (7); \
2798: } \
1.1 root 2799: \
2800: if (xmode == DFmode) \
1.1.1.3 root 2801: { \
2802: if (mips_cpu == PROCESSOR_R3000) \
2803: return COSTS_N_INSNS (5); \
2804: else if (mips_cpu == PROCESSOR_R6000) \
2805: return COSTS_N_INSNS (6); \
2806: else \
2807: return COSTS_N_INSNS (8); \
2808: } \
1.1 root 2809: \
1.1.1.3 root 2810: if (mips_cpu == PROCESSOR_R3000) \
2811: return COSTS_N_INSNS (12); \
2812: else if (mips_cpu == PROCESSOR_R6000) \
2813: return COSTS_N_INSNS (17); \
2814: else \
2815: return COSTS_N_INSNS (10); \
1.1 root 2816: } \
2817: \
2818: case DIV: \
2819: case MOD: \
2820: { \
2821: enum machine_mode xmode = GET_MODE (X); \
2822: if (xmode == SFmode) \
1.1.1.3 root 2823: { \
2824: if (mips_cpu == PROCESSOR_R3000) \
2825: return COSTS_N_INSNS (12); \
2826: else if (mips_cpu == PROCESSOR_R6000) \
2827: return COSTS_N_INSNS (15); \
2828: else \
2829: return COSTS_N_INSNS (23); \
2830: } \
1.1 root 2831: \
2832: if (xmode == DFmode) \
1.1.1.3 root 2833: { \
2834: if (mips_cpu == PROCESSOR_R3000) \
2835: return COSTS_N_INSNS (19); \
2836: else if (mips_cpu == PROCESSOR_R6000) \
2837: return COSTS_N_INSNS (16); \
2838: else \
2839: return COSTS_N_INSNS (36); \
2840: } \
1.1 root 2841: } \
2842: /* fall through */ \
2843: \
2844: case UDIV: \
2845: case UMOD: \
1.1.1.3 root 2846: if (mips_cpu == PROCESSOR_R3000) \
2847: return COSTS_N_INSNS (35); \
2848: else if (mips_cpu == PROCESSOR_R6000) \
2849: return COSTS_N_INSNS (38); \
2850: else \
2851: return COSTS_N_INSNS (69);
1.1 root 2852:
2853: /* An expression giving the cost of an addressing mode that
2854: contains ADDRESS. If not defined, the cost is computed from the
2855: form of the ADDRESS expression and the `CONST_COSTS' values.
2856:
2857: For most CISC machines, the default cost is a good approximation
2858: of the true cost of the addressing mode. However, on RISC
2859: machines, all instructions normally have the same length and
2860: execution time. Hence all addresses will have equal costs.
2861:
2862: In cases where more than one form of an address is known, the
2863: form with the lowest cost will be used. If multiple forms have
2864: the same, lowest, cost, the one that is the most complex will be
2865: used.
2866:
2867: For example, suppose an address that is equal to the sum of a
2868: register and a constant is used twice in the same basic block.
2869: When this macro is not defined, the address will be computed in
2870: a register and memory references will be indirect through that
2871: register. On machines where the cost of the addressing mode
2872: containing the sum is no higher than that of a simple indirect
2873: reference, this will produce an additional instruction and
2874: possibly require an additional register. Proper specification
2875: of this macro eliminates this overhead for such machines.
2876:
2877: Similar use of this macro is made in strength reduction of loops.
2878:
2879: ADDRESS need not be valid as an address. In such a case, the
2880: cost is not relevant and can be any value; invalid addresses
2881: need not be assigned a different cost.
2882:
2883: On machines where an address involving more than one register is
2884: as cheap as an address computation involving only one register,
2885: defining `ADDRESS_COST' to reflect this can cause two registers
2886: to be live over a region of code where only one would have been
2887: if `ADDRESS_COST' were not defined in that manner. This effect
2888: should be considered in the definition of this macro.
2889: Equivalent costs should probably only be given to addresses with
2890: different numbers of registers on machines with lots of registers.
2891:
2892: This macro will normally either not be defined or be defined as
2893: a constant. */
2894:
2895: #define ADDRESS_COST(ADDR) (REG_P (ADDR) ? 1 : mips_address_cost (ADDR))
2896:
2897: /* A C expression for the cost of moving data from a register in
2898: class FROM to one in class TO. The classes are expressed using
2899: the enumeration values such as `GENERAL_REGS'. A value of 2 is
2900: the default; other values are interpreted relative to that.
2901:
2902: It is not required that the cost always equal 2 when FROM is the
2903: same as TO; on some machines it is expensive to move between
2904: registers if they are not general registers.
2905:
2906: If reload sees an insn consisting of a single `set' between two
2907: hard registers, and if `REGISTER_MOVE_COST' applied to their
2908: classes returns a value of 2, reload does not check to ensure
2909: that the constraints of the insn are met. Setting a cost of
2910: other than 2 will allow reload to verify that the constraints are
2911: met. You should do this if the `movM' pattern's constraints do
2912: not allow such copying. */
2913:
1.1.1.3 root 2914: #define REGISTER_MOVE_COST(FROM, TO) \
2915: ((FROM) == GR_REGS && (TO) == GR_REGS ? 2 \
2916: : (FROM) == FP_REGS && (TO) == FP_REGS ? 2 \
2917: : (FROM) == GR_REGS && (TO) == FP_REGS ? 4 \
2918: : (FROM) == FP_REGS && (TO) == GR_REGS ? 4 \
1.1.1.4 ! root 2919: : (((FROM) == HI_REG || (FROM) == LO_REG \
! 2920: || (FROM) == MD_REGS || (FROM) == HILO_REG) \
! 2921: && (TO) == GR_REGS) ? 6 \
! 2922: : (((TO) == HI_REG || (TO) == LO_REG \
! 2923: || (TO) == MD_REGS || (FROM) == HILO_REG) \
! 2924: && (FROM) == GR_REGS) ? 6 \
! 2925: : 12)
1.1.1.3 root 2926:
1.1.1.4 ! root 2927: /* ??? Fix this to be right for the R8000. */
1.1.1.3 root 2928: #define MEMORY_MOVE_COST(MODE) \
2929: ((mips_cpu == PROCESSOR_R4000 || mips_cpu == PROCESSOR_R6000) ? 6 : 4)
1.1 root 2930:
2931: /* A C expression for the cost of a branch instruction. A value of
2932: 1 is the default; other values are interpreted relative to that. */
2933:
1.1.1.4 ! root 2934: /* ??? Fix this to be right for the R8000. */
1.1 root 2935: #define BRANCH_COST \
2936: ((mips_cpu == PROCESSOR_R4000 || mips_cpu == PROCESSOR_R6000) ? 2 : 1)
2937:
1.1.1.3 root 2938: /* A C statement (sans semicolon) to update the integer variable COST
2939: based on the relationship between INSN that is dependent on
2940: DEP_INSN through the dependence LINK. The default is to make no
2941: adjustment to COST. On the MIPS, ignore the cost of anti- and
2942: output-dependencies. */
2943:
2944: #define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \
2945: if (REG_NOTE_KIND (LINK) != 0) \
2946: (COST) = 0; /* Anti or output dependence. */
1.1 root 2947:
2948: /* Optionally define this if you have added predicates to
2949: `MACHINE.c'. This macro is called within an initializer of an
2950: array of structures. The first field in the structure is the
2951: name of a predicate and the second field is an array of rtl
2952: codes. For each predicate, list all rtl codes that can be in
2953: expressions matched by the predicate. The list should have a
2954: trailing comma. Here is an example of two entries in the list
2955: for a typical RISC machine:
2956:
2957: #define PREDICATE_CODES \
2958: {"gen_reg_rtx_operand", {SUBREG, REG}}, \
2959: {"reg_or_short_cint_operand", {SUBREG, REG, CONST_INT}},
2960:
2961: Defining this macro does not affect the generated code (however,
2962: incorrect definitions that omit an rtl code that may be matched
2963: by the predicate can cause the compiler to malfunction).
2964: Instead, it allows the table built by `genrecog' to be more
2965: compact and efficient, thus speeding up the compiler. The most
2966: important predicates to include in the list specified by this
2967: macro are thoses used in the most insn patterns. */
2968:
2969: #define PREDICATE_CODES \
2970: {"uns_arith_operand", { REG, CONST_INT, SUBREG }}, \
2971: {"arith_operand", { REG, CONST_INT, SUBREG }}, \
2972: {"arith32_operand", { REG, CONST_INT, SUBREG }}, \
2973: {"reg_or_0_operand", { REG, CONST_INT, SUBREG }}, \
2974: {"small_int", { CONST_INT }}, \
2975: {"large_int", { CONST_INT }}, \
2976: {"mips_const_double_ok", { CONST_DOUBLE }}, \
2977: {"simple_memory_operand", { MEM, SUBREG }}, \
2978: {"equality_op", { EQ, NE }}, \
2979: {"cmp_op", { EQ, NE, GT, GE, GTU, GEU, LT, LE, \
2980: LTU, LEU }}, \
1.1.1.2 root 2981: {"pc_or_label_operand", { PC, LABEL_REF }}, \
2982: {"call_insn_operand", { MEM }}, \
1.1 root 2983:
2984:
2985: /* If defined, a C statement to be executed just prior to the
2986: output of assembler code for INSN, to modify the extracted
2987: operands so they will be output differently.
2988:
2989: Here the argument OPVEC is the vector containing the operands
2990: extracted from INSN, and NOPERANDS is the number of elements of
2991: the vector which contain meaningful data for this insn. The
2992: contents of this vector are what will be used to convert the
2993: insn template into assembler code, so you can change the
2994: assembler output by changing the contents of the vector.
2995:
2996: We use it to check if the current insn needs a nop in front of it
2997: because of load delays, and also to update the delay slot
2998: statistics. */
2999:
3000: #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \
3001: final_prescan_insn (INSN, OPVEC, NOPERANDS)
3002:
3003:
3004: /* Tell final.c how to eliminate redundant test instructions.
3005: Here we define machine-dependent flags and fields in cc_status
3006: (see `conditions.h'). */
3007:
3008: /* A list of names to be used for additional modes for condition code
3009: values in registers. These names are added to `enum machine_mode'
3010: and all have class `MODE_CC'. By convention, they should start
3011: with `CC' and end with `mode'.
3012:
3013: You should only define this macro if your machine does not use
3014: `cc0' and only if additional modes are required.
3015:
3016: On the MIPS, we use CC_FPmode for all floating point except for not
3017: equal, CC_REV_FPmode for not equal (to reverse the sense of the
3018: jump), CC_EQmode for integer equality/inequality comparisons,
3019: CC_0mode for comparisons against 0, and CCmode for other integer
3020: comparisons. */
3021:
3022: #define EXTRA_CC_MODES CC_EQmode, CC_FPmode, CC_0mode, CC_REV_FPmode
3023:
3024: /* A list of C strings giving the names for the modes listed in
3025: `EXTRA_CC_MODES'. */
3026:
3027: #define EXTRA_CC_NAMES "CC_EQ", "CC_FP", "CC_0", "CC_REV_FP"
3028:
3029: /* Returns a mode from class `MODE_CC' to be used when comparison
3030: operation code OP is applied to rtx X. */
3031:
3032: #define SELECT_CC_MODE(OP, X, Y) \
3033: (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
3034: ? SImode \
3035: : ((OP == NE) ? CC_REV_FPmode : CC_FPmode))
3036:
3037:
3038: /* Control the assembler format that we output. */
3039:
3040: /* Output at beginning of assembler file.
3041: If we are optimizing to use the global pointer, create a temporary
3042: file to hold all of the text stuff, and write it out to the end.
3043: This is needed because the MIPS assembler is evidently one pass,
3044: and if it hasn't seen the relevant .comm/.lcomm/.extern/.sdata
3045: declaration when the code is processed, it generates a two
3046: instruction sequence. */
3047:
3048: #define ASM_FILE_START(STREAM) mips_asm_file_start (STREAM)
3049:
3050: /* Output to assembler file text saying following lines
3051: may contain character constants, extra white space, comments, etc. */
3052:
3053: #define ASM_APP_ON " #APP\n"
3054:
3055: /* Output to assembler file text saying following lines
3056: no longer contain unusual constructs. */
3057:
3058: #define ASM_APP_OFF " #NO_APP\n"
3059:
3060: /* How to refer to registers in assembler output.
3061: This sequence is indexed by compiler's hard-register-number (see above).
3062:
3063: In order to support the two different conventions for register names,
3064: we use the name of a table set up in mips.c, which is overwritten
3065: if -mrnames is used. */
3066:
3067: #define REGISTER_NAMES \
3068: { \
3069: &mips_reg_names[ 0][0], \
3070: &mips_reg_names[ 1][0], \
3071: &mips_reg_names[ 2][0], \
3072: &mips_reg_names[ 3][0], \
3073: &mips_reg_names[ 4][0], \
3074: &mips_reg_names[ 5][0], \
3075: &mips_reg_names[ 6][0], \
3076: &mips_reg_names[ 7][0], \
3077: &mips_reg_names[ 8][0], \
3078: &mips_reg_names[ 9][0], \
3079: &mips_reg_names[10][0], \
3080: &mips_reg_names[11][0], \
3081: &mips_reg_names[12][0], \
3082: &mips_reg_names[13][0], \
3083: &mips_reg_names[14][0], \
3084: &mips_reg_names[15][0], \
3085: &mips_reg_names[16][0], \
3086: &mips_reg_names[17][0], \
3087: &mips_reg_names[18][0], \
3088: &mips_reg_names[19][0], \
3089: &mips_reg_names[20][0], \
3090: &mips_reg_names[21][0], \
3091: &mips_reg_names[22][0], \
3092: &mips_reg_names[23][0], \
3093: &mips_reg_names[24][0], \
3094: &mips_reg_names[25][0], \
3095: &mips_reg_names[26][0], \
3096: &mips_reg_names[27][0], \
3097: &mips_reg_names[28][0], \
3098: &mips_reg_names[29][0], \
3099: &mips_reg_names[30][0], \
3100: &mips_reg_names[31][0], \
3101: &mips_reg_names[32][0], \
3102: &mips_reg_names[33][0], \
3103: &mips_reg_names[34][0], \
3104: &mips_reg_names[35][0], \
3105: &mips_reg_names[36][0], \
3106: &mips_reg_names[37][0], \
3107: &mips_reg_names[38][0], \
3108: &mips_reg_names[39][0], \
3109: &mips_reg_names[40][0], \
3110: &mips_reg_names[41][0], \
3111: &mips_reg_names[42][0], \
3112: &mips_reg_names[43][0], \
3113: &mips_reg_names[44][0], \
3114: &mips_reg_names[45][0], \
3115: &mips_reg_names[46][0], \
3116: &mips_reg_names[47][0], \
3117: &mips_reg_names[48][0], \
3118: &mips_reg_names[49][0], \
3119: &mips_reg_names[50][0], \
3120: &mips_reg_names[51][0], \
3121: &mips_reg_names[52][0], \
3122: &mips_reg_names[53][0], \
3123: &mips_reg_names[54][0], \
3124: &mips_reg_names[55][0], \
3125: &mips_reg_names[56][0], \
3126: &mips_reg_names[57][0], \
3127: &mips_reg_names[58][0], \
3128: &mips_reg_names[59][0], \
3129: &mips_reg_names[60][0], \
3130: &mips_reg_names[61][0], \
3131: &mips_reg_names[62][0], \
3132: &mips_reg_names[63][0], \
3133: &mips_reg_names[64][0], \
3134: &mips_reg_names[65][0], \
3135: &mips_reg_names[66][0], \
1.1.1.4 ! root 3136: &mips_reg_names[67][0], \
1.1 root 3137: }
3138:
3139: /* print-rtl.c can't use REGISTER_NAMES, since it depends on mips.c.
3140: So define this for it. */
3141: #define DEBUG_REGISTER_NAMES \
3142: { \
3143: "$0", "at", "v0", "v1", "a0", "a1", "a2", "a3", \
3144: "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \
3145: "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
3146: "t8", "t9", "k0", "k1", "gp", "sp", "$fp", "ra", \
3147: "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", \
3148: "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
3149: "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", \
3150: "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", \
1.1.1.4 ! root 3151: "hi", "lo", "accum","$fcr31" \
1.1 root 3152: }
3153:
3154: /* If defined, a C initializer for an array of structures
3155: containing a name and a register number. This macro defines
3156: additional names for hard registers, thus allowing the `asm'
3157: option in declarations to refer to registers using alternate
3158: names.
3159:
3160: We define both names for the integer registers here. */
3161:
3162: #define ADDITIONAL_REGISTER_NAMES \
3163: { \
3164: { "$0", 0 + GP_REG_FIRST }, \
3165: { "$1", 1 + GP_REG_FIRST }, \
3166: { "$2", 2 + GP_REG_FIRST }, \
3167: { "$3", 3 + GP_REG_FIRST }, \
3168: { "$4", 4 + GP_REG_FIRST }, \
3169: { "$5", 5 + GP_REG_FIRST }, \
3170: { "$6", 6 + GP_REG_FIRST }, \
3171: { "$7", 7 + GP_REG_FIRST }, \
3172: { "$8", 8 + GP_REG_FIRST }, \
3173: { "$9", 9 + GP_REG_FIRST }, \
3174: { "$10", 10 + GP_REG_FIRST }, \
3175: { "$11", 11 + GP_REG_FIRST }, \
3176: { "$12", 12 + GP_REG_FIRST }, \
3177: { "$13", 13 + GP_REG_FIRST }, \
3178: { "$14", 14 + GP_REG_FIRST }, \
3179: { "$15", 15 + GP_REG_FIRST }, \
3180: { "$16", 16 + GP_REG_FIRST }, \
3181: { "$17", 17 + GP_REG_FIRST }, \
3182: { "$18", 18 + GP_REG_FIRST }, \
3183: { "$19", 19 + GP_REG_FIRST }, \
3184: { "$20", 20 + GP_REG_FIRST }, \
3185: { "$21", 21 + GP_REG_FIRST }, \
3186: { "$22", 22 + GP_REG_FIRST }, \
3187: { "$23", 23 + GP_REG_FIRST }, \
3188: { "$24", 24 + GP_REG_FIRST }, \
3189: { "$25", 25 + GP_REG_FIRST }, \
3190: { "$26", 26 + GP_REG_FIRST }, \
3191: { "$27", 27 + GP_REG_FIRST }, \
3192: { "$28", 28 + GP_REG_FIRST }, \
3193: { "$29", 29 + GP_REG_FIRST }, \
3194: { "$30", 30 + GP_REG_FIRST }, \
3195: { "$31", 31 + GP_REG_FIRST }, \
3196: { "$sp", 29 + GP_REG_FIRST }, \
3197: { "$fp", 30 + GP_REG_FIRST }, \
3198: { "at", 1 + GP_REG_FIRST }, \
3199: { "v0", 2 + GP_REG_FIRST }, \
3200: { "v1", 3 + GP_REG_FIRST }, \
3201: { "a0", 4 + GP_REG_FIRST }, \
3202: { "a1", 5 + GP_REG_FIRST }, \
3203: { "a2", 6 + GP_REG_FIRST }, \
3204: { "a3", 7 + GP_REG_FIRST }, \
3205: { "t0", 8 + GP_REG_FIRST }, \
3206: { "t1", 9 + GP_REG_FIRST }, \
3207: { "t2", 10 + GP_REG_FIRST }, \
3208: { "t3", 11 + GP_REG_FIRST }, \
3209: { "t4", 12 + GP_REG_FIRST }, \
3210: { "t5", 13 + GP_REG_FIRST }, \
3211: { "t6", 14 + GP_REG_FIRST }, \
3212: { "t7", 15 + GP_REG_FIRST }, \
3213: { "s0", 16 + GP_REG_FIRST }, \
3214: { "s1", 17 + GP_REG_FIRST }, \
3215: { "s2", 18 + GP_REG_FIRST }, \
3216: { "s3", 19 + GP_REG_FIRST }, \
3217: { "s4", 20 + GP_REG_FIRST }, \
3218: { "s5", 21 + GP_REG_FIRST }, \
3219: { "s6", 22 + GP_REG_FIRST }, \
3220: { "s7", 23 + GP_REG_FIRST }, \
3221: { "t8", 24 + GP_REG_FIRST }, \
3222: { "t9", 25 + GP_REG_FIRST }, \
3223: { "k0", 26 + GP_REG_FIRST }, \
3224: { "k1", 27 + GP_REG_FIRST }, \
3225: { "gp", 28 + GP_REG_FIRST }, \
3226: { "sp", 29 + GP_REG_FIRST }, \
3227: { "fp", 30 + GP_REG_FIRST }, \
3228: { "ra", 31 + GP_REG_FIRST }, \
3229: { "$sp", 29 + GP_REG_FIRST }, \
3230: { "$fp", 30 + GP_REG_FIRST }, \
3231: { "cc", FPSW_REGNUM }, \
3232: }
3233:
3234: /* Define results of standard character escape sequences. */
3235: #define TARGET_BELL 007
3236: #define TARGET_BS 010
3237: #define TARGET_TAB 011
3238: #define TARGET_NEWLINE 012
3239: #define TARGET_VT 013
3240: #define TARGET_FF 014
3241: #define TARGET_CR 015
3242:
3243: /* A C compound statement to output to stdio stream STREAM the
3244: assembler syntax for an instruction operand X. X is an RTL
3245: expression.
3246:
3247: CODE is a value that can be used to specify one of several ways
3248: of printing the operand. It is used when identical operands
3249: must be printed differently depending on the context. CODE
3250: comes from the `%' specification that was used to request
3251: printing of the operand. If the specification was just `%DIGIT'
3252: then CODE is 0; if the specification was `%LTR DIGIT' then CODE
3253: is the ASCII code for LTR.
3254:
3255: If X is a register, this macro should print the register's name.
3256: The names can be found in an array `reg_names' whose type is
3257: `char *[]'. `reg_names' is initialized from `REGISTER_NAMES'.
3258:
3259: When the machine description has a specification `%PUNCT' (a `%'
3260: followed by a punctuation character), this macro is called with
3261: a null pointer for X and the punctuation character for CODE.
3262:
3263: See mips.c for the MIPS specific codes. */
3264:
3265: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
3266:
3267: /* A C expression which evaluates to true if CODE is a valid
3268: punctuation character for use in the `PRINT_OPERAND' macro. If
3269: `PRINT_OPERAND_PUNCT_VALID_P' is not defined, it means that no
3270: punctuation characters (except for the standard one, `%') are
3271: used in this way. */
3272:
3273: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) mips_print_operand_punct[CODE]
3274:
3275: /* A C compound statement to output to stdio stream STREAM the
3276: assembler syntax for an instruction operand that is a memory
3277: reference whose address is ADDR. ADDR is an RTL expression.
3278:
3279: On some machines, the syntax for a symbolic address depends on
3280: the section that the address refers to. On these machines,
3281: define the macro `ENCODE_SECTION_INFO' to store the information
3282: into the `symbol_ref', and then check for it here. */
3283:
3284: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
3285:
3286:
3287: /* A C statement, to be executed after all slot-filler instructions
3288: have been output. If necessary, call `dbr_sequence_length' to
3289: determine the number of slots filled in a sequence (zero if not
3290: currently outputting a sequence), to decide how many no-ops to
3291: output, or whatever.
3292:
3293: Don't define this macro if it has nothing to do, but it is
3294: helpful in reading assembly output if the extent of the delay
3295: sequence is made explicit (e.g. with white space).
3296:
3297: Note that output routines for instructions with delay slots must
3298: be prepared to deal with not being output as part of a sequence
3299: (i.e. when the scheduling pass is not run, or when no slot
3300: fillers could be found.) The variable `final_sequence' is null
3301: when not processing a sequence, otherwise it contains the
3302: `sequence' rtx being output. */
3303:
3304: #define DBR_OUTPUT_SEQEND(STREAM) \
3305: do \
3306: { \
3307: if (set_nomacro > 0 && --set_nomacro == 0) \
3308: fputs ("\t.set\tmacro\n", STREAM); \
3309: \
3310: if (set_noreorder > 0 && --set_noreorder == 0) \
3311: fputs ("\t.set\treorder\n", STREAM); \
3312: \
3313: dslots_jump_filled++; \
3314: fputs ("\n", STREAM); \
3315: } \
3316: while (0)
3317:
3318:
3319: /* How to tell the debugger about changes of source files. Note, the
3320: mips ECOFF format cannot deal with changes of files inside of
3321: functions, which means the output of parser generators like bison
3322: is generally not debuggable without using the -l switch. Lose,
3323: lose, lose. Silicon graphics seems to want all .file's hardwired
3324: to 1. */
3325:
3326: #ifndef SET_FILE_NUMBER
3327: #define SET_FILE_NUMBER() ++num_source_filenames
3328: #endif
3329:
3330: #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
3331: mips_output_filename (STREAM, NAME)
3332:
1.1.1.4 ! root 3333: /* This is defined so that it can be overridden in iris6.h. */
! 3334: #define ASM_OUTPUT_FILENAME(STREAM, NUM_SOURCE_FILENAMES, NAME) \
! 3335: do \
! 3336: { \
! 3337: fprintf (STREAM, "\t.file\t%d ", NUM_SOURCE_FILENAMES); \
! 3338: output_quoted_string (STREAM, NAME); \
! 3339: fputs ("\n", STREAM); \
! 3340: } \
! 3341: while (0)
! 3342:
1.1 root 3343: /* This is how to output a note the debugger telling it the line number
3344: to which the following sequence of instructions corresponds.
3345: Silicon graphics puts a label after each .loc. */
3346:
3347: #ifndef LABEL_AFTER_LOC
3348: #define LABEL_AFTER_LOC(STREAM)
3349: #endif
3350:
3351: #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \
3352: mips_output_lineno (STREAM, LINE)
3353:
1.1.1.3 root 3354: /* The MIPS implementation uses some labels for it's own purpose. The
1.1 root 3355: following lists what labels are created, and are all formed by the
3356: pattern $L[a-z].*. The machine independent portion of GCC creates
3357: labels matching: $L[A-Z][0-9]+ and $L[0-9]+.
3358:
3359: LM[0-9]+ Silicon Graphics/ECOFF stabs label before each stmt.
3360: $Lb[0-9]+ Begin blocks for MIPS debug support
3361: $Lc[0-9]+ Label for use in s<xx> operation.
3362: $Le[0-9]+ End blocks for MIPS debug support
3363: $Lp\..+ Half-pic labels. */
3364:
3365: /* This is how to output the definition of a user-level label named NAME,
3366: such as the label on a static function or variable NAME.
3367:
3368: If we are optimizing the gp, remember that this label has been put
3369: out, so we know not to emit an .extern for it in mips_asm_file_end.
3370: We use one of the common bits in the IDENTIFIER tree node for this,
3371: since those bits seem to be unused, and we don't have any method
3372: of getting the decl nodes from the name. */
3373:
3374: #define ASM_OUTPUT_LABEL(STREAM,NAME) \
3375: do { \
3376: assemble_name (STREAM, NAME); \
3377: fputs (":\n", STREAM); \
3378: } while (0)
3379:
3380:
3381: /* A C statement (sans semicolon) to output to the stdio stream
3382: STREAM any text necessary for declaring the name NAME of an
3383: initialized variable which is being defined. This macro must
3384: output the label definition (perhaps using `ASM_OUTPUT_LABEL').
3385: The argument DECL is the `VAR_DECL' tree node representing the
3386: variable.
3387:
3388: If this macro is not defined, then the variable name is defined
3389: in the usual manner as a label (by means of `ASM_OUTPUT_LABEL'). */
3390:
3391: #define ASM_DECLARE_OBJECT_NAME(STREAM, NAME, DECL) \
3392: do \
3393: { \
3394: mips_declare_object (STREAM, NAME, "", ":\n", 0); \
3395: HALF_PIC_DECLARE (NAME); \
3396: } \
3397: while (0)
3398:
3399:
3400: /* This is how to output a command to make the user-level label named NAME
3401: defined for reference from other files. */
3402:
3403: #define ASM_GLOBALIZE_LABEL(STREAM,NAME) \
3404: do { \
3405: fputs ("\t.globl\t", STREAM); \
3406: assemble_name (STREAM, NAME); \
3407: fputs ("\n", STREAM); \
3408: } while (0)
3409:
3410: /* This says how to define a global common symbol. */
3411:
3412: #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
1.1.1.3 root 3413: mips_declare_object (STREAM, NAME, "\n\t.comm\t", ",%u\n", (SIZE))
1.1 root 3414:
3415: /* This says how to define a local common symbol (ie, not visible to
3416: linker). */
3417:
3418: #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \
1.1.1.3 root 3419: mips_declare_object (STREAM, NAME, "\n\t.lcomm\t", ",%u\n", (SIZE))
1.1 root 3420:
3421:
3422: /* This says how to output an external. It would be possible not to
3423: output anything and let undefined symbol become external. However
3424: the assembler uses length information on externals to allocate in
3425: data/sdata bss/sbss, thereby saving exec time. */
3426:
3427: #define ASM_OUTPUT_EXTERNAL(STREAM,DECL,NAME) \
3428: mips_output_external(STREAM,DECL,NAME)
3429:
3430: /* This says what to print at the end of the assembly file */
3431: #define ASM_FILE_END(STREAM) mips_asm_file_end(STREAM)
3432:
3433:
3434: /* This is how to declare a function name. The actual work of
3435: emitting the label is moved to function_prologue, so that we can
3436: get the line number correctly emitted before the .ent directive,
3437: and after any .file directives.
3438:
3439: Also, switch files if we are optimizing the global pointer. */
3440:
3441: #define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL) \
3442: { \
3443: extern FILE *asm_out_text_file; \
3444: if (TARGET_GP_OPT) \
1.1.1.4 ! root 3445: { \
! 3446: STREAM = asm_out_text_file; \
! 3447: /* ??? text_section gets called too soon. If the previous \
! 3448: function is in a special section and we're not, we have \
! 3449: to switch back to the text section. We can't call \
! 3450: text_section again as gcc thinks we're already there. */ \
! 3451: /* ??? See varasm.c. There are other things that get output \
! 3452: too early, like alignment (before we've switched STREAM). */ \
! 3453: if (DECL_SECTION_NAME (DECL) == NULL_TREE) \
! 3454: fprintf (STREAM, "%s\n", TEXT_SECTION_ASM_OP); \
! 3455: } \
1.1 root 3456: \
3457: HALF_PIC_DECLARE (NAME); \
3458: }
3459:
3460: /* This is how to output a reference to a user-level label named NAME.
3461: `assemble_name' uses this. */
3462:
1.1.1.4 ! root 3463: #define ASM_OUTPUT_LABELREF(STREAM,NAME) \
! 3464: fprintf (STREAM, "%s%s", USER_LABEL_PREFIX, NAME)
1.1 root 3465:
3466: /* This is how to output an internal numbered label where
3467: PREFIX is the class of label and NUM is the number within the class. */
3468:
3469: #define ASM_OUTPUT_INTERNAL_LABEL(STREAM,PREFIX,NUM) \
1.1.1.4 ! root 3470: fprintf (STREAM, "%s%s%d:\n", LOCAL_LABEL_PREFIX, PREFIX, NUM)
1.1 root 3471:
3472: /* This is how to store into the string LABEL
3473: the symbol_ref name of an internal numbered label where
3474: PREFIX is the class of label and NUM is the number within the class.
3475: This is suitable for output with `assemble_name'. */
3476:
3477: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1.1.1.4 ! root 3478: sprintf (LABEL, "*%s%s%d", LOCAL_LABEL_PREFIX, PREFIX, NUM)
1.1 root 3479:
3480: /* This is how to output an assembler line defining a `double' constant. */
3481:
3482: #define ASM_OUTPUT_DOUBLE(STREAM,VALUE) \
3483: mips_output_double (STREAM, VALUE)
3484:
3485:
3486: /* This is how to output an assembler line defining a `float' constant. */
3487:
3488: #define ASM_OUTPUT_FLOAT(STREAM,VALUE) \
3489: mips_output_float (STREAM, VALUE)
3490:
3491:
3492: /* This is how to output an assembler line defining an `int' constant. */
3493:
3494: #define ASM_OUTPUT_INT(STREAM,VALUE) \
3495: do { \
3496: fprintf (STREAM, "\t.word\t"); \
3497: output_addr_const (STREAM, (VALUE)); \
3498: fprintf (STREAM, "\n"); \
3499: } while (0)
3500:
1.1.1.3 root 3501: /* Likewise for 64 bit, `char' and `short' constants. */
3502:
3503: #define ASM_OUTPUT_DOUBLE_INT(STREAM,VALUE) \
3504: do { \
3505: if (TARGET_64BIT) \
3506: { \
3507: fprintf (STREAM, "\t.dword\t"); \
3508: output_addr_const (STREAM, (VALUE)); \
3509: fprintf (STREAM, "\n"); \
3510: } \
3511: else \
3512: { \
3513: assemble_integer (operand_subword ((VALUE), 0, 0, DImode), \
3514: UNITS_PER_WORD, 1); \
3515: assemble_integer (operand_subword ((VALUE), 1, 0, DImode), \
3516: UNITS_PER_WORD, 1); \
3517: } \
3518: } while (0)
1.1 root 3519:
3520: #define ASM_OUTPUT_SHORT(STREAM,VALUE) \
3521: { \
3522: fprintf (STREAM, "\t.half\t"); \
3523: output_addr_const (STREAM, (VALUE)); \
3524: fprintf (STREAM, "\n"); \
3525: }
3526:
3527: #define ASM_OUTPUT_CHAR(STREAM,VALUE) \
3528: { \
3529: fprintf (STREAM, "\t.byte\t"); \
3530: output_addr_const (STREAM, (VALUE)); \
3531: fprintf (STREAM, "\n"); \
3532: }
3533:
3534: /* This is how to output an assembler line for a numeric constant byte. */
3535:
3536: #define ASM_OUTPUT_BYTE(STREAM,VALUE) \
3537: fprintf (STREAM, "\t.byte\t0x%x\n", (VALUE))
3538:
3539: /* This is how to output an element of a case-vector that is absolute. */
3540:
3541: #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
1.1.1.4 ! root 3542: fprintf (STREAM, "\t%s\t%sL%d\n", \
1.1.1.3 root 3543: TARGET_LONG64 ? ".dword" : ".word", \
1.1.1.4 ! root 3544: LOCAL_LABEL_PREFIX, \
1.1.1.3 root 3545: VALUE)
1.1 root 3546:
3547: /* This is how to output an element of a case-vector that is relative.
1.1.1.3 root 3548: This is used for pc-relative code (e.g. when TARGET_ABICALLS or
3549: TARGET_EMBEDDED_PIC). */
1.1 root 3550:
3551: #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, VALUE, REL) \
1.1.1.3 root 3552: do { \
3553: if (TARGET_EMBEDDED_PIC) \
1.1.1.4 ! root 3554: fprintf (STREAM, "\t%s\t%sL%d-%sLS%d\n", \
1.1.1.3 root 3555: TARGET_LONG64 ? ".dword" : ".word", \
1.1.1.4 ! root 3556: LOCAL_LABEL_PREFIX, VALUE, LOCAL_LABEL_PREFIX, REL); \
! 3557: else if (! ABI_64BIT) \
! 3558: fprintf (STREAM, "\t%s\t%sL%d\n", \
1.1.1.3 root 3559: TARGET_LONG64 ? ".gpdword" : ".gpword", \
1.1.1.4 ! root 3560: LOCAL_LABEL_PREFIX, VALUE); \
! 3561: else \
! 3562: /* ??? Why does this one use . and not LOCAL_LABEL_PREFIX? */ \
! 3563: fprintf (STREAM, "\t%s\t.L%d\n", \
! 3564: TARGET_LONG64 ? ".dword" : ".word", \
1.1.1.3 root 3565: VALUE); \
3566: } while (0)
1.1 root 3567:
1.1.1.3 root 3568: /* When generating embedded PIC code we want to put the jump table in
3569: the .text section. In all other cases, we want to put the jump
3570: table in the .rdata section. Unfortunately, we can't use
3571: JUMP_TABLES_IN_TEXT_SECTION, because it is not conditional.
3572: Instead, we use ASM_OUTPUT_CASE_LABEL to switch back to the .text
3573: section if appropriate. */
3574: #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, INSN) \
3575: do { \
3576: if (TARGET_EMBEDDED_PIC) \
3577: text_section (); \
3578: ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); \
3579: } while (0)
1.1 root 3580:
3581: /* This is how to output an assembler line
3582: that says to advance the location counter
3583: to a multiple of 2**LOG bytes. */
3584:
3585: #define ASM_OUTPUT_ALIGN(STREAM,LOG) \
3586: { \
3587: int mask = (1 << (LOG)) - 1; \
3588: fprintf (STREAM, "\t.align\t%d\n", (LOG)); \
3589: }
3590:
3591: /* This is how to output an assembler line to to advance the location
3592: counter by SIZE bytes. */
3593:
3594: #define ASM_OUTPUT_SKIP(STREAM,SIZE) \
3595: fprintf (STREAM, "\t.space\t%u\n", (SIZE))
3596:
3597: /* This is how to output a string. */
3598: #define ASM_OUTPUT_ASCII(STREAM, STRING, LEN) \
3599: do { \
3600: register int i, c, len = (LEN), cur_pos = 17; \
3601: register unsigned char *string = (unsigned char *)(STRING); \
3602: fprintf ((STREAM), "\t.ascii\t\""); \
3603: for (i = 0; i < len; i++) \
3604: { \
3605: register int c = string[i]; \
3606: \
3607: switch (c) \
3608: { \
3609: case '\"': \
3610: case '\\': \
3611: putc ('\\', (STREAM)); \
3612: putc (c, (STREAM)); \
3613: cur_pos += 2; \
3614: break; \
3615: \
3616: case TARGET_NEWLINE: \
3617: fputs ("\\n", (STREAM)); \
3618: if (i+1 < len \
3619: && (((c = string[i+1]) >= '\040' && c <= '~') \
3620: || c == TARGET_TAB)) \
3621: cur_pos = 32767; /* break right here */ \
3622: else \
3623: cur_pos += 2; \
3624: break; \
3625: \
3626: case TARGET_TAB: \
3627: fputs ("\\t", (STREAM)); \
3628: cur_pos += 2; \
3629: break; \
3630: \
3631: case TARGET_FF: \
3632: fputs ("\\f", (STREAM)); \
3633: cur_pos += 2; \
3634: break; \
3635: \
3636: case TARGET_BS: \
3637: fputs ("\\b", (STREAM)); \
3638: cur_pos += 2; \
3639: break; \
3640: \
3641: case TARGET_CR: \
3642: fputs ("\\r", (STREAM)); \
3643: cur_pos += 2; \
3644: break; \
3645: \
3646: default: \
3647: if (c >= ' ' && c < 0177) \
3648: { \
3649: putc (c, (STREAM)); \
3650: cur_pos++; \
3651: } \
3652: else \
3653: { \
3654: fprintf ((STREAM), "\\%03o", c); \
3655: cur_pos += 4; \
3656: } \
3657: } \
3658: \
3659: if (cur_pos > 72 && i+1 < len) \
3660: { \
3661: cur_pos = 17; \
3662: fprintf ((STREAM), "\"\n\t.ascii\t\""); \
3663: } \
3664: } \
3665: fprintf ((STREAM), "\"\n"); \
3666: } while (0)
3667:
3668: /* Handle certain cpp directives used in header files on sysV. */
3669: #define SCCS_DIRECTIVE
3670:
3671: /* Output #ident as a in the read-only data section. */
3672: #define ASM_OUTPUT_IDENT(FILE, STRING) \
3673: { \
3674: char *p = STRING; \
3675: int size = strlen (p) + 1; \
3676: rdata_section (); \
3677: assemble_string (p, size); \
3678: }
3679:
3680: /* Default to -G 8 */
3681: #ifndef MIPS_DEFAULT_GVALUE
3682: #define MIPS_DEFAULT_GVALUE 8
3683: #endif
3684:
3685: /* Define the strings to put out for each section in the object file. */
3686: #define TEXT_SECTION_ASM_OP "\t.text" /* instructions */
3687: #define DATA_SECTION_ASM_OP "\t.data" /* large data */
3688: #define SDATA_SECTION_ASM_OP "\t.sdata" /* small data */
3689: #define RDATA_SECTION_ASM_OP "\t.rdata" /* read-only data */
3690: #define READONLY_DATA_SECTION rdata_section
1.1.1.4 ! root 3691: #define SMALL_DATA_SECTION sdata_section
1.1 root 3692:
3693: /* What other sections we support other than the normal .data/.text. */
3694:
1.1.1.3 root 3695: #define EXTRA_SECTIONS in_sdata, in_rdata
1.1 root 3696:
3697: /* Define the additional functions to select our additional sections. */
3698:
3699: /* on the MIPS it is not a good idea to put constants in the text
3700: section, since this defeats the sdata/data mechanism. This is
3701: especially true when -O is used. In this case an effort is made to
3702: address with faster (gp) register relative addressing, which can
3703: only get at sdata and sbss items (there is no stext !!) However,
3704: if the constant is too large for sdata, and it's readonly, it
3705: will go into the .rdata section. */
3706:
3707: #define EXTRA_SECTION_FUNCTIONS \
3708: void \
3709: sdata_section () \
3710: { \
3711: if (in_section != in_sdata) \
3712: { \
3713: fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \
3714: in_section = in_sdata; \
3715: } \
3716: } \
3717: \
3718: void \
3719: rdata_section () \
3720: { \
3721: if (in_section != in_rdata) \
3722: { \
3723: fprintf (asm_out_file, "%s\n", RDATA_SECTION_ASM_OP); \
3724: in_section = in_rdata; \
3725: } \
3726: }
3727:
3728: /* Given a decl node or constant node, choose the section to output it in
3729: and select that section. */
3730:
1.1.1.3 root 3731: #define SELECT_RTX_SECTION(MODE,RTX) mips_select_rtx_section (MODE, RTX)
1.1 root 3732:
1.1.1.3 root 3733: #define SELECT_SECTION(DECL, RELOC) mips_select_section (DECL, RELOC)
1.1 root 3734:
3735:
3736: /* Store in OUTPUT a string (made with alloca) containing
3737: an assembler-name for a local static variable named NAME.
3738: LABELNO is an integer which is different for each call. */
3739:
3740: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
3741: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
3742: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
3743:
3744: #define ASM_OUTPUT_REG_PUSH(STREAM,REGNO) \
3745: do \
3746: { \
1.1.1.3 root 3747: fprintf (STREAM, "\t%s\t%s,%s,8\n\t%s\t%s,0(%s)\n", \
3748: TARGET_64BIT ? "dsubu" : "subu", \
1.1 root 3749: reg_names[STACK_POINTER_REGNUM], \
3750: reg_names[STACK_POINTER_REGNUM], \
1.1.1.3 root 3751: TARGET_64BIT ? "sd" : "sw", \
1.1 root 3752: reg_names[REGNO], \
3753: reg_names[STACK_POINTER_REGNUM]); \
3754: } \
3755: while (0)
3756:
3757: #define ASM_OUTPUT_REG_POP(STREAM,REGNO) \
3758: do \
3759: { \
3760: if (! set_noreorder) \
3761: fprintf (STREAM, "\t.set\tnoreorder\n"); \
3762: \
3763: dslots_load_total++; \
3764: dslots_load_filled++; \
1.1.1.3 root 3765: fprintf (STREAM, "\t%s\t%s,0(%s)\n\t%s\t%s,%s,8\n", \
3766: TARGET_64BIT ? "ld" : "lw", \
1.1 root 3767: reg_names[REGNO], \
3768: reg_names[STACK_POINTER_REGNUM], \
1.1.1.3 root 3769: TARGET_64BIT ? "daddu" : "addu", \
1.1 root 3770: reg_names[STACK_POINTER_REGNUM], \
3771: reg_names[STACK_POINTER_REGNUM]); \
3772: \
3773: if (! set_noreorder) \
3774: fprintf (STREAM, "\t.set\treorder\n"); \
3775: } \
3776: while (0)
3777:
3778: /* Define the parentheses used to group arithmetic operations
3779: in assembler code. */
3780:
3781: #define ASM_OPEN_PAREN "("
3782: #define ASM_CLOSE_PAREN ")"
3783:
3784: /* How to start an assembler comment. */
3785: #ifndef ASM_COMMENT_START
3786: #define ASM_COMMENT_START "\t\t# "
3787: #endif
3788:
3789:
3790:
3791: /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for
3792: and mips-tdump.c to print them out.
3793:
3794: These must match the corresponding definitions in gdb/mipsread.c.
3795: Unfortunately, gcc and gdb do not currently share any directories. */
3796:
3797: #define CODE_MASK 0x8F300
3798: #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
3799: #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
3800: #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
3801:
3802:
3803: /* Default definitions for size_t and ptrdiff_t. */
3804:
3805: #ifndef SIZE_TYPE
1.1.1.3 root 3806: #define NO_BUILTIN_SIZE_TYPE
3807: #define SIZE_TYPE (TARGET_LONG64 ? "long unsigned int" : "unsigned int")
1.1 root 3808: #endif
3809:
3810: #ifndef PTRDIFF_TYPE
1.1.1.3 root 3811: #define NO_BUILTIN_PTRDIFF_TYPE
3812: #define PTRDIFF_TYPE (TARGET_LONG64 ? "long int" : "int")
1.1 root 3813: #endif
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