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1.1 root 1: /* Definitions of target machine for GNU compiler. NS32000 version.
2: Copyright (C) 1988 Free Software Foundation, Inc.
3: Contributed by Michael Tiemann ([email protected])
4:
5: This file is part of GNU CC.
6:
7: GNU CC is free software; you can redistribute it and/or modify
8: it under the terms of the GNU General Public License as published by
9: the Free Software Foundation; either version 2, or (at your option)
10: any later version.
11:
12: GNU CC is distributed in the hope that it will be useful,
13: but WITHOUT ANY WARRANTY; without even the implied warranty of
14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15: GNU General Public License for more details.
16:
17: You should have received a copy of the GNU General Public License
18: along with GNU CC; see the file COPYING. If not, write to
19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20:
21:
22: /* Note that some other tm.h files include this one and then override
23: many of the definitions that relate to assembler syntax. */
24:
25: extern enum reg_class secondary_reload_class();
26:
27: /* Names to predefine in the preprocessor for this target machine. */
28:
29: #define CPP_PREDEFINES "-Dns32000 -Dunix"
30:
31: /* Print subsidiary information on the compiler version in use. */
32: #define TARGET_VERSION fprintf (stderr, " (32000, GAS syntax)");
33:
34:
35: /* ABSOLUTE PREFIX, IMMEDIATE_PREFIX and EXTERNAL_PREFIX can be defined
36: to cover most NS32k addressing syntax variations. This way we don't
37: need to redefine long macros in all the tm.h files for just slight
38: variations in assembler syntax. */
39:
40: #ifndef ABSOLUTE_PREFIX
41: #define ABSOLUTE_PREFIX '@'
42: #endif
43:
44: #if defined(IMMEDIATE_PREFIX) && IMMEDIATE_PREFIX
45: #define PUT_IMMEDIATE_PREFIX(FILE) putc(IMMEDIATE_PREFIX, FILE)
46: #else
47: #define PUT_IMMEDIATE_PREFIX(FILE)
48: #endif
49: #if defined(ABSOLUTE_PREFIX) && ABSOLUTE_PREFIX
50: #define PUT_ABSOLUTE_PREFIX(FILE) putc(ABSOLUTE_PREFIX, FILE)
51: #else
52: #define PUT_ABSOLUTE_PREFIX(FILE)
53: #endif
54: #if defined(EXTERNAL_PREFIX) && EXTERNAL_PREFIX
55: #define PUT_EXTERNAL_PREFIX(FILE) putc(EXTERNAL_PREFIX, FILE)
56: #else
57: #define PUT_EXTERNAL_PREFIX(FILE)
58: #endif
59:
60: /* Run-time compilation parameters selecting different hardware subsets. */
61:
62: extern int target_flags;
63:
64: /* Macros used in the machine description to test the flags. */
65:
66: /* Compile 32081 insns for floating point (not library calls). */
67: #define TARGET_32081 (target_flags & 1)
68:
69: /* Compile using rtd insn calling sequence.
70: This will not work unless you use prototypes at least
71: for all functions that can take varying numbers of args. */
72: #define TARGET_RTD (target_flags & 2)
73:
74: /* Compile passing first two args in regs 0 and 1. */
75: #define TARGET_REGPARM (target_flags & 4)
76:
77: /* Options to select type of CPU, for better optimization.
78: The output is correct for any kind of 32000 regardless of these options. */
79: #define TARGET_32532 (target_flags & 8)
80: #define TARGET_32332 (target_flags & 16)
81:
82: /* Ok to use the static base register (and presume it's 0) */
83: #define TARGET_SB ((target_flags & 32) == 0)
84:
85: /* Macro to define tables used to set the flags.
86: This is a list in braces of pairs in braces,
87: each pair being { "NAME", VALUE }
88: where VALUE is the bits to set or minus the bits to clear.
89: An empty string NAME is used to identify the default VALUE. */
90:
91: #define TARGET_SWITCHES \
92: { { "32081", 1}, \
93: { "soft-float", -1}, \
94: { "rtd", 2}, \
95: { "nortd", -2}, \
96: { "regparm", 4}, \
97: { "noregparm", -4}, \
98: { "32532", 24}, \
99: { "32332", -16}, \
100: { "32332", 8}, \
101: { "32032", -24}, \
102: { "sb", -32}, \
103: { "nosb", 32}, \
104: { "", TARGET_DEFAULT}}
105: /* TARGET_DEFAULT is defined in encore.h, pc532.h, etc. */
106:
107: /* target machine storage layout */
108:
109: /* Define this if most significant bit is lowest numbered
110: in instructions that operate on numbered bit-fields.
111: This is not true on the ns32k. */
112: #define BITS_BIG_ENDIAN 0
113:
114: /* Define this if most significant byte of a word is the lowest numbered. */
115: /* That is not true on the ns32k. */
116: #define BYTES_BIG_ENDIAN 0
117:
118: /* Define this if most significant word of a multiword number is lowest
119: numbered. This is not true on the ns32k. */
120: #define WORDS_BIG_ENDIAN 0
121:
1.1.1.2 root 122: /* Number of bits in an addressable storage unit */
1.1 root 123: #define BITS_PER_UNIT 8
124:
125: /* Width in bits of a "word", which is the contents of a machine register.
126: Note that this is not necessarily the width of data type `int';
127: if using 16-bit ints on a 32000, this would still be 32.
128: But on a machine with 16-bit registers, this would be 16. */
129: #define BITS_PER_WORD 32
130:
131: /* Width of a word, in units (bytes). */
132: #define UNITS_PER_WORD 4
133:
134: /* Width in bits of a pointer.
135: See also the macro `Pmode' defined below. */
136: #define POINTER_SIZE 32
137:
138: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
139: #define PARM_BOUNDARY 32
140:
141: /* Boundary (in *bits*) on which stack pointer should be aligned. */
142: #define STACK_BOUNDARY 32
143:
144: /* Allocation boundary (in *bits*) for the code of a function. */
145: #define FUNCTION_BOUNDARY 16
146:
147: /* Alignment of field after `int : 0' in a structure. */
148: #define EMPTY_FIELD_BOUNDARY 32
149:
150: /* Every structure's size must be a multiple of this. */
151: #define STRUCTURE_SIZE_BOUNDARY 8
152:
153: /* No data type wants to be aligned rounder than this. */
154: #define BIGGEST_ALIGNMENT 32
155:
1.1.1.2 root 156: /* Set this nonzero if move instructions will actually fail to work
1.1 root 157: when given unaligned data. National claims that the NS32032
158: works without strict alignment, but rumor has it that operands
159: crossing a page boundary cause unpredictable results. */
1.1.1.2 root 160: #define STRICT_ALIGNMENT 1
1.1 root 161:
162: /* If bit field type is int, dont let it cross an int,
163: and give entire struct the alignment of an int. */
164: /* Required on the 386 since it doesn't have a full set of bitfield insns.
165: (There is no signed extv insn.) */
166: #define PCC_BITFIELD_TYPE_MATTERS 1
167:
168: /* Standard register usage. */
169:
170: /* Number of actual hardware registers.
171: The hardware registers are assigned numbers for the compiler
172: from 0 to just below FIRST_PSEUDO_REGISTER.
173: All registers that the compiler knows about must be given numbers,
174: even those that are not normally considered general registers. */
175: #define FIRST_PSEUDO_REGISTER 18
176:
177: /* 1 for registers that have pervasive standard uses
178: and are not available for the register allocator.
179: On the ns32k, these are the FP, SP, (SB and PC are not included here). */
180: #define FIXED_REGISTERS {0, 0, 0, 0, 0, 0, 0, 0, \
181: 0, 0, 0, 0, 0, 0, 0, 0, \
182: 1, 1}
183:
184: /* 1 for registers not available across function calls.
185: These must include the FIXED_REGISTERS and also any
186: registers that can be used without being saved.
187: The latter must include the registers where values are returned
188: and the register where structure-value addresses are passed.
189: Aside from that, you can include as many other registers as you like. */
190: #define CALL_USED_REGISTERS {1, 1, 1, 0, 0, 0, 0, 0, \
191: 1, 1, 1, 1, 0, 0, 0, 0, \
192: 1, 1}
193:
194: /* Return number of consecutive hard regs needed starting at reg REGNO
195: to hold something of mode MODE.
196: This is ordinarily the length in words of a value of mode MODE
197: but can be less for certain modes in special long registers.
198: On the ns32k, all registers are 32 bits long. */
199: #define HARD_REGNO_NREGS(REGNO, MODE) \
200: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
201:
202: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
203: #define HARD_REGNO_MODE_OK(REGNO, MODE) hard_regno_mode_ok (REGNO, MODE)
204:
205: /* Value is 1 if it is a good idea to tie two pseudo registers
206: when one has mode MODE1 and one has mode MODE2.
207: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
208: for any hard reg, then this must be 0 for correct output. */
209: #define MODES_TIEABLE_P(MODE1, MODE2) \
210: (((MODE1) == DFmode || (MODE1) == DCmode || (MODE1) == DImode) == \
211: ((MODE2) == DFmode || (MODE2) == DCmode || (MODE2) == DImode))
212:
213: /* Specify the registers used for certain standard purposes.
214: The values of these macros are register numbers. */
215:
216: /* NS32000 pc is not overloaded on a register. */
217: /* #define PC_REGNUM */
218:
219: /* Register to use for pushing function arguments. */
220: #define STACK_POINTER_REGNUM 17
221:
222: /* Base register for access to local variables of the function. */
223: #define FRAME_POINTER_REGNUM 16
224:
225: /* Value should be nonzero if functions must have frame pointers.
226: Zero means the frame pointer need not be set up (and parms
227: may be accessed via the stack pointer) in functions that seem suitable.
228: This is computed in `reload', in reload1.c. */
229: #define FRAME_POINTER_REQUIRED 0
230:
231: /* Base register for access to arguments of the function. */
232: #define ARG_POINTER_REGNUM 16
233:
234: /* Register in which static-chain is passed to a function. */
235: #define STATIC_CHAIN_REGNUM 1
236:
237: /* Register in which address to store a structure value
238: is passed to a function. */
239: #define STRUCT_VALUE_REGNUM 2
240:
241: /* Define the classes of registers for register constraints in the
242: machine description. Also define ranges of constants.
243:
244: One of the classes must always be named ALL_REGS and include all hard regs.
245: If there is more than one class, another class must be named NO_REGS
246: and contain no registers.
247:
248: The name GENERAL_REGS must be the name of a class (or an alias for
249: another name such as ALL_REGS). This is the class of registers
250: that is allowed by "g" or "r" in a register constraint.
251: Also, registers outside this class are allocated only when
252: instructions express preferences for them.
253:
254: The classes must be numbered in nondecreasing order; that is,
255: a larger-numbered class must never be contained completely
256: in a smaller-numbered class.
257:
258: For any two classes, it is very desirable that there be another
259: class that represents their union. */
260:
261: enum reg_class { NO_REGS, GENERAL_REGS, FLOAT_REGS, FRAME_POINTER_REG, STACK_POINTER_REG,
262: GEN_AND_MEM_REGS, ALL_REGS, LIM_REG_CLASSES };
263:
264: #define N_REG_CLASSES (int) LIM_REG_CLASSES
265:
266: /* Give names of register classes as strings for dump file. */
267:
268: #define REG_CLASS_NAMES \
269: {"NO_REGS", "GENERAL_REGS", "FLOAT_REGS", "FRAME_POINTER_REG", "STACK_POINTER_REG", "GEN_AND_MEM_REGS", "ALL_REGS" }
270:
271: /* Define which registers fit in which classes.
272: This is an initializer for a vector of HARD_REG_SET
273: of length N_REG_CLASSES. */
274:
275: #define REG_CLASS_CONTENTS {0, 0x00ff, 0xff00, 0x10000, 0x20000, 0x300ff, 0x3ffff }
276:
277: /* The same information, inverted:
278: Return the class number of the smallest class containing
279: reg number REGNO. This could be a conditional expression
280: or could index an array. */
281:
282: #define REGNO_REG_CLASS(REGNO) \
283: ((REGNO) < 8 ? GENERAL_REGS \
284: : (REGNO) < 16 ? FLOAT_REGS \
285: : (REGNO) == 16 ? FRAME_POINTER_REG \
286: : (REGNO) == 17 ? STACK_POINTER_REG \
287: : NO_REGS)
288:
289: /* The class value for index registers, and the one for base regs. */
290:
291: #define INDEX_REG_CLASS GENERAL_REGS
292: #define BASE_REG_CLASS GEN_AND_MEM_REGS
293:
294: /* Get reg_class from a letter such as appears in the machine description. */
295:
296: #define REG_CLASS_FROM_LETTER(C) \
297: ((C) == 'f' ? FLOAT_REGS \
298: : (C) == 'x' ? FRAME_POINTER_REG \
299: : (C) == 'y' ? STACK_POINTER_REG \
300: : NO_REGS)
301:
302: /* The letters I, J, K, L and M in a register constraint string
303: can be used to stand for particular ranges of immediate operands.
304: This macro defines what the ranges are.
305: C is the letter, and VALUE is a constant value.
306: Return 1 if VALUE is in the range specified by C.
307:
308: On the ns32k, these letters are used as follows:
309:
310: I : Matches integers which are valid shift amounts for scaled indexing.
311: These are 0, 1, 2, 3 for byte, word, double, and quadword.
312: Used for matching arithmetic shifts only on 32032 & 32332.
313: J : Matches integers which fit a "quick" operand.
314: K : Matches integers 0 to 7 (for inss and exts instructions).
315: */
316:
317: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
318: ((VALUE) < 8 && (VALUE) + 8 >= 0 ? \
319: ((C) == 'I' ? (!TARGET_32532 && 0 <= (VALUE) && (VALUE) <= 3) : \
320: (C) == 'J' ? (VALUE) <= 7 : \
321: (C) == 'K' ? 0 <= (VALUE) : 0) : 0)
322:
323: /* Similar, but for floating constants, and defining letters G and H.
324: Here VALUE is the CONST_DOUBLE rtx itself. */
325:
326: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
327:
328: /* Given an rtx X being reloaded into a reg required to be
329: in class CLASS, return the class of reg to actually use.
330: In general this is just CLASS; but on some machines
331: in some cases it is preferable to use a more restrictive class. */
332:
1.1.1.3 ! root 333: /* We return GENERAL_REGS instead of GEN_AND_MEM_REGS.
! 334: The latter offers no real additional possibilities
! 335: and can cause spurious secondary reloading. */
! 336: #define PREFERRED_RELOAD_CLASS(X,CLASS) \
! 337: ((CLASS) == GEN_AND_MEM_REGS ? GENERAL_REGS : (CLASS))
1.1 root 338:
339: /* Return the maximum number of consecutive registers
340: needed to represent mode MODE in a register of class CLASS. */
341: /* On the 32000, this is the size of MODE in words */
342: #define CLASS_MAX_NREGS(CLASS, MODE) \
343: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
344:
345: /* Stack layout; function entry, exit and calling. */
346:
347: /* Define this if pushing a word on the stack
348: makes the stack pointer a smaller address. */
349: #define STACK_GROWS_DOWNWARD
350:
351: /* Define this if the nominal address of the stack frame
352: is at the high-address end of the local variables;
353: that is, each additional local variable allocated
354: goes at a more negative offset in the frame. */
355: #define FRAME_GROWS_DOWNWARD
356:
357: /* Offset within stack frame to start allocating local variables at.
358: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
359: first local allocated. Otherwise, it is the offset to the BEGINNING
360: of the first local allocated. */
361: #define STARTING_FRAME_OFFSET 0
362:
363: /* If we generate an insn to push BYTES bytes,
364: this says how many the stack pointer really advances by.
365: On the 32000, sp@- in a byte insn really pushes a BYTE. */
366: #define PUSH_ROUNDING(BYTES) (BYTES)
367:
368: /* Offset of first parameter from the argument pointer register value. */
369: #define FIRST_PARM_OFFSET(FNDECL) 8
370:
371: /* Value is the number of byte of arguments automatically
372: popped when returning from a subroutine call.
373: FUNTYPE is the data type of the function (as a tree),
374: or for a library call it is an identifier node for the subroutine name.
375: SIZE is the number of bytes of arguments passed on the stack.
376:
377: On the 32000, the RET insn may be used to pop them if the number
378: of args is fixed, but if the number is variable then the caller
379: must pop them all. RET can't be used for library calls now
380: because the library is compiled with the Unix compiler.
381: Use of RET is a selectable option, since it is incompatible with
382: standard Unix calling sequences. If the option is not selected,
383: the caller must always pop the args. */
384:
385: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) \
386: ((TARGET_RTD && TREE_CODE (FUNTYPE) != IDENTIFIER_NODE \
387: && (TYPE_ARG_TYPES (FUNTYPE) == 0 \
388: || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \
389: == void_type_node))) \
390: ? (SIZE) : 0)
391:
392: /* Define how to find the value returned by a function.
393: VALTYPE is the data type of the value (as a tree).
394: If the precise function being called is known, FUNC is its FUNCTION_DECL;
395: otherwise, FUNC is 0. */
396:
397: /* On the 32000 the return value is in R0,
398: or perhaps in F0 is there is fp support. */
399:
400: #define FUNCTION_VALUE(VALTYPE, FUNC) \
401: (TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_32081 \
402: ? gen_rtx (REG, TYPE_MODE (VALTYPE), 8) \
403: : gen_rtx (REG, TYPE_MODE (VALTYPE), 0))
404:
405: /* Define how to find the value returned by a library function
406: assuming the value has mode MODE. */
407:
408: /* On the 32000 the return value is in R0,
409: or perhaps F0 is there is fp support. */
410:
411: #define LIBCALL_VALUE(MODE) \
412: (((MODE) == DFmode || (MODE) == SFmode) && TARGET_32081 \
413: ? gen_rtx (REG, MODE, 8) \
414: : gen_rtx (REG, MODE, 0))
415:
416: /* Define this if PCC uses the nonreentrant convention for returning
417: structure and union values. */
418:
419: #define PCC_STATIC_STRUCT_RETURN
420:
421: /* 1 if N is a possible register number for a function value.
422: On the 32000, R0 and F0 are the only registers thus used. */
423:
424: #define FUNCTION_VALUE_REGNO_P(N) (((N) & ~8) == 0)
425:
426: /* 1 if N is a possible register number for function argument passing.
427: On the 32000, no registers are used in this way. */
428:
429: #define FUNCTION_ARG_REGNO_P(N) 0
430:
431: /* Define a data type for recording info about an argument list
432: during the scan of that argument list. This data type should
433: hold all necessary information about the function itself
434: and about the args processed so far, enough to enable macros
435: such as FUNCTION_ARG to determine where the next arg should go.
436:
437: On the ns32k, this is a single integer, which is a number of bytes
438: of arguments scanned so far. */
439:
440: #define CUMULATIVE_ARGS int
441:
442: /* Initialize a variable CUM of type CUMULATIVE_ARGS
443: for a call to a function whose data type is FNTYPE.
444: For a library call, FNTYPE is 0.
445:
446: On the ns32k, the offset starts at 0. */
447:
448: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
449: ((CUM) = 0)
450:
451: /* Update the data in CUM to advance over an argument
452: of mode MODE and data type TYPE.
453: (TYPE is null for libcalls where that information may not be available.) */
454:
455: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
456: ((CUM) += ((MODE) != BLKmode \
457: ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
458: : (int_size_in_bytes (TYPE) + 3) & ~3))
459:
460: /* Define where to put the arguments to a function.
461: Value is zero to push the argument on the stack,
462: or a hard register in which to store the argument.
463:
464: MODE is the argument's machine mode.
465: TYPE is the data type of the argument (as a tree).
466: This is null for libcalls where that information may
467: not be available.
468: CUM is a variable of type CUMULATIVE_ARGS which gives info about
469: the preceding args and about the function being called.
470: NAMED is nonzero if this argument is a named parameter
471: (otherwise it is an extra parameter matching an ellipsis). */
472:
473: /* On the 32000 all args are pushed, except if -mregparm is specified
474: then the first two words of arguments are passed in r0, r1.
475: *NOTE* -mregparm does not work.
476: It exists only to test register calling conventions. */
477:
478: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
479: ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
480:
481: /* For an arg passed partly in registers and partly in memory,
482: this is the number of registers used.
483: For args passed entirely in registers or entirely in memory, zero. */
484:
485: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
486: ((TARGET_REGPARM && (CUM) < 8 \
487: && 8 < ((CUM) + ((MODE) == BLKmode \
488: ? int_size_in_bytes (TYPE) \
489: : GET_MODE_SIZE (MODE)))) \
490: ? 2 - (CUM) / 4 : 0)
491:
492: #ifndef MAIN_FUNCTION_PROLOGUE
493: #define MAIN_FUNCTION_PROLOGUE
494: #endif
495:
496: /*
497: * The function prologue for the ns32k is fairly simple.
498: * If a frame pointer is needed (decided in reload.c ?) then
499: * we need assembler of the form
500: *
501: * # Save the oldframe pointer, set the new frame pointer, make space
502: * # on the stack and save any general purpose registers necessary
503: *
504: * enter [<general purpose regs to save>], <local stack space>
505: *
506: * movf fn, tos # Save any floating point registers necessary
507: * .
508: * .
509: *
510: * If a frame pointer is not needed we need assembler of the form
511: * # Save any general purpose registers necessary
512: *
513: * save [<general purpose regs to save>]
514: *
515: * movf fn, tos # Save any floating point registers necessary
516: * .
517: * .
518: */
519:
520: #define FUNCTION_PROLOGUE(FILE, SIZE) \
521: { register int regno, g_regs_used = 0; \
522: int used_regs_buf[8], *bufp = used_regs_buf; \
523: int used_fregs_buf[8], *fbufp = used_fregs_buf; \
524: extern char call_used_regs[]; \
525: MAIN_FUNCTION_PROLOGUE; \
526: for (regno = 0; regno < 8; regno++) \
527: if (regs_ever_live[regno] \
528: && ! call_used_regs[regno]) \
529: { \
530: *bufp++ = regno; g_regs_used++; \
531: } \
532: *bufp = -1; \
533: for (; regno < 16; regno++) \
534: if (regs_ever_live[regno] && !call_used_regs[regno]) { \
535: *fbufp++ = regno; \
536: } \
537: *fbufp = -1; \
538: bufp = used_regs_buf; \
539: if (frame_pointer_needed) \
540: fprintf (FILE, "\tenter ["); \
541: else if (g_regs_used) \
542: fprintf (FILE, "\tsave ["); \
543: while (*bufp >= 0) \
544: { \
545: fprintf (FILE, "r%d", *bufp++); \
546: if (*bufp >= 0) \
547: fputc (',', FILE); \
548: } \
549: if (frame_pointer_needed) \
550: fprintf (FILE, "],%d\n", SIZE); \
551: else if (g_regs_used) \
552: fprintf (FILE, "]\n"); \
553: fbufp = used_fregs_buf; \
554: while (*fbufp >= 0) \
555: { \
556: if ((*fbufp & 1) || (fbufp[0] != fbufp[1] - 1)) \
557: fprintf (FILE, "\tmovf f%d,tos\n", *fbufp++ - 8); \
558: else \
559: { \
560: fprintf (FILE, "\tmovl f%d,tos\n", fbufp[0] - 8); \
561: fbufp += 2; \
562: } \
563: } \
564: }
565:
566: /* Output assembler code to FILE to increment profiler label # LABELNO
567: for profiling a function entry.
568:
569: THIS DEFINITION FOR THE 32000 IS A GUESS. IT HAS NOT BEEN TESTED. */
570:
571: #define FUNCTION_PROFILER(FILE, LABELNO) \
572: fprintf (FILE, "\taddr LP%d,r0\n\tbsr mcount\n", (LABELNO))
573:
574: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
575: the stack pointer does not matter. The value is tested only in
576: functions that have frame pointers.
577: No definition is equivalent to always zero.
578:
579: We use 0, because using 1 requires hair in FUNCTION_EPILOGUE
580: that is worse than the stack adjust we could save. */
581:
582: /* #define EXIT_IGNORE_STACK 1 */
583:
584: /* This macro generates the assembly code for function exit,
585: on machines that need it. If FUNCTION_EPILOGUE is not defined
586: then individual return instructions are generated for each
587: return statement. Args are same as for FUNCTION_PROLOGUE.
588:
589: The function epilogue should not depend on the current stack pointer,
590: if EXIT_IGNORE_STACK is nonzero. That doesn't apply here.
591:
592: If a frame pointer is needed (decided in reload.c ?) then
593: we need assembler of the form
594:
595: movf tos, fn # Restore any saved floating point registers
596: .
597: .
598:
599: # Restore any saved general purpose registers, restore the stack
600: # pointer from the frame pointer, restore the old frame pointer.
601: exit [<general purpose regs to save>]
602:
603: If a frame pointer is not needed we need assembler of the form
604: # Restore any general purpose registers saved
605:
606: movf tos, fn # Restore any saved floating point registers
607: .
608: .
609: .
610: restore [<general purpose regs to save>] */
611:
612: #define FUNCTION_EPILOGUE(FILE, SIZE) \
613: { register int regno, g_regs_used = 0, f_regs_used = 0; \
614: int used_regs_buf[8], *bufp = used_regs_buf; \
615: int used_fregs_buf[8], *fbufp = used_fregs_buf; \
616: extern char call_used_regs[]; \
617: *fbufp++ = -2; \
618: for (regno = 8; regno < 16; regno++) \
619: if (regs_ever_live[regno] && !call_used_regs[regno]) { \
620: *fbufp++ = regno; f_regs_used++; \
621: } \
622: fbufp--; \
623: for (regno = 0; regno < 8; regno++) \
624: if (regs_ever_live[regno] \
625: && ! call_used_regs[regno]) \
626: { \
627: *bufp++ = regno; g_regs_used++; \
628: } \
629: while (fbufp > used_fregs_buf) \
630: { \
631: if ((*fbufp & 1) && fbufp[0] == fbufp[-1] + 1) \
632: { \
633: fprintf (FILE, "\tmovl tos,f%d\n", fbufp[-1] - 8); \
634: fbufp -= 2; \
635: } \
636: else fprintf (FILE, "\tmovf tos,f%d\n", *fbufp-- - 8); \
637: } \
638: if (frame_pointer_needed) \
639: fprintf (FILE, "\texit ["); \
640: else if (g_regs_used) \
641: fprintf (FILE, "\trestore ["); \
642: while (bufp > used_regs_buf) \
643: { \
644: fprintf (FILE, "r%d", *--bufp); \
645: if (bufp > used_regs_buf) \
646: fputc (',', FILE); \
647: } \
648: if (g_regs_used || frame_pointer_needed) \
649: fprintf (FILE, "]\n"); \
650: if (current_function_pops_args) \
651: fprintf (FILE, "\tret %d\n", current_function_pops_args); \
652: else fprintf (FILE, "\tret 0\n"); }
653:
654: /* Store in the variable DEPTH the initial difference between the
655: frame pointer reg contents and the stack pointer reg contents,
656: as of the start of the function body. This depends on the layout
657: of the fixed parts of the stack frame and on how registers are saved. */
658:
659: #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \
660: { \
661: int regno; \
662: int offset = -4; \
663: for (regno = 0; regno < 16; regno++) \
664: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
665: offset += 4; \
666: (DEPTH) = offset - get_frame_size (); \
667: }
668:
669:
670: /* Output assembler code for a block containing the constant parts
671: of a trampoline, leaving space for the variable parts. */
672:
673: /* On the 32k, the trampoline looks like this:
674: addr .,r2
675: jump @__trampoline
676: .int STATIC
677: .int FUNCTION
678: Doing trampolines with a library assist function is easier than figuring
679: out how to do stores to memory in reverse byte order (the way immediate
680: operands on the 32k are stored). */
681:
682: #define TRAMPOLINE_TEMPLATE(FILE) \
683: { \
684: fprintf (FILE, "\taddr .,r2\n" ); \
1.1.1.3 ! root 685: fprintf (FILE, "\tjump " ); \
! 686: PUT_ABSOLUTE_PREFIX (FILE); \
! 687: fprintf (FILE, "__trampoline\n" ); \
1.1 root 688: ASM_OUTPUT_INT (FILE, const0_rtx); \
689: ASM_OUTPUT_INT (FILE, const0_rtx); \
690: }
691:
692: /* Length in units of the trampoline for entering a nested function. */
693:
694: #define TRAMPOLINE_SIZE 20
695:
696: /* Emit RTL insns to initialize the variable parts of a trampoline.
697: FNADDR is an RTX for the address of the function's pure code.
698: CXT is an RTX for the static chain value for the function. */
699:
700: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
701: { \
702: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 12)), CXT); \
703: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 16)), FNADDR); \
704: }
705:
706: /* This is the library routine that is used
707: to transfer control from the trampoline
708: to the actual nested function. */
709:
710: /* The function name __transfer_from_trampoline is not actually used.
711: The function definition just permits use of "asm with operands"
712: (though the operand list is empty). */
713: #define TRANSFER_FROM_TRAMPOLINE \
714: void \
715: __transfer_from_trampoline () \
716: { \
717: asm ("___trampoline:"); \
718: asm ("movd 16(r2),tos"); \
719: asm ("movd 12(r2),r2"); \
1.1.1.2 root 720: asm ("ret 0"); \
1.1 root 721: }
722:
723: /* Addressing modes, and classification of registers for them. */
724:
725: /* #define HAVE_POST_INCREMENT */
726: /* #define HAVE_POST_DECREMENT */
727:
728: /* #define HAVE_PRE_DECREMENT */
729: /* #define HAVE_PRE_INCREMENT */
730:
731: /* Macros to check register numbers against specific register classes. */
732:
733: /* These assume that REGNO is a hard or pseudo reg number.
734: They give nonzero only if REGNO is a hard reg of the suitable class
735: or a pseudo reg currently allocated to a suitable hard reg.
736: Since they use reg_renumber, they are safe only once reg_renumber
737: has been allocated, which happens in local-alloc.c. */
738:
739: /* note that FP and SP cannot be used as an index. What about PC? */
740: #define REGNO_OK_FOR_INDEX_P(REGNO) \
741: ((REGNO) < 8 || (unsigned)reg_renumber[REGNO] < 8)
742: #define REGNO_OK_FOR_BASE_P(REGNO) \
743: ((REGNO) < 8 || (unsigned)reg_renumber[REGNO] < 8 \
744: || (REGNO) == FRAME_POINTER_REGNUM || (REGNO) == STACK_POINTER_REGNUM)
745:
746: #define FP_REG_P(X) (GET_CODE (X) == REG && REGNO (X) > 7 && REGNO (X) < 16)
747:
748: /* Maximum number of registers that can appear in a valid memory address. */
749:
750: #define MAX_REGS_PER_ADDRESS 2
751:
752: /* Recognize any constant value that is a valid address.
753: This might not work on future ns32k processors as negative
754: displacements are not officially allowed but a mode reserved
755: to National. This works on processors up to 32532, though. */
756:
757: #define CONSTANT_ADDRESS_P(X) \
758: (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
759: || GET_CODE (X) == CONST \
760: || (GET_CODE (X) == CONST_INT \
761: && ((unsigned)INTVAL (X) >= 0xe0000000 \
762: || (unsigned)INTVAL (X) < 0x20000000)))
763:
764: #define CONSTANT_ADDRESS_NO_LABEL_P(X) \
765: (GET_CODE (X) == CONST_INT \
766: && ((unsigned)INTVAL (X) >= 0xe0000000 \
767: || (unsigned)INTVAL (X) < 0x20000000))
768:
769: /* Return the register class of a scratch register needed to copy IN into
770: or out of a register in CLASS in MODE. If it can be done directly,
771: NO_REGS is returned. */
772:
773: #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
774: secondary_reload_class (CLASS, MODE, IN)
775:
776: /* Nonzero if the constant value X is a legitimate general operand.
777: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
778:
779: #define LEGITIMATE_CONSTANT_P(X) 1
780:
781: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
782: and check its validity for a certain class.
783: We have two alternate definitions for each of them.
784: The usual definition accepts all pseudo regs; the other rejects
785: them unless they have been allocated suitable hard regs.
786: The symbol REG_OK_STRICT causes the latter definition to be used.
787:
788: Most source files want to accept pseudo regs in the hope that
789: they will get allocated to the class that the insn wants them to be in.
790: Source files for reload pass need to be strict.
791: After reload, it makes no difference, since pseudo regs have
792: been eliminated by then. */
793:
794: #ifndef REG_OK_STRICT
795:
796: /* Nonzero if X is a hard reg that can be used as an index
797: or if it is a pseudo reg. */
798: #define REG_OK_FOR_INDEX_P(X) \
799: (REGNO (X) < 8 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
800: /* Nonzero if X is a hard reg that can be used as a base reg
801: of if it is a pseudo reg. */
802: #define REG_OK_FOR_BASE_P(X) (REGNO (X) < 8 || REGNO (X) >= FRAME_POINTER_REGNUM)
803: /* Nonzero if X is a floating point reg or a pseudo reg. */
804:
805: #else
806:
807: /* Nonzero if X is a hard reg that can be used as an index. */
808: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
809: /* Nonzero if X is a hard reg that can be used as a base reg. */
810: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
811:
812: #endif
813:
814: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
815: that is a valid memory address for an instruction.
816: The MODE argument is the machine mode for the MEM expression
817: that wants to use this address.
818:
819: The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. */
820:
821: /* 1 if X is an address that we could indirect through. */
822: /***** NOTE ***** There is a bug in the Sequent assembler which fails
823: to fixup addressing information for symbols used as offsets
824: from registers which are not FP or SP (or SB or PC). This
825: makes _x(fp) valid, while _x(r0) is invalid. */
826:
827: #define INDIRECTABLE_1_ADDRESS_P(X) \
828: (CONSTANT_ADDRESS_P (X) \
829: || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
830: || (GET_CODE (X) == PLUS \
831: && GET_CODE (XEXP (X, 0)) == REG \
832: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1.1.1.3 ! root 833: && CONSTANT_ADDRESS_P (XEXP (X, 1)) \
! 834: && (GET_CODE (X) != CONST_INT || NS32K_DISPLACEMENT_P (INTVAL (X)))))
1.1 root 835:
1.1.1.3 ! root 836: /* 1 if integer I will fit in a 4 byte displacement field.
! 837: Strictly speaking, we can't be sure that a symbol will fit this range.
! 838: But, in practice, it always will. */
! 839:
! 840: #define NS32K_DISPLACEMENT_P(i) \
! 841: (((i) <= 16777215 && (i) >= -16777216) \
! 842: || ((TARGET_32532 || TARGET_32332) \
! 843: && (i) <= 536870913 && (i) >= -536870912))
! 844:
! 845: /* Check for frame pointer or stack pointer. */
1.1 root 846: #define MEM_REG(X) \
1.1.1.3 ! root 847: (GET_CODE (X) == REG && (REGNO (X) ^ 16) < 2)
1.1 root 848:
1.1.1.3 ! root 849: /* A memory ref whose address is the FP or SP, with optional integer offset,
! 850: or (on certain machines) a constant address. */
1.1 root 851: #define INDIRECTABLE_2_ADDRESS_P(X) \
852: (GET_CODE (X) == MEM \
853: && (((xfoo0 = XEXP (X, 0), MEM_REG (xfoo0)) \
854: || (GET_CODE (xfoo0) == PLUS \
855: && MEM_REG (XEXP (xfoo0, 0)) \
856: && CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfoo0, 1)))) \
857: || (TARGET_SB && CONSTANT_ADDRESS_P (xfoo0))))
858:
859: /* Go to ADDR if X is a valid address not using indexing.
860: (This much is the easy part.) */
861: #define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \
862: { register rtx xfoob = (X); \
1.1.1.3 ! root 863: if (INDIRECTABLE_1_ADDRESS_P (X)) goto ADDR; \
1.1 root 864: if (INDIRECTABLE_2_ADDRESS_P (X)) goto ADDR; \
865: if (GET_CODE (X) == PLUS) \
866: if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (X, 1))) \
867: if (INDIRECTABLE_2_ADDRESS_P (XEXP (X, 0))) \
868: goto ADDR; \
869: }
870:
1.1.1.3 ! root 871: /* Go to ADDR if X is a valid address not using indexing.
! 872: (This much is the easy part.) */
! 873: #define GO_IF_INDEXING(X, MODE, ADDR) \
! 874: { register rtx xfoob = (X); \
! 875: if (GET_CODE (xfoob) == PLUS && INDEX_TERM_P (XEXP (xfoob, 0), MODE)) \
! 876: GO_IF_INDEXABLE_ADDRESS (XEXP (xfoob, 1), ADDR); \
! 877: if (GET_CODE (xfoob) == PLUS && INDEX_TERM_P (XEXP (xfoob, 1), MODE)) \
! 878: GO_IF_INDEXABLE_ADDRESS (XEXP (xfoob, 0), ADDR); } \
! 879:
! 880: #define GO_IF_INDEXABLE_ADDRESS(X, ADDR) \
! 881: { if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR; \
! 882: if (INDIRECTABLE_2_ADDRESS_P (X)) goto ADDR; \
! 883: }
! 884:
1.1 root 885: /* 1 if PROD is either a reg times size of mode MODE
886: or just a reg, if MODE is just one byte. Actually, on the ns32k,
887: since the index mode is independent of the operand size,
888: we can match more stuff...
889:
890: This macro's expansion uses the temporary variables xfoo0, xfoo1
891: and xfoo2 that must be declared in the surrounding context. */
892: #define INDEX_TERM_P(PROD, MODE) \
893: ((GET_CODE (PROD) == REG && REG_OK_FOR_INDEX_P (PROD)) \
894: || (GET_CODE (PROD) == MULT \
895: && (xfoo0 = XEXP (PROD, 0), xfoo1 = XEXP (PROD, 1), \
896: (GET_CODE (xfoo1) == CONST_INT \
897: && GET_CODE (xfoo0) == REG \
898: && FITS_INDEX_RANGE (INTVAL (xfoo1)) \
899: && REG_OK_FOR_INDEX_P (xfoo0)))))
900:
901: #define FITS_INDEX_RANGE(X) \
902: ((xfoo2 = (unsigned)(X)-1), \
903: ((xfoo2 < 4 && xfoo2 != 2) || xfoo2 == 7))
904:
1.1.1.3 ! root 905: /* Note that xfoo0, xfoo1, xfoo2 are used in some of the submacros above. */
1.1 root 906: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1.1.1.3 ! root 907: { register rtx xfooy, xfoo0, xfoo1; \
1.1 root 908: unsigned xfoo2; \
909: xfooy = X; \
910: GO_IF_NONINDEXED_ADDRESS (xfooy, ADDR); \
911: if (GET_CODE (xfooy) == PLUS) \
912: { \
913: if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfooy, 1)) \
914: && GET_CODE (XEXP (xfooy, 0)) == PLUS) \
915: xfooy = XEXP (xfooy, 0); \
916: else if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfooy, 0)) \
917: && GET_CODE (XEXP (xfooy, 1)) == PLUS) \
918: xfooy = XEXP (xfooy, 1); \
1.1.1.3 ! root 919: GO_IF_INDEXING (xfooy, MODE, ADDR); \
1.1 root 920: } \
921: else if (INDEX_TERM_P (xfooy, MODE)) \
922: goto ADDR; \
923: else if (GET_CODE (xfooy) == PRE_DEC) \
924: if (REGNO (XEXP (xfooy, 0)) == STACK_POINTER_REGNUM) goto ADDR; \
925: else abort (); \
926: }
927:
928: /* Try machine-dependent ways of modifying an illegitimate address
929: to be legitimate. If we find one, return the new, valid address.
930: This macro is used in only one place: `memory_address' in explow.c.
931:
932: OLDX is the address as it was before break_out_memory_refs was called.
933: In some cases it is useful to look at this to decide what needs to be done.
934:
935: MODE and WIN are passed so that this macro can use
936: GO_IF_LEGITIMATE_ADDRESS.
937:
938: It is always safe for this macro to do nothing. It exists to recognize
939: opportunities to optimize the output.
940:
941: For the ns32k, we do nothing */
942:
943: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}
944:
945: /* Go to LABEL if ADDR (a legitimate address expression)
946: has an effect that depends on the machine mode it is used for.
947: On the ns32k, only predecrement and postincrement address depend thus
948: (the amount of decrement or increment being the length of the operand). */
949:
950: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
951: { if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) \
952: goto LABEL;}
953:
954: /* Specify the machine mode that this machine uses
955: for the index in the tablejump instruction.
956: Can do SImode, but HI mode is more efficient. */
957: #define CASE_VECTOR_MODE HImode
958:
959: /* Define this if the tablejump instruction expects the table
960: to contain offsets from the address of the table.
961: Do not define this if the table should contain absolute addresses. */
962: #define CASE_VECTOR_PC_RELATIVE
963:
964: /* Specify the tree operation to be used to convert reals to integers. */
965: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
966:
967: /* This is the kind of divide that is easiest to do in the general case. */
968: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
969:
970: /* Define this as 1 if `char' should by default be signed; else as 0. */
971: #define DEFAULT_SIGNED_CHAR 1
972:
973: /* Max number of bytes we can move from memory to memory
974: in one reasonably fast instruction. */
975: #define MOVE_MAX 4
976:
977: /* Define this if zero-extension is slow (more than one real instruction). */
978: /* #define SLOW_ZERO_EXTEND */
979:
980: /* Nonzero if access to memory by bytes is slow and undesirable. */
981: #define SLOW_BYTE_ACCESS 0
982:
983: /* Define if shifts truncate the shift count
984: which implies one can omit a sign-extension or zero-extension
985: of a shift count. */
986: /* #define SHIFT_COUNT_TRUNCATED */
987:
988: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
989: is done just by pretending it is already truncated. */
990: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
991:
992: /* We assume that the store-condition-codes instructions store 0 for false
993: and some other value for true. This is the value stored for true. */
994:
995: #define STORE_FLAG_VALUE 1
996:
997: /* Specify the machine mode that pointers have.
998: After generation of rtl, the compiler makes no further distinction
999: between pointers and any other objects of this machine mode. */
1000: #define Pmode SImode
1001:
1002: /* A function address in a call instruction
1003: is a byte address (for indexing purposes)
1004: so give the MEM rtx a byte's mode. */
1005: #define FUNCTION_MODE QImode
1006:
1007: /* Compute the cost of address ADDRESS. */
1008:
1009: #define ADDRESS_COST(RTX) calc_address_cost (RTX)
1010:
1011: /* Compute the cost of computing a constant rtl expression RTX
1012: whose rtx-code is CODE. The body of this macro is a portion
1013: of a switch statement. If the code is computed here,
1014: return it with a return statement. Otherwise, break from the switch. */
1015:
1.1.1.3 ! root 1016: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1.1 root 1017: case CONST_INT: \
1018: if (INTVAL (RTX) <= 7 && INTVAL (RTX) >= -8) return 0; \
1019: if (INTVAL (RTX) < 0x4000 && INTVAL (RTX) >= -0x4000) \
1020: return 1; \
1021: case CONST: \
1022: case LABEL_REF: \
1023: case SYMBOL_REF: \
1024: return 3; \
1025: case CONST_DOUBLE: \
1026: return 5;
1027:
1028: /* Tell final.c how to eliminate redundant test instructions. */
1029:
1030: /* Here we define machine-dependent flags and fields in cc_status
1031: (see `conditions.h'). */
1032:
1033: /* This bit means that what ought to be in the Z bit
1034: should be tested in the F bit. */
1035: #define CC_Z_IN_F 04000
1036:
1037: /* This bit means that what ought to be in the Z bit
1038: is complemented in the F bit. */
1039: #define CC_Z_IN_NOT_F 010000
1040:
1041: /* Store in cc_status the expressions
1042: that the condition codes will describe
1043: after execution of an instruction whose pattern is EXP.
1044: Do not alter them if the instruction would not alter the cc's. */
1045:
1046: #define NOTICE_UPDATE_CC(EXP, INSN) \
1047: { if (GET_CODE (EXP) == SET) \
1048: { if (GET_CODE (SET_DEST (EXP)) == CC0) \
1049: { cc_status.flags = 0; \
1050: cc_status.value1 = SET_DEST (EXP); \
1051: cc_status.value2 = SET_SRC (EXP); \
1052: } \
1053: else if (GET_CODE (SET_SRC (EXP)) == CALL) \
1054: { CC_STATUS_INIT; } \
1055: else if (GET_CODE (SET_DEST (EXP)) == REG) \
1056: { if (cc_status.value1 \
1057: && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value1)) \
1058: cc_status.value1 = 0; \
1059: if (cc_status.value2 \
1060: && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value2)) \
1061: cc_status.value2 = 0; \
1062: } \
1063: else if (GET_CODE (SET_DEST (EXP)) == MEM) \
1064: { CC_STATUS_INIT; } \
1065: } \
1066: else if (GET_CODE (EXP) == PARALLEL \
1067: && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \
1068: { if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == CC0) \
1069: { cc_status.flags = 0; \
1070: cc_status.value1 = SET_DEST (XVECEXP (EXP, 0, 0)); \
1071: cc_status.value2 = SET_SRC (XVECEXP (EXP, 0, 0)); \
1072: } \
1073: else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == REG) \
1074: { if (cc_status.value1 \
1075: && reg_overlap_mentioned_p (SET_DEST (XVECEXP (EXP, 0, 0)), cc_status.value1)) \
1076: cc_status.value1 = 0; \
1077: if (cc_status.value2 \
1078: && reg_overlap_mentioned_p (SET_DEST (XVECEXP (EXP, 0, 0)), cc_status.value2)) \
1079: cc_status.value2 = 0; \
1080: } \
1081: else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == MEM) \
1082: { CC_STATUS_INIT; } \
1083: } \
1084: else if (GET_CODE (EXP) == CALL) \
1085: { /* all bets are off */ CC_STATUS_INIT; } \
1086: else { /* nothing happens? CC_STATUS_INIT; */} \
1087: if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \
1088: && cc_status.value2 \
1089: && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \
1090: abort (); \
1091: }
1092:
1093: /* Describe the costs of the following register moves which are discouraged:
1094: 1.) Moves between the Floating point registers and the frame pointer and stack pointer
1095: 2.) Moves between the stack pointer and the frame pointer
1096: 3.) Moves between the floating point and general registers */
1097:
1098: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1099: ((((CLASS1) == FLOAT_REGS && ((CLASS2) == STACK_POINTER_REG || (CLASS2) == FRAME_POINTER_REG)) \
1100: || ((CLASS2) == FLOAT_REGS && ((CLASS1) == STACK_POINTER_REG || (CLASS1) == FRAME_POINTER_REG)) \
1101: || ((CLASS1) == STACK_POINTER_REG && (CLASS2) == FRAME_POINTER_REG) \
1102: || ((CLASS2) == STACK_POINTER_REG && (CLASS1) == FRAME_POINTER_REG) \
1103: || ((CLASS1) == FLOAT_REGS && (CLASS2) == GENERAL_REGS) \
1104: || ((CLASS1) == GENERAL_REGS && (CLASS2) == FLOAT_REGS)) \
1105: ? 4 : 2)
1106:
1107: #define OUTPUT_JUMP(NORMAL, NO_OV) \
1108: { if (cc_status.flags & CC_NO_OVERFLOW) \
1109: return NO_OV; \
1110: return NORMAL; }
1111:
1112: /* Dividing the output into sections */
1113:
1114: /* Output before read-only data. */
1115:
1116: #define TEXT_SECTION_ASM_OP ".text"
1117:
1118: /* Output before writable data. */
1119:
1120: #define DATA_SECTION_ASM_OP ".data"
1121:
1122: /* Define the output Assembly Language */
1123:
1124: /* Output at beginning of assembler file. */
1125:
1126: #define ASM_FILE_START(FILE) fprintf (FILE, "#NO_APP\n");
1127:
1128: /* Output to assembler file text saying following lines
1129: may contain character constants, extra white space, comments, etc. */
1130:
1131: #define ASM_APP_ON "#APP\n"
1132:
1133: /* Output to assembler file text saying following lines
1134: no longer contain unusual constructs. */
1135:
1136: #define ASM_APP_OFF "#NO_APP\n"
1137:
1138: /* Output of Data */
1139:
1140: /* This is how to output an assembler line defining a `double' constant. */
1141:
1142: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1143: fprintf (FILE, "\t.double 0d%.20e\n", (VALUE))
1144:
1145: /* This is how to output an assembler line defining a `float' constant. */
1146:
1147: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1148: fprintf (FILE, "\t.float 0f%.20e\n", (VALUE))
1149:
1150: /* This is how to output an assembler line defining an `int' constant. */
1151:
1152: #define ASM_OUTPUT_INT(FILE,VALUE) \
1153: ( fprintf (FILE, "\t.long "), \
1154: output_addr_const (FILE, (VALUE)), \
1155: fprintf (FILE, "\n"))
1156:
1157: /* Likewise for `char' and `short' constants. */
1158:
1159: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1160: ( fprintf (FILE, "\t.word "), \
1161: output_addr_const (FILE, (VALUE)), \
1162: fprintf (FILE, "\n"))
1163:
1164: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1165: ( fprintf (FILE, "\t.byte "), \
1166: output_addr_const (FILE, (VALUE)), \
1167: fprintf (FILE, "\n"))
1168:
1169: /* This is how to output an assembler line for a numeric constant byte. */
1170:
1171: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1172: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1173:
1174: /* This is how to output an assembler line defining an external/static
1175: address which is not in tree format (for collect.c). */
1176:
1177: #define ASM_OUTPUT_LABELREF_AS_INT(STREAM, NAME) \
1178: do { \
1179: fprintf (STREAM, "\t.long\t"); \
1180: ASM_OUTPUT_LABELREF (STREAM, NAME); \
1181: fprintf (STREAM, "\n"); \
1182: } while (0)
1183:
1184: /* This is how to output an insn to push a register on the stack.
1185: It need not be very fast code. */
1186:
1187: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1188: fprintf (FILE, "\tmovd %s,tos\n", reg_names[REGNO])
1189:
1190: /* This is how to output an insn to pop a register from the stack.
1191: It need not be very fast code. */
1192:
1193: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1194: fprintf (FILE, "\tmovd tos,%s\n", reg_names[REGNO])
1195:
1196: /* How to refer to registers in assembler output.
1197: This sequence is indexed by compiler's hard-register-number (see above). */
1198:
1199: #define REGISTER_NAMES \
1200: {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
1201: "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
1202: "fp", "sp"}
1203:
1204: /* How to renumber registers for dbx and gdb.
1205: NS32000 may need more change in the numeration. */
1206:
1207: #define DBX_REGISTER_NUMBER(REGNO) ((REGNO < 8) ? (REGNO)+4 : (REGNO))
1208:
1209: /* This is how to output the definition of a user-level label named NAME,
1210: such as the label on a static function or variable NAME. */
1211:
1212: #ifndef COLLECT
1213: #define ASM_OUTPUT_LABEL(FILE,NAME) \
1214: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1215: #else
1216: #define ASM_OUTPUT_LABEL(STREAM,NAME) \
1217: do { \
1218: fprintf (STREAM, "%s:\n", NAME); \
1219: } while (0)
1220: #endif
1221:
1222: /* This is how to output a command to make the user-level label named NAME
1223: defined for reference from other files. */
1224:
1225: #ifndef COLLECT
1226: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1227: do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1228: #else
1229: #define ASM_GLOBALIZE_LABEL(STREAM,NAME) \
1230: do { \
1231: fprintf (STREAM, "\t.globl\t%s\n", NAME); \
1232: } while (0)
1233: #endif
1234:
1235: /* This is how to output a reference to a user-level label named NAME.
1236: `assemble_name' uses this. */
1237:
1238: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1239: fprintf (FILE, "_%s", NAME)
1240:
1241: /* This is how to output an internal numbered label where
1242: PREFIX is the class of label and NUM is the number within the class. */
1243:
1244: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1245: fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1246:
1247: /* This is how to store into the string LABEL
1248: the symbol_ref name of an internal numbered label where
1249: PREFIX is the class of label and NUM is the number within the class.
1250: This is suitable for output with `assemble_name'. */
1251:
1252: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1253: sprintf (LABEL, "*%s%d", PREFIX, NUM)
1254:
1255: /* This is how to align the code that follows an unconditional branch. */
1256:
1257: #define ASM_OUTPUT_ALIGN_CODE(FILE) \
1258: fprintf (FILE, "\t.align 2\n")
1259:
1260: /* This is how to output an element of a case-vector that is absolute.
1261: (The ns32k does not use such vectors,
1262: but we must define this macro anyway.) */
1263:
1264: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1265: fprintf (FILE, "\t.long L%d\n", VALUE)
1266:
1267: /* This is how to output an element of a case-vector that is relative. */
1268: /* ** Notice that the second element is LI format! */
1269: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1270: fprintf (FILE, "\t.word L%d-LI%d\n", VALUE, REL)
1271:
1272: /* This is how to output an assembler line
1273: that says to advance the location counter
1274: to a multiple of 2**LOG bytes. */
1275:
1276: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1277: fprintf (FILE, "\t.align %d\n", (LOG))
1278:
1279: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1280: fprintf (FILE, "\t.space %u\n", (SIZE))
1281:
1282: /* This says how to output an assembler line
1283: to define a global common symbol. */
1284:
1285: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1286: ( fputs (".comm ", (FILE)), \
1287: assemble_name ((FILE), (NAME)), \
1288: fprintf ((FILE), ",%u\n", (ROUNDED)))
1289:
1290: /* This says how to output an assembler line
1291: to define a local common symbol. */
1292:
1293: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1294: ( fputs (".lcomm ", (FILE)), \
1295: assemble_name ((FILE), (NAME)), \
1296: fprintf ((FILE), ",%u\n", (ROUNDED)))
1297:
1298: /* Store in OUTPUT a string (made with alloca) containing
1299: an assembler-name for a local static variable named NAME.
1300: LABELNO is an integer which is different for each call. */
1301:
1302: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1303: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1304: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1305:
1306: /* Define the parentheses used to group arithmetic operations
1307: in assembler code. */
1308:
1309: #define ASM_OPEN_PAREN "("
1310: #define ASM_CLOSE_PAREN ")"
1311:
1312: /* Define results of standard character escape sequences. */
1313: #define TARGET_BELL 007
1314: #define TARGET_BS 010
1315: #define TARGET_TAB 011
1316: #define TARGET_NEWLINE 012
1317: #define TARGET_VT 013
1318: #define TARGET_FF 014
1319: #define TARGET_CR 015
1320:
1321: /* Print an instruction operand X on file FILE.
1322: CODE is the code from the %-spec that requested printing this operand;
1323: if `%z3' was used to print operand 3, then CODE is 'z'. */
1324:
1325: /* %$ means print the prefix for an immediate operand. */
1326:
1327: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1328: ((CODE) == '$' || (CODE) == '?')
1329:
1330: #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE, X, CODE)
1331:
1332: /* Print a memory operand whose address is X, on file FILE. */
1333:
1334: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address(FILE, ADDR)
1335:
1336: /* Define functions in ns32k.c and used in insn-output.c. */
1337:
1338: extern char *output_move_double ();
1339: extern char *output_shift_insn ();
1340:
1341: /*
1342: Local variables:
1343: version-control: t
1344: End:
1345: */
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