--- gcc/config/ns32k.md	2018/04/24 17:51:36	1.1.1.1
+++ gcc/config/ns32k.md	2018/04/24 18:05:36	1.1.1.4
@@ -6,7 +6,7 @@
 ;;   I.e., one cannot say "cmpd _p,@_x"
 ;; Implement unsigned multiplication??
 
-;;- Machine descrption for GNU compiler
+;;- Machine description for GNU compiler
 ;;- ns32000 Version
 ;;   Copyright (C) 1988 Free Software Foundation, Inc.
 ;;   Contributed by Michael Tiemann (tiemann@mcc.com)
@@ -242,8 +242,13 @@
 	return \"movf %1,tos\;movd tos,%0\";
       return \"movf %1,%0\";
     }
-#if 0
-#ifndef GAS_SYNTAX
+#if 0 /* Someone suggested this for the Sequent.  Is it needed?  */
+  else if (GET_CODE (operands[1]) == CONST_DOUBLE)
+    return \"movf %1,%0\";
+#endif
+/* There was a #if 0 around this, but that was erroneous
+   for many machines -- rms.  */
+#ifndef MOVD_FLOAT_OK
   /* GAS understands floating constants in ordinary movd instructions
      but other assemblers might object.  */
   else if (GET_CODE (operands[1]) == CONST_DOUBLE)
@@ -258,7 +263,6 @@
       return \"movd %1,%0\";
     }
 #endif
-#endif
   else return \"movd %1,%0\";
 }")
 
@@ -310,8 +314,8 @@
   "lprd sp,%0")
 
 (define_insn "movsi"
-  [(set (match_operand:SI 0 "general_operand" "=g<,*f,g")
-	(match_operand:SI 1 "general_operand" "gxy,g,*f"))]
+  [(set (match_operand:SI 0 "general_operand" "=g<,g<,*f,g")
+	(match_operand:SI 1 "general_operand" "g,?xy,g,*f"))]
   ""
   "*
 {
@@ -473,11 +477,24 @@
   return \"movb %1,%0\";
 }")
 
+;; This is here to accept 4 arguments and pass the first 3 along
+;; to the movstrsi1 pattern that really does the work.
+(define_expand "movstrsi"
+  [(set (match_operand:BLK 0 "general_operand" "=g")
+	(match_operand:BLK 1 "general_operand" "g"))
+   (use (match_operand:SI 2 "general_operand" "rmn"))
+   (match_operand 3 "" "")]
+  ""
+  "
+  emit_insn (gen_movstrsi1 (operands[0], operands[1], operands[2]));
+  DONE;
+")
+
 ;; The definition of this insn does not really explain what it does,
 ;; but it should suffice
 ;; that anything generated as this insn will be recognized as one
 ;; and that it won't successfully combine with anything.
-(define_insn "movstrsi"
+(define_insn "movstrsi1"
   [(set (match_operand:BLK 0 "general_operand" "=g")
 	(match_operand:BLK 1 "general_operand" "g"))
    (use (match_operand:SI 2 "general_operand" "rmn"))
@@ -820,8 +837,8 @@
   "addr %c1(sp),%0")
 
 (define_insn "addsi3"
-  [(set (match_operand:SI 0 "general_operand" "=g,=g<")
-	(plus:SI (match_operand:SI 1 "general_operand" "%0,%r")
+  [(set (match_operand:SI 0 "general_operand" "=g,=g&<")
+	(plus:SI (match_operand:SI 1 "general_operand" "%0,r")
 		 (match_operand:SI 2 "general_operand" "rmn,n")))]
   ""
   "*
@@ -829,10 +846,10 @@
   if (which_alternative == 1)
     {
       int i = INTVAL (operands[2]);
-      if ( i < 0x40000000 && i >= -0x40000000 )
-	  return \"addr %c2(%1),%0\";
+      if (NS32K_DISPLACEMENT_P (i))
+	return \"addr %c2(%1),%0\";
       else
-	  return \"movd %1,%0\;addd %2,%0\";
+	return \"movd %1,%0\;addd %2,%0\";
     }
   if (GET_CODE (operands[2]) == CONST_INT)
     {
@@ -1855,6 +1872,18 @@
     return \"adjspb %$-4\";
 }")
 
+(define_insn ""
+  [(set (match_operand:SI 0 "general_operand" "=g<")
+	(zero_extract:SI (match_operand:SI 1 "register_operand" "g")
+			 (match_operand:SI 2 "const_int_operand" "i")
+			 (match_operand:SI 3 "general_operand" "rK")))]
+  ""
+  "*
+{ if (GET_CODE (operands[3]) == CONST_INT)
+    return \"extsd %1,%0,%3,%2\";
+  else return \"extd %3,%1,%0,%2\";
+}")
+
 (define_insn "extzv"
   [(set (match_operand:SI 0 "general_operand" "=g<")
 	(zero_extract:SI (match_operand:QI 1 "general_operand" "g")
@@ -2179,19 +2208,25 @@
       rtx temp = XEXP (operands[0], 0);
       if (CONSTANT_ADDRESS_P (temp))
 	{
+#ifdef ENCORE_ASM
+	  return \"bsr %?%0\";
+#else
+#ifdef CALL_MEMREF_IMPLICIT
 	  operands[0] = temp;
 	  return \"bsr %0\";
-#if 0
+#else
 #ifdef GNX_V3
 	  return \"bsr %0\";
 #else
 	  return \"bsr %?%a0\";
 #endif
 #endif
+#endif
 	}
       if (GET_CODE (XEXP (operands[0], 0)) == REG)
+#if defined (GNX_V3) || defined (CALL_MEMREF_IMPLICIT)
 	return \"jsr %0\";
-#if 0
+#else
         return \"jsr %a0\";
 #endif
     }
@@ -2212,19 +2247,25 @@
       rtx temp = XEXP (operands[1], 0);
       if (CONSTANT_ADDRESS_P (temp))
 	{
+#ifdef ENCORE_ASM
+	  return \"bsr %?%1\";
+#else
+#ifdef CALL_MEMREF_IMPLICIT
 	  operands[1] = temp;
 	  return \"bsr %1\";
-#if 0
+#else
 #ifdef GNX_V3
 	  return \"bsr %1\";
 #else
 	  return \"bsr %?%a1\";
 #endif
 #endif
+#endif
 	}
       if (GET_CODE (XEXP (operands[1], 0)) == REG)
+#if defined (GNX_V3) || defined (CALL_MEMREF_IMPLICIT)
 	return \"jsr %1\";
-#if 0
+#else
         return \"jsr %a1\";
 #endif
     }