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1.1 root 1: /* Definitions of target machine for GNU compiler. NS32000 version.
2: Copyright (C) 1988 Free Software Foundation, Inc.
3: Contributed by Michael Tiemann ([email protected])
4:
5: This file is part of GNU CC.
6:
7: GNU CC is free software; you can redistribute it and/or modify
8: it under the terms of the GNU General Public License as published by
9: the Free Software Foundation; either version 2, or (at your option)
10: any later version.
11:
12: GNU CC is distributed in the hope that it will be useful,
13: but WITHOUT ANY WARRANTY; without even the implied warranty of
14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15: GNU General Public License for more details.
16:
17: You should have received a copy of the GNU General Public License
18: along with GNU CC; see the file COPYING. If not, write to
19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20:
21:
22: /* Note that some other tm.h files include this one and then override
23: many of the definitions that relate to assembler syntax. */
24:
25: extern enum reg_class secondary_reload_class();
26:
27: /* Names to predefine in the preprocessor for this target machine. */
28:
29: #define CPP_PREDEFINES "-Dns32000 -Dunix"
30:
31: /* Print subsidiary information on the compiler version in use. */
32: #define TARGET_VERSION fprintf (stderr, " (32000, GAS syntax)");
33:
34:
35: /* ABSOLUTE PREFIX, IMMEDIATE_PREFIX and EXTERNAL_PREFIX can be defined
36: to cover most NS32k addressing syntax variations. This way we don't
37: need to redefine long macros in all the tm.h files for just slight
38: variations in assembler syntax. */
39:
40: #ifndef ABSOLUTE_PREFIX
41: #define ABSOLUTE_PREFIX '@'
42: #endif
43:
44: #if defined(IMMEDIATE_PREFIX) && IMMEDIATE_PREFIX
45: #define PUT_IMMEDIATE_PREFIX(FILE) putc(IMMEDIATE_PREFIX, FILE)
46: #else
47: #define PUT_IMMEDIATE_PREFIX(FILE)
48: #endif
49: #if defined(ABSOLUTE_PREFIX) && ABSOLUTE_PREFIX
50: #define PUT_ABSOLUTE_PREFIX(FILE) putc(ABSOLUTE_PREFIX, FILE)
51: #else
52: #define PUT_ABSOLUTE_PREFIX(FILE)
53: #endif
54: #if defined(EXTERNAL_PREFIX) && EXTERNAL_PREFIX
55: #define PUT_EXTERNAL_PREFIX(FILE) putc(EXTERNAL_PREFIX, FILE)
56: #else
57: #define PUT_EXTERNAL_PREFIX(FILE)
58: #endif
59:
60: /* Run-time compilation parameters selecting different hardware subsets. */
61:
62: extern int target_flags;
63:
64: /* Macros used in the machine description to test the flags. */
65:
66: /* Compile 32081 insns for floating point (not library calls). */
67: #define TARGET_32081 (target_flags & 1)
68:
69: /* Compile using rtd insn calling sequence.
70: This will not work unless you use prototypes at least
71: for all functions that can take varying numbers of args. */
72: #define TARGET_RTD (target_flags & 2)
73:
74: /* Compile passing first two args in regs 0 and 1. */
75: #define TARGET_REGPARM (target_flags & 4)
76:
77: /* Options to select type of CPU, for better optimization.
78: The output is correct for any kind of 32000 regardless of these options. */
79: #define TARGET_32532 (target_flags & 8)
80: #define TARGET_32332 (target_flags & 16)
81:
82: /* Ok to use the static base register (and presume it's 0) */
83: #define TARGET_SB ((target_flags & 32) == 0)
84:
85: /* Macro to define tables used to set the flags.
86: This is a list in braces of pairs in braces,
87: each pair being { "NAME", VALUE }
88: where VALUE is the bits to set or minus the bits to clear.
89: An empty string NAME is used to identify the default VALUE. */
90:
91: #define TARGET_SWITCHES \
92: { { "32081", 1}, \
93: { "soft-float", -1}, \
94: { "rtd", 2}, \
95: { "nortd", -2}, \
96: { "regparm", 4}, \
97: { "noregparm", -4}, \
98: { "32532", 24}, \
99: { "32332", -8}, \
100: { "32332", 16}, \
101: { "32032", -24}, \
102: { "sb", -32}, \
103: { "nosb", 32}, \
104: { "", TARGET_DEFAULT}}
105: /* TARGET_DEFAULT is defined in encore.h, pc532.h, etc. */
106:
107: /* target machine storage layout */
108:
109: /* Define this if most significant bit is lowest numbered
110: in instructions that operate on numbered bit-fields.
111: This is not true on the ns32k. */
112: #define BITS_BIG_ENDIAN 0
113:
114: /* Define this if most significant byte of a word is the lowest numbered. */
115: /* That is not true on the ns32k. */
116: #define BYTES_BIG_ENDIAN 0
117:
118: /* Define this if most significant word of a multiword number is lowest
119: numbered. This is not true on the ns32k. */
120: #define WORDS_BIG_ENDIAN 0
121:
122: /* Number of bits in an addressable storage unit */
123: #define BITS_PER_UNIT 8
124:
125: /* Width in bits of a "word", which is the contents of a machine register.
126: Note that this is not necessarily the width of data type `int';
127: if using 16-bit ints on a 32000, this would still be 32.
128: But on a machine with 16-bit registers, this would be 16. */
129: #define BITS_PER_WORD 32
130:
131: /* Width of a word, in units (bytes). */
132: #define UNITS_PER_WORD 4
133:
134: /* Width in bits of a pointer.
135: See also the macro `Pmode' defined below. */
136: #define POINTER_SIZE 32
137:
138: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
139: #define PARM_BOUNDARY 32
140:
141: /* Boundary (in *bits*) on which stack pointer should be aligned. */
142: #define STACK_BOUNDARY 32
143:
144: /* Allocation boundary (in *bits*) for the code of a function. */
145: #define FUNCTION_BOUNDARY 16
146:
147: /* Alignment of field after `int : 0' in a structure. */
148: #define EMPTY_FIELD_BOUNDARY 32
149:
150: /* Every structure's size must be a multiple of this. */
151: #define STRUCTURE_SIZE_BOUNDARY 8
152:
153: /* No data type wants to be aligned rounder than this. */
154: #define BIGGEST_ALIGNMENT 32
155:
156: /* Set this nonzero if move instructions will actually fail to work
157: when given unaligned data. National claims that the NS32032
158: works without strict alignment, but rumor has it that operands
159: crossing a page boundary cause unpredictable results. */
160: #define STRICT_ALIGNMENT 1
161:
162: /* If bit field type is int, dont let it cross an int,
163: and give entire struct the alignment of an int. */
164: /* Required on the 386 since it doesn't have a full set of bitfield insns.
165: (There is no signed extv insn.) */
166: #define PCC_BITFIELD_TYPE_MATTERS 1
167:
168: /* Standard register usage. */
169:
170: /* Number of actual hardware registers.
171: The hardware registers are assigned numbers for the compiler
172: from 0 to just below FIRST_PSEUDO_REGISTER.
173: All registers that the compiler knows about must be given numbers,
174: even those that are not normally considered general registers. */
175: #define FIRST_PSEUDO_REGISTER 18
176:
177: /* 1 for registers that have pervasive standard uses
178: and are not available for the register allocator.
179: On the ns32k, these are the FP, SP, (SB and PC are not included here). */
180: #define FIXED_REGISTERS {0, 0, 0, 0, 0, 0, 0, 0, \
181: 0, 0, 0, 0, 0, 0, 0, 0, \
182: 1, 1}
183:
184: /* 1 for registers not available across function calls.
185: These must include the FIXED_REGISTERS and also any
186: registers that can be used without being saved.
187: The latter must include the registers where values are returned
188: and the register where structure-value addresses are passed.
189: Aside from that, you can include as many other registers as you like. */
190: #define CALL_USED_REGISTERS {1, 1, 1, 0, 0, 0, 0, 0, \
191: 1, 1, 1, 1, 0, 0, 0, 0, \
192: 1, 1}
193:
194: /* Return number of consecutive hard regs needed starting at reg REGNO
195: to hold something of mode MODE.
196: This is ordinarily the length in words of a value of mode MODE
197: but can be less for certain modes in special long registers.
198: On the ns32k, all registers are 32 bits long. */
199: #define HARD_REGNO_NREGS(REGNO, MODE) \
200: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
201:
202: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
203: #define HARD_REGNO_MODE_OK(REGNO, MODE) hard_regno_mode_ok (REGNO, MODE)
204:
205: /* Value is 1 if it is a good idea to tie two pseudo registers
206: when one has mode MODE1 and one has mode MODE2.
207: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
208: for any hard reg, then this must be 0 for correct output. */
209: #define MODES_TIEABLE_P(MODE1, MODE2) \
210: (((MODE1) == DFmode || (MODE1) == DCmode || (MODE1) == DImode) == \
211: ((MODE2) == DFmode || (MODE2) == DCmode || (MODE2) == DImode))
212:
213: /* Specify the registers used for certain standard purposes.
214: The values of these macros are register numbers. */
215:
216: /* NS32000 pc is not overloaded on a register. */
217: /* #define PC_REGNUM */
218:
219: /* Register to use for pushing function arguments. */
220: #define STACK_POINTER_REGNUM 17
221:
222: /* Base register for access to local variables of the function. */
223: #define FRAME_POINTER_REGNUM 16
224:
225: /* Value should be nonzero if functions must have frame pointers.
226: Zero means the frame pointer need not be set up (and parms
227: may be accessed via the stack pointer) in functions that seem suitable.
228: This is computed in `reload', in reload1.c. */
229: #define FRAME_POINTER_REQUIRED 0
230:
231: /* Base register for access to arguments of the function. */
232: #define ARG_POINTER_REGNUM 16
233:
234: /* Register in which static-chain is passed to a function. */
235: #define STATIC_CHAIN_REGNUM 1
236:
237: /* Register in which address to store a structure value
238: is passed to a function. */
239: #define STRUCT_VALUE_REGNUM 2
240:
241: /* Define the classes of registers for register constraints in the
242: machine description. Also define ranges of constants.
243:
244: One of the classes must always be named ALL_REGS and include all hard regs.
245: If there is more than one class, another class must be named NO_REGS
246: and contain no registers.
247:
248: The name GENERAL_REGS must be the name of a class (or an alias for
249: another name such as ALL_REGS). This is the class of registers
250: that is allowed by "g" or "r" in a register constraint.
251: Also, registers outside this class are allocated only when
252: instructions express preferences for them.
253:
254: The classes must be numbered in nondecreasing order; that is,
255: a larger-numbered class must never be contained completely
256: in a smaller-numbered class.
257:
258: For any two classes, it is very desirable that there be another
259: class that represents their union. */
260:
261: enum reg_class { NO_REGS, GENERAL_REGS, FLOAT_REGS, GEN_AND_FP_REGS,
262: FRAME_POINTER_REG, STACK_POINTER_REG,
263: GEN_AND_MEM_REGS, ALL_REGS, LIM_REG_CLASSES };
264:
265: #define N_REG_CLASSES (int) LIM_REG_CLASSES
266:
267: /* Give names of register classes as strings for dump file. */
268:
269: #define REG_CLASS_NAMES \
270: {"NO_REGS", "GENERAL_REGS", "FLOAT_REGS", "GEN_AND_FP_REGS", \
271: "FRAME_POINTER_REG", "STACK_POINTER_REG", "GEN_AND_MEM_REGS", "ALL_REGS" }
272:
273: /* Define which registers fit in which classes.
274: This is an initializer for a vector of HARD_REG_SET
275: of length N_REG_CLASSES. */
276:
277: #define REG_CLASS_CONTENTS {0, 0x00ff, 0xff00, 0xffff, \
278: 0x10000, 0x20000, 0x300ff, 0x3ffff }
279:
280: /* The same information, inverted:
281: Return the class number of the smallest class containing
282: reg number REGNO. This could be a conditional expression
283: or could index an array. */
284:
285: #define REGNO_REG_CLASS(REGNO) \
286: ((REGNO) < 8 ? GENERAL_REGS \
287: : (REGNO) < 16 ? FLOAT_REGS \
288: : (REGNO) == 16 ? FRAME_POINTER_REG \
289: : (REGNO) == 17 ? STACK_POINTER_REG \
290: : NO_REGS)
291:
292: /* The class value for index registers, and the one for base regs. */
293:
294: #define INDEX_REG_CLASS GENERAL_REGS
295: #define BASE_REG_CLASS GEN_AND_MEM_REGS
296:
297: /* Get reg_class from a letter such as appears in the machine description. */
298:
299: #define REG_CLASS_FROM_LETTER(C) \
300: ((C) == 'f' ? FLOAT_REGS \
301: : (C) == 'x' ? FRAME_POINTER_REG \
302: : (C) == 'y' ? STACK_POINTER_REG \
303: : NO_REGS)
304:
305: /* The letters I, J, K, L and M in a register constraint string
306: can be used to stand for particular ranges of immediate operands.
307: This macro defines what the ranges are.
308: C is the letter, and VALUE is a constant value.
309: Return 1 if VALUE is in the range specified by C.
310:
311: On the ns32k, these letters are used as follows:
312:
313: I : Matches integers which are valid shift amounts for scaled indexing.
314: These are 0, 1, 2, 3 for byte, word, double, and quadword.
315: Used for matching arithmetic shifts only on 32032 & 32332.
316: J : Matches integers which fit a "quick" operand.
317: K : Matches integers 0 to 7 (for inss and exts instructions).
318: */
319:
320: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
321: ((VALUE) < 8 && (VALUE) + 8 >= 0 ? \
322: ((C) == 'I' ? (!TARGET_32532 && 0 <= (VALUE) && (VALUE) <= 3) : \
323: (C) == 'J' ? (VALUE) <= 7 : \
324: (C) == 'K' ? 0 <= (VALUE) : 0) : 0)
325:
326: /* Similar, but for floating constants, and defining letters G and H.
327: Here VALUE is the CONST_DOUBLE rtx itself. */
328:
329: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
330:
331: /* Given an rtx X being reloaded into a reg required to be
332: in class CLASS, return the class of reg to actually use.
333: In general this is just CLASS; but on some machines
334: in some cases it is preferable to use a more restrictive class. */
335:
336: /* We return GENERAL_REGS instead of GEN_AND_MEM_REGS.
337: The latter offers no real additional possibilities
338: and can cause spurious secondary reloading. */
339: #define PREFERRED_RELOAD_CLASS(X,CLASS) \
340: ((CLASS) == GEN_AND_MEM_REGS ? GENERAL_REGS : (CLASS))
341:
342: /* Return the maximum number of consecutive registers
343: needed to represent mode MODE in a register of class CLASS. */
344: /* On the 32000, this is the size of MODE in words */
345: #define CLASS_MAX_NREGS(CLASS, MODE) \
346: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
347:
348: /* Stack layout; function entry, exit and calling. */
349:
350: /* Define this if pushing a word on the stack
351: makes the stack pointer a smaller address. */
352: #define STACK_GROWS_DOWNWARD
353:
354: /* Define this if the nominal address of the stack frame
355: is at the high-address end of the local variables;
356: that is, each additional local variable allocated
357: goes at a more negative offset in the frame. */
358: #define FRAME_GROWS_DOWNWARD
359:
360: /* Offset within stack frame to start allocating local variables at.
361: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
362: first local allocated. Otherwise, it is the offset to the BEGINNING
363: of the first local allocated. */
364: #define STARTING_FRAME_OFFSET 0
365:
366: /* If we generate an insn to push BYTES bytes,
367: this says how many the stack pointer really advances by.
368: On the 32000, sp@- in a byte insn really pushes a BYTE. */
369: #define PUSH_ROUNDING(BYTES) (BYTES)
370:
371: /* Offset of first parameter from the argument pointer register value. */
372: #define FIRST_PARM_OFFSET(FNDECL) 8
373:
374: /* Value is the number of byte of arguments automatically
375: popped when returning from a subroutine call.
376: FUNTYPE is the data type of the function (as a tree),
377: or for a library call it is an identifier node for the subroutine name.
378: SIZE is the number of bytes of arguments passed on the stack.
379:
380: On the 32000, the RET insn may be used to pop them if the number
381: of args is fixed, but if the number is variable then the caller
382: must pop them all. RET can't be used for library calls now
383: because the library is compiled with the Unix compiler.
384: Use of RET is a selectable option, since it is incompatible with
385: standard Unix calling sequences. If the option is not selected,
386: the caller must always pop the args. */
387:
388: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) \
389: ((TARGET_RTD && TREE_CODE (FUNTYPE) != IDENTIFIER_NODE \
390: && (TYPE_ARG_TYPES (FUNTYPE) == 0 \
391: || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \
392: == void_type_node))) \
393: ? (SIZE) : 0)
394:
395: /* Define how to find the value returned by a function.
396: VALTYPE is the data type of the value (as a tree).
397: If the precise function being called is known, FUNC is its FUNCTION_DECL;
398: otherwise, FUNC is 0. */
399:
400: /* On the 32000 the return value is in R0,
401: or perhaps in F0 is there is fp support. */
402:
403: #define FUNCTION_VALUE(VALTYPE, FUNC) \
404: (TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_32081 \
405: ? gen_rtx (REG, TYPE_MODE (VALTYPE), 8) \
406: : gen_rtx (REG, TYPE_MODE (VALTYPE), 0))
407:
408: /* Define how to find the value returned by a library function
409: assuming the value has mode MODE. */
410:
411: /* On the 32000 the return value is in R0,
412: or perhaps F0 is there is fp support. */
413:
414: #define LIBCALL_VALUE(MODE) \
415: (((MODE) == DFmode || (MODE) == SFmode) && TARGET_32081 \
416: ? gen_rtx (REG, MODE, 8) \
417: : gen_rtx (REG, MODE, 0))
418:
419: /* Define this if PCC uses the nonreentrant convention for returning
420: structure and union values. */
421:
422: #define PCC_STATIC_STRUCT_RETURN
423:
424: /* 1 if N is a possible register number for a function value.
425: On the 32000, R0 and F0 are the only registers thus used. */
426:
427: #define FUNCTION_VALUE_REGNO_P(N) (((N) & ~8) == 0)
428:
429: /* 1 if N is a possible register number for function argument passing.
430: On the 32000, no registers are used in this way. */
431:
432: #define FUNCTION_ARG_REGNO_P(N) 0
433:
434: /* Define a data type for recording info about an argument list
435: during the scan of that argument list. This data type should
436: hold all necessary information about the function itself
437: and about the args processed so far, enough to enable macros
438: such as FUNCTION_ARG to determine where the next arg should go.
439:
440: On the ns32k, this is a single integer, which is a number of bytes
441: of arguments scanned so far. */
442:
443: #define CUMULATIVE_ARGS int
444:
445: /* Initialize a variable CUM of type CUMULATIVE_ARGS
446: for a call to a function whose data type is FNTYPE.
447: For a library call, FNTYPE is 0.
448:
449: On the ns32k, the offset starts at 0. */
450:
451: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
452: ((CUM) = 0)
453:
454: /* Update the data in CUM to advance over an argument
455: of mode MODE and data type TYPE.
456: (TYPE is null for libcalls where that information may not be available.) */
457:
458: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
459: ((CUM) += ((MODE) != BLKmode \
460: ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
461: : (int_size_in_bytes (TYPE) + 3) & ~3))
462:
463: /* Define where to put the arguments to a function.
464: Value is zero to push the argument on the stack,
465: or a hard register in which to store the argument.
466:
467: MODE is the argument's machine mode.
468: TYPE is the data type of the argument (as a tree).
469: This is null for libcalls where that information may
470: not be available.
471: CUM is a variable of type CUMULATIVE_ARGS which gives info about
472: the preceding args and about the function being called.
473: NAMED is nonzero if this argument is a named parameter
474: (otherwise it is an extra parameter matching an ellipsis). */
475:
476: /* On the 32000 all args are pushed, except if -mregparm is specified
477: then the first two words of arguments are passed in r0, r1.
478: *NOTE* -mregparm does not work.
479: It exists only to test register calling conventions. */
480:
481: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
482: ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
483:
484: /* For an arg passed partly in registers and partly in memory,
485: this is the number of registers used.
486: For args passed entirely in registers or entirely in memory, zero. */
487:
488: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
489: ((TARGET_REGPARM && (CUM) < 8 \
490: && 8 < ((CUM) + ((MODE) == BLKmode \
491: ? int_size_in_bytes (TYPE) \
492: : GET_MODE_SIZE (MODE)))) \
493: ? 2 - (CUM) / 4 : 0)
494:
495: #ifndef MAIN_FUNCTION_PROLOGUE
496: #define MAIN_FUNCTION_PROLOGUE
497: #endif
498:
499: /*
500: * The function prologue for the ns32k is fairly simple.
501: * If a frame pointer is needed (decided in reload.c ?) then
502: * we need assembler of the form
503: *
504: * # Save the oldframe pointer, set the new frame pointer, make space
505: * # on the stack and save any general purpose registers necessary
506: *
507: * enter [<general purpose regs to save>], <local stack space>
508: *
509: * movf fn, tos # Save any floating point registers necessary
510: * .
511: * .
512: *
513: * If a frame pointer is not needed we need assembler of the form
514: * # Save any general purpose registers necessary
515: *
516: * save [<general purpose regs to save>]
517: *
518: * movf fn, tos # Save any floating point registers necessary
519: * .
520: * .
521: */
522:
523: #define FUNCTION_PROLOGUE(FILE, SIZE) \
524: { register int regno, g_regs_used = 0; \
525: int used_regs_buf[8], *bufp = used_regs_buf; \
526: int used_fregs_buf[8], *fbufp = used_fregs_buf; \
527: extern char call_used_regs[]; \
528: MAIN_FUNCTION_PROLOGUE; \
529: for (regno = 0; regno < 8; regno++) \
530: if (regs_ever_live[regno] \
531: && ! call_used_regs[regno]) \
532: { \
533: *bufp++ = regno; g_regs_used++; \
534: } \
535: *bufp = -1; \
536: for (; regno < 16; regno++) \
537: if (regs_ever_live[regno] && !call_used_regs[regno]) { \
538: *fbufp++ = regno; \
539: } \
540: *fbufp = -1; \
541: bufp = used_regs_buf; \
542: if (frame_pointer_needed) \
543: fprintf (FILE, "\tenter ["); \
544: else if (g_regs_used) \
545: fprintf (FILE, "\tsave ["); \
546: while (*bufp >= 0) \
547: { \
548: fprintf (FILE, "r%d", *bufp++); \
549: if (*bufp >= 0) \
550: fputc (',', FILE); \
551: } \
552: if (frame_pointer_needed) \
553: fprintf (FILE, "],%d\n", SIZE); \
554: else if (g_regs_used) \
555: fprintf (FILE, "]\n"); \
556: fbufp = used_fregs_buf; \
557: while (*fbufp >= 0) \
558: { \
559: if ((*fbufp & 1) || (fbufp[0] != fbufp[1] - 1)) \
560: fprintf (FILE, "\tmovf f%d,tos\n", *fbufp++ - 8); \
561: else \
562: { \
563: fprintf (FILE, "\tmovl f%d,tos\n", fbufp[0] - 8); \
564: fbufp += 2; \
565: } \
566: } \
567: }
568:
569: /* Output assembler code to FILE to increment profiler label # LABELNO
570: for profiling a function entry.
571:
572: THIS DEFINITION FOR THE 32000 IS A GUESS. IT HAS NOT BEEN TESTED. */
573:
574: #define FUNCTION_PROFILER(FILE, LABELNO) \
575: fprintf (FILE, "\taddr LP%d,r0\n\tbsr mcount\n", (LABELNO))
576:
577: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
578: the stack pointer does not matter. The value is tested only in
579: functions that have frame pointers.
580: No definition is equivalent to always zero.
581:
582: We use 0, because using 1 requires hair in FUNCTION_EPILOGUE
583: that is worse than the stack adjust we could save. */
584:
585: /* #define EXIT_IGNORE_STACK 1 */
586:
587: /* This macro generates the assembly code for function exit,
588: on machines that need it. If FUNCTION_EPILOGUE is not defined
589: then individual return instructions are generated for each
590: return statement. Args are same as for FUNCTION_PROLOGUE.
591:
592: The function epilogue should not depend on the current stack pointer,
593: if EXIT_IGNORE_STACK is nonzero. That doesn't apply here.
594:
595: If a frame pointer is needed (decided in reload.c ?) then
596: we need assembler of the form
597:
598: movf tos, fn # Restore any saved floating point registers
599: .
600: .
601:
602: # Restore any saved general purpose registers, restore the stack
603: # pointer from the frame pointer, restore the old frame pointer.
604: exit [<general purpose regs to save>]
605:
606: If a frame pointer is not needed we need assembler of the form
607: # Restore any general purpose registers saved
608:
609: movf tos, fn # Restore any saved floating point registers
610: .
611: .
612: .
613: restore [<general purpose regs to save>] */
614:
615: #define FUNCTION_EPILOGUE(FILE, SIZE) \
616: { register int regno, g_regs_used = 0, f_regs_used = 0; \
617: int used_regs_buf[8], *bufp = used_regs_buf; \
618: int used_fregs_buf[8], *fbufp = used_fregs_buf; \
619: extern char call_used_regs[]; \
620: *fbufp++ = -2; \
621: for (regno = 8; regno < 16; regno++) \
622: if (regs_ever_live[regno] && !call_used_regs[regno]) { \
623: *fbufp++ = regno; f_regs_used++; \
624: } \
625: fbufp--; \
626: for (regno = 0; regno < 8; regno++) \
627: if (regs_ever_live[regno] \
628: && ! call_used_regs[regno]) \
629: { \
630: *bufp++ = regno; g_regs_used++; \
631: } \
632: while (fbufp > used_fregs_buf) \
633: { \
634: if ((*fbufp & 1) && fbufp[0] == fbufp[-1] + 1) \
635: { \
636: fprintf (FILE, "\tmovl tos,f%d\n", fbufp[-1] - 8); \
637: fbufp -= 2; \
638: } \
639: else fprintf (FILE, "\tmovf tos,f%d\n", *fbufp-- - 8); \
640: } \
641: if (frame_pointer_needed) \
642: fprintf (FILE, "\texit ["); \
643: else if (g_regs_used) \
644: fprintf (FILE, "\trestore ["); \
645: while (bufp > used_regs_buf) \
646: { \
647: fprintf (FILE, "r%d", *--bufp); \
648: if (bufp > used_regs_buf) \
649: fputc (',', FILE); \
650: } \
651: if (g_regs_used || frame_pointer_needed) \
652: fprintf (FILE, "]\n"); \
653: if (current_function_pops_args) \
654: fprintf (FILE, "\tret %d\n", current_function_pops_args); \
655: else fprintf (FILE, "\tret 0\n"); }
656:
657: /* Store in the variable DEPTH the initial difference between the
658: frame pointer reg contents and the stack pointer reg contents,
659: as of the start of the function body. This depends on the layout
660: of the fixed parts of the stack frame and on how registers are saved. */
661:
662: #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \
663: { \
664: int regno; \
665: int offset = -4; \
666: for (regno = 0; regno < 16; regno++) \
667: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
668: offset += 4; \
669: (DEPTH) = offset - get_frame_size (); \
670: }
671:
672:
673: /* Output assembler code for a block containing the constant parts
674: of a trampoline, leaving space for the variable parts. */
675:
676: /* On the 32k, the trampoline looks like this:
677: addr .,r2
678: jump @__trampoline
679: .int STATIC
680: .int FUNCTION
681: Doing trampolines with a library assist function is easier than figuring
682: out how to do stores to memory in reverse byte order (the way immediate
683: operands on the 32k are stored). */
684:
685: #define TRAMPOLINE_TEMPLATE(FILE) \
686: { \
687: fprintf (FILE, "\taddr .,r2\n" ); \
688: fprintf (FILE, "\tjump " ); \
689: PUT_ABSOLUTE_PREFIX (FILE); \
690: fprintf (FILE, "__trampoline\n" ); \
691: ASM_OUTPUT_INT (FILE, const0_rtx); \
692: ASM_OUTPUT_INT (FILE, const0_rtx); \
693: }
694:
695: /* Length in units of the trampoline for entering a nested function. */
696:
697: #define TRAMPOLINE_SIZE 20
698:
699: /* Emit RTL insns to initialize the variable parts of a trampoline.
700: FNADDR is an RTX for the address of the function's pure code.
701: CXT is an RTX for the static chain value for the function. */
702:
703: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
704: { \
705: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 12)), CXT); \
706: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 16)), FNADDR); \
707: }
708:
709: /* This is the library routine that is used
710: to transfer control from the trampoline
711: to the actual nested function. */
712:
713: /* The function name __transfer_from_trampoline is not actually used.
714: The function definition just permits use of "asm with operands"
715: (though the operand list is empty). */
716: #define TRANSFER_FROM_TRAMPOLINE \
717: void \
718: __transfer_from_trampoline () \
719: { \
720: asm ("___trampoline:"); \
721: asm ("movd 16(r2),tos"); \
722: asm ("movd 12(r2),r2"); \
723: asm ("ret 0"); \
724: }
725:
726: /* Addressing modes, and classification of registers for them. */
727:
728: /* #define HAVE_POST_INCREMENT */
729: /* #define HAVE_POST_DECREMENT */
730:
731: /* #define HAVE_PRE_DECREMENT */
732: /* #define HAVE_PRE_INCREMENT */
733:
734: /* Macros to check register numbers against specific register classes. */
735:
736: /* These assume that REGNO is a hard or pseudo reg number.
737: They give nonzero only if REGNO is a hard reg of the suitable class
738: or a pseudo reg currently allocated to a suitable hard reg.
739: Since they use reg_renumber, they are safe only once reg_renumber
740: has been allocated, which happens in local-alloc.c. */
741:
742: /* note that FP and SP cannot be used as an index. What about PC? */
743: #define REGNO_OK_FOR_INDEX_P(REGNO) \
744: ((REGNO) < 8 || (unsigned)reg_renumber[REGNO] < 8)
745: #define REGNO_OK_FOR_BASE_P(REGNO) \
746: ((REGNO) < 8 || (unsigned)reg_renumber[REGNO] < 8 \
747: || (REGNO) == FRAME_POINTER_REGNUM || (REGNO) == STACK_POINTER_REGNUM)
748:
749: #define FP_REG_P(X) (GET_CODE (X) == REG && REGNO (X) > 7 && REGNO (X) < 16)
750:
751: /* Maximum number of registers that can appear in a valid memory address. */
752:
753: #define MAX_REGS_PER_ADDRESS 2
754:
755: /* Recognize any constant value that is a valid address.
756: This might not work on future ns32k processors as negative
757: displacements are not officially allowed but a mode reserved
758: to National. This works on processors up to 32532, though. */
759:
760: #define CONSTANT_ADDRESS_P(X) \
761: (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
762: || GET_CODE (X) == CONST \
763: || (GET_CODE (X) == CONST_INT \
764: && ((unsigned)INTVAL (X) >= 0xe0000000 \
765: || (unsigned)INTVAL (X) < 0x20000000)))
766:
767: #define CONSTANT_ADDRESS_NO_LABEL_P(X) \
768: (GET_CODE (X) == CONST_INT \
769: && ((unsigned)INTVAL (X) >= 0xe0000000 \
770: || (unsigned)INTVAL (X) < 0x20000000))
771:
772: /* Return the register class of a scratch register needed to copy IN into
773: or out of a register in CLASS in MODE. If it can be done directly,
774: NO_REGS is returned. */
775:
776: #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
777: secondary_reload_class (CLASS, MODE, IN)
778:
779: /* Nonzero if the constant value X is a legitimate general operand.
780: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
781:
782: #define LEGITIMATE_CONSTANT_P(X) 1
783:
784: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
785: and check its validity for a certain class.
786: We have two alternate definitions for each of them.
787: The usual definition accepts all pseudo regs; the other rejects
788: them unless they have been allocated suitable hard regs.
789: The symbol REG_OK_STRICT causes the latter definition to be used.
790:
791: Most source files want to accept pseudo regs in the hope that
792: they will get allocated to the class that the insn wants them to be in.
793: Source files for reload pass need to be strict.
794: After reload, it makes no difference, since pseudo regs have
795: been eliminated by then. */
796:
797: #ifndef REG_OK_STRICT
798:
799: /* Nonzero if X is a hard reg that can be used as an index
800: or if it is a pseudo reg. */
801: #define REG_OK_FOR_INDEX_P(X) \
802: (REGNO (X) < 8 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
803: /* Nonzero if X is a hard reg that can be used as a base reg
804: of if it is a pseudo reg. */
805: #define REG_OK_FOR_BASE_P(X) (REGNO (X) < 8 || REGNO (X) >= FRAME_POINTER_REGNUM)
806: /* Nonzero if X is a floating point reg or a pseudo reg. */
807:
808: #else
809:
810: /* Nonzero if X is a hard reg that can be used as an index. */
811: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
812: /* Nonzero if X is a hard reg that can be used as a base reg. */
813: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
814:
815: #endif
816:
817: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
818: that is a valid memory address for an instruction.
819: The MODE argument is the machine mode for the MEM expression
820: that wants to use this address.
821:
822: The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. */
823:
824: /* 1 if X is an address that we could indirect through. */
825: /***** NOTE ***** There is a bug in the Sequent assembler which fails
826: to fixup addressing information for symbols used as offsets
827: from registers which are not FP or SP (or SB or PC). This
828: makes _x(fp) valid, while _x(r0) is invalid. */
829:
830: #define INDIRECTABLE_1_ADDRESS_P(X) \
831: (CONSTANT_ADDRESS_P (X) \
832: || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
833: || (GET_CODE (X) == PLUS \
834: && GET_CODE (XEXP (X, 0)) == REG \
835: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
836: && CONSTANT_ADDRESS_P (XEXP (X, 1)) \
837: && (GET_CODE (X) != CONST_INT || NS32K_DISPLACEMENT_P (INTVAL (X)))))
838:
839: /* 1 if integer I will fit in a 4 byte displacement field.
840: Strictly speaking, we can't be sure that a symbol will fit this range.
841: But, in practice, it always will. */
842:
843: /* [email protected] says that the 32016 and 32032
844: can handle the full range of displacements--it is only the addresses
845: that have a limited range. So the following was deleted:
846: (((i) <= 16777215 && (i) >= -16777216)
847: || ((TARGET_32532 || TARGET_32332) && ...)) */
848: #define NS32K_DISPLACEMENT_P(i) \
849: ((i) < (1 << 29) && (i) >= - (1 << 29))
850:
851: /* Check for frame pointer or stack pointer. */
852: #define MEM_REG(X) \
853: (GET_CODE (X) == REG && (REGNO (X) ^ 16) < 2)
854:
855: /* A memory ref whose address is the FP or SP, with optional integer offset,
856: or (on certain machines) a constant address. */
857: #define INDIRECTABLE_2_ADDRESS_P(X) \
858: (GET_CODE (X) == MEM \
859: && (((xfoo0 = XEXP (X, 0), MEM_REG (xfoo0)) \
860: || (GET_CODE (xfoo0) == PLUS \
861: && MEM_REG (XEXP (xfoo0, 0)) \
862: && CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfoo0, 1)))) \
863: || (TARGET_SB && CONSTANT_ADDRESS_P (xfoo0))))
864:
865: /* Go to ADDR if X is a valid address not using indexing.
866: (This much is the easy part.) */
867: #define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \
868: { register rtx xfoob = (X); \
869: if (INDIRECTABLE_1_ADDRESS_P (X)) goto ADDR; \
870: if (INDIRECTABLE_2_ADDRESS_P (X)) goto ADDR; \
871: if (GET_CODE (X) == PLUS) \
872: if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (X, 1))) \
873: if (INDIRECTABLE_2_ADDRESS_P (XEXP (X, 0))) \
874: goto ADDR; \
875: }
876:
877: /* Go to ADDR if X is a valid address not using indexing.
878: (This much is the easy part.) */
879: #define GO_IF_INDEXING(X, MODE, ADDR) \
880: { register rtx xfoob = (X); \
881: if (GET_CODE (xfoob) == PLUS && INDEX_TERM_P (XEXP (xfoob, 0), MODE)) \
882: GO_IF_INDEXABLE_ADDRESS (XEXP (xfoob, 1), ADDR); \
883: if (GET_CODE (xfoob) == PLUS && INDEX_TERM_P (XEXP (xfoob, 1), MODE)) \
884: GO_IF_INDEXABLE_ADDRESS (XEXP (xfoob, 0), ADDR); } \
885:
886: #define GO_IF_INDEXABLE_ADDRESS(X, ADDR) \
887: { if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR; \
888: if (INDIRECTABLE_2_ADDRESS_P (X)) goto ADDR; \
889: }
890:
891: /* 1 if PROD is either a reg times size of mode MODE
892: or just a reg, if MODE is just one byte. Actually, on the ns32k,
893: since the index mode is independent of the operand size,
894: we can match more stuff...
895:
896: This macro's expansion uses the temporary variables xfoo0, xfoo1
897: and xfoo2 that must be declared in the surrounding context. */
898: #define INDEX_TERM_P(PROD, MODE) \
899: ((GET_CODE (PROD) == REG && REG_OK_FOR_INDEX_P (PROD)) \
900: || (GET_CODE (PROD) == MULT \
901: && (xfoo0 = XEXP (PROD, 0), xfoo1 = XEXP (PROD, 1), \
902: (GET_CODE (xfoo1) == CONST_INT \
903: && GET_CODE (xfoo0) == REG \
904: && FITS_INDEX_RANGE (INTVAL (xfoo1)) \
905: && REG_OK_FOR_INDEX_P (xfoo0)))))
906:
907: #define FITS_INDEX_RANGE(X) \
908: ((xfoo2 = (unsigned)(X)-1), \
909: ((xfoo2 < 4 && xfoo2 != 2) || xfoo2 == 7))
910:
911: /* Note that xfoo0, xfoo1, xfoo2 are used in some of the submacros above. */
912: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
913: { register rtx xfooy, xfoo0, xfoo1; \
914: unsigned xfoo2; \
915: xfooy = X; \
916: GO_IF_NONINDEXED_ADDRESS (xfooy, ADDR); \
917: if (GET_CODE (xfooy) == PLUS) \
918: { \
919: if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfooy, 1)) \
920: && GET_CODE (XEXP (xfooy, 0)) == PLUS) \
921: xfooy = XEXP (xfooy, 0); \
922: else if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfooy, 0)) \
923: && GET_CODE (XEXP (xfooy, 1)) == PLUS) \
924: xfooy = XEXP (xfooy, 1); \
925: GO_IF_INDEXING (xfooy, MODE, ADDR); \
926: } \
927: else if (INDEX_TERM_P (xfooy, MODE)) \
928: goto ADDR; \
929: else if (GET_CODE (xfooy) == PRE_DEC) \
930: if (REGNO (XEXP (xfooy, 0)) == STACK_POINTER_REGNUM) goto ADDR; \
931: else abort (); \
932: }
933:
934: /* Try machine-dependent ways of modifying an illegitimate address
935: to be legitimate. If we find one, return the new, valid address.
936: This macro is used in only one place: `memory_address' in explow.c.
937:
938: OLDX is the address as it was before break_out_memory_refs was called.
939: In some cases it is useful to look at this to decide what needs to be done.
940:
941: MODE and WIN are passed so that this macro can use
942: GO_IF_LEGITIMATE_ADDRESS.
943:
944: It is always safe for this macro to do nothing. It exists to recognize
945: opportunities to optimize the output.
946:
947: For the ns32k, we do nothing */
948:
949: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}
950:
951: /* Go to LABEL if ADDR (a legitimate address expression)
952: has an effect that depends on the machine mode it is used for.
953: On the ns32k, only predecrement and postincrement address depend thus
954: (the amount of decrement or increment being the length of the operand). */
955:
956: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
957: { if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) \
958: goto LABEL;}
959:
960: /* Specify the machine mode that this machine uses
961: for the index in the tablejump instruction.
962: Can do SImode, but HI mode is more efficient. */
963: #define CASE_VECTOR_MODE HImode
964:
965: /* Define this if the tablejump instruction expects the table
966: to contain offsets from the address of the table.
967: Do not define this if the table should contain absolute addresses. */
968: #define CASE_VECTOR_PC_RELATIVE
969:
970: /* Specify the tree operation to be used to convert reals to integers. */
971: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
972:
973: /* This is the kind of divide that is easiest to do in the general case. */
974: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
975:
976: /* Define this as 1 if `char' should by default be signed; else as 0. */
977: #define DEFAULT_SIGNED_CHAR 1
978:
979: /* Max number of bytes we can move from memory to memory
980: in one reasonably fast instruction. */
981: #define MOVE_MAX 4
982:
983: /* Define this if zero-extension is slow (more than one real instruction). */
984: /* #define SLOW_ZERO_EXTEND */
985:
986: /* Nonzero if access to memory by bytes is slow and undesirable. */
987: #define SLOW_BYTE_ACCESS 0
988:
989: /* Define if shifts truncate the shift count
990: which implies one can omit a sign-extension or zero-extension
991: of a shift count. */
992: /* #define SHIFT_COUNT_TRUNCATED */
993:
994: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
995: is done just by pretending it is already truncated. */
996: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
997:
998: /* We assume that the store-condition-codes instructions store 0 for false
999: and some other value for true. This is the value stored for true. */
1000:
1001: #define STORE_FLAG_VALUE 1
1002:
1003: /* Specify the machine mode that pointers have.
1004: After generation of rtl, the compiler makes no further distinction
1005: between pointers and any other objects of this machine mode. */
1006: #define Pmode SImode
1007:
1008: /* A function address in a call instruction
1009: is a byte address (for indexing purposes)
1010: so give the MEM rtx a byte's mode. */
1011: #define FUNCTION_MODE QImode
1012:
1013: /* Compute the cost of address ADDRESS. */
1014:
1015: #define ADDRESS_COST(RTX) calc_address_cost (RTX)
1016:
1017: /* Compute the cost of computing a constant rtl expression RTX
1018: whose rtx-code is CODE. The body of this macro is a portion
1019: of a switch statement. If the code is computed here,
1020: return it with a return statement. Otherwise, break from the switch. */
1021:
1022: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1023: case CONST_INT: \
1024: if (INTVAL (RTX) <= 7 && INTVAL (RTX) >= -8) return 0; \
1025: if (INTVAL (RTX) < 0x4000 && INTVAL (RTX) >= -0x4000) \
1026: return 1; \
1027: case CONST: \
1028: case LABEL_REF: \
1029: case SYMBOL_REF: \
1030: return 3; \
1031: case CONST_DOUBLE: \
1032: return 5;
1033:
1034: /* Tell final.c how to eliminate redundant test instructions. */
1035:
1036: /* Here we define machine-dependent flags and fields in cc_status
1037: (see `conditions.h'). */
1038:
1039: /* This bit means that what ought to be in the Z bit
1040: should be tested in the F bit. */
1041: #define CC_Z_IN_F 04000
1042:
1043: /* This bit means that what ought to be in the Z bit
1044: is complemented in the F bit. */
1045: #define CC_Z_IN_NOT_F 010000
1046:
1047: /* Store in cc_status the expressions
1048: that the condition codes will describe
1049: after execution of an instruction whose pattern is EXP.
1050: Do not alter them if the instruction would not alter the cc's. */
1051:
1052: #define NOTICE_UPDATE_CC(EXP, INSN) \
1053: { if (GET_CODE (EXP) == SET) \
1054: { if (GET_CODE (SET_DEST (EXP)) == CC0) \
1055: { cc_status.flags = 0; \
1056: cc_status.value1 = SET_DEST (EXP); \
1057: cc_status.value2 = SET_SRC (EXP); \
1058: } \
1059: else if (GET_CODE (SET_SRC (EXP)) == CALL) \
1060: { CC_STATUS_INIT; } \
1061: else if (GET_CODE (SET_DEST (EXP)) == REG) \
1062: { if (cc_status.value1 \
1063: && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value1)) \
1064: cc_status.value1 = 0; \
1065: if (cc_status.value2 \
1066: && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value2)) \
1067: cc_status.value2 = 0; \
1068: } \
1069: else if (GET_CODE (SET_DEST (EXP)) == MEM) \
1070: { CC_STATUS_INIT; } \
1071: } \
1072: else if (GET_CODE (EXP) == PARALLEL \
1073: && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \
1074: { if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == CC0) \
1075: { cc_status.flags = 0; \
1076: cc_status.value1 = SET_DEST (XVECEXP (EXP, 0, 0)); \
1077: cc_status.value2 = SET_SRC (XVECEXP (EXP, 0, 0)); \
1078: } \
1079: else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == REG) \
1080: { if (cc_status.value1 \
1081: && reg_overlap_mentioned_p (SET_DEST (XVECEXP (EXP, 0, 0)), cc_status.value1)) \
1082: cc_status.value1 = 0; \
1083: if (cc_status.value2 \
1084: && reg_overlap_mentioned_p (SET_DEST (XVECEXP (EXP, 0, 0)), cc_status.value2)) \
1085: cc_status.value2 = 0; \
1086: } \
1087: else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == MEM) \
1088: { CC_STATUS_INIT; } \
1089: } \
1090: else if (GET_CODE (EXP) == CALL) \
1091: { /* all bets are off */ CC_STATUS_INIT; } \
1092: else { /* nothing happens? CC_STATUS_INIT; */} \
1093: if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \
1094: && cc_status.value2 \
1095: && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \
1096: abort (); \
1097: }
1098:
1099: /* Describe the costs of the following register moves which are discouraged:
1100: 1.) Moves between the Floating point registers and the frame pointer and stack pointer
1101: 2.) Moves between the stack pointer and the frame pointer
1102: 3.) Moves between the floating point and general registers */
1103:
1104: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1105: ((((CLASS1) == FLOAT_REGS && ((CLASS2) == STACK_POINTER_REG || (CLASS2) == FRAME_POINTER_REG)) \
1106: || ((CLASS2) == FLOAT_REGS && ((CLASS1) == STACK_POINTER_REG || (CLASS1) == FRAME_POINTER_REG)) \
1107: || ((CLASS1) == STACK_POINTER_REG && (CLASS2) == FRAME_POINTER_REG) \
1108: || ((CLASS2) == STACK_POINTER_REG && (CLASS1) == FRAME_POINTER_REG) \
1109: || ((CLASS1) == FLOAT_REGS && (CLASS2) == GENERAL_REGS) \
1110: || ((CLASS1) == GENERAL_REGS && (CLASS2) == FLOAT_REGS)) \
1111: ? 4 : 2)
1112:
1113: #define OUTPUT_JUMP(NORMAL, NO_OV) \
1114: { if (cc_status.flags & CC_NO_OVERFLOW) \
1115: return NO_OV; \
1116: return NORMAL; }
1117:
1118: /* Dividing the output into sections */
1119:
1120: /* Output before read-only data. */
1121:
1122: #define TEXT_SECTION_ASM_OP ".text"
1123:
1124: /* Output before writable data. */
1125:
1126: #define DATA_SECTION_ASM_OP ".data"
1127:
1128: /* Define the output Assembly Language */
1129:
1130: /* Output at beginning of assembler file. */
1131:
1132: #define ASM_FILE_START(FILE) fprintf (FILE, "#NO_APP\n");
1133:
1134: /* Output to assembler file text saying following lines
1135: may contain character constants, extra white space, comments, etc. */
1136:
1137: #define ASM_APP_ON "#APP\n"
1138:
1139: /* Output to assembler file text saying following lines
1140: no longer contain unusual constructs. */
1141:
1142: #define ASM_APP_OFF "#NO_APP\n"
1143:
1144: /* Output of Data */
1145:
1146: /* This is how to output an assembler line defining a `double' constant. */
1147:
1148: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1149: fprintf (FILE, "\t.double 0d%.20e\n", (VALUE))
1150:
1151: /* This is how to output an assembler line defining a `float' constant. */
1152:
1153: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1154: fprintf (FILE, "\t.float 0f%.20e\n", (VALUE))
1155:
1156: /* This is how to output an assembler line defining an `int' constant. */
1157:
1158: #define ASM_OUTPUT_INT(FILE,VALUE) \
1159: ( fprintf (FILE, "\t.long "), \
1160: output_addr_const (FILE, (VALUE)), \
1161: fprintf (FILE, "\n"))
1162:
1163: /* Likewise for `char' and `short' constants. */
1164:
1165: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1166: ( fprintf (FILE, "\t.word "), \
1167: output_addr_const (FILE, (VALUE)), \
1168: fprintf (FILE, "\n"))
1169:
1170: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1171: ( fprintf (FILE, "\t.byte "), \
1172: output_addr_const (FILE, (VALUE)), \
1173: fprintf (FILE, "\n"))
1174:
1175: /* This is how to output an assembler line for a numeric constant byte. */
1176:
1177: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1178: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1179:
1180: /* This is how to output an assembler line defining an external/static
1181: address which is not in tree format (for collect.c). */
1182:
1183: #define ASM_OUTPUT_LABELREF_AS_INT(STREAM, NAME) \
1184: do { \
1185: fprintf (STREAM, "\t.long\t"); \
1186: ASM_OUTPUT_LABELREF (STREAM, NAME); \
1187: fprintf (STREAM, "\n"); \
1188: } while (0)
1189:
1190: /* This is how to output an insn to push a register on the stack.
1191: It need not be very fast code. */
1192:
1193: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1194: fprintf (FILE, "\tmovd %s,tos\n", reg_names[REGNO])
1195:
1196: /* This is how to output an insn to pop a register from the stack.
1197: It need not be very fast code. */
1198:
1199: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1200: fprintf (FILE, "\tmovd tos,%s\n", reg_names[REGNO])
1201:
1202: /* How to refer to registers in assembler output.
1203: This sequence is indexed by compiler's hard-register-number (see above). */
1204:
1205: #define REGISTER_NAMES \
1206: {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
1207: "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
1208: "fp", "sp"}
1209:
1210: /* How to renumber registers for dbx and gdb.
1211: NS32000 may need more change in the numeration. */
1212:
1213: #define DBX_REGISTER_NUMBER(REGNO) ((REGNO < 8) ? (REGNO)+4 : (REGNO))
1214:
1215: /* This is how to output the definition of a user-level label named NAME,
1216: such as the label on a static function or variable NAME. */
1217:
1218: #ifndef COLLECT
1219: #define ASM_OUTPUT_LABEL(FILE,NAME) \
1220: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1221: #else
1222: #define ASM_OUTPUT_LABEL(STREAM,NAME) \
1223: do { \
1224: fprintf (STREAM, "%s:\n", NAME); \
1225: } while (0)
1226: #endif
1227:
1228: /* This is how to output a command to make the user-level label named NAME
1229: defined for reference from other files. */
1230:
1231: #ifndef COLLECT
1232: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1233: do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1234: #else
1235: #define ASM_GLOBALIZE_LABEL(STREAM,NAME) \
1236: do { \
1237: fprintf (STREAM, "\t.globl\t%s\n", NAME); \
1238: } while (0)
1239: #endif
1240:
1241: /* This is how to output a reference to a user-level label named NAME.
1242: `assemble_name' uses this. */
1243:
1244: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1245: fprintf (FILE, "_%s", NAME)
1246:
1247: /* This is how to output an internal numbered label where
1248: PREFIX is the class of label and NUM is the number within the class. */
1249:
1250: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1251: fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1252:
1253: /* This is how to store into the string LABEL
1254: the symbol_ref name of an internal numbered label where
1255: PREFIX is the class of label and NUM is the number within the class.
1256: This is suitable for output with `assemble_name'. */
1257:
1258: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1259: sprintf (LABEL, "*%s%d", PREFIX, NUM)
1260:
1261: /* This is how to align the code that follows an unconditional branch.
1262: Note that 0xa2 is a no-op. */
1263:
1264: #define ASM_OUTPUT_ALIGN_CODE(FILE) \
1265: fprintf (FILE, "\t.align 2,0xa2\n")
1266:
1267: /* This is how to output an element of a case-vector that is absolute.
1268: (The ns32k does not use such vectors,
1269: but we must define this macro anyway.) */
1270:
1271: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1272: fprintf (FILE, "\t.long L%d\n", VALUE)
1273:
1274: /* This is how to output an element of a case-vector that is relative. */
1275: /* ** Notice that the second element is LI format! */
1276: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1277: fprintf (FILE, "\t.word L%d-LI%d\n", VALUE, REL)
1278:
1279: /* This is how to output an assembler line
1280: that says to advance the location counter
1281: to a multiple of 2**LOG bytes. */
1282:
1283: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1284: fprintf (FILE, "\t.align %d\n", (LOG))
1285:
1286: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1287: fprintf (FILE, "\t.space %u\n", (SIZE))
1288:
1289: /* This says how to output an assembler line
1290: to define a global common symbol. */
1291:
1292: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1293: ( fputs (".comm ", (FILE)), \
1294: assemble_name ((FILE), (NAME)), \
1295: fprintf ((FILE), ",%u\n", (ROUNDED)))
1296:
1297: /* This says how to output an assembler line
1298: to define a local common symbol. */
1299:
1300: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1301: ( fputs (".lcomm ", (FILE)), \
1302: assemble_name ((FILE), (NAME)), \
1303: fprintf ((FILE), ",%u\n", (ROUNDED)))
1304:
1305: /* Store in OUTPUT a string (made with alloca) containing
1306: an assembler-name for a local static variable named NAME.
1307: LABELNO is an integer which is different for each call. */
1308:
1309: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1310: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1311: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1312:
1313: /* Define the parentheses used to group arithmetic operations
1314: in assembler code. */
1315:
1316: #define ASM_OPEN_PAREN "("
1317: #define ASM_CLOSE_PAREN ")"
1318:
1319: /* Define results of standard character escape sequences. */
1320: #define TARGET_BELL 007
1321: #define TARGET_BS 010
1322: #define TARGET_TAB 011
1323: #define TARGET_NEWLINE 012
1324: #define TARGET_VT 013
1325: #define TARGET_FF 014
1326: #define TARGET_CR 015
1327:
1328: /* Print an instruction operand X on file FILE.
1329: CODE is the code from the %-spec that requested printing this operand;
1330: if `%z3' was used to print operand 3, then CODE is 'z'. */
1331:
1332: /* %$ means print the prefix for an immediate operand. */
1333:
1334: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1335: ((CODE) == '$' || (CODE) == '?')
1336:
1337: #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE, X, CODE)
1338:
1339: /* Print a memory operand whose address is X, on file FILE. */
1340:
1341: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address(FILE, ADDR)
1342:
1343: /* Define functions in ns32k.c and used in insn-output.c. */
1344:
1345: extern char *output_move_double ();
1346: extern char *output_shift_insn ();
1347:
1348: /*
1349: Local variables:
1350: version-control: t
1351: End:
1352: */
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