--- gcc/config/ns32k/ns32k.md	2018/04/24 18:10:24	1.1
+++ gcc/config/ns32k/ns32k.md	2018/04/24 18:14:54	1.1.1.2
@@ -190,7 +190,7 @@
   "cmpf %0,%1")
 
 (define_insn "movdf"
-  [(set (match_operand:DF 0 "general_operand" "=&fg<")
+  [(set (match_operand:DF 0 "general_operand" "=fg<")
 	(match_operand:DF 1 "general_operand" "fFg"))]
   ""
   "*
@@ -273,7 +273,7 @@
   "movmd %1,%0,4")
 
 (define_insn "movdi"
-  [(set (match_operand:DI 0 "general_operand" "=&g<,*f,g")
+  [(set (match_operand:DI 0 "general_operand" "=g<,*f,g")
 	(match_operand:DI 1 "general_operand" "gF,g,*f"))]
   ""
   "*
@@ -314,8 +314,8 @@
   "lprd sp,%0")
 
 (define_insn "movsi"
-  [(set (match_operand:SI 0 "general_operand" "=g<,g<,*f,g")
-	(match_operand:SI 1 "general_operand" "g,?xy,g,*f"))]
+  [(set (match_operand:SI 0 "general_operand" "=g<,g<,*f,g,x")
+	(match_operand:SI 1 "general_operand" "g,?xy,g,*f,rmn"))]
   ""
   "*
 {
@@ -332,6 +332,12 @@
 	return \"movf %1,tos\;movd tos,%0\";
       return \"movf %1,%0\";
     }
+  if (GET_CODE (operands[0]) == REG
+      && REGNO (operands[0]) == FRAME_POINTER_REGNUM)
+    return \"lprd fp,%1\";
+  if (GET_CODE (operands[1]) == CONST_DOUBLE)
+    operands[1]
+      = gen_rtx (CONST_INT, VOIDmode, CONST_DOUBLE_LOW (operands[1]));
   if (GET_CODE (operands[1]) == CONST_INT)
     {
       int i = INTVAL (operands[1]);
@@ -888,8 +894,8 @@
 {
   if (GET_CODE (operands[1]) == CONST_INT
       && INTVAL (operands[1]) >-9 && INTVAL(operands[1]) < 8)
-    return \"addqw %1,%0\";
-  return \"addw %1,%0\";
+    return \"addqw %2,%0\";
+  return \"addw %2,%0\";
 }")
 
 (define_insn "addqi3"
@@ -916,8 +922,8 @@
 {
   if (GET_CODE (operands[1]) == CONST_INT
       && INTVAL (operands[1]) >-9 && INTVAL(operands[1]) < 8)
-    return \"addqb %1,%0\";
-  return \"addb %1,%0\";
+    return \"addqb %2,%0\";
+  return \"addb %2,%0\";
 }")
 
 ;;- All kinds of subtract instructions.
@@ -945,8 +951,8 @@
 {
   if (GET_CODE(operands[0]) == CONST_INT && INTVAL(operands[0]) < 64
       && INTVAL(operands[0]) > -64 && ! TARGET_32532)
-    return \"adjspb %0\";
-  return \"adjspd %0\";
+    return \"adjspb %$%0\";
+  return \"adjspd %$%0\";
 }")
 
 (define_insn "subsi3"
@@ -990,8 +996,8 @@
 {
   if (GET_CODE (operands[1]) == CONST_INT
       && INTVAL (operands[1]) >-8 && INTVAL(operands[1]) < 9)
-    return \"addqw %$%n1,%0\";
-  return \"subw %1,%0\";
+    return \"addqw %$%n2,%0\";
+  return \"subw %2,%0\";
 }")
 
 (define_insn "subqi3"
@@ -1019,8 +1025,8 @@
 {
   if (GET_CODE (operands[1]) == CONST_INT
       && INTVAL (operands[1]) >-8 && INTVAL(operands[1]) < 9)
-    return \"addqb %$%n1,%0\";
-  return \"subb %1,%0\";
+    return \"addqb %$%n2,%0\";
+  return \"subb %2,%0\";
 }")
 
 ;;- Multiply instructions.
@@ -2355,32 +2361,18 @@
   ""
   "jump %0")
 
-;;(define_insn "tablejump"
-;;  [(set (pc)
-;;	(plus:SI (match_operand:SI 0 "general_operand" "g")
-;;		 (pc)))]
-;;  ""
-;;  "cased %0")
-
 (define_insn "tablejump"
   [(set (pc)
-	(plus:SI (pc) (match_operand:HI 0 "general_operand" "g")))
+	(plus:SI (pc) (match_operand:SI 0 "general_operand" "g")))
    (use (label_ref (match_operand 1 "" "")))]
   ""
   "*
 {
   ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"LI\",
 			     CODE_LABEL_NUMBER (operands[1]));
-  return \"casew %0\";
+  return \"cased %0\";
 }")
 
-;;(define_insn ""
-;;  [(set (pc)
-;;	(plus:SI (match_operand:QI 0 "general_operand" "g")
-;;		 (pc)))]
-;;  ""
-;;  "caseb %0")
-
 ;; Scondi instructions
 (define_insn "seq"
   [(set (match_operand:SI 0 "general_operand" "=g<")
@@ -2597,3 +2589,31 @@
 	(leu:QI (cc0) (const_int 0)))]
   ""
   "slsb %0")
+
+;; Speed up stack adjust followed by a fullword fixedpoint push.
+
+(define_peephole
+  [(set (reg:SI 17) (plus:SI (reg:SI 17) (const_int 4)))
+   (set (match_operand:SI 0 "push_operand" "=m")
+	(match_operand:SI 1 "general_operand" "g"))]
+  "! reg_mentioned_p (stack_pointer_rtx, operands[1])"
+  "*
+{
+  return \"movd %1,0(sp)\";
+}")
+
+;; Speed up stack adjust followed by two fullword fixedpoint pushes.
+
+(define_peephole
+  [(set (reg:SI 17) (plus:SI (reg:SI 17) (const_int 8)))
+   (set (match_operand:SI 0 "push_operand" "=m")
+	(match_operand:SI 1 "general_operand" "g"))
+   (set (match_operand:SI 2 "push_operand" "=m")
+	(match_operand:SI 3 "general_operand" "g"))]
+  "! reg_mentioned_p (stack_pointer_rtx, operands[1])
+   && ! reg_mentioned_p (stack_pointer_rtx, operands[3])"
+  "*
+{
+  return \"movd %1,4(sp); movd %3,0(sp)\";
+}")
+