![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to pa.h CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [GCC 2.x] / gcc / config|
Return to pa.h CVS log | Up to [GCC 2.x] / gcc / config |
1.1 root 1: /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2: Copyright (C) 1992 Free Software Foundation, Inc.
3: Contributed by Michael Tiemann ([email protected])
4: and Tim Moore ([email protected]) of the Center for
5: Software Science at the University of Utah.
6:
7: This file is part of GNU CC.
8:
9: GNU CC is free software; you can redistribute it and/or modify
10: it under the terms of the GNU General Public License as published by
11: the Free Software Foundation; either version 1, or (at your option)
12: any later version.
13:
14: GNU CC is distributed in the hope that it will be useful,
15: but WITHOUT ANY WARRANTY; without even the implied warranty of
16: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17: GNU General Public License for more details.
18:
19: You should have received a copy of the GNU General Public License
20: along with GNU CC; see the file COPYING. If not, write to
21: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22:
23: enum cmp_type /* comparison type */
24: {
25: CMP_SI, /* compare integers */
26: CMP_SF, /* compare single precision floats */
27: CMP_DF, /* compare double precision floats */
28: CMP_MAX /* max comparison type */
29: };
30:
31: #define DBX_DEBUGGING_INFO
32: #define DEFAULT_GDB_EXTENSIONS 0
33:
34: #if (TARGET_DEFAULT & 1) == 0
35: #define CPP_SPEC "%{msnake:-D__hp9000s700 -D_PA_RISC1_1}"
36: #else
37: #define CPP_SPEC "-D__hp9000s700 -D_PA_RISC1_1"
38: #endif
39:
40: /* Defines for a K&R CC */
41:
42: #ifdef OLD_CC
43: #define CPP_SPEC "%{!gnu:-nostdinc %{!nostinc:-I/usr/include}} \
44: %{gnu:%{nostdinc}} %{!gnu:-traditional} -Dvolatile=__volatile"
45: #define CC1_SPEC "%{!gnu:-traditional -fwritable-strings -fno-defer-pop} \
46: %{pg:} %{p:}"
47: #else
48: #define CC1_SPEC "%{pg:} %{p:}"
49: #endif
50:
51: /* Brain-dead loader */
52: #ifdef hpux8
53: #define LINK_SPEC "-u main -a archive"
54: #else
55: #define LINK_SPEC "-u main"
56: #endif
57:
58: /* Omit frame pointer at high optimization levels. */
59:
60: #define OPTIMIZATION_OPTIONS(OPTIMIZE) \
61: { \
62: if (OPTIMIZE >= 2) \
63: flag_omit_frame_pointer = 1; \
64: }
65:
66: /* These compiler options take an argument. We ignore -target for now. */
67:
68: #define WORD_SWITCH_TAKES_ARG(STR) \
69: (!strcmp (STR, "Tdata") || !strcmp (STR, "include") \
70: || !strcmp (STR, "imacros") || !strcmp (STR, "target")\
71: || !strcmp (STR, "aux-info"))
72:
73: /* Names to predefine in the preprocessor for this target machine. */
74:
75: #define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -D_HPUX_SOURCE -Dhp9000 -Dhp800 -Dspectrum -DREVARGV"
76:
77: /* Print subsidiary information on the compiler version in use. */
78:
79: #define TARGET_VERSION fprintf (stderr, " (hp9000s800)");
80:
81: /* Run-time compilation parameters selecting different hardware subsets.
82:
83: On the the hp9k800, we don't yet need any. But ... */
84:
85: extern int target_flags;
86:
87: /* compile code for PA-RISC 1.1 ("Snake") */
88:
89: #define TARGET_SNAKE (target_flags & 1)
90:
91: /* Macro to define tables used to set the flags.
92: This is a list in braces of pairs in braces,
93: each pair being { "NAME", VALUE }
94: where VALUE is the bits to set or minus the bits to clear.
95: An empty string NAME is used to identify the default VALUE. */
96:
97: #define TARGET_SWITCHES \
98: {{"snake", 1}, \
99: { "", TARGET_DEFAULT}}
100:
101: #define TARGET_DEFAULT 0
102:
103: /* target machine storage layout */
104:
105: /* Define this if most significant bit is lowest numbered
106: in instructions that operate on numbered bit-fields. */
107: #define BITS_BIG_ENDIAN 1
108:
109: /* Define this if most significant byte of a word is the lowest numbered. */
110: /* That is true on the hp9k8. */
111: #define BYTES_BIG_ENDIAN 1
112:
113: /* Define this if most significant word of a multiword number is lowest
114: numbered. */
115: /* For the hp9k800 we can decide arbitrarily
116: since there are no machine instructions for them. */
117: #define WORDS_BIG_ENDIAN 1
118:
119: /* number of bits in an addressable storage unit */
120: #define BITS_PER_UNIT 8
121:
122: /* Width in bits of a "word", which is the contents of a machine register.
123: Note that this is not necessarily the width of data type `int';
124: if using 16-bit ints on a 68000, this would still be 32.
125: But on a machine with 16-bit registers, this would be 16. */
126: #define BITS_PER_WORD 32
127:
128: /* Width of a word, in units (bytes). */
129: #define UNITS_PER_WORD 4
130:
131: /* Width in bits of a pointer.
132: See also the macro `Pmode' defined below. */
133: #define POINTER_SIZE 32
134:
135: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
136: #define PARM_BOUNDARY 32
137:
138: /* Largest alignment required for any stack parameter, in bits.
139: Don't define this if it is equal to PARM_BOUNDARY */
140: #define MAX_PARM_BOUNDARY 64
141:
142: /* Boundary (in *bits*) on which stack pointer should be aligned. */
143: #define STACK_BOUNDARY (TARGET_SNAKE ? 512 : 64)
144:
145: /* Allocation boundary (in *bits*) for the code of a function. */
146: #define FUNCTION_BOUNDARY 32
147:
148: /* Alignment of field after `int : 0' in a structure. */
149: #define EMPTY_FIELD_BOUNDARY 32
150:
151: /* Every structure's size must be a multiple of this. */
152: #define STRUCTURE_SIZE_BOUNDARY 8
153:
154: /* A bitfield declared as `int' forces `int' alignment for the struct. */
155: #define PCC_BITFIELD_TYPE_MATTERS 1
156:
157: /* No data type wants to be aligned rounder than this. */
158: #define BIGGEST_ALIGNMENT 64
159:
160: /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
161: #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
162: ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
163:
164: /* Make arrays of chars word-aligned for the same reasons. */
165: #define DATA_ALIGNMENT(TYPE, ALIGN) \
166: (TREE_CODE (TYPE) == ARRAY_TYPE \
167: && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
168: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
169:
170:
171: /* Set this nonzero if move instructions will actually fail to work
172: when given unaligned data. */
173: #define STRICT_ALIGNMENT 1
174:
175: /* Generate calls to memcpy, memcmp and memset. */
176: #define TARGET_MEM_FUNCTIONS
177:
178: /* Standard register usage. */
179:
180: /* Number of actual hardware registers.
181: The hardware registers are assigned numbers for the compiler
182: from 0 to just below FIRST_PSEUDO_REGISTER.
183: All registers that the compiler knows about must be given numbers,
184: even those that are not normally considered general registers.
185:
186: The hp9k800 has 32 fullword registers and 16 floating point
187: registers. The floating point registers hold either word or double
188: word values.
189:
190: 16 additional registers are reserved.
191:
192: PA-RISC 1.1 has 32 fullword registers and 32 floating point
193: registers. However, the floating point registers behave
194: differently: the left and right halves of registers are addressable
195: as 32 bit registers. So, we will set things up like the 68k which
196: has different fp units: define separate register sets for the 1.0
197: and 1.1 fp units. */
198:
199: #define FIRST_PSEUDO_REGISTER 113 /* 32 + 16 1.0 regs + 64 1.1 regs + */
200: /* 1 shift reg */
201:
202: /* 1 for registers that have pervasive standard uses
203: and are not available for the register allocator.
204:
205: On the hp9k800, these are:
206: Reg 0 = 0 (hardware). However, 0 is used for condition code,
207: so is not fixed.
208: Reg 1 = ADDIL target/Temporary (hardware).
209: Reg 2 = Return Pointer
210: Reg 3 = Unused
211: Reg 4 = Frame Pointer (Gnu)
212: Reg 5-18 = Preserved Registers
213: Reg 19-22 = Temporary Registers
214: Reg 23-26 = Temporary/Parameter Registers
215: Reg 27 = Global Data Pointer (hp)
216: Reg 28 = Temporary/???/Return Value register
217: Reg 29 = Temporary/Static Chain/Return Value register
218: Reg 30 = stack pointer
219: Reg 31 = Temporary/Millicode Return Pointer (hp)
220:
221: Freg 0-3 = Status Registers
222: Freg 4-7 = Arguments/Return Value
223: Freg 8-11 = Temporary Registers
224: Freg 12-15 = Preserved Registers
225:
226: Freg 16-31 = Reserved
227:
228: On the Snake, fp regs are
229:
230: Freg 0-3 = Status Registers
231: Freg 4L-7R = Arguments/Return Value
232: Freg 8L-11R = Temporary Registers
233: Freg 12L-15R = Preserved Registers
234:
235: Freg 16L-31R = ?? Some partition of temporary and preserved; assume
236: preserved for now.
237:
238:
239: */
240:
241: #define FIXED_REGISTERS \
242: {0, 0, 1, 1, 1, 0, 0, 0, \
243: 0, 0, 0, 0, 0, 0, 0, 0, \
244: 0, 0, 0, 0, 0, 0, 0, 0, \
245: 0, 0, 0, 1, 0, 0, 1, 1, \
246: /* 1.0 fp registers */ \
247: 1, 1, 1, 1, 0, 0, 0, 0, \
248: 0, 0, 0, 0, 0, 0, 0, 0, \
249: /* 1.1 fp registers */ \
250: 1, 1, 1, 1, 1, 1, 1, 1, \
251: 0, 0, 0, 0, 0, 0, 0, 0, \
252: 0, 0, 0, 0, 0, 0, 0, 0, \
253: 0, 0, 0, 0, 0, 0, 0, 0, \
254: 0, 0, 0, 0, 0, 0, 0, 0, \
255: 0, 0, 0, 0, 0, 0, 0, 0, \
256: 0, 0, 0, 0, 0, 0, 0, 0, \
257: 0, 0, 0, 0, 0, 0, 0, 0, \
258: 1}
259:
260: /* 1 for registers not available across function calls.
261: These must include the FIXED_REGISTERS and also any
262: registers that can be used without being saved.
263: The latter must include the registers where values are returned
264: and the register where structure-value addresses are passed.
265: Aside from that, you can include as many other registers as you like. */
266: #define CALL_USED_REGISTERS \
267: {1, 1, 1, 1, 1, 0, 0, 0, \
268: 0, 0, 0, 0, 0, 0, 0, 0, \
269: 0, 0, 0, 1, 1, 1, 1, 1, \
270: 1, 1, 1, 1, 1, 1, 1, 1, \
271: /* 1.0 fp registers */ \
272: 1, 1, 1, 1, 1, 1, 1, 1, \
273: 1, 1, 1, 1, 0, 0, 0, 0, \
274: /* 1.1 fp registers */ \
275: 1, 1, 1, 1, 1, 1, 1, 1, \
276: 1, 1, 1, 1, 1, 1, 1, 1, \
277: 1, 1, 1, 1, 1, 1, 1, 1, \
278: 0, 0, 0, 0, 0, 0, 0, 0, \
279: 0, 0, 0, 0, 0, 0, 0, 0, \
280: 0, 0, 0, 0, 1, 1, 1, 1, \
281: 1, 1, 1, 1, 1, 1, 1, 1, \
282: 1, 1, 1, 1, 1, 1, 1, 1, \
283: 1}
284:
285: /* Make sure everything's fine if we *don't* have a given processor.
286: This assumes that putting a register in fixed_regs will keep the
287: compiler's mitts completely off it. We don't bother to zero it out
288: of register classes.
289:
290: Make register 27 global for now. We'll undo this kludge after 2.1. */
291:
292: #define CONDITIONAL_REGISTER_USAGE \
293: { \
294: int i; \
295: HARD_REG_SET x; \
296: global_regs[27] = 1; \
297: if (!TARGET_SNAKE) \
298: { \
299: COPY_HARD_REG_SET (x, reg_class_contents[(int)SNAKE_FP_REGS]);\
300: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
301: if (TEST_HARD_REG_BIT (x, i)) \
302: fixed_regs[i] = call_used_regs[i] = 1; \
303: } \
304: else \
305: { \
306: COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]); \
307: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
308: if (TEST_HARD_REG_BIT (x, i)) \
309: fixed_regs[i] = call_used_regs[i] = 1; \
310: } \
311: }
312:
313: /* Allocated the call used registers first. This should minimize
314: the number of registers that need to be saved (as call used
315: registers will generally not be allocated across a call).
316:
317: It is possible that it would be wise to allocate the floating point
318: registers before the regular ones, but I doubt it matters. Same
319: comment for parameters versus normal. */
320:
321: #define REG_ALLOC_ORDER \
322: {19, 20, 21, 22, 23, 24, 25, 26, \
323: 27, 28, 29, 30, 31, 40, 41, 42, \
324: 43, 36, 37, 38, 39, \
325: 56, 57, 58, 59, 60, 61, 62, 63, \
326: 64, 65, 66, 67, 68, 69, 70, 71, \
327: 72, 73, 74, 75, 76, 77, 78, 79, \
328: 80, 81, 82, 83, 84, 85, 86, 87, \
329: 88, 89, 90, 91, 92, 93, 94, 95, \
330: 96, 97, 98, 99, 100, 101, 102, 103, \
331: 104, 105, 106, 107, 108, 109, 110, 111,\
332: 5, 6, 7, \
333: 8, 9, 10, 11, 12, 13, 14, 15, \
334: 16, 17, 18, 44, 45, 46, 47, \
335: 48, 49, 50, 51, 52, 53, 54, 55, \
336: 1, \
337: 2, 3, 4, 32, 33, 34, 35, 0, \
338: 112}
339:
340:
341: /* Return number of consecutive hard regs needed starting at reg REGNO
342: to hold something of mode MODE.
343: This is ordinarily the length in words of a value of mode MODE
344: but can be less for certain modes in special long registers.
345:
346: On the hp9k800, ordinary registers hold 32 bits worth;
347: The floating point registers are 64 bits wide. Snake fp regs are 32
348: bits wide */
349: #define HARD_REGNO_NREGS(REGNO, MODE) \
350: (((REGNO) < 32 || (REGNO) >= 48) \
351: ? ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) : 1)
352:
353: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
354: On the hp9k800, the cpu registers can hold any mode. We
355: force this to be an even register is it cannot hold the full mode. */
356: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
357: ((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
358: : (REGNO) < 32 ? ((GET_MODE_SIZE (MODE) <= 4) ? 1 : ((REGNO) & 1) == 0)\
359: : (REGNO) < 48 ? (GET_MODE_SIZE (MODE) >= 4) \
360: : (GET_MODE_SIZE (MODE) > 4 ? ((REGNO) & 1) == 0 \
361: : GET_MODE_SIZE (MODE) == 4))
362:
363: /* Value is 1 if it is a good idea to tie two pseudo registers
364: when one has mode MODE1 and one has mode MODE2.
365: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
366: for any hard reg, then this must be 0 for correct output. */
367: #define MODES_TIEABLE_P(MODE1, MODE2) \
368: ((MODE1) == (MODE2) || GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
369:
370: /* Specify the registers used for certain standard purposes.
371: The values of these macros are register numbers. */
372:
373: /* the hp9k800 pc isn't overloaded on a register that the compiler knows about. */
374: /* #define PC_REGNUM */
375:
376: /* Register to use for pushing function arguments. */
377: #define STACK_POINTER_REGNUM 30
378:
379: /* Base register for access to local variables of the function. */
380: #define FRAME_POINTER_REGNUM 4
381:
382: /* Value should be nonzero if functions must have frame pointers.
383: Zero means the frame pointer need not be set up (and parms
384: may be accessed via the stack pointer) in functions that seem suitable.
385: This is computed in `reload', in reload1.c. */
386: extern int leaf_function;
387:
388: #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
389:
390:
391: /* C statement to store the difference between the frame pointer
392: and the stack pointer values immediately after the function prologue.
393:
394: Note, we always pretend that this is a leaf function because if
395: it's not, there's no point in trying to eliminate the
396: frame pointer. If it is a leaf function, we guessed right! */
397: #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
398: do { int __fsize = compute_frame_size (get_frame_size (), 1) + 32; \
399: (VAR) = -(TARGET_SNAKE ? (__fsize + 63) & ~63 : __fsize); } while (0)
400:
401: /* Base register for access to arguments of the function. */
402: #define ARG_POINTER_REGNUM 4
403:
404: /* Register in which static-chain is passed to a function. */
405: /* ??? */
406: #define STATIC_CHAIN_REGNUM 29
407:
408: /* Register which holds offset table for position-independent
409: data references. */
410:
411: #define PIC_OFFSET_TABLE_REGNUM 18
412:
413: #define INITIALIZE_PIC initialize_pic ()
414: #define FINALIZE_PIC finalize_pic ()
415:
416: /* Register in which address to store a structure value
417: is passed to a function. */
418: #define STRUCT_VALUE_REGNUM 28
419:
420: /* Define the classes of registers for register constraints in the
421: machine description. Also define ranges of constants.
422:
423: One of the classes must always be named ALL_REGS and include all hard regs.
424: If there is more than one class, another class must be named NO_REGS
425: and contain no registers.
426:
427: The name GENERAL_REGS must be the name of a class (or an alias for
428: another name such as ALL_REGS). This is the class of registers
429: that is allowed by "g" or "r" in a register constraint.
430: Also, registers outside this class are allocated only when
431: instructions express preferences for them.
432:
433: The classes must be numbered in nondecreasing order; that is,
434: a larger-numbered class must never be contained completely
435: in a smaller-numbered class.
436:
437: For any two classes, it is very desirable that there be another
438: class that represents their union. */
439:
440: /* The hp9k800 has four kinds of registers: general regs, 1.0 fp regs,
441: 1.1 fp regs, and the high 1.1 fp regs, to which the operands of
442: fmpyadd and fmpysub are restricted. */
443:
444: enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, GENERAL_OR_FP_REGS,
445: HI_SNAKE_FP_REGS, SNAKE_FP_REGS, GENERAL_OR_SNAKE_FP_REGS,
446: SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES};
447:
448: #define N_REG_CLASSES (int) LIM_REG_CLASSES
449:
450: /* Give names of register classes as strings for dump file. */
451:
452: #define REG_CLASS_NAMES \
453: { "NO_REGS", "R1_REGS", "GENERAL_REGS", "FP_REGS", "GENERAL_OR_FP_REGS",\
454: "HI_SNAKE_FP_REGS", "SNAKE_FP_REGS", "GENERAL_OR_SNAKE_FP_REGS",\
455: "SHIFT_REGS", "ALL_REGS"}
456:
457: /* Define which registers fit in which classes.
458: This is an initializer for a vector of HARD_REG_SET
459: of length N_REG_CLASSES. Register 0, the "condition code" register,
460: is in no class. */
461:
462: #define REG_CLASS_CONTENTS \
463: { {0, 0, 0, 0}, /* NO_REGS */ \
464: {0x2, 0, 0, 0}, /* R1_REGS */ \
465: {-2, 0, 0, 0}, /* GENERAL_REGS */ \
466: {0, 0xffff, 0, 0}, /* FP_REGS */ \
467: {-2, 0xffff, 0, 0}, /* GENERAL_OR_FP_REGS */\
468: {0, 0, 0xffff0000, 0xffff}, /* HI_SNAKE_FP_REGS */ \
469: {0, 0xffff0000, ~0, 0xffff}, /* SNAKE_FP_REGS */ \
470: {-2, 0xffff0000, ~0, 0xffff}, /* GENERAL_OR_SNAKE_FP_REGS */\
471: {0, 0, 0, 0x10000}, /* SHIFT_REGS */ \
472: {-2, ~0, ~0, 0x1ffff}} /* ALL_REGS */
473:
474: /* The same information, inverted:
475: Return the class number of the smallest class containing
476: reg number REGNO. This could be a conditional expression
477: or could index an array. */
478:
479: #define REGNO_REG_CLASS(REGNO) \
480: ((REGNO) == 0 ? NO_REGS \
481: : (REGNO) == 1 ? R1_REGS \
482: : (REGNO) < 32 ? GENERAL_REGS \
483: : (REGNO) < 48 ? FP_REGS \
484: : (REGNO) < 80 ? SNAKE_FP_REGS \
485: : (REGNO) < 112 ? HI_SNAKE_FP_REGS \
486: : SHIFT_REGS)
487:
488: /* The class value for index registers, and the one for base regs. */
489: #define INDEX_REG_CLASS GENERAL_REGS
490: #define BASE_REG_CLASS GENERAL_REGS
491:
492: /* Get reg_class from a letter such as appears in the machine description. */
493:
494: #define REG_CLASS_FROM_LETTER(C) \
495: ((C) == 'r' ? GENERAL_REGS : \
496: ((C) == 'f' ? (!TARGET_SNAKE ? FP_REGS : NO_REGS) : \
497: ((C) == 'x' ? (TARGET_SNAKE ? SNAKE_FP_REGS : NO_REGS) : \
498: ((C) == 'y' ? (TARGET_SNAKE ? HI_SNAKE_FP_REGS : NO_REGS) :\
499: ((C) == 'q' ? SHIFT_REGS : \
500: ((C) == 'a' ? R1_REGS : NO_REGS))))))
501:
502: /* The letters I, J, K, L and M in a register constraint string
503: can be used to stand for particular ranges of immediate operands.
504: This macro defines what the ranges are.
505: C is the letter, and VALUE is a constant value.
506: Return 1 if VALUE is in the range specified by C.
507:
508: HP9000/800 immediate field sizes:
509: 5 bits: scalar/floating short loads + stores; deposit; conditional branch
510: 11 bits: arithmetic immediate, compare immediate
511: 14 bits: loads and stores; load offset
512: 21 bits: load and add immediate long (but this isn't really used)
513: (there are also 13-bit and 26-bit immediates but only in system instructions)
514:
515: `I' is used for the 11 bit constants.
516: `J' is used for the 14 bit constants.
517: `K' is used for unsigned 5 bit constants (extract/deposit operands).
518: `L' is used for the 5 bit constants.
519: `M' is used for 0. */
520:
521: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
522: ((C) == 'I' ? (unsigned) ((VALUE) + 0x400) < 0x800 \
523: : (C) == 'J' ? (unsigned) ((VALUE) + 0x2000) < 0x4000 \
524: : (C) == 'K' ? (unsigned) (VALUE) < 0x20 \
525: : (C) == 'L' ? (unsigned) ((VALUE) + 0x10) < 0x20 \
526: : (C) == 'M' ? (VALUE) == 0 \
527: : 0)
528:
529: /* Similar, but for floating constants, and defining letters G and H.
530: Here VALUE is the CONST_DOUBLE rtx itself. */
531:
532: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
533: ((C) == 'G' && XINT (VALUE, 0) == 0 && XINT (VALUE, 1) == 0)
534:
535: /* Given an rtx X being reloaded into a reg required to be
536: in class CLASS, return the class of reg to actually use.
537: In general this is just CLASS; but on some machines
538: in some cases it is preferable to use a more restrictive class. */
539: #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
540:
541: /* Return the register class of a scratch register needed to copy IN into
542: or out of a register in CLASS in MODE. If it can be done directly,
543: NO_REGS is returned. */
544:
545: #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
546: secondary_reload_class (CLASS, MODE, IN)
547:
548: /* Return the maximum number of consecutive registers
549: needed to represent mode MODE in a register of class CLASS. */
550: #define CLASS_MAX_NREGS(CLASS, MODE) \
551: ((CLASS) == FP_REGS ? 1 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
552:
553: /* Stack layout; function entry, exit and calling. */
554:
555: /* Define this if pushing a word on the stack
556: makes the stack pointer a smaller address. */
557: /* #define STACK_GROWS_DOWNWARD */
558:
559: /* Believe it or not. */
560: #define ARGS_GROW_DOWNWARD
561:
562: /* Define this if the nominal address of the stack frame
563: is at the high-address end of the local variables;
564: that is, each additional local variable allocated
565: goes at a more negative offset in the frame. */
566: /* #define FRAME_GROWS_DOWNWARD */
567:
568: /* Offset within stack frame to start allocating local variables at.
569: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
570: first local allocated. Otherwise, it is the offset to the BEGINNING
571: of the first local allocated. */
572: #define STARTING_FRAME_OFFSET 8
573:
574: /* If we generate an insn to push BYTES bytes,
575: this says how many the stack pointer really advances by.
576: On the hp9k800, don't define this because there are no push insns. */
577: /* #define PUSH_ROUNDING(BYTES) */
578:
579: /* Offset of first parameter from the argument pointer register value.
580: This value will be negated because the arguments grow down.
581: Also note that on STACK_GROWS_UPWARD machines (such as this one)
582: this is the distance from the frame pointer to the end of the first
583: argument, not it's beginning. To get the real offset of the first
584: argument, the size of the argument must be added.
585:
586: ??? Have to check on this.*/
587:
588: /* #define FIRST_PARM_OFFSET(FNDECL) 36 */
589: #define FIRST_PARM_OFFSET(FNDECL) -32
590:
591: /* Absolute value of offset from top-of-stack address to location to store the
592: function parameter if it can't go in a register.
593: Addresses for following parameters are computed relative to this one. */
594: /* #define FIRST_PARM_CALLER_OFFSET(FNDECL) 36 */
595: #define FIRST_PARM_CALLER_OFFSET(FNDECL) -32
596:
597:
598: /* When a parameter is passed in a register, stack space is still
599: allocated for it. */
600: #define REG_PARM_STACK_SPACE(DECL) 16
601:
602: /* Define this if the above stack space is to be considered part of the
603: space allocated by the caller. */
604: #define OUTGOING_REG_PARM_STACK_SPACE
605:
606: /* Keep the stack pointer constant throughout the function.
607: This is both an optimization and a necessity: longjmp
608: doesn't behave itself when the stack pointer moves within
609: the function! */
610: #define ACCUMULATE_OUTGOING_ARGS
611:
612: /* The weird HPPA calling conventions require a minimum of 48 bytes on
613: the stack: 16 bytes for register saves, and 32 bytes for magic.
614: This is the difference between the logical top of stack and the
615: actual sp. */
616: #define STACK_POINTER_OFFSET -32
617:
618: #define STACK_DYNAMIC_OFFSET(FNDECL) \
619: ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size)
620:
621: /* Value is 1 if returning from a function call automatically
622: pops the arguments described by the number-of-args field in the call.
623: FUNTYPE is the data type of the function (as a tree),
624: or for a library call it is an identifier node for the subroutine name. */
625:
626: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
627:
628: /* Define how to find the value returned by a function.
629: VALTYPE is the data type of the value (as a tree).
630: If the precise function being called is known, FUNC is its FUNCTION_DECL;
631: otherwise, FUNC is 0. */
632:
633: /* On the hp9k800 the value is found in register(s) 28(-29), unless
634: the mode is SF or DF. Then the value is returned in fr4 (36, ) */
635:
636:
637: #define FUNCTION_VALUE(VALTYPE, FUNC) \
638: gen_rtx (REG, TYPE_MODE (VALTYPE), ((TYPE_MODE (VALTYPE) == SFmode ||\
639: TYPE_MODE (VALTYPE) == DFmode) ? \
640: (TARGET_SNAKE ? 56 : 36) : 28))
641:
642: #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \
643: FUNCTION_VALUE(VALTYPE, FUNC)
644:
645: /* Define how to find the value returned by a library function
646: assuming the value has mode MODE. */
647:
648: #define LIBCALL_VALUE(MODE) \
649: gen_rtx (REG, MODE, (MODE == SFmode || MODE == DFmode ?\
650: (TARGET_SNAKE ? 56 : 36) : 28))
651:
652: /* 1 if N is a possible register number for a function value
653: as seen by the caller. */
654:
655: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 28 || (N) == 36 || (N) == 56)
656:
657: /* 1 if N is a possible register number for function argument passing. */
658:
659: #define FUNCTION_ARG_REGNO_P(N) (((N) >= 23 && (N) <= 26) || \
660: ((N) >= 36 && (N) <= 39) || \
661: ((N) >= 56 && (N) <= 63))
662:
663: /* Define a data type for recording info about an argument list
664: during the scan of that argument list. This data type should
665: hold all necessary information about the function itself
666: and about the args processed so far, enough to enable macros
667: such as FUNCTION_ARG to determine where the next arg should go.
668:
669: On the hp9k800, this is a single integer, which is a number of words
670: of arguments scanned so far (including the invisible argument,
671: if any, which holds the structure-value-address).
672: Thus 4 or more means all following args should go on the stack. */
673:
674: #define CUMULATIVE_ARGS int
675:
676: /* Initialize a variable CUM of type CUMULATIVE_ARGS
677: for a call to a function whose data type is FNTYPE.
678: For a library call, FNTYPE is 0.
679: */
680:
681: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) ((CUM) = 0)
682:
683: /* Figure out the size in words of the function argument. */
684:
685: #define FUNCTION_ARG_SIZE(MODE, TYPE) \
686: ((((MODE) != BLKmode ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE))+3)/4)
687:
688: /* Update the data in CUM to advance over an argument
689: of mode MODE and data type TYPE.
690: (TYPE is null for libcalls where that information may not be available.) */
691:
692: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
693: (((((CUM) & 01) && (TYPE) != 0 && TYPE_ALIGN (TYPE) > BITS_PER_WORD)\
694: && (CUM)++), (CUM) += FUNCTION_ARG_SIZE(MODE, TYPE))
695:
696: /* Determine where to put an argument to a function.
697: Value is zero to push the argument on the stack,
698: or a hard register in which to store the argument.
699:
700: MODE is the argument's machine mode.
701: TYPE is the data type of the argument (as a tree).
702: This is null for libcalls where that information may
703: not be available.
704: CUM is a variable of type CUMULATIVE_ARGS which gives info about
705: the preceding args and about the function being called.
706: NAMED is nonzero if this argument is a named parameter
707: (otherwise it is an extra parameter matching an ellipsis). */
708:
709: /* On the hp9k800 the first four words of args are normally in registers
710: and the rest are pushed. But any arg that won't entirely fit in regs
711: is pushed. */
712:
713: #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
714:
715: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
716: (4 >= ((CUM) + FUNCTION_ARG_SIZE ((MODE), (TYPE))) \
717: ? gen_rtx (REG, \
718: (MODE), \
719: ((MODE) == SFmode ? \
720: (TARGET_SNAKE ? 56 + 2 * (CUM) : 36 + (CUM)) : \
721: ((MODE) == DFmode ? ((CUM) ? \
722: (TARGET_SNAKE ? 62 : 39) : \
723: (TARGET_SNAKE ? 58 : 37)) : \
724: (27 - (CUM) - FUNCTION_ARG_SIZE ((MODE), (TYPE)))))) \
725: : 0)
726:
727: /* Define where a function finds its arguments.
728: This would be different from FUNCTION_ARG if we had register windows. */
729:
730: #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
731: FUNCTION_ARG (CUM, MODE, TYPE, NAMED)
732:
733: /* For an arg passed partly in registers and partly in memory,
734: this is the number of registers used.
735: For args passed entirely in registers or entirely in memory, zero. */
736:
737: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
738:
739: /* If defined, a C expression that gives the alignment boundary, in
740: bits, of an argument with the specified mode and type. If it is
741: not defined, `PARM_BOUNDARY' is used for all arguments. */
742:
743: #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
744: (((TYPE) != 0) \
745: ? ((TYPE_ALIGN(TYPE) <= PARM_BOUNDARY) \
746: ? PARM_BOUNDARY \
747: : TYPE_ALIGN(TYPE)) \
748: : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
749: ? PARM_BOUNDARY \
750: : GET_MODE_ALIGNMENT(MODE)))
751:
752: /* Arguments larger than eight bytes are passed by invisible reference */
753:
754: #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
755: ((TYPE) && int_size_in_bytes (TYPE) > 8)
756:
757: extern struct rtx_def *hppa_compare_op0, *hppa_compare_op1;
758: extern enum cmp_type hppa_branch_type;
759:
760: /* Output the label for a function definition. */
761: #ifdef HP_FP_ARG_DESCRIPTOR_REVERSED
762: #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
763: do { fprintf (FILE, ",ARGW%d=FR", (ARG0)); \
764: fprintf (FILE, ",ARGW%d=FU", (ARG1));} while (0)
765: #else
766: #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
767: do { fprintf (FILE, ",ARGW%d=FU", (ARG0)); \
768: fprintf (FILE, ",ARGW%d=FR", (ARG1));} while (0)
769: #endif
770: #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
771: do { tree fntype = DECL_RESULT (DECL); \
772: tree tree_type = TREE_TYPE (DECL); \
773: tree parm; \
774: int i; \
775: if (TREE_PUBLIC (DECL)) \
776: { \
777: fputs ("\t.EXPORT ", FILE); assemble_name (FILE, NAME); \
778: fputs (",PRIV_LEV=3", FILE); \
779: for (parm = DECL_ARGUMENTS (DECL), i = 0; parm && i < 4; \
780: parm = TREE_CHAIN (parm)) \
781: { \
782: if (TYPE_MODE (DECL_ARG_TYPE (parm)) == SFmode) \
783: fprintf (FILE, ",ARGW%d=FR", i++); \
784: else if (TYPE_MODE (DECL_ARG_TYPE (parm)) == DFmode) \
785: { \
786: if (i == 1) i++; \
787: ASM_DOUBLE_ARG_DESCRIPTORS (FILE, i++, i++); \
788: } \
789: else \
790: { \
791: int arg_size = \
792: FUNCTION_ARG_SIZE (TYPE_MODE (DECL_ARG_TYPE (parm)),\
793: DECL_ARG_TYPE (parm)); \
794: if (arg_size == 2 && i <= 2) \
795: { \
796: if (i == 1) i++; \
797: fprintf (FILE, ",ARGW%d=GR", i++); \
798: fprintf (FILE, ",ARGW%d=GR", i++); \
799: } \
800: else if (arg_size == 1) \
801: fprintf (FILE, ",ARGW%d=GR", i++); \
802: else \
803: i += arg_size; \
804: } \
805: } \
806: /* anonymous args */ \
807: if (TYPE_ARG_TYPES (tree_type) != 0 \
808: && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (tree_type)))\
809: != void_type_node)) \
810: { \
811: for (; i < 4; i++) \
812: fprintf (FILE, ",ARGW%d=GR", i); \
813: } \
814: if (TYPE_MODE (fntype) == DFmode) \
815: fprintf (FILE, ",RTNVAL=FR"); \
816: else if (TYPE_MODE (fntype) == SFmode) \
817: fprintf (FILE, ",RTNVAL=FU"); \
818: else if (fntype != void_type_node) \
819: fprintf (FILE, ",RTNVAL=GR"); \
820: fputs ("\n", FILE); \
821: } \
822: ASM_OUTPUT_LABEL (FILE, NAME);} while (0)
823:
824: /* Two views of the size of the current frame. */
825: extern int actual_fsize;
826: extern int apparent_fsize;
827:
828: /* This macro generates the assembly code for function entry.
829: FILE is a stdio stream to output the code to.
830: SIZE is an int: how many units of temporary storage to allocate.
831: Refer to the array `regs_ever_live' to determine which registers
832: to save; `regs_ever_live[I]' is nonzero if register number I
833: is ever used in the function. This macro is responsible for
834: knowing which registers should not be saved even if used. */
835:
836: /* On HP-PA, move-double insns between fpu and cpu need an 8-byte block
837: of memory. If any fpu reg is used in the function, we allocate
838: such a block here, at the bottom of the frame, just in case it's needed.
839:
840: If this function is a leaf procedure, then we may choose not
841: to do a "save" insn. The decision about whether or not
842: to do this is made in regclass.c. */
843:
844: #define FUNCTION_PROLOGUE(FILE, SIZE) \
845: output_function_prologue (FILE, SIZE, leaf_function)
846:
847: /* Output assembler code to FILE to increment profiler label # LABELNO
848: for profiling a function entry.
849:
850: Because HPUX _mcount is so different, we actually emit the
851: profiling code in function_prologue. This just stores LABELNO for
852: that. */
853:
854: #define PROFILE_BEFORE_PROLOGUE
855: #define FUNCTION_PROFILER(FILE, LABELNO) \
856: { extern int hp_profile_labelno; hp_profile_labelno = (LABELNO);}
857:
858: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
859: the stack pointer does not matter. The value is tested only in
860: functions that have frame pointers.
861: No definition is equivalent to always zero. */
862:
863: extern int may_call_alloca;
864: extern int current_function_pretend_args_size;
865:
866: #define EXIT_IGNORE_STACK \
867: (get_frame_size () != 0 \
868: || current_function_calls_alloca || current_function_outgoing_args_size)
869:
870:
871: /* This macro generates the assembly code for function exit,
872: on machines that need it. If FUNCTION_EPILOGUE is not defined
873: then individual return instructions are generated for each
874: return statement. Args are same as for FUNCTION_PROLOGUE.
875:
876: The function epilogue should not depend on the current stack pointer!
877: It should use the frame pointer only. This is mandatory because
878: of alloca; we also take advantage of it to omit stack adjustments
879: before returning. */
880:
881: /* This declaration is needed due to traditional/ANSI
882: incompatibilities which cannot be #ifdefed away
883: because they occur inside of macros. Sigh. */
884: extern union tree_node *current_function_decl;
885:
886: #define FUNCTION_EPILOGUE(FILE, SIZE) \
887: output_function_epilogue (FILE, SIZE, leaf_function)
888: #define DELAY_SLOTS_FOR_EPILOGUE 1
889: #define ELIGIBLE_FOR_EPILOGUE_DELAY(trial, slots_filled) \
890: eligible_for_epilogue_delay (trial, slots_filled)
891:
892: /* Output assembler code for a block containing the constant parts
893: of a trampoline, leaving space for the variable parts. */
894:
895: #define TRAMPOLINE_TEMPLATE(FILE) {}
896:
897: /* Length in units of the trampoline for entering a nested function. */
898:
899: #define TRAMPOLINE_SIZE 0
900:
901: /* Emit RTL insns to initialize the variable parts of a trampoline.
902: FNADDR is an RTX for the address of the function's pure code.
903: CXT is an RTX for the static chain value for the function.
904:
905: This takes 16 insns: 2 shifts & 2 ands (to split up addresses), 4 sethi
906: (to load in opcodes), 4 iors (to merge address and opcodes), and 4 writes
907: (to store insns). This is a bit excessive. Perhaps a different
908: mechanism would be better here. */
909: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) {}
910:
911: /* Emit code for a call to builtin_saveregs. We must emit USE insns which
912: reference the 4 integer arg registers and 4 fp arg registers.
913: Ordinarily they are not call used registers, but they are for
914: _builtin_saveregs, so we must make this explicit. */
915:
916:
917: #if 0
918: #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) \
919: (emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, TImode, 23))), \
920: (TARGET_SNAKE ? \
921: (emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 56))), \
922: emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 58))), \
923: emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 60))), \
924: emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 62)))) : \
925: (emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 36))), \
926: emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 37))), \
927: emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 38))), \
928: emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 39))))))
929: #endif
930: #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) (rtx)hppa_builtin_saveregs (ARGLIST)
931:
932:
933: /* Addressing modes, and classification of registers for them. */
934:
935: #define HAVE_POST_INCREMENT
936: #define HAVE_POST_DECREMENT
937:
938: #define HAVE_PRE_DECREMENT
939: #define HAVE_PRE_INCREMENT
940:
941: /* Macros to check register numbers against specific register classes. */
942:
943: /* These assume that REGNO is a hard or pseudo reg number.
944: They give nonzero only if REGNO is a hard reg of the suitable class
945: or a pseudo reg currently allocated to a suitable hard reg.
946: Since they use reg_renumber, they are safe only once reg_renumber
947: has been allocated, which happens in local-alloc.c. */
948:
949: #define REGNO_OK_FOR_INDEX_P(REGNO) \
950: ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
951: #define REGNO_OK_FOR_BASE_P(REGNO) \
952: ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
953: #define REGNO_OK_FOR_FP_P(REGNO) \
954: (((REGNO) >= 32 || reg_renumber[REGNO] >= 32)\
955: && ((REGNO) <= 111 || reg_renumber[REGNO] <= 111))
956:
957: /* Now macros that check whether X is a register and also,
958: strictly, whether it is in a specified class.
959:
960: These macros are specific to the the hp9k800, and may be used only
961: in code for printing assembler insns and in conditions for
962: define_optimization. */
963:
964: /* 1 if X is an fp register. */
965:
966: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
967:
968: /* Maximum number of registers that can appear in a valid memory address. */
969:
970: #define MAX_REGS_PER_ADDRESS 2
971:
972: /* Recognize any constant value that is a valid address. */
973:
974: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
975:
976: /* Nonzero if the constant value X is a legitimate general operand.
977: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
978:
979: /*#define LEGITIMATE_CONSTANT_P(X) (1)*/
980: #define LEGITIMATE_CONSTANT_P(X) \
981: (GET_CODE (X) != CONST_DOUBLE)
982:
983: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
984: and check its validity for a certain class.
985: We have two alternate definitions for each of them.
986: The usual definition accepts all pseudo regs; the other rejects
987: them unless they have been allocated suitable hard regs.
988: The symbol REG_OK_STRICT causes the latter definition to be used.
989:
990: Most source files want to accept pseudo regs in the hope that
991: they will get allocated to the class that the insn wants them to be in.
992: Source files for reload pass need to be strict.
993: After reload, it makes no difference, since pseudo regs have
994: been eliminated by then. */
995:
996: /* Optional extra constraints for this machine. Borrowed from sparc.h.
997:
998: For the HPPA, `Q' means that this is a memory operand but not a
999: symbolic memory operand. Note that an unassigned pseudo register
1000: is such a memory operand. Needed because reload will generate
1001: these things in insns and then not re-recognize the insns, causing
1002: constrain_operands to fail.
1003:
1004: `R' handles the LO_SUM which can be an address for `Q'.
1005:
1006: `S' handles constraints for calls.
1007:
1008: `T' is for fp load and store addresses.*/
1009:
1010: #ifndef REG_OK_STRICT
1011:
1012: /* Nonzero if X is a hard reg that can be used as an index
1013: or if it is a pseudo reg. */
1014: #define REG_OK_FOR_INDEX_P(X) \
1015: (REGNO (X) && (REGNO (X) < 32 || REGNO (X) > FIRST_PSEUDO_REGISTER))
1016: /* Nonzero if X is a hard reg that can be used as a base reg
1017: or if it is a pseudo reg. */
1018: #define REG_OK_FOR_BASE_P(X) \
1019: (REGNO (X) && (REGNO (X) < 32 || REGNO (X) > FIRST_PSEUDO_REGISTER))
1020:
1021: #define EXTRA_CONSTRAINT(OP, C) \
1022: ((C) == 'Q' ? \
1023: ((GET_CODE (OP) == MEM \
1024: && memory_address_p (GET_MODE (OP), XEXP (OP, 0)) \
1025: && ! symbolic_memory_operand (OP, VOIDmode))) \
1026: : ((C) == 'R' ? \
1027: (GET_CODE (OP) == LO_SUM \
1028: && GET_CODE (XEXP (OP, 0)) == REG \
1029: && REG_OK_FOR_BASE_P (XEXP (OP, 0))) \
1030: : ((C) == 'S' \
1031: ? CONSTANT_P (OP) || memory_address_p (Pmode, OP)\
1032: : ((C) == 'T' ? short_memory_operand (OP, VOIDmode) : 0))))\
1033:
1034:
1035: #else
1036:
1037: /* Nonzero if X is a hard reg that can be used as an index. */
1038: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1039: /* Nonzero if X is a hard reg that can be used as a base reg. */
1040: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1041:
1042: #define EXTRA_CONSTRAINT(OP, C) \
1043: (((C) == 'Q' || (C) == 'T') ? \
1044: (GET_CODE (OP) == REG ? \
1045: (REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1046: && reg_renumber[REGNO (OP)] < 0) \
1047: : GET_CODE (OP) == MEM) \
1048: : ((C) == 'R' ? \
1049: (GET_CODE (OP) == LO_SUM \
1050: && GET_CODE (XEXP (OP, 0)) == REG \
1051: && REG_OK_FOR_BASE_P (XEXP (OP, 0))) \
1052: : (CONSTANT_P (OP) \
1053: || (GET_CODE (OP) == REG && reg_renumber[REGNO (OP)] > 0)\
1054: || strict_memory_address_p (Pmode, OP))))
1055:
1056: #endif
1057:
1058: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1059: that is a valid memory address for an instruction.
1060: The MODE argument is the machine mode for the MEM expression
1061: that wants to use this address.
1062:
1063: On the hp9k800, the actual legitimate addresses must be
1064: REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1065: But we can treat a SYMBOL_REF as legitimate if it is part of this
1066: function's constant-pool, because such addresses can actually
1067: be output as REG+SMALLINT. */
1068:
1069: #define VAL_5_BITS_P(X) ((unsigned)(X) + 0x10 < 0x20)
1070: #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1071:
1072: #define VAL_U5_BITS_P(X) ((unsigned)(X) < 0x20)
1073: #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1074:
1075: #define VAL_11_BITS_P(X) ((unsigned)(X) + 0x400 < 0x800)
1076: #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1077:
1078: #define VAL_14_BITS_P(X) ((unsigned)(X) + 0x2000 < 0x4000)
1079: #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1080:
1081: #define FITS_14_BITS(X) \
1082: (GET_CODE (X) == CONST_INT && INT_14_BITS (X))
1083:
1084: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1085: { \
1086: if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1087: || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1088: || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1089: && REG_P (XEXP (X, 0)) \
1090: && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1091: goto ADDR; \
1092: else if (GET_CODE (X) == PLUS) \
1093: { \
1094: rtx base = 0, index; \
1095: if (flag_pic && XEXP (X, 0) == pic_offset_table_rtx)\
1096: { \
1097: if (GET_CODE (XEXP (X, 1)) == REG \
1098: && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1099: goto ADDR; \
1100: else if (flag_pic == 1 \
1101: && GET_CODE (XEXP (X, 1)) != REG \
1102: && GET_CODE (XEXP (X, 1)) != LO_SUM \
1103: && GET_CODE (XEXP (X, 1)) != MEM) \
1104: goto ADDR; \
1105: } \
1106: else if (REG_P (XEXP (X, 0)) \
1107: && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1108: base = XEXP (X, 0), index = XEXP (X, 1); \
1109: else if (REG_P (XEXP (X, 1)) \
1110: && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1111: base = XEXP (X, 1), index = XEXP (X, 0); \
1112: if (base != 0) \
1113: if (GET_CODE (index) == CONST_INT \
1114: && ((INT_14_BITS (index) && (MODE) != SFmode && (MODE) != DFmode) \
1115: || INT_5_BITS (index))) \
1116: goto ADDR; \
1117: } \
1118: else if (GET_CODE (X) == LO_SUM \
1119: && GET_CODE (XEXP (X, 0)) == REG \
1120: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1121: && CONSTANT_P (XEXP (X, 1)) \
1122: && (MODE) != SFmode \
1123: && (MODE) != DFmode) \
1124: goto ADDR; \
1125: else if (GET_CODE (X) == LO_SUM \
1126: && GET_CODE (XEXP (X, 0)) == SUBREG \
1127: && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1128: && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1129: && CONSTANT_P (XEXP (X, 1)) \
1130: && (MODE) != SFmode \
1131: && (MODE) != DFmode) \
1132: goto ADDR; \
1133: else if (GET_CODE (X) == LABEL_REF \
1134: || (GET_CODE (X) == CONST_INT \
1135: && INT_14_BITS (X))) \
1136: goto ADDR; \
1137: }
1138:
1139: /* Try machine-dependent ways of modifying an illegitimate address
1140: to be legitimate. If we find one, return the new, valid address.
1141: This macro is used in only one place: `memory_address' in explow.c.
1142:
1143: OLDX is the address as it was before break_out_memory_refs was called.
1144: In some cases it is useful to look at this to decide what needs to be done.
1145:
1146: MODE and WIN are passed so that this macro can use
1147: GO_IF_LEGITIMATE_ADDRESS.
1148:
1149: It is always safe for this macro to do nothing. It exists to recognize
1150: opportunities to optimize the output. */
1151:
1152: /* On the hp9k800, change REG+N into REG+REG, and REG+(X*Y) into REG+REG. */
1153:
1154: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1155: { if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1156: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
1157: copy_to_mode_reg (SImode, XEXP (X, 1))); \
1158: if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
1159: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
1160: copy_to_mode_reg (SImode, XEXP (X, 0))); \
1161: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
1162: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
1163: force_operand (XEXP (X, 0), 0)); \
1164: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
1165: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
1166: force_operand (XEXP (X, 1), 0)); \
1167: if (memory_address_p (MODE, X)) \
1168: goto WIN; \
1169: if (flag_pic) (X) = legitimize_pic_address (X, MODE, gen_reg_rtx (Pmode));\
1170: else if ((GET_CODE (X) == SYMBOL_REF & read_only_operand (X)) \
1171: || GET_CODE (X) == LABEL_REF) \
1172: (X) = gen_rtx (LO_SUM, Pmode, \
1173: copy_to_mode_reg (Pmode, gen_rtx (HIGH, Pmode, X)), X); \
1174: else if (GET_CODE (X) == SYMBOL_REF) \
1175: (X) = gen_rtx (LO_SUM, Pmode, \
1176: copy_to_mode_reg (Pmode, \
1177: gen_rtx (PLUS, Pmode, \
1178: copy_to_mode_reg (Pmode,\
1179: gen_rtx (HIGH, Pmode, X)),\
1180: gen_rtx (REG, Pmode, 27))),\
1181: X); \
1182: if (memory_address_p (MODE, X)) \
1183: goto WIN;}
1184:
1185: /* Go to LABEL if ADDR (a legitimate address expression)
1186: has an effect that depends on the machine mode it is used for. */
1187:
1188: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1189: if (GET_CODE (ADDR) == PRE_DEC \
1190: || GET_CODE (ADDR) == POST_DEC \
1191: || GET_CODE (ADDR) == PRE_INC \
1192: || GET_CODE (ADDR) == POST_INC) \
1193: goto LABEL
1194:
1195: /* Define this macro if references to a symbol must be treated
1196: differently depending on something about the variable or
1197: function named by the symbol (such as what section it is in).
1198:
1199: The macro definition, if any, is executed immediately after the
1200: rtl for DECL or other node is created.
1201: The value of the rtl will be a `mem' whose address is a
1202: `symbol_ref'.
1203:
1204: The usual thing for this macro to do is to a flag in the
1205: `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1206: name string in the `symbol_ref' (if one bit is not enough
1207: information).
1208:
1209: On the PA-RISC we use this to indicate if a symbol is in text or
1210: data space. */
1211:
1212: #define ENCODE_SECTION_INFO(DECL)\
1213: do \
1214: { \
1215: if (TREE_CODE (DECL) == FUNCTION_DECL) \
1216: SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \
1217: else \
1218: { \
1219: rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1220: ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
1221: if (RTX_UNCHANGING_P (rtl) && !MEM_VOLATILE_P (rtl) \
1222: && !flag_pic) \
1223: SYMBOL_REF_FLAG (XEXP (rtl, 0)) = 1; \
1224: } \
1225: } \
1226: while (0)
1227:
1228:
1229: /* Specify the machine mode that this machine uses
1230: for the index in the tablejump instruction. */
1231: #define CASE_VECTOR_MODE SImode
1232:
1233: /* Define this if the tablejump instruction expects the table
1234: to contain offsets from the address of the table.
1235: Do not define this if the table should contain absolute addresses. */
1236: /* #define CASE_VECTOR_PC_RELATIVE */
1237:
1238: /* Specify the tree operation to be used to convert reals to integers. */
1239: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1240:
1241: /* This is the kind of divide that is easiest to do in the general case. */
1242: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1243:
1244: /* Define this as 1 if `char' should by default be signed; else as 0. */
1245: #define DEFAULT_SIGNED_CHAR 1
1246:
1247: /* Max number of bytes we can move from memory to memory
1248: in one reasonably fast instruction. */
1249: #define MOVE_MAX 8
1250:
1251: /* Define if normal loads of shorter-than-word items from memory clears
1252: the rest of the bigs in the register. */
1253: #define BYTE_LOADS_ZERO_EXTEND
1254:
1255: /* Nonzero if access to memory by bytes is slow and undesirable. */
1256: #define SLOW_BYTE_ACCESS 1
1257:
1258: /* Do not break .stabs pseudos into continuations. */
1259: #define DBX_CONTIN_LENGTH 0
1260:
1261: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1262: is done just by pretending it is already truncated. */
1263: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1264:
1265: /* We assume that the store-condition-codes instructions store 0 for false
1266: and some other value for true. This is the value stored for true. */
1267:
1268: #define STORE_FLAG_VALUE 1
1269:
1270: /* When a prototype says `char' or `short', really pass an `int'. */
1271: #define PROMOTE_PROTOTYPES
1272:
1273: /* Specify the machine mode that pointers have.
1274: After generation of rtl, the compiler makes no further distinction
1275: between pointers and any other objects of this machine mode. */
1276: #define Pmode SImode
1277:
1278: /* Add any extra modes needed to represent the condition code.
1279:
1280: HPPA floating comparisons produce condition codes. */
1281: #define EXTRA_CC_MODES CCFPmode
1282:
1283: /* Define the names for the modes specified above. */
1284: #define EXTRA_CC_NAMES "CCFP"
1285:
1286: /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1287: return the mode to be used for the comparison. For floating-point, CCFPmode
1288: should be used. CC_NOOVmode should be used when the first operand is a
1289: PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1290: needed. */
1291: #define SELECT_CC_MODE(OP,X) \
1292: (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1293:
1294: /* A function address in a call instruction
1295: is a byte address (for indexing purposes)
1296: so give the MEM rtx a byte's mode. */
1297: #define FUNCTION_MODE SImode
1298:
1299: /* Define this if addresses of constant functions
1300: shouldn't be put through pseudo regs where they can be cse'd.
1301: Desirable on machines where ordinary constants are expensive
1302: but a CALL with constant address is cheap. */
1303: #define NO_FUNCTION_CSE
1304:
1305: /* Compute the cost of computing a constant rtl expression RTX
1306: whose rtx-code is CODE. The body of this macro is a portion
1307: of a switch statement. If the code is computed here,
1308: return it with a return statement. Otherwise, break from the switch. */
1309:
1310: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1311: case CONST_INT: \
1312: if (INTVAL (RTX) == 0) return 0; \
1313: if (INT_14_BITS (RTX)) return 1; \
1314: case CONST: \
1315: case LABEL_REF: \
1316: case SYMBOL_REF: \
1317: return 2; \
1318: case CONST_DOUBLE: \
1319: return 4;
1320:
1321: #define ADDRESS_COST(RTX) \
1322: (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1323:
1324: /* Compute extra cost of moving data between one register class
1325: and another. */
1326: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1327: ((((CLASS1 == FP_REGS || CLASS1 == SNAKE_FP_REGS \
1328: || CLASS1 == HI_SNAKE_FP_REGS) \
1329: && (CLASS2 == R1_REGS | CLASS2 == GENERAL_REGS)) \
1330: || ((CLASS2 == R1_REGS | CLASS1 == GENERAL_REGS) \
1331: && (CLASS2 == FP_REGS || CLASS2 == SNAKE_FP_REGS \
1332: || CLASS2 == HI_SNAKE_FP_REGS))) ? 6 : 2)
1333:
1334: /* Provide the costs of a rtl expression. This is in the body of a
1335: switch on CODE. The purpose for the cost of MULT is to encourage
1336: `synth_mult' to find a synthetic multiply when reasonable. */
1337:
1338: #define RTX_COSTS(X,CODE,OUTER_CODE) \
1339: case MULT: \
1340: return COSTS_N_INSNS (20); \
1341: case DIV: \
1342: case UDIV: \
1343: case MOD: \
1344: case UMOD: \
1345: return COSTS_N_INSNS (60); \
1346: case PLUS: /* this includes shNadd insns */ \
1347: return COSTS_N_INSNS (1) + 2;
1348:
1349: /* Conditional branches with empty delay slots have a length of two. */
1350: #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1351: if (GET_CODE (INSN) == CALL_INSN \
1352: || (GET_CODE (INSN) == JUMP_INSN && ! simplejump_p (insn))) \
1353: LENGTH += 1;
1354:
1355: /* Control the assembler format that we output. */
1356:
1357: /* Output at beginning of assembler file. */
1358:
1359: #define ASM_FILE_START(FILE) \
1360: do { fprintf (FILE, "\t.SPACE $PRIVATE$\n\
1361: \t.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31\n\
1362: \t.SPACE $TEXT$\n\
1363: \t.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44\n\
1364: \t.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n\
1365: \t.IMPORT $global$,DATA\n\
1366: \t.IMPORT $$dyncall,MILLICODE\n");\
1367: if (profile_flag)\
1368: fprintf (FILE, "\t.IMPORT __gcc_mcount, CODE\n");\
1369: } while (0)
1370:
1371: /* Output to assembler file text saying following lines
1372: may contain character constants, extra white space, comments, etc. */
1373:
1374: #define ASM_APP_ON ""
1375:
1376: /* Output to assembler file text saying following lines
1377: no longer contain unusual constructs. */
1378:
1379: #define ASM_APP_OFF ""
1380:
1381: /* We don't yet know how to identify GCC to HP series 800. */
1382: #define ASM_IDENTIFY_GCC(FILE) fprintf (FILE, "; gcc_compiled.:\n")
1383:
1384: /* Output before code. */
1385:
1386: /* Supposedly the assembler rejects the command if there is no tab! */
1387: #define TEXT_SECTION_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $CODE$\n"
1388:
1389: /* Output before writable data. */
1390:
1391: /* Supposedly the assembler rejects the command if there is no tab! */
1392: #define DATA_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $DATA$\n"
1393:
1394: /* How to refer to registers in assembler output.
1395: This sequence is indexed by compiler's hard-register-number (see above). */
1396:
1397: #define REGISTER_NAMES \
1398: {"0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
1399: "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
1400: "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", \
1401: "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", \
1402: "%fr0", "%fr1", "%fr2", "%fr3", "%fr4", "%fr5", "%fr6", "%fr7", \
1403: "%fr8", "%fr9", "%fr10", "%fr11", "%fr12", "%fr13", "%fr14", "%fr15", \
1404: "%fr0", "%fr0R", "%fr1", "%fr1R", "%fr2", "%fr2R", "%fr3", "%fr3R", \
1405: "%fr4", "%fr4R", "%fr5", "%fr5R", "%fr6", "%fr6R", "%fr7", "%fr7R", \
1406: "%fr8", "%fr8R", "%fr9", "%fr9R", "%fr10", "%fr10R", "%fr11", "%fr11R",\
1407: "%fr12", "%fr12R", "%fr13", "%fr13R", "%fr14", "%fr14R", "%fr15", "%fr15R",\
1408: "%fr16", "%fr16R", "%fr17", "%fr17R", "%fr18", "%fr18R", "%fr19", "%fr19R",\
1409: "%fr20", "%fr20R", "%fr21", "%fr21R", "%fr22", "%fr22R", "%fr23", "%fr23R",\
1410: "%fr24", "%fr24R", "%fr25", "%fr25R", "%fr26", "%fr26R", "%fr27", "%fr27R",\
1411: "%fr28", "%fr28R", "%fr29", "%fr29R", "%fr30", "%fr30R", "%fr31", "%fr31R",\
1412: "SAR"}
1413:
1414: /* How to renumber registers for dbx and gdb. */
1415:
1416: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1417:
1418: /* This is how to output the definition of a user-level label named NAME,
1419: such as the label on a static function or variable NAME. */
1420:
1421: #define ASM_OUTPUT_LABEL(FILE, NAME) \
1422: do { assemble_name (FILE, NAME); fputc ('\n', FILE); } while (0)
1423:
1424: /* This is how to output a command to make the user-level label named NAME
1425: defined for reference from other files. */
1426:
1427: #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1428: do { fputs ("\t.IMPORT ", FILE); \
1429: assemble_name (FILE, NAME); \
1430: if (TREE_CODE (DECL) == VAR_DECL && ! TREE_READONLY (DECL)) \
1431: fputs (",DATA\n", FILE); \
1432: else \
1433: fputs (",CODE\n", FILE); \
1434: } while (0)
1435:
1436: /* hpux ld doesn't output the object file name, or anything useful at
1437: all, to indicate the start of an object file's symbols. This screws
1438: up gdb, so we'll output this magic cookie at the end of an object
1439: file with debugging symbols */
1440:
1441: #define ASM_FILE_END(FILE) \
1442: do { if (write_symbols == DBX_DEBUG)\
1443: { fputs (TEXT_SECTION_ASM_OP, FILE);\
1444: fputs (".stabs \"end_file.\",4,0,0,Ltext_end\nLtext_end:\n",\
1445: (FILE));\
1446: }\
1447: } while (0)
1448:
1449: /* The bogus HP assembler requires ALL external references to be
1450: "imported", even library calls. They look a bit different, so
1451: here's this macro. */
1452:
1453: #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, RTL) \
1454: do { fputs ("\t.IMPORT ", FILE); \
1455: assemble_name (FILE, XSTR ((RTL), 0)); \
1456: fputs (",CODE\n", FILE); \
1457: } while (0)
1458:
1459: #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1460: do { fputs ("\t.EXPORT ", FILE); assemble_name (FILE, NAME); \
1461: fputs ("\n", FILE);} while (0)
1462:
1463: /* This is how to output a reference to a user-level label named NAME.
1464: `assemble_name' uses this. */
1465:
1466: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1467: fprintf (FILE, "%s", NAME)
1468:
1469: /* This is how to output an internal numbered label where
1470: PREFIX is the class of label and NUM is the number within the class. */
1471:
1472: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1473: fprintf (FILE, "%s$%04d\n", PREFIX, NUM)
1474:
1475: /* This is how to store into the string LABEL
1476: the symbol_ref name of an internal numbered label where
1477: PREFIX is the class of label and NUM is the number within the class.
1478: This is suitable for output with `assemble_name'. */
1479:
1480: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1481: sprintf (LABEL, "*%s$%04d", PREFIX, NUM)
1482:
1483: /* This is how to output an assembler line defining a `double' constant. */
1484:
1485: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1486: do { union { double d; int i[2];} __u; \
1487: __u.d = (VALUE); \
1488: fprintf (FILE, "\t; .double %.20e\n\t.word %d ; = 0x%x\n\t.word %d ; = 0x%x\n", \
1489: __u.d, __u.i[0], __u.i[0], __u.i[1], __u.i[1]); \
1490: } while (0)
1491:
1492: /* This is how to output an assembler line defining a `float' constant. */
1493:
1494: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1495: do { union { float f; int i;} __u; \
1496: __u.f = (VALUE); \
1497: fprintf (FILE, "\t; .float %.12e\n\t.word %d ; = 0x%x\n", __u.f, __u.i, __u.i); \
1498: } while (0)
1499:
1500: /* This is how to output an assembler line defining an `int' constant. */
1501:
1502: #define ASM_OUTPUT_INT(FILE,VALUE) \
1503: ( fprintf (FILE, "\t.word "), \
1504: output_addr_const (FILE, (VALUE)), \
1505: fprintf (FILE, "\n"))
1506:
1507: /* Likewise for `short' and `char' constants. */
1508:
1509: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1510: ( fprintf (FILE, "\t.half "), \
1511: output_addr_const (FILE, (VALUE)), \
1512: fprintf (FILE, "\n"))
1513:
1514: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1515: ( fprintf (FILE, "\t.byte "), \
1516: output_addr_const (FILE, (VALUE)), \
1517: fprintf (FILE, "\n"))
1518:
1519: /* This is how to output an assembler line for a numeric constant byte. */
1520:
1521: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1522: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1523:
1524: #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1525: output_ascii ((FILE), (P), (SIZE))
1526:
1527: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1528: fprintf (FILE, "\tstws,mb %s,4(0,30)\n", reg_names[REGNO])
1529:
1530: /* This is how to output an insn to pop a register from the stack.
1531: It need not be very fast code. */
1532:
1533: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1534: fprintf (FILE, "\tldws,ma -4(0,30),%s\n", reg_names[REGNO])
1535:
1536: /* This is how to output an element of a case-vector that is absolute.
1537: Note that this method makes filling these branch delay slots
1538: virtually impossible. */
1539:
1540: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1541: fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1542:
1543: /* This is how to output an element of a case-vector that is relative.
1544: (the hp9k800 does not use such vectors,
1545: but we must define this macro anyway.) */
1546:
1547: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1548: fprintf (FILE, "\tword L%d-L%d\n", VALUE, REL)
1549:
1550: /* This is how to output an assembler line
1551: that says to advance the location counter
1552: to a multiple of 2**LOG bytes. */
1553:
1554: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1555: fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1556:
1557: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1558: fprintf (FILE, "\t.blockz %d\n", (SIZE))
1559:
1560: /* This says how to output an assembler line
1561: to define a global common symbol. */
1562:
1563: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1564: ( data_section (), \
1565: assemble_name ((FILE), (NAME)), \
1566: fputs ("\t.comm ", (FILE)), \
1567: fprintf ((FILE), "%d\n", (ROUNDED)))
1568:
1569: /* This says how to output an assembler line
1570: to define a local common symbol. */
1571:
1572: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1573: ( data_section (), \
1574: fprintf ((FILE), "\t.align %d\n", (SIZE) <= 4 ? 4 : 8), \
1575: assemble_name ((FILE), (NAME)), \
1576: fprintf ((FILE), "\n\t.blockz %d\n", (ROUNDED)))
1577:
1578: /* Store in OUTPUT a string (made with alloca) containing
1579: an assembler-name for a local static variable named NAME.
1580: LABELNO is an integer which is different for each call. */
1581:
1582: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1583: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
1584: sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
1585:
1586: /* Define the parentheses used to group arithmetic operations
1587: in assembler code. */
1588:
1589: #define ASM_OPEN_PAREN "("
1590: #define ASM_CLOSE_PAREN ")"
1591:
1592: /* Define results of standard character escape sequences. */
1593: #define TARGET_BELL 007
1594: #define TARGET_BS 010
1595: #define TARGET_TAB 011
1596: #define TARGET_NEWLINE 012
1597: #define TARGET_VT 013
1598: #define TARGET_FF 014
1599: #define TARGET_CR 015
1600:
1601: #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1602: ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
1603:
1604: /* Print operand X (an rtx) in assembler syntax to file FILE.
1605: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1606: For `%' followed by punctuation, CODE is the punctuation and X is null.
1607:
1608: On the hp9k800, the CODE can be `r', meaning this is a register-only operand
1609: and an immediate zero should be represented as `r0'.
1610:
1611: Several % codes are defined:
1612: O an operation
1613: C compare conditions
1614: N extract conditions
1615: M modifier to handle preincrement addressing for memory refs.
1616: F modifier to handle preincrement addressing for fp memory refs */
1617:
1618: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1619:
1620:
1621: /* Print a memory address as an operand to reference that memory location. */
1622:
1623: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1624: { register rtx addr = ADDR; \
1625: register rtx base; \
1626: int offset; \
1627: switch (GET_CODE (addr)) \
1628: { \
1629: case REG: \
1630: fprintf (FILE, "0(0,%s)", reg_names [REGNO (addr)]); \
1631: break; \
1632: case PLUS: \
1633: if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1634: offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
1635: else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1636: offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
1637: else \
1638: abort (); \
1639: fprintf (FILE, "%d(0,%s)", offset, reg_names [REGNO (base)]); \
1640: break; \
1641: case LO_SUM: \
1642: fputs ("R'", FILE); \
1643: output_global_address (FILE, XEXP (addr, 1)); \
1644: fputs ("(", FILE); \
1645: output_operand (XEXP (addr, 0), 0); \
1646: fputs (")", FILE); \
1647: break; \
1648: case CONST_INT: \
1649: fprintf (FILE, "%d(0,0)", INTVAL (addr)); \
1650: break; \
1651: default: \
1652: output_addr_const (FILE, addr); \
1653: }}
1654:
1655:
1656: #define SMALL_INT(OP) INT_14_BITS (OP)
1657: /* Define functions in pa.c and used in insn-output.c. */
1658:
1659: extern char *output_move_double ();
1660: extern char *output_fp_move_double ();
1661: extern char *output_block_move ();
1662: extern char *output_scc_insn ();
1663: extern char *output_cbranch ();
1664: extern char *output_return ();
1665: extern char *output_floatsisf2 ();
1666: extern char *output_floatsidf2 ();
1667: extern char *output_mul_insn ();
1668: extern char *output_div_insn ();
1669: extern char *output_mod_insn ();
1670: extern void output_arg_descriptor ();
1671: extern void output_global_address ();
1672: extern struct rtx_def *legitimize_pic_address ();
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.