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1.1 root 1: /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2: Copyright (C) 1992 Free Software Foundation, Inc.
3: Contributed by Michael Tiemann ([email protected])
4: and Tim Moore ([email protected]) of the Center for
5: Software Science at the University of Utah.
6:
7: This file is part of GNU CC.
8:
9: GNU CC is free software; you can redistribute it and/or modify
10: it under the terms of the GNU General Public License as published by
11: the Free Software Foundation; either version 1, or (at your option)
12: any later version.
13:
14: GNU CC is distributed in the hope that it will be useful,
15: but WITHOUT ANY WARRANTY; without even the implied warranty of
16: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17: GNU General Public License for more details.
18:
19: You should have received a copy of the GNU General Public License
20: along with GNU CC; see the file COPYING. If not, write to
21: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22:
23: enum cmp_type /* comparison type */
24: {
25: CMP_SI, /* compare integers */
26: CMP_SF, /* compare single precision floats */
27: CMP_DF, /* compare double precision floats */
28: CMP_MAX /* max comparison type */
29: };
30:
1.1.1.2 ! root 31: /* Print subsidiary information on the compiler version in use. */
! 32:
! 33: #define TARGET_VERSION fprintf (stderr, " (hppa)");
! 34:
! 35: /* Run-time compilation parameters selecting different hardware subsets. */
! 36:
! 37: extern int target_flags;
! 38:
! 39: /* compile code for HP-PA 1.1 ("Snake") */
! 40:
! 41: #define TARGET_SNAKE (target_flags & 1)
! 42:
! 43: /* Force gcc not to use the bss segment. This is (temporarily) provided
! 44: for sites which are using pa-gas-1.36 versions prior to Aug 7, 1992. */
! 45:
! 46: #define TARGET_NO_BSS (target_flags & 2)
! 47:
! 48: /* Force gcc to only use instructions which are safe when compiling kernels.
! 49: Specifically, avoid using add instructions with dp (r27) as an argument.
! 50: Use addil instructions instead. Doing so avoids a nasty bug in the
! 51: HPUX linker. When HP fixes their linker take this option out. */
! 52:
! 53: #define TARGET_KERNEL (target_flags & 4)
! 54:
! 55: /* Generate code that will link against HPUX 8.0 shared libraries.
! 56: Older linkers and assemblers might not support this. */
! 57:
! 58: #define TARGET_SHARED_LIBS (target_flags & 8)
! 59:
! 60: /* Force all function calls to indirect addressing via a register. This
! 61: avoids lossage when the function is very far away from the current PC.
! 62:
! 63: ??? What about simple jumps, they can suffer from the same problem.
! 64: Would require significant surgery in pa.md. */
! 65:
! 66: #define TARGET_LONG_CALLS (target_flags & 16)
! 67:
! 68: /* Macro to define tables used to set the flags.
! 69: This is a list in braces of pairs in braces,
! 70: each pair being { "NAME", VALUE }
! 71: where VALUE is the bits to set or minus the bits to clear.
! 72: An empty string NAME is used to identify the default VALUE. */
! 73:
! 74: #define TARGET_SWITCHES \
! 75: {{"snake", 1}, \
! 76: {"nosnake", -1}, \
! 77: {"pa-risc-1-0", -1}, \
! 78: {"pa-risc-1-1", 1}, \
! 79: {"no-bss", 2}, \
! 80: {"kernel", 4}, \
! 81: {"shared-libs", 8}, \
! 82: {"no-shared-libs", -8},\
! 83: {"long-calls", 16}, \
! 84: { "", TARGET_DEFAULT}}
! 85:
! 86: #ifndef TARGET_DEFAULT
! 87: #define TARGET_DEFAULT 0
! 88: #endif
! 89:
1.1 root 90: #define DBX_DEBUGGING_INFO
91: #define DEFAULT_GDB_EXTENSIONS 0
92:
93: #if (TARGET_DEFAULT & 1) == 0
1.1.1.2 ! root 94: #define CPP_SPEC "%{msnake:-D__hp9000s700 -D_PA_RISC1_1}\
! 95: %{mpa-risc-1-1:-D__hp9000s700 -D_PA_RISC1_1}"
1.1 root 96: #else
1.1.1.2 ! root 97: #define CPP_SPEC "%{!mpa-risc-1-0:-D__hp9000s700 -D_PA_RISC1_1}\
! 98: %{!mnosnake:-D__hp9000s700 -D_PA_RISC1_1}"
1.1 root 99: #endif
100:
101: /* Defines for a K&R CC */
102:
103: #ifdef OLD_CC
104: #define CPP_SPEC "%{!gnu:-nostdinc %{!nostinc:-I/usr/include}} \
105: %{gnu:%{nostdinc}} %{!gnu:-traditional} -Dvolatile=__volatile"
106: #define CC1_SPEC "%{!gnu:-traditional -fwritable-strings -fno-defer-pop} \
107: %{pg:} %{p:}"
108: #else
109: #define CC1_SPEC "%{pg:} %{p:}"
110: #endif
111:
112: #define LINK_SPEC "-u main"
1.1.1.2 ! root 113:
! 114: /* Make gcc agree with <machine/ansi.h> */
! 115:
! 116: #define SIZE_TYPE "unsigned int"
! 117: #define PTRDIFF_TYPE "int"
! 118: #define WCHAR_TYPE "short unsigned int"
! 119: #define WCHAR_TYPE_SIZE 16
1.1 root 120:
121: /* Omit frame pointer at high optimization levels. */
122:
123: #define OPTIMIZATION_OPTIONS(OPTIMIZE) \
124: { \
125: if (OPTIMIZE >= 2) \
126: flag_omit_frame_pointer = 1; \
127: }
128:
129: /* Names to predefine in the preprocessor for this target machine. */
130:
131: #define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -D_HPUX_SOURCE -Dhp9000 -Dhp800 -Dspectrum -DREVARGV"
132:
133: /* target machine storage layout */
134:
135: /* Define this if most significant bit is lowest numbered
136: in instructions that operate on numbered bit-fields. */
137: #define BITS_BIG_ENDIAN 1
138:
139: /* Define this if most significant byte of a word is the lowest numbered. */
1.1.1.2 ! root 140: /* That is true on the HP-PA. */
1.1 root 141: #define BYTES_BIG_ENDIAN 1
142:
143: /* Define this if most significant word of a multiword number is lowest
144: numbered. */
1.1.1.2 ! root 145: /* For the HP-PA we can decide arbitrarily
1.1 root 146: since there are no machine instructions for them. */
147: #define WORDS_BIG_ENDIAN 1
148:
149: /* number of bits in an addressable storage unit */
150: #define BITS_PER_UNIT 8
151:
152: /* Width in bits of a "word", which is the contents of a machine register.
153: Note that this is not necessarily the width of data type `int';
154: if using 16-bit ints on a 68000, this would still be 32.
155: But on a machine with 16-bit registers, this would be 16. */
156: #define BITS_PER_WORD 32
157:
158: /* Width of a word, in units (bytes). */
159: #define UNITS_PER_WORD 4
160:
161: /* Width in bits of a pointer.
162: See also the macro `Pmode' defined below. */
163: #define POINTER_SIZE 32
164:
165: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
166: #define PARM_BOUNDARY 32
167:
168: /* Largest alignment required for any stack parameter, in bits.
169: Don't define this if it is equal to PARM_BOUNDARY */
170: #define MAX_PARM_BOUNDARY 64
171:
172: /* Boundary (in *bits*) on which stack pointer should be aligned. */
173: #define STACK_BOUNDARY (TARGET_SNAKE ? 512 : 64)
174:
175: /* Allocation boundary (in *bits*) for the code of a function. */
176: #define FUNCTION_BOUNDARY 32
177:
178: /* Alignment of field after `int : 0' in a structure. */
179: #define EMPTY_FIELD_BOUNDARY 32
180:
181: /* Every structure's size must be a multiple of this. */
182: #define STRUCTURE_SIZE_BOUNDARY 8
183:
184: /* A bitfield declared as `int' forces `int' alignment for the struct. */
185: #define PCC_BITFIELD_TYPE_MATTERS 1
186:
187: /* No data type wants to be aligned rounder than this. */
188: #define BIGGEST_ALIGNMENT 64
189:
190: /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
191: #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
192: ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
193:
194: /* Make arrays of chars word-aligned for the same reasons. */
195: #define DATA_ALIGNMENT(TYPE, ALIGN) \
196: (TREE_CODE (TYPE) == ARRAY_TYPE \
197: && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
198: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
199:
200:
201: /* Set this nonzero if move instructions will actually fail to work
202: when given unaligned data. */
203: #define STRICT_ALIGNMENT 1
204:
205: /* Generate calls to memcpy, memcmp and memset. */
206: #define TARGET_MEM_FUNCTIONS
207:
208: /* Standard register usage. */
209:
210: /* Number of actual hardware registers.
211: The hardware registers are assigned numbers for the compiler
212: from 0 to just below FIRST_PSEUDO_REGISTER.
213: All registers that the compiler knows about must be given numbers,
214: even those that are not normally considered general registers.
215:
1.1.1.2 ! root 216: HP-PA 1.0 has 32 fullword registers and 16 floating point
1.1 root 217: registers. The floating point registers hold either word or double
218: word values.
219:
220: 16 additional registers are reserved.
221:
1.1.1.2 ! root 222: HP-PA 1.1 has 32 fullword registers and 32 floating point
1.1 root 223: registers. However, the floating point registers behave
224: differently: the left and right halves of registers are addressable
225: as 32 bit registers. So, we will set things up like the 68k which
226: has different fp units: define separate register sets for the 1.0
227: and 1.1 fp units. */
228:
229: #define FIRST_PSEUDO_REGISTER 113 /* 32 + 16 1.0 regs + 64 1.1 regs + */
230: /* 1 shift reg */
231:
232: /* 1 for registers that have pervasive standard uses
233: and are not available for the register allocator.
234:
1.1.1.2 ! root 235: On the HP-PA, these are:
1.1 root 236: Reg 0 = 0 (hardware). However, 0 is used for condition code,
237: so is not fixed.
238: Reg 1 = ADDIL target/Temporary (hardware).
239: Reg 2 = Return Pointer
240: Reg 3 = Unused
241: Reg 4 = Frame Pointer (Gnu)
242: Reg 5-18 = Preserved Registers
1.1.1.2 ! root 243: Reg 19 = Linkage Table Register in HPUX 8.0 shared library scheme.
! 244: Reg 20-22 = Temporary Registers
1.1 root 245: Reg 23-26 = Temporary/Parameter Registers
246: Reg 27 = Global Data Pointer (hp)
247: Reg 28 = Temporary/???/Return Value register
248: Reg 29 = Temporary/Static Chain/Return Value register
249: Reg 30 = stack pointer
250: Reg 31 = Temporary/Millicode Return Pointer (hp)
251:
252: Freg 0-3 = Status Registers
253: Freg 4-7 = Arguments/Return Value
254: Freg 8-11 = Temporary Registers
255: Freg 12-15 = Preserved Registers
256:
257: Freg 16-31 = Reserved
258:
259: On the Snake, fp regs are
260:
261: Freg 0-3 = Status Registers
262: Freg 4L-7R = Arguments/Return Value
263: Freg 8L-11R = Temporary Registers
264: Freg 12L-15R = Preserved Registers
265:
266: Freg 16L-31R = ?? Some partition of temporary and preserved; assume
267: preserved for now.
268:
269:
270: */
271:
272: #define FIXED_REGISTERS \
273: {0, 0, 1, 1, 1, 0, 0, 0, \
274: 0, 0, 0, 0, 0, 0, 0, 0, \
275: 0, 0, 0, 0, 0, 0, 0, 0, \
276: 0, 0, 0, 1, 0, 0, 1, 1, \
277: /* 1.0 fp registers */ \
278: 1, 1, 1, 1, 0, 0, 0, 0, \
279: 0, 0, 0, 0, 0, 0, 0, 0, \
280: /* 1.1 fp registers */ \
281: 1, 1, 1, 1, 1, 1, 1, 1, \
282: 0, 0, 0, 0, 0, 0, 0, 0, \
283: 0, 0, 0, 0, 0, 0, 0, 0, \
284: 0, 0, 0, 0, 0, 0, 0, 0, \
285: 0, 0, 0, 0, 0, 0, 0, 0, \
286: 0, 0, 0, 0, 0, 0, 0, 0, \
287: 0, 0, 0, 0, 0, 0, 0, 0, \
288: 0, 0, 0, 0, 0, 0, 0, 0, \
289: 1}
290:
291: /* 1 for registers not available across function calls.
292: These must include the FIXED_REGISTERS and also any
293: registers that can be used without being saved.
294: The latter must include the registers where values are returned
295: and the register where structure-value addresses are passed.
296: Aside from that, you can include as many other registers as you like. */
297: #define CALL_USED_REGISTERS \
298: {1, 1, 1, 1, 1, 0, 0, 0, \
299: 0, 0, 0, 0, 0, 0, 0, 0, \
300: 0, 0, 0, 1, 1, 1, 1, 1, \
301: 1, 1, 1, 1, 1, 1, 1, 1, \
302: /* 1.0 fp registers */ \
303: 1, 1, 1, 1, 1, 1, 1, 1, \
304: 1, 1, 1, 1, 0, 0, 0, 0, \
305: /* 1.1 fp registers */ \
306: 1, 1, 1, 1, 1, 1, 1, 1, \
307: 1, 1, 1, 1, 1, 1, 1, 1, \
308: 1, 1, 1, 1, 1, 1, 1, 1, \
309: 0, 0, 0, 0, 0, 0, 0, 0, \
310: 0, 0, 0, 0, 0, 0, 0, 0, \
311: 0, 0, 0, 0, 1, 1, 1, 1, \
312: 1, 1, 1, 1, 1, 1, 1, 1, \
313: 1, 1, 1, 1, 1, 1, 1, 1, \
314: 1}
315:
316: /* Make sure everything's fine if we *don't* have a given processor.
317: This assumes that putting a register in fixed_regs will keep the
318: compiler's mitts completely off it. We don't bother to zero it out
319: of register classes.
320:
321: Make register 27 global for now. We'll undo this kludge after 2.1. */
322:
323: #define CONDITIONAL_REGISTER_USAGE \
324: { \
325: int i; \
326: HARD_REG_SET x; \
327: global_regs[27] = 1; \
328: if (!TARGET_SNAKE) \
329: { \
330: COPY_HARD_REG_SET (x, reg_class_contents[(int)SNAKE_FP_REGS]);\
331: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
332: if (TEST_HARD_REG_BIT (x, i)) \
333: fixed_regs[i] = call_used_regs[i] = 1; \
334: } \
335: else \
336: { \
337: COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]); \
338: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
339: if (TEST_HARD_REG_BIT (x, i)) \
340: fixed_regs[i] = call_used_regs[i] = 1; \
341: } \
342: }
343:
344: /* Allocated the call used registers first. This should minimize
345: the number of registers that need to be saved (as call used
346: registers will generally not be allocated across a call).
347:
348: It is possible that it would be wise to allocate the floating point
349: registers before the regular ones, but I doubt it matters. Same
350: comment for parameters versus normal. */
351:
352: #define REG_ALLOC_ORDER \
353: {19, 20, 21, 22, 23, 24, 25, 26, \
354: 27, 28, 29, 30, 31, 40, 41, 42, \
355: 43, 36, 37, 38, 39, \
356: 56, 57, 58, 59, 60, 61, 62, 63, \
357: 64, 65, 66, 67, 68, 69, 70, 71, \
358: 72, 73, 74, 75, 76, 77, 78, 79, \
359: 80, 81, 82, 83, 84, 85, 86, 87, \
360: 88, 89, 90, 91, 92, 93, 94, 95, \
361: 96, 97, 98, 99, 100, 101, 102, 103, \
362: 104, 105, 106, 107, 108, 109, 110, 111,\
363: 5, 6, 7, \
364: 8, 9, 10, 11, 12, 13, 14, 15, \
365: 16, 17, 18, 44, 45, 46, 47, \
366: 48, 49, 50, 51, 52, 53, 54, 55, \
367: 1, \
368: 2, 3, 4, 32, 33, 34, 35, 0, \
369: 112}
370:
371:
372: /* Return number of consecutive hard regs needed starting at reg REGNO
373: to hold something of mode MODE.
374: This is ordinarily the length in words of a value of mode MODE
375: but can be less for certain modes in special long registers.
376:
1.1.1.2 ! root 377: On the HP-PA, ordinary registers hold 32 bits worth;
1.1 root 378: The floating point registers are 64 bits wide. Snake fp regs are 32
379: bits wide */
380: #define HARD_REGNO_NREGS(REGNO, MODE) \
381: (((REGNO) < 32 || (REGNO) >= 48) \
382: ? ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) : 1)
383:
384: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
1.1.1.2 ! root 385: On the HP-PA, the cpu registers can hold any mode. We
1.1 root 386: force this to be an even register is it cannot hold the full mode. */
1.1.1.2 ! root 387: #if 0
1.1 root 388: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
389: ((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
390: : (REGNO) < 32 ? ((GET_MODE_SIZE (MODE) <= 4) ? 1 : ((REGNO) & 1) == 0)\
391: : (REGNO) < 48 ? (GET_MODE_SIZE (MODE) >= 4) \
392: : (GET_MODE_SIZE (MODE) > 4 ? ((REGNO) & 1) == 0 \
393: : GET_MODE_SIZE (MODE) == 4))
1.1.1.2 ! root 394: #endif
! 395: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
! 396: ((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
! 397: : (REGNO) < 32 ? ((GET_MODE_SIZE (MODE) <= 4) ? 1 : ((REGNO) & 1) == 0)\
! 398: : (REGNO) < 48 ? (GET_MODE_SIZE (MODE) >= 4) \
! 399: : (GET_MODE_SIZE (MODE) > 4 ? ((REGNO) & 1) == 0 \
! 400: : 1))
1.1 root 401:
402: /* Value is 1 if it is a good idea to tie two pseudo registers
403: when one has mode MODE1 and one has mode MODE2.
404: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
405: for any hard reg, then this must be 0 for correct output. */
406: #define MODES_TIEABLE_P(MODE1, MODE2) \
407: ((MODE1) == (MODE2) || GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
408:
409: /* Specify the registers used for certain standard purposes.
410: The values of these macros are register numbers. */
411:
1.1.1.2 ! root 412: /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
1.1 root 413: /* #define PC_REGNUM */
414:
415: /* Register to use for pushing function arguments. */
416: #define STACK_POINTER_REGNUM 30
417:
418: /* Base register for access to local variables of the function. */
419: #define FRAME_POINTER_REGNUM 4
420:
421: /* Value should be nonzero if functions must have frame pointers.
422: Zero means the frame pointer need not be set up (and parms
423: may be accessed via the stack pointer) in functions that seem suitable.
424: This is computed in `reload', in reload1.c. */
425: extern int leaf_function;
426:
427: #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
428:
429:
430: /* C statement to store the difference between the frame pointer
431: and the stack pointer values immediately after the function prologue.
432:
433: Note, we always pretend that this is a leaf function because if
434: it's not, there's no point in trying to eliminate the
435: frame pointer. If it is a leaf function, we guessed right! */
436: #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
1.1.1.2 ! root 437: do { int __fsize = compute_frame_size (get_frame_size (), 1, 0) + 32; \
1.1 root 438: (VAR) = -(TARGET_SNAKE ? (__fsize + 63) & ~63 : __fsize); } while (0)
439:
440: /* Base register for access to arguments of the function. */
441: #define ARG_POINTER_REGNUM 4
442:
443: /* Register in which static-chain is passed to a function. */
444: /* ??? */
445: #define STATIC_CHAIN_REGNUM 29
446:
447: /* Register which holds offset table for position-independent
448: data references. */
449:
1.1.1.2 ! root 450: #define PIC_OFFSET_TABLE_REGNUM 19
1.1 root 451:
452: #define INITIALIZE_PIC initialize_pic ()
453: #define FINALIZE_PIC finalize_pic ()
454:
455: /* Register in which address to store a structure value
456: is passed to a function. */
457: #define STRUCT_VALUE_REGNUM 28
458:
459: /* Define the classes of registers for register constraints in the
460: machine description. Also define ranges of constants.
461:
462: One of the classes must always be named ALL_REGS and include all hard regs.
463: If there is more than one class, another class must be named NO_REGS
464: and contain no registers.
465:
466: The name GENERAL_REGS must be the name of a class (or an alias for
467: another name such as ALL_REGS). This is the class of registers
468: that is allowed by "g" or "r" in a register constraint.
469: Also, registers outside this class are allocated only when
470: instructions express preferences for them.
471:
472: The classes must be numbered in nondecreasing order; that is,
473: a larger-numbered class must never be contained completely
474: in a smaller-numbered class.
475:
476: For any two classes, it is very desirable that there be another
477: class that represents their union. */
478:
1.1.1.2 ! root 479: /* The HP-PA has four kinds of registers: general regs, 1.0 fp regs,
1.1 root 480: 1.1 fp regs, and the high 1.1 fp regs, to which the operands of
1.1.1.2 ! root 481: fmpyadd and fmpysub are restricted.
! 482:
! 483: FP_OR_SNAKE_FP_REGS is for reload_{in,out}di only and isn't used
! 484: anywhere else.*/
1.1 root 485:
486: enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, GENERAL_OR_FP_REGS,
487: HI_SNAKE_FP_REGS, SNAKE_FP_REGS, GENERAL_OR_SNAKE_FP_REGS,
1.1.1.2 ! root 488: FP_OR_SNAKE_FP_REGS, SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES};
1.1 root 489:
490: #define N_REG_CLASSES (int) LIM_REG_CLASSES
491:
492: /* Give names of register classes as strings for dump file. */
493:
494: #define REG_CLASS_NAMES \
495: { "NO_REGS", "R1_REGS", "GENERAL_REGS", "FP_REGS", "GENERAL_OR_FP_REGS",\
496: "HI_SNAKE_FP_REGS", "SNAKE_FP_REGS", "GENERAL_OR_SNAKE_FP_REGS",\
1.1.1.2 ! root 497: "FP_OR_SNAKE_FP_REGS","SHIFT_REGS", "ALL_REGS"}
1.1 root 498:
499: /* Define which registers fit in which classes.
500: This is an initializer for a vector of HARD_REG_SET
501: of length N_REG_CLASSES. Register 0, the "condition code" register,
502: is in no class. */
503:
504: #define REG_CLASS_CONTENTS \
505: { {0, 0, 0, 0}, /* NO_REGS */ \
506: {0x2, 0, 0, 0}, /* R1_REGS */ \
507: {-2, 0, 0, 0}, /* GENERAL_REGS */ \
508: {0, 0xffff, 0, 0}, /* FP_REGS */ \
509: {-2, 0xffff, 0, 0}, /* GENERAL_OR_FP_REGS */\
510: {0, 0, 0xffff0000, 0xffff}, /* HI_SNAKE_FP_REGS */ \
511: {0, 0xffff0000, ~0, 0xffff}, /* SNAKE_FP_REGS */ \
512: {-2, 0xffff0000, ~0, 0xffff}, /* GENERAL_OR_SNAKE_FP_REGS */\
1.1.1.2 ! root 513: {0, ~0, ~0, 0xffff}, /* FP_OR_SNAKE_FP_REGS */\
1.1 root 514: {0, 0, 0, 0x10000}, /* SHIFT_REGS */ \
515: {-2, ~0, ~0, 0x1ffff}} /* ALL_REGS */
516:
517: /* The same information, inverted:
518: Return the class number of the smallest class containing
519: reg number REGNO. This could be a conditional expression
520: or could index an array. */
521:
522: #define REGNO_REG_CLASS(REGNO) \
523: ((REGNO) == 0 ? NO_REGS \
524: : (REGNO) == 1 ? R1_REGS \
525: : (REGNO) < 32 ? GENERAL_REGS \
526: : (REGNO) < 48 ? FP_REGS \
527: : (REGNO) < 80 ? SNAKE_FP_REGS \
528: : (REGNO) < 112 ? HI_SNAKE_FP_REGS \
529: : SHIFT_REGS)
530:
531: /* The class value for index registers, and the one for base regs. */
532: #define INDEX_REG_CLASS GENERAL_REGS
533: #define BASE_REG_CLASS GENERAL_REGS
534:
535: /* Get reg_class from a letter such as appears in the machine description. */
536:
537: #define REG_CLASS_FROM_LETTER(C) \
1.1.1.2 ! root 538: ((C) == 'f' ? (!TARGET_SNAKE ? FP_REGS : NO_REGS) : \
! 539: ((C) == 'x' ? (TARGET_SNAKE ? SNAKE_FP_REGS : NO_REGS) : \
! 540: ((C) == 'y' ? (TARGET_SNAKE ? HI_SNAKE_FP_REGS : NO_REGS) : \
! 541: ((C) == 'q' ? SHIFT_REGS : \
! 542: ((C) == 'a' ? R1_REGS : \
! 543: ((C) == 'z' ? FP_OR_SNAKE_FP_REGS : NO_REGS))))))
1.1 root 544:
545: /* The letters I, J, K, L and M in a register constraint string
546: can be used to stand for particular ranges of immediate operands.
547: This macro defines what the ranges are.
548: C is the letter, and VALUE is a constant value.
549: Return 1 if VALUE is in the range specified by C.
550:
1.1.1.2 ! root 551: HP-PA immediate field sizes:
1.1 root 552: 5 bits: scalar/floating short loads + stores; deposit; conditional branch
553: 11 bits: arithmetic immediate, compare immediate
554: 14 bits: loads and stores; load offset
555: 21 bits: load and add immediate long (but this isn't really used)
556: (there are also 13-bit and 26-bit immediates but only in system instructions)
557:
558: `I' is used for the 11 bit constants.
559: `J' is used for the 14 bit constants.
560: `K' is used for unsigned 5 bit constants (extract/deposit operands).
561: `L' is used for the 5 bit constants.
562: `M' is used for 0. */
563:
564: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
565: ((C) == 'I' ? (unsigned) ((VALUE) + 0x400) < 0x800 \
566: : (C) == 'J' ? (unsigned) ((VALUE) + 0x2000) < 0x4000 \
567: : (C) == 'K' ? (unsigned) (VALUE) < 0x20 \
568: : (C) == 'L' ? (unsigned) ((VALUE) + 0x10) < 0x20 \
569: : (C) == 'M' ? (VALUE) == 0 \
1.1.1.2 ! root 570: : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \
! 571: : (C) == 'P' ? consec_zeros_p (VALUE) \
1.1 root 572: : 0)
573:
574: /* Similar, but for floating constants, and defining letters G and H.
575: Here VALUE is the CONST_DOUBLE rtx itself. */
576:
577: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
578: ((C) == 'G' && XINT (VALUE, 0) == 0 && XINT (VALUE, 1) == 0)
579:
580: /* Given an rtx X being reloaded into a reg required to be
581: in class CLASS, return the class of reg to actually use.
582: In general this is just CLASS; but on some machines
583: in some cases it is preferable to use a more restrictive class. */
584: #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
585:
586: /* Return the register class of a scratch register needed to copy IN into
587: or out of a register in CLASS in MODE. If it can be done directly,
588: NO_REGS is returned. */
589:
590: #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
591: secondary_reload_class (CLASS, MODE, IN)
592:
593: /* Return the maximum number of consecutive registers
594: needed to represent mode MODE in a register of class CLASS. */
595: #define CLASS_MAX_NREGS(CLASS, MODE) \
596: ((CLASS) == FP_REGS ? 1 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
597:
598: /* Stack layout; function entry, exit and calling. */
599:
600: /* Define this if pushing a word on the stack
601: makes the stack pointer a smaller address. */
602: /* #define STACK_GROWS_DOWNWARD */
603:
604: /* Believe it or not. */
605: #define ARGS_GROW_DOWNWARD
606:
607: /* Define this if the nominal address of the stack frame
608: is at the high-address end of the local variables;
609: that is, each additional local variable allocated
610: goes at a more negative offset in the frame. */
611: /* #define FRAME_GROWS_DOWNWARD */
612:
613: /* Offset within stack frame to start allocating local variables at.
614: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
615: first local allocated. Otherwise, it is the offset to the BEGINNING
616: of the first local allocated. */
617: #define STARTING_FRAME_OFFSET 8
618:
619: /* If we generate an insn to push BYTES bytes,
620: this says how many the stack pointer really advances by.
1.1.1.2 ! root 621: On the HP-PA, don't define this because there are no push insns. */
1.1 root 622: /* #define PUSH_ROUNDING(BYTES) */
623:
624: /* Offset of first parameter from the argument pointer register value.
625: This value will be negated because the arguments grow down.
626: Also note that on STACK_GROWS_UPWARD machines (such as this one)
627: this is the distance from the frame pointer to the end of the first
628: argument, not it's beginning. To get the real offset of the first
629: argument, the size of the argument must be added.
630:
631: ??? Have to check on this.*/
632:
633: /* #define FIRST_PARM_OFFSET(FNDECL) 36 */
634: #define FIRST_PARM_OFFSET(FNDECL) -32
635:
636: /* Absolute value of offset from top-of-stack address to location to store the
637: function parameter if it can't go in a register.
638: Addresses for following parameters are computed relative to this one. */
639: /* #define FIRST_PARM_CALLER_OFFSET(FNDECL) 36 */
640: #define FIRST_PARM_CALLER_OFFSET(FNDECL) -32
641:
642:
643: /* When a parameter is passed in a register, stack space is still
644: allocated for it. */
645: #define REG_PARM_STACK_SPACE(DECL) 16
646:
647: /* Define this if the above stack space is to be considered part of the
648: space allocated by the caller. */
649: #define OUTGOING_REG_PARM_STACK_SPACE
650:
651: /* Keep the stack pointer constant throughout the function.
652: This is both an optimization and a necessity: longjmp
653: doesn't behave itself when the stack pointer moves within
654: the function! */
655: #define ACCUMULATE_OUTGOING_ARGS
656:
657: /* The weird HPPA calling conventions require a minimum of 48 bytes on
658: the stack: 16 bytes for register saves, and 32 bytes for magic.
659: This is the difference between the logical top of stack and the
660: actual sp. */
661: #define STACK_POINTER_OFFSET -32
662:
663: #define STACK_DYNAMIC_OFFSET(FNDECL) \
664: ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size)
665:
666: /* Value is 1 if returning from a function call automatically
667: pops the arguments described by the number-of-args field in the call.
668: FUNTYPE is the data type of the function (as a tree),
669: or for a library call it is an identifier node for the subroutine name. */
670:
671: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
672:
673: /* Define how to find the value returned by a function.
674: VALTYPE is the data type of the value (as a tree).
675: If the precise function being called is known, FUNC is its FUNCTION_DECL;
676: otherwise, FUNC is 0. */
677:
1.1.1.2 ! root 678: /* On the HP-PA the value is found in register(s) 28(-29), unless
1.1 root 679: the mode is SF or DF. Then the value is returned in fr4 (36, ) */
680:
681:
682: #define FUNCTION_VALUE(VALTYPE, FUNC) \
683: gen_rtx (REG, TYPE_MODE (VALTYPE), ((TYPE_MODE (VALTYPE) == SFmode ||\
684: TYPE_MODE (VALTYPE) == DFmode) ? \
685: (TARGET_SNAKE ? 56 : 36) : 28))
686:
687: #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \
688: FUNCTION_VALUE(VALTYPE, FUNC)
689:
690: /* Define how to find the value returned by a library function
691: assuming the value has mode MODE. */
692:
693: #define LIBCALL_VALUE(MODE) \
694: gen_rtx (REG, MODE, (MODE == SFmode || MODE == DFmode ?\
695: (TARGET_SNAKE ? 56 : 36) : 28))
696:
697: /* 1 if N is a possible register number for a function value
698: as seen by the caller. */
699:
700: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 28 || (N) == 36 || (N) == 56)
701:
702: /* 1 if N is a possible register number for function argument passing. */
703:
704: #define FUNCTION_ARG_REGNO_P(N) (((N) >= 23 && (N) <= 26) || \
705: ((N) >= 36 && (N) <= 39) || \
706: ((N) >= 56 && (N) <= 63))
707:
708: /* Define a data type for recording info about an argument list
709: during the scan of that argument list. This data type should
710: hold all necessary information about the function itself
711: and about the args processed so far, enough to enable macros
712: such as FUNCTION_ARG to determine where the next arg should go.
713:
1.1.1.2 ! root 714: On the HP-PA, this is a single integer, which is a number of words
1.1 root 715: of arguments scanned so far (including the invisible argument,
716: if any, which holds the structure-value-address).
717: Thus 4 or more means all following args should go on the stack. */
718:
719: #define CUMULATIVE_ARGS int
720:
721: /* Initialize a variable CUM of type CUMULATIVE_ARGS
722: for a call to a function whose data type is FNTYPE.
723: For a library call, FNTYPE is 0.
724: */
725:
726: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) ((CUM) = 0)
727:
728: /* Figure out the size in words of the function argument. */
729:
730: #define FUNCTION_ARG_SIZE(MODE, TYPE) \
731: ((((MODE) != BLKmode ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE))+3)/4)
732:
733: /* Update the data in CUM to advance over an argument
734: of mode MODE and data type TYPE.
735: (TYPE is null for libcalls where that information may not be available.) */
736:
737: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1.1.1.2 ! root 738: (((((CUM) & 01) && (TYPE) != 0 && FUNCTION_ARG_SIZE(MODE, TYPE) > 1)\
1.1 root 739: && (CUM)++), (CUM) += FUNCTION_ARG_SIZE(MODE, TYPE))
740:
741: /* Determine where to put an argument to a function.
742: Value is zero to push the argument on the stack,
743: or a hard register in which to store the argument.
744:
745: MODE is the argument's machine mode.
746: TYPE is the data type of the argument (as a tree).
747: This is null for libcalls where that information may
748: not be available.
749: CUM is a variable of type CUMULATIVE_ARGS which gives info about
750: the preceding args and about the function being called.
751: NAMED is nonzero if this argument is a named parameter
752: (otherwise it is an extra parameter matching an ellipsis). */
753:
1.1.1.2 ! root 754: /* On the HP-PA the first four words of args are normally in registers
1.1 root 755: and the rest are pushed. But any arg that won't entirely fit in regs
1.1.1.2 ! root 756: is pushed.
! 757:
! 758: Arguments passed in registers are either 1 or 2 words long. */
1.1 root 759:
760: #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
761:
762: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
763: (4 >= ((CUM) + FUNCTION_ARG_SIZE ((MODE), (TYPE))) \
1.1.1.2 ! root 764: ? gen_rtx (REG, (MODE), \
! 765: (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
! 766: ? ((MODE) == DFmode \
! 767: ? ((CUM) ? (TARGET_SNAKE ? 62 : 39) \
! 768: : (TARGET_SNAKE ? 58 : 37)) \
! 769: : ((CUM) ? 23 : 25)) \
! 770: : ((MODE) == SFmode \
! 771: ? (TARGET_SNAKE ? 56 + 2 * (CUM) : 36 + (CUM)) \
! 772: : (27 - (CUM) - FUNCTION_ARG_SIZE ((MODE), (TYPE))))))\
1.1 root 773: : 0)
774:
775: /* Define where a function finds its arguments.
776: This would be different from FUNCTION_ARG if we had register windows. */
777:
778: #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
779: FUNCTION_ARG (CUM, MODE, TYPE, NAMED)
780:
781: /* For an arg passed partly in registers and partly in memory,
782: this is the number of registers used.
783: For args passed entirely in registers or entirely in memory, zero. */
784:
785: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
786:
787: /* If defined, a C expression that gives the alignment boundary, in
788: bits, of an argument with the specified mode and type. If it is
789: not defined, `PARM_BOUNDARY' is used for all arguments. */
790:
791: #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
792: (((TYPE) != 0) \
793: ? ((TYPE_ALIGN(TYPE) <= PARM_BOUNDARY) \
794: ? PARM_BOUNDARY \
795: : TYPE_ALIGN(TYPE)) \
796: : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
797: ? PARM_BOUNDARY \
798: : GET_MODE_ALIGNMENT(MODE)))
799:
800: /* Arguments larger than eight bytes are passed by invisible reference */
801:
802: #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
803: ((TYPE) && int_size_in_bytes (TYPE) > 8)
804:
805: extern struct rtx_def *hppa_compare_op0, *hppa_compare_op1;
806: extern enum cmp_type hppa_branch_type;
807:
808: /* Output the label for a function definition. */
809: #ifdef HP_FP_ARG_DESCRIPTOR_REVERSED
810: #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
811: do { fprintf (FILE, ",ARGW%d=FR", (ARG0)); \
812: fprintf (FILE, ",ARGW%d=FU", (ARG1));} while (0)
813: #else
814: #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
815: do { fprintf (FILE, ",ARGW%d=FU", (ARG0)); \
816: fprintf (FILE, ",ARGW%d=FR", (ARG1));} while (0)
817: #endif
1.1.1.2 ! root 818:
1.1 root 819: #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1.1.1.2 ! root 820: do { tree fntype = TREE_TYPE (TREE_TYPE (DECL)); \
1.1 root 821: tree tree_type = TREE_TYPE (DECL); \
822: tree parm; \
823: int i; \
824: if (TREE_PUBLIC (DECL)) \
1.1.1.2 ! root 825: { extern int current_function_varargs; \
1.1 root 826: fputs ("\t.EXPORT ", FILE); assemble_name (FILE, NAME); \
1.1.1.2 ! root 827: fputs (",ENTRY,PRIV_LEV=3", FILE); \
1.1 root 828: for (parm = DECL_ARGUMENTS (DECL), i = 0; parm && i < 4; \
829: parm = TREE_CHAIN (parm)) \
830: { \
831: if (TYPE_MODE (DECL_ARG_TYPE (parm)) == SFmode) \
832: fprintf (FILE, ",ARGW%d=FR", i++); \
833: else if (TYPE_MODE (DECL_ARG_TYPE (parm)) == DFmode) \
834: { \
1.1.1.2 ! root 835: if (i <= 2) \
! 836: { \
! 837: if (i == 1) i++; \
! 838: ASM_DOUBLE_ARG_DESCRIPTORS (FILE, i++, i++); \
! 839: } \
! 840: else \
! 841: break; \
1.1 root 842: } \
843: else \
844: { \
845: int arg_size = \
846: FUNCTION_ARG_SIZE (TYPE_MODE (DECL_ARG_TYPE (parm)),\
847: DECL_ARG_TYPE (parm)); \
848: if (arg_size == 2 && i <= 2) \
849: { \
850: if (i == 1) i++; \
851: fprintf (FILE, ",ARGW%d=GR", i++); \
852: fprintf (FILE, ",ARGW%d=GR", i++); \
853: } \
854: else if (arg_size == 1) \
855: fprintf (FILE, ",ARGW%d=GR", i++); \
856: else \
857: i += arg_size; \
858: } \
859: } \
860: /* anonymous args */ \
1.1.1.2 ! root 861: if ((TYPE_ARG_TYPES (tree_type) != 0 \
! 862: && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (tree_type)))\
! 863: != void_type_node)) \
! 864: || current_function_varargs) \
1.1 root 865: { \
866: for (; i < 4; i++) \
867: fprintf (FILE, ",ARGW%d=GR", i); \
868: } \
869: if (TYPE_MODE (fntype) == DFmode) \
870: fprintf (FILE, ",RTNVAL=FR"); \
871: else if (TYPE_MODE (fntype) == SFmode) \
872: fprintf (FILE, ",RTNVAL=FU"); \
873: else if (fntype != void_type_node) \
874: fprintf (FILE, ",RTNVAL=GR"); \
875: fputs ("\n", FILE); \
876: } \
877: ASM_OUTPUT_LABEL (FILE, NAME);} while (0)
878:
879: /* Two views of the size of the current frame. */
880: extern int actual_fsize;
881: extern int apparent_fsize;
882:
883: /* This macro generates the assembly code for function entry.
884: FILE is a stdio stream to output the code to.
885: SIZE is an int: how many units of temporary storage to allocate.
886: Refer to the array `regs_ever_live' to determine which registers
887: to save; `regs_ever_live[I]' is nonzero if register number I
888: is ever used in the function. This macro is responsible for
889: knowing which registers should not be saved even if used. */
890:
891: /* On HP-PA, move-double insns between fpu and cpu need an 8-byte block
892: of memory. If any fpu reg is used in the function, we allocate
893: such a block here, at the bottom of the frame, just in case it's needed.
894:
895: If this function is a leaf procedure, then we may choose not
896: to do a "save" insn. The decision about whether or not
897: to do this is made in regclass.c. */
898:
899: #define FUNCTION_PROLOGUE(FILE, SIZE) \
900: output_function_prologue (FILE, SIZE, leaf_function)
901:
902: /* Output assembler code to FILE to increment profiler label # LABELNO
903: for profiling a function entry.
904:
905: Because HPUX _mcount is so different, we actually emit the
906: profiling code in function_prologue. This just stores LABELNO for
907: that. */
908:
909: #define PROFILE_BEFORE_PROLOGUE
910: #define FUNCTION_PROFILER(FILE, LABELNO) \
911: { extern int hp_profile_labelno; hp_profile_labelno = (LABELNO);}
912:
913: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
914: the stack pointer does not matter. The value is tested only in
915: functions that have frame pointers.
916: No definition is equivalent to always zero. */
917:
918: extern int may_call_alloca;
919: extern int current_function_pretend_args_size;
920:
921: #define EXIT_IGNORE_STACK \
922: (get_frame_size () != 0 \
923: || current_function_calls_alloca || current_function_outgoing_args_size)
924:
925:
926: /* This macro generates the assembly code for function exit,
927: on machines that need it. If FUNCTION_EPILOGUE is not defined
928: then individual return instructions are generated for each
929: return statement. Args are same as for FUNCTION_PROLOGUE.
930:
931: The function epilogue should not depend on the current stack pointer!
932: It should use the frame pointer only. This is mandatory because
933: of alloca; we also take advantage of it to omit stack adjustments
934: before returning. */
935:
936: /* This declaration is needed due to traditional/ANSI
937: incompatibilities which cannot be #ifdefed away
938: because they occur inside of macros. Sigh. */
939: extern union tree_node *current_function_decl;
940:
941: #define FUNCTION_EPILOGUE(FILE, SIZE) \
942: output_function_epilogue (FILE, SIZE, leaf_function)
943: #define DELAY_SLOTS_FOR_EPILOGUE 1
944: #define ELIGIBLE_FOR_EPILOGUE_DELAY(trial, slots_filled) \
945: eligible_for_epilogue_delay (trial, slots_filled)
946:
947: /* Output assembler code for a block containing the constant parts
948: of a trampoline, leaving space for the variable parts. */
949:
950: #define TRAMPOLINE_TEMPLATE(FILE) {}
951:
952: /* Length in units of the trampoline for entering a nested function. */
953:
954: #define TRAMPOLINE_SIZE 0
955:
956: /* Emit RTL insns to initialize the variable parts of a trampoline.
957: FNADDR is an RTX for the address of the function's pure code.
958: CXT is an RTX for the static chain value for the function.
959:
960: This takes 16 insns: 2 shifts & 2 ands (to split up addresses), 4 sethi
961: (to load in opcodes), 4 iors (to merge address and opcodes), and 4 writes
962: (to store insns). This is a bit excessive. Perhaps a different
963: mechanism would be better here. */
964: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) {}
965:
966: /* Emit code for a call to builtin_saveregs. We must emit USE insns which
967: reference the 4 integer arg registers and 4 fp arg registers.
968: Ordinarily they are not call used registers, but they are for
969: _builtin_saveregs, so we must make this explicit. */
970:
971:
972: #if 0
973: #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) \
974: (emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, TImode, 23))), \
975: (TARGET_SNAKE ? \
976: (emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 56))), \
977: emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 58))), \
978: emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 60))), \
979: emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 62)))) : \
980: (emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 36))), \
981: emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 37))), \
982: emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 38))), \
983: emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DFmode, 39))))))
984: #endif
985: #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) (rtx)hppa_builtin_saveregs (ARGLIST)
986:
987:
988: /* Addressing modes, and classification of registers for them. */
989:
990: #define HAVE_POST_INCREMENT
991: #define HAVE_POST_DECREMENT
992:
993: #define HAVE_PRE_DECREMENT
994: #define HAVE_PRE_INCREMENT
995:
996: /* Macros to check register numbers against specific register classes. */
997:
998: /* These assume that REGNO is a hard or pseudo reg number.
999: They give nonzero only if REGNO is a hard reg of the suitable class
1000: or a pseudo reg currently allocated to a suitable hard reg.
1001: Since they use reg_renumber, they are safe only once reg_renumber
1002: has been allocated, which happens in local-alloc.c. */
1003:
1004: #define REGNO_OK_FOR_INDEX_P(REGNO) \
1005: ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1006: #define REGNO_OK_FOR_BASE_P(REGNO) \
1007: ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1008: #define REGNO_OK_FOR_FP_P(REGNO) \
1.1.1.2 ! root 1009: (((REGNO) >= 32 && (REGNO) <= 111)\
! 1010: || (reg_renumber[REGNO] >= 32 && reg_renumber[REGNO] <= 111))
1.1 root 1011:
1012: /* Now macros that check whether X is a register and also,
1013: strictly, whether it is in a specified class.
1014:
1.1.1.2 ! root 1015: These macros are specific to the the HP-PA, and may be used only
1.1 root 1016: in code for printing assembler insns and in conditions for
1017: define_optimization. */
1018:
1019: /* 1 if X is an fp register. */
1020:
1021: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1022:
1023: /* Maximum number of registers that can appear in a valid memory address. */
1024:
1025: #define MAX_REGS_PER_ADDRESS 2
1026:
1027: /* Recognize any constant value that is a valid address. */
1028:
1029: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
1030:
1031: /* Nonzero if the constant value X is a legitimate general operand.
1032: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1033:
1034: /*#define LEGITIMATE_CONSTANT_P(X) (1)*/
1035: #define LEGITIMATE_CONSTANT_P(X) \
1036: (GET_CODE (X) != CONST_DOUBLE)
1037:
1038: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1039: and check its validity for a certain class.
1040: We have two alternate definitions for each of them.
1041: The usual definition accepts all pseudo regs; the other rejects
1042: them unless they have been allocated suitable hard regs.
1043: The symbol REG_OK_STRICT causes the latter definition to be used.
1044:
1045: Most source files want to accept pseudo regs in the hope that
1046: they will get allocated to the class that the insn wants them to be in.
1047: Source files for reload pass need to be strict.
1048: After reload, it makes no difference, since pseudo regs have
1049: been eliminated by then. */
1050:
1051: /* Optional extra constraints for this machine. Borrowed from sparc.h.
1052:
1053: For the HPPA, `Q' means that this is a memory operand but not a
1054: symbolic memory operand. Note that an unassigned pseudo register
1055: is such a memory operand. Needed because reload will generate
1056: these things in insns and then not re-recognize the insns, causing
1057: constrain_operands to fail.
1058:
1059: `R' handles the LO_SUM which can be an address for `Q'.
1060:
1061: `S' handles constraints for calls.
1062:
1063: `T' is for fp load and store addresses.*/
1064:
1065: #ifndef REG_OK_STRICT
1066:
1067: /* Nonzero if X is a hard reg that can be used as an index
1068: or if it is a pseudo reg. */
1069: #define REG_OK_FOR_INDEX_P(X) \
1070: (REGNO (X) && (REGNO (X) < 32 || REGNO (X) > FIRST_PSEUDO_REGISTER))
1071: /* Nonzero if X is a hard reg that can be used as a base reg
1072: or if it is a pseudo reg. */
1073: #define REG_OK_FOR_BASE_P(X) \
1074: (REGNO (X) && (REGNO (X) < 32 || REGNO (X) > FIRST_PSEUDO_REGISTER))
1075:
1076: #define EXTRA_CONSTRAINT(OP, C) \
1077: ((C) == 'Q' ? \
1078: ((GET_CODE (OP) == MEM \
1079: && memory_address_p (GET_MODE (OP), XEXP (OP, 0)) \
1080: && ! symbolic_memory_operand (OP, VOIDmode))) \
1081: : ((C) == 'R' ? \
1082: (GET_CODE (OP) == LO_SUM \
1083: && GET_CODE (XEXP (OP, 0)) == REG \
1084: && REG_OK_FOR_BASE_P (XEXP (OP, 0))) \
1085: : ((C) == 'S' \
1086: ? CONSTANT_P (OP) || memory_address_p (Pmode, OP)\
1087: : ((C) == 'T' ? short_memory_operand (OP, VOIDmode) : 0))))\
1088:
1089:
1090: #else
1091:
1092: /* Nonzero if X is a hard reg that can be used as an index. */
1093: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1094: /* Nonzero if X is a hard reg that can be used as a base reg. */
1095: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1096:
1097: #define EXTRA_CONSTRAINT(OP, C) \
1098: (((C) == 'Q' || (C) == 'T') ? \
1099: (GET_CODE (OP) == REG ? \
1100: (REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1101: && reg_renumber[REGNO (OP)] < 0) \
1102: : GET_CODE (OP) == MEM) \
1103: : ((C) == 'R' ? \
1104: (GET_CODE (OP) == LO_SUM \
1105: && GET_CODE (XEXP (OP, 0)) == REG \
1106: && REG_OK_FOR_BASE_P (XEXP (OP, 0))) \
1107: : (CONSTANT_P (OP) \
1108: || (GET_CODE (OP) == REG && reg_renumber[REGNO (OP)] > 0)\
1109: || strict_memory_address_p (Pmode, OP))))
1110:
1111: #endif
1112:
1113: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1114: that is a valid memory address for an instruction.
1115: The MODE argument is the machine mode for the MEM expression
1116: that wants to use this address.
1117:
1.1.1.2 ! root 1118: On the HP-PA, the actual legitimate addresses must be
1.1 root 1119: REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1120: But we can treat a SYMBOL_REF as legitimate if it is part of this
1121: function's constant-pool, because such addresses can actually
1122: be output as REG+SMALLINT. */
1123:
1124: #define VAL_5_BITS_P(X) ((unsigned)(X) + 0x10 < 0x20)
1125: #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1126:
1127: #define VAL_U5_BITS_P(X) ((unsigned)(X) < 0x20)
1128: #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1129:
1130: #define VAL_11_BITS_P(X) ((unsigned)(X) + 0x400 < 0x800)
1131: #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1132:
1133: #define VAL_14_BITS_P(X) ((unsigned)(X) + 0x2000 < 0x4000)
1134: #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1135:
1136: #define FITS_14_BITS(X) \
1137: (GET_CODE (X) == CONST_INT && INT_14_BITS (X))
1138:
1139: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1140: { \
1141: if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1142: || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1143: || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1144: && REG_P (XEXP (X, 0)) \
1145: && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1146: goto ADDR; \
1147: else if (GET_CODE (X) == PLUS) \
1148: { \
1149: rtx base = 0, index; \
1150: if (flag_pic && XEXP (X, 0) == pic_offset_table_rtx)\
1151: { \
1152: if (GET_CODE (XEXP (X, 1)) == REG \
1153: && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1154: goto ADDR; \
1155: else if (flag_pic == 1 \
1156: && GET_CODE (XEXP (X, 1)) != REG \
1157: && GET_CODE (XEXP (X, 1)) != LO_SUM \
1158: && GET_CODE (XEXP (X, 1)) != MEM) \
1159: goto ADDR; \
1160: } \
1161: else if (REG_P (XEXP (X, 0)) \
1162: && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1163: base = XEXP (X, 0), index = XEXP (X, 1); \
1164: else if (REG_P (XEXP (X, 1)) \
1165: && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1166: base = XEXP (X, 1), index = XEXP (X, 0); \
1167: if (base != 0) \
1168: if (GET_CODE (index) == CONST_INT \
1169: && ((INT_14_BITS (index) && (MODE) != SFmode && (MODE) != DFmode) \
1170: || INT_5_BITS (index))) \
1171: goto ADDR; \
1172: } \
1173: else if (GET_CODE (X) == LO_SUM \
1174: && GET_CODE (XEXP (X, 0)) == REG \
1175: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1176: && CONSTANT_P (XEXP (X, 1)) \
1177: && (MODE) != SFmode \
1178: && (MODE) != DFmode) \
1179: goto ADDR; \
1180: else if (GET_CODE (X) == LO_SUM \
1181: && GET_CODE (XEXP (X, 0)) == SUBREG \
1182: && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1183: && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1184: && CONSTANT_P (XEXP (X, 1)) \
1185: && (MODE) != SFmode \
1186: && (MODE) != DFmode) \
1187: goto ADDR; \
1188: else if (GET_CODE (X) == LABEL_REF \
1189: || (GET_CODE (X) == CONST_INT \
1190: && INT_14_BITS (X))) \
1191: goto ADDR; \
1192: }
1193:
1194: /* Try machine-dependent ways of modifying an illegitimate address
1195: to be legitimate. If we find one, return the new, valid address.
1196: This macro is used in only one place: `memory_address' in explow.c.
1197:
1198: OLDX is the address as it was before break_out_memory_refs was called.
1199: In some cases it is useful to look at this to decide what needs to be done.
1200:
1201: MODE and WIN are passed so that this macro can use
1202: GO_IF_LEGITIMATE_ADDRESS.
1203:
1204: It is always safe for this macro to do nothing. It exists to recognize
1205: opportunities to optimize the output. */
1206:
1.1.1.2 ! root 1207: /* On the HP-PA, change REG+N into REG+REG, and REG+(X*Y) into REG+REG. */
1.1 root 1208:
1209: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1210: { if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1211: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
1212: copy_to_mode_reg (SImode, XEXP (X, 1))); \
1213: if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
1214: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
1215: copy_to_mode_reg (SImode, XEXP (X, 0))); \
1216: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
1217: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
1218: force_operand (XEXP (X, 0), 0)); \
1219: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
1220: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
1221: force_operand (XEXP (X, 1), 0)); \
1222: if (memory_address_p (MODE, X)) \
1223: goto WIN; \
1224: if (flag_pic) (X) = legitimize_pic_address (X, MODE, gen_reg_rtx (Pmode));\
1.1.1.2 ! root 1225: else if ((GET_CODE (X) == SYMBOL_REF && read_only_operand (X))\
1.1 root 1226: || GET_CODE (X) == LABEL_REF) \
1227: (X) = gen_rtx (LO_SUM, Pmode, \
1228: copy_to_mode_reg (Pmode, gen_rtx (HIGH, Pmode, X)), X); \
1229: else if (GET_CODE (X) == SYMBOL_REF) \
1.1.1.2 ! root 1230: { \
! 1231: rtx temp2 = gen_reg_rtx (Pmode); \
! 1232: emit_insn (gen_rtx (SET, VOIDmode, temp2, \
! 1233: gen_rtx (PLUS, Pmode, gen_rtx (REG, Pmode, 27),\
! 1234: gen_rtx (HIGH, Pmode, X)))); \
! 1235: (X) = gen_rtx (LO_SUM, Pmode, temp2, X); \
! 1236: } \
1.1 root 1237: if (memory_address_p (MODE, X)) \
1238: goto WIN;}
1239:
1240: /* Go to LABEL if ADDR (a legitimate address expression)
1241: has an effect that depends on the machine mode it is used for. */
1242:
1243: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1244: if (GET_CODE (ADDR) == PRE_DEC \
1245: || GET_CODE (ADDR) == POST_DEC \
1246: || GET_CODE (ADDR) == PRE_INC \
1247: || GET_CODE (ADDR) == POST_INC) \
1248: goto LABEL
1249:
1250: /* Define this macro if references to a symbol must be treated
1251: differently depending on something about the variable or
1252: function named by the symbol (such as what section it is in).
1253:
1254: The macro definition, if any, is executed immediately after the
1255: rtl for DECL or other node is created.
1256: The value of the rtl will be a `mem' whose address is a
1257: `symbol_ref'.
1258:
1259: The usual thing for this macro to do is to a flag in the
1260: `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1261: name string in the `symbol_ref' (if one bit is not enough
1262: information).
1263:
1.1.1.2 ! root 1264: On the HP-PA we use this to indicate if a symbol is in text or
! 1265: data space. Also, function labels need special treatment. */
! 1266:
! 1267: #define TEXT_SPACE_P(DECL)\
! 1268: (TREE_CODE (DECL) == FUNCTION_DECL \
! 1269: || (TREE_CODE (DECL) == VAR_DECL \
! 1270: && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
! 1271: && !flag_pic) \
! 1272: || (*tree_code_type[(int) TREE_CODE (DECL)] == 'c' \
! 1273: && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings)))
! 1274:
! 1275: #define FUNCTION_NAME_P(NAME) \
! 1276: (*(NAME) == '@' || (*(NAME) == '*' && *((NAME) + 1) == '@'))
1.1 root 1277:
1278: #define ENCODE_SECTION_INFO(DECL)\
1.1.1.2 ! root 1279: do \
! 1280: { if (TEXT_SPACE_P (DECL)) \
! 1281: { rtx _rtl; \
! 1282: if (TREE_CODE (DECL) == FUNCTION_DECL \
! 1283: || TREE_CODE (DECL) == VAR_DECL) \
! 1284: _rtl = DECL_RTL (DECL); \
! 1285: else \
! 1286: _rtl = TREE_CST_RTL (DECL); \
! 1287: SYMBOL_REF_FLAG (XEXP (_rtl, 0)) = 1; \
! 1288: if (TREE_CODE (DECL) == FUNCTION_DECL) \
! 1289: hppa_encode_label (XEXP (DECL_RTL (DECL), 0));\
! 1290: } \
! 1291: } \
1.1 root 1292: while (0)
1293:
1.1.1.2 ! root 1294: /* Store the user-specified part of SYMBOL_NAME in VAR.
! 1295: This is sort of inverse to ENCODE_SECTION_INFO. */
! 1296:
! 1297: #define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \
! 1298: (VAR) = ((SYMBOL_NAME) + ((SYMBOL_NAME)[0] == '*' ? \
! 1299: 1 + (SYMBOL_NAME)[1] == '@'\
! 1300: : (SYMBOL_NAME)[0] == '@'))
1.1 root 1301:
1302: /* Specify the machine mode that this machine uses
1303: for the index in the tablejump instruction. */
1304: #define CASE_VECTOR_MODE SImode
1305:
1306: /* Define this if the tablejump instruction expects the table
1307: to contain offsets from the address of the table.
1308: Do not define this if the table should contain absolute addresses. */
1309: /* #define CASE_VECTOR_PC_RELATIVE */
1310:
1311: /* Specify the tree operation to be used to convert reals to integers. */
1312: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1313:
1314: /* This is the kind of divide that is easiest to do in the general case. */
1315: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1316:
1317: /* Define this as 1 if `char' should by default be signed; else as 0. */
1318: #define DEFAULT_SIGNED_CHAR 1
1319:
1320: /* Max number of bytes we can move from memory to memory
1321: in one reasonably fast instruction. */
1322: #define MOVE_MAX 8
1323:
1324: /* Define if normal loads of shorter-than-word items from memory clears
1325: the rest of the bigs in the register. */
1326: #define BYTE_LOADS_ZERO_EXTEND
1327:
1328: /* Nonzero if access to memory by bytes is slow and undesirable. */
1329: #define SLOW_BYTE_ACCESS 1
1330:
1331: /* Do not break .stabs pseudos into continuations. */
1332: #define DBX_CONTIN_LENGTH 0
1333:
1334: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1335: is done just by pretending it is already truncated. */
1336: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1337:
1338: /* We assume that the store-condition-codes instructions store 0 for false
1339: and some other value for true. This is the value stored for true. */
1340:
1341: #define STORE_FLAG_VALUE 1
1342:
1343: /* When a prototype says `char' or `short', really pass an `int'. */
1344: #define PROMOTE_PROTOTYPES
1345:
1346: /* Specify the machine mode that pointers have.
1347: After generation of rtl, the compiler makes no further distinction
1348: between pointers and any other objects of this machine mode. */
1349: #define Pmode SImode
1350:
1351: /* Add any extra modes needed to represent the condition code.
1352:
1353: HPPA floating comparisons produce condition codes. */
1354: #define EXTRA_CC_MODES CCFPmode
1355:
1356: /* Define the names for the modes specified above. */
1357: #define EXTRA_CC_NAMES "CCFP"
1358:
1359: /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1360: return the mode to be used for the comparison. For floating-point, CCFPmode
1361: should be used. CC_NOOVmode should be used when the first operand is a
1362: PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1363: needed. */
1.1.1.2 ! root 1364: #define SELECT_CC_MODE(OP,X,Y) \
1.1 root 1365: (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1366:
1367: /* A function address in a call instruction
1368: is a byte address (for indexing purposes)
1369: so give the MEM rtx a byte's mode. */
1370: #define FUNCTION_MODE SImode
1371:
1372: /* Define this if addresses of constant functions
1373: shouldn't be put through pseudo regs where they can be cse'd.
1374: Desirable on machines where ordinary constants are expensive
1375: but a CALL with constant address is cheap. */
1376: #define NO_FUNCTION_CSE
1377:
1378: /* Compute the cost of computing a constant rtl expression RTX
1379: whose rtx-code is CODE. The body of this macro is a portion
1380: of a switch statement. If the code is computed here,
1381: return it with a return statement. Otherwise, break from the switch. */
1382:
1383: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1384: case CONST_INT: \
1385: if (INTVAL (RTX) == 0) return 0; \
1386: if (INT_14_BITS (RTX)) return 1; \
1387: case CONST: \
1388: case LABEL_REF: \
1389: case SYMBOL_REF: \
1390: return 2; \
1391: case CONST_DOUBLE: \
1392: return 4;
1393:
1394: #define ADDRESS_COST(RTX) \
1395: (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1396:
1397: /* Compute extra cost of moving data between one register class
1398: and another. */
1399: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1400: ((((CLASS1 == FP_REGS || CLASS1 == SNAKE_FP_REGS \
1401: || CLASS1 == HI_SNAKE_FP_REGS) \
1.1.1.2 ! root 1402: && (CLASS2 == R1_REGS || CLASS2 == GENERAL_REGS)) \
! 1403: || ((CLASS1 == R1_REGS || CLASS1 == GENERAL_REGS) \
1.1 root 1404: && (CLASS2 == FP_REGS || CLASS2 == SNAKE_FP_REGS \
1405: || CLASS2 == HI_SNAKE_FP_REGS))) ? 6 : 2)
1406:
1407: /* Provide the costs of a rtl expression. This is in the body of a
1408: switch on CODE. The purpose for the cost of MULT is to encourage
1409: `synth_mult' to find a synthetic multiply when reasonable. */
1410:
1411: #define RTX_COSTS(X,CODE,OUTER_CODE) \
1412: case MULT: \
1413: return COSTS_N_INSNS (20); \
1414: case DIV: \
1415: case UDIV: \
1416: case MOD: \
1417: case UMOD: \
1418: return COSTS_N_INSNS (60); \
1.1.1.2 ! root 1419: case PLUS: /* this includes shNadd insns */ \
1.1 root 1420: return COSTS_N_INSNS (1) + 2;
1421:
1422: /* Conditional branches with empty delay slots have a length of two. */
1423: #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1424: if (GET_CODE (INSN) == CALL_INSN \
1425: || (GET_CODE (INSN) == JUMP_INSN && ! simplejump_p (insn))) \
1426: LENGTH += 1;
1427:
1428: /* Control the assembler format that we output. */
1429:
1430: /* Output at beginning of assembler file. */
1431:
1432: #define ASM_FILE_START(FILE) \
1433: do { fprintf (FILE, "\t.SPACE $PRIVATE$\n\
1434: \t.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31\n\
1.1.1.2 ! root 1435: \t.SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82\n\
1.1 root 1436: \t.SPACE $TEXT$\n\
1437: \t.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44\n\
1438: \t.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n\
1439: \t.IMPORT $global$,DATA\n\
1440: \t.IMPORT $$dyncall,MILLICODE\n");\
1441: if (profile_flag)\
1.1.1.2 ! root 1442: fprintf (FILE, "\t.IMPORT _mcount, CODE\n");\
1.1 root 1443: } while (0)
1444:
1445: /* Output to assembler file text saying following lines
1446: may contain character constants, extra white space, comments, etc. */
1447:
1448: #define ASM_APP_ON ""
1449:
1450: /* Output to assembler file text saying following lines
1451: no longer contain unusual constructs. */
1452:
1453: #define ASM_APP_OFF ""
1454:
1.1.1.2 ! root 1455: /* We don't yet know how to identify GCC to HP-PA machines. */
1.1 root 1456: #define ASM_IDENTIFY_GCC(FILE) fprintf (FILE, "; gcc_compiled.:\n")
1457:
1458: /* Output before code. */
1459:
1460: /* Supposedly the assembler rejects the command if there is no tab! */
1461: #define TEXT_SECTION_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $CODE$\n"
1462:
1463: /* Output before writable data. */
1464:
1465: /* Supposedly the assembler rejects the command if there is no tab! */
1466: #define DATA_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $DATA$\n"
1467:
1.1.1.2 ! root 1468: /* Output before uninitialized data. */
! 1469:
! 1470: #define BSS_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $BSS$\n"
! 1471:
! 1472: /* Define the .bss section for ASM_OUTPUT_LOCAL to use. */
! 1473:
! 1474: #define EXTRA_SECTIONS in_bss
! 1475:
! 1476: #define EXTRA_SECTION_FUNCTIONS \
! 1477: void \
! 1478: bss_section () \
! 1479: { \
! 1480: if (in_section != in_bss) \
! 1481: { \
! 1482: fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \
! 1483: in_section = in_bss; \
! 1484: } \
! 1485: }
! 1486:
! 1487:
1.1 root 1488: /* How to refer to registers in assembler output.
1489: This sequence is indexed by compiler's hard-register-number (see above). */
1490:
1491: #define REGISTER_NAMES \
1492: {"0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
1493: "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
1494: "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", \
1495: "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", \
1496: "%fr0", "%fr1", "%fr2", "%fr3", "%fr4", "%fr5", "%fr6", "%fr7", \
1497: "%fr8", "%fr9", "%fr10", "%fr11", "%fr12", "%fr13", "%fr14", "%fr15", \
1498: "%fr0", "%fr0R", "%fr1", "%fr1R", "%fr2", "%fr2R", "%fr3", "%fr3R", \
1499: "%fr4", "%fr4R", "%fr5", "%fr5R", "%fr6", "%fr6R", "%fr7", "%fr7R", \
1500: "%fr8", "%fr8R", "%fr9", "%fr9R", "%fr10", "%fr10R", "%fr11", "%fr11R",\
1501: "%fr12", "%fr12R", "%fr13", "%fr13R", "%fr14", "%fr14R", "%fr15", "%fr15R",\
1502: "%fr16", "%fr16R", "%fr17", "%fr17R", "%fr18", "%fr18R", "%fr19", "%fr19R",\
1503: "%fr20", "%fr20R", "%fr21", "%fr21R", "%fr22", "%fr22R", "%fr23", "%fr23R",\
1504: "%fr24", "%fr24R", "%fr25", "%fr25R", "%fr26", "%fr26R", "%fr27", "%fr27R",\
1505: "%fr28", "%fr28R", "%fr29", "%fr29R", "%fr30", "%fr30R", "%fr31", "%fr31R",\
1506: "SAR"}
1507:
1508: /* How to renumber registers for dbx and gdb. */
1509:
1510: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1511:
1512: /* This is how to output the definition of a user-level label named NAME,
1513: such as the label on a static function or variable NAME. */
1514:
1515: #define ASM_OUTPUT_LABEL(FILE, NAME) \
1516: do { assemble_name (FILE, NAME); fputc ('\n', FILE); } while (0)
1517:
1518: /* This is how to output a command to make the user-level label named NAME
1519: defined for reference from other files. */
1520:
1521: #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1522: do { fputs ("\t.IMPORT ", FILE); \
1523: assemble_name (FILE, NAME); \
1.1.1.2 ! root 1524: if (FUNCTION_NAME_P (NAME)) \
1.1 root 1525: fputs (",CODE\n", FILE); \
1.1.1.2 ! root 1526: else \
! 1527: fputs (",DATA\n", FILE); \
1.1 root 1528: } while (0)
1529:
1530: /* hpux ld doesn't output the object file name, or anything useful at
1531: all, to indicate the start of an object file's symbols. This screws
1532: up gdb, so we'll output this magic cookie at the end of an object
1533: file with debugging symbols */
1534:
1535: #define ASM_FILE_END(FILE) \
1536: do { if (write_symbols == DBX_DEBUG)\
1537: { fputs (TEXT_SECTION_ASM_OP, FILE);\
1538: fputs (".stabs \"end_file.\",4,0,0,Ltext_end\nLtext_end:\n",\
1539: (FILE));\
1540: }\
1541: } while (0)
1542:
1543: /* The bogus HP assembler requires ALL external references to be
1544: "imported", even library calls. They look a bit different, so
1545: here's this macro. */
1546:
1547: #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, RTL) \
1548: do { fputs ("\t.IMPORT ", FILE); \
1549: assemble_name (FILE, XSTR ((RTL), 0)); \
1550: fputs (",CODE\n", FILE); \
1551: } while (0)
1552:
1553: #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1554: do { fputs ("\t.EXPORT ", FILE); assemble_name (FILE, NAME); \
1.1.1.2 ! root 1555: if (FUNCTION_NAME_P (NAME)) \
! 1556: fputs (",CODE\n", FILE); \
! 1557: else \
! 1558: fputs (",DATA\n", FILE);} while (0)
1.1 root 1559:
1560: /* This is how to output a reference to a user-level label named NAME.
1561: `assemble_name' uses this. */
1562:
1563: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1.1.1.2 ! root 1564: fprintf ((FILE), "%s", (NAME) + (FUNCTION_NAME_P (NAME) ? 1 : 0))
1.1 root 1565:
1566: /* This is how to output an internal numbered label where
1567: PREFIX is the class of label and NUM is the number within the class. */
1568:
1569: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1570: fprintf (FILE, "%s$%04d\n", PREFIX, NUM)
1571:
1572: /* This is how to store into the string LABEL
1573: the symbol_ref name of an internal numbered label where
1574: PREFIX is the class of label and NUM is the number within the class.
1575: This is suitable for output with `assemble_name'. */
1576:
1577: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1578: sprintf (LABEL, "*%s$%04d", PREFIX, NUM)
1579:
1580: /* This is how to output an assembler line defining a `double' constant. */
1581:
1582: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1583: do { union { double d; int i[2];} __u; \
1584: __u.d = (VALUE); \
1585: fprintf (FILE, "\t; .double %.20e\n\t.word %d ; = 0x%x\n\t.word %d ; = 0x%x\n", \
1586: __u.d, __u.i[0], __u.i[0], __u.i[1], __u.i[1]); \
1587: } while (0)
1588:
1589: /* This is how to output an assembler line defining a `float' constant. */
1590:
1591: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1592: do { union { float f; int i;} __u; \
1593: __u.f = (VALUE); \
1594: fprintf (FILE, "\t; .float %.12e\n\t.word %d ; = 0x%x\n", __u.f, __u.i, __u.i); \
1595: } while (0)
1596:
1597: /* This is how to output an assembler line defining an `int' constant. */
1598:
1599: #define ASM_OUTPUT_INT(FILE,VALUE) \
1600: ( fprintf (FILE, "\t.word "), \
1601: output_addr_const (FILE, (VALUE)), \
1602: fprintf (FILE, "\n"))
1603:
1604: /* Likewise for `short' and `char' constants. */
1605:
1606: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1607: ( fprintf (FILE, "\t.half "), \
1608: output_addr_const (FILE, (VALUE)), \
1609: fprintf (FILE, "\n"))
1610:
1611: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1612: ( fprintf (FILE, "\t.byte "), \
1613: output_addr_const (FILE, (VALUE)), \
1614: fprintf (FILE, "\n"))
1615:
1616: /* This is how to output an assembler line for a numeric constant byte. */
1617:
1618: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1619: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1620:
1621: #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1622: output_ascii ((FILE), (P), (SIZE))
1623:
1.1.1.2 ! root 1624: #if 0
1.1 root 1625: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1626: fprintf (FILE, "\tstws,mb %s,4(0,30)\n", reg_names[REGNO])
1627:
1628: /* This is how to output an insn to pop a register from the stack.
1629: It need not be very fast code. */
1630:
1631: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1632: fprintf (FILE, "\tldws,ma -4(0,30),%s\n", reg_names[REGNO])
1.1.1.2 ! root 1633: #endif
1.1 root 1634:
1.1.1.2 ! root 1635: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO)
! 1636: #define ASM_OUTPUT_REG_POP(FILE,REGNO)
1.1 root 1637: /* This is how to output an element of a case-vector that is absolute.
1638: Note that this method makes filling these branch delay slots
1639: virtually impossible. */
1640:
1641: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1642: fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1643:
1644: /* This is how to output an element of a case-vector that is relative.
1.1.1.2 ! root 1645: (The HP-PA does not use such vectors,
1.1 root 1646: but we must define this macro anyway.) */
1647:
1648: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1649: fprintf (FILE, "\tword L%d-L%d\n", VALUE, REL)
1650:
1651: /* This is how to output an assembler line
1652: that says to advance the location counter
1653: to a multiple of 2**LOG bytes. */
1654:
1655: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1656: fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1657:
1658: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1659: fprintf (FILE, "\t.blockz %d\n", (SIZE))
1660:
1661: /* This says how to output an assembler line
1662: to define a global common symbol. */
1663:
1.1.1.2 ! root 1664: /* Supposedly the assembler rejects the command if there is no tab! */
! 1665:
! 1666:
1.1 root 1667: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1.1.1.2 ! root 1668: ( (TARGET_NO_BSS) ? data_section (): bss_section (), \
1.1 root 1669: assemble_name ((FILE), (NAME)), \
1670: fputs ("\t.comm ", (FILE)), \
1671: fprintf ((FILE), "%d\n", (ROUNDED)))
1672:
1673: /* This says how to output an assembler line
1674: to define a local common symbol. */
1675:
1676: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1.1.1.2 ! root 1677: ( (TARGET_NO_BSS) ? data_section (): bss_section (), \
1.1 root 1678: fprintf ((FILE), "\t.align %d\n", (SIZE) <= 4 ? 4 : 8), \
1679: assemble_name ((FILE), (NAME)), \
1.1.1.2 ! root 1680: (TARGET_NO_BSS) ? fprintf ((FILE), "\n\t.blockz %d\n", (ROUNDED)) \
! 1681: : fprintf ((FILE), "\n\t.block %d\n", (ROUNDED)))
1.1 root 1682:
1683: /* Store in OUTPUT a string (made with alloca) containing
1684: an assembler-name for a local static variable named NAME.
1685: LABELNO is an integer which is different for each call. */
1686:
1687: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1688: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
1689: sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
1690:
1691: /* Define the parentheses used to group arithmetic operations
1692: in assembler code. */
1693:
1694: #define ASM_OPEN_PAREN "("
1695: #define ASM_CLOSE_PAREN ")"
1696:
1697: /* Define results of standard character escape sequences. */
1698: #define TARGET_BELL 007
1699: #define TARGET_BS 010
1700: #define TARGET_TAB 011
1701: #define TARGET_NEWLINE 012
1702: #define TARGET_VT 013
1703: #define TARGET_FF 014
1704: #define TARGET_CR 015
1705:
1706: #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1707: ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
1708:
1709: /* Print operand X (an rtx) in assembler syntax to file FILE.
1710: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1711: For `%' followed by punctuation, CODE is the punctuation and X is null.
1712:
1.1.1.2 ! root 1713: On the HP-PA, the CODE can be `r', meaning this is a register-only operand
1.1 root 1714: and an immediate zero should be represented as `r0'.
1715:
1716: Several % codes are defined:
1717: O an operation
1718: C compare conditions
1719: N extract conditions
1720: M modifier to handle preincrement addressing for memory refs.
1721: F modifier to handle preincrement addressing for fp memory refs */
1722:
1723: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1724:
1725:
1726: /* Print a memory address as an operand to reference that memory location. */
1727:
1728: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1729: { register rtx addr = ADDR; \
1730: register rtx base; \
1731: int offset; \
1732: switch (GET_CODE (addr)) \
1733: { \
1734: case REG: \
1735: fprintf (FILE, "0(0,%s)", reg_names [REGNO (addr)]); \
1736: break; \
1737: case PLUS: \
1738: if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1739: offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
1740: else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1741: offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
1742: else \
1743: abort (); \
1744: fprintf (FILE, "%d(0,%s)", offset, reg_names [REGNO (base)]); \
1745: break; \
1746: case LO_SUM: \
1747: fputs ("R'", FILE); \
1748: output_global_address (FILE, XEXP (addr, 1)); \
1749: fputs ("(", FILE); \
1750: output_operand (XEXP (addr, 0), 0); \
1751: fputs (")", FILE); \
1752: break; \
1753: case CONST_INT: \
1754: fprintf (FILE, "%d(0,0)", INTVAL (addr)); \
1755: break; \
1756: default: \
1757: output_addr_const (FILE, addr); \
1758: }}
1759:
1760:
1761: #define SMALL_INT(OP) INT_14_BITS (OP)
1762: /* Define functions in pa.c and used in insn-output.c. */
1763:
1.1.1.2 ! root 1764: extern char *output_and ();
! 1765: extern char *output_ior ();
1.1 root 1766: extern char *output_move_double ();
1767: extern char *output_fp_move_double ();
1768: extern char *output_block_move ();
1769: extern char *output_scc_insn ();
1770: extern char *output_cbranch ();
1771: extern char *output_return ();
1772: extern char *output_floatsisf2 ();
1773: extern char *output_floatsidf2 ();
1774: extern char *output_mul_insn ();
1775: extern char *output_div_insn ();
1776: extern char *output_mod_insn ();
1777: extern void output_arg_descriptor ();
1778: extern void output_global_address ();
1779: extern struct rtx_def *legitimize_pic_address ();
1.1.1.2 ! root 1780: extern struct rtx_def *gen_cmp_fp ();
! 1781: extern struct rtx_def *gen_scond_fp ();
! 1782: extern void hppa_encode_label ();
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