--- gcc/config/pa/pa.h 2018/04/24 18:10:27 1.1.1.1 +++ gcc/config/pa/pa.h 2018/04/24 18:17:30 1.1.1.2 @@ -47,17 +47,8 @@ extern int target_flags; #define TARGET_DISABLE_FPREGS (target_flags & 2) -/* Force gcc to only use instructions which are safe when compiling kernels. - Specifically, avoid using add instructions with dp (r27) as an argument. - Use addil instructions instead. Doing so avoids a nasty bug in the - HPUX linker. When HP fixes their linker take this option out. */ - -#define TARGET_KERNEL (target_flags & 4) - -/* Generate code that will link against HPUX 8.0 shared libraries. - Older linkers and assemblers might not support this. */ - -#define TARGET_SHARED_LIBS 1 /* was (target_flags & 8) */ +/* Allow unconditional jumps in the delay slots of call instructions. */ +#define TARGET_JUMP_IN_DELAY (target_flags & 8) /* Force all function calls to indirect addressing via a register. This avoids lossage when the function is very far away from the current PC. @@ -67,17 +58,18 @@ extern int target_flags; #define TARGET_LONG_CALLS (target_flags & 16) -/* Disable indexed addressing modes. Necessary under MACH. - - ??? Some problem with a high bit being set in an address having - special meaning to the PA MACH ports. */ +/* Disable indexed addressing modes. */ #define TARGET_DISABLE_INDEXING (target_flags & 32) -/* Force a colon to be tacked onto the end of local and global - labels. An option because the HP assembler croaks on them. */ +/* Emit directives only understood by GAS. This allows parameter + relocations to work for static functions. There is no way + to make them work the HP assembler at this time. + + Also forces a colon to be tacked onto the end of local and + global labes. */ -#define TARGET_TRAILING_COLON (target_flags & 64) +#define TARGET_GAS (target_flags & 128) /* Macro to define tables used to set the flags. This is a list in braces of pairs in braces, @@ -86,25 +78,32 @@ extern int target_flags; An empty string NAME is used to identify the default VALUE. */ #define TARGET_SWITCHES \ - {{"snake", 1}, \ - {"nosnake", -1}, \ - {"pa-risc-1-0", -1}, \ - {"pa-risc-1-1", 1}, \ - {"disable-fpregs", 2},\ - {"kernel", 4}, \ - {"shared-libs", 8}, \ - {"no-shared-libs", -8},\ - {"long-calls", 16}, \ - {"disable-indexing", 32},\ - {"trailing-colon", 64},\ + {{"snake", 1}, \ + {"nosnake", -1}, \ + {"pa-risc-1-0", -1}, \ + {"pa-risc-1-1", 1}, \ + {"disable-fpregs", 2}, \ + {"no-disable-fpregs", 2}, \ + {"jump-in-delay", 8}, \ + {"no-jump-in-delay", -8}, \ + {"long-calls", 16}, \ + {"no-long-calls", -16}, \ + {"disable-indexing", 32}, \ + {"no-disable-indexing", -32},\ + {"gas", 128}, \ + {"no-gas", -128}, \ { "", TARGET_DEFAULT}} #ifndef TARGET_DEFAULT -#define TARGET_DEFAULT 0 +#define TARGET_DEFAULT 128 /* TARGET_GAS + TARGET_JUMP_IN_DELAY */ #endif #define DBX_DEBUGGING_INFO -#define DEFAULT_GDB_EXTENSIONS 0 +#define DEFAULT_GDB_EXTENSIONS 1 + +/* Only lables should ever begin in colunm zero. */ +#define ASM_STABS_OP "\t.stabs" +#define ASM_STABN_OP "\t.stabn" #if (TARGET_DEFAULT & 1) == 0 #define CPP_SPEC "%{msnake:-D__hp9000s700 -D_PA_RISC1_1}\ @@ -119,6 +118,9 @@ extern int target_flags; #define LINK_SPEC "-u main" +/* Allow $ in identifiers. */ +#define DOLLARS_IN_IDENTIFIERS 2 + /* Make gcc agree with */ #define SIZE_TYPE "unsigned int" @@ -126,6 +128,21 @@ extern int target_flags; #define WCHAR_TYPE "short unsigned int" #define WCHAR_TYPE_SIZE 16 +/* Sometimes certain combinations of command options do not make sense + on a particular target machine. You can define a macro + `OVERRIDE_OPTIONS' to take account of this. This macro, if + defined, is executed once just after all the command options have + been parsed. + + On the PA, it is used to explicitly warn the user that -fpic and -fPIC + do not work. */ + +#define OVERRIDE_OPTIONS \ +{ \ + if (flag_pic != 0) \ + warning ("-fpic and -fPIC are not supported on the PA."); \ +} + /* Omit frame pointer at high optimization levels. */ #define OPTIMIZATION_OPTIONS(OPTIMIZE) \ @@ -136,7 +153,7 @@ extern int target_flags; /* Names to predefine in the preprocessor for this target machine. */ -#define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -D_HPUX_SOURCE -Dhp9000 -Dhp800 -Dspectrum -DREVARGV" +#define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -D_HPUX_SOURCE -Dhp9000 -Dhp800 -Dspectrum -DREVARGV -Asystem(unix) -Asystem(bsd) -Acpu(hppa) -Amachine(hppa)" /* target machine storage layout */ @@ -178,7 +195,7 @@ extern int target_flags; #define MAX_PARM_BOUNDARY 64 /* Boundary (in *bits*) on which stack pointer should be aligned. */ -#define STACK_BOUNDARY (TARGET_SNAKE ? 512 : 64) +#define STACK_BOUNDARY 512 /* Allocation boundary (in *bits*) for the code of a function. */ #define FUNCTION_BOUNDARY 32 @@ -458,6 +475,10 @@ extern int target_flags; #define INITIALIZE_PIC initialize_pic () #define FINALIZE_PIC finalize_pic () +/* SOM ABI says that objects larger than 64 bits are returned in memory. */ +#define RETURN_IN_MEMORY(TYPE) \ + (TYPE_MODE (TYPE) == BLKmode || int_size_in_bytes (TYPE) > 8) + /* Register in which address to store a structure value is passed to a function. */ #define STRUCT_VALUE_REGNUM 28 @@ -788,12 +809,12 @@ enum reg_class { NO_REGS, R1_REGS, GENER (4 >= ((CUM) + FUNCTION_ARG_SIZE ((MODE), (TYPE))) \ ? gen_rtx (REG, (MODE), \ (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \ - ? ((! (TARGET_SHARED_LIBS && current_call_is_indirect) \ + ? ((! current_call_is_indirect \ && (MODE) == DFmode) \ ? ((CUM) ? (TARGET_SNAKE ? 50 : 35) \ : (TARGET_SNAKE ? 46 : 33)) \ : ((CUM) ? 23 : 25)) \ - : ((! (TARGET_SHARED_LIBS && current_call_is_indirect) \ + : ((! current_call_is_indirect \ && (MODE) == SFmode) \ ? (TARGET_SNAKE ? 44 + 2 * (CUM) : 32 + (CUM)) \ : (27 - (CUM) - FUNCTION_ARG_SIZE ((MODE), (TYPE))))))\ @@ -817,9 +838,7 @@ enum reg_class { NO_REGS, R1_REGS, GENER #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ (((TYPE) != 0) \ - ? ((TYPE_ALIGN(TYPE) <= PARM_BOUNDARY) \ - ? PARM_BOUNDARY \ - : TYPE_ALIGN(TYPE)) \ + ? (((int_size_in_bytes (TYPE)) + 3) / 4) * BITS_PER_WORD \ : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \ ? PARM_BOUNDARY \ : GET_MODE_ALIGNMENT(MODE))) @@ -833,7 +852,7 @@ extern struct rtx_def *hppa_compare_op0, extern enum cmp_type hppa_branch_type; /* Output the label for a function definition. */ -#ifdef HP_FP_ARG_DESCRIPTOR_REVERSED +#ifndef HP_FP_ARG_DESCRIPTOR_REVERSED #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \ do { fprintf (FILE, ",ARGW%d=FR", (ARG0)); \ fprintf (FILE, ",ARGW%d=FU", (ARG1));} while (0) @@ -848,10 +867,19 @@ extern enum cmp_type hppa_branch_type; tree tree_type = TREE_TYPE (DECL); \ tree parm; \ int i; \ - if (TREE_PUBLIC (DECL)) \ + if (TREE_PUBLIC (DECL) || TARGET_GAS) \ { extern int current_function_varargs; \ - fputs ("\t.EXPORT ", FILE); assemble_name (FILE, NAME); \ - fputs (",ENTRY,PRIV_LEV=3", FILE); \ + if (TREE_PUBLIC (DECL)) \ + { \ + fputs ("\t.EXPORT ", FILE); \ + assemble_name (FILE, NAME); \ + fputs (",ENTRY,PRIV_LEV=3", FILE); \ + } \ + else \ + { \ + fputs ("\t.PARAM ", FILE); \ + assemble_name (FILE, NAME); \ + } \ for (parm = DECL_ARGUMENTS (DECL), i = 0; parm && i < 4; \ parm = TREE_CHAIN (parm)) \ { \ @@ -978,13 +1006,19 @@ extern union tree_node *current_function flush multiple lines in the cache. */ #define TRAMPOLINE_TEMPLATE(FILE) \ -{ \ - fprintf (FILE, "\tldw 12(0,%%r22),%%r21\n"); \ - fprintf (FILE, "\tbe 0(4,%%r21)\n"); \ - fprintf (FILE, "\tldw 16(0,%%r22),%%r29\n"); \ - fprintf (FILE, "\t.word 0\n"); \ - fprintf (FILE, "\t.word 0\n"); \ -} + { \ + fprintf (FILE, "\tldw 36(0,%%r22),%%r21\n"); \ + fprintf (FILE, "\tbb,>=,n %%r21,30,.+16\n"); \ + fprintf (FILE, "\tdepi 0,31,2,%%r21\n"); \ + fprintf (FILE, "\tldw 4(0,%%r21),%%r19\n"); \ + fprintf (FILE, "\tldw 0(0,%%r21),%%r21\n"); \ + fprintf (FILE, "\tldsid (0,%%r21),%%r1\n"); \ + fprintf (FILE, "\tmtsp %%r1,%%sr0\n"); \ + fprintf (FILE, "\tbe 0(%%sr0,%%r21)\n"); \ + fprintf (FILE, "\tldw 40(0,%%r22),%%r29\n"); \ + fprintf (FILE, "\t.word 0\n"); \ + fprintf (FILE, "\t.word 0\n"); \ + } /* Length in units of the trampoline for entering a nested function. @@ -992,10 +1026,10 @@ extern union tree_node *current_function of the trampoline. This is necessary as the trampoline may cross two cache lines. - If the trampoline ever grows to > 32 bytes, then it will become - necessary to hack on the cacheflush pattern in pa.md. */ + If the code part of the trampoline ever grows to > 32 bytes, then it + will become necessary to hack on the cacheflush pattern in pa.md. */ -#define TRAMPOLINE_SIZE (5 * 4) +#define TRAMPOLINE_SIZE (11 * 4) /* Emit RTL insns to initialize the variable parts of a trampoline. FNADDR is an RTX for the address of the function's pure code. @@ -1005,18 +1039,24 @@ extern union tree_node *current_function Move the static chain value to trampoline template at offset 16. */ #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ -{ \ - rtx start_addr, end_addr, mem; \ - \ - start_addr = memory_address (Pmode, plus_constant ((TRAMP), 12));\ - emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (FNADDR)); \ - start_addr = memory_address (Pmode, plus_constant ((TRAMP), 16));\ - emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (CXT)); \ - /* fdc and fic only use registers for the address to flush, \ - they do not accept integer displacements. */ \ - start_addr = force_reg (SImode, (TRAMP)); \ - end_addr = force_reg (SImode, plus_constant ((TRAMP), 8)); \ - emit_insn (gen_cacheflush (start_addr, end_addr)); \ +{ \ + rtx start_addr, end_addr, masked_start_addr; \ + \ + start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \ + emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (FNADDR)); \ + start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \ + emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (CXT)); \ + /* fdc and fic only use registers for the address to flush, \ + they do not accept integer displacements. */ \ + start_addr = force_reg (SImode, (TRAMP)); \ + end_addr = force_reg (SImode, plus_constant ((TRAMP), 32)); \ + emit_insn (gen_dcacheflush (start_addr, end_addr)); \ + masked_start_addr = gen_reg_rtx (SImode); \ + emit_insn (gen_andsi3 (masked_start_addr, start_addr, \ + GEN_INT (0x3fffffff))); \ + end_addr = force_reg (SImode, plus_constant (masked_start_addr, 32)); \ + emit_insn (gen_icacheflush (masked_start_addr, end_addr, start_addr, \ + gen_reg_rtx (SImode), gen_reg_rtx (SImode)));\ } /* Emit code for a call to builtin_saveregs. We must emit USE insns which @@ -1112,7 +1152,7 @@ extern union tree_node *current_function `R' is unused. - `S' handles constraints for calls. + `S' is unused. `T' is for fp loads and stores. */ #define EXTRA_CONSTRAINT(OP, C) \ @@ -1127,15 +1167,7 @@ extern union tree_node *current_function (GET_CODE (OP) == MEM \ /* Using DFmode forces only short displacements \ to be recognized as valid in reg+d addresses. */\ - && memory_address_p (DFmode, XEXP (OP, 0))) \ - : ((C) == 'S' ? \ - ((CONSTANT_P (OP) && ! TARGET_LONG_CALLS) \ - || (reload_in_progress \ - ? strict_memory_address_p (Pmode, OP) \ - : memory_address_p (Pmode, OP)) \ - || (reload_in_progress \ - && GET_CODE (OP) == REG \ - && reg_renumber[REGNO (OP)] > 0)) : 0))) + && memory_address_p (DFmode, XEXP (OP, 0))) : 0)) /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check its validity for a certain class. @@ -1332,7 +1364,7 @@ while (0) /* Specify the machine mode that this machine uses for the index in the tablejump instruction. */ -#define CASE_VECTOR_MODE SImode +#define CASE_VECTOR_MODE DImode /* Define this if the tablejump instruction expects the table to contain offsets from the address of the table. @@ -1353,9 +1385,15 @@ while (0) in one reasonably fast instruction. */ #define MOVE_MAX 8 -/* Define if normal loads of shorter-than-word items from memory clears - the rest of the bigs in the register. */ -#define BYTE_LOADS_ZERO_EXTEND +/* Define if operations between registers always perform the operation + on the full register even if a narrower mode is specified. */ +#define WORD_REGISTER_OPERATIONS + +/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD + will either zero-extend or sign-extend. The value of this macro should + be the code that says which one of the two operations is implicitly + done, NIL if none. */ +#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND /* Nonzero if access to memory by bytes is slow and undesirable. */ #define SLOW_BYTE_ACCESS 1 @@ -1407,9 +1445,9 @@ while (0) but a CALL with constant address is cheap. */ #define NO_FUNCTION_CSE -/* Define this if shift instructions ignore all but the low-order +/* Define this to be nonzero if shift instructions ignore all but the low-order few bits. */ -#define SHIFT_COUNT_TRUNCATED +#define SHIFT_COUNT_TRUNCATED 1 /* Use atexit for static constructors/destructors, instead of defining our own exit function. */ @@ -1443,14 +1481,15 @@ while (0) /* Compute extra cost of moving data between one register class and another. - Make moves from SAR so expensive they should never happen. + Make moves from SAR so expensive they should never happen. We used to + have 0xffff here, but that generates overflow in rare cases. Copies involving a FP register and a non-FP register are relatively expensive because they must go through memory. Other copies are reasonably cheap. */ #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ - (CLASS1 == SHIFT_REGS ? 0xffff \ + (CLASS1 == SHIFT_REGS ? 0x100 \ : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \ : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \ : 2) @@ -1532,6 +1571,8 @@ do { fprintf (FILE, "\t.SPACE $PRIVATE$\ \t.IMPORT $$dyncall,MILLICODE\n");\ if (profile_flag)\ fprintf (FILE, "\t.IMPORT _mcount, CODE\n");\ + if (write_symbols != NO_DEBUG) \ + output_file_directive ((FILE), main_input_filename); \ } while (0) /* Output to assembler file text saying following lines @@ -1552,6 +1593,25 @@ do { fprintf (FILE, "\t.SPACE $PRIVATE$\ /* Supposedly the assembler rejects the command if there is no tab! */ #define TEXT_SECTION_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $CODE$\n" +/* Output before read-only data. */ + +/* Supposedly the assembler rejects the command if there is no tab! */ +#define READONLY_DATA_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $LIT$\n" + +#if 0 +/* This has apparently triggered a latent GAS bug which manifests itself + as numerous warnings from the debugger of the form: + + During symbol reading, inner block not inside outer block in ... + inner block not inside outer block in ... + + Or as local variables not being accessable from the debugger. + + Disable $LIT$ for now. Try it with GAS-2 when it is functional (I + am not even going to try to fix this in GAS-1). */ +#define READONLY_DATA_SECTION readonly_data +#endif + /* Output before writable data. */ /* Supposedly the assembler rejects the command if there is no tab! */ @@ -1563,7 +1623,7 @@ do { fprintf (FILE, "\t.SPACE $PRIVATE$\ /* Define the .bss section for ASM_OUTPUT_LOCAL to use. */ -#define EXTRA_SECTIONS in_bss +#define EXTRA_SECTIONS in_bss, in_readonly_data #define EXTRA_SECTION_FUNCTIONS \ void \ @@ -1574,6 +1634,15 @@ bss_section () \ fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \ in_section = in_bss; \ } \ +} \ +void \ +readonly_data () \ +{ \ + if (in_section != in_readonly_data) \ + { \ + fprintf (asm_out_file, "%s\n", READONLY_DATA_ASM_OP); \ + in_section = in_readonly_data; \ + } \ } @@ -1605,7 +1674,7 @@ bss_section () \ #define ASM_OUTPUT_LABEL(FILE, NAME) \ do { assemble_name (FILE, NAME); \ - if (TARGET_TRAILING_COLON) \ + if (TARGET_GAS) \ fputc (':', FILE); \ fputc ('\n', FILE); } while (0) @@ -1629,7 +1698,7 @@ bss_section () \ #define ASM_FILE_END(FILE) \ do { if (write_symbols == DBX_DEBUG)\ { fputs (TEXT_SECTION_ASM_OP, FILE);\ - fputs (".stabs \"end_file.\",4,0,0,Ltext_end\nLtext_end:\n",\ + fputs ("\t.stabs \"end_file.\",4,0,0,Ltext_end\nLtext_end:\n",\ (FILE));\ }\ } while (0) @@ -1662,7 +1731,7 @@ bss_section () \ #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ {fprintf (FILE, "%s$%04d", PREFIX, NUM); \ - if (TARGET_TRAILING_COLON) \ + if (TARGET_GAS) \ fputs (":\n", FILE); \ else \ fputs ("\n", FILE);} @@ -1696,8 +1765,7 @@ bss_section () \ #define ASM_OUTPUT_INT(FILE,VALUE) \ { fprintf (FILE, "\t.word "); \ - if (TARGET_SHARED_LIBS \ - && function_label_operand (VALUE, VOIDmode))\ + if (function_label_operand (VALUE, VOIDmode)) \ fprintf (FILE, "P%%"); \ output_addr_const (FILE, (VALUE)); \ fprintf (FILE, "\n");} @@ -1760,7 +1828,7 @@ bss_section () \ #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ { bss_section (); \ assemble_name ((FILE), (NAME)); \ - if (TARGET_TRAILING_COLON) \ + if (TARGET_GAS) \ fputc (':', (FILE)); \ fputs ("\t.comm ", (FILE)); \ fprintf ((FILE), "%d\n", (ROUNDED));} @@ -1772,7 +1840,7 @@ bss_section () \ { bss_section (); \ fprintf ((FILE), "\t.align %d\n", (SIZE) <= 4 ? 4 : 8); \ assemble_name ((FILE), (NAME)); \ - if (TARGET_TRAILING_COLON) \ + if (TARGET_GAS) \ fputc (':', (FILE)); \ fprintf ((FILE), "\n\t.block %d\n", (ROUNDED));} @@ -1864,7 +1932,10 @@ extern char *output_block_move (); extern char *output_scc_insn (); extern char *output_cbranch (); extern char *output_bb (); +extern char *output_dbra (); +extern char *output_movb (); extern char *output_return (); +extern char *output_call (); extern char *output_floatsisf2 (); extern char *output_floatsidf2 (); extern char *output_mul_insn ();