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1.1 root 1: /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2: Copyright (C) 1992, 1993 Free Software Foundation, Inc.
3: Contributed by Michael Tiemann ([email protected])
4: and Tim Moore ([email protected]) of the Center for
5: Software Science at the University of Utah.
6:
7: This file is part of GNU CC.
8:
9: GNU CC is free software; you can redistribute it and/or modify
10: it under the terms of the GNU General Public License as published by
11: the Free Software Foundation; either version 1, or (at your option)
12: any later version.
13:
14: GNU CC is distributed in the hope that it will be useful,
15: but WITHOUT ANY WARRANTY; without even the implied warranty of
16: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17: GNU General Public License for more details.
18:
19: You should have received a copy of the GNU General Public License
20: along with GNU CC; see the file COPYING. If not, write to
21: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22:
23: enum cmp_type /* comparison type */
24: {
25: CMP_SI, /* compare integers */
26: CMP_SF, /* compare single precision floats */
27: CMP_DF, /* compare double precision floats */
28: CMP_MAX /* max comparison type */
29: };
30:
31: /* Print subsidiary information on the compiler version in use. */
32:
33: #define TARGET_VERSION fprintf (stderr, " (hppa)");
34:
35: /* Run-time compilation parameters selecting different hardware subsets. */
36:
37: extern int target_flags;
38:
39: /* compile code for HP-PA 1.1 ("Snake") */
40:
41: #define TARGET_SNAKE (target_flags & 1)
42:
43: /* Disable all FP registers (they all become fixed). This may be necessary
44: for compiling kernels which perform lazy context switching of FP regs.
45: Note if you use this option and try to perform floating point operations
46: the compiler will abort! */
47:
48: #define TARGET_DISABLE_FPREGS (target_flags & 2)
49:
1.1.1.2 ! root 50: /* Allow unconditional jumps in the delay slots of call instructions. */
! 51: #define TARGET_JUMP_IN_DELAY (target_flags & 8)
1.1 root 52:
53: /* Force all function calls to indirect addressing via a register. This
54: avoids lossage when the function is very far away from the current PC.
55:
56: ??? What about simple jumps, they can suffer from the same problem.
57: Would require significant surgery in pa.md. */
58:
59: #define TARGET_LONG_CALLS (target_flags & 16)
60:
1.1.1.2 ! root 61: /* Disable indexed addressing modes. */
1.1 root 62:
63: #define TARGET_DISABLE_INDEXING (target_flags & 32)
64:
1.1.1.2 ! root 65: /* Emit directives only understood by GAS. This allows parameter
! 66: relocations to work for static functions. There is no way
! 67: to make them work the HP assembler at this time.
! 68:
! 69: Also forces a colon to be tacked onto the end of local and
! 70: global labes. */
1.1 root 71:
1.1.1.2 ! root 72: #define TARGET_GAS (target_flags & 128)
1.1 root 73:
74: /* Macro to define tables used to set the flags.
75: This is a list in braces of pairs in braces,
76: each pair being { "NAME", VALUE }
77: where VALUE is the bits to set or minus the bits to clear.
78: An empty string NAME is used to identify the default VALUE. */
79:
80: #define TARGET_SWITCHES \
1.1.1.2 ! root 81: {{"snake", 1}, \
! 82: {"nosnake", -1}, \
! 83: {"pa-risc-1-0", -1}, \
! 84: {"pa-risc-1-1", 1}, \
! 85: {"disable-fpregs", 2}, \
! 86: {"no-disable-fpregs", 2}, \
! 87: {"jump-in-delay", 8}, \
! 88: {"no-jump-in-delay", -8}, \
! 89: {"long-calls", 16}, \
! 90: {"no-long-calls", -16}, \
! 91: {"disable-indexing", 32}, \
! 92: {"no-disable-indexing", -32},\
! 93: {"gas", 128}, \
! 94: {"no-gas", -128}, \
1.1 root 95: { "", TARGET_DEFAULT}}
96:
97: #ifndef TARGET_DEFAULT
1.1.1.2 ! root 98: #define TARGET_DEFAULT 128 /* TARGET_GAS + TARGET_JUMP_IN_DELAY */
1.1 root 99: #endif
100:
101: #define DBX_DEBUGGING_INFO
1.1.1.2 ! root 102: #define DEFAULT_GDB_EXTENSIONS 1
! 103:
! 104: /* Only lables should ever begin in colunm zero. */
! 105: #define ASM_STABS_OP "\t.stabs"
! 106: #define ASM_STABN_OP "\t.stabn"
1.1 root 107:
108: #if (TARGET_DEFAULT & 1) == 0
109: #define CPP_SPEC "%{msnake:-D__hp9000s700 -D_PA_RISC1_1}\
110: %{mpa-risc-1-1:-D__hp9000s700 -D_PA_RISC1_1}"
111: #else
112: #define CPP_SPEC "%{!mpa-risc-1-0:%{!mnosnake:-D__hp9000s700 -D_PA_RISC1_1}}"
113: #endif
114:
115: /* Defines for a K&R CC */
116:
117: #define CC1_SPEC "%{pg:} %{p:}"
118:
119: #define LINK_SPEC "-u main"
120:
1.1.1.2 ! root 121: /* Allow $ in identifiers. */
! 122: #define DOLLARS_IN_IDENTIFIERS 2
! 123:
1.1 root 124: /* Make gcc agree with <machine/ansi.h> */
125:
126: #define SIZE_TYPE "unsigned int"
127: #define PTRDIFF_TYPE "int"
128: #define WCHAR_TYPE "short unsigned int"
129: #define WCHAR_TYPE_SIZE 16
130:
1.1.1.2 ! root 131: /* Sometimes certain combinations of command options do not make sense
! 132: on a particular target machine. You can define a macro
! 133: `OVERRIDE_OPTIONS' to take account of this. This macro, if
! 134: defined, is executed once just after all the command options have
! 135: been parsed.
! 136:
! 137: On the PA, it is used to explicitly warn the user that -fpic and -fPIC
! 138: do not work. */
! 139:
! 140: #define OVERRIDE_OPTIONS \
! 141: { \
! 142: if (flag_pic != 0) \
! 143: warning ("-fpic and -fPIC are not supported on the PA."); \
! 144: }
! 145:
1.1 root 146: /* Omit frame pointer at high optimization levels. */
147:
148: #define OPTIMIZATION_OPTIONS(OPTIMIZE) \
149: { \
150: if (OPTIMIZE >= 2) \
151: flag_omit_frame_pointer = 1; \
152: }
153:
154: /* Names to predefine in the preprocessor for this target machine. */
155:
1.1.1.2 ! root 156: #define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -D_HPUX_SOURCE -Dhp9000 -Dhp800 -Dspectrum -DREVARGV -Asystem(unix) -Asystem(bsd) -Acpu(hppa) -Amachine(hppa)"
1.1 root 157:
158: /* target machine storage layout */
159:
160: /* Define this if most significant bit is lowest numbered
161: in instructions that operate on numbered bit-fields. */
162: #define BITS_BIG_ENDIAN 1
163:
164: /* Define this if most significant byte of a word is the lowest numbered. */
165: /* That is true on the HP-PA. */
166: #define BYTES_BIG_ENDIAN 1
167:
168: /* Define this if most significant word of a multiword number is lowest
169: numbered. */
170: /* For the HP-PA we can decide arbitrarily
171: since there are no machine instructions for them. */
172: #define WORDS_BIG_ENDIAN 1
173:
174: /* number of bits in an addressable storage unit */
175: #define BITS_PER_UNIT 8
176:
177: /* Width in bits of a "word", which is the contents of a machine register.
178: Note that this is not necessarily the width of data type `int';
179: if using 16-bit ints on a 68000, this would still be 32.
180: But on a machine with 16-bit registers, this would be 16. */
181: #define BITS_PER_WORD 32
182:
183: /* Width of a word, in units (bytes). */
184: #define UNITS_PER_WORD 4
185:
186: /* Width in bits of a pointer.
187: See also the macro `Pmode' defined below. */
188: #define POINTER_SIZE 32
189:
190: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
191: #define PARM_BOUNDARY 32
192:
193: /* Largest alignment required for any stack parameter, in bits.
194: Don't define this if it is equal to PARM_BOUNDARY */
195: #define MAX_PARM_BOUNDARY 64
196:
197: /* Boundary (in *bits*) on which stack pointer should be aligned. */
1.1.1.2 ! root 198: #define STACK_BOUNDARY 512
1.1 root 199:
200: /* Allocation boundary (in *bits*) for the code of a function. */
201: #define FUNCTION_BOUNDARY 32
202:
203: /* Alignment of field after `int : 0' in a structure. */
204: #define EMPTY_FIELD_BOUNDARY 32
205:
206: /* Every structure's size must be a multiple of this. */
207: #define STRUCTURE_SIZE_BOUNDARY 8
208:
209: /* A bitfield declared as `int' forces `int' alignment for the struct. */
210: #define PCC_BITFIELD_TYPE_MATTERS 1
211:
212: /* No data type wants to be aligned rounder than this. */
213: #define BIGGEST_ALIGNMENT 64
214:
215: /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
216: #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
217: ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
218:
219: /* Make arrays of chars word-aligned for the same reasons. */
220: #define DATA_ALIGNMENT(TYPE, ALIGN) \
221: (TREE_CODE (TYPE) == ARRAY_TYPE \
222: && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
223: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
224:
225:
226: /* Set this nonzero if move instructions will actually fail to work
227: when given unaligned data. */
228: #define STRICT_ALIGNMENT 1
229:
230: /* Generate calls to memcpy, memcmp and memset. */
231: #define TARGET_MEM_FUNCTIONS
232:
233: /* Standard register usage. */
234:
235: /* Number of actual hardware registers.
236: The hardware registers are assigned numbers for the compiler
237: from 0 to just below FIRST_PSEUDO_REGISTER.
238: All registers that the compiler knows about must be given numbers,
239: even those that are not normally considered general registers.
240:
241: HP-PA 1.0 has 32 fullword registers and 16 floating point
242: registers. The floating point registers hold either word or double
243: word values.
244:
245: 16 additional registers are reserved.
246:
247: HP-PA 1.1 has 32 fullword registers and 32 floating point
248: registers. However, the floating point registers behave
249: differently: the left and right halves of registers are addressable
250: as 32 bit registers. So, we will set things up like the 68k which
251: has different fp units: define separate register sets for the 1.0
252: and 1.1 fp units. */
253:
254: #define FIRST_PSEUDO_REGISTER 101 /* 32 + 12 1.0 regs + 56 1.1 regs + */
255: /* 1 shift reg */
256:
257: /* 1 for registers that have pervasive standard uses
258: and are not available for the register allocator.
259:
260: On the HP-PA, these are:
261: Reg 0 = 0 (hardware). However, 0 is used for condition code,
262: so is not fixed.
263: Reg 1 = ADDIL target/Temporary (hardware).
264: Reg 2 = Return Pointer
265: Reg 3 = Preserved Register (Gnu). Frame Pointer (> 8k frames HP.)
266: Reg 4 = Frame Pointer (Gnu)
267: Reg 5-18 = Preserved Registers
268: Reg 19 = Linkage Table Register in HPUX 8.0 shared library scheme.
269: Reg 20-22 = Temporary Registers
270: Reg 23-26 = Temporary/Parameter Registers
271: Reg 27 = Global Data Pointer (hp)
272: Reg 28 = Temporary/???/Return Value register
273: Reg 29 = Temporary/Static Chain/Return Value register
274: Reg 30 = stack pointer
275: Reg 31 = Temporary/Millicode Return Pointer (hp)
276:
277: Freg 0-3 = Status Registers -- Not known to the compiler.
278: Freg 4-7 = Arguments/Return Value
279: Freg 8-11 = Temporary Registers
280: Freg 12-15 = Preserved Registers
281:
282: Freg 16-31 = Reserved
283:
284: On the Snake, fp regs are
285:
286: Freg 0-3 = Status Registers -- Not known to the compiler.
287: Freg 4L-7R = Arguments/Return Value
288: Freg 8L-11R = Temporary Registers
289: Freg 12L-21R = Preserved Registers
290: Freg 22L-31R = Temporary Registers
291:
292:
293: */
294:
295: #define FIXED_REGISTERS \
296: {0, 0, 0, 0, 0, 0, 0, 0, \
297: 0, 0, 0, 0, 0, 0, 0, 0, \
298: 0, 0, 0, 0, 0, 0, 0, 0, \
299: 0, 0, 0, 1, 0, 0, 1, 0, \
300: /* 1.0 fp registers */ \
301: 0, 0, 0, 0, \
302: 0, 0, 0, 0, 0, 0, 0, 0, \
303: /* 1.1 fp registers */ \
304: 0, 0, 0, 0, 0, 0, 0, 0, \
305: 0, 0, 0, 0, 0, 0, 0, 0, \
306: 0, 0, 0, 0, 0, 0, 0, 0, \
307: 0, 0, 0, 0, 0, 0, 0, 0, \
308: 0, 0, 0, 0, 0, 0, 0, 0, \
309: 0, 0, 0, 0, 0, 0, 0, 0, \
310: 0, 0, 0, 0, 0, 0, 0, 0, \
311: 0}
312:
313: /* 1 for registers not available across function calls.
314: These must include the FIXED_REGISTERS and also any
315: registers that can be used without being saved.
316: The latter must include the registers where values are returned
317: and the register where structure-value addresses are passed.
318: Aside from that, you can include as many other registers as you like. */
319: #define CALL_USED_REGISTERS \
320: {1, 1, 1, 0, 0, 0, 0, 0, \
321: 0, 0, 0, 0, 0, 0, 0, 0, \
322: 0, 0, 0, 1, 1, 1, 1, 1, \
323: 1, 1, 1, 1, 1, 1, 1, 1, \
324: /* 1.0 fp registers */ \
325: 1, 1, 1, 1, \
326: 1, 1, 1, 1, 0, 0, 0, 0, \
327: /* 1.1 fp registers */ \
328: 1, 1, 1, 1, 1, 1, 1, 1, \
329: 1, 1, 1, 1, 1, 1, 1, 1, \
330: 0, 0, 0, 0, 0, 0, 0, 0, \
331: 0, 0, 0, 0, 0, 0, 0, 0, \
332: 0, 0, 0, 0, 1, 1, 1, 1, \
333: 1, 1, 1, 1, 1, 1, 1, 1, \
334: 1, 1, 1, 1, 1, 1, 1, 1, \
335: 1}
336:
337: /* Make sure everything's fine if we *don't* have a given processor.
338: This assumes that putting a register in fixed_regs will keep the
339: compiler's mitts completely off it. We don't bother to zero it out
340: of register classes. */
341:
342: #define CONDITIONAL_REGISTER_USAGE \
343: { \
344: int i; \
345: HARD_REG_SET x; \
346: if (!TARGET_SNAKE) \
347: { \
348: COPY_HARD_REG_SET (x, reg_class_contents[(int)SNAKE_FP_REGS]);\
349: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
350: if (TEST_HARD_REG_BIT (x, i)) \
351: fixed_regs[i] = call_used_regs[i] = 1; \
352: } \
353: else if (TARGET_DISABLE_FPREGS) \
354: { \
355: COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]);\
356: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
357: if (TEST_HARD_REG_BIT (x, i)) \
358: fixed_regs[i] = call_used_regs[i] = 1; \
359: COPY_HARD_REG_SET (x, reg_class_contents[(int)SNAKE_FP_REGS]);\
360: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
361: if (TEST_HARD_REG_BIT (x, i)) \
362: fixed_regs[i] = call_used_regs[i] = 1; \
363: } \
364: else \
365: { \
366: COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]); \
367: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
368: if (TEST_HARD_REG_BIT (x, i)) \
369: fixed_regs[i] = call_used_regs[i] = 1; \
370: } \
371: if (flag_pic) \
372: fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
373: }
374:
375: /* Allocated the call used registers first. This should minimize
376: the number of registers that need to be saved (as call used
377: registers will generally not be allocated across a call).
378:
379: Experimentation has shown slightly better results by allocating
380: FP registers first. */
381:
382: #define REG_ALLOC_ORDER \
383: /* 1.0 caller-saved fp regs. */ \
384: {36, 37, 38, 39, 32, 33, 34, 35, \
385: /* 1.1 caller-saved fp regs. */ \
386: 52, 53, 54, 55, 56, 57, 58, 59, \
387: 80, 81, 82, 83, 84, 85, 86, 87, \
388: 88, 89, 90, 91, 92, 93, 94, 95, \
389: 96, 97, 98, 99, \
390: 44, 45, 46, 47, 48, 49, 50, 51, \
391: /* caller-saved general regs. */ \
392: 19, 20, 21, 22, 23, 24, 25, 26, \
393: 27, 28, 29, 31, 2, \
394: /* 1.0 callee-saved fp regs. */ \
395: 40, 41, 42, 43, \
396: /* 1.1 callee-saved fp regs. */ \
397: 60, 61, 62, 63, 64, 65, 66, 67, \
398: 68, 69, 70, 71, 72, 73, 74, 75, \
399: 76, 77, 78, 79, \
400: /* callee-saved general regs. */ \
401: 3, 4, 5, 6, 7, 8, 9, 10, \
402: 11, 12, 13, 14, 15, 16, 17, 18, \
403: /* special registers. */ \
404: 1, 30, 0, 100}
405:
406:
407: /* Return number of consecutive hard regs needed starting at reg REGNO
408: to hold something of mode MODE.
409: This is ordinarily the length in words of a value of mode MODE
410: but can be less for certain modes in special long registers.
411:
412: On the HP-PA, ordinary registers hold 32 bits worth;
413: The floating point registers are 64 bits wide. Snake fp regs are 32
414: bits wide */
415: #define HARD_REGNO_NREGS(REGNO, MODE) \
416: (((REGNO) < 32 || (REGNO) >= 44) \
417: ? ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) : 1)
418:
419: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
420: On the HP-PA, the cpu registers can hold any mode. We
421: force this to be an even register is it cannot hold the full mode. */
422: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
423: ((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
424: : (REGNO) < 32 ? ((GET_MODE_SIZE (MODE) <= 4) ? 1 : ((REGNO) & 1) == 0)\
425: : (REGNO) < 44 ? (GET_MODE_SIZE (MODE) <= 4 \
426: || (GET_MODE_SIZE (MODE) > 4 \
427: && GET_MODE_CLASS (MODE) == MODE_FLOAT)) \
428: : (GET_MODE_SIZE (MODE) > 4 ? ((REGNO) & 1) == 0 \
429: : 1))
430:
431: /* Value is 1 if it is a good idea to tie two pseudo registers
432: when one has mode MODE1 and one has mode MODE2.
433: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
434: for any hard reg, then this must be 0 for correct output. */
435: #define MODES_TIEABLE_P(MODE1, MODE2) \
436: (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
437:
438: /* Specify the registers used for certain standard purposes.
439: The values of these macros are register numbers. */
440:
441: /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
442: /* #define PC_REGNUM */
443:
444: /* Register to use for pushing function arguments. */
445: #define STACK_POINTER_REGNUM 30
446:
447: /* Base register for access to local variables of the function. */
448: #define FRAME_POINTER_REGNUM 4
449:
450: /* Value should be nonzero if functions must have frame pointers. */
451: #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
452:
453:
454: /* C statement to store the difference between the frame pointer
455: and the stack pointer values immediately after the function prologue.
456:
457: Note, we always pretend that this is a leaf function because if
458: it's not, there's no point in trying to eliminate the
459: frame pointer. If it is a leaf function, we guessed right! */
460: #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
461: do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
462:
463: /* Base register for access to arguments of the function. */
464: #define ARG_POINTER_REGNUM 4
465:
466: /* Register in which static-chain is passed to a function. */
467: /* ??? */
468: #define STATIC_CHAIN_REGNUM 29
469:
470: /* Register which holds offset table for position-independent
471: data references. */
472:
473: #define PIC_OFFSET_TABLE_REGNUM 19
474:
475: #define INITIALIZE_PIC initialize_pic ()
476: #define FINALIZE_PIC finalize_pic ()
477:
1.1.1.2 ! root 478: /* SOM ABI says that objects larger than 64 bits are returned in memory. */
! 479: #define RETURN_IN_MEMORY(TYPE) \
! 480: (TYPE_MODE (TYPE) == BLKmode || int_size_in_bytes (TYPE) > 8)
! 481:
1.1 root 482: /* Register in which address to store a structure value
483: is passed to a function. */
484: #define STRUCT_VALUE_REGNUM 28
485:
486: /* Define the classes of registers for register constraints in the
487: machine description. Also define ranges of constants.
488:
489: One of the classes must always be named ALL_REGS and include all hard regs.
490: If there is more than one class, another class must be named NO_REGS
491: and contain no registers.
492:
493: The name GENERAL_REGS must be the name of a class (or an alias for
494: another name such as ALL_REGS). This is the class of registers
495: that is allowed by "g" or "r" in a register constraint.
496: Also, registers outside this class are allocated only when
497: instructions express preferences for them.
498:
499: The classes must be numbered in nondecreasing order; that is,
500: a larger-numbered class must never be contained completely
501: in a smaller-numbered class.
502:
503: For any two classes, it is very desirable that there be another
504: class that represents their union. */
505:
506: /* The HP-PA has four kinds of registers: general regs, 1.0 fp regs,
507: 1.1 fp regs, and the high 1.1 fp regs, to which the operands of
508: fmpyadd and fmpysub are restricted.
509:
510: FP_OR_SNAKE_FP_REGS is for reload_{in,out}di only and isn't used
511: anywhere else. */
512:
513: enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, GENERAL_OR_FP_REGS,
514: HI_SNAKE_FP_REGS, SNAKE_FP_REGS, GENERAL_OR_SNAKE_FP_REGS,
515: FP_OR_SNAKE_FP_REGS, NON_SHIFT_REGS, SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES};
516:
517: #define N_REG_CLASSES (int) LIM_REG_CLASSES
518:
519: /* Give names of register classes as strings for dump file. */
520:
521: #define REG_CLASS_NAMES \
522: { "NO_REGS", "R1_REGS", "GENERAL_REGS", "FP_REGS", "GENERAL_OR_FP_REGS",\
523: "HI_SNAKE_FP_REGS", "SNAKE_FP_REGS", "GENERAL_OR_SNAKE_FP_REGS",\
524: "FP_OR_SNAKE_FP_REGS", "NON_SHIFT_REGS", "SHIFT_REGS", "ALL_REGS"}
525:
526: /* Define which registers fit in which classes.
527: This is an initializer for a vector of HARD_REG_SET
528: of length N_REG_CLASSES. Register 0, the "condition code" register,
529: is in no class. */
530:
531: #define REG_CLASS_CONTENTS \
532: { {0, 0, 0, 0}, /* NO_REGS */ \
533: {0x2, 0, 0, 0}, /* R1_REGS */ \
534: {-2, 0, 0, 0}, /* GENERAL_REGS */ \
535: {0, 0xfff, 0, 0}, /* FP_REGS */ \
536: {-2, 0xfff, 0, 0}, /* GENERAL_OR_FP_REGS */\
537: {0, 0, 0xfffffff0, 0xf}, /* HI_SNAKE_FP_REGS */ \
538: {0, 0xfffff000, ~0, 0xf}, /* SNAKE_FP_REGS */ \
539: {-2, 0xfffff000, ~0, 0xf}, /* GENERAL_OR_SNAKE_FP_REGS */\
540: {0, ~0, ~0, 0xf}, /* FP_OR_SNAKE_FP_REGS */\
541: {-2, ~0, ~0, ~0x10}, /* NON_SHIFT_REGS */ \
542: {0, 0, 0, 0x10}, /* SHIFT_REGS */ \
543: {-2, ~0, ~0, 0x1f}} /* ALL_REGS */
544:
545: /* The same information, inverted:
546: Return the class number of the smallest class containing
547: reg number REGNO. This could be a conditional expression
548: or could index an array. */
549:
550: #define REGNO_REG_CLASS(REGNO) \
551: ((REGNO) == 0 ? NO_REGS \
552: : (REGNO) == 1 ? R1_REGS \
553: : (REGNO) < 32 ? GENERAL_REGS \
554: : (REGNO) < 44 ? FP_REGS \
555: : (REGNO) < 68 ? SNAKE_FP_REGS \
556: : (REGNO) < 100 ? HI_SNAKE_FP_REGS \
557: : SHIFT_REGS)
558:
559: /* The class value for index registers, and the one for base regs. */
560: #define INDEX_REG_CLASS GENERAL_REGS
561: #define BASE_REG_CLASS GENERAL_REGS
562:
563: #define FP_REG_CLASS_P(CLASS) \
564: (CLASS == FP_REGS || CLASS == SNAKE_FP_REGS || CLASS == HI_SNAKE_FP_REGS)
565:
566: /* Get reg_class from a letter such as appears in the machine description.
567: Note 'Z' is not the same as 'r' since SHIFT_REGS is not part of
568: GENERAL_REGS. */
569:
570: #define REG_CLASS_FROM_LETTER(C) \
571: ((C) == 'f' ? (!TARGET_SNAKE ? FP_REGS : NO_REGS) : \
572: ((C) == 'x' ? (TARGET_SNAKE ? SNAKE_FP_REGS : NO_REGS) : \
573: ((C) == 'y' ? (TARGET_SNAKE ? HI_SNAKE_FP_REGS : NO_REGS) : \
574: ((C) == 'q' ? SHIFT_REGS : \
575: ((C) == 'a' ? R1_REGS : \
576: ((C) == 'z' ? FP_OR_SNAKE_FP_REGS : \
577: ((C) == 'Z' ? ALL_REGS : NO_REGS)))))))
578:
579: /* The letters I, J, K, L and M in a register constraint string
580: can be used to stand for particular ranges of immediate operands.
581: This macro defines what the ranges are.
582: C is the letter, and VALUE is a constant value.
583: Return 1 if VALUE is in the range specified by C.
584:
585: `I' is used for the 11 bit constants.
586: `J' is used for the 14 bit constants.
587: `K' is used for values that can be moved with a zdepi insn.
588: `L' is used for the 5 bit constants.
589: `M' is used for 0.
590: `N' is used for values with the least significant 11 bits equal to zero.
591: `O' is used for numbers n such that n+1 is a power of 2.
592: */
593:
594: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
595: ((C) == 'I' ? VAL_11_BITS_P (VALUE) \
596: : (C) == 'J' ? VAL_14_BITS_P (VALUE) \
597: : (C) == 'K' ? zdepi_cint_p (VALUE) \
598: : (C) == 'L' ? VAL_5_BITS_P (VALUE) \
599: : (C) == 'M' ? (VALUE) == 0 \
600: : (C) == 'N' ? ((VALUE) & 0x7ff) == 0 \
601: : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \
602: : (C) == 'P' ? and_mask_p (VALUE) \
603: : 0)
604:
605: /* Similar, but for floating or large integer constants, and defining letters
606: G and H. Here VALUE is the CONST_DOUBLE rtx itself.
607:
608: For PA, `G' is the floating-point constant zero. `H' is undefined. */
609:
610: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
611: ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
612: && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
613: : 0)
614:
615: /* Given an rtx X being reloaded into a reg required to be
616: in class CLASS, return the class of reg to actually use.
617: In general this is just CLASS; but on some machines
618: in some cases it is preferable to use a more restrictive class. */
619: #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
620:
621: /* Return the register class of a scratch register needed to copy IN into
622: or out of a register in CLASS in MODE. If it can be done directly,
623: NO_REGS is returned. */
624:
625: #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
626: secondary_reload_class (CLASS, MODE, IN)
627:
628: /* On the PA it is not possible to directly move data between
629: GENERAL_REGS and FP_REGS. */
630: #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
631: ((FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2)) \
632: || (! FP_REG_CLASS_P (CLASS1) && FP_REG_CLASS_P (CLASS2)))
633:
634: /* Return the stack location to use for secondary memory needed reloads. */
635: #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \
636: gen_rtx (MEM, MODE, gen_rtx (PLUS, Pmode, stack_pointer_rtx, GEN_INT (-16)))
637:
638: /* Return the maximum number of consecutive registers
639: needed to represent mode MODE in a register of class CLASS. */
640: #define CLASS_MAX_NREGS(CLASS, MODE) \
641: ((CLASS) == FP_REGS ? 1 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
642:
643: /* Stack layout; function entry, exit and calling. */
644:
645: /* Define this if pushing a word on the stack
646: makes the stack pointer a smaller address. */
647: /* #define STACK_GROWS_DOWNWARD */
648:
649: /* Believe it or not. */
650: #define ARGS_GROW_DOWNWARD
651:
652: /* Define this if the nominal address of the stack frame
653: is at the high-address end of the local variables;
654: that is, each additional local variable allocated
655: goes at a more negative offset in the frame. */
656: /* #define FRAME_GROWS_DOWNWARD */
657:
658: /* Offset within stack frame to start allocating local variables at.
659: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
660: first local allocated. Otherwise, it is the offset to the BEGINNING
661: of the first local allocated. */
662: #define STARTING_FRAME_OFFSET 8
663:
664: /* If we generate an insn to push BYTES bytes,
665: this says how many the stack pointer really advances by.
666: On the HP-PA, don't define this because there are no push insns. */
667: /* #define PUSH_ROUNDING(BYTES) */
668:
669: /* Offset of first parameter from the argument pointer register value.
670: This value will be negated because the arguments grow down.
671: Also note that on STACK_GROWS_UPWARD machines (such as this one)
672: this is the distance from the frame pointer to the end of the first
673: argument, not it's beginning. To get the real offset of the first
674: argument, the size of the argument must be added.
675:
676: ??? Have to check on this.*/
677:
678: #define FIRST_PARM_OFFSET(FNDECL) -32
679:
680: /* Absolute value of offset from top-of-stack address to location to store the
681: function parameter if it can't go in a register.
682: Addresses for following parameters are computed relative to this one. */
683: #define FIRST_PARM_CALLER_OFFSET(FNDECL) -32
684:
685:
686: /* When a parameter is passed in a register, stack space is still
687: allocated for it. */
688: #define REG_PARM_STACK_SPACE(DECL) 16
689:
690: /* Define this if the above stack space is to be considered part of the
691: space allocated by the caller. */
692: #define OUTGOING_REG_PARM_STACK_SPACE
693:
694: /* Keep the stack pointer constant throughout the function.
695: This is both an optimization and a necessity: longjmp
696: doesn't behave itself when the stack pointer moves within
697: the function! */
698: #define ACCUMULATE_OUTGOING_ARGS
699:
700: /* The weird HPPA calling conventions require a minimum of 48 bytes on
701: the stack: 16 bytes for register saves, and 32 bytes for magic.
702: This is the difference between the logical top of stack and the
703: actual sp. */
704: #define STACK_POINTER_OFFSET -32
705:
706: #define STACK_DYNAMIC_OFFSET(FNDECL) \
707: ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size)
708:
709: /* Value is 1 if returning from a function call automatically
710: pops the arguments described by the number-of-args field in the call.
711: FUNTYPE is the data type of the function (as a tree),
712: or for a library call it is an identifier node for the subroutine name. */
713:
714: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
715:
716: /* Define how to find the value returned by a function.
717: VALTYPE is the data type of the value (as a tree).
718: If the precise function being called is known, FUNC is its FUNCTION_DECL;
719: otherwise, FUNC is 0. */
720:
721: /* On the HP-PA the value is found in register(s) 28(-29), unless
722: the mode is SF or DF. Then the value is returned in fr4 (32, ) */
723:
724:
725: #define FUNCTION_VALUE(VALTYPE, FUNC) \
726: gen_rtx (REG, TYPE_MODE (VALTYPE), ((TYPE_MODE (VALTYPE) == SFmode ||\
727: TYPE_MODE (VALTYPE) == DFmode) ? \
728: (TARGET_SNAKE ? 44 : 32) : 28))
729:
730: /* Define how to find the value returned by a library function
731: assuming the value has mode MODE. */
732:
733: #define LIBCALL_VALUE(MODE) \
734: gen_rtx (REG, MODE, (MODE == SFmode || MODE == DFmode ?\
735: (TARGET_SNAKE ? 44 : 32) : 28))
736:
737: /* 1 if N is a possible register number for a function value
738: as seen by the caller. */
739:
740: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 28 || (N) == (TARGET_SNAKE ? 44 : 32))
741:
742: /* 1 if N is a possible register number for function argument passing. */
743:
744: #define FUNCTION_ARG_REGNO_P(N) \
745: (((N) >= 23 && (N) <= 26) \
746: || ((N) >= 32 && (N) <= 35 && ! TARGET_SNAKE) \
747: || ((N) >= 44 && (N) <= 51 && TARGET_SNAKE))
748:
749: /* Define a data type for recording info about an argument list
750: during the scan of that argument list. This data type should
751: hold all necessary information about the function itself
752: and about the args processed so far, enough to enable macros
753: such as FUNCTION_ARG to determine where the next arg should go.
754:
755: On the HP-PA, this is a single integer, which is a number of words
756: of arguments scanned so far (including the invisible argument,
757: if any, which holds the structure-value-address).
758: Thus 4 or more means all following args should go on the stack. */
759:
760: #define CUMULATIVE_ARGS int
761:
762: /* Initialize a variable CUM of type CUMULATIVE_ARGS
763: for a call to a function whose data type is FNTYPE.
764: For a library call, FNTYPE is 0.
765: */
766:
767: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) ((CUM) = 0)
768:
769: /* Figure out the size in words of the function argument. */
770:
771: #define FUNCTION_ARG_SIZE(MODE, TYPE) \
772: ((((MODE) != BLKmode ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE))+3)/4)
773:
774: /* Update the data in CUM to advance over an argument
775: of mode MODE and data type TYPE.
776: (TYPE is null for libcalls where that information may not be available.) */
777:
778: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
779: (((((CUM) & 01) && (TYPE) != 0 && FUNCTION_ARG_SIZE(MODE, TYPE) > 1)\
780: && (CUM)++), (CUM) += FUNCTION_ARG_SIZE(MODE, TYPE))
781:
782: /* Determine where to put an argument to a function.
783: Value is zero to push the argument on the stack,
784: or a hard register in which to store the argument.
785:
786: MODE is the argument's machine mode.
787: TYPE is the data type of the argument (as a tree).
788: This is null for libcalls where that information may
789: not be available.
790: CUM is a variable of type CUMULATIVE_ARGS which gives info about
791: the preceding args and about the function being called.
792: NAMED is nonzero if this argument is a named parameter
793: (otherwise it is an extra parameter matching an ellipsis). */
794:
795: /* On the HP-PA the first four words of args are normally in registers
796: and the rest are pushed. But any arg that won't entirely fit in regs
797: is pushed.
798:
799: Arguments passed in registers are either 1 or 2 words long.
800:
801: The caller must make a distinction between calls to explicitly named
802: functions and calls through pointers to functions -- the conventions
803: are different! Calls through pointers to functions only use general
804: registers for the first four argument words. */
805:
806: #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
807:
808: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
809: (4 >= ((CUM) + FUNCTION_ARG_SIZE ((MODE), (TYPE))) \
810: ? gen_rtx (REG, (MODE), \
811: (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
1.1.1.2 ! root 812: ? ((! current_call_is_indirect \
1.1 root 813: && (MODE) == DFmode) \
814: ? ((CUM) ? (TARGET_SNAKE ? 50 : 35) \
815: : (TARGET_SNAKE ? 46 : 33)) \
816: : ((CUM) ? 23 : 25)) \
1.1.1.2 ! root 817: : ((! current_call_is_indirect \
1.1 root 818: && (MODE) == SFmode) \
819: ? (TARGET_SNAKE ? 44 + 2 * (CUM) : 32 + (CUM)) \
820: : (27 - (CUM) - FUNCTION_ARG_SIZE ((MODE), (TYPE))))))\
821: : 0)
822:
823: /* Define where a function finds its arguments.
824: This would be different from FUNCTION_ARG if we had register windows. */
825:
826: #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
827: FUNCTION_ARG (CUM, MODE, TYPE, NAMED)
828:
829: /* For an arg passed partly in registers and partly in memory,
830: this is the number of registers used.
831: For args passed entirely in registers or entirely in memory, zero. */
832:
833: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
834:
835: /* If defined, a C expression that gives the alignment boundary, in
836: bits, of an argument with the specified mode and type. If it is
837: not defined, `PARM_BOUNDARY' is used for all arguments. */
838:
839: #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
840: (((TYPE) != 0) \
1.1.1.2 ! root 841: ? (((int_size_in_bytes (TYPE)) + 3) / 4) * BITS_PER_WORD \
1.1 root 842: : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
843: ? PARM_BOUNDARY \
844: : GET_MODE_ALIGNMENT(MODE)))
845:
846: /* Arguments larger than eight bytes are passed by invisible reference */
847:
848: #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
849: ((TYPE) && int_size_in_bytes (TYPE) > 8)
850:
851: extern struct rtx_def *hppa_compare_op0, *hppa_compare_op1;
852: extern enum cmp_type hppa_branch_type;
853:
854: /* Output the label for a function definition. */
1.1.1.2 ! root 855: #ifndef HP_FP_ARG_DESCRIPTOR_REVERSED
1.1 root 856: #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
857: do { fprintf (FILE, ",ARGW%d=FR", (ARG0)); \
858: fprintf (FILE, ",ARGW%d=FU", (ARG1));} while (0)
859: #else
860: #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
861: do { fprintf (FILE, ",ARGW%d=FU", (ARG0)); \
862: fprintf (FILE, ",ARGW%d=FR", (ARG1));} while (0)
863: #endif
864:
865: #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
866: do { tree fntype = TREE_TYPE (TREE_TYPE (DECL)); \
867: tree tree_type = TREE_TYPE (DECL); \
868: tree parm; \
869: int i; \
1.1.1.2 ! root 870: if (TREE_PUBLIC (DECL) || TARGET_GAS) \
1.1 root 871: { extern int current_function_varargs; \
1.1.1.2 ! root 872: if (TREE_PUBLIC (DECL)) \
! 873: { \
! 874: fputs ("\t.EXPORT ", FILE); \
! 875: assemble_name (FILE, NAME); \
! 876: fputs (",ENTRY,PRIV_LEV=3", FILE); \
! 877: } \
! 878: else \
! 879: { \
! 880: fputs ("\t.PARAM ", FILE); \
! 881: assemble_name (FILE, NAME); \
! 882: } \
1.1 root 883: for (parm = DECL_ARGUMENTS (DECL), i = 0; parm && i < 4; \
884: parm = TREE_CHAIN (parm)) \
885: { \
886: if (TYPE_MODE (DECL_ARG_TYPE (parm)) == SFmode) \
887: fprintf (FILE, ",ARGW%d=FR", i++); \
888: else if (TYPE_MODE (DECL_ARG_TYPE (parm)) == DFmode) \
889: { \
890: if (i <= 2) \
891: { \
892: if (i == 1) i++; \
893: ASM_DOUBLE_ARG_DESCRIPTORS (FILE, i++, i++); \
894: } \
895: else \
896: break; \
897: } \
898: else \
899: { \
900: int arg_size = \
901: FUNCTION_ARG_SIZE (TYPE_MODE (DECL_ARG_TYPE (parm)),\
902: DECL_ARG_TYPE (parm)); \
903: if (arg_size == 2 && i <= 2) \
904: { \
905: if (i == 1) i++; \
906: fprintf (FILE, ",ARGW%d=GR", i++); \
907: fprintf (FILE, ",ARGW%d=GR", i++); \
908: } \
909: else if (arg_size == 1) \
910: fprintf (FILE, ",ARGW%d=GR", i++); \
911: else \
912: i += arg_size; \
913: } \
914: } \
915: /* anonymous args */ \
916: if ((TYPE_ARG_TYPES (tree_type) != 0 \
917: && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (tree_type)))\
918: != void_type_node)) \
919: || current_function_varargs) \
920: { \
921: for (; i < 4; i++) \
922: fprintf (FILE, ",ARGW%d=GR", i); \
923: } \
924: if (TYPE_MODE (fntype) == DFmode) \
925: fprintf (FILE, ",RTNVAL=FR"); \
926: else if (TYPE_MODE (fntype) == SFmode) \
927: fprintf (FILE, ",RTNVAL=FU"); \
928: else if (fntype != void_type_node) \
929: fprintf (FILE, ",RTNVAL=GR"); \
930: fputs ("\n", FILE); \
931: } \
932: ASM_OUTPUT_LABEL (FILE, NAME);} while (0)
933:
934: /* This macro generates the assembly code for function entry.
935: FILE is a stdio stream to output the code to.
936: SIZE is an int: how many units of temporary storage to allocate.
937: Refer to the array `regs_ever_live' to determine which registers
938: to save; `regs_ever_live[I]' is nonzero if register number I
939: is ever used in the function. This macro is responsible for
940: knowing which registers should not be saved even if used. */
941:
942: /* On HP-PA, move-double insns between fpu and cpu need an 8-byte block
943: of memory. If any fpu reg is used in the function, we allocate
944: such a block here, at the bottom of the frame, just in case it's needed.
945:
946: If this function is a leaf procedure, then we may choose not
947: to do a "save" insn. The decision about whether or not
948: to do this is made in regclass.c. */
949:
950: #define FUNCTION_PROLOGUE(FILE, SIZE) \
951: output_function_prologue (FILE, SIZE)
952:
953: /* Output assembler code to FILE to increment profiler label # LABELNO
954: for profiling a function entry.
955:
956: Because HPUX _mcount is so different, we actually emit the
957: profiling code in function_prologue. This just stores LABELNO for
958: that. */
959:
960: #define PROFILE_BEFORE_PROLOGUE
961: #define FUNCTION_PROFILER(FILE, LABELNO) \
962: { extern int hp_profile_labelno; hp_profile_labelno = (LABELNO);}
963:
964: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
965: the stack pointer does not matter. The value is tested only in
966: functions that have frame pointers.
967: No definition is equivalent to always zero. */
968:
969: extern int may_call_alloca;
970: extern int current_function_pretend_args_size;
971:
972: #define EXIT_IGNORE_STACK \
973: (get_frame_size () != 0 \
974: || current_function_calls_alloca || current_function_outgoing_args_size)
975:
976:
977: /* This macro generates the assembly code for function exit,
978: on machines that need it. If FUNCTION_EPILOGUE is not defined
979: then individual return instructions are generated for each
980: return statement. Args are same as for FUNCTION_PROLOGUE.
981:
982: The function epilogue should not depend on the current stack pointer!
983: It should use the frame pointer only. This is mandatory because
984: of alloca; we also take advantage of it to omit stack adjustments
985: before returning. */
986:
987: /* This declaration is needed due to traditional/ANSI
988: incompatibilities which cannot be #ifdefed away
989: because they occur inside of macros. Sigh. */
990: extern union tree_node *current_function_decl;
991:
992: #define FUNCTION_EPILOGUE(FILE, SIZE) \
993: output_function_epilogue (FILE, SIZE)
994:
995: /* Output assembler code for a block containing the constant parts
996: of a trampoline, leaving space for the variable parts.\
997:
998: The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
999: and then branches to the specified routine.
1000:
1001: This code template is copied from text segment to stack location
1002: and then patched with INITIALIZE_TRAMPOLINE to contain
1003: valid values, and then entered as a subroutine.
1004:
1005: It is best to keep this as small as possible to avoid having to
1006: flush multiple lines in the cache. */
1007:
1008: #define TRAMPOLINE_TEMPLATE(FILE) \
1.1.1.2 ! root 1009: { \
! 1010: fprintf (FILE, "\tldw 36(0,%%r22),%%r21\n"); \
! 1011: fprintf (FILE, "\tbb,>=,n %%r21,30,.+16\n"); \
! 1012: fprintf (FILE, "\tdepi 0,31,2,%%r21\n"); \
! 1013: fprintf (FILE, "\tldw 4(0,%%r21),%%r19\n"); \
! 1014: fprintf (FILE, "\tldw 0(0,%%r21),%%r21\n"); \
! 1015: fprintf (FILE, "\tldsid (0,%%r21),%%r1\n"); \
! 1016: fprintf (FILE, "\tmtsp %%r1,%%sr0\n"); \
! 1017: fprintf (FILE, "\tbe 0(%%sr0,%%r21)\n"); \
! 1018: fprintf (FILE, "\tldw 40(0,%%r22),%%r29\n"); \
! 1019: fprintf (FILE, "\t.word 0\n"); \
! 1020: fprintf (FILE, "\t.word 0\n"); \
! 1021: }
1.1 root 1022:
1023: /* Length in units of the trampoline for entering a nested function.
1024:
1025: Flush the cache entries corresponding to the first and last addresses
1026: of the trampoline. This is necessary as the trampoline may cross two
1027: cache lines.
1028:
1.1.1.2 ! root 1029: If the code part of the trampoline ever grows to > 32 bytes, then it
! 1030: will become necessary to hack on the cacheflush pattern in pa.md. */
1.1 root 1031:
1.1.1.2 ! root 1032: #define TRAMPOLINE_SIZE (11 * 4)
1.1 root 1033:
1034: /* Emit RTL insns to initialize the variable parts of a trampoline.
1035: FNADDR is an RTX for the address of the function's pure code.
1036: CXT is an RTX for the static chain value for the function.
1037:
1038: Move the function address to the trampoline template at offset 12.
1039: Move the static chain value to trampoline template at offset 16. */
1040:
1041: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1.1.1.2 ! root 1042: { \
! 1043: rtx start_addr, end_addr, masked_start_addr; \
! 1044: \
! 1045: start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
! 1046: emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (FNADDR)); \
! 1047: start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
! 1048: emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (CXT)); \
! 1049: /* fdc and fic only use registers for the address to flush, \
! 1050: they do not accept integer displacements. */ \
! 1051: start_addr = force_reg (SImode, (TRAMP)); \
! 1052: end_addr = force_reg (SImode, plus_constant ((TRAMP), 32)); \
! 1053: emit_insn (gen_dcacheflush (start_addr, end_addr)); \
! 1054: masked_start_addr = gen_reg_rtx (SImode); \
! 1055: emit_insn (gen_andsi3 (masked_start_addr, start_addr, \
! 1056: GEN_INT (0x3fffffff))); \
! 1057: end_addr = force_reg (SImode, plus_constant (masked_start_addr, 32)); \
! 1058: emit_insn (gen_icacheflush (masked_start_addr, end_addr, start_addr, \
! 1059: gen_reg_rtx (SImode), gen_reg_rtx (SImode)));\
1.1 root 1060: }
1061:
1062: /* Emit code for a call to builtin_saveregs. We must emit USE insns which
1063: reference the 4 integer arg registers and 4 fp arg registers.
1064: Ordinarily they are not call used registers, but they are for
1065: _builtin_saveregs, so we must make this explicit. */
1066:
1067: #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) (rtx)hppa_builtin_saveregs (ARGLIST)
1068:
1069:
1070: /* Addressing modes, and classification of registers for them. */
1071:
1072: #define HAVE_POST_INCREMENT
1073: #define HAVE_POST_DECREMENT
1074:
1075: #define HAVE_PRE_DECREMENT
1076: #define HAVE_PRE_INCREMENT
1077:
1078: /* Macros to check register numbers against specific register classes. */
1079:
1080: /* These assume that REGNO is a hard or pseudo reg number.
1081: They give nonzero only if REGNO is a hard reg of the suitable class
1082: or a pseudo reg currently allocated to a suitable hard reg.
1083: Since they use reg_renumber, they are safe only once reg_renumber
1084: has been allocated, which happens in local-alloc.c. */
1085:
1086: #define REGNO_OK_FOR_INDEX_P(REGNO) \
1087: ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1088: #define REGNO_OK_FOR_BASE_P(REGNO) \
1089: ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1090: #define REGNO_OK_FOR_FP_P(REGNO) \
1091: (((REGNO) >= 32 && (REGNO) <= 99)\
1092: || (reg_renumber[REGNO] >= 32 && reg_renumber[REGNO] <= 99))
1093:
1094: /* Now macros that check whether X is a register and also,
1095: strictly, whether it is in a specified class.
1096:
1097: These macros are specific to the the HP-PA, and may be used only
1098: in code for printing assembler insns and in conditions for
1099: define_optimization. */
1100:
1101: /* 1 if X is an fp register. */
1102:
1103: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1104:
1105: /* Maximum number of registers that can appear in a valid memory address. */
1106:
1107: #define MAX_REGS_PER_ADDRESS 2
1108:
1109: /* Recognize any constant value that is a valid address except
1110: for symbolic addresses. We get better CSE by rejecting them
1111: here and allowing hppa_legitimize_address to break them up. We
1112: use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
1113:
1114: #define CONSTANT_ADDRESS_P(X) \
1115: ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1116: || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1117: || GET_CODE (X) == HIGH) \
1118: && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
1119:
1120: /* Include all constant integers and constant doubles, but not
1121: floating-point, except for floating-point zero.
1122:
1123: Also reject function labels as reload can not handle them correctly
1124: right now. (Fix this for 2.5). */
1125: #define LEGITIMATE_CONSTANT_P(X) \
1126: ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1127: || (X) == CONST0_RTX (GET_MODE (X))) \
1128: && ! function_label_operand (X, VOIDmode))
1129:
1130: /* Subroutine for EXTRA_CONSTRAINT.
1131:
1132: Return 1 iff OP is a pseudo which did not get a hard register and
1133: we are running the reload pass. */
1134:
1135: #define IS_RELOADING_PSEUDO_P(OP) \
1136: ((reload_in_progress \
1137: && GET_CODE (OP) == REG \
1138: && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1139: && reg_renumber [REGNO (OP)] < 0))
1140:
1141: /* Optional extra constraints for this machine. Borrowed from sparc.h.
1142:
1143: For the HPPA, `Q' means that this is a memory operand but not a
1144: symbolic memory operand. Note that an unassigned pseudo register
1145: is such a memory operand. Needed because reload will generate
1146: these things in insns and then not re-recognize the insns, causing
1147: constrain_operands to fail.
1148:
1149: Also note `Q' accepts any memory operand during the reload pass.
1150: This includes out-of-range displacements in reg+d addressing.
1151: This makes for better code. (??? For 2.5 address this issue).
1152:
1153: `R' is unused.
1154:
1.1.1.2 ! root 1155: `S' is unused.
1.1 root 1156:
1157: `T' is for fp loads and stores. */
1158: #define EXTRA_CONSTRAINT(OP, C) \
1159: ((C) == 'Q' ? \
1160: (IS_RELOADING_PSEUDO_P (OP) \
1161: || (GET_CODE (OP) == MEM \
1162: && reload_in_progress) \
1163: || (GET_CODE (OP) == MEM \
1164: && memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1165: && ! symbolic_memory_operand (OP, VOIDmode))) \
1166: : ((C) == 'T' ? \
1167: (GET_CODE (OP) == MEM \
1168: /* Using DFmode forces only short displacements \
1169: to be recognized as valid in reg+d addresses. */\
1.1.1.2 ! root 1170: && memory_address_p (DFmode, XEXP (OP, 0))) : 0))
1.1 root 1171:
1172: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1173: and check its validity for a certain class.
1174: We have two alternate definitions for each of them.
1175: The usual definition accepts all pseudo regs; the other rejects
1176: them unless they have been allocated suitable hard regs.
1177: The symbol REG_OK_STRICT causes the latter definition to be used.
1178:
1179: Most source files want to accept pseudo regs in the hope that
1180: they will get allocated to the class that the insn wants them to be in.
1181: Source files for reload pass need to be strict.
1182: After reload, it makes no difference, since pseudo regs have
1183: been eliminated by then. */
1184:
1185: #ifndef REG_OK_STRICT
1186:
1187: /* Nonzero if X is a hard reg that can be used as an index
1188: or if it is a pseudo reg. */
1189: #define REG_OK_FOR_INDEX_P(X) \
1190: (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1191: /* Nonzero if X is a hard reg that can be used as a base reg
1192: or if it is a pseudo reg. */
1193: #define REG_OK_FOR_BASE_P(X) \
1194: (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1195:
1196: #else
1197:
1198: /* Nonzero if X is a hard reg that can be used as an index. */
1199: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1200: /* Nonzero if X is a hard reg that can be used as a base reg. */
1201: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1202:
1203: #endif
1204:
1205: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1206: that is a valid memory address for an instruction.
1207: The MODE argument is the machine mode for the MEM expression
1208: that wants to use this address.
1209:
1210: On the HP-PA, the actual legitimate addresses must be
1211: REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1212: But we can treat a SYMBOL_REF as legitimate if it is part of this
1213: function's constant-pool, because such addresses can actually
1214: be output as REG+SMALLINT. */
1215:
1216: #define VAL_5_BITS_P(X) ((unsigned)(X) + 0x10 < 0x20)
1217: #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1218:
1219: #define VAL_U5_BITS_P(X) ((unsigned)(X) < 0x20)
1220: #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1221:
1222: #define VAL_11_BITS_P(X) ((unsigned)(X) + 0x400 < 0x800)
1223: #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1224:
1225: #define VAL_14_BITS_P(X) ((unsigned)(X) + 0x2000 < 0x4000)
1226: #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1227:
1228: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1229: { \
1230: if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1231: || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1232: || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1233: && REG_P (XEXP (X, 0)) \
1234: && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1235: goto ADDR; \
1236: else if (GET_CODE (X) == PLUS) \
1237: { \
1238: rtx base = 0, index; \
1239: if (flag_pic && XEXP (X, 0) == pic_offset_table_rtx)\
1240: { \
1241: if (GET_CODE (XEXP (X, 1)) == REG \
1242: && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1243: goto ADDR; \
1244: else if (flag_pic == 1 \
1245: && GET_CODE (XEXP (X, 1)) != REG \
1246: && GET_CODE (XEXP (X, 1)) != LO_SUM \
1247: && GET_CODE (XEXP (X, 1)) != MEM) \
1248: goto ADDR; \
1249: } \
1250: else if (REG_P (XEXP (X, 0)) \
1251: && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1252: base = XEXP (X, 0), index = XEXP (X, 1); \
1253: else if (REG_P (XEXP (X, 1)) \
1254: && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1255: base = XEXP (X, 1), index = XEXP (X, 0); \
1256: if (base != 0) \
1257: if (GET_CODE (index) == CONST_INT \
1258: && ((INT_14_BITS (index) && (MODE) != SFmode && (MODE) != DFmode) \
1259: || INT_5_BITS (index))) \
1260: goto ADDR; \
1261: } \
1262: else if (GET_CODE (X) == LO_SUM \
1263: && GET_CODE (XEXP (X, 0)) == REG \
1264: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1265: && CONSTANT_P (XEXP (X, 1)) \
1266: && (MODE) != SFmode \
1267: && (MODE) != DFmode) \
1268: goto ADDR; \
1269: else if (GET_CODE (X) == LO_SUM \
1270: && GET_CODE (XEXP (X, 0)) == SUBREG \
1271: && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1272: && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1273: && CONSTANT_P (XEXP (X, 1)) \
1274: && (MODE) != SFmode \
1275: && (MODE) != DFmode) \
1276: goto ADDR; \
1277: else if (GET_CODE (X) == LABEL_REF \
1278: || (GET_CODE (X) == CONST_INT \
1279: && INT_14_BITS (X))) \
1280: goto ADDR; \
1281: }
1282:
1283: /* Try machine-dependent ways of modifying an illegitimate address
1284: to be legitimate. If we find one, return the new, valid address.
1285: This macro is used in only one place: `memory_address' in explow.c.
1286:
1287: OLDX is the address as it was before break_out_memory_refs was called.
1288: In some cases it is useful to look at this to decide what needs to be done.
1289:
1290: MODE and WIN are passed so that this macro can use
1291: GO_IF_LEGITIMATE_ADDRESS.
1292:
1293: It is always safe for this macro to do nothing. It exists to recognize
1294: opportunities to optimize the output. */
1295:
1296: extern struct rtx_def *hppa_legitimize_address ();
1297: #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1298: { rtx orig_x = (X); \
1299: (X) = hppa_legitimize_address (X, OLDX, MODE); \
1300: if ((X) != orig_x && memory_address_p (MODE, X)) \
1301: goto WIN; }
1302:
1303: /* Go to LABEL if ADDR (a legitimate address expression)
1304: has an effect that depends on the machine mode it is used for. */
1305:
1306: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1307: if (GET_CODE (ADDR) == PRE_DEC \
1308: || GET_CODE (ADDR) == POST_DEC \
1309: || GET_CODE (ADDR) == PRE_INC \
1310: || GET_CODE (ADDR) == POST_INC) \
1311: goto LABEL
1312:
1313: /* Define this macro if references to a symbol must be treated
1314: differently depending on something about the variable or
1315: function named by the symbol (such as what section it is in).
1316:
1317: The macro definition, if any, is executed immediately after the
1318: rtl for DECL or other node is created.
1319: The value of the rtl will be a `mem' whose address is a
1320: `symbol_ref'.
1321:
1322: The usual thing for this macro to do is to a flag in the
1323: `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1324: name string in the `symbol_ref' (if one bit is not enough
1325: information).
1326:
1327: On the HP-PA we use this to indicate if a symbol is in text or
1328: data space. Also, function labels need special treatment. */
1329:
1330: #define TEXT_SPACE_P(DECL)\
1331: (TREE_CODE (DECL) == FUNCTION_DECL \
1332: || (TREE_CODE (DECL) == VAR_DECL \
1333: && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
1334: && !flag_pic) \
1335: || (*tree_code_type[(int) TREE_CODE (DECL)] == 'c' \
1336: && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings)))
1337:
1338: #define FUNCTION_NAME_P(NAME) \
1339: (*(NAME) == '@' || (*(NAME) == '*' && *((NAME) + 1) == '@'))
1340:
1341: #define ENCODE_SECTION_INFO(DECL)\
1342: do \
1343: { if (TEXT_SPACE_P (DECL)) \
1344: { rtx _rtl; \
1345: if (TREE_CODE (DECL) == FUNCTION_DECL \
1346: || TREE_CODE (DECL) == VAR_DECL) \
1347: _rtl = DECL_RTL (DECL); \
1348: else \
1349: _rtl = TREE_CST_RTL (DECL); \
1350: SYMBOL_REF_FLAG (XEXP (_rtl, 0)) = 1; \
1351: if (TREE_CODE (DECL) == FUNCTION_DECL) \
1352: hppa_encode_label (XEXP (DECL_RTL (DECL), 0));\
1353: } \
1354: } \
1355: while (0)
1356:
1357: /* Store the user-specified part of SYMBOL_NAME in VAR.
1358: This is sort of inverse to ENCODE_SECTION_INFO. */
1359:
1360: #define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \
1361: (VAR) = ((SYMBOL_NAME) + ((SYMBOL_NAME)[0] == '*' ? \
1362: 1 + (SYMBOL_NAME)[1] == '@'\
1363: : (SYMBOL_NAME)[0] == '@'))
1364:
1365: /* Specify the machine mode that this machine uses
1366: for the index in the tablejump instruction. */
1.1.1.2 ! root 1367: #define CASE_VECTOR_MODE DImode
1.1 root 1368:
1369: /* Define this if the tablejump instruction expects the table
1370: to contain offsets from the address of the table.
1371: Do not define this if the table should contain absolute addresses. */
1372: /* #define CASE_VECTOR_PC_RELATIVE */
1373:
1374: #define CASE_DROPS_THROUGH
1375: /* Specify the tree operation to be used to convert reals to integers. */
1376: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1377:
1378: /* This is the kind of divide that is easiest to do in the general case. */
1379: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1380:
1381: /* Define this as 1 if `char' should by default be signed; else as 0. */
1382: #define DEFAULT_SIGNED_CHAR 1
1383:
1384: /* Max number of bytes we can move from memory to memory
1385: in one reasonably fast instruction. */
1386: #define MOVE_MAX 8
1387:
1.1.1.2 ! root 1388: /* Define if operations between registers always perform the operation
! 1389: on the full register even if a narrower mode is specified. */
! 1390: #define WORD_REGISTER_OPERATIONS
! 1391:
! 1392: /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
! 1393: will either zero-extend or sign-extend. The value of this macro should
! 1394: be the code that says which one of the two operations is implicitly
! 1395: done, NIL if none. */
! 1396: #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1.1 root 1397:
1398: /* Nonzero if access to memory by bytes is slow and undesirable. */
1399: #define SLOW_BYTE_ACCESS 1
1400:
1401: /* Do not break .stabs pseudos into continuations. */
1402: #define DBX_CONTIN_LENGTH 0
1403:
1404: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1405: is done just by pretending it is already truncated. */
1406: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1407:
1408: /* We assume that the store-condition-codes instructions store 0 for false
1409: and some other value for true. This is the value stored for true. */
1410:
1411: #define STORE_FLAG_VALUE 1
1412:
1413: /* When a prototype says `char' or `short', really pass an `int'. */
1414: #define PROMOTE_PROTOTYPES
1415:
1416: /* Specify the machine mode that pointers have.
1417: After generation of rtl, the compiler makes no further distinction
1418: between pointers and any other objects of this machine mode. */
1419: #define Pmode SImode
1420:
1421: /* Add any extra modes needed to represent the condition code.
1422:
1423: HPPA floating comparisons produce condition codes. */
1424: #define EXTRA_CC_MODES CCFPmode
1425:
1426: /* Define the names for the modes specified above. */
1427: #define EXTRA_CC_NAMES "CCFP"
1428:
1429: /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1430: return the mode to be used for the comparison. For floating-point, CCFPmode
1431: should be used. CC_NOOVmode should be used when the first operand is a
1432: PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1433: needed. */
1434: #define SELECT_CC_MODE(OP,X,Y) \
1435: (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1436:
1437: /* A function address in a call instruction
1438: is a byte address (for indexing purposes)
1439: so give the MEM rtx a byte's mode. */
1440: #define FUNCTION_MODE SImode
1441:
1442: /* Define this if addresses of constant functions
1443: shouldn't be put through pseudo regs where they can be cse'd.
1444: Desirable on machines where ordinary constants are expensive
1445: but a CALL with constant address is cheap. */
1446: #define NO_FUNCTION_CSE
1447:
1.1.1.2 ! root 1448: /* Define this to be nonzero if shift instructions ignore all but the low-order
1.1 root 1449: few bits. */
1.1.1.2 ! root 1450: #define SHIFT_COUNT_TRUNCATED 1
1.1 root 1451:
1452: /* Use atexit for static constructors/destructors, instead of defining
1453: our own exit function. */
1454: #define HAVE_ATEXIT
1455:
1456: /* Compute the cost of computing a constant rtl expression RTX
1457: whose rtx-code is CODE. The body of this macro is a portion
1458: of a switch statement. If the code is computed here,
1459: return it with a return statement. Otherwise, break from the switch. */
1460:
1461: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1462: case CONST_INT: \
1463: if (INTVAL (RTX) == 0) return 0; \
1464: if (INT_14_BITS (RTX)) return 1; \
1465: case HIGH: \
1466: return 2; \
1467: case CONST: \
1468: case LABEL_REF: \
1469: case SYMBOL_REF: \
1470: return 4; \
1471: case CONST_DOUBLE: \
1472: if (RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)\
1473: && OUTER_CODE != SET) \
1474: return 0; \
1475: else \
1476: return 8;
1477:
1478: #define ADDRESS_COST(RTX) \
1479: (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1480:
1481: /* Compute extra cost of moving data between one register class
1482: and another.
1483:
1.1.1.2 ! root 1484: Make moves from SAR so expensive they should never happen. We used to
! 1485: have 0xffff here, but that generates overflow in rare cases.
1.1 root 1486:
1487: Copies involving a FP register and a non-FP register are relatively
1488: expensive because they must go through memory.
1489:
1490: Other copies are reasonably cheap. */
1491: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1.1.1.2 ! root 1492: (CLASS1 == SHIFT_REGS ? 0x100 \
1.1 root 1493: : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
1494: : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
1495: : 2)
1496:
1497:
1498: /* Provide the costs of a rtl expression. This is in the body of a
1499: switch on CODE. The purpose for the cost of MULT is to encourage
1500: `synth_mult' to find a synthetic multiply when reasonable. */
1501:
1502: #define RTX_COSTS(X,CODE,OUTER_CODE) \
1503: case MULT: \
1504: return TARGET_SNAKE && ! TARGET_DISABLE_FPREGS \
1505: ? COSTS_N_INSNS (8) : COSTS_N_INSNS (20); \
1506: case DIV: \
1507: case UDIV: \
1508: case MOD: \
1509: case UMOD: \
1510: return COSTS_N_INSNS (60); \
1511: case PLUS: /* this includes shNadd insns */ \
1512: return COSTS_N_INSNS (1) + 2;
1513:
1514: /* Adjust the cost of dependencies. */
1515:
1516: #define ADJUST_COST(INSN,LINK,DEP,COST) \
1517: (COST) = pa_adjust_cost (INSN, LINK, DEP, COST)
1518:
1519: /* Handling the special cases is going to get too complicated for a macro,
1520: just call `pa_adjust_insn_length' to do the real work. */
1521: #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1522: LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1523:
1524: /* Enable a bug fix. (This is for extra caution.) */
1525: #define SHORTEN_WITH_ADJUST_INSN_LENGTH
1526:
1527: /* Millicode insns are actually function calls with some special
1528: constraints on arguments and register usage.
1529:
1530: Millicode calls always expect their arguments in the integer argument
1531: registers, and always return their result in %r29 (ret1). They
1532: are expected to clobber their arguments, %r1, %r29, and %r31 and
1533: nothing else.
1534:
1535: These macros tell reorg that the references to arguments and
1536: register clobbers for millicode calls do not appear to happen
1537: until after the millicode call. This allows reorg to put insns
1538: which set the argument registers into the delay slot of the millicode
1539: call -- thus they act more like traditional CALL_INSNs.
1540:
1541: get_attr_type will try to recognize the given insn, so make sure to
1542: filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1543: in particular. */
1544: #define INSN_SETS_ARE_DELAYED(X) \
1545: ((GET_CODE (X) == INSN \
1546: && GET_CODE (PATTERN (X)) != SEQUENCE \
1547: && GET_CODE (PATTERN (X)) != USE \
1548: && GET_CODE (PATTERN (X)) != CLOBBER \
1549: && get_attr_type (X) == TYPE_MILLI))
1550:
1551: #define INSN_REFERENCES_ARE_DELAYED(X) \
1552: ((GET_CODE (X) == INSN \
1553: && GET_CODE (PATTERN (X)) != SEQUENCE \
1554: && GET_CODE (PATTERN (X)) != USE \
1555: && GET_CODE (PATTERN (X)) != CLOBBER \
1556: && get_attr_type (X) == TYPE_MILLI))
1557:
1558:
1559: /* Control the assembler format that we output. */
1560:
1561: /* Output at beginning of assembler file. */
1562:
1563: #define ASM_FILE_START(FILE) \
1564: do { fprintf (FILE, "\t.SPACE $PRIVATE$\n\
1565: \t.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31\n\
1566: \t.SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82\n\
1567: \t.SPACE $TEXT$\n\
1568: \t.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44\n\
1569: \t.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n\
1570: \t.IMPORT $global$,DATA\n\
1571: \t.IMPORT $$dyncall,MILLICODE\n");\
1572: if (profile_flag)\
1573: fprintf (FILE, "\t.IMPORT _mcount, CODE\n");\
1.1.1.2 ! root 1574: if (write_symbols != NO_DEBUG) \
! 1575: output_file_directive ((FILE), main_input_filename); \
1.1 root 1576: } while (0)
1577:
1578: /* Output to assembler file text saying following lines
1579: may contain character constants, extra white space, comments, etc. */
1580:
1581: #define ASM_APP_ON ""
1582:
1583: /* Output to assembler file text saying following lines
1584: no longer contain unusual constructs. */
1585:
1586: #define ASM_APP_OFF ""
1587:
1588: /* We don't yet know how to identify GCC to HP-PA machines. */
1589: #define ASM_IDENTIFY_GCC(FILE) fprintf (FILE, "; gcc_compiled.:\n")
1590:
1591: /* Output before code. */
1592:
1593: /* Supposedly the assembler rejects the command if there is no tab! */
1594: #define TEXT_SECTION_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $CODE$\n"
1595:
1.1.1.2 ! root 1596: /* Output before read-only data. */
! 1597:
! 1598: /* Supposedly the assembler rejects the command if there is no tab! */
! 1599: #define READONLY_DATA_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $LIT$\n"
! 1600:
! 1601: #if 0
! 1602: /* This has apparently triggered a latent GAS bug which manifests itself
! 1603: as numerous warnings from the debugger of the form:
! 1604:
! 1605: During symbol reading, inner block not inside outer block in ...
! 1606: inner block not inside outer block in ...
! 1607:
! 1608: Or as local variables not being accessable from the debugger.
! 1609:
! 1610: Disable $LIT$ for now. Try it with GAS-2 when it is functional (I
! 1611: am not even going to try to fix this in GAS-1). */
! 1612: #define READONLY_DATA_SECTION readonly_data
! 1613: #endif
! 1614:
1.1 root 1615: /* Output before writable data. */
1616:
1617: /* Supposedly the assembler rejects the command if there is no tab! */
1618: #define DATA_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $DATA$\n"
1619:
1620: /* Output before uninitialized data. */
1621:
1622: #define BSS_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $BSS$\n"
1623:
1624: /* Define the .bss section for ASM_OUTPUT_LOCAL to use. */
1625:
1.1.1.2 ! root 1626: #define EXTRA_SECTIONS in_bss, in_readonly_data
1.1 root 1627:
1628: #define EXTRA_SECTION_FUNCTIONS \
1629: void \
1630: bss_section () \
1631: { \
1632: if (in_section != in_bss) \
1633: { \
1634: fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \
1635: in_section = in_bss; \
1636: } \
1.1.1.2 ! root 1637: } \
! 1638: void \
! 1639: readonly_data () \
! 1640: { \
! 1641: if (in_section != in_readonly_data) \
! 1642: { \
! 1643: fprintf (asm_out_file, "%s\n", READONLY_DATA_ASM_OP); \
! 1644: in_section = in_readonly_data; \
! 1645: } \
1.1 root 1646: }
1647:
1648:
1649: /* How to refer to registers in assembler output.
1650: This sequence is indexed by compiler's hard-register-number (see above). */
1651:
1652: #define REGISTER_NAMES \
1653: {"0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
1654: "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
1655: "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", \
1656: "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", \
1657: "%fr4", "%fr5", "%fr6", "%fr7", \
1658: "%fr8", "%fr9", "%fr10", "%fr11", "%fr12", "%fr13", "%fr14", "%fr15", \
1659: "%fr4", "%fr4R", "%fr5", "%fr5R", "%fr6", "%fr6R", "%fr7", "%fr7R", \
1660: "%fr8", "%fr8R", "%fr9", "%fr9R", "%fr10", "%fr10R", "%fr11", "%fr11R",\
1661: "%fr12", "%fr12R", "%fr13", "%fr13R", "%fr14", "%fr14R", "%fr15", "%fr15R",\
1662: "%fr16", "%fr16R", "%fr17", "%fr17R", "%fr18", "%fr18R", "%fr19", "%fr19R",\
1663: "%fr20", "%fr20R", "%fr21", "%fr21R", "%fr22", "%fr22R", "%fr23", "%fr23R",\
1664: "%fr24", "%fr24R", "%fr25", "%fr25R", "%fr26", "%fr26R", "%fr27", "%fr27R",\
1665: "%fr28", "%fr28R", "%fr29", "%fr29R", "%fr30", "%fr30R", "%fr31", "%fr31R",\
1666: "SAR"}
1667:
1668: /* How to renumber registers for dbx and gdb. */
1669:
1670: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1671:
1672: /* This is how to output the definition of a user-level label named NAME,
1673: such as the label on a static function or variable NAME. */
1674:
1675: #define ASM_OUTPUT_LABEL(FILE, NAME) \
1676: do { assemble_name (FILE, NAME); \
1.1.1.2 ! root 1677: if (TARGET_GAS) \
1.1 root 1678: fputc (':', FILE); \
1679: fputc ('\n', FILE); } while (0)
1680:
1681: /* This is how to output a command to make the user-level label named NAME
1682: defined for reference from other files. */
1683:
1684: #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1685: do { fputs ("\t.IMPORT ", FILE); \
1686: assemble_name (FILE, NAME); \
1687: if (FUNCTION_NAME_P (NAME)) \
1688: fputs (",CODE\n", FILE); \
1689: else \
1690: fputs (",DATA\n", FILE); \
1691: } while (0)
1692:
1693: /* hpux ld doesn't output the object file name, or anything useful at
1694: all, to indicate the start of an object file's symbols. This screws
1695: up gdb, so we'll output this magic cookie at the end of an object
1696: file with debugging symbols */
1697:
1698: #define ASM_FILE_END(FILE) \
1699: do { if (write_symbols == DBX_DEBUG)\
1700: { fputs (TEXT_SECTION_ASM_OP, FILE);\
1.1.1.2 ! root 1701: fputs ("\t.stabs \"end_file.\",4,0,0,Ltext_end\nLtext_end:\n",\
1.1 root 1702: (FILE));\
1703: }\
1704: } while (0)
1705:
1706: /* The bogus HP assembler requires ALL external references to be
1707: "imported", even library calls. They look a bit different, so
1708: here's this macro. */
1709:
1710: #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, RTL) \
1711: do { fputs ("\t.IMPORT ", FILE); \
1712: assemble_name (FILE, XSTR ((RTL), 0)); \
1713: fputs (",CODE\n", FILE); \
1714: } while (0)
1715:
1716: #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1717: do { fputs ("\t.EXPORT ", FILE); assemble_name (FILE, NAME); \
1718: if (FUNCTION_NAME_P (NAME)) \
1719: fputs (",CODE\n", FILE); \
1720: else \
1721: fputs (",DATA\n", FILE);} while (0)
1722:
1723: /* This is how to output a reference to a user-level label named NAME.
1724: `assemble_name' uses this. */
1725:
1726: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1727: fprintf ((FILE), "%s", (NAME) + (FUNCTION_NAME_P (NAME) ? 1 : 0))
1728:
1729: /* This is how to output an internal numbered label where
1730: PREFIX is the class of label and NUM is the number within the class. */
1731:
1732: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1733: {fprintf (FILE, "%s$%04d", PREFIX, NUM); \
1.1.1.2 ! root 1734: if (TARGET_GAS) \
1.1 root 1735: fputs (":\n", FILE); \
1736: else \
1737: fputs ("\n", FILE);}
1738:
1739: /* This is how to store into the string LABEL
1740: the symbol_ref name of an internal numbered label where
1741: PREFIX is the class of label and NUM is the number within the class.
1742: This is suitable for output with `assemble_name'. */
1743:
1744: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1745: sprintf (LABEL, "*%s$%04d", PREFIX, NUM)
1746:
1747: /* This is how to output an assembler line defining a `double' constant. */
1748:
1749: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1750: do { union { double d; int i[2];} __u; \
1751: __u.d = (VALUE); \
1752: fprintf (FILE, "\t; .double %.20e\n\t.word %d ; = 0x%x\n\t.word %d ; = 0x%x\n", \
1753: __u.d, __u.i[0], __u.i[0], __u.i[1], __u.i[1]); \
1754: } while (0)
1755:
1756: /* This is how to output an assembler line defining a `float' constant. */
1757:
1758: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1759: do { union { float f; int i;} __u; \
1760: __u.f = (VALUE); \
1761: fprintf (FILE, "\t; .float %.12e\n\t.word %d ; = 0x%x\n", __u.f, __u.i, __u.i); \
1762: } while (0)
1763:
1764: /* This is how to output an assembler line defining an `int' constant. */
1765:
1766: #define ASM_OUTPUT_INT(FILE,VALUE) \
1767: { fprintf (FILE, "\t.word "); \
1.1.1.2 ! root 1768: if (function_label_operand (VALUE, VOIDmode)) \
1.1 root 1769: fprintf (FILE, "P%%"); \
1770: output_addr_const (FILE, (VALUE)); \
1771: fprintf (FILE, "\n");}
1772:
1773: /* Likewise for `short' and `char' constants. */
1774:
1775: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1776: ( fprintf (FILE, "\t.half "), \
1777: output_addr_const (FILE, (VALUE)), \
1778: fprintf (FILE, "\n"))
1779:
1780: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1781: ( fprintf (FILE, "\t.byte "), \
1782: output_addr_const (FILE, (VALUE)), \
1783: fprintf (FILE, "\n"))
1784:
1785: /* This is how to output an assembler line for a numeric constant byte. */
1786:
1787: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1788: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1789:
1790: #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1791: output_ascii ((FILE), (P), (SIZE))
1792:
1793: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO)
1794: #define ASM_OUTPUT_REG_POP(FILE,REGNO)
1795: /* This is how to output an element of a case-vector that is absolute.
1796: Note that this method makes filling these branch delay slots
1797: impossible. */
1798:
1799: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1800: fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1801:
1802: /* Jump tables are executable code and live in the TEXT section on the PA. */
1803: #define JUMP_TABLES_IN_TEXT_SECTION
1804:
1805: /* This is how to output an element of a case-vector that is relative.
1806: (The HP-PA does not use such vectors,
1807: but we must define this macro anyway.) */
1808:
1809: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1810: fprintf (FILE, "\tword L%d-L%d\n", VALUE, REL)
1811:
1812: /* This is how to output an assembler line
1813: that says to advance the location counter
1814: to a multiple of 2**LOG bytes. */
1815:
1816: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1817: fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1818:
1819: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1820: fprintf (FILE, "\t.blockz %d\n", (SIZE))
1821:
1822: /* This says how to output an assembler line
1823: to define a global common symbol. */
1824:
1825: /* Supposedly the assembler rejects the command if there is no tab! */
1826:
1827:
1828: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1829: { bss_section (); \
1830: assemble_name ((FILE), (NAME)); \
1.1.1.2 ! root 1831: if (TARGET_GAS) \
1.1 root 1832: fputc (':', (FILE)); \
1833: fputs ("\t.comm ", (FILE)); \
1834: fprintf ((FILE), "%d\n", (ROUNDED));}
1835:
1836: /* This says how to output an assembler line
1837: to define a local common symbol. */
1838:
1839: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1840: { bss_section (); \
1841: fprintf ((FILE), "\t.align %d\n", (SIZE) <= 4 ? 4 : 8); \
1842: assemble_name ((FILE), (NAME)); \
1.1.1.2 ! root 1843: if (TARGET_GAS) \
1.1 root 1844: fputc (':', (FILE)); \
1845: fprintf ((FILE), "\n\t.block %d\n", (ROUNDED));}
1846:
1847: /* Store in OUTPUT a string (made with alloca) containing
1848: an assembler-name for a local static variable named NAME.
1849: LABELNO is an integer which is different for each call. */
1850:
1851: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1852: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
1853: sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
1854:
1855: /* Define the parentheses used to group arithmetic operations
1856: in assembler code. */
1857:
1858: #define ASM_OPEN_PAREN "("
1859: #define ASM_CLOSE_PAREN ")"
1860:
1861: /* Define results of standard character escape sequences. */
1862: #define TARGET_BELL 007
1863: #define TARGET_BS 010
1864: #define TARGET_TAB 011
1865: #define TARGET_NEWLINE 012
1866: #define TARGET_VT 013
1867: #define TARGET_FF 014
1868: #define TARGET_CR 015
1869:
1870: #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1871: ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
1872:
1873: /* Print operand X (an rtx) in assembler syntax to file FILE.
1874: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1875: For `%' followed by punctuation, CODE is the punctuation and X is null.
1876:
1877: On the HP-PA, the CODE can be `r', meaning this is a register-only operand
1878: and an immediate zero should be represented as `r0'.
1879:
1880: Several % codes are defined:
1881: O an operation
1882: C compare conditions
1883: N extract conditions
1884: M modifier to handle preincrement addressing for memory refs.
1885: F modifier to handle preincrement addressing for fp memory refs */
1886:
1887: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1888:
1889:
1890: /* Print a memory address as an operand to reference that memory location. */
1891:
1892: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1893: { register rtx addr = ADDR; \
1894: register rtx base; \
1895: int offset; \
1896: switch (GET_CODE (addr)) \
1897: { \
1898: case REG: \
1899: fprintf (FILE, "0(0,%s)", reg_names [REGNO (addr)]); \
1900: break; \
1901: case PLUS: \
1902: if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1903: offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
1904: else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1905: offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
1906: else \
1907: abort (); \
1908: fprintf (FILE, "%d(0,%s)", offset, reg_names [REGNO (base)]); \
1909: break; \
1910: case LO_SUM: \
1911: fputs ("R'", FILE); \
1912: output_global_address (FILE, XEXP (addr, 1)); \
1913: fputs ("(", FILE); \
1914: output_operand (XEXP (addr, 0), 0); \
1915: fputs (")", FILE); \
1916: break; \
1917: case CONST_INT: \
1918: fprintf (FILE, "%d(0,0)", INTVAL (addr)); \
1919: break; \
1920: default: \
1921: output_addr_const (FILE, addr); \
1922: }}
1923:
1924:
1925: /* Define functions in pa.c and used in insn-output.c. */
1926:
1927: extern char *output_and ();
1928: extern char *output_ior ();
1929: extern char *output_move_double ();
1930: extern char *output_fp_move_double ();
1931: extern char *output_block_move ();
1932: extern char *output_scc_insn ();
1933: extern char *output_cbranch ();
1934: extern char *output_bb ();
1.1.1.2 ! root 1935: extern char *output_dbra ();
! 1936: extern char *output_movb ();
1.1 root 1937: extern char *output_return ();
1.1.1.2 ! root 1938: extern char *output_call ();
1.1 root 1939: extern char *output_floatsisf2 ();
1940: extern char *output_floatsidf2 ();
1941: extern char *output_mul_insn ();
1942: extern char *output_div_insn ();
1943: extern char *output_mod_insn ();
1944: extern char *singlemove_string ();
1945: extern void output_arg_descriptor ();
1946: extern void output_global_address ();
1947: extern struct rtx_def *legitimize_pic_address ();
1948: extern struct rtx_def *gen_cmp_fp ();
1949: extern void hppa_encode_label ();
1950:
1951: extern struct rtx_def *hppa_save_pic_table_rtx;
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