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1.1 root 1: /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2: Copyright (C) 1992, 1993 Free Software Foundation, Inc.
3: Contributed by Michael Tiemann ([email protected])
4: and Tim Moore ([email protected]) of the Center for
5: Software Science at the University of Utah.
6:
7: This file is part of GNU CC.
8:
9: GNU CC is free software; you can redistribute it and/or modify
10: it under the terms of the GNU General Public License as published by
11: the Free Software Foundation; either version 1, or (at your option)
12: any later version.
13:
14: GNU CC is distributed in the hope that it will be useful,
15: but WITHOUT ANY WARRANTY; without even the implied warranty of
16: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17: GNU General Public License for more details.
18:
19: You should have received a copy of the GNU General Public License
20: along with GNU CC; see the file COPYING. If not, write to
21: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22:
23: enum cmp_type /* comparison type */
24: {
25: CMP_SI, /* compare integers */
26: CMP_SF, /* compare single precision floats */
27: CMP_DF, /* compare double precision floats */
28: CMP_MAX /* max comparison type */
29: };
30:
31: /* Print subsidiary information on the compiler version in use. */
32:
33: #define TARGET_VERSION fprintf (stderr, " (hppa)");
34:
35: /* Run-time compilation parameters selecting different hardware subsets. */
36:
37: extern int target_flags;
38:
39: /* compile code for HP-PA 1.1 ("Snake") */
40:
41: #define TARGET_SNAKE (target_flags & 1)
42:
43: /* Disable all FP registers (they all become fixed). This may be necessary
44: for compiling kernels which perform lazy context switching of FP regs.
1.1.1.3 ! root 45: Note if you use this option and try to perform floating point operations
1.1 root 46: the compiler will abort! */
47:
48: #define TARGET_DISABLE_FPREGS (target_flags & 2)
49:
1.1.1.2 root 50: /* Allow unconditional jumps in the delay slots of call instructions. */
51: #define TARGET_JUMP_IN_DELAY (target_flags & 8)
1.1 root 52:
53: /* Force all function calls to indirect addressing via a register. This
54: avoids lossage when the function is very far away from the current PC.
55:
1.1.1.3 ! root 56: ??? What about simple jumps, they can suffer from the same problem.
1.1 root 57: Would require significant surgery in pa.md. */
58:
59: #define TARGET_LONG_CALLS (target_flags & 16)
60:
1.1.1.2 root 61: /* Disable indexed addressing modes. */
1.1 root 62:
63: #define TARGET_DISABLE_INDEXING (target_flags & 32)
64:
1.1.1.3 ! root 65: /* Emit code which follows the new portable runtime calling conventions
! 66: HP wants everyone to use for ELF objects. If at all possible you want
! 67: to avoid this since it's a performance loss for non-prototyped code.
! 68:
! 69: Note TARGET_PORTABLE_RUNTIME also implies TARGET_LONG_CALLS. */
! 70:
! 71: #define TARGET_PORTABLE_RUNTIME (target_flags & 64)
! 72:
1.1.1.2 root 73: /* Emit directives only understood by GAS. This allows parameter
74: relocations to work for static functions. There is no way
1.1.1.3 ! root 75: to make them work the HP assembler at this time. */
1.1 root 76:
1.1.1.2 root 77: #define TARGET_GAS (target_flags & 128)
1.1 root 78:
79: /* Macro to define tables used to set the flags.
80: This is a list in braces of pairs in braces,
81: each pair being { "NAME", VALUE }
82: where VALUE is the bits to set or minus the bits to clear.
83: An empty string NAME is used to identify the default VALUE. */
84:
85: #define TARGET_SWITCHES \
1.1.1.2 root 86: {{"snake", 1}, \
87: {"nosnake", -1}, \
88: {"pa-risc-1-0", -1}, \
89: {"pa-risc-1-1", 1}, \
90: {"disable-fpregs", 2}, \
91: {"no-disable-fpregs", 2}, \
92: {"jump-in-delay", 8}, \
93: {"no-jump-in-delay", -8}, \
94: {"long-calls", 16}, \
95: {"no-long-calls", -16}, \
96: {"disable-indexing", 32}, \
97: {"no-disable-indexing", -32},\
1.1.1.3 ! root 98: {"portable-runtime", 64+16},\
! 99: {"no-portable-runtime", -(64+16)},\
1.1.1.2 root 100: {"gas", 128}, \
101: {"no-gas", -128}, \
1.1 root 102: { "", TARGET_DEFAULT}}
103:
104: #ifndef TARGET_DEFAULT
1.1.1.3 ! root 105: #define TARGET_DEFAULT 0x88 /* TARGET_GAS + TARGET_JUMP_IN_DELAY */
1.1 root 106: #endif
107:
108: #define DBX_DEBUGGING_INFO
1.1.1.2 root 109: #define DEFAULT_GDB_EXTENSIONS 1
110:
1.1.1.3 ! root 111: /* This is the way other stabs-in-XXX tools do things. We will be
! 112: compatable. */
! 113: #define DBX_BLOCKS_FUNCTION_RELATIVE 1
! 114:
! 115: /* Likewise for linenos.
! 116:
! 117: We make the first line stab special to avoid adding several
! 118: gross hacks to GAS. */
! 119: #undef ASM_OUTPUT_SOURCE_LINE
! 120: #define ASM_OUTPUT_SOURCE_LINE(file, line) \
! 121: { static int sym_lineno = 1; \
! 122: static tree last_function_decl = NULL; \
! 123: if (current_function_decl == last_function_decl) \
! 124: fprintf (file, "\t.stabn 68,0,%d,L$M%d-%s\nL$M%d:\n", \
! 125: line, sym_lineno, \
! 126: XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0) + 1, \
! 127: sym_lineno); \
! 128: else \
! 129: fprintf (file, "\t.stabn 68,0,%d,0\n", line); \
! 130: last_function_decl = current_function_decl; \
! 131: sym_lineno += 1; }
! 132:
! 133: /* But, to make this work, we have to output the stabs for the function
! 134: name *first*... */
! 135: #define DBX_FUNCTION_FIRST
! 136:
1.1.1.2 root 137: /* Only lables should ever begin in colunm zero. */
138: #define ASM_STABS_OP "\t.stabs"
139: #define ASM_STABN_OP "\t.stabn"
1.1 root 140:
1.1.1.3 ! root 141: /* GDB always assumes the current function's frame begins at the value
! 142: of the stack pointer upon entry to the current function. Accessing
! 143: local variables and parameters passed on the stack is done using the
! 144: base of the frame + an offset provided by GCC.
! 145:
! 146: For functions which have frame pointers this method works fine;
! 147: the (frame pointer) == (stack pointer at function entry) and GCC provides
! 148: an offset relative to the frame pointer.
! 149:
! 150: This loses for functions without a frame pointer; GCC provides an offset
! 151: which is relative to the stack pointer after adjusting for the function's
! 152: frame size. GDB would prefer the offset to be relative to the value of
! 153: the stack pointer at the function's entry. Yuk! */
! 154: #define DEBUGGER_AUTO_OFFSET(X) \
! 155: ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
! 156: + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
! 157:
! 158: #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
! 159: ((GET_CODE (X) == PLUS ? OFFSET : 0) \
! 160: + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
! 161:
1.1 root 162: #if (TARGET_DEFAULT & 1) == 0
163: #define CPP_SPEC "%{msnake:-D__hp9000s700 -D_PA_RISC1_1}\
164: %{mpa-risc-1-1:-D__hp9000s700 -D_PA_RISC1_1}"
165: #else
166: #define CPP_SPEC "%{!mpa-risc-1-0:%{!mnosnake:-D__hp9000s700 -D_PA_RISC1_1}}"
167: #endif
168:
169: /* Defines for a K&R CC */
170:
171: #define CC1_SPEC "%{pg:} %{p:}"
1.1.1.3 ! root 172:
1.1 root 173: #define LINK_SPEC "-u main"
174:
1.1.1.2 root 175: /* Allow $ in identifiers. */
176: #define DOLLARS_IN_IDENTIFIERS 2
177:
1.1 root 178: /* Make gcc agree with <machine/ansi.h> */
179:
180: #define SIZE_TYPE "unsigned int"
181: #define PTRDIFF_TYPE "int"
1.1.1.3 ! root 182: #define WCHAR_TYPE "unsigned int"
! 183: #define WCHAR_TYPE_SIZE 32
1.1 root 184:
1.1.1.2 root 185: /* Sometimes certain combinations of command options do not make sense
186: on a particular target machine. You can define a macro
187: `OVERRIDE_OPTIONS' to take account of this. This macro, if
188: defined, is executed once just after all the command options have
189: been parsed.
190:
191: On the PA, it is used to explicitly warn the user that -fpic and -fPIC
192: do not work. */
193:
194: #define OVERRIDE_OPTIONS \
195: { \
196: if (flag_pic != 0) \
197: warning ("-fpic and -fPIC are not supported on the PA."); \
198: }
199:
1.1.1.3 ! root 200: /* Show we can debug even without a frame pointer. */
! 201: #define CAN_DEBUG_WITHOUT_FP
1.1 root 202:
203: /* Names to predefine in the preprocessor for this target machine. */
204:
1.1.1.2 root 205: #define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -D_HPUX_SOURCE -Dhp9000 -Dhp800 -Dspectrum -DREVARGV -Asystem(unix) -Asystem(bsd) -Acpu(hppa) -Amachine(hppa)"
1.1 root 206:
207: /* target machine storage layout */
208:
209: /* Define this if most significant bit is lowest numbered
210: in instructions that operate on numbered bit-fields. */
211: #define BITS_BIG_ENDIAN 1
212:
213: /* Define this if most significant byte of a word is the lowest numbered. */
214: /* That is true on the HP-PA. */
215: #define BYTES_BIG_ENDIAN 1
216:
217: /* Define this if most significant word of a multiword number is lowest
218: numbered. */
219: /* For the HP-PA we can decide arbitrarily
220: since there are no machine instructions for them. */
221: #define WORDS_BIG_ENDIAN 1
222:
223: /* number of bits in an addressable storage unit */
224: #define BITS_PER_UNIT 8
225:
226: /* Width in bits of a "word", which is the contents of a machine register.
227: Note that this is not necessarily the width of data type `int';
228: if using 16-bit ints on a 68000, this would still be 32.
229: But on a machine with 16-bit registers, this would be 16. */
230: #define BITS_PER_WORD 32
231:
232: /* Width of a word, in units (bytes). */
233: #define UNITS_PER_WORD 4
234:
235: /* Width in bits of a pointer.
236: See also the macro `Pmode' defined below. */
237: #define POINTER_SIZE 32
238:
239: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
240: #define PARM_BOUNDARY 32
241:
242: /* Largest alignment required for any stack parameter, in bits.
243: Don't define this if it is equal to PARM_BOUNDARY */
244: #define MAX_PARM_BOUNDARY 64
245:
246: /* Boundary (in *bits*) on which stack pointer should be aligned. */
1.1.1.2 root 247: #define STACK_BOUNDARY 512
1.1 root 248:
249: /* Allocation boundary (in *bits*) for the code of a function. */
250: #define FUNCTION_BOUNDARY 32
251:
252: /* Alignment of field after `int : 0' in a structure. */
253: #define EMPTY_FIELD_BOUNDARY 32
254:
255: /* Every structure's size must be a multiple of this. */
256: #define STRUCTURE_SIZE_BOUNDARY 8
257:
258: /* A bitfield declared as `int' forces `int' alignment for the struct. */
259: #define PCC_BITFIELD_TYPE_MATTERS 1
260:
261: /* No data type wants to be aligned rounder than this. */
262: #define BIGGEST_ALIGNMENT 64
263:
1.1.1.3 ! root 264: /* The .align directive in the HP assembler allows up to a 32 alignment. */
! 265: #define MAX_OFILE_ALIGNMENT 32768
! 266:
1.1 root 267: /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
268: #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
269: ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
270:
271: /* Make arrays of chars word-aligned for the same reasons. */
272: #define DATA_ALIGNMENT(TYPE, ALIGN) \
273: (TREE_CODE (TYPE) == ARRAY_TYPE \
274: && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
275: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
276:
277:
278: /* Set this nonzero if move instructions will actually fail to work
279: when given unaligned data. */
280: #define STRICT_ALIGNMENT 1
281:
282: /* Generate calls to memcpy, memcmp and memset. */
283: #define TARGET_MEM_FUNCTIONS
284:
285: /* Standard register usage. */
286:
287: /* Number of actual hardware registers.
288: The hardware registers are assigned numbers for the compiler
289: from 0 to just below FIRST_PSEUDO_REGISTER.
290: All registers that the compiler knows about must be given numbers,
291: even those that are not normally considered general registers.
292:
293: HP-PA 1.0 has 32 fullword registers and 16 floating point
294: registers. The floating point registers hold either word or double
295: word values.
1.1.1.3 ! root 296:
1.1 root 297: 16 additional registers are reserved.
1.1.1.3 ! root 298:
1.1 root 299: HP-PA 1.1 has 32 fullword registers and 32 floating point
300: registers. However, the floating point registers behave
301: differently: the left and right halves of registers are addressable
302: as 32 bit registers. So, we will set things up like the 68k which
303: has different fp units: define separate register sets for the 1.0
304: and 1.1 fp units. */
305:
1.1.1.3 ! root 306: #define FIRST_PSEUDO_REGISTER 89 /* 32 general regs + 56 fp regs +
! 307: + 1 shift reg */
1.1 root 308:
309: /* 1 for registers that have pervasive standard uses
310: and are not available for the register allocator.
311:
312: On the HP-PA, these are:
313: Reg 0 = 0 (hardware). However, 0 is used for condition code,
314: so is not fixed.
315: Reg 1 = ADDIL target/Temporary (hardware).
316: Reg 2 = Return Pointer
1.1.1.3 ! root 317: Reg 3 = Frame Pointer
! 318: Reg 4 = Frame Pointer (>8k varying frame with HP compilers only)
! 319: Reg 4-18 = Preserved Registers
1.1 root 320: Reg 19 = Linkage Table Register in HPUX 8.0 shared library scheme.
321: Reg 20-22 = Temporary Registers
322: Reg 23-26 = Temporary/Parameter Registers
323: Reg 27 = Global Data Pointer (hp)
324: Reg 28 = Temporary/???/Return Value register
325: Reg 29 = Temporary/Static Chain/Return Value register
326: Reg 30 = stack pointer
327: Reg 31 = Temporary/Millicode Return Pointer (hp)
328:
329: Freg 0-3 = Status Registers -- Not known to the compiler.
330: Freg 4-7 = Arguments/Return Value
331: Freg 8-11 = Temporary Registers
332: Freg 12-15 = Preserved Registers
333:
334: Freg 16-31 = Reserved
335:
336: On the Snake, fp regs are
337:
338: Freg 0-3 = Status Registers -- Not known to the compiler.
339: Freg 4L-7R = Arguments/Return Value
340: Freg 8L-11R = Temporary Registers
341: Freg 12L-21R = Preserved Registers
342: Freg 22L-31R = Temporary Registers
343:
344: */
345:
346: #define FIXED_REGISTERS \
347: {0, 0, 0, 0, 0, 0, 0, 0, \
348: 0, 0, 0, 0, 0, 0, 0, 0, \
349: 0, 0, 0, 0, 0, 0, 0, 0, \
350: 0, 0, 0, 1, 0, 0, 1, 0, \
1.1.1.3 ! root 351: /* fp registers */ \
1.1 root 352: 0, 0, 0, 0, 0, 0, 0, 0, \
353: 0, 0, 0, 0, 0, 0, 0, 0, \
354: 0, 0, 0, 0, 0, 0, 0, 0, \
355: 0, 0, 0, 0, 0, 0, 0, 0, \
356: 0, 0, 0, 0, 0, 0, 0, 0, \
357: 0, 0, 0, 0, 0, 0, 0, 0, \
358: 0, 0, 0, 0, 0, 0, 0, 0, \
359: 0}
360:
361: /* 1 for registers not available across function calls.
362: These must include the FIXED_REGISTERS and also any
363: registers that can be used without being saved.
364: The latter must include the registers where values are returned
365: and the register where structure-value addresses are passed.
366: Aside from that, you can include as many other registers as you like. */
367: #define CALL_USED_REGISTERS \
368: {1, 1, 1, 0, 0, 0, 0, 0, \
369: 0, 0, 0, 0, 0, 0, 0, 0, \
370: 0, 0, 0, 1, 1, 1, 1, 1, \
371: 1, 1, 1, 1, 1, 1, 1, 1, \
1.1.1.3 ! root 372: /* fp registers */ \
1.1 root 373: 1, 1, 1, 1, 1, 1, 1, 1, \
374: 1, 1, 1, 1, 1, 1, 1, 1, \
375: 0, 0, 0, 0, 0, 0, 0, 0, \
376: 0, 0, 0, 0, 0, 0, 0, 0, \
377: 0, 0, 0, 0, 1, 1, 1, 1, \
378: 1, 1, 1, 1, 1, 1, 1, 1, \
379: 1, 1, 1, 1, 1, 1, 1, 1, \
1.1.1.3 ! root 380: 1}
1.1 root 381:
382: #define CONDITIONAL_REGISTER_USAGE \
383: { \
384: if (!TARGET_SNAKE) \
385: { \
1.1.1.3 ! root 386: for (i = 56; i < 88; i++) \
! 387: fixed_regs[i] = call_used_regs[i] = 1; \
! 388: for (i = 33; i < 88; i += 2) \
1.1 root 389: fixed_regs[i] = call_used_regs[i] = 1; \
390: } \
391: else if (TARGET_DISABLE_FPREGS) \
392: { \
1.1.1.3 ! root 393: for (i = 32; i < 88; i++) \
1.1 root 394: fixed_regs[i] = call_used_regs[i] = 1; \
395: } \
396: if (flag_pic) \
397: fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
398: }
399:
1.1.1.3 ! root 400: /* Allocate the call used registers first. This should minimize
1.1 root 401: the number of registers that need to be saved (as call used
402: registers will generally not be allocated across a call).
403:
404: Experimentation has shown slightly better results by allocating
405: FP registers first. */
406:
407: #define REG_ALLOC_ORDER \
1.1.1.3 ! root 408: { \
! 409: /* caller-saved fp regs. */ \
! 410: 40, 41, 42, 43, 44, 45, 46, 47, \
! 411: 68, 69, 70, 71, 72, 73, 74, 75, \
! 412: 76, 77, 78, 79, 80, 81, 82, 83, \
! 413: 84, 85, 86, 87, \
! 414: 32, 33, 34, 35, 36, 37, 38, 39, \
1.1 root 415: /* caller-saved general regs. */ \
416: 19, 20, 21, 22, 23, 24, 25, 26, \
417: 27, 28, 29, 31, 2, \
1.1.1.3 ! root 418: /* callee-saved fp regs. */ \
! 419: 48, 49, 50, 51, 52, 53, 54, 55, \
! 420: 56, 57, 58, 59, 60, 61, 62, 63, \
! 421: 64, 65, 66, 67, \
1.1 root 422: /* callee-saved general regs. */ \
423: 3, 4, 5, 6, 7, 8, 9, 10, \
424: 11, 12, 13, 14, 15, 16, 17, 18, \
425: /* special registers. */ \
1.1.1.3 ! root 426: 1, 30, 0, 88}
1.1 root 427:
428:
1.1.1.3 ! root 429: /* True if register is floating-point. */
! 430: #define FP_REGNO_P(N) ((N) >= 32 && (N) <= 87)
! 431:
1.1 root 432: /* Return number of consecutive hard regs needed starting at reg REGNO
433: to hold something of mode MODE.
434: This is ordinarily the length in words of a value of mode MODE
435: but can be less for certain modes in special long registers.
436:
437: On the HP-PA, ordinary registers hold 32 bits worth;
438: The floating point registers are 64 bits wide. Snake fp regs are 32
439: bits wide */
1.1.1.3 ! root 440: #define HARD_REGNO_NREGS(REGNO, MODE) \
! 441: (!TARGET_SNAKE && FP_REGNO_P (REGNO) ? 1 \
! 442: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
1.1 root 443:
444: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
445: On the HP-PA, the cpu registers can hold any mode. We
446: force this to be an even register is it cannot hold the full mode. */
447: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
448: ((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
1.1.1.3 ! root 449: /* On 1.0 machines, don't allow wide non-fp modes in fp regs. */ \
! 450: : !TARGET_SNAKE && FP_REGNO_P (REGNO) \
! 451: ? GET_MODE_SIZE (MODE) <= 4 || GET_MODE_CLASS (MODE) == MODE_FLOAT \
! 452: /* Make wide modes be in aligned registers. */ \
! 453: : GET_MODE_SIZE (MODE) <= 4 || ((REGNO) & 1) == 0)
1.1 root 454:
455: /* Value is 1 if it is a good idea to tie two pseudo registers
456: when one has mode MODE1 and one has mode MODE2.
457: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
458: for any hard reg, then this must be 0 for correct output. */
459: #define MODES_TIEABLE_P(MODE1, MODE2) \
460: (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
461:
462: /* Specify the registers used for certain standard purposes.
463: The values of these macros are register numbers. */
464:
465: /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
466: /* #define PC_REGNUM */
467:
468: /* Register to use for pushing function arguments. */
469: #define STACK_POINTER_REGNUM 30
470:
471: /* Base register for access to local variables of the function. */
1.1.1.3 ! root 472: #define FRAME_POINTER_REGNUM 3
1.1 root 473:
474: /* Value should be nonzero if functions must have frame pointers. */
475: #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
1.1.1.3 ! root 476:
1.1 root 477:
478: /* C statement to store the difference between the frame pointer
479: and the stack pointer values immediately after the function prologue.
480:
481: Note, we always pretend that this is a leaf function because if
482: it's not, there's no point in trying to eliminate the
483: frame pointer. If it is a leaf function, we guessed right! */
484: #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
485: do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
486:
487: /* Base register for access to arguments of the function. */
1.1.1.3 ! root 488: #define ARG_POINTER_REGNUM 3
1.1 root 489:
490: /* Register in which static-chain is passed to a function. */
491: /* ??? */
492: #define STATIC_CHAIN_REGNUM 29
493:
494: /* Register which holds offset table for position-independent
495: data references. */
496:
497: #define PIC_OFFSET_TABLE_REGNUM 19
498:
499: #define FINALIZE_PIC finalize_pic ()
500:
1.1.1.2 root 501: /* SOM ABI says that objects larger than 64 bits are returned in memory. */
502: #define RETURN_IN_MEMORY(TYPE) \
503: (TYPE_MODE (TYPE) == BLKmode || int_size_in_bytes (TYPE) > 8)
504:
1.1 root 505: /* Register in which address to store a structure value
506: is passed to a function. */
507: #define STRUCT_VALUE_REGNUM 28
508:
509: /* Define the classes of registers for register constraints in the
510: machine description. Also define ranges of constants.
511:
512: One of the classes must always be named ALL_REGS and include all hard regs.
513: If there is more than one class, another class must be named NO_REGS
514: and contain no registers.
515:
516: The name GENERAL_REGS must be the name of a class (or an alias for
517: another name such as ALL_REGS). This is the class of registers
518: that is allowed by "g" or "r" in a register constraint.
519: Also, registers outside this class are allocated only when
520: instructions express preferences for them.
521:
522: The classes must be numbered in nondecreasing order; that is,
523: a larger-numbered class must never be contained completely
524: in a smaller-numbered class.
525:
526: For any two classes, it is very desirable that there be another
527: class that represents their union. */
528:
529: /* The HP-PA has four kinds of registers: general regs, 1.0 fp regs,
530: 1.1 fp regs, and the high 1.1 fp regs, to which the operands of
1.1.1.3 ! root 531: fmpyadd and fmpysub are restricted. */
1.1 root 532:
533: enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, GENERAL_OR_FP_REGS,
1.1.1.3 ! root 534: SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES};
1.1 root 535:
536: #define N_REG_CLASSES (int) LIM_REG_CLASSES
537:
538: /* Give names of register classes as strings for dump file. */
539:
540: #define REG_CLASS_NAMES \
1.1.1.3 ! root 541: {"NO_REGS", "R1_REGS", "GENERAL_REGS", "FP_REGS", \
! 542: "GENERAL_OR_FP_REGS", "SHIFT_REGS", "ALL_REGS"}
1.1 root 543:
544: /* Define which registers fit in which classes.
545: This is an initializer for a vector of HARD_REG_SET
546: of length N_REG_CLASSES. Register 0, the "condition code" register,
547: is in no class. */
548:
549: #define REG_CLASS_CONTENTS \
1.1.1.3 ! root 550: {{0x00000000, 0x00000000, 0x00000000}, /* NO_REGS */ \
! 551: {0x00000002, 0x00000000, 0x00000000}, /* R1_REGS */ \
! 552: {0xfffffffe, 0x00000000, 0x00000000}, /* GENERAL_REGS */ \
! 553: {0x00000000, 0xffffffff, 0x00ffffff}, /* FP_REGS */ \
! 554: {0xfffffffe, 0xffffffff, 0x00ffffff}, /* GENERAL_OR_FP_REGS */ \
! 555: {0x00000000, 0x00000000, 0x01000000}, /* SHIFT_REGS */ \
! 556: {0xfffffffe, 0xffffffff, 0x01ffffff}} /* ALL_REGS */
1.1 root 557:
558: /* The same information, inverted:
559: Return the class number of the smallest class containing
560: reg number REGNO. This could be a conditional expression
561: or could index an array. */
562:
1.1.1.3 ! root 563: #define REGNO_REG_CLASS(REGNO) \
! 564: ((REGNO) == 0 ? NO_REGS \
! 565: : (REGNO) == 1 ? R1_REGS \
! 566: : (REGNO) < 32 ? GENERAL_REGS \
! 567: : (REGNO) < 88 ? FP_REGS \
1.1 root 568: : SHIFT_REGS)
569:
570: /* The class value for index registers, and the one for base regs. */
571: #define INDEX_REG_CLASS GENERAL_REGS
572: #define BASE_REG_CLASS GENERAL_REGS
573:
574: #define FP_REG_CLASS_P(CLASS) \
1.1.1.3 ! root 575: ((CLASS) == FP_REGS)
1.1 root 576:
1.1.1.3 ! root 577: /* Get reg_class from a letter such as appears in the machine description. */
! 578: /* Keep 'x' for backward compatibility with user asm. */
1.1 root 579: #define REG_CLASS_FROM_LETTER(C) \
1.1.1.3 ! root 580: ((C) == 'f' ? FP_REGS : \
! 581: (C) == 'x' ? FP_REGS : \
! 582: (C) == 'q' ? SHIFT_REGS : \
! 583: (C) == 'a' ? R1_REGS : \
! 584: (C) == 'Z' ? ALL_REGS : NO_REGS)
1.1 root 585:
586: /* The letters I, J, K, L and M in a register constraint string
587: can be used to stand for particular ranges of immediate operands.
588: This macro defines what the ranges are.
589: C is the letter, and VALUE is a constant value.
590: Return 1 if VALUE is in the range specified by C.
591:
592: `I' is used for the 11 bit constants.
593: `J' is used for the 14 bit constants.
594: `K' is used for values that can be moved with a zdepi insn.
595: `L' is used for the 5 bit constants.
596: `M' is used for 0.
597: `N' is used for values with the least significant 11 bits equal to zero.
598: `O' is used for numbers n such that n+1 is a power of 2.
599: */
600:
601: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
602: ((C) == 'I' ? VAL_11_BITS_P (VALUE) \
603: : (C) == 'J' ? VAL_14_BITS_P (VALUE) \
604: : (C) == 'K' ? zdepi_cint_p (VALUE) \
605: : (C) == 'L' ? VAL_5_BITS_P (VALUE) \
606: : (C) == 'M' ? (VALUE) == 0 \
607: : (C) == 'N' ? ((VALUE) & 0x7ff) == 0 \
608: : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \
609: : (C) == 'P' ? and_mask_p (VALUE) \
610: : 0)
611:
612: /* Similar, but for floating or large integer constants, and defining letters
613: G and H. Here VALUE is the CONST_DOUBLE rtx itself.
614:
615: For PA, `G' is the floating-point constant zero. `H' is undefined. */
616:
617: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
618: ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
619: && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
620: : 0)
621:
622: /* Given an rtx X being reloaded into a reg required to be
623: in class CLASS, return the class of reg to actually use.
624: In general this is just CLASS; but on some machines
625: in some cases it is preferable to use a more restrictive class. */
626: #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
627:
628: /* Return the register class of a scratch register needed to copy IN into
629: or out of a register in CLASS in MODE. If it can be done directly,
630: NO_REGS is returned. */
631:
632: #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
633: secondary_reload_class (CLASS, MODE, IN)
634:
1.1.1.3 ! root 635: /* On the PA it is not possible to directly move data between
1.1 root 636: GENERAL_REGS and FP_REGS. */
637: #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
1.1.1.3 ! root 638: (FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2))
1.1 root 639:
640: /* Return the stack location to use for secondary memory needed reloads. */
641: #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \
642: gen_rtx (MEM, MODE, gen_rtx (PLUS, Pmode, stack_pointer_rtx, GEN_INT (-16)))
643:
644: /* Return the maximum number of consecutive registers
645: needed to represent mode MODE in a register of class CLASS. */
1.1.1.3 ! root 646: #define CLASS_MAX_NREGS(CLASS, MODE) \
! 647: (!TARGET_SNAKE && (CLASS) == FP_REGS ? 1 : \
! 648: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
1.1 root 649:
650: /* Stack layout; function entry, exit and calling. */
651:
652: /* Define this if pushing a word on the stack
653: makes the stack pointer a smaller address. */
654: /* #define STACK_GROWS_DOWNWARD */
655:
656: /* Believe it or not. */
657: #define ARGS_GROW_DOWNWARD
658:
659: /* Define this if the nominal address of the stack frame
660: is at the high-address end of the local variables;
661: that is, each additional local variable allocated
662: goes at a more negative offset in the frame. */
663: /* #define FRAME_GROWS_DOWNWARD */
664:
665: /* Offset within stack frame to start allocating local variables at.
666: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
667: first local allocated. Otherwise, it is the offset to the BEGINNING
668: of the first local allocated. */
669: #define STARTING_FRAME_OFFSET 8
670:
671: /* If we generate an insn to push BYTES bytes,
672: this says how many the stack pointer really advances by.
673: On the HP-PA, don't define this because there are no push insns. */
674: /* #define PUSH_ROUNDING(BYTES) */
675:
676: /* Offset of first parameter from the argument pointer register value.
677: This value will be negated because the arguments grow down.
678: Also note that on STACK_GROWS_UPWARD machines (such as this one)
679: this is the distance from the frame pointer to the end of the first
680: argument, not it's beginning. To get the real offset of the first
681: argument, the size of the argument must be added.
682:
683: ??? Have to check on this.*/
684:
1.1.1.3 ! root 685: #define FIRST_PARM_OFFSET(FNDECL) -32
1.1 root 686:
687: /* Absolute value of offset from top-of-stack address to location to store the
688: function parameter if it can't go in a register.
689: Addresses for following parameters are computed relative to this one. */
1.1.1.3 ! root 690: #define FIRST_PARM_CALLER_OFFSET(FNDECL) -32
1.1 root 691:
692:
693: /* When a parameter is passed in a register, stack space is still
694: allocated for it. */
695: #define REG_PARM_STACK_SPACE(DECL) 16
696:
697: /* Define this if the above stack space is to be considered part of the
698: space allocated by the caller. */
699: #define OUTGOING_REG_PARM_STACK_SPACE
700:
701: /* Keep the stack pointer constant throughout the function.
702: This is both an optimization and a necessity: longjmp
703: doesn't behave itself when the stack pointer moves within
704: the function! */
705: #define ACCUMULATE_OUTGOING_ARGS
1.1.1.3 ! root 706:
! 707: /* The weird HPPA calling conventions require a minimum of 48 bytes on
1.1 root 708: the stack: 16 bytes for register saves, and 32 bytes for magic.
709: This is the difference between the logical top of stack and the
1.1.1.3 ! root 710: actual sp. */
1.1 root 711: #define STACK_POINTER_OFFSET -32
712:
713: #define STACK_DYNAMIC_OFFSET(FNDECL) \
714: ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size)
715:
716: /* Value is 1 if returning from a function call automatically
717: pops the arguments described by the number-of-args field in the call.
718: FUNTYPE is the data type of the function (as a tree),
719: or for a library call it is an identifier node for the subroutine name. */
720:
721: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
722:
723: /* Define how to find the value returned by a function.
724: VALTYPE is the data type of the value (as a tree).
725: If the precise function being called is known, FUNC is its FUNCTION_DECL;
726: otherwise, FUNC is 0. */
727:
728: /* On the HP-PA the value is found in register(s) 28(-29), unless
729: the mode is SF or DF. Then the value is returned in fr4 (32, ) */
730:
731:
732: #define FUNCTION_VALUE(VALTYPE, FUNC) \
1.1.1.3 ! root 733: gen_rtx (REG, TYPE_MODE (VALTYPE), ((TYPE_MODE (VALTYPE) == SFmode || \
1.1 root 734: TYPE_MODE (VALTYPE) == DFmode) ? \
1.1.1.3 ! root 735: 32 : 28))
1.1 root 736:
737: /* Define how to find the value returned by a library function
738: assuming the value has mode MODE. */
739:
740: #define LIBCALL_VALUE(MODE) \
1.1.1.3 ! root 741: gen_rtx (REG, MODE, ((MODE) == SFmode || (MODE) == DFmode ? 32 : 28))
1.1 root 742:
743: /* 1 if N is a possible register number for a function value
744: as seen by the caller. */
745:
1.1.1.3 ! root 746: #define FUNCTION_VALUE_REGNO_P(N) \
! 747: ((N) == 28 || (N) == 32)
1.1 root 748:
749: /* 1 if N is a possible register number for function argument passing. */
750:
1.1.1.3 ! root 751: #define FUNCTION_ARG_REGNO_P(N) \
! 752: (((N) >= 23 && (N) <= 26) || ((N) >= 32 && (N) <= 39))
1.1 root 753:
754: /* Define a data type for recording info about an argument list
755: during the scan of that argument list. This data type should
756: hold all necessary information about the function itself
757: and about the args processed so far, enough to enable macros
758: such as FUNCTION_ARG to determine where the next arg should go.
759:
760: On the HP-PA, this is a single integer, which is a number of words
761: of arguments scanned so far (including the invisible argument,
762: if any, which holds the structure-value-address).
763: Thus 4 or more means all following args should go on the stack. */
764:
1.1.1.3 ! root 765: struct hppa_args {int words, nargs_prototype; };
! 766:
! 767: #define CUMULATIVE_ARGS struct hppa_args
1.1 root 768:
769: /* Initialize a variable CUM of type CUMULATIVE_ARGS
770: for a call to a function whose data type is FNTYPE.
1.1.1.3 ! root 771: For a library call, FNTYPE is 0. */
! 772:
! 773: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
! 774: (CUM).words = 0, \
! 775: (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
! 776: ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
! 777: + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
! 778: || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \
! 779: : 0)
! 780:
! 781:
! 782:
! 783: /* Similar, but when scanning the definition of a procedure. We always
! 784: set NARGS_PROTOTYPE large so we never return an EXPR_LIST. */
1.1 root 785:
1.1.1.3 ! root 786: #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
! 787: (CUM).words = 0, \
! 788: (CUM).nargs_prototype = 1000
1.1 root 789:
790: /* Figure out the size in words of the function argument. */
791:
792: #define FUNCTION_ARG_SIZE(MODE, TYPE) \
793: ((((MODE) != BLKmode ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE))+3)/4)
794:
795: /* Update the data in CUM to advance over an argument
796: of mode MODE and data type TYPE.
797: (TYPE is null for libcalls where that information may not be available.) */
798:
799: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1.1.1.3 ! root 800: { (CUM).nargs_prototype--; \
! 801: ((((CUM).words & 01) && (TYPE) != 0 \
! 802: && FUNCTION_ARG_SIZE(MODE, TYPE) > 1) \
! 803: && (CUM).words++), \
! 804: (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE); \
! 805: }
1.1 root 806:
807: /* Determine where to put an argument to a function.
808: Value is zero to push the argument on the stack,
809: or a hard register in which to store the argument.
810:
811: MODE is the argument's machine mode.
812: TYPE is the data type of the argument (as a tree).
813: This is null for libcalls where that information may
814: not be available.
815: CUM is a variable of type CUMULATIVE_ARGS which gives info about
816: the preceding args and about the function being called.
817: NAMED is nonzero if this argument is a named parameter
1.1.1.3 ! root 818: (otherwise it is an extra parameter matching an ellipsis).
1.1 root 819:
1.1.1.3 ! root 820: On the HP-PA the first four words of args are normally in registers
1.1 root 821: and the rest are pushed. But any arg that won't entirely fit in regs
822: is pushed.
823:
824: Arguments passed in registers are either 1 or 2 words long.
825:
826: The caller must make a distinction between calls to explicitly named
827: functions and calls through pointers to functions -- the conventions
828: are different! Calls through pointers to functions only use general
1.1.1.3 ! root 829: registers for the first four argument words. Note the indirect function
! 830: calling conventions are in effect during TARGET_LONG_CALLS, but
! 831: current_call_is_indirect will not be set in such situations.
! 832:
! 833: Of course all this is different for the portable runtime model
! 834: HP wants everyone to use for ELF. Ugh. Here's a quick description
! 835: of how it's supposed to work.
! 836:
! 837: 1) callee side remains unchanged. It expects integer args to be
! 838: in the integer registers, float args in the float registers and
! 839: unnamed args in integer registers.
! 840:
! 841: 2) caller side now depends on if the function being called has
! 842: a prototype in scope (rather than if it's being called indirectly).
! 843:
! 844: 2a) If there is a prototype in scope, then arguments are passed
! 845: according to their type (ints in integer registers, floats in float
! 846: registers, unnamed args in integer registers.
! 847:
! 848: 2b) If there is no prototype in scope, then floating point arguments
! 849: are passed in both integer and float registers. egad.
! 850:
! 851: FYI: The portable parameter passing conventions are almost exactly like
! 852: the standard parameter passing conventions on the RS6000. That's why
! 853: you'll see lots of similar code in rs6000.h. */
1.1 root 854:
855: #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
856:
1.1.1.3 ! root 857: /* Do not expect to understand this without reading it several times. I'm
! 858: tempted to try and simply it, but I worry about breaking something. */
1.1 root 859:
1.1.1.3 ! root 860: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
! 861: (4 >= ((CUM).words + FUNCTION_ARG_SIZE ((MODE), (TYPE))) \
! 862: ? (!TARGET_PORTABLE_RUNTIME || (TYPE) == 0 \
! 863: || !FLOAT_MODE_P (MODE) || (CUM).nargs_prototype > 0) \
! 864: ? gen_rtx (REG, (MODE), \
! 865: (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
! 866: ? (((!(current_call_is_indirect || TARGET_LONG_CALLS) \
! 867: || TARGET_PORTABLE_RUNTIME) \
! 868: && (MODE) == DFmode) \
! 869: ? ((CUM).words ? 38 : 34) \
! 870: : ((CUM).words ? 23 : 25)) \
! 871: : (((!(current_call_is_indirect || TARGET_LONG_CALLS) \
! 872: || TARGET_PORTABLE_RUNTIME) \
! 873: && (MODE) == SFmode) \
! 874: ? (32 + 2 * (CUM).words) \
! 875: : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE), \
! 876: (TYPE))))))\
! 877: /* We are calling a non-prototyped function with floating point \
! 878: arguments using the portable conventions. */ \
! 879: : gen_rtx (EXPR_LIST, VOIDmode, \
! 880: gen_rtx (REG, (MODE), \
! 881: (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
! 882: ? ((CUM).words ? 38 : 34) \
! 883: : (32 + 2 * (CUM).words))), \
! 884: gen_rtx (REG, (MODE), \
! 885: (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
! 886: ? ((CUM).words ? 23 : 25) \
! 887: : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE),\
! 888: (TYPE)))))) \
! 889: /* Pass this parameter in the stack. */ \
! 890: : 0)
1.1 root 891:
892: /* For an arg passed partly in registers and partly in memory,
893: this is the number of registers used.
894: For args passed entirely in registers or entirely in memory, zero. */
895:
896: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
897:
898: /* If defined, a C expression that gives the alignment boundary, in
899: bits, of an argument with the specified mode and type. If it is
900: not defined, `PARM_BOUNDARY' is used for all arguments. */
901:
902: #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
903: (((TYPE) != 0) \
1.1.1.2 root 904: ? (((int_size_in_bytes (TYPE)) + 3) / 4) * BITS_PER_WORD \
1.1 root 905: : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
906: ? PARM_BOUNDARY \
907: : GET_MODE_ALIGNMENT(MODE)))
908:
909: /* Arguments larger than eight bytes are passed by invisible reference */
910:
911: #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
912: ((TYPE) && int_size_in_bytes (TYPE) > 8)
913:
914: extern struct rtx_def *hppa_compare_op0, *hppa_compare_op1;
915: extern enum cmp_type hppa_branch_type;
916:
917: /* Output the label for a function definition. */
1.1.1.2 root 918: #ifndef HP_FP_ARG_DESCRIPTOR_REVERSED
1.1 root 919: #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
920: do { fprintf (FILE, ",ARGW%d=FR", (ARG0)); \
921: fprintf (FILE, ",ARGW%d=FU", (ARG1));} while (0)
922: #else
923: #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
924: do { fprintf (FILE, ",ARGW%d=FU", (ARG0)); \
925: fprintf (FILE, ",ARGW%d=FR", (ARG1));} while (0)
926: #endif
927:
928: #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
929: do { tree fntype = TREE_TYPE (TREE_TYPE (DECL)); \
930: tree tree_type = TREE_TYPE (DECL); \
931: tree parm; \
932: int i; \
1.1.1.2 root 933: if (TREE_PUBLIC (DECL) || TARGET_GAS) \
1.1 root 934: { extern int current_function_varargs; \
1.1.1.2 root 935: if (TREE_PUBLIC (DECL)) \
936: { \
937: fputs ("\t.EXPORT ", FILE); \
938: assemble_name (FILE, NAME); \
939: fputs (",ENTRY,PRIV_LEV=3", FILE); \
940: } \
941: else \
942: { \
943: fputs ("\t.PARAM ", FILE); \
944: assemble_name (FILE, NAME); \
945: } \
1.1.1.3 ! root 946: if (TARGET_PORTABLE_RUNTIME) \
! 947: { \
! 948: fputs (",ARGW0=NO,ARGW1=NO,ARGW2=NO,ARGW3=NO,", FILE); \
! 949: fputs ("RTNVAL=NO\n", FILE); \
! 950: break; \
! 951: } \
1.1 root 952: for (parm = DECL_ARGUMENTS (DECL), i = 0; parm && i < 4; \
953: parm = TREE_CHAIN (parm)) \
954: { \
955: if (TYPE_MODE (DECL_ARG_TYPE (parm)) == SFmode) \
956: fprintf (FILE, ",ARGW%d=FR", i++); \
957: else if (TYPE_MODE (DECL_ARG_TYPE (parm)) == DFmode) \
958: { \
959: if (i <= 2) \
960: { \
961: if (i == 1) i++; \
962: ASM_DOUBLE_ARG_DESCRIPTORS (FILE, i++, i++); \
963: } \
964: else \
965: break; \
966: } \
967: else \
968: { \
969: int arg_size = \
970: FUNCTION_ARG_SIZE (TYPE_MODE (DECL_ARG_TYPE (parm)),\
971: DECL_ARG_TYPE (parm)); \
972: if (arg_size == 2 && i <= 2) \
973: { \
974: if (i == 1) i++; \
975: fprintf (FILE, ",ARGW%d=GR", i++); \
976: fprintf (FILE, ",ARGW%d=GR", i++); \
977: } \
978: else if (arg_size == 1) \
979: fprintf (FILE, ",ARGW%d=GR", i++); \
980: else \
981: i += arg_size; \
982: } \
983: } \
984: /* anonymous args */ \
985: if ((TYPE_ARG_TYPES (tree_type) != 0 \
986: && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (tree_type)))\
987: != void_type_node)) \
988: || current_function_varargs) \
989: { \
990: for (; i < 4; i++) \
991: fprintf (FILE, ",ARGW%d=GR", i); \
992: } \
993: if (TYPE_MODE (fntype) == DFmode) \
994: fprintf (FILE, ",RTNVAL=FR"); \
995: else if (TYPE_MODE (fntype) == SFmode) \
996: fprintf (FILE, ",RTNVAL=FU"); \
997: else if (fntype != void_type_node) \
998: fprintf (FILE, ",RTNVAL=GR"); \
999: fputs ("\n", FILE); \
1.1.1.3 ! root 1000: }} while (0)
1.1 root 1001:
1002: /* This macro generates the assembly code for function entry.
1003: FILE is a stdio stream to output the code to.
1004: SIZE is an int: how many units of temporary storage to allocate.
1005: Refer to the array `regs_ever_live' to determine which registers
1006: to save; `regs_ever_live[I]' is nonzero if register number I
1007: is ever used in the function. This macro is responsible for
1008: knowing which registers should not be saved even if used. */
1009:
1010: /* On HP-PA, move-double insns between fpu and cpu need an 8-byte block
1011: of memory. If any fpu reg is used in the function, we allocate
1012: such a block here, at the bottom of the frame, just in case it's needed.
1013:
1014: If this function is a leaf procedure, then we may choose not
1015: to do a "save" insn. The decision about whether or not
1016: to do this is made in regclass.c. */
1017:
1018: #define FUNCTION_PROLOGUE(FILE, SIZE) \
1019: output_function_prologue (FILE, SIZE)
1020:
1021: /* Output assembler code to FILE to increment profiler label # LABELNO
1022: for profiling a function entry.
1023:
1024: Because HPUX _mcount is so different, we actually emit the
1025: profiling code in function_prologue. This just stores LABELNO for
1026: that. */
1027:
1028: #define PROFILE_BEFORE_PROLOGUE
1029: #define FUNCTION_PROFILER(FILE, LABELNO) \
1030: { extern int hp_profile_labelno; hp_profile_labelno = (LABELNO);}
1031:
1032: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1033: the stack pointer does not matter. The value is tested only in
1034: functions that have frame pointers.
1035: No definition is equivalent to always zero. */
1036:
1037: extern int may_call_alloca;
1038: extern int current_function_pretend_args_size;
1039:
1040: #define EXIT_IGNORE_STACK \
1041: (get_frame_size () != 0 \
1042: || current_function_calls_alloca || current_function_outgoing_args_size)
1043:
1044:
1045: /* This macro generates the assembly code for function exit,
1046: on machines that need it. If FUNCTION_EPILOGUE is not defined
1047: then individual return instructions are generated for each
1048: return statement. Args are same as for FUNCTION_PROLOGUE.
1049:
1050: The function epilogue should not depend on the current stack pointer!
1051: It should use the frame pointer only. This is mandatory because
1052: of alloca; we also take advantage of it to omit stack adjustments
1053: before returning. */
1054:
1055: /* This declaration is needed due to traditional/ANSI
1056: incompatibilities which cannot be #ifdefed away
1057: because they occur inside of macros. Sigh. */
1058: extern union tree_node *current_function_decl;
1059:
1060: #define FUNCTION_EPILOGUE(FILE, SIZE) \
1061: output_function_epilogue (FILE, SIZE)
1062:
1063: /* Output assembler code for a block containing the constant parts
1064: of a trampoline, leaving space for the variable parts.\
1065:
1066: The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
1067: and then branches to the specified routine.
1068:
1069: This code template is copied from text segment to stack location
1070: and then patched with INITIALIZE_TRAMPOLINE to contain
1.1.1.3 ! root 1071: valid values, and then entered as a subroutine.
1.1 root 1072:
1.1.1.3 ! root 1073: It is best to keep this as small as possible to avoid having to
1.1 root 1074: flush multiple lines in the cache. */
1075:
1076: #define TRAMPOLINE_TEMPLATE(FILE) \
1.1.1.2 root 1077: { \
1078: fprintf (FILE, "\tldw 36(0,%%r22),%%r21\n"); \
1079: fprintf (FILE, "\tbb,>=,n %%r21,30,.+16\n"); \
1080: fprintf (FILE, "\tdepi 0,31,2,%%r21\n"); \
1081: fprintf (FILE, "\tldw 4(0,%%r21),%%r19\n"); \
1082: fprintf (FILE, "\tldw 0(0,%%r21),%%r21\n"); \
1083: fprintf (FILE, "\tldsid (0,%%r21),%%r1\n"); \
1084: fprintf (FILE, "\tmtsp %%r1,%%sr0\n"); \
1085: fprintf (FILE, "\tbe 0(%%sr0,%%r21)\n"); \
1086: fprintf (FILE, "\tldw 40(0,%%r22),%%r29\n"); \
1087: fprintf (FILE, "\t.word 0\n"); \
1088: fprintf (FILE, "\t.word 0\n"); \
1089: }
1.1 root 1090:
1091: /* Length in units of the trampoline for entering a nested function.
1092:
1093: Flush the cache entries corresponding to the first and last addresses
1094: of the trampoline. This is necessary as the trampoline may cross two
1.1.1.3 ! root 1095: cache lines.
1.1 root 1096:
1.1.1.2 root 1097: If the code part of the trampoline ever grows to > 32 bytes, then it
1098: will become necessary to hack on the cacheflush pattern in pa.md. */
1.1 root 1099:
1.1.1.2 root 1100: #define TRAMPOLINE_SIZE (11 * 4)
1.1 root 1101:
1102: /* Emit RTL insns to initialize the variable parts of a trampoline.
1103: FNADDR is an RTX for the address of the function's pure code.
1104: CXT is an RTX for the static chain value for the function.
1105:
1106: Move the function address to the trampoline template at offset 12.
1107: Move the static chain value to trampoline template at offset 16. */
1108:
1109: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1.1.1.2 root 1110: { \
1.1.1.3 ! root 1111: rtx start_addr, end_addr; \
1.1.1.2 root 1112: \
1113: start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
1114: emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (FNADDR)); \
1115: start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
1116: emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (CXT)); \
1117: /* fdc and fic only use registers for the address to flush, \
1118: they do not accept integer displacements. */ \
1119: start_addr = force_reg (SImode, (TRAMP)); \
1120: end_addr = force_reg (SImode, plus_constant ((TRAMP), 32)); \
1121: emit_insn (gen_dcacheflush (start_addr, end_addr)); \
1.1.1.3 ! root 1122: end_addr = force_reg (SImode, plus_constant (start_addr, 32)); \
! 1123: emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
1.1.1.2 root 1124: gen_reg_rtx (SImode), gen_reg_rtx (SImode)));\
1.1 root 1125: }
1126:
1127: /* Emit code for a call to builtin_saveregs. We must emit USE insns which
1128: reference the 4 integer arg registers and 4 fp arg registers.
1129: Ordinarily they are not call used registers, but they are for
1130: _builtin_saveregs, so we must make this explicit. */
1131:
1132: #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) (rtx)hppa_builtin_saveregs (ARGLIST)
1133:
1134:
1135: /* Addressing modes, and classification of registers for them. */
1136:
1137: #define HAVE_POST_INCREMENT
1138: #define HAVE_POST_DECREMENT
1139:
1140: #define HAVE_PRE_DECREMENT
1141: #define HAVE_PRE_INCREMENT
1142:
1143: /* Macros to check register numbers against specific register classes. */
1144:
1145: /* These assume that REGNO is a hard or pseudo reg number.
1146: They give nonzero only if REGNO is a hard reg of the suitable class
1147: or a pseudo reg currently allocated to a suitable hard reg.
1148: Since they use reg_renumber, they are safe only once reg_renumber
1149: has been allocated, which happens in local-alloc.c. */
1150:
1151: #define REGNO_OK_FOR_INDEX_P(REGNO) \
1152: ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1153: #define REGNO_OK_FOR_BASE_P(REGNO) \
1154: ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1155: #define REGNO_OK_FOR_FP_P(REGNO) \
1.1.1.3 ! root 1156: (FP_REGNO_P (REGNO) || FP_REGNO_P (reg_renumber[REGNO]))
1.1 root 1157:
1158: /* Now macros that check whether X is a register and also,
1159: strictly, whether it is in a specified class.
1160:
1161: These macros are specific to the the HP-PA, and may be used only
1162: in code for printing assembler insns and in conditions for
1163: define_optimization. */
1164:
1165: /* 1 if X is an fp register. */
1166:
1167: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1168:
1169: /* Maximum number of registers that can appear in a valid memory address. */
1170:
1171: #define MAX_REGS_PER_ADDRESS 2
1172:
1173: /* Recognize any constant value that is a valid address except
1174: for symbolic addresses. We get better CSE by rejecting them
1175: here and allowing hppa_legitimize_address to break them up. We
1176: use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
1177:
1178: #define CONSTANT_ADDRESS_P(X) \
1179: ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1180: || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1181: || GET_CODE (X) == HIGH) \
1182: && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
1183:
1184: /* Include all constant integers and constant doubles, but not
1.1.1.3 ! root 1185: floating-point, except for floating-point zero. */
1.1 root 1186:
1187: #define LEGITIMATE_CONSTANT_P(X) \
1.1.1.3 ! root 1188: (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
! 1189: || (X) == CONST0_RTX (GET_MODE (X)))
1.1 root 1190:
1.1.1.3 ! root 1191: /* Subroutine for EXTRA_CONSTRAINT.
1.1 root 1192:
1193: Return 1 iff OP is a pseudo which did not get a hard register and
1194: we are running the reload pass. */
1195:
1196: #define IS_RELOADING_PSEUDO_P(OP) \
1197: ((reload_in_progress \
1198: && GET_CODE (OP) == REG \
1199: && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1200: && reg_renumber [REGNO (OP)] < 0))
1201:
1202: /* Optional extra constraints for this machine. Borrowed from sparc.h.
1203:
1204: For the HPPA, `Q' means that this is a memory operand but not a
1205: symbolic memory operand. Note that an unassigned pseudo register
1206: is such a memory operand. Needed because reload will generate
1207: these things in insns and then not re-recognize the insns, causing
1208: constrain_operands to fail.
1209:
1210: Also note `Q' accepts any memory operand during the reload pass.
1.1.1.3 ! root 1211: This includes out-of-range displacements in reg+d addressing.
1.1 root 1212: This makes for better code. (??? For 2.5 address this issue).
1213:
1214: `R' is unused.
1215:
1.1.1.2 root 1216: `S' is unused.
1.1 root 1217:
1218: `T' is for fp loads and stores. */
1219: #define EXTRA_CONSTRAINT(OP, C) \
1220: ((C) == 'Q' ? \
1221: (IS_RELOADING_PSEUDO_P (OP) \
1222: || (GET_CODE (OP) == MEM \
1223: && reload_in_progress) \
1224: || (GET_CODE (OP) == MEM \
1225: && memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1226: && ! symbolic_memory_operand (OP, VOIDmode))) \
1227: : ((C) == 'T' ? \
1228: (GET_CODE (OP) == MEM \
1229: /* Using DFmode forces only short displacements \
1230: to be recognized as valid in reg+d addresses. */\
1.1.1.2 root 1231: && memory_address_p (DFmode, XEXP (OP, 0))) : 0))
1.1 root 1232:
1233: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1234: and check its validity for a certain class.
1235: We have two alternate definitions for each of them.
1236: The usual definition accepts all pseudo regs; the other rejects
1237: them unless they have been allocated suitable hard regs.
1238: The symbol REG_OK_STRICT causes the latter definition to be used.
1239:
1240: Most source files want to accept pseudo regs in the hope that
1241: they will get allocated to the class that the insn wants them to be in.
1242: Source files for reload pass need to be strict.
1243: After reload, it makes no difference, since pseudo regs have
1244: been eliminated by then. */
1245:
1246: #ifndef REG_OK_STRICT
1247:
1248: /* Nonzero if X is a hard reg that can be used as an index
1249: or if it is a pseudo reg. */
1250: #define REG_OK_FOR_INDEX_P(X) \
1251: (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1252: /* Nonzero if X is a hard reg that can be used as a base reg
1253: or if it is a pseudo reg. */
1254: #define REG_OK_FOR_BASE_P(X) \
1255: (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1256:
1257: #else
1258:
1259: /* Nonzero if X is a hard reg that can be used as an index. */
1260: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1261: /* Nonzero if X is a hard reg that can be used as a base reg. */
1262: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1263:
1264: #endif
1265:
1266: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1267: that is a valid memory address for an instruction.
1268: The MODE argument is the machine mode for the MEM expression
1269: that wants to use this address.
1270:
1271: On the HP-PA, the actual legitimate addresses must be
1272: REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1273: But we can treat a SYMBOL_REF as legitimate if it is part of this
1274: function's constant-pool, because such addresses can actually
1.1.1.3 ! root 1275: be output as REG+SMALLINT.
! 1276:
! 1277: Note we only allow 5 bit immediates for access to a constant address;
! 1278: doing so avoids losing for loading/storing a FP register at an address
! 1279: which will not fit in 5 bits. */
1.1 root 1280:
1281: #define VAL_5_BITS_P(X) ((unsigned)(X) + 0x10 < 0x20)
1282: #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1283:
1284: #define VAL_U5_BITS_P(X) ((unsigned)(X) < 0x20)
1285: #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1286:
1287: #define VAL_11_BITS_P(X) ((unsigned)(X) + 0x400 < 0x800)
1288: #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1289:
1290: #define VAL_14_BITS_P(X) ((unsigned)(X) + 0x2000 < 0x4000)
1291: #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1292:
1293: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1294: { \
1295: if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1296: || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1297: || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1298: && REG_P (XEXP (X, 0)) \
1299: && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1300: goto ADDR; \
1301: else if (GET_CODE (X) == PLUS) \
1302: { \
1303: rtx base = 0, index; \
1304: if (flag_pic && XEXP (X, 0) == pic_offset_table_rtx)\
1305: { \
1306: if (GET_CODE (XEXP (X, 1)) == REG \
1307: && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1308: goto ADDR; \
1309: else if (flag_pic == 1 \
1310: && GET_CODE (XEXP (X, 1)) != REG \
1311: && GET_CODE (XEXP (X, 1)) != LO_SUM \
1312: && GET_CODE (XEXP (X, 1)) != MEM) \
1313: goto ADDR; \
1314: } \
1315: else if (REG_P (XEXP (X, 0)) \
1316: && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1317: base = XEXP (X, 0), index = XEXP (X, 1); \
1318: else if (REG_P (XEXP (X, 1)) \
1319: && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1320: base = XEXP (X, 1), index = XEXP (X, 0); \
1321: if (base != 0) \
1322: if (GET_CODE (index) == CONST_INT \
1323: && ((INT_14_BITS (index) && (MODE) != SFmode && (MODE) != DFmode) \
1324: || INT_5_BITS (index))) \
1325: goto ADDR; \
1326: } \
1327: else if (GET_CODE (X) == LO_SUM \
1328: && GET_CODE (XEXP (X, 0)) == REG \
1329: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1330: && CONSTANT_P (XEXP (X, 1)) \
1331: && (MODE) != SFmode \
1332: && (MODE) != DFmode) \
1333: goto ADDR; \
1334: else if (GET_CODE (X) == LO_SUM \
1335: && GET_CODE (XEXP (X, 0)) == SUBREG \
1336: && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1337: && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1338: && CONSTANT_P (XEXP (X, 1)) \
1339: && (MODE) != SFmode \
1340: && (MODE) != DFmode) \
1341: goto ADDR; \
1342: else if (GET_CODE (X) == LABEL_REF \
1343: || (GET_CODE (X) == CONST_INT \
1.1.1.3 ! root 1344: && INT_5_BITS (X))) \
1.1 root 1345: goto ADDR; \
1346: }
1347:
1348: /* Try machine-dependent ways of modifying an illegitimate address
1349: to be legitimate. If we find one, return the new, valid address.
1350: This macro is used in only one place: `memory_address' in explow.c.
1351:
1352: OLDX is the address as it was before break_out_memory_refs was called.
1353: In some cases it is useful to look at this to decide what needs to be done.
1354:
1355: MODE and WIN are passed so that this macro can use
1356: GO_IF_LEGITIMATE_ADDRESS.
1357:
1358: It is always safe for this macro to do nothing. It exists to recognize
1359: opportunities to optimize the output. */
1360:
1361: extern struct rtx_def *hppa_legitimize_address ();
1362: #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1363: { rtx orig_x = (X); \
1364: (X) = hppa_legitimize_address (X, OLDX, MODE); \
1365: if ((X) != orig_x && memory_address_p (MODE, X)) \
1366: goto WIN; }
1367:
1368: /* Go to LABEL if ADDR (a legitimate address expression)
1369: has an effect that depends on the machine mode it is used for. */
1370:
1371: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1372: if (GET_CODE (ADDR) == PRE_DEC \
1373: || GET_CODE (ADDR) == POST_DEC \
1374: || GET_CODE (ADDR) == PRE_INC \
1375: || GET_CODE (ADDR) == POST_INC) \
1376: goto LABEL
1377:
1378: /* Define this macro if references to a symbol must be treated
1379: differently depending on something about the variable or
1380: function named by the symbol (such as what section it is in).
1381:
1382: The macro definition, if any, is executed immediately after the
1383: rtl for DECL or other node is created.
1384: The value of the rtl will be a `mem' whose address is a
1385: `symbol_ref'.
1386:
1387: The usual thing for this macro to do is to a flag in the
1388: `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1389: name string in the `symbol_ref' (if one bit is not enough
1390: information).
1391:
1392: On the HP-PA we use this to indicate if a symbol is in text or
1393: data space. Also, function labels need special treatment. */
1394:
1395: #define TEXT_SPACE_P(DECL)\
1396: (TREE_CODE (DECL) == FUNCTION_DECL \
1397: || (TREE_CODE (DECL) == VAR_DECL \
1398: && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
1399: && !flag_pic) \
1400: || (*tree_code_type[(int) TREE_CODE (DECL)] == 'c' \
1401: && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings)))
1402:
1403: #define FUNCTION_NAME_P(NAME) \
1404: (*(NAME) == '@' || (*(NAME) == '*' && *((NAME) + 1) == '@'))
1405:
1406: #define ENCODE_SECTION_INFO(DECL)\
1407: do \
1408: { if (TEXT_SPACE_P (DECL)) \
1409: { rtx _rtl; \
1410: if (TREE_CODE (DECL) == FUNCTION_DECL \
1411: || TREE_CODE (DECL) == VAR_DECL) \
1412: _rtl = DECL_RTL (DECL); \
1413: else \
1414: _rtl = TREE_CST_RTL (DECL); \
1415: SYMBOL_REF_FLAG (XEXP (_rtl, 0)) = 1; \
1416: if (TREE_CODE (DECL) == FUNCTION_DECL) \
1417: hppa_encode_label (XEXP (DECL_RTL (DECL), 0));\
1418: } \
1419: } \
1420: while (0)
1.1.1.3 ! root 1421:
1.1 root 1422: /* Store the user-specified part of SYMBOL_NAME in VAR.
1423: This is sort of inverse to ENCODE_SECTION_INFO. */
1424:
1425: #define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \
1426: (VAR) = ((SYMBOL_NAME) + ((SYMBOL_NAME)[0] == '*' ? \
1427: 1 + (SYMBOL_NAME)[1] == '@'\
1428: : (SYMBOL_NAME)[0] == '@'))
1429:
1430: /* Specify the machine mode that this machine uses
1431: for the index in the tablejump instruction. */
1.1.1.2 root 1432: #define CASE_VECTOR_MODE DImode
1.1 root 1433:
1434: /* Define this if the tablejump instruction expects the table
1435: to contain offsets from the address of the table.
1436: Do not define this if the table should contain absolute addresses. */
1437: /* #define CASE_VECTOR_PC_RELATIVE */
1438:
1439: #define CASE_DROPS_THROUGH
1440: /* Specify the tree operation to be used to convert reals to integers. */
1441: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1442:
1443: /* This is the kind of divide that is easiest to do in the general case. */
1444: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1445:
1446: /* Define this as 1 if `char' should by default be signed; else as 0. */
1447: #define DEFAULT_SIGNED_CHAR 1
1448:
1449: /* Max number of bytes we can move from memory to memory
1450: in one reasonably fast instruction. */
1451: #define MOVE_MAX 8
1452:
1.1.1.2 root 1453: /* Define if operations between registers always perform the operation
1454: on the full register even if a narrower mode is specified. */
1455: #define WORD_REGISTER_OPERATIONS
1456:
1457: /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1458: will either zero-extend or sign-extend. The value of this macro should
1459: be the code that says which one of the two operations is implicitly
1460: done, NIL if none. */
1461: #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1.1 root 1462:
1463: /* Nonzero if access to memory by bytes is slow and undesirable. */
1464: #define SLOW_BYTE_ACCESS 1
1465:
1466: /* Do not break .stabs pseudos into continuations. */
1467: #define DBX_CONTIN_LENGTH 0
1468:
1469: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1470: is done just by pretending it is already truncated. */
1471: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1472:
1473: /* We assume that the store-condition-codes instructions store 0 for false
1474: and some other value for true. This is the value stored for true. */
1475:
1476: #define STORE_FLAG_VALUE 1
1477:
1478: /* When a prototype says `char' or `short', really pass an `int'. */
1479: #define PROMOTE_PROTOTYPES
1480:
1481: /* Specify the machine mode that pointers have.
1482: After generation of rtl, the compiler makes no further distinction
1483: between pointers and any other objects of this machine mode. */
1484: #define Pmode SImode
1485:
1486: /* Add any extra modes needed to represent the condition code.
1487:
1488: HPPA floating comparisons produce condition codes. */
1489: #define EXTRA_CC_MODES CCFPmode
1490:
1491: /* Define the names for the modes specified above. */
1492: #define EXTRA_CC_NAMES "CCFP"
1493:
1494: /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1495: return the mode to be used for the comparison. For floating-point, CCFPmode
1496: should be used. CC_NOOVmode should be used when the first operand is a
1497: PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1498: needed. */
1499: #define SELECT_CC_MODE(OP,X,Y) \
1500: (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1501:
1502: /* A function address in a call instruction
1503: is a byte address (for indexing purposes)
1504: so give the MEM rtx a byte's mode. */
1505: #define FUNCTION_MODE SImode
1.1.1.3 ! root 1506:
1.1 root 1507: /* Define this if addresses of constant functions
1508: shouldn't be put through pseudo regs where they can be cse'd.
1509: Desirable on machines where ordinary constants are expensive
1510: but a CALL with constant address is cheap. */
1511: #define NO_FUNCTION_CSE
1512:
1.1.1.2 root 1513: /* Define this to be nonzero if shift instructions ignore all but the low-order
1.1 root 1514: few bits. */
1.1.1.2 root 1515: #define SHIFT_COUNT_TRUNCATED 1
1.1 root 1516:
1517: /* Use atexit for static constructors/destructors, instead of defining
1518: our own exit function. */
1519: #define HAVE_ATEXIT
1520:
1521: /* Compute the cost of computing a constant rtl expression RTX
1522: whose rtx-code is CODE. The body of this macro is a portion
1523: of a switch statement. If the code is computed here,
1524: return it with a return statement. Otherwise, break from the switch. */
1525:
1526: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1527: case CONST_INT: \
1528: if (INTVAL (RTX) == 0) return 0; \
1529: if (INT_14_BITS (RTX)) return 1; \
1530: case HIGH: \
1531: return 2; \
1532: case CONST: \
1533: case LABEL_REF: \
1534: case SYMBOL_REF: \
1535: return 4; \
1536: case CONST_DOUBLE: \
1537: if (RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)\
1538: && OUTER_CODE != SET) \
1539: return 0; \
1540: else \
1541: return 8;
1542:
1543: #define ADDRESS_COST(RTX) \
1544: (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1545:
1546: /* Compute extra cost of moving data between one register class
1547: and another.
1548:
1.1.1.2 root 1549: Make moves from SAR so expensive they should never happen. We used to
1550: have 0xffff here, but that generates overflow in rare cases.
1.1 root 1551:
1.1.1.3 ! root 1552: Copies involving a FP register and a non-FP register are relatively
1.1 root 1553: expensive because they must go through memory.
1554:
1555: Other copies are reasonably cheap. */
1556: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1.1.1.2 root 1557: (CLASS1 == SHIFT_REGS ? 0x100 \
1.1 root 1558: : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
1559: : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
1560: : 2)
1561:
1562:
1563: /* Provide the costs of a rtl expression. This is in the body of a
1564: switch on CODE. The purpose for the cost of MULT is to encourage
1565: `synth_mult' to find a synthetic multiply when reasonable. */
1566:
1.1.1.3 ! root 1567: #define RTX_COSTS(X,CODE,OUTER_CODE) \
! 1568: case MULT: \
! 1569: return TARGET_SNAKE && ! TARGET_DISABLE_FPREGS \
! 1570: ? COSTS_N_INSNS (8) : COSTS_N_INSNS (20); \
! 1571: case DIV: \
! 1572: case UDIV: \
! 1573: case MOD: \
! 1574: case UMOD: \
! 1575: return COSTS_N_INSNS (60); \
! 1576: case PLUS: \
! 1577: if (GET_CODE (XEXP (X, 0)) == MULT \
! 1578: && shadd_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \
! 1579: return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
! 1580: + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
! 1581: break;
1.1 root 1582:
1583: /* Adjust the cost of dependencies. */
1584:
1585: #define ADJUST_COST(INSN,LINK,DEP,COST) \
1586: (COST) = pa_adjust_cost (INSN, LINK, DEP, COST)
1587:
1588: /* Handling the special cases is going to get too complicated for a macro,
1589: just call `pa_adjust_insn_length' to do the real work. */
1590: #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1591: LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1592:
1593: /* Enable a bug fix. (This is for extra caution.) */
1594: #define SHORTEN_WITH_ADJUST_INSN_LENGTH
1595:
1596: /* Millicode insns are actually function calls with some special
1597: constraints on arguments and register usage.
1598:
1599: Millicode calls always expect their arguments in the integer argument
1600: registers, and always return their result in %r29 (ret1). They
1601: are expected to clobber their arguments, %r1, %r29, and %r31 and
1602: nothing else.
1603:
1.1.1.3 ! root 1604: These macros tell reorg that the references to arguments and
! 1605: register clobbers for millicode calls do not appear to happen
1.1 root 1606: until after the millicode call. This allows reorg to put insns
1607: which set the argument registers into the delay slot of the millicode
1608: call -- thus they act more like traditional CALL_INSNs.
1609:
1610: get_attr_type will try to recognize the given insn, so make sure to
1611: filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1612: in particular. */
1613: #define INSN_SETS_ARE_DELAYED(X) \
1614: ((GET_CODE (X) == INSN \
1615: && GET_CODE (PATTERN (X)) != SEQUENCE \
1616: && GET_CODE (PATTERN (X)) != USE \
1617: && GET_CODE (PATTERN (X)) != CLOBBER \
1618: && get_attr_type (X) == TYPE_MILLI))
1619:
1620: #define INSN_REFERENCES_ARE_DELAYED(X) \
1621: ((GET_CODE (X) == INSN \
1622: && GET_CODE (PATTERN (X)) != SEQUENCE \
1623: && GET_CODE (PATTERN (X)) != USE \
1624: && GET_CODE (PATTERN (X)) != CLOBBER \
1.1.1.3 ! root 1625: && get_attr_type (X) == TYPE_MILLI))
1.1 root 1626:
1627:
1628: /* Control the assembler format that we output. */
1629:
1630: /* Output at beginning of assembler file. */
1631:
1632: #define ASM_FILE_START(FILE) \
1633: do { fprintf (FILE, "\t.SPACE $PRIVATE$\n\
1634: \t.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31\n\
1635: \t.SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82\n\
1636: \t.SPACE $TEXT$\n\
1637: \t.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44\n\
1638: \t.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n\
1639: \t.IMPORT $global$,DATA\n\
1640: \t.IMPORT $$dyncall,MILLICODE\n");\
1641: if (profile_flag)\
1642: fprintf (FILE, "\t.IMPORT _mcount, CODE\n");\
1.1.1.2 root 1643: if (write_symbols != NO_DEBUG) \
1644: output_file_directive ((FILE), main_input_filename); \
1.1 root 1645: } while (0)
1646:
1647: /* Output to assembler file text saying following lines
1648: may contain character constants, extra white space, comments, etc. */
1649:
1650: #define ASM_APP_ON ""
1651:
1652: /* Output to assembler file text saying following lines
1653: no longer contain unusual constructs. */
1654:
1655: #define ASM_APP_OFF ""
1656:
1657: /* We don't yet know how to identify GCC to HP-PA machines. */
1658: #define ASM_IDENTIFY_GCC(FILE) fprintf (FILE, "; gcc_compiled.:\n")
1659:
1660: /* Output before code. */
1661:
1662: /* Supposedly the assembler rejects the command if there is no tab! */
1663: #define TEXT_SECTION_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $CODE$\n"
1664:
1.1.1.2 root 1665: /* Output before read-only data. */
1666:
1667: /* Supposedly the assembler rejects the command if there is no tab! */
1668: #define READONLY_DATA_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $LIT$\n"
1669:
1670: #define READONLY_DATA_SECTION readonly_data
1671:
1.1 root 1672: /* Output before writable data. */
1673:
1674: /* Supposedly the assembler rejects the command if there is no tab! */
1675: #define DATA_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $DATA$\n"
1676:
1677: /* Output before uninitialized data. */
1678:
1679: #define BSS_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $BSS$\n"
1680:
1681: /* Define the .bss section for ASM_OUTPUT_LOCAL to use. */
1682:
1.1.1.2 root 1683: #define EXTRA_SECTIONS in_bss, in_readonly_data
1.1 root 1684:
1685: #define EXTRA_SECTION_FUNCTIONS \
1686: void \
1687: bss_section () \
1688: { \
1689: if (in_section != in_bss) \
1690: { \
1691: fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \
1692: in_section = in_bss; \
1693: } \
1.1.1.2 root 1694: } \
1695: void \
1696: readonly_data () \
1697: { \
1698: if (in_section != in_readonly_data) \
1699: { \
1700: fprintf (asm_out_file, "%s\n", READONLY_DATA_ASM_OP); \
1701: in_section = in_readonly_data; \
1702: } \
1.1 root 1703: }
1704:
1705:
1706: /* How to refer to registers in assembler output.
1707: This sequence is indexed by compiler's hard-register-number (see above). */
1708:
1709: #define REGISTER_NAMES \
1.1.1.3 ! root 1710: {"%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
! 1711: "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
! 1712: "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", \
! 1713: "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", \
! 1714: "%fr4", "%fr4R", "%fr5", "%fr5R", "%fr6", "%fr6R", "%fr7", "%fr7R", \
! 1715: "%fr8", "%fr8R", "%fr9", "%fr9R", "%fr10", "%fr10R", "%fr11", "%fr11R", \
! 1716: "%fr12", "%fr12R", "%fr13", "%fr13R", "%fr14", "%fr14R", "%fr15", "%fr15R", \
! 1717: "%fr16", "%fr16R", "%fr17", "%fr17R", "%fr18", "%fr18R", "%fr19", "%fr19R", \
! 1718: "%fr20", "%fr20R", "%fr21", "%fr21R", "%fr22", "%fr22R", "%fr23", "%fr23R", \
! 1719: "%fr24", "%fr24R", "%fr25", "%fr25R", "%fr26", "%fr26R", "%fr27", "%fr27R", \
! 1720: "%fr28", "%fr28R", "%fr29", "%fr29R", "%fr30", "%fr30R", "%fr31", "%fr31R", \
1.1 root 1721: "SAR"}
1722:
1.1.1.3 ! root 1723: #define ADDITIONAL_REGISTER_NAMES \
! 1724: {{"%fr4L",32}, {"%fr5L",34}, {"%fr6L",36}, {"%fr7L",38}, \
! 1725: {"%fr8L",40}, {"%fr9L",42}, {"%fr10L",44}, {"%fr11L",46}, \
! 1726: {"%fr12L",48}, {"%fr13L",50}, {"%fr14L",52}, {"%fr15L",54}, \
! 1727: {"%fr16L",56}, {"%fr17L",58}, {"%fr18L",60}, {"%fr19L",62}, \
! 1728: {"%fr20L",64}, {"%fr21L",66}, {"%fr22L",68}, {"%fr23L",70}, \
! 1729: {"%fr24L",72}, {"%fr25L",74}, {"%fr26L",76}, {"%fr27L",78}, \
! 1730: {"%fr28L",80}, {"%fr29L",82}, {"%fr30L",84}, {"%fr31R",86}, \
! 1731: {"%cr11",88}}
! 1732:
! 1733: /* How to renumber registers for dbx and gdb.
! 1734:
! 1735: Registers 0 - 31 remain unchanged.
! 1736:
! 1737: Registers 32 - 87 are mapped to 72 - 127
! 1738:
! 1739: Register 88 is mapped to 32. */
! 1740:
! 1741: #define DBX_REGISTER_NUMBER(REGNO) \
! 1742: ((REGNO) <= 31 ? (REGNO) : \
! 1743: ((REGNO) > 31 && (REGNO) <= 87 ? (REGNO) + 40 : 32))
1.1 root 1744:
1745: /* This is how to output the definition of a user-level label named NAME,
1746: such as the label on a static function or variable NAME. */
1747:
1748: #define ASM_OUTPUT_LABEL(FILE, NAME) \
1749: do { assemble_name (FILE, NAME); \
1750: fputc ('\n', FILE); } while (0)
1751:
1752: /* This is how to output a command to make the user-level label named NAME
1753: defined for reference from other files. */
1754:
1755: #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1756: do { fputs ("\t.IMPORT ", FILE); \
1757: assemble_name (FILE, NAME); \
1758: if (FUNCTION_NAME_P (NAME)) \
1759: fputs (",CODE\n", FILE); \
1760: else \
1761: fputs (",DATA\n", FILE); \
1762: } while (0)
1763:
1764: /* hpux ld doesn't output the object file name, or anything useful at
1765: all, to indicate the start of an object file's symbols. This screws
1766: up gdb, so we'll output this magic cookie at the end of an object
1767: file with debugging symbols */
1768:
1769: #define ASM_FILE_END(FILE) \
1770: do { if (write_symbols == DBX_DEBUG)\
1771: { fputs (TEXT_SECTION_ASM_OP, FILE);\
1.1.1.2 root 1772: fputs ("\t.stabs \"end_file.\",4,0,0,Ltext_end\nLtext_end:\n",\
1.1 root 1773: (FILE));\
1774: }\
1775: } while (0)
1776:
1.1.1.3 ! root 1777: /* The bogus HP assembler requires ALL external references to be
1.1 root 1778: "imported", even library calls. They look a bit different, so
1779: here's this macro. */
1780:
1781: #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, RTL) \
1782: do { fputs ("\t.IMPORT ", FILE); \
1783: assemble_name (FILE, XSTR ((RTL), 0)); \
1784: fputs (",CODE\n", FILE); \
1785: } while (0)
1786:
1787: #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1.1.1.3 ! root 1788: do { \
! 1789: /* We only handle DATA objects here, functions are globalized in \
! 1790: ASM_DECLARE_FUNCTION_NAME. */ \
! 1791: if (! FUNCTION_NAME_P (NAME)) \
! 1792: { \
! 1793: fputs ("\t.EXPORT ", FILE); \
! 1794: assemble_name (FILE, NAME); \
! 1795: fputs (",DATA\n", FILE); \
! 1796: } \
! 1797: } while (0)
1.1 root 1798:
1799: /* This is how to output a reference to a user-level label named NAME.
1800: `assemble_name' uses this. */
1801:
1802: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1803: fprintf ((FILE), "%s", (NAME) + (FUNCTION_NAME_P (NAME) ? 1 : 0))
1804:
1805: /* This is how to output an internal numbered label where
1806: PREFIX is the class of label and NUM is the number within the class. */
1807:
1808: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1.1.1.3 ! root 1809: {fprintf (FILE, "%c$%s%04d\n", (PREFIX)[0], (PREFIX) + 1, NUM);}
1.1 root 1810:
1811: /* This is how to store into the string LABEL
1812: the symbol_ref name of an internal numbered label where
1813: PREFIX is the class of label and NUM is the number within the class.
1814: This is suitable for output with `assemble_name'. */
1815:
1816: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1.1.1.3 ! root 1817: sprintf (LABEL, "*%c$%s%04d", (PREFIX)[0], (PREFIX) + 1, NUM)
1.1 root 1818:
1819: /* This is how to output an assembler line defining a `double' constant. */
1820:
1821: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1822: do { union { double d; int i[2];} __u; \
1823: __u.d = (VALUE); \
1824: fprintf (FILE, "\t; .double %.20e\n\t.word %d ; = 0x%x\n\t.word %d ; = 0x%x\n", \
1825: __u.d, __u.i[0], __u.i[0], __u.i[1], __u.i[1]); \
1826: } while (0)
1827:
1828: /* This is how to output an assembler line defining a `float' constant. */
1829:
1830: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1831: do { union { float f; int i;} __u; \
1832: __u.f = (VALUE); \
1833: fprintf (FILE, "\t; .float %.12e\n\t.word %d ; = 0x%x\n", __u.f, __u.i, __u.i); \
1834: } while (0)
1835:
1836: /* This is how to output an assembler line defining an `int' constant. */
1837:
1838: #define ASM_OUTPUT_INT(FILE,VALUE) \
1839: { fprintf (FILE, "\t.word "); \
1.1.1.3 ! root 1840: if (function_label_operand (VALUE, VOIDmode) \
! 1841: && !TARGET_PORTABLE_RUNTIME) \
1.1 root 1842: fprintf (FILE, "P%%"); \
1843: output_addr_const (FILE, (VALUE)); \
1844: fprintf (FILE, "\n");}
1845:
1846: /* Likewise for `short' and `char' constants. */
1847:
1848: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1849: ( fprintf (FILE, "\t.half "), \
1850: output_addr_const (FILE, (VALUE)), \
1851: fprintf (FILE, "\n"))
1852:
1853: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1854: ( fprintf (FILE, "\t.byte "), \
1855: output_addr_const (FILE, (VALUE)), \
1856: fprintf (FILE, "\n"))
1857:
1858: /* This is how to output an assembler line for a numeric constant byte. */
1859:
1860: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1861: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1862:
1863: #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1864: output_ascii ((FILE), (P), (SIZE))
1865:
1866: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO)
1.1.1.3 ! root 1867: #define ASM_OUTPUT_REG_POP(FILE,REGNO)
1.1 root 1868: /* This is how to output an element of a case-vector that is absolute.
1869: Note that this method makes filling these branch delay slots
1870: impossible. */
1871:
1872: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1873: fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1874:
1875: /* Jump tables are executable code and live in the TEXT section on the PA. */
1876: #define JUMP_TABLES_IN_TEXT_SECTION
1877:
1878: /* This is how to output an element of a case-vector that is relative.
1.1.1.3 ! root 1879: This must be defined correctly as it is used when generating PIC code.
! 1880:
! 1881: I belive it safe to use the same definition as ASM_OUTPUT_ADDR_VEC_ELT
! 1882: on the PA since ASM_OUTPUT_ADDR_VEC_ELT uses pc-relative jump instructions
! 1883: rather than a table of absolute addresses. */
1.1 root 1884:
1885: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1.1.1.3 ! root 1886: fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1.1 root 1887:
1888: /* This is how to output an assembler line
1889: that says to advance the location counter
1890: to a multiple of 2**LOG bytes. */
1891:
1892: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1893: fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1894:
1895: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1896: fprintf (FILE, "\t.blockz %d\n", (SIZE))
1897:
1.1.1.3 ! root 1898: /* This says how to output an assembler line to define a global common symbol
! 1899: with size SIZE (in bytes) and alignment ALIGN (in bits). */
1.1 root 1900:
1.1.1.3 ! root 1901: #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGNED) \
! 1902: { bss_section (); \
! 1903: assemble_name ((FILE), (NAME)); \
! 1904: fputs ("\t.comm ", (FILE)); \
! 1905: fprintf ((FILE), "%d\n", MAX ((SIZE), ((ALIGNED) / BITS_PER_UNIT)));}
! 1906:
! 1907: /* This says how to output an assembler line to define a local common symbol
! 1908: with size SIZE (in bytes) and alignment ALIGN (in bits). */
! 1909:
! 1910: #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGNED) \
! 1911: { bss_section (); \
! 1912: fprintf ((FILE), "\t.align %d\n", ((ALIGNED) / BITS_PER_UNIT)); \
1.1 root 1913: assemble_name ((FILE), (NAME)); \
1.1.1.3 ! root 1914: fprintf ((FILE), "\n\t.block %d\n", (SIZE));}
! 1915:
1.1 root 1916: /* Store in OUTPUT a string (made with alloca) containing
1917: an assembler-name for a local static variable named NAME.
1918: LABELNO is an integer which is different for each call. */
1919:
1920: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1921: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
1922: sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
1923:
1924: /* Define the parentheses used to group arithmetic operations
1925: in assembler code. */
1926:
1927: #define ASM_OPEN_PAREN "("
1928: #define ASM_CLOSE_PAREN ")"
1929:
1.1.1.3 ! root 1930: /* All HP assemblers use "!" to separate logical lines. */
! 1931: #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!')
! 1932:
1.1 root 1933: /* Define results of standard character escape sequences. */
1934: #define TARGET_BELL 007
1935: #define TARGET_BS 010
1936: #define TARGET_TAB 011
1937: #define TARGET_NEWLINE 012
1938: #define TARGET_VT 013
1939: #define TARGET_FF 014
1940: #define TARGET_CR 015
1941:
1942: #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1943: ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
1944:
1945: /* Print operand X (an rtx) in assembler syntax to file FILE.
1946: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1947: For `%' followed by punctuation, CODE is the punctuation and X is null.
1948:
1949: On the HP-PA, the CODE can be `r', meaning this is a register-only operand
1950: and an immediate zero should be represented as `r0'.
1951:
1952: Several % codes are defined:
1953: O an operation
1954: C compare conditions
1955: N extract conditions
1956: M modifier to handle preincrement addressing for memory refs.
1957: F modifier to handle preincrement addressing for fp memory refs */
1958:
1959: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1960:
1961:
1962: /* Print a memory address as an operand to reference that memory location. */
1963:
1964: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1965: { register rtx addr = ADDR; \
1966: register rtx base; \
1967: int offset; \
1968: switch (GET_CODE (addr)) \
1969: { \
1970: case REG: \
1971: fprintf (FILE, "0(0,%s)", reg_names [REGNO (addr)]); \
1972: break; \
1973: case PLUS: \
1974: if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1975: offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
1976: else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1977: offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
1978: else \
1979: abort (); \
1980: fprintf (FILE, "%d(0,%s)", offset, reg_names [REGNO (base)]); \
1981: break; \
1982: case LO_SUM: \
1983: fputs ("R'", FILE); \
1984: output_global_address (FILE, XEXP (addr, 1)); \
1985: fputs ("(", FILE); \
1986: output_operand (XEXP (addr, 0), 0); \
1987: fputs (")", FILE); \
1988: break; \
1989: case CONST_INT: \
1990: fprintf (FILE, "%d(0,0)", INTVAL (addr)); \
1991: break; \
1992: default: \
1993: output_addr_const (FILE, addr); \
1994: }}
1995:
1996:
1997: /* Define functions in pa.c and used in insn-output.c. */
1998:
1999: extern char *output_and ();
2000: extern char *output_ior ();
2001: extern char *output_move_double ();
2002: extern char *output_fp_move_double ();
2003: extern char *output_block_move ();
2004: extern char *output_cbranch ();
2005: extern char *output_bb ();
1.1.1.2 root 2006: extern char *output_dbra ();
2007: extern char *output_movb ();
1.1 root 2008: extern char *output_return ();
1.1.1.2 root 2009: extern char *output_call ();
1.1 root 2010: extern char *output_mul_insn ();
2011: extern char *output_div_insn ();
2012: extern char *output_mod_insn ();
2013: extern char *singlemove_string ();
2014: extern void output_arg_descriptor ();
2015: extern void output_global_address ();
2016: extern struct rtx_def *legitimize_pic_address ();
2017: extern struct rtx_def *gen_cmp_fp ();
2018: extern void hppa_encode_label ();
2019:
2020: extern struct rtx_def *hppa_save_pic_table_rtx;
1.1.1.3 ! root 2021:
! 2022: #if 0
! 2023: #define PREDICATE_CODES \
! 2024: {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
! 2025: {"reg_or_cint_move_operand", {SUBREG, REG, CONST_INT}}, \
! 2026: {"arith_operand", {SUBREG, REG, CONST_INT}}, \
! 2027: {"arith32_operand", {SUBREG, REG, CONST_INT}}, \
! 2028: {"arith11_operand", {SUBREG, REG, CONST_INT}}, \
! 2029: {"arith5_operand", {SUBREG, REG, CONST_INT}}, \
! 2030: {"pre_cint_operand", {CONST_INT}}, \
! 2031: {"post_cint_operand", {CONST_INT}}, \
! 2032: {"int5_operand", {CONST_INT}}, \
! 2033: {"uint5_operand", {CONST_INT}}, \
! 2034: {"uint32_operand", {CONST_INT}}, \
! 2035: {"int11_operand", {CONST_INT}}, \
! 2036: {"and_operand", {SUBREG, REG, CONST_INT}}, \
! 2037: {"ior_operand", {CONST_INT}}, \
! 2038: {"lhs_lshift_operand", {SUBREG, REG, CONST_INT}}, \
! 2039: {"lhs_lshift_cint_operand", {CONST_INT}}, \
! 2040: {"plus_xor_ior_operator", {PLUS, XOR, IOR}}, \
! 2041: {"shadd_operand", {CONST_INT}}, \
! 2042: {"eq_neq_comparison_operator", {EQ, NE}}, \
! 2043: {"movb_comparison_operator", {EQ, NE, LT, GE}}, \
! 2044: {"pc_or_label_operand", {LABEL_REF, PC}}, \
! 2045: {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \
! 2046: {"reg_or_nonsymb_mem_operand", {REG, SUBREG, MEM}}, \
! 2047: {"move_operand", {REG, SUBREG, CONST_INT, MEM}}, \
! 2048: {"pic_operand", {REG, SUBREG, CONST_INT, SYMBOL_REF, LABEL_REF, \
! 2049: CONST, HIGH, PC}}, /* No clue */ \
! 2050: {"function_label_operand", {SYMBOL_REF}}, \
! 2051: {"reg_or_0_or_nonsymb_mem_operand", {REG, SUBREG, CONST_INT, MEM}}, \
! 2052: {"div_operand", {REG, CONST_INT}}, \
! 2053: {"call_operand_address", {LABEL_REF, SYMBOL_REF, CONST_INT, \
! 2054: CONST, HIGH}},
! 2055: #endif
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