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1.1 root 1: /* Definitions of target machine for GNU compiler, for the HP Spectrum.
1.1.1.4 root 2: Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
3: Contributed by Michael Tiemann ([email protected]) of Cygnus Support
1.1 root 4: and Tim Moore ([email protected]) of the Center for
5: Software Science at the University of Utah.
6:
7: This file is part of GNU CC.
8:
9: GNU CC is free software; you can redistribute it and/or modify
10: it under the terms of the GNU General Public License as published by
11: the Free Software Foundation; either version 1, or (at your option)
12: any later version.
13:
14: GNU CC is distributed in the hope that it will be useful,
15: but WITHOUT ANY WARRANTY; without even the implied warranty of
16: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17: GNU General Public License for more details.
18:
19: You should have received a copy of the GNU General Public License
20: along with GNU CC; see the file COPYING. If not, write to
1.1.1.4 root 21: the Free Software Foundation, 59 Temple Place - Suite 330,
22: Boston, MA 02111-1307, USA. */
1.1 root 23:
24: enum cmp_type /* comparison type */
25: {
26: CMP_SI, /* compare integers */
27: CMP_SF, /* compare single precision floats */
28: CMP_DF, /* compare double precision floats */
29: CMP_MAX /* max comparison type */
30: };
31:
1.1.1.4 root 32: /* For long call handling. */
33: extern unsigned int total_code_bytes;
34:
35: /* Which processor to schedule for. */
36:
37: enum processor_type
38: {
39: PROCESSOR_700,
40: PROCESSOR_7100,
41: PROCESSOR_7100LC,
42: };
43:
44: #define pa_cpu_attr ((enum attr_cpu)pa_cpu)
45:
46: /* For -mschedule= option. */
47: extern char *pa_cpu_string;
48: extern enum processor_type pa_cpu;
49:
1.1 root 50: /* Print subsidiary information on the compiler version in use. */
51:
52: #define TARGET_VERSION fprintf (stderr, " (hppa)");
53:
54: /* Run-time compilation parameters selecting different hardware subsets. */
55:
56: extern int target_flags;
57:
58: /* compile code for HP-PA 1.1 ("Snake") */
59:
60: #define TARGET_SNAKE (target_flags & 1)
61:
62: /* Disable all FP registers (they all become fixed). This may be necessary
63: for compiling kernels which perform lazy context switching of FP regs.
1.1.1.3 root 64: Note if you use this option and try to perform floating point operations
1.1 root 65: the compiler will abort! */
66:
67: #define TARGET_DISABLE_FPREGS (target_flags & 2)
68:
1.1.1.4 root 69: /* Generate code which assumes that calls through function pointers will
70: never cross a space boundary. Such assumptions are generally safe for
71: building kernels and statically linked executables. Code compiled with
72: this option will fail miserably if the executable is dynamically linked
73: or uses nested functions! */
74: #define TARGET_FAST_INDIRECT_CALLS (target_flags & 4)
75:
1.1.1.2 root 76: /* Allow unconditional jumps in the delay slots of call instructions. */
77: #define TARGET_JUMP_IN_DELAY (target_flags & 8)
1.1 root 78:
1.1.1.4 root 79: /* In rare cases, a millicode call via "bl" can not be turned into
80: a millicode call using "ble" (when SHLIB_INFO subspace is very large).
81:
82: This option forces just millicode calls to use inline long-calls
83: This is far more efficient than the old long-call option which forced
84: every function to be called indirectly (as is still the case for
85: TARGET_PORTABLE_RUNTIME).
1.1 root 86:
1.1.1.3 root 87: ??? What about simple jumps, they can suffer from the same problem.
1.1 root 88: Would require significant surgery in pa.md. */
89:
1.1.1.4 root 90: #define TARGET_MILLICODE_LONG_CALLS (target_flags & 16)
1.1 root 91:
1.1.1.2 root 92: /* Disable indexed addressing modes. */
1.1 root 93:
94: #define TARGET_DISABLE_INDEXING (target_flags & 32)
95:
1.1.1.3 root 96: /* Emit code which follows the new portable runtime calling conventions
97: HP wants everyone to use for ELF objects. If at all possible you want
98: to avoid this since it's a performance loss for non-prototyped code.
99:
1.1.1.4 root 100: Note TARGET_PORTABLE_RUNTIME also forces all calls to use inline
101: long-call stubs which is quite expensive. */
1.1.1.3 root 102:
103: #define TARGET_PORTABLE_RUNTIME (target_flags & 64)
104:
1.1.1.2 root 105: /* Emit directives only understood by GAS. This allows parameter
106: relocations to work for static functions. There is no way
1.1.1.3 root 107: to make them work the HP assembler at this time. */
1.1 root 108:
1.1.1.2 root 109: #define TARGET_GAS (target_flags & 128)
1.1 root 110:
1.1.1.4 root 111: /* Emit code for processors which do not have an FPU. */
112:
113: #define TARGET_SOFT_FLOAT (target_flags & 256)
114:
1.1 root 115: /* Macro to define tables used to set the flags.
116: This is a list in braces of pairs in braces,
117: each pair being { "NAME", VALUE }
118: where VALUE is the bits to set or minus the bits to clear.
119: An empty string NAME is used to identify the default VALUE. */
120:
121: #define TARGET_SWITCHES \
1.1.1.2 root 122: {{"snake", 1}, \
123: {"nosnake", -1}, \
124: {"pa-risc-1-0", -1}, \
125: {"pa-risc-1-1", 1}, \
126: {"disable-fpregs", 2}, \
1.1.1.4 root 127: {"no-disable-fpregs", -2}, \
128: {"fast-indirect-calls", 4}, \
129: {"no-fast-indirect-calls", -4},\
1.1.1.2 root 130: {"jump-in-delay", 8}, \
131: {"no-jump-in-delay", -8}, \
1.1.1.4 root 132: {"millicode-long-calls", 16},\
133: {"no-millicode-long-calls", -16},\
1.1.1.2 root 134: {"disable-indexing", 32}, \
135: {"no-disable-indexing", -32},\
1.1.1.3 root 136: {"portable-runtime", 64+16},\
137: {"no-portable-runtime", -(64+16)},\
1.1.1.2 root 138: {"gas", 128}, \
139: {"no-gas", -128}, \
1.1.1.4 root 140: {"soft-float", 256}, \
141: {"no-soft-float", -256}, \
1.1 root 142: { "", TARGET_DEFAULT}}
143:
144: #ifndef TARGET_DEFAULT
1.1.1.3 root 145: #define TARGET_DEFAULT 0x88 /* TARGET_GAS + TARGET_JUMP_IN_DELAY */
1.1 root 146: #endif
147:
1.1.1.4 root 148: #define TARGET_OPTIONS \
149: { \
150: { "schedule=", &pa_cpu_string }\
151: }
152:
153: #define OVERRIDE_OPTIONS override_options ()
154:
1.1 root 155: #define DBX_DEBUGGING_INFO
1.1.1.2 root 156: #define DEFAULT_GDB_EXTENSIONS 1
157:
1.1.1.3 root 158: /* This is the way other stabs-in-XXX tools do things. We will be
1.1.1.4 root 159: compatible. */
1.1.1.3 root 160: #define DBX_BLOCKS_FUNCTION_RELATIVE 1
161:
162: /* Likewise for linenos.
163:
164: We make the first line stab special to avoid adding several
165: gross hacks to GAS. */
166: #undef ASM_OUTPUT_SOURCE_LINE
167: #define ASM_OUTPUT_SOURCE_LINE(file, line) \
168: { static int sym_lineno = 1; \
169: static tree last_function_decl = NULL; \
170: if (current_function_decl == last_function_decl) \
171: fprintf (file, "\t.stabn 68,0,%d,L$M%d-%s\nL$M%d:\n", \
172: line, sym_lineno, \
173: XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0) + 1, \
174: sym_lineno); \
175: else \
176: fprintf (file, "\t.stabn 68,0,%d,0\n", line); \
177: last_function_decl = current_function_decl; \
178: sym_lineno += 1; }
179:
180: /* But, to make this work, we have to output the stabs for the function
181: name *first*... */
182: #define DBX_FUNCTION_FIRST
183:
1.1.1.4 root 184: /* Only labels should ever begin in column zero. */
1.1.1.2 root 185: #define ASM_STABS_OP "\t.stabs"
186: #define ASM_STABN_OP "\t.stabn"
1.1 root 187:
1.1.1.3 root 188: /* GDB always assumes the current function's frame begins at the value
189: of the stack pointer upon entry to the current function. Accessing
190: local variables and parameters passed on the stack is done using the
191: base of the frame + an offset provided by GCC.
192:
193: For functions which have frame pointers this method works fine;
194: the (frame pointer) == (stack pointer at function entry) and GCC provides
195: an offset relative to the frame pointer.
196:
197: This loses for functions without a frame pointer; GCC provides an offset
198: which is relative to the stack pointer after adjusting for the function's
199: frame size. GDB would prefer the offset to be relative to the value of
200: the stack pointer at the function's entry. Yuk! */
201: #define DEBUGGER_AUTO_OFFSET(X) \
202: ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
203: + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
204:
205: #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
206: ((GET_CODE (X) == PLUS ? OFFSET : 0) \
207: + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
208:
1.1.1.4 root 209: /* gdb needs a null N_SO at the end of each file for scattered loading. */
210:
211: #undef DBX_OUTPUT_MAIN_SOURCE_FILE_END
212: #define DBX_OUTPUT_MAIN_SOURCE_FILE_END(FILE, FILENAME) \
213: fprintf (FILE, \
214: "%s\n\t.stabs \"%s\",%d,0,0,L$text_end\nL$text_end:\n",\
215: TEXT_SECTION_ASM_OP, "" , N_SO)
216:
1.1 root 217: #if (TARGET_DEFAULT & 1) == 0
218: #define CPP_SPEC "%{msnake:-D__hp9000s700 -D_PA_RISC1_1}\
219: %{mpa-risc-1-1:-D__hp9000s700 -D_PA_RISC1_1}"
220: #else
1.1.1.4 root 221: #define CPP_SPEC "%{!mpa-risc-1-0:%{!mnosnake:%{!msoft-float:-D__hp9000s700 -D_PA_RISC1_1}}}"
1.1 root 222: #endif
223:
224: /* Defines for a K&R CC */
225:
226: #define CC1_SPEC "%{pg:} %{p:}"
1.1.1.3 root 227:
1.1.1.4 root 228: #define LINK_SPEC "%{!shared:-u main} %{shared:-b}"
229:
230: /* We don't want -lg. */
231: #ifndef LIB_SPEC
232: #define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
233: #endif
1.1 root 234:
1.1.1.2 root 235: /* Allow $ in identifiers. */
236: #define DOLLARS_IN_IDENTIFIERS 2
237:
1.1 root 238: /* Make gcc agree with <machine/ansi.h> */
239:
240: #define SIZE_TYPE "unsigned int"
241: #define PTRDIFF_TYPE "int"
1.1.1.3 root 242: #define WCHAR_TYPE "unsigned int"
243: #define WCHAR_TYPE_SIZE 32
1.1 root 244:
1.1.1.3 root 245: /* Show we can debug even without a frame pointer. */
246: #define CAN_DEBUG_WITHOUT_FP
1.1 root 247:
1.1.1.4 root 248: /* Machine dependent reorg pass. */
249: #define MACHINE_DEPENDENT_REORG(X) pa_reorg(X)
250:
1.1 root 251: /* Names to predefine in the preprocessor for this target machine. */
252:
1.1.1.2 root 253: #define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -D_HPUX_SOURCE -Dhp9000 -Dhp800 -Dspectrum -DREVARGV -Asystem(unix) -Asystem(bsd) -Acpu(hppa) -Amachine(hppa)"
1.1.1.4 root 254:
255: /* HPUX has a program 'chatr' to list the dependencies of dynamically
256: linked executables and shared libraries. */
257: #define LDD_SUFFIX "chatr"
258: /* look for lines like "dynamic /usr/lib/X11R5/libX11.sl". */
259: #define PARSE_LDD_OUTPUT(PTR) \
260: do { \
261: while (*PTR == ' ') PTR++; \
262: if (strncmp (PTR, "dynamic", sizeof ("dynamic") - 1) == 0) \
263: { \
264: PTR += sizeof ("dynamic") - 1; \
265: while (*p == ' ') PTR++; \
266: } \
267: else \
268: PTR = 0; \
269: } while (0)
1.1 root 270:
271: /* target machine storage layout */
272:
1.1.1.4 root 273: /* Define for cross-compilation from a host with a different float format
274: or endianness (e.g. VAX, x86). */
275: #define REAL_ARITHMETIC
276:
277: /* Define this macro if it is advisable to hold scalars in registers
278: in a wider mode than that declared by the program. In such cases,
279: the value is constrained to be within the bounds of the declared
280: type, but kept valid in the wider mode. The signedness of the
281: extension may differ from that of the type. */
282:
283: #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
284: if (GET_MODE_CLASS (MODE) == MODE_INT \
285: && GET_MODE_SIZE (MODE) < 4) \
286: (MODE) = SImode;
287:
1.1 root 288: /* Define this if most significant bit is lowest numbered
289: in instructions that operate on numbered bit-fields. */
290: #define BITS_BIG_ENDIAN 1
291:
292: /* Define this if most significant byte of a word is the lowest numbered. */
293: /* That is true on the HP-PA. */
294: #define BYTES_BIG_ENDIAN 1
295:
296: /* Define this if most significant word of a multiword number is lowest
297: numbered. */
298: #define WORDS_BIG_ENDIAN 1
299:
300: /* number of bits in an addressable storage unit */
301: #define BITS_PER_UNIT 8
302:
303: /* Width in bits of a "word", which is the contents of a machine register.
304: Note that this is not necessarily the width of data type `int';
305: if using 16-bit ints on a 68000, this would still be 32.
306: But on a machine with 16-bit registers, this would be 16. */
307: #define BITS_PER_WORD 32
308:
309: /* Width of a word, in units (bytes). */
310: #define UNITS_PER_WORD 4
311:
312: /* Width in bits of a pointer.
313: See also the macro `Pmode' defined below. */
314: #define POINTER_SIZE 32
315:
316: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
317: #define PARM_BOUNDARY 32
318:
319: /* Largest alignment required for any stack parameter, in bits.
320: Don't define this if it is equal to PARM_BOUNDARY */
321: #define MAX_PARM_BOUNDARY 64
322:
323: /* Boundary (in *bits*) on which stack pointer should be aligned. */
1.1.1.2 root 324: #define STACK_BOUNDARY 512
1.1 root 325:
326: /* Allocation boundary (in *bits*) for the code of a function. */
327: #define FUNCTION_BOUNDARY 32
328:
329: /* Alignment of field after `int : 0' in a structure. */
330: #define EMPTY_FIELD_BOUNDARY 32
331:
332: /* Every structure's size must be a multiple of this. */
333: #define STRUCTURE_SIZE_BOUNDARY 8
334:
335: /* A bitfield declared as `int' forces `int' alignment for the struct. */
336: #define PCC_BITFIELD_TYPE_MATTERS 1
337:
338: /* No data type wants to be aligned rounder than this. */
339: #define BIGGEST_ALIGNMENT 64
340:
1.1.1.3 root 341: /* The .align directive in the HP assembler allows up to a 32 alignment. */
342: #define MAX_OFILE_ALIGNMENT 32768
343:
1.1 root 344: /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
345: #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
346: ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
347:
348: /* Make arrays of chars word-aligned for the same reasons. */
349: #define DATA_ALIGNMENT(TYPE, ALIGN) \
350: (TREE_CODE (TYPE) == ARRAY_TYPE \
351: && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
352: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
353:
354:
355: /* Set this nonzero if move instructions will actually fail to work
356: when given unaligned data. */
357: #define STRICT_ALIGNMENT 1
358:
359: /* Generate calls to memcpy, memcmp and memset. */
360: #define TARGET_MEM_FUNCTIONS
361:
362: /* Standard register usage. */
363:
364: /* Number of actual hardware registers.
365: The hardware registers are assigned numbers for the compiler
366: from 0 to just below FIRST_PSEUDO_REGISTER.
367: All registers that the compiler knows about must be given numbers,
368: even those that are not normally considered general registers.
369:
370: HP-PA 1.0 has 32 fullword registers and 16 floating point
371: registers. The floating point registers hold either word or double
372: word values.
1.1.1.3 root 373:
1.1 root 374: 16 additional registers are reserved.
1.1.1.3 root 375:
1.1 root 376: HP-PA 1.1 has 32 fullword registers and 32 floating point
377: registers. However, the floating point registers behave
378: differently: the left and right halves of registers are addressable
379: as 32 bit registers. So, we will set things up like the 68k which
380: has different fp units: define separate register sets for the 1.0
381: and 1.1 fp units. */
382:
1.1.1.3 root 383: #define FIRST_PSEUDO_REGISTER 89 /* 32 general regs + 56 fp regs +
384: + 1 shift reg */
1.1 root 385:
386: /* 1 for registers that have pervasive standard uses
387: and are not available for the register allocator.
388:
389: On the HP-PA, these are:
390: Reg 0 = 0 (hardware). However, 0 is used for condition code,
391: so is not fixed.
392: Reg 1 = ADDIL target/Temporary (hardware).
393: Reg 2 = Return Pointer
1.1.1.3 root 394: Reg 3 = Frame Pointer
395: Reg 4 = Frame Pointer (>8k varying frame with HP compilers only)
396: Reg 4-18 = Preserved Registers
1.1 root 397: Reg 19 = Linkage Table Register in HPUX 8.0 shared library scheme.
398: Reg 20-22 = Temporary Registers
399: Reg 23-26 = Temporary/Parameter Registers
400: Reg 27 = Global Data Pointer (hp)
401: Reg 28 = Temporary/???/Return Value register
1.1.1.4 root 402: Reg 29 = Temporary/Static Chain/Return Value register #2
1.1 root 403: Reg 30 = stack pointer
404: Reg 31 = Temporary/Millicode Return Pointer (hp)
405:
406: Freg 0-3 = Status Registers -- Not known to the compiler.
407: Freg 4-7 = Arguments/Return Value
408: Freg 8-11 = Temporary Registers
409: Freg 12-15 = Preserved Registers
410:
411: Freg 16-31 = Reserved
412:
413: On the Snake, fp regs are
414:
415: Freg 0-3 = Status Registers -- Not known to the compiler.
416: Freg 4L-7R = Arguments/Return Value
417: Freg 8L-11R = Temporary Registers
418: Freg 12L-21R = Preserved Registers
419: Freg 22L-31R = Temporary Registers
420:
421: */
422:
423: #define FIXED_REGISTERS \
424: {0, 0, 0, 0, 0, 0, 0, 0, \
425: 0, 0, 0, 0, 0, 0, 0, 0, \
426: 0, 0, 0, 0, 0, 0, 0, 0, \
427: 0, 0, 0, 1, 0, 0, 1, 0, \
1.1.1.3 root 428: /* fp registers */ \
1.1 root 429: 0, 0, 0, 0, 0, 0, 0, 0, \
430: 0, 0, 0, 0, 0, 0, 0, 0, \
431: 0, 0, 0, 0, 0, 0, 0, 0, \
432: 0, 0, 0, 0, 0, 0, 0, 0, \
433: 0, 0, 0, 0, 0, 0, 0, 0, \
434: 0, 0, 0, 0, 0, 0, 0, 0, \
435: 0, 0, 0, 0, 0, 0, 0, 0, \
436: 0}
437:
438: /* 1 for registers not available across function calls.
439: These must include the FIXED_REGISTERS and also any
440: registers that can be used without being saved.
441: The latter must include the registers where values are returned
442: and the register where structure-value addresses are passed.
443: Aside from that, you can include as many other registers as you like. */
444: #define CALL_USED_REGISTERS \
445: {1, 1, 1, 0, 0, 0, 0, 0, \
446: 0, 0, 0, 0, 0, 0, 0, 0, \
447: 0, 0, 0, 1, 1, 1, 1, 1, \
448: 1, 1, 1, 1, 1, 1, 1, 1, \
1.1.1.3 root 449: /* fp registers */ \
1.1 root 450: 1, 1, 1, 1, 1, 1, 1, 1, \
451: 1, 1, 1, 1, 1, 1, 1, 1, \
452: 0, 0, 0, 0, 0, 0, 0, 0, \
453: 0, 0, 0, 0, 0, 0, 0, 0, \
454: 0, 0, 0, 0, 1, 1, 1, 1, \
455: 1, 1, 1, 1, 1, 1, 1, 1, \
456: 1, 1, 1, 1, 1, 1, 1, 1, \
1.1.1.3 root 457: 1}
1.1 root 458:
459: #define CONDITIONAL_REGISTER_USAGE \
460: { \
461: if (!TARGET_SNAKE) \
462: { \
1.1.1.3 root 463: for (i = 56; i < 88; i++) \
464: fixed_regs[i] = call_used_regs[i] = 1; \
465: for (i = 33; i < 88; i += 2) \
1.1 root 466: fixed_regs[i] = call_used_regs[i] = 1; \
467: } \
1.1.1.4 root 468: if (TARGET_DISABLE_FPREGS || TARGET_SOFT_FLOAT)\
1.1 root 469: { \
1.1.1.3 root 470: for (i = 32; i < 88; i++) \
1.1 root 471: fixed_regs[i] = call_used_regs[i] = 1; \
472: } \
473: if (flag_pic) \
1.1.1.4 root 474: { \
475: fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
476: fixed_regs[PIC_OFFSET_TABLE_REGNUM_SAVED] = 1;\
477: } \
1.1 root 478: }
479:
1.1.1.3 root 480: /* Allocate the call used registers first. This should minimize
1.1 root 481: the number of registers that need to be saved (as call used
482: registers will generally not be allocated across a call).
483:
484: Experimentation has shown slightly better results by allocating
485: FP registers first. */
486:
487: #define REG_ALLOC_ORDER \
1.1.1.3 root 488: { \
489: /* caller-saved fp regs. */ \
490: 40, 41, 42, 43, 44, 45, 46, 47, \
491: 68, 69, 70, 71, 72, 73, 74, 75, \
492: 76, 77, 78, 79, 80, 81, 82, 83, \
493: 84, 85, 86, 87, \
494: 32, 33, 34, 35, 36, 37, 38, 39, \
1.1 root 495: /* caller-saved general regs. */ \
496: 19, 20, 21, 22, 23, 24, 25, 26, \
497: 27, 28, 29, 31, 2, \
1.1.1.3 root 498: /* callee-saved fp regs. */ \
499: 48, 49, 50, 51, 52, 53, 54, 55, \
500: 56, 57, 58, 59, 60, 61, 62, 63, \
501: 64, 65, 66, 67, \
1.1 root 502: /* callee-saved general regs. */ \
503: 3, 4, 5, 6, 7, 8, 9, 10, \
504: 11, 12, 13, 14, 15, 16, 17, 18, \
505: /* special registers. */ \
1.1.1.3 root 506: 1, 30, 0, 88}
1.1 root 507:
508:
1.1.1.3 root 509: /* True if register is floating-point. */
510: #define FP_REGNO_P(N) ((N) >= 32 && (N) <= 87)
511:
1.1 root 512: /* Return number of consecutive hard regs needed starting at reg REGNO
513: to hold something of mode MODE.
514: This is ordinarily the length in words of a value of mode MODE
515: but can be less for certain modes in special long registers.
516:
517: On the HP-PA, ordinary registers hold 32 bits worth;
518: The floating point registers are 64 bits wide. Snake fp regs are 32
519: bits wide */
1.1.1.3 root 520: #define HARD_REGNO_NREGS(REGNO, MODE) \
521: (!TARGET_SNAKE && FP_REGNO_P (REGNO) ? 1 \
522: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
1.1 root 523:
524: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
525: On the HP-PA, the cpu registers can hold any mode. We
526: force this to be an even register is it cannot hold the full mode. */
527: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
528: ((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
1.1.1.3 root 529: /* On 1.0 machines, don't allow wide non-fp modes in fp regs. */ \
530: : !TARGET_SNAKE && FP_REGNO_P (REGNO) \
531: ? GET_MODE_SIZE (MODE) <= 4 || GET_MODE_CLASS (MODE) == MODE_FLOAT \
532: /* Make wide modes be in aligned registers. */ \
533: : GET_MODE_SIZE (MODE) <= 4 || ((REGNO) & 1) == 0)
1.1 root 534:
535: /* Value is 1 if it is a good idea to tie two pseudo registers
536: when one has mode MODE1 and one has mode MODE2.
537: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
538: for any hard reg, then this must be 0 for correct output. */
539: #define MODES_TIEABLE_P(MODE1, MODE2) \
540: (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
541:
542: /* Specify the registers used for certain standard purposes.
543: The values of these macros are register numbers. */
544:
545: /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
546: /* #define PC_REGNUM */
547:
548: /* Register to use for pushing function arguments. */
549: #define STACK_POINTER_REGNUM 30
550:
551: /* Base register for access to local variables of the function. */
1.1.1.3 root 552: #define FRAME_POINTER_REGNUM 3
1.1 root 553:
554: /* Value should be nonzero if functions must have frame pointers. */
555: #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
1.1.1.3 root 556:
1.1 root 557:
558: /* C statement to store the difference between the frame pointer
559: and the stack pointer values immediately after the function prologue.
560:
561: Note, we always pretend that this is a leaf function because if
562: it's not, there's no point in trying to eliminate the
563: frame pointer. If it is a leaf function, we guessed right! */
564: #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
565: do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
566:
567: /* Base register for access to arguments of the function. */
1.1.1.3 root 568: #define ARG_POINTER_REGNUM 3
1.1 root 569:
570: /* Register in which static-chain is passed to a function. */
571: /* ??? */
572: #define STATIC_CHAIN_REGNUM 29
573:
574: /* Register which holds offset table for position-independent
575: data references. */
576:
577: #define PIC_OFFSET_TABLE_REGNUM 19
1.1.1.4 root 578: #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
1.1 root 579:
1.1.1.4 root 580: /* Register into which we save the PIC_OFFEST_TABLE_REGNUM so that it
581: can be restore across function calls. */
582: #define PIC_OFFSET_TABLE_REGNUM_SAVED 4
1.1 root 583:
1.1.1.2 root 584: /* SOM ABI says that objects larger than 64 bits are returned in memory. */
1.1.1.4 root 585: #define DEFAULT_PCC_STRUCT_RETURN 0
1.1.1.2 root 586: #define RETURN_IN_MEMORY(TYPE) \
1.1.1.4 root 587: (int_size_in_bytes (TYPE) > 8 || TREE_ADDRESSABLE (TYPE))
1.1.1.2 root 588:
1.1 root 589: /* Register in which address to store a structure value
590: is passed to a function. */
591: #define STRUCT_VALUE_REGNUM 28
592:
593: /* Define the classes of registers for register constraints in the
594: machine description. Also define ranges of constants.
595:
596: One of the classes must always be named ALL_REGS and include all hard regs.
597: If there is more than one class, another class must be named NO_REGS
598: and contain no registers.
599:
600: The name GENERAL_REGS must be the name of a class (or an alias for
601: another name such as ALL_REGS). This is the class of registers
602: that is allowed by "g" or "r" in a register constraint.
603: Also, registers outside this class are allocated only when
604: instructions express preferences for them.
605:
606: The classes must be numbered in nondecreasing order; that is,
607: a larger-numbered class must never be contained completely
608: in a smaller-numbered class.
609:
610: For any two classes, it is very desirable that there be another
611: class that represents their union. */
612:
613: /* The HP-PA has four kinds of registers: general regs, 1.0 fp regs,
614: 1.1 fp regs, and the high 1.1 fp regs, to which the operands of
1.1.1.3 root 615: fmpyadd and fmpysub are restricted. */
1.1 root 616:
617: enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, GENERAL_OR_FP_REGS,
1.1.1.3 root 618: SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES};
1.1 root 619:
620: #define N_REG_CLASSES (int) LIM_REG_CLASSES
621:
622: /* Give names of register classes as strings for dump file. */
623:
624: #define REG_CLASS_NAMES \
1.1.1.3 root 625: {"NO_REGS", "R1_REGS", "GENERAL_REGS", "FP_REGS", \
626: "GENERAL_OR_FP_REGS", "SHIFT_REGS", "ALL_REGS"}
1.1 root 627:
628: /* Define which registers fit in which classes.
629: This is an initializer for a vector of HARD_REG_SET
630: of length N_REG_CLASSES. Register 0, the "condition code" register,
631: is in no class. */
632:
633: #define REG_CLASS_CONTENTS \
1.1.1.3 root 634: {{0x00000000, 0x00000000, 0x00000000}, /* NO_REGS */ \
635: {0x00000002, 0x00000000, 0x00000000}, /* R1_REGS */ \
636: {0xfffffffe, 0x00000000, 0x00000000}, /* GENERAL_REGS */ \
637: {0x00000000, 0xffffffff, 0x00ffffff}, /* FP_REGS */ \
638: {0xfffffffe, 0xffffffff, 0x00ffffff}, /* GENERAL_OR_FP_REGS */ \
639: {0x00000000, 0x00000000, 0x01000000}, /* SHIFT_REGS */ \
640: {0xfffffffe, 0xffffffff, 0x01ffffff}} /* ALL_REGS */
1.1 root 641:
642: /* The same information, inverted:
643: Return the class number of the smallest class containing
644: reg number REGNO. This could be a conditional expression
645: or could index an array. */
646:
1.1.1.3 root 647: #define REGNO_REG_CLASS(REGNO) \
648: ((REGNO) == 0 ? NO_REGS \
649: : (REGNO) == 1 ? R1_REGS \
650: : (REGNO) < 32 ? GENERAL_REGS \
651: : (REGNO) < 88 ? FP_REGS \
1.1 root 652: : SHIFT_REGS)
653:
654: /* The class value for index registers, and the one for base regs. */
655: #define INDEX_REG_CLASS GENERAL_REGS
656: #define BASE_REG_CLASS GENERAL_REGS
657:
658: #define FP_REG_CLASS_P(CLASS) \
1.1.1.3 root 659: ((CLASS) == FP_REGS)
1.1 root 660:
1.1.1.3 root 661: /* Get reg_class from a letter such as appears in the machine description. */
662: /* Keep 'x' for backward compatibility with user asm. */
1.1 root 663: #define REG_CLASS_FROM_LETTER(C) \
1.1.1.3 root 664: ((C) == 'f' ? FP_REGS : \
665: (C) == 'x' ? FP_REGS : \
666: (C) == 'q' ? SHIFT_REGS : \
667: (C) == 'a' ? R1_REGS : \
668: (C) == 'Z' ? ALL_REGS : NO_REGS)
1.1 root 669:
670: /* The letters I, J, K, L and M in a register constraint string
671: can be used to stand for particular ranges of immediate operands.
672: This macro defines what the ranges are.
673: C is the letter, and VALUE is a constant value.
674: Return 1 if VALUE is in the range specified by C.
675:
676: `I' is used for the 11 bit constants.
677: `J' is used for the 14 bit constants.
678: `K' is used for values that can be moved with a zdepi insn.
679: `L' is used for the 5 bit constants.
680: `M' is used for 0.
681: `N' is used for values with the least significant 11 bits equal to zero.
682: `O' is used for numbers n such that n+1 is a power of 2.
683: */
684:
685: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
686: ((C) == 'I' ? VAL_11_BITS_P (VALUE) \
687: : (C) == 'J' ? VAL_14_BITS_P (VALUE) \
688: : (C) == 'K' ? zdepi_cint_p (VALUE) \
689: : (C) == 'L' ? VAL_5_BITS_P (VALUE) \
690: : (C) == 'M' ? (VALUE) == 0 \
691: : (C) == 'N' ? ((VALUE) & 0x7ff) == 0 \
692: : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \
693: : (C) == 'P' ? and_mask_p (VALUE) \
694: : 0)
695:
696: /* Similar, but for floating or large integer constants, and defining letters
697: G and H. Here VALUE is the CONST_DOUBLE rtx itself.
698:
699: For PA, `G' is the floating-point constant zero. `H' is undefined. */
700:
701: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
702: ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
703: && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
704: : 0)
705:
706: /* Given an rtx X being reloaded into a reg required to be
707: in class CLASS, return the class of reg to actually use.
708: In general this is just CLASS; but on some machines
709: in some cases it is preferable to use a more restrictive class. */
710: #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
711:
712: /* Return the register class of a scratch register needed to copy IN into
713: or out of a register in CLASS in MODE. If it can be done directly,
714: NO_REGS is returned. */
715:
716: #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
717: secondary_reload_class (CLASS, MODE, IN)
718:
1.1.1.3 root 719: /* On the PA it is not possible to directly move data between
1.1 root 720: GENERAL_REGS and FP_REGS. */
721: #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
1.1.1.3 root 722: (FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2))
1.1 root 723:
724: /* Return the stack location to use for secondary memory needed reloads. */
725: #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \
726: gen_rtx (MEM, MODE, gen_rtx (PLUS, Pmode, stack_pointer_rtx, GEN_INT (-16)))
727:
728: /* Return the maximum number of consecutive registers
729: needed to represent mode MODE in a register of class CLASS. */
1.1.1.3 root 730: #define CLASS_MAX_NREGS(CLASS, MODE) \
731: (!TARGET_SNAKE && (CLASS) == FP_REGS ? 1 : \
732: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
1.1 root 733:
734: /* Stack layout; function entry, exit and calling. */
735:
736: /* Define this if pushing a word on the stack
737: makes the stack pointer a smaller address. */
738: /* #define STACK_GROWS_DOWNWARD */
739:
740: /* Believe it or not. */
741: #define ARGS_GROW_DOWNWARD
742:
743: /* Define this if the nominal address of the stack frame
744: is at the high-address end of the local variables;
745: that is, each additional local variable allocated
746: goes at a more negative offset in the frame. */
747: /* #define FRAME_GROWS_DOWNWARD */
748:
749: /* Offset within stack frame to start allocating local variables at.
750: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
751: first local allocated. Otherwise, it is the offset to the BEGINNING
752: of the first local allocated. */
753: #define STARTING_FRAME_OFFSET 8
754:
755: /* If we generate an insn to push BYTES bytes,
756: this says how many the stack pointer really advances by.
757: On the HP-PA, don't define this because there are no push insns. */
758: /* #define PUSH_ROUNDING(BYTES) */
759:
760: /* Offset of first parameter from the argument pointer register value.
761: This value will be negated because the arguments grow down.
762: Also note that on STACK_GROWS_UPWARD machines (such as this one)
763: this is the distance from the frame pointer to the end of the first
764: argument, not it's beginning. To get the real offset of the first
765: argument, the size of the argument must be added.
766:
767: ??? Have to check on this.*/
768:
1.1.1.3 root 769: #define FIRST_PARM_OFFSET(FNDECL) -32
1.1 root 770:
771: /* Absolute value of offset from top-of-stack address to location to store the
772: function parameter if it can't go in a register.
773: Addresses for following parameters are computed relative to this one. */
1.1.1.3 root 774: #define FIRST_PARM_CALLER_OFFSET(FNDECL) -32
1.1 root 775:
776:
777: /* When a parameter is passed in a register, stack space is still
778: allocated for it. */
779: #define REG_PARM_STACK_SPACE(DECL) 16
780:
781: /* Define this if the above stack space is to be considered part of the
782: space allocated by the caller. */
783: #define OUTGOING_REG_PARM_STACK_SPACE
784:
785: /* Keep the stack pointer constant throughout the function.
786: This is both an optimization and a necessity: longjmp
787: doesn't behave itself when the stack pointer moves within
788: the function! */
789: #define ACCUMULATE_OUTGOING_ARGS
1.1.1.3 root 790:
791: /* The weird HPPA calling conventions require a minimum of 48 bytes on
1.1 root 792: the stack: 16 bytes for register saves, and 32 bytes for magic.
793: This is the difference between the logical top of stack and the
1.1.1.3 root 794: actual sp. */
1.1 root 795: #define STACK_POINTER_OFFSET -32
796:
797: #define STACK_DYNAMIC_OFFSET(FNDECL) \
798: ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size)
799:
800: /* Value is 1 if returning from a function call automatically
801: pops the arguments described by the number-of-args field in the call.
1.1.1.4 root 802: FUNDECL is the declaration node of the function (as a tree),
1.1 root 803: FUNTYPE is the data type of the function (as a tree),
804: or for a library call it is an identifier node for the subroutine name. */
805:
1.1.1.4 root 806: #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
1.1 root 807:
808: /* Define how to find the value returned by a function.
809: VALTYPE is the data type of the value (as a tree).
810: If the precise function being called is known, FUNC is its FUNCTION_DECL;
811: otherwise, FUNC is 0. */
812:
813: /* On the HP-PA the value is found in register(s) 28(-29), unless
814: the mode is SF or DF. Then the value is returned in fr4 (32, ) */
815:
816:
817: #define FUNCTION_VALUE(VALTYPE, FUNC) \
1.1.1.4 root 818: gen_rtx (REG, TYPE_MODE (VALTYPE), ((! TARGET_SOFT_FLOAT \
819: && (TYPE_MODE (VALTYPE) == SFmode || \
820: TYPE_MODE (VALTYPE) == DFmode)) ? \
1.1.1.3 root 821: 32 : 28))
1.1 root 822:
823: /* Define how to find the value returned by a library function
824: assuming the value has mode MODE. */
825:
1.1.1.4 root 826: #define LIBCALL_VALUE(MODE) \
827: gen_rtx (REG, MODE, \
828: (! TARGET_SOFT_FLOAT \
829: && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28))
1.1 root 830:
831: /* 1 if N is a possible register number for a function value
832: as seen by the caller. */
833:
1.1.1.3 root 834: #define FUNCTION_VALUE_REGNO_P(N) \
1.1.1.4 root 835: ((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32))
1.1 root 836:
837: /* 1 if N is a possible register number for function argument passing. */
838:
1.1.1.3 root 839: #define FUNCTION_ARG_REGNO_P(N) \
1.1.1.4 root 840: (((N) >= 23 && (N) <= 26) || (! TARGET_SOFT_FLOAT && (N) >= 32 && (N) <= 39))
1.1 root 841:
842: /* Define a data type for recording info about an argument list
843: during the scan of that argument list. This data type should
844: hold all necessary information about the function itself
845: and about the args processed so far, enough to enable macros
846: such as FUNCTION_ARG to determine where the next arg should go.
847:
848: On the HP-PA, this is a single integer, which is a number of words
849: of arguments scanned so far (including the invisible argument,
850: if any, which holds the structure-value-address).
851: Thus 4 or more means all following args should go on the stack. */
852:
1.1.1.3 root 853: struct hppa_args {int words, nargs_prototype; };
854:
855: #define CUMULATIVE_ARGS struct hppa_args
1.1 root 856:
857: /* Initialize a variable CUM of type CUMULATIVE_ARGS
858: for a call to a function whose data type is FNTYPE.
1.1.1.3 root 859: For a library call, FNTYPE is 0. */
860:
861: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
862: (CUM).words = 0, \
863: (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
864: ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
865: + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
866: || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \
867: : 0)
868:
869:
870:
871: /* Similar, but when scanning the definition of a procedure. We always
872: set NARGS_PROTOTYPE large so we never return an EXPR_LIST. */
1.1 root 873:
1.1.1.3 root 874: #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
875: (CUM).words = 0, \
876: (CUM).nargs_prototype = 1000
1.1 root 877:
878: /* Figure out the size in words of the function argument. */
879:
880: #define FUNCTION_ARG_SIZE(MODE, TYPE) \
881: ((((MODE) != BLKmode ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE))+3)/4)
882:
883: /* Update the data in CUM to advance over an argument
884: of mode MODE and data type TYPE.
885: (TYPE is null for libcalls where that information may not be available.) */
886:
887: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1.1.1.3 root 888: { (CUM).nargs_prototype--; \
889: ((((CUM).words & 01) && (TYPE) != 0 \
890: && FUNCTION_ARG_SIZE(MODE, TYPE) > 1) \
891: && (CUM).words++), \
892: (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE); \
893: }
1.1 root 894:
895: /* Determine where to put an argument to a function.
896: Value is zero to push the argument on the stack,
897: or a hard register in which to store the argument.
898:
899: MODE is the argument's machine mode.
900: TYPE is the data type of the argument (as a tree).
901: This is null for libcalls where that information may
902: not be available.
903: CUM is a variable of type CUMULATIVE_ARGS which gives info about
904: the preceding args and about the function being called.
905: NAMED is nonzero if this argument is a named parameter
1.1.1.3 root 906: (otherwise it is an extra parameter matching an ellipsis).
1.1 root 907:
1.1.1.3 root 908: On the HP-PA the first four words of args are normally in registers
1.1 root 909: and the rest are pushed. But any arg that won't entirely fit in regs
910: is pushed.
911:
912: Arguments passed in registers are either 1 or 2 words long.
913:
914: The caller must make a distinction between calls to explicitly named
915: functions and calls through pointers to functions -- the conventions
916: are different! Calls through pointers to functions only use general
1.1.1.4 root 917: registers for the first four argument words.
1.1.1.3 root 918:
919: Of course all this is different for the portable runtime model
920: HP wants everyone to use for ELF. Ugh. Here's a quick description
921: of how it's supposed to work.
922:
923: 1) callee side remains unchanged. It expects integer args to be
924: in the integer registers, float args in the float registers and
925: unnamed args in integer registers.
926:
927: 2) caller side now depends on if the function being called has
928: a prototype in scope (rather than if it's being called indirectly).
929:
930: 2a) If there is a prototype in scope, then arguments are passed
931: according to their type (ints in integer registers, floats in float
932: registers, unnamed args in integer registers.
933:
934: 2b) If there is no prototype in scope, then floating point arguments
935: are passed in both integer and float registers. egad.
936:
937: FYI: The portable parameter passing conventions are almost exactly like
938: the standard parameter passing conventions on the RS6000. That's why
939: you'll see lots of similar code in rs6000.h. */
1.1 root 940:
941: #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
942:
1.1.1.3 root 943: /* Do not expect to understand this without reading it several times. I'm
944: tempted to try and simply it, but I worry about breaking something. */
1.1 root 945:
1.1.1.3 root 946: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
947: (4 >= ((CUM).words + FUNCTION_ARG_SIZE ((MODE), (TYPE))) \
948: ? (!TARGET_PORTABLE_RUNTIME || (TYPE) == 0 \
1.1.1.4 root 949: || !FLOAT_MODE_P (MODE) || TARGET_SOFT_FLOAT \
950: || (CUM).nargs_prototype > 0) \
1.1.1.3 root 951: ? gen_rtx (REG, (MODE), \
952: (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
1.1.1.4 root 953: ? (((!current_call_is_indirect \
1.1.1.3 root 954: || TARGET_PORTABLE_RUNTIME) \
1.1.1.4 root 955: && (MODE) == DFmode \
956: && ! TARGET_SOFT_FLOAT) \
1.1.1.3 root 957: ? ((CUM).words ? 38 : 34) \
958: : ((CUM).words ? 23 : 25)) \
1.1.1.4 root 959: : (((!current_call_is_indirect \
1.1.1.3 root 960: || TARGET_PORTABLE_RUNTIME) \
1.1.1.4 root 961: && (MODE) == SFmode \
962: && ! TARGET_SOFT_FLOAT) \
1.1.1.3 root 963: ? (32 + 2 * (CUM).words) \
964: : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE), \
965: (TYPE))))))\
966: /* We are calling a non-prototyped function with floating point \
967: arguments using the portable conventions. */ \
968: : gen_rtx (EXPR_LIST, VOIDmode, \
969: gen_rtx (REG, (MODE), \
970: (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
971: ? ((CUM).words ? 38 : 34) \
972: : (32 + 2 * (CUM).words))), \
973: gen_rtx (REG, (MODE), \
974: (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
975: ? ((CUM).words ? 23 : 25) \
976: : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE),\
977: (TYPE)))))) \
978: /* Pass this parameter in the stack. */ \
979: : 0)
1.1 root 980:
981: /* For an arg passed partly in registers and partly in memory,
982: this is the number of registers used.
983: For args passed entirely in registers or entirely in memory, zero. */
984:
985: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
986:
987: /* If defined, a C expression that gives the alignment boundary, in
988: bits, of an argument with the specified mode and type. If it is
989: not defined, `PARM_BOUNDARY' is used for all arguments. */
990:
991: #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
992: (((TYPE) != 0) \
1.1.1.2 root 993: ? (((int_size_in_bytes (TYPE)) + 3) / 4) * BITS_PER_WORD \
1.1 root 994: : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
995: ? PARM_BOUNDARY \
996: : GET_MODE_ALIGNMENT(MODE)))
997:
998: /* Arguments larger than eight bytes are passed by invisible reference */
999:
1000: #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
1001: ((TYPE) && int_size_in_bytes (TYPE) > 8)
1.1.1.4 root 1002:
1003: #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \
1004: ((TYPE) && int_size_in_bytes (TYPE) > 8)
1005:
1.1 root 1006:
1007: extern struct rtx_def *hppa_compare_op0, *hppa_compare_op1;
1008: extern enum cmp_type hppa_branch_type;
1009:
1010: /* Output the label for a function definition. */
1.1.1.2 root 1011: #ifndef HP_FP_ARG_DESCRIPTOR_REVERSED
1.1 root 1012: #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
1013: do { fprintf (FILE, ",ARGW%d=FR", (ARG0)); \
1014: fprintf (FILE, ",ARGW%d=FU", (ARG1));} while (0)
1015: #else
1016: #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
1017: do { fprintf (FILE, ",ARGW%d=FU", (ARG0)); \
1018: fprintf (FILE, ",ARGW%d=FR", (ARG1));} while (0)
1019: #endif
1020:
1021: #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1022: do { tree fntype = TREE_TYPE (TREE_TYPE (DECL)); \
1023: tree tree_type = TREE_TYPE (DECL); \
1024: tree parm; \
1025: int i; \
1.1.1.2 root 1026: if (TREE_PUBLIC (DECL) || TARGET_GAS) \
1.1 root 1027: { extern int current_function_varargs; \
1.1.1.2 root 1028: if (TREE_PUBLIC (DECL)) \
1029: { \
1030: fputs ("\t.EXPORT ", FILE); \
1031: assemble_name (FILE, NAME); \
1032: fputs (",ENTRY,PRIV_LEV=3", FILE); \
1033: } \
1034: else \
1035: { \
1036: fputs ("\t.PARAM ", FILE); \
1037: assemble_name (FILE, NAME); \
1038: } \
1.1.1.3 root 1039: if (TARGET_PORTABLE_RUNTIME) \
1040: { \
1041: fputs (",ARGW0=NO,ARGW1=NO,ARGW2=NO,ARGW3=NO,", FILE); \
1042: fputs ("RTNVAL=NO\n", FILE); \
1043: break; \
1044: } \
1.1 root 1045: for (parm = DECL_ARGUMENTS (DECL), i = 0; parm && i < 4; \
1046: parm = TREE_CHAIN (parm)) \
1047: { \
1.1.1.4 root 1048: if (TYPE_MODE (DECL_ARG_TYPE (parm)) == SFmode \
1049: && ! TARGET_SOFT_FLOAT) \
1.1 root 1050: fprintf (FILE, ",ARGW%d=FR", i++); \
1.1.1.4 root 1051: else if (TYPE_MODE (DECL_ARG_TYPE (parm)) == DFmode \
1052: && ! TARGET_SOFT_FLOAT) \
1.1 root 1053: { \
1054: if (i <= 2) \
1055: { \
1056: if (i == 1) i++; \
1057: ASM_DOUBLE_ARG_DESCRIPTORS (FILE, i++, i++); \
1058: } \
1059: else \
1060: break; \
1061: } \
1062: else \
1063: { \
1064: int arg_size = \
1065: FUNCTION_ARG_SIZE (TYPE_MODE (DECL_ARG_TYPE (parm)),\
1066: DECL_ARG_TYPE (parm)); \
1.1.1.4 root 1067: /* Passing structs by invisible reference uses \
1068: one general register. */ \
1069: if (arg_size > 2 \
1.1.1.5 ! root 1070: || TREE_ADDRESSABLE (DECL_ARG_TYPE (parm)))\
1.1.1.4 root 1071: arg_size = 1; \
1.1 root 1072: if (arg_size == 2 && i <= 2) \
1073: { \
1074: if (i == 1) i++; \
1075: fprintf (FILE, ",ARGW%d=GR", i++); \
1076: fprintf (FILE, ",ARGW%d=GR", i++); \
1077: } \
1078: else if (arg_size == 1) \
1079: fprintf (FILE, ",ARGW%d=GR", i++); \
1080: else \
1081: i += arg_size; \
1082: } \
1083: } \
1084: /* anonymous args */ \
1085: if ((TYPE_ARG_TYPES (tree_type) != 0 \
1086: && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (tree_type)))\
1087: != void_type_node)) \
1088: || current_function_varargs) \
1089: { \
1090: for (; i < 4; i++) \
1091: fprintf (FILE, ",ARGW%d=GR", i); \
1092: } \
1.1.1.4 root 1093: if (TYPE_MODE (fntype) == DFmode && ! TARGET_SOFT_FLOAT) \
1.1 root 1094: fprintf (FILE, ",RTNVAL=FR"); \
1.1.1.4 root 1095: else if (TYPE_MODE (fntype) == SFmode && ! TARGET_SOFT_FLOAT) \
1.1 root 1096: fprintf (FILE, ",RTNVAL=FU"); \
1097: else if (fntype != void_type_node) \
1098: fprintf (FILE, ",RTNVAL=GR"); \
1099: fputs ("\n", FILE); \
1.1.1.3 root 1100: }} while (0)
1.1 root 1101:
1102: /* This macro generates the assembly code for function entry.
1103: FILE is a stdio stream to output the code to.
1104: SIZE is an int: how many units of temporary storage to allocate.
1105: Refer to the array `regs_ever_live' to determine which registers
1106: to save; `regs_ever_live[I]' is nonzero if register number I
1107: is ever used in the function. This macro is responsible for
1108: knowing which registers should not be saved even if used. */
1109:
1110: /* On HP-PA, move-double insns between fpu and cpu need an 8-byte block
1111: of memory. If any fpu reg is used in the function, we allocate
1112: such a block here, at the bottom of the frame, just in case it's needed.
1113:
1114: If this function is a leaf procedure, then we may choose not
1115: to do a "save" insn. The decision about whether or not
1116: to do this is made in regclass.c. */
1117:
1118: #define FUNCTION_PROLOGUE(FILE, SIZE) \
1119: output_function_prologue (FILE, SIZE)
1120:
1121: /* Output assembler code to FILE to increment profiler label # LABELNO
1122: for profiling a function entry.
1123:
1124: Because HPUX _mcount is so different, we actually emit the
1125: profiling code in function_prologue. This just stores LABELNO for
1126: that. */
1127:
1128: #define PROFILE_BEFORE_PROLOGUE
1129: #define FUNCTION_PROFILER(FILE, LABELNO) \
1130: { extern int hp_profile_labelno; hp_profile_labelno = (LABELNO);}
1131:
1132: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1133: the stack pointer does not matter. The value is tested only in
1134: functions that have frame pointers.
1135: No definition is equivalent to always zero. */
1136:
1137: extern int may_call_alloca;
1138: extern int current_function_pretend_args_size;
1139:
1140: #define EXIT_IGNORE_STACK \
1141: (get_frame_size () != 0 \
1142: || current_function_calls_alloca || current_function_outgoing_args_size)
1143:
1144:
1145: /* This macro generates the assembly code for function exit,
1146: on machines that need it. If FUNCTION_EPILOGUE is not defined
1147: then individual return instructions are generated for each
1148: return statement. Args are same as for FUNCTION_PROLOGUE.
1149:
1150: The function epilogue should not depend on the current stack pointer!
1151: It should use the frame pointer only. This is mandatory because
1152: of alloca; we also take advantage of it to omit stack adjustments
1153: before returning. */
1154:
1155: /* This declaration is needed due to traditional/ANSI
1156: incompatibilities which cannot be #ifdefed away
1157: because they occur inside of macros. Sigh. */
1158: extern union tree_node *current_function_decl;
1159:
1160: #define FUNCTION_EPILOGUE(FILE, SIZE) \
1161: output_function_epilogue (FILE, SIZE)
1162:
1163: /* Output assembler code for a block containing the constant parts
1164: of a trampoline, leaving space for the variable parts.\
1165:
1166: The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
1167: and then branches to the specified routine.
1168:
1169: This code template is copied from text segment to stack location
1170: and then patched with INITIALIZE_TRAMPOLINE to contain
1.1.1.3 root 1171: valid values, and then entered as a subroutine.
1.1 root 1172:
1.1.1.3 root 1173: It is best to keep this as small as possible to avoid having to
1.1 root 1174: flush multiple lines in the cache. */
1175:
1176: #define TRAMPOLINE_TEMPLATE(FILE) \
1.1.1.2 root 1177: { \
1178: fprintf (FILE, "\tldw 36(0,%%r22),%%r21\n"); \
1179: fprintf (FILE, "\tbb,>=,n %%r21,30,.+16\n"); \
1180: fprintf (FILE, "\tdepi 0,31,2,%%r21\n"); \
1181: fprintf (FILE, "\tldw 4(0,%%r21),%%r19\n"); \
1182: fprintf (FILE, "\tldw 0(0,%%r21),%%r21\n"); \
1183: fprintf (FILE, "\tldsid (0,%%r21),%%r1\n"); \
1184: fprintf (FILE, "\tmtsp %%r1,%%sr0\n"); \
1185: fprintf (FILE, "\tbe 0(%%sr0,%%r21)\n"); \
1186: fprintf (FILE, "\tldw 40(0,%%r22),%%r29\n"); \
1187: fprintf (FILE, "\t.word 0\n"); \
1188: fprintf (FILE, "\t.word 0\n"); \
1189: }
1.1 root 1190:
1191: /* Length in units of the trampoline for entering a nested function.
1192:
1193: Flush the cache entries corresponding to the first and last addresses
1194: of the trampoline. This is necessary as the trampoline may cross two
1.1.1.3 root 1195: cache lines.
1.1 root 1196:
1.1.1.2 root 1197: If the code part of the trampoline ever grows to > 32 bytes, then it
1198: will become necessary to hack on the cacheflush pattern in pa.md. */
1.1 root 1199:
1.1.1.2 root 1200: #define TRAMPOLINE_SIZE (11 * 4)
1.1 root 1201:
1202: /* Emit RTL insns to initialize the variable parts of a trampoline.
1203: FNADDR is an RTX for the address of the function's pure code.
1204: CXT is an RTX for the static chain value for the function.
1205:
1206: Move the function address to the trampoline template at offset 12.
1207: Move the static chain value to trampoline template at offset 16. */
1208:
1209: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1.1.1.2 root 1210: { \
1.1.1.3 root 1211: rtx start_addr, end_addr; \
1.1.1.2 root 1212: \
1213: start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
1214: emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (FNADDR)); \
1215: start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
1216: emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (CXT)); \
1217: /* fdc and fic only use registers for the address to flush, \
1218: they do not accept integer displacements. */ \
1219: start_addr = force_reg (SImode, (TRAMP)); \
1220: end_addr = force_reg (SImode, plus_constant ((TRAMP), 32)); \
1221: emit_insn (gen_dcacheflush (start_addr, end_addr)); \
1.1.1.3 root 1222: end_addr = force_reg (SImode, plus_constant (start_addr, 32)); \
1223: emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
1.1.1.2 root 1224: gen_reg_rtx (SImode), gen_reg_rtx (SImode)));\
1.1 root 1225: }
1226:
1227: /* Emit code for a call to builtin_saveregs. We must emit USE insns which
1228: reference the 4 integer arg registers and 4 fp arg registers.
1229: Ordinarily they are not call used registers, but they are for
1230: _builtin_saveregs, so we must make this explicit. */
1231:
1.1.1.4 root 1232: extern struct rtx_def *hppa_builtin_saveregs ();
1233: #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) hppa_builtin_saveregs (ARGLIST)
1.1 root 1234:
1235:
1236: /* Addressing modes, and classification of registers for them. */
1237:
1238: #define HAVE_POST_INCREMENT
1239: #define HAVE_POST_DECREMENT
1240:
1241: #define HAVE_PRE_DECREMENT
1242: #define HAVE_PRE_INCREMENT
1243:
1244: /* Macros to check register numbers against specific register classes. */
1245:
1246: /* These assume that REGNO is a hard or pseudo reg number.
1247: They give nonzero only if REGNO is a hard reg of the suitable class
1248: or a pseudo reg currently allocated to a suitable hard reg.
1249: Since they use reg_renumber, they are safe only once reg_renumber
1250: has been allocated, which happens in local-alloc.c. */
1251:
1252: #define REGNO_OK_FOR_INDEX_P(REGNO) \
1253: ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1254: #define REGNO_OK_FOR_BASE_P(REGNO) \
1255: ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1256: #define REGNO_OK_FOR_FP_P(REGNO) \
1.1.1.3 root 1257: (FP_REGNO_P (REGNO) || FP_REGNO_P (reg_renumber[REGNO]))
1.1 root 1258:
1259: /* Now macros that check whether X is a register and also,
1260: strictly, whether it is in a specified class.
1261:
1262: These macros are specific to the the HP-PA, and may be used only
1263: in code for printing assembler insns and in conditions for
1264: define_optimization. */
1265:
1266: /* 1 if X is an fp register. */
1267:
1268: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1269:
1270: /* Maximum number of registers that can appear in a valid memory address. */
1271:
1272: #define MAX_REGS_PER_ADDRESS 2
1273:
1274: /* Recognize any constant value that is a valid address except
1275: for symbolic addresses. We get better CSE by rejecting them
1276: here and allowing hppa_legitimize_address to break them up. We
1277: use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
1278:
1279: #define CONSTANT_ADDRESS_P(X) \
1280: ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1281: || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1282: || GET_CODE (X) == HIGH) \
1283: && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
1284:
1285: /* Include all constant integers and constant doubles, but not
1.1.1.3 root 1286: floating-point, except for floating-point zero. */
1.1 root 1287:
1288: #define LEGITIMATE_CONSTANT_P(X) \
1.1.1.4 root 1289: ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1290: || (X) == CONST0_RTX (GET_MODE (X))) \
1291: && !(flag_pic && function_label_operand (X, VOIDmode)))
1.1 root 1292:
1.1.1.3 root 1293: /* Subroutine for EXTRA_CONSTRAINT.
1.1 root 1294:
1295: Return 1 iff OP is a pseudo which did not get a hard register and
1296: we are running the reload pass. */
1297:
1298: #define IS_RELOADING_PSEUDO_P(OP) \
1299: ((reload_in_progress \
1300: && GET_CODE (OP) == REG \
1301: && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1302: && reg_renumber [REGNO (OP)] < 0))
1303:
1304: /* Optional extra constraints for this machine. Borrowed from sparc.h.
1305:
1306: For the HPPA, `Q' means that this is a memory operand but not a
1307: symbolic memory operand. Note that an unassigned pseudo register
1308: is such a memory operand. Needed because reload will generate
1309: these things in insns and then not re-recognize the insns, causing
1310: constrain_operands to fail.
1311:
1312: Also note `Q' accepts any memory operand during the reload pass.
1.1.1.3 root 1313: This includes out-of-range displacements in reg+d addressing.
1.1 root 1314: This makes for better code. (??? For 2.5 address this issue).
1315:
1316: `R' is unused.
1317:
1.1.1.2 root 1318: `S' is unused.
1.1 root 1319:
1320: `T' is for fp loads and stores. */
1321: #define EXTRA_CONSTRAINT(OP, C) \
1322: ((C) == 'Q' ? \
1323: (IS_RELOADING_PSEUDO_P (OP) \
1324: || (GET_CODE (OP) == MEM \
1325: && reload_in_progress) \
1326: || (GET_CODE (OP) == MEM \
1327: && memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1328: && ! symbolic_memory_operand (OP, VOIDmode))) \
1329: : ((C) == 'T' ? \
1330: (GET_CODE (OP) == MEM \
1331: /* Using DFmode forces only short displacements \
1332: to be recognized as valid in reg+d addresses. */\
1.1.1.2 root 1333: && memory_address_p (DFmode, XEXP (OP, 0))) : 0))
1.1 root 1334:
1335: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1336: and check its validity for a certain class.
1337: We have two alternate definitions for each of them.
1338: The usual definition accepts all pseudo regs; the other rejects
1339: them unless they have been allocated suitable hard regs.
1340: The symbol REG_OK_STRICT causes the latter definition to be used.
1341:
1342: Most source files want to accept pseudo regs in the hope that
1343: they will get allocated to the class that the insn wants them to be in.
1344: Source files for reload pass need to be strict.
1345: After reload, it makes no difference, since pseudo regs have
1346: been eliminated by then. */
1347:
1348: #ifndef REG_OK_STRICT
1349:
1350: /* Nonzero if X is a hard reg that can be used as an index
1351: or if it is a pseudo reg. */
1352: #define REG_OK_FOR_INDEX_P(X) \
1353: (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1354: /* Nonzero if X is a hard reg that can be used as a base reg
1355: or if it is a pseudo reg. */
1356: #define REG_OK_FOR_BASE_P(X) \
1357: (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1358:
1359: #else
1360:
1361: /* Nonzero if X is a hard reg that can be used as an index. */
1362: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1363: /* Nonzero if X is a hard reg that can be used as a base reg. */
1364: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1365:
1366: #endif
1367:
1368: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1369: that is a valid memory address for an instruction.
1370: The MODE argument is the machine mode for the MEM expression
1371: that wants to use this address.
1372:
1373: On the HP-PA, the actual legitimate addresses must be
1374: REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1375: But we can treat a SYMBOL_REF as legitimate if it is part of this
1376: function's constant-pool, because such addresses can actually
1.1.1.3 root 1377: be output as REG+SMALLINT.
1378:
1379: Note we only allow 5 bit immediates for access to a constant address;
1380: doing so avoids losing for loading/storing a FP register at an address
1381: which will not fit in 5 bits. */
1.1 root 1382:
1383: #define VAL_5_BITS_P(X) ((unsigned)(X) + 0x10 < 0x20)
1384: #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1385:
1386: #define VAL_U5_BITS_P(X) ((unsigned)(X) < 0x20)
1387: #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1388:
1389: #define VAL_11_BITS_P(X) ((unsigned)(X) + 0x400 < 0x800)
1390: #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1391:
1392: #define VAL_14_BITS_P(X) ((unsigned)(X) + 0x2000 < 0x4000)
1393: #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1394:
1395: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1396: { \
1397: if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1398: || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1399: || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1400: && REG_P (XEXP (X, 0)) \
1401: && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1402: goto ADDR; \
1403: else if (GET_CODE (X) == PLUS) \
1404: { \
1405: rtx base = 0, index; \
1406: if (flag_pic && XEXP (X, 0) == pic_offset_table_rtx)\
1407: { \
1408: if (GET_CODE (XEXP (X, 1)) == REG \
1409: && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1410: goto ADDR; \
1411: else if (flag_pic == 1 \
1.1.1.4 root 1412: && GET_CODE (XEXP (X, 1)) == SYMBOL_REF)\
1.1 root 1413: goto ADDR; \
1414: } \
1415: else if (REG_P (XEXP (X, 0)) \
1416: && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1417: base = XEXP (X, 0), index = XEXP (X, 1); \
1418: else if (REG_P (XEXP (X, 1)) \
1419: && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1420: base = XEXP (X, 1), index = XEXP (X, 0); \
1421: if (base != 0) \
1422: if (GET_CODE (index) == CONST_INT \
1.1.1.4 root 1423: && ((INT_14_BITS (index) \
1424: && (TARGET_SOFT_FLOAT \
1425: || ((MODE) != SFmode && (MODE) != DFmode))) \
1.1 root 1426: || INT_5_BITS (index))) \
1427: goto ADDR; \
1428: } \
1429: else if (GET_CODE (X) == LO_SUM \
1430: && GET_CODE (XEXP (X, 0)) == REG \
1431: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1432: && CONSTANT_P (XEXP (X, 1)) \
1.1.1.4 root 1433: && (TARGET_SOFT_FLOAT \
1434: || ((MODE) != SFmode \
1435: && (MODE) != DFmode))) \
1.1 root 1436: goto ADDR; \
1437: else if (GET_CODE (X) == LO_SUM \
1438: && GET_CODE (XEXP (X, 0)) == SUBREG \
1439: && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1440: && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1441: && CONSTANT_P (XEXP (X, 1)) \
1.1.1.4 root 1442: && (TARGET_SOFT_FLOAT \
1443: || ((MODE) != SFmode \
1444: && (MODE) != DFmode))) \
1.1 root 1445: goto ADDR; \
1446: else if (GET_CODE (X) == LABEL_REF \
1447: || (GET_CODE (X) == CONST_INT \
1.1.1.3 root 1448: && INT_5_BITS (X))) \
1.1 root 1449: goto ADDR; \
1.1.1.4 root 1450: /* Needed for -fPIC */ \
1451: else if (GET_CODE (X) == LO_SUM \
1452: && GET_CODE (XEXP (X, 0)) == REG \
1453: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1454: && GET_CODE (XEXP (X, 1)) == UNSPEC) \
1455: goto ADDR; \
1.1 root 1456: }
1457:
1458: /* Try machine-dependent ways of modifying an illegitimate address
1459: to be legitimate. If we find one, return the new, valid address.
1460: This macro is used in only one place: `memory_address' in explow.c.
1461:
1462: OLDX is the address as it was before break_out_memory_refs was called.
1463: In some cases it is useful to look at this to decide what needs to be done.
1464:
1465: MODE and WIN are passed so that this macro can use
1466: GO_IF_LEGITIMATE_ADDRESS.
1467:
1468: It is always safe for this macro to do nothing. It exists to recognize
1469: opportunities to optimize the output. */
1470:
1471: extern struct rtx_def *hppa_legitimize_address ();
1472: #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1473: { rtx orig_x = (X); \
1474: (X) = hppa_legitimize_address (X, OLDX, MODE); \
1475: if ((X) != orig_x && memory_address_p (MODE, X)) \
1476: goto WIN; }
1477:
1478: /* Go to LABEL if ADDR (a legitimate address expression)
1479: has an effect that depends on the machine mode it is used for. */
1480:
1481: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1482: if (GET_CODE (ADDR) == PRE_DEC \
1483: || GET_CODE (ADDR) == POST_DEC \
1484: || GET_CODE (ADDR) == PRE_INC \
1485: || GET_CODE (ADDR) == POST_INC) \
1486: goto LABEL
1487:
1488: /* Define this macro if references to a symbol must be treated
1489: differently depending on something about the variable or
1490: function named by the symbol (such as what section it is in).
1491:
1492: The macro definition, if any, is executed immediately after the
1493: rtl for DECL or other node is created.
1494: The value of the rtl will be a `mem' whose address is a
1495: `symbol_ref'.
1496:
1497: The usual thing for this macro to do is to a flag in the
1498: `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1499: name string in the `symbol_ref' (if one bit is not enough
1500: information).
1501:
1502: On the HP-PA we use this to indicate if a symbol is in text or
1503: data space. Also, function labels need special treatment. */
1504:
1505: #define TEXT_SPACE_P(DECL)\
1506: (TREE_CODE (DECL) == FUNCTION_DECL \
1507: || (TREE_CODE (DECL) == VAR_DECL \
1508: && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
1509: && !flag_pic) \
1510: || (*tree_code_type[(int) TREE_CODE (DECL)] == 'c' \
1511: && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings)))
1512:
1513: #define FUNCTION_NAME_P(NAME) \
1514: (*(NAME) == '@' || (*(NAME) == '*' && *((NAME) + 1) == '@'))
1515:
1516: #define ENCODE_SECTION_INFO(DECL)\
1517: do \
1518: { if (TEXT_SPACE_P (DECL)) \
1519: { rtx _rtl; \
1520: if (TREE_CODE (DECL) == FUNCTION_DECL \
1521: || TREE_CODE (DECL) == VAR_DECL) \
1522: _rtl = DECL_RTL (DECL); \
1523: else \
1524: _rtl = TREE_CST_RTL (DECL); \
1525: SYMBOL_REF_FLAG (XEXP (_rtl, 0)) = 1; \
1526: if (TREE_CODE (DECL) == FUNCTION_DECL) \
1.1.1.4 root 1527: hppa_encode_label (XEXP (DECL_RTL (DECL), 0), 0);\
1.1 root 1528: } \
1529: } \
1530: while (0)
1.1.1.3 root 1531:
1.1 root 1532: /* Store the user-specified part of SYMBOL_NAME in VAR.
1533: This is sort of inverse to ENCODE_SECTION_INFO. */
1534:
1535: #define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \
1536: (VAR) = ((SYMBOL_NAME) + ((SYMBOL_NAME)[0] == '*' ? \
1537: 1 + (SYMBOL_NAME)[1] == '@'\
1538: : (SYMBOL_NAME)[0] == '@'))
1539:
1.1.1.4 root 1540: /* Arghh. This is used for stuff in the constant pool; this may include
1541: function addresses on the PA, which during PIC code generation must
1542: reside in the data space. Unfortunately, there's no way to determine
1543: if a particular label in the constant pool refers to a function address.
1544: So just force everything into the data space during PIC generation. */
1545: #define SELECT_RTX_SECTION(RTX,MODE) \
1546: if (flag_pic) \
1547: data_section (); \
1548: else \
1549: readonly_data_section ();
1550:
1.1 root 1551: /* Specify the machine mode that this machine uses
1552: for the index in the tablejump instruction. */
1.1.1.2 root 1553: #define CASE_VECTOR_MODE DImode
1.1 root 1554:
1555: /* Define this if the tablejump instruction expects the table
1556: to contain offsets from the address of the table.
1557: Do not define this if the table should contain absolute addresses. */
1558: /* #define CASE_VECTOR_PC_RELATIVE */
1559:
1560: #define CASE_DROPS_THROUGH
1561: /* Specify the tree operation to be used to convert reals to integers. */
1562: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1563:
1564: /* This is the kind of divide that is easiest to do in the general case. */
1565: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1566:
1567: /* Define this as 1 if `char' should by default be signed; else as 0. */
1568: #define DEFAULT_SIGNED_CHAR 1
1569:
1570: /* Max number of bytes we can move from memory to memory
1571: in one reasonably fast instruction. */
1572: #define MOVE_MAX 8
1573:
1.1.1.2 root 1574: /* Define if operations between registers always perform the operation
1575: on the full register even if a narrower mode is specified. */
1576: #define WORD_REGISTER_OPERATIONS
1577:
1578: /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1579: will either zero-extend or sign-extend. The value of this macro should
1580: be the code that says which one of the two operations is implicitly
1581: done, NIL if none. */
1582: #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1.1 root 1583:
1584: /* Nonzero if access to memory by bytes is slow and undesirable. */
1585: #define SLOW_BYTE_ACCESS 1
1586:
1587: /* Do not break .stabs pseudos into continuations. */
1588: #define DBX_CONTIN_LENGTH 0
1589:
1590: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1591: is done just by pretending it is already truncated. */
1592: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1593:
1594: /* We assume that the store-condition-codes instructions store 0 for false
1595: and some other value for true. This is the value stored for true. */
1596:
1597: #define STORE_FLAG_VALUE 1
1598:
1599: /* When a prototype says `char' or `short', really pass an `int'. */
1600: #define PROMOTE_PROTOTYPES
1601:
1602: /* Specify the machine mode that pointers have.
1603: After generation of rtl, the compiler makes no further distinction
1604: between pointers and any other objects of this machine mode. */
1605: #define Pmode SImode
1606:
1607: /* Add any extra modes needed to represent the condition code.
1608:
1609: HPPA floating comparisons produce condition codes. */
1610: #define EXTRA_CC_MODES CCFPmode
1611:
1612: /* Define the names for the modes specified above. */
1613: #define EXTRA_CC_NAMES "CCFP"
1614:
1615: /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1616: return the mode to be used for the comparison. For floating-point, CCFPmode
1617: should be used. CC_NOOVmode should be used when the first operand is a
1618: PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1619: needed. */
1620: #define SELECT_CC_MODE(OP,X,Y) \
1621: (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1622:
1623: /* A function address in a call instruction
1624: is a byte address (for indexing purposes)
1625: so give the MEM rtx a byte's mode. */
1626: #define FUNCTION_MODE SImode
1.1.1.3 root 1627:
1.1 root 1628: /* Define this if addresses of constant functions
1629: shouldn't be put through pseudo regs where they can be cse'd.
1630: Desirable on machines where ordinary constants are expensive
1631: but a CALL with constant address is cheap. */
1632: #define NO_FUNCTION_CSE
1633:
1.1.1.2 root 1634: /* Define this to be nonzero if shift instructions ignore all but the low-order
1.1 root 1635: few bits. */
1.1.1.2 root 1636: #define SHIFT_COUNT_TRUNCATED 1
1.1 root 1637:
1638: /* Use atexit for static constructors/destructors, instead of defining
1639: our own exit function. */
1640: #define HAVE_ATEXIT
1641:
1642: /* Compute the cost of computing a constant rtl expression RTX
1643: whose rtx-code is CODE. The body of this macro is a portion
1644: of a switch statement. If the code is computed here,
1645: return it with a return statement. Otherwise, break from the switch. */
1646:
1647: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1648: case CONST_INT: \
1649: if (INTVAL (RTX) == 0) return 0; \
1650: if (INT_14_BITS (RTX)) return 1; \
1651: case HIGH: \
1652: return 2; \
1653: case CONST: \
1654: case LABEL_REF: \
1655: case SYMBOL_REF: \
1656: return 4; \
1657: case CONST_DOUBLE: \
1658: if (RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)\
1659: && OUTER_CODE != SET) \
1660: return 0; \
1661: else \
1662: return 8;
1663:
1664: #define ADDRESS_COST(RTX) \
1665: (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1666:
1667: /* Compute extra cost of moving data between one register class
1668: and another.
1669:
1.1.1.2 root 1670: Make moves from SAR so expensive they should never happen. We used to
1671: have 0xffff here, but that generates overflow in rare cases.
1.1 root 1672:
1.1.1.3 root 1673: Copies involving a FP register and a non-FP register are relatively
1.1 root 1674: expensive because they must go through memory.
1675:
1676: Other copies are reasonably cheap. */
1677: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1.1.1.2 root 1678: (CLASS1 == SHIFT_REGS ? 0x100 \
1.1 root 1679: : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
1680: : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
1681: : 2)
1682:
1683:
1684: /* Provide the costs of a rtl expression. This is in the body of a
1685: switch on CODE. The purpose for the cost of MULT is to encourage
1686: `synth_mult' to find a synthetic multiply when reasonable. */
1687:
1.1.1.3 root 1688: #define RTX_COSTS(X,CODE,OUTER_CODE) \
1689: case MULT: \
1.1.1.4 root 1690: return (TARGET_SNAKE && ! TARGET_DISABLE_FPREGS \
1691: && ! TARGET_SOFT_FLOAT \
1692: ? COSTS_N_INSNS (8) : COSTS_N_INSNS (20)); \
1.1.1.3 root 1693: case DIV: \
1694: case UDIV: \
1695: case MOD: \
1696: case UMOD: \
1697: return COSTS_N_INSNS (60); \
1698: case PLUS: \
1699: if (GET_CODE (XEXP (X, 0)) == MULT \
1700: && shadd_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \
1701: return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
1702: + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1703: break;
1.1 root 1704:
1705: /* Adjust the cost of dependencies. */
1706:
1707: #define ADJUST_COST(INSN,LINK,DEP,COST) \
1708: (COST) = pa_adjust_cost (INSN, LINK, DEP, COST)
1709:
1710: /* Handling the special cases is going to get too complicated for a macro,
1711: just call `pa_adjust_insn_length' to do the real work. */
1712: #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1713: LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1714:
1715: /* Enable a bug fix. (This is for extra caution.) */
1716: #define SHORTEN_WITH_ADJUST_INSN_LENGTH
1717:
1718: /* Millicode insns are actually function calls with some special
1719: constraints on arguments and register usage.
1720:
1721: Millicode calls always expect their arguments in the integer argument
1722: registers, and always return their result in %r29 (ret1). They
1723: are expected to clobber their arguments, %r1, %r29, and %r31 and
1724: nothing else.
1725:
1.1.1.3 root 1726: These macros tell reorg that the references to arguments and
1727: register clobbers for millicode calls do not appear to happen
1.1 root 1728: until after the millicode call. This allows reorg to put insns
1729: which set the argument registers into the delay slot of the millicode
1730: call -- thus they act more like traditional CALL_INSNs.
1731:
1732: get_attr_type will try to recognize the given insn, so make sure to
1733: filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1734: in particular. */
1735: #define INSN_SETS_ARE_DELAYED(X) \
1736: ((GET_CODE (X) == INSN \
1737: && GET_CODE (PATTERN (X)) != SEQUENCE \
1738: && GET_CODE (PATTERN (X)) != USE \
1739: && GET_CODE (PATTERN (X)) != CLOBBER \
1740: && get_attr_type (X) == TYPE_MILLI))
1741:
1742: #define INSN_REFERENCES_ARE_DELAYED(X) \
1743: ((GET_CODE (X) == INSN \
1744: && GET_CODE (PATTERN (X)) != SEQUENCE \
1745: && GET_CODE (PATTERN (X)) != USE \
1746: && GET_CODE (PATTERN (X)) != CLOBBER \
1.1.1.3 root 1747: && get_attr_type (X) == TYPE_MILLI))
1.1 root 1748:
1749:
1750: /* Control the assembler format that we output. */
1751:
1752: /* Output at beginning of assembler file. */
1753:
1754: #define ASM_FILE_START(FILE) \
1755: do { fprintf (FILE, "\t.SPACE $PRIVATE$\n\
1756: \t.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31\n\
1757: \t.SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82\n\
1758: \t.SPACE $TEXT$\n\
1759: \t.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44\n\
1760: \t.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n\
1761: \t.IMPORT $global$,DATA\n\
1762: \t.IMPORT $$dyncall,MILLICODE\n");\
1763: if (profile_flag)\
1764: fprintf (FILE, "\t.IMPORT _mcount, CODE\n");\
1.1.1.2 root 1765: if (write_symbols != NO_DEBUG) \
1766: output_file_directive ((FILE), main_input_filename); \
1.1 root 1767: } while (0)
1768:
1769: /* Output to assembler file text saying following lines
1770: may contain character constants, extra white space, comments, etc. */
1771:
1772: #define ASM_APP_ON ""
1773:
1774: /* Output to assembler file text saying following lines
1775: no longer contain unusual constructs. */
1776:
1777: #define ASM_APP_OFF ""
1778:
1779: /* We don't yet know how to identify GCC to HP-PA machines. */
1780: #define ASM_IDENTIFY_GCC(FILE) fprintf (FILE, "; gcc_compiled.:\n")
1781:
1782: /* Output before code. */
1783:
1784: /* Supposedly the assembler rejects the command if there is no tab! */
1785: #define TEXT_SECTION_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $CODE$\n"
1786:
1.1.1.2 root 1787: /* Output before read-only data. */
1788:
1789: /* Supposedly the assembler rejects the command if there is no tab! */
1790: #define READONLY_DATA_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $LIT$\n"
1791:
1792: #define READONLY_DATA_SECTION readonly_data
1793:
1.1 root 1794: /* Output before writable data. */
1795:
1796: /* Supposedly the assembler rejects the command if there is no tab! */
1797: #define DATA_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $DATA$\n"
1798:
1799: /* Output before uninitialized data. */
1800:
1801: #define BSS_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $BSS$\n"
1802:
1803: /* Define the .bss section for ASM_OUTPUT_LOCAL to use. */
1804:
1.1.1.2 root 1805: #define EXTRA_SECTIONS in_bss, in_readonly_data
1.1 root 1806:
1.1.1.4 root 1807: /* FIXME: HPUX ld generates incorrect GOT entries for "T" fixups
1808: which reference data within the $TEXT$ space (for example constant
1809: strings in the $LIT$ subspace).
1810:
1811: The assemblers (GAS and HP as) both have problems with handling
1812: the difference of two symbols which is the other correct way to
1813: reference constant data during PIC code generation.
1814:
1815: So, there's no way to reference constant data which is in the
1816: $TEXT$ space during PIC generation. Instead place all constant
1817: data into the $PRIVATE$ subspace (this reduces sharing, but it
1818: works correctly). */
1819:
1.1 root 1820: #define EXTRA_SECTION_FUNCTIONS \
1821: void \
1822: bss_section () \
1823: { \
1824: if (in_section != in_bss) \
1825: { \
1826: fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \
1827: in_section = in_bss; \
1828: } \
1.1.1.2 root 1829: } \
1830: void \
1831: readonly_data () \
1832: { \
1833: if (in_section != in_readonly_data) \
1834: { \
1.1.1.4 root 1835: if (flag_pic) \
1836: fprintf (asm_out_file, "%s\n", DATA_SECTION_ASM_OP); \
1837: else \
1838: fprintf (asm_out_file, "%s\n", READONLY_DATA_ASM_OP); \
1.1.1.2 root 1839: in_section = in_readonly_data; \
1840: } \
1.1 root 1841: }
1842:
1843:
1844: /* How to refer to registers in assembler output.
1845: This sequence is indexed by compiler's hard-register-number (see above). */
1846:
1847: #define REGISTER_NAMES \
1.1.1.3 root 1848: {"%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
1849: "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
1850: "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", \
1851: "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", \
1852: "%fr4", "%fr4R", "%fr5", "%fr5R", "%fr6", "%fr6R", "%fr7", "%fr7R", \
1853: "%fr8", "%fr8R", "%fr9", "%fr9R", "%fr10", "%fr10R", "%fr11", "%fr11R", \
1854: "%fr12", "%fr12R", "%fr13", "%fr13R", "%fr14", "%fr14R", "%fr15", "%fr15R", \
1855: "%fr16", "%fr16R", "%fr17", "%fr17R", "%fr18", "%fr18R", "%fr19", "%fr19R", \
1856: "%fr20", "%fr20R", "%fr21", "%fr21R", "%fr22", "%fr22R", "%fr23", "%fr23R", \
1857: "%fr24", "%fr24R", "%fr25", "%fr25R", "%fr26", "%fr26R", "%fr27", "%fr27R", \
1858: "%fr28", "%fr28R", "%fr29", "%fr29R", "%fr30", "%fr30R", "%fr31", "%fr31R", \
1.1 root 1859: "SAR"}
1860:
1.1.1.3 root 1861: #define ADDITIONAL_REGISTER_NAMES \
1862: {{"%fr4L",32}, {"%fr5L",34}, {"%fr6L",36}, {"%fr7L",38}, \
1863: {"%fr8L",40}, {"%fr9L",42}, {"%fr10L",44}, {"%fr11L",46}, \
1864: {"%fr12L",48}, {"%fr13L",50}, {"%fr14L",52}, {"%fr15L",54}, \
1865: {"%fr16L",56}, {"%fr17L",58}, {"%fr18L",60}, {"%fr19L",62}, \
1866: {"%fr20L",64}, {"%fr21L",66}, {"%fr22L",68}, {"%fr23L",70}, \
1867: {"%fr24L",72}, {"%fr25L",74}, {"%fr26L",76}, {"%fr27L",78}, \
1868: {"%fr28L",80}, {"%fr29L",82}, {"%fr30L",84}, {"%fr31R",86}, \
1869: {"%cr11",88}}
1870:
1871: /* How to renumber registers for dbx and gdb.
1872:
1873: Registers 0 - 31 remain unchanged.
1874:
1875: Registers 32 - 87 are mapped to 72 - 127
1876:
1877: Register 88 is mapped to 32. */
1878:
1879: #define DBX_REGISTER_NUMBER(REGNO) \
1880: ((REGNO) <= 31 ? (REGNO) : \
1881: ((REGNO) > 31 && (REGNO) <= 87 ? (REGNO) + 40 : 32))
1.1 root 1882:
1883: /* This is how to output the definition of a user-level label named NAME,
1884: such as the label on a static function or variable NAME. */
1885:
1886: #define ASM_OUTPUT_LABEL(FILE, NAME) \
1887: do { assemble_name (FILE, NAME); \
1888: fputc ('\n', FILE); } while (0)
1889:
1890: /* This is how to output a command to make the user-level label named NAME
1891: defined for reference from other files. */
1892:
1893: #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1894: do { fputs ("\t.IMPORT ", FILE); \
1895: assemble_name (FILE, NAME); \
1896: if (FUNCTION_NAME_P (NAME)) \
1897: fputs (",CODE\n", FILE); \
1898: else \
1899: fputs (",DATA\n", FILE); \
1900: } while (0)
1901:
1.1.1.3 root 1902: /* The bogus HP assembler requires ALL external references to be
1.1 root 1903: "imported", even library calls. They look a bit different, so
1.1.1.4 root 1904: here's this macro.
1905:
1906: Also note not all libcall names are passed to ENCODE_SECTION_INFO
1907: (__main for example). To make sure all libcall names have section
1908: info recorded in them, we do it here. */
1.1 root 1909:
1910: #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, RTL) \
1911: do { fputs ("\t.IMPORT ", FILE); \
1.1.1.4 root 1912: if (!function_label_operand (RTL, VOIDmode)) \
1913: hppa_encode_label (RTL, 1); \
1.1 root 1914: assemble_name (FILE, XSTR ((RTL), 0)); \
1915: fputs (",CODE\n", FILE); \
1916: } while (0)
1917:
1918: #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1.1.1.3 root 1919: do { \
1920: /* We only handle DATA objects here, functions are globalized in \
1921: ASM_DECLARE_FUNCTION_NAME. */ \
1922: if (! FUNCTION_NAME_P (NAME)) \
1923: { \
1924: fputs ("\t.EXPORT ", FILE); \
1925: assemble_name (FILE, NAME); \
1926: fputs (",DATA\n", FILE); \
1927: } \
1928: } while (0)
1.1 root 1929:
1930: /* This is how to output a reference to a user-level label named NAME.
1931: `assemble_name' uses this. */
1932:
1933: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1934: fprintf ((FILE), "%s", (NAME) + (FUNCTION_NAME_P (NAME) ? 1 : 0))
1935:
1936: /* This is how to output an internal numbered label where
1937: PREFIX is the class of label and NUM is the number within the class. */
1938:
1939: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1.1.1.3 root 1940: {fprintf (FILE, "%c$%s%04d\n", (PREFIX)[0], (PREFIX) + 1, NUM);}
1.1 root 1941:
1942: /* This is how to store into the string LABEL
1943: the symbol_ref name of an internal numbered label where
1944: PREFIX is the class of label and NUM is the number within the class.
1945: This is suitable for output with `assemble_name'. */
1946:
1947: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1.1.1.3 root 1948: sprintf (LABEL, "*%c$%s%04d", (PREFIX)[0], (PREFIX) + 1, NUM)
1.1 root 1949:
1950: /* This is how to output an assembler line defining a `double' constant. */
1951:
1952: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1.1.1.4 root 1953: do { long l[2]; \
1954: REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
1955: fprintf (FILE, "\t.word 0x%lx\n\t.word 0x%lx\n", l[0], l[1]); \
1956: } while (0)
1.1 root 1957:
1958: /* This is how to output an assembler line defining a `float' constant. */
1959:
1960: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1.1.1.4 root 1961: do { long l; \
1962: REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
1963: fprintf (FILE, "\t.word 0x%lx\n", l); \
1964: } while (0)
1.1 root 1965:
1966: /* This is how to output an assembler line defining an `int' constant. */
1967:
1968: #define ASM_OUTPUT_INT(FILE,VALUE) \
1969: { fprintf (FILE, "\t.word "); \
1.1.1.3 root 1970: if (function_label_operand (VALUE, VOIDmode) \
1971: && !TARGET_PORTABLE_RUNTIME) \
1.1 root 1972: fprintf (FILE, "P%%"); \
1973: output_addr_const (FILE, (VALUE)); \
1974: fprintf (FILE, "\n");}
1975:
1976: /* Likewise for `short' and `char' constants. */
1977:
1978: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1979: ( fprintf (FILE, "\t.half "), \
1980: output_addr_const (FILE, (VALUE)), \
1981: fprintf (FILE, "\n"))
1982:
1983: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1984: ( fprintf (FILE, "\t.byte "), \
1985: output_addr_const (FILE, (VALUE)), \
1986: fprintf (FILE, "\n"))
1987:
1988: /* This is how to output an assembler line for a numeric constant byte. */
1989:
1990: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1991: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1992:
1993: #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1994: output_ascii ((FILE), (P), (SIZE))
1995:
1996: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO)
1.1.1.3 root 1997: #define ASM_OUTPUT_REG_POP(FILE,REGNO)
1.1 root 1998: /* This is how to output an element of a case-vector that is absolute.
1999: Note that this method makes filling these branch delay slots
2000: impossible. */
2001:
2002: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
2003: fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
2004:
2005: /* Jump tables are executable code and live in the TEXT section on the PA. */
2006: #define JUMP_TABLES_IN_TEXT_SECTION
2007:
2008: /* This is how to output an element of a case-vector that is relative.
1.1.1.3 root 2009: This must be defined correctly as it is used when generating PIC code.
2010:
1.1.1.4 root 2011: I believe it safe to use the same definition as ASM_OUTPUT_ADDR_VEC_ELT
1.1.1.3 root 2012: on the PA since ASM_OUTPUT_ADDR_VEC_ELT uses pc-relative jump instructions
2013: rather than a table of absolute addresses. */
1.1 root 2014:
2015: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1.1.1.3 root 2016: fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1.1 root 2017:
2018: /* This is how to output an assembler line
2019: that says to advance the location counter
2020: to a multiple of 2**LOG bytes. */
2021:
2022: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
2023: fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
2024:
2025: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
2026: fprintf (FILE, "\t.blockz %d\n", (SIZE))
2027:
1.1.1.3 root 2028: /* This says how to output an assembler line to define a global common symbol
2029: with size SIZE (in bytes) and alignment ALIGN (in bits). */
1.1 root 2030:
1.1.1.3 root 2031: #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGNED) \
2032: { bss_section (); \
2033: assemble_name ((FILE), (NAME)); \
2034: fputs ("\t.comm ", (FILE)); \
2035: fprintf ((FILE), "%d\n", MAX ((SIZE), ((ALIGNED) / BITS_PER_UNIT)));}
2036:
2037: /* This says how to output an assembler line to define a local common symbol
2038: with size SIZE (in bytes) and alignment ALIGN (in bits). */
2039:
2040: #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGNED) \
2041: { bss_section (); \
2042: fprintf ((FILE), "\t.align %d\n", ((ALIGNED) / BITS_PER_UNIT)); \
1.1 root 2043: assemble_name ((FILE), (NAME)); \
1.1.1.3 root 2044: fprintf ((FILE), "\n\t.block %d\n", (SIZE));}
2045:
1.1 root 2046: /* Store in OUTPUT a string (made with alloca) containing
2047: an assembler-name for a local static variable named NAME.
2048: LABELNO is an integer which is different for each call. */
2049:
2050: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2051: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
2052: sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
2053:
2054: /* Define the parentheses used to group arithmetic operations
2055: in assembler code. */
2056:
2057: #define ASM_OPEN_PAREN "("
2058: #define ASM_CLOSE_PAREN ")"
2059:
1.1.1.3 root 2060: /* All HP assemblers use "!" to separate logical lines. */
2061: #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!')
2062:
1.1 root 2063: /* Define results of standard character escape sequences. */
2064: #define TARGET_BELL 007
2065: #define TARGET_BS 010
2066: #define TARGET_TAB 011
2067: #define TARGET_NEWLINE 012
2068: #define TARGET_VT 013
2069: #define TARGET_FF 014
2070: #define TARGET_CR 015
2071:
2072: #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
2073: ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
2074:
2075: /* Print operand X (an rtx) in assembler syntax to file FILE.
2076: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2077: For `%' followed by punctuation, CODE is the punctuation and X is null.
2078:
2079: On the HP-PA, the CODE can be `r', meaning this is a register-only operand
2080: and an immediate zero should be represented as `r0'.
2081:
2082: Several % codes are defined:
2083: O an operation
2084: C compare conditions
2085: N extract conditions
2086: M modifier to handle preincrement addressing for memory refs.
2087: F modifier to handle preincrement addressing for fp memory refs */
2088:
2089: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
2090:
2091:
2092: /* Print a memory address as an operand to reference that memory location. */
2093:
2094: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
2095: { register rtx addr = ADDR; \
2096: register rtx base; \
2097: int offset; \
2098: switch (GET_CODE (addr)) \
2099: { \
2100: case REG: \
2101: fprintf (FILE, "0(0,%s)", reg_names [REGNO (addr)]); \
2102: break; \
2103: case PLUS: \
2104: if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
2105: offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
2106: else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
2107: offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
2108: else \
2109: abort (); \
2110: fprintf (FILE, "%d(0,%s)", offset, reg_names [REGNO (base)]); \
2111: break; \
2112: case LO_SUM: \
1.1.1.4 root 2113: if (!symbolic_operand (XEXP (addr, 1))) \
2114: fputs ("R'", FILE); \
2115: else if (flag_pic == 0) \
2116: fputs ("RR'", FILE); \
2117: else if (flag_pic == 1) \
2118: abort (); \
2119: else if (flag_pic == 2) \
2120: fputs ("RT'", FILE); \
1.1 root 2121: output_global_address (FILE, XEXP (addr, 1)); \
2122: fputs ("(", FILE); \
2123: output_operand (XEXP (addr, 0), 0); \
2124: fputs (")", FILE); \
2125: break; \
2126: case CONST_INT: \
2127: fprintf (FILE, "%d(0,0)", INTVAL (addr)); \
2128: break; \
2129: default: \
2130: output_addr_const (FILE, addr); \
2131: }}
2132:
2133:
2134: /* Define functions in pa.c and used in insn-output.c. */
2135:
2136: extern char *output_and ();
2137: extern char *output_ior ();
2138: extern char *output_move_double ();
2139: extern char *output_fp_move_double ();
2140: extern char *output_block_move ();
2141: extern char *output_cbranch ();
2142: extern char *output_bb ();
1.1.1.2 root 2143: extern char *output_dbra ();
2144: extern char *output_movb ();
1.1 root 2145: extern char *output_return ();
1.1.1.2 root 2146: extern char *output_call ();
1.1 root 2147: extern char *output_mul_insn ();
2148: extern char *output_div_insn ();
2149: extern char *output_mod_insn ();
2150: extern char *singlemove_string ();
2151: extern void output_arg_descriptor ();
2152: extern void output_global_address ();
2153: extern struct rtx_def *legitimize_pic_address ();
2154: extern struct rtx_def *gen_cmp_fp ();
2155: extern void hppa_encode_label ();
2156:
1.1.1.3 root 2157: #if 0
2158: #define PREDICATE_CODES \
1.1.1.4 root 2159: {"reg_or_0_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \
1.1.1.3 root 2160: {"reg_or_cint_move_operand", {SUBREG, REG, CONST_INT}}, \
2161: {"arith_operand", {SUBREG, REG, CONST_INT}}, \
2162: {"arith32_operand", {SUBREG, REG, CONST_INT}}, \
2163: {"arith11_operand", {SUBREG, REG, CONST_INT}}, \
2164: {"arith5_operand", {SUBREG, REG, CONST_INT}}, \
2165: {"pre_cint_operand", {CONST_INT}}, \
2166: {"post_cint_operand", {CONST_INT}}, \
2167: {"int5_operand", {CONST_INT}}, \
2168: {"uint5_operand", {CONST_INT}}, \
2169: {"uint32_operand", {CONST_INT}}, \
2170: {"int11_operand", {CONST_INT}}, \
2171: {"and_operand", {SUBREG, REG, CONST_INT}}, \
2172: {"ior_operand", {CONST_INT}}, \
2173: {"lhs_lshift_operand", {SUBREG, REG, CONST_INT}}, \
2174: {"lhs_lshift_cint_operand", {CONST_INT}}, \
2175: {"plus_xor_ior_operator", {PLUS, XOR, IOR}}, \
2176: {"shadd_operand", {CONST_INT}}, \
2177: {"eq_neq_comparison_operator", {EQ, NE}}, \
2178: {"movb_comparison_operator", {EQ, NE, LT, GE}}, \
2179: {"pc_or_label_operand", {LABEL_REF, PC}}, \
2180: {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \
1.1.1.4 root 2181: {"reg_or_nonsymb_mem_operand", {SUBREG, REG, MEM}}, \
2182: {"move_operand", {SUBREG, REG, CONST_INT, MEM}}, \
2183: {"pic_label_operand", {LABEL_REF, CONST}}, \
1.1.1.3 root 2184: {"function_label_operand", {SYMBOL_REF}}, \
1.1.1.4 root 2185: {"reg_or_0_or_nonsymb_mem_operand", {SUBREG, REG, CONST_INT, \
2186: CONST_DOUBLE, MEM}}, \
1.1.1.3 root 2187: {"div_operand", {REG, CONST_INT}}, \
1.1.1.4 root 2188: {"call_operand_address", {SYMBOL_REF, LABEL_REF, CONST_INT, \
2189: CONST_DOUBLE, CONST, HIGH}},
1.1.1.3 root 2190: #endif
1.1.1.4 root 2191:
2192: /* We want __gcc_plt_call to appear in every program built by
2193: gcc, so we make a reference to it out of __main.
2194: We use the asm statement to fool the optimizer into not
2195: removing the dead (but important) initialization of
2196: REFERENCE. */
2197:
2198: #define DO_GLOBAL_DTORS_BODY \
2199: do { \
2200: extern void __gcc_plt_call (); \
2201: void (*reference)() = &__gcc_plt_call; \
2202: func_ptr *p; \
2203: __asm__ ("" : : "r" (reference)); \
2204: for (p = __DTOR_LIST__ + 1; *p; ) \
2205: (*p++) (); \
2206: } while (0)
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