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1.1 root 1: /* Definitions of target machine for GNU compiler, for the pdp-11
2: Copyright (C) 1994 Free Software Foundation, Inc.
3: Contributed by Michael K. Gschwind ([email protected]).
4:
5: This file is part of GNU CC.
6:
7: GNU CC is free software; you can redistribute it and/or modify
8: it under the terms of the GNU General Public License as published by
9: the Free Software Foundation; either version 1, or (at your option)
10: any later version.
11:
12: GNU CC is distributed in the hope that it will be useful,
13: but WITHOUT ANY WARRANTY; without even the implied warranty of
14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15: GNU General Public License for more details.
16:
17: You should have received a copy of the GNU General Public License
18: along with GNU CC; see the file COPYING. If not, write to
19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20:
21:
22: /* declarations */
23: char *output_jump();
24: char *output_move_double();
25: char *output_move_quad();
26: char *output_block_move();
27:
28: /* check whther load_fpu_reg or not */
29: #define LOAD_FPU_REG_P(x) ((x)>=8 && (x)<=11)
30: #define NO_LOAD_FPU_REG_P(x) ((x)==12 || (x)==13)
31: #define FPU_REG_P(x) (LOAD_FPU_REG_P(x) || NO_LOAD_FPU_REG_P(x))
32: #define CPU_REG_P(x) ((x)<8)
33:
34: /* Names to predefine in the preprocessor for this target machine. */
35:
36: #define CPP_PREDEFINES "-Dpdp11"
37:
38: /* Print subsidiary information on the compiler version in use. */
39: #define TARGET_VERSION fprintf (stderr, " (pdp11)");
40:
41:
42: /* Generate DBX debugging information. */
43:
44: /* #define DBX_DEBUGGING_INFO */
45:
46: /* Run-time compilation parameters selecting different hardware subsets.
47: */
48:
49: extern int target_flags;
50:
51: /* Macro to define tables used to set the flags.
52: This is a list in braces of pairs in braces,
53: each pair being { "NAME", VALUE }
54: where VALUE is the bits to set or minus the bits to clear.
55: An empty string NAME is used to identify the default VALUE. */
56:
57: #define TARGET_SWITCHES \
58: { { "fpu", 1}, \
59: { "soft-float", -1}, \
60: /* return float result in ac0 */\
61: { "ac0", 2}, \
62: { "no-ac0", -2}, \
63: /* is 11/40 */ \
64: { "40", 4}, \
65: { "no-40", -4}, \
66: /* is 11/45 */ \
67: { "45", 8}, \
68: { "no-45", -8}, \
69: /* is 11/10 */ \
70: { "10", -12}, \
71: /* use movstrhi for bcopy */ \
72: { "bcopy", 16}, \
73: { "bcopy-builtin", -16}, \
74: /* use 32 bit for int */ \
75: { "int32", 32}, \
76: { "no-int16", 32}, \
77: { "int16", -32}, \
78: { "no-int32", -32}, \
79: /* use 32 bit for float */ \
80: { "float32", 64}, \
81: { "no-float64", 64}, \
82: { "float64", -64}, \
83: { "no-float32", -64}, \
84: /* allow abshi pattern? - can trigger "optimizations" which make code SLOW! */\
85: { "abshi", 128}, \
86: { "no-abshi", -128}, \
87: /* is branching expensive - on a PDP, it's actually really cheap */ \
88: /* this is just to play aroound and check what code gcc generates */ \
89: { "branch-expensive", 256}, \
90: { "branch-cheap", -256}, \
91: /* optimize for space instead of time - just in a couple of places */ \
92: { "space", 512 }, \
93: { "time", -512 }, \
94: /* split instruction and data memory? */ \
95: { "split", 1024 }, \
96: { "no-split", -1024 }, \
97: /* default */ \
98: { "", TARGET_DEFAULT} \
99: }
100:
101: #define TARGET_DEFAULT (1 | 8 | 128)
102:
103: #define TARGET_FPU (target_flags & 1)
104: #define TARGET_SOFT_FLOAT (!TARGET_FPU)
105:
106: #define TARGET_AC0 ((target_flags & 2) && TARGET_FPU)
107: #define TARGET_NO_AC0 (! TARGET_AC0)
108:
109: #define TARGET_45 (target_flags & 8)
110: #define TARGET_40_PLUS ((target_flags & 4) || (target_flags))
111: #define TARGET_10 (! TARGET_40_PLUS)
112:
113: #define TARGET_BCOPY_BUILTIN (! (target_flags & 16))
114:
115: #define TARGET_INT16 (! TARGET_INT32)
116: #define TARGET_INT32 (target_flags & 32)
117:
118: #define TARGET_FLOAT32 (target_flags & 64)
119: #define TARGET_FLOAT64 (! TARGET_FLOAT32)
120:
121: #define TARGET_ABSHI_BUILTIN (target_flags & 128)
122:
123: #define TARGET_BRANCH_EXPENSIVE (target_flags & 256)
124: #define TARGET_BRANCH_CHEAP (!TARGET_BRANCH_EXPENSIVE)
125:
126: #define TARGET_SPACE (target_flags & 512)
127: #define TARGET_TIME (! TARGET_SPACE)
128:
129: #define TARGET_SPLIT (target_flags & 1024)
130: #define TARGET_NOSPLIT (! TARGET_SPLIT)
131:
132:
133: /* TYPE SIZES */
134: #define CHAR_TYPE_SIZE 8
135: #define SHORT_TYPE_SIZE 16
136: #define INT_TYPE_SIZE (TARGET_INT16 ? 16 : 32)
137: #define LONG_TYPE_SIZE 32
138: #define LONG_LONG_TYPE_SIZE 64
139:
140: /* if we set FLOAT_TYPE_SIZE to 32, we could have the benefit
141: of saving core for huge arrays - the definitions are
142: already in md - but floats can never reside in
143: an FPU register - we keep the FPU in double float mode
144: all the time !! */
145: #define FLOAT_TYPE_SIZE (TARGET_FLOAT32 ? 32 : 64)
146: #define DOUBLE_TYPE_SIZE 64
147: #define LONG_DOUBLE_TYPE_SIZE 64
148:
149: /* machine types from ansi */
150: #define SIZE_TYPE "unsigned int" /* definition of size_t */
151:
152: /* is used in cexp.y - we don't have target_flags there,
153: so just give default definition
154:
155: hope it does not come back to haunt us! */
156: #define WCHAR_TYPE "int" /* or long int???? */
157: #define WCHAR_TYPE_SIZE 16
158:
159: #define PTRDIFF_TYPE "int"
160:
161: /* target machine storage layout */
162:
163: /* Define this if most significant bit is lowest numbered
164: in instructions that operate on numbered bit-fields. */
165: #define BITS_BIG_ENDIAN 0
166:
167: /* Define this if most significant byte of a word is the lowest numbered. */
168: #define BYTES_BIG_ENDIAN 0
169:
170: /* Define this if most significant word of a multiword number is numbered. */
171: #define WORDS_BIG_ENDIAN 1
172:
173: /* number of bits in an addressible storage unit */
174: #define BITS_PER_UNIT 8
175:
176: /* Width in bits of a "word", which is the contents of a machine register.
177: Note that this is not necessarily the width of data type `int';
178: if using 16-bit ints on a 68000, this would still be 32.
179: But on a machine with 16-bit registers, this would be 16. */
180: /* This is a machine with 16-bit registers */
181: #define BITS_PER_WORD 16
182:
183: /* Width of a word, in units (bytes).
184:
185: UNITS OR BYTES - seems like units */
186: #define UNITS_PER_WORD 2
187:
188: /* Maximum sized of reasonable data type
189: DImode or Dfmode ...*/
190: #define MAX_FIXED_MODE_SIZE 64
191:
192: /* Width in bits of a pointer.
193: See also the macro `Pmode' defined below. */
194: #define POINTER_SIZE 16
195:
196: /* Allocation boundary (in *bits*) for storing pointers in memory. */
197: #define POINTER_BOUNDARY 16
198:
199: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
200: #define PARM_BOUNDARY 16
201:
202: /* Allocation boundary (in *bits*) for the code of a function. */
203: #define FUNCTION_BOUNDARY 16
204:
205: /* Alignment of field after `int : 0' in a structure. */
206: #define EMPTY_FIELD_BOUNDARY 16
207:
208: /* No data type wants to be aligned rounder than this. */
209: #define BIGGEST_ALIGNMENT 16
210:
211: /* Define this if move instructions will actually fail to work
212: when given unaligned data. */
213: #define STRICT_ALIGNMENT 1
214:
215: /* Standard register usage. */
216:
217: /* Number of actual hardware registers.
218: The hardware registers are assigned numbers for the compiler
219: from 0 to just below FIRST_PSEUDO_REGISTER.
220: All registers that the compiler knows about must be given numbers,
221: even those that are not normally considered general registers.
222:
223: we have 8 integer registers, plus 6 float
224: (don't use scratch float !) */
225:
226: #define FIRST_PSEUDO_REGISTER 14
227:
228: /* 1 for registers that have pervasive standard uses
229: and are not available for the register allocator.
230:
231: On the pdp, these are:
232: Reg 7 = pc;
233: reg 6 = sp;
234: reg 5 = fp; not necessarily!
235: */
236:
237: /* don't let them touch fp regs for the time being !*/
238:
239: #define FIXED_REGISTERS \
240: {0, 0, 0, 0, 0, 0, 1, 1, \
241: 0, 0, 0, 0, 0, 0 }
242:
243:
244:
245: /* 1 for registers not available across function calls.
246: These must include the FIXED_REGISTERS and also any
247: registers that can be used without being saved.
248: The latter must include the registers where values are returned
249: and the register where structure-value addresses are passed.
250: Aside from that, you can include as many other registers as you like. */
251:
252: /* don't know about fp */
253: #define CALL_USED_REGISTERS \
254: {1, 1, 0, 0, 0, 0, 1, 1, \
255: 0, 0, 0, 0, 0, 0 }
256:
257:
258: /* Make sure everything's fine if we *don't* have an FPU.
259: This assumes that putting a register in fixed_regs will keep the
260: compiler's mitts completely off it. We don't bother to zero it out
261: of register classes.
262: */
263: #define CONDITIONAL_REGISTER_USAGE \
264: { \
265: int i; \
266: HARD_REG_SET x; \
267: if (!TARGET_FPU) \
268: { \
269: COPY_HARD_REG_SET (x, reg_class_contents[(int)FPU_REGS]); \
270: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
271: if (TEST_HARD_REG_BIT (x, i)) \
272: fixed_regs[i] = call_used_regs[i] = 1; \
273: } \
274: \
275: if (TARGET_AC0) \
276: call_used_regs[8] = 1; \
277: }
278:
279: /* Return number of consecutive hard regs needed starting at reg REGNO
280: to hold something of mode MODE.
281: This is ordinarily the length in words of a value of mode MODE
282: but can be less for certain modes in special long registers.
283: */
284:
285: #define HARD_REGNO_NREGS(REGNO, MODE) \
286: ((REGNO < 8)? \
287: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) \
288: :1)
289:
290:
291: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
292: On the pdp, the cpu registers can hold any mode - check alignment
293:
294: FPU can only hold DF - simplifies life!
295: */
296: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
297: ((REGNO < 8)? \
298: ((GET_MODE_BITSIZE(MODE) <= 16) \
299: || (GET_MODE_BITSIZE(MODE) == 32 && !(REGNO & 1))) \
300: :(MODE) == DFmode)
301:
302:
303: /* Value is 1 if it is a good idea to tie two pseudo registers
304: when one has mode MODE1 and one has mode MODE2.
305: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
306: for any hard reg, then this must be 0 for correct output. */
307: #define MODES_TIEABLE_P(MODE1, MODE2) 0
308:
309: /* Specify the registers used for certain standard purposes.
310: The values of these macros are register numbers. */
311:
312: /* the pdp11 pc overloaded on a register that the compiler knows about. */
313: #define PC_REGNUM 7
314:
315: /* Register to use for pushing function arguments. */
316: #define STACK_POINTER_REGNUM 6
317:
318: /* Base register for access to local variables of the function. */
319: #define FRAME_POINTER_REGNUM 5
320:
321: /* Value should be nonzero if functions must have frame pointers.
322: Zero means the frame pointer need not be set up (and parms
323: may be accessed via the stack pointer) in functions that seem suitable.
324: This is computed in `reload', in reload1.c.
325: */
326:
327: #define FRAME_POINTER_REQUIRED 0
328:
329: /* Base register for access to arguments of the function. */
330: #define ARG_POINTER_REGNUM 5
331:
332: /* Register in which static-chain is passed to a function. */
333: /* ??? - i don't want to give up a reg for this! */
334: #define STATIC_CHAIN_REGNUM 4
335:
336: /* Register in which address to store a structure value
337: is passed to a function.
338: let's make it an invisible first argument!!! */
339:
340: #define STRUCT_VALUE 0
341:
342:
343: /* Define the classes of registers for register constraints in the
344: machine description. Also define ranges of constants.
345:
346: One of the classes must always be named ALL_REGS and include all hard regs.
347: If there is more than one class, another class must be named NO_REGS
348: and contain no registers.
349:
350: The name GENERAL_REGS must be the name of a class (or an alias for
351: another name such as ALL_REGS). This is the class of registers
352: that is allowed by "g" or "r" in a register constraint.
353: Also, registers outside this class are allocated only when
354: instructions express preferences for them.
355:
356: The classes must be numbered in nondecreasing order; that is,
357: a larger-numbered class must never be contained completely
358: in a smaller-numbered class.
359:
360: For any two classes, it is very desirable that there be another
361: class that represents their union. */
362:
363: /* The pdp has a couple of classes:
364:
365: MUL_REGS are used for odd numbered regs, to use in 16 bit multiplication
366: (even numbered do 32 bit multiply)
367: LMUL_REGS long multiply registers (even numbered regs )
368: (don't need them, all 32 bit regs are even numbered!)
369: GENERAL_REGS is all cpu
370: LOAD_FPU_REGS is the first four cpu regs, they are easier to load
371: NO_LOAD_FPU_REGS is ac4 and ac5, currently - difficult to load them
372: FPU_REGS is all fpu regs
373: */
374:
375: enum reg_class { NO_REGS, MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS, FPU_REGS, ALL_REGS, LIM_REG_CLASSES };
376:
377: #define N_REG_CLASSES (int) LIM_REG_CLASSES
378:
379: /* have to allow this till cmpsi/tstsi are fixed in a better way !! */
380: #define SMALL_REGISTER_CLASSES
381:
382: /* Since GENERAL_REGS is the same class as ALL_REGS,
383: don't give it a different class number; just make it an alias. */
384:
385: /* #define GENERAL_REGS ALL_REGS */
386:
387: /* Give names of register classes as strings for dump file. */
388:
389: #define REG_CLASS_NAMES {"NO_REGS", "MUL_REGS", "GENERAL_REGS", "LOAD_FPU_REGS", "NO_LOAD_FPU_REGS", "FPU_REGS", "ALL_REGS" }
390:
391: /* Define which registers fit in which classes.
392: This is an initializer for a vector of HARD_REG_SET
393: of length N_REG_CLASSES. */
394:
395: #define REG_CLASS_CONTENTS {0, 0x00aa, 0x00ff, 0x0f00, 0x3000, 0x3f00, 0x3fff}
396:
397: /* The same information, inverted:
398: Return the class number of the smallest class containing
399: reg number REGNO. This could be a conditional expression
400: or could index an array. */
401:
402: #define REGNO_REG_CLASS(REGNO) \
403: ((REGNO)>=8?((REGNO)<=11?LOAD_FPU_REGS:NO_LOAD_FPU_REGS):((REGNO&1)?MUL_REGS:GENERAL_REGS))
404:
405:
406: /* The class value for index registers, and the one for base regs. */
407: #define INDEX_REG_CLASS GENERAL_REGS
408: #define BASE_REG_CLASS GENERAL_REGS
409:
410: /* Get reg_class from a letter such as appears in the machine description. */
411:
412: #define REG_CLASS_FROM_LETTER(C) \
413: ((C) == 'f' ? FPU_REGS : \
414: ((C) == 'd' ? MUL_REGS : \
415: ((C) == 'a' ? LOAD_FPU_REGS : NO_REGS)))
416:
417:
418: /* The letters I, J, K, L and M in a register constraint string
419: can be used to stand for particular ranges of immediate operands.
420: This macro defines what the ranges are.
421: C is the letter, and VALUE is a constant value.
422: Return 1 if VALUE is in the range specified by C.
423:
424: I bits 31-16 0000
425: J bits 15-00 0000
426: K completely random 32 bit
427: L,M,N -1,1,0 respectively
428: O where doing shifts in sequence is faster than
429: one big shift
430: */
431:
432: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
433: ((C) == 'I' ? ((VALUE) & 0xffff0000) == 0 \
434: : (C) == 'J' ? ((VALUE) & 0x0000ffff) == 0 \
435: : (C) == 'K' ? (((VALUE) & 0xffff0000) != 0 \
436: && ((VALUE) & 0x0000ffff) != 0) \
437: : (C) == 'L' ? ((VALUE) == 1) \
438: : (C) == 'M' ? ((VALUE) == -1) \
439: : (C) == 'N' ? ((VALUE) == 0) \
440: : (C) == 'O' ? (abs(VALUE) >1 && abs(VALUE) <= 4) \
441: : 0)
442:
443: /* Similar, but for floating constants, and defining letters G and H.
444: Here VALUE is the CONST_DOUBLE rtx itself. */
445:
446: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
447: ((C) == 'G' && XINT (VALUE, 0) == 0 && XINT (VALUE, 1) == 0)
448:
449:
450: /* Letters in the range `Q' through `U' may be defined in a
451: machine-dependent fashion to stand for arbitrary operand types.
452: The machine description macro `EXTRA_CONSTRAINT' is passed the
453: operand as its first argument and the constraint letter as its
454: second operand.
455:
456: `Q' is for memory refereces using take more than 1 instruction.
457: `R' is for memory refereces which take 1 word for the instruction. */
458:
459: #define EXTRA_CONSTRAINT(OP,CODE) \
460: ((GET_CODE (OP) != MEM) ? 0 \
461: : !legitimate_address_p (GET_MODE (OP), XEXP (OP, 0)) ? 0 \
462: : ((CODE) == 'Q') ? !simple_memory_operand (OP, GET_MODE (OP)) \
463: : ((CODE) == 'R') ? simple_memory_operand (OP, GET_MODE (OP)) \
464: : 0)
465:
466: /* Given an rtx X being reloaded into a reg required to be
467: in class CLASS, return the class of reg to actually use.
468: In general this is just CLASS; but on some machines
469: in some cases it is preferable to use a more restrictive class.
470:
471: loading is easier into LOAD_FPU_REGS than FPU_REGS! */
472:
473: #define PREFERRED_RELOAD_CLASS(X,CLASS) \
474: (((CLASS) != FPU_REGS)?(CLASS):LOAD_FPU_REGS)
475:
476: #define SECONDARY_RELOAD_CLASS(CLASS,MODE,x) \
477: (((CLASS) == NO_LOAD_FPU_REGS && !(REG_P(x) && LOAD_FPU_REG_P(REGNO(x))))?LOAD_FPU_REGS:NO_REGS)
478:
479: /* Return the maximum number of consecutive registers
480: needed to represent mode MODE in a register of class CLASS. */
481: #define CLASS_MAX_NREGS(CLASS, MODE) \
482: ((CLASS == GENERAL_REGS || CLASS == MUL_REGS)? \
483: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD): \
484: 1 \
485: )
486:
487:
488: /* Stack layout; function entry, exit and calling. */
489:
490: /* Define this if pushing a word on the stack
491: makes the stack pointer a smaller address. */
492: #define STACK_GROWS_DOWNWARD
493:
494: /* Define this if the nominal address of the stack frame
495: is at the high-address end of the local variables;
496: that is, each additional local variable allocated
497: goes at a more negative offset in the frame.
498: */
499: #define FRAME_GROWS_DOWNWARD
500:
501: /* Offset within stack frame to start allocating local variables at.
502: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
503: first local allocated. Otherwise, it is the offset to the BEGINNING
504: of the first local allocated. */
505: #define STARTING_FRAME_OFFSET 0
506:
507: /* If we generate an insn to push BYTES bytes,
508: this says how many the stack pointer really advances by.
509: On the pdp11, the stack is on an even boundary */
510: #define PUSH_ROUNDING(BYTES) ((BYTES + 1) & ~1)
511:
512: /* current_first_parm_offset stores the # of registers pushed on the
513: stack */
514: extern int current_first_parm_offset;
515:
516: /* Offset of first parameter from the argument pointer register value.
517: For the pdp11, this is non-zero to account for the return address.
518: 1 - return address
519: 2 - frame pointer (always saved, even when not used!!!!)
520: -- chnage some day !!!:q!
521:
522: */
523: #define FIRST_PARM_OFFSET(FNDECL) 4
524:
525: /* Value is 1 if returning from a function call automatically
526: pops the arguments described by the number-of-args field in the call.
527: FUNTYPE is the data type of the function (as a tree),
528: or for a library call it is an identifier node for the subroutine name. */
529:
530: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
531:
532: /* Define how to find the value returned by a function.
533: VALTYPE is the data type of the value (as a tree).
534: If the precise function being called is known, FUNC is its FUNCTION_DECL;
535: otherwise, FUNC is 0. */
536: #define BASE_RETURN_VALUE_REG(MODE) \
537: ((MODE) == DFmode ? 8 : 0)
538:
539: /* On the pdp11 the value is found in R0 (or ac0???
540: not without FPU!!!! ) */
541:
542: #define FUNCTION_VALUE(VALTYPE, FUNC) \
543: gen_rtx (REG, TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG(TYPE_MODE(VALTYPE)))
544:
545: /* and the called function leaves it in the first register.
546: Difference only on machines with register windows. */
547:
548: #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \
549: gen_rtx (REG, TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG(TYPE_MODE(VALTYPE)))
550:
551: /* Define how to find the value returned by a library function
552: assuming the value has mode MODE. */
553:
554: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, BASE_RETURN_VALUE_REG(MODE))
555:
556: /* 1 if N is a possible register number for a function value
557: as seen by the caller.
558: On the pdp, the first "output" reg is the only register thus used.
559:
560: maybe ac0 ? - as option someday! */
561:
562: #define FUNCTION_VALUE_REGNO_P(N) (((N) == 0) || (TARGET_AC0 && (N) == 8))
563:
564: /* should probably return DImode and DFmode in memory,lest
565: we fill up all regs!
566:
567: have to, else we crash - exceptio: maybe return result in
568: ac0 if DFmode and FPU present - compatibility problem with
569: libraries for non-floating point ...
570: */
571:
572: #define RETURN_IN_MEMORY(TYPE) \
573: (TYPE_MODE(TYPE) == DImode || (TYPE_MODE(TYPE) == DFmode && ! TARGET_AC0))
574:
575:
576: /* 1 if N is a possible register number for function argument passing.
577: - not used on pdp */
578:
579: #define FUNCTION_ARG_REGNO_P(N) 0
580:
581: /* Define a data type for recording info about an argument list
582: during the scan of that argument list. This data type should
583: hold all necessary information about the function itself
584: and about the args processed so far, enough to enable macros
585: such as FUNCTION_ARG to determine where the next arg should go.
586:
587: */
588:
589: #define CUMULATIVE_ARGS int
590:
591: /* Initialize a variable CUM of type CUMULATIVE_ARGS
592: for a call to a function whose data type is FNTYPE.
593: For a library call, FNTYPE is 0.
594:
595: ...., the offset normally starts at 0, but starts at 1 word
596: when the function gets a structure-value-address as an
597: invisible first argument. */
598:
599: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
600: ((CUM) = 0)
601:
602: /* Update the data in CUM to advance over an argument
603: of mode MODE and data type TYPE.
604: (TYPE is null for libcalls where that information may not be available.)
605:
606: */
607:
608:
609: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
610: ((CUM) += ((MODE) != BLKmode \
611: ? (GET_MODE_SIZE (MODE)) \
612: : (int_size_in_bytes (TYPE))))
613:
614: /* Determine where to put an argument to a function.
615: Value is zero to push the argument on the stack,
616: or a hard register in which to store the argument.
617:
618: MODE is the argument's machine mode.
619: TYPE is the data type of the argument (as a tree).
620: This is null for libcalls where that information may
621: not be available.
622: CUM is a variable of type CUMULATIVE_ARGS which gives info about
623: the preceding args and about the function being called.
624: NAMED is nonzero if this argument is a named parameter
625: (otherwise it is an extra parameter matching an ellipsis). */
626:
627: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
628:
629: /* Define where a function finds its arguments.
630: This would be different from FUNCTION_ARG if we had register windows. */
631: /*
632: #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
633: FUNCTION_ARG (CUM, MODE, TYPE, NAMED)
634: */
635:
636: /* For an arg passed partly in registers and partly in memory,
637: this is the number of registers used.
638: For args passed entirely in registers or entirely in memory, zero. */
639:
640: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
641:
642: /* This macro generates the assembly code for function entry. */
643: #define FUNCTION_PROLOGUE(FILE, SIZE) \
644: output_function_prologue(FILE, SIZE);
645:
646: /* Output assembler code to FILE to increment profiler label # LABELNO
647: for profiling a function entry. */
648:
649: #define FUNCTION_PROFILER(FILE, LABELNO) \
650: abort ();
651:
652: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
653: the stack pointer does not matter. The value is tested only in
654: functions that have frame pointers.
655: No definition is equivalent to always zero. */
656:
657: extern int may_call_alloca;
658: extern int current_function_pretend_args_size;
659:
660: #define EXIT_IGNORE_STACK 1
661:
662: /* This macro generates the assembly code for function exit,
663: on machines that need it. If FUNCTION_EPILOGUE is not defined
664: then individual return instructions are generated for each
665: return statement. Args are same as for FUNCTION_PROLOGUE.
666: */
667:
668: #define FUNCTION_EPILOGUE(FILE, SIZE) \
669: output_function_epilogue(FILE, SIZE);
670:
671: #define INITIAL_FRAME_POINTER_OFFSET(DEPTH_VAR) \
672: { \
673: int offset, regno; \
674: offset = get_frame_size(); \
675: for (regno = 0; regno < 8; regno++) \
676: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
677: offset += 2; \
678: for (regno = 8; regno < 14; regno++) \
679: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
680: offset += 8; \
681: /* offset -= 2; no fp on stack frame */ \
682: (DEPTH_VAR) = offset; \
683: }
684:
685:
686: /* Addressing modes, and classification of registers for them. */
687:
688: #define HAVE_POST_INCREMENT
689: /* #define HAVE_POST_DECREMENT */
690:
691: #define HAVE_PRE_DECREMENT
692: /* #define HAVE_PRE_INCREMENT */
693:
694: /* Macros to check register numbers against specific register classes. */
695:
696: /* These assume that REGNO is a hard or pseudo reg number.
697: They give nonzero only if REGNO is a hard reg of the suitable class
698: or a pseudo reg currently allocated to a suitable hard reg.
699: Since they use reg_renumber, they are safe only once reg_renumber
700: has been allocated, which happens in local-alloc.c. */
701:
702: #define REGNO_OK_FOR_INDEX_P(REGNO) \
703: ((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8)
704: #define REGNO_OK_FOR_BASE_P(REGNO) \
705: ((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8)
706:
707: /* Now macros that check whether X is a register and also,
708: strictly, whether it is in a specified class.
709: */
710:
711:
712:
713: /* Maximum number of registers that can appear in a valid memory address. */
714:
715: #define MAX_REGS_PER_ADDRESS 2
716:
717: /* Recognize any constant value that is a valid address. */
718:
719: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
720:
721: /* Nonzero if the constant value X is a legitimate general operand.
722: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
723:
724: #define LEGITIMATE_CONSTANT_P(X) (1)
725:
726: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
727: and check its validity for a certain class.
728: We have two alternate definitions for each of them.
729: The usual definition accepts all pseudo regs; the other rejects
730: them unless they have been allocated suitable hard regs.
731: The symbol REG_OK_STRICT causes the latter definition to be used.
732:
733: Most source files want to accept pseudo regs in the hope that
734: they will get allocated to the class that the insn wants them to be in.
735: Source files for reload pass need to be strict.
736: After reload, it makes no difference, since pseudo regs have
737: been eliminated by then. */
738:
739: #ifndef REG_OK_STRICT
740:
741: /* Nonzero if X is a hard reg that can be used as an index
742: or if it is a pseudo reg. */
743: #define REG_OK_FOR_INDEX_P(X) (1)
744: /* Nonzero if X is a hard reg that can be used as a base reg
745: or if it is a pseudo reg. */
746: #define REG_OK_FOR_BASE_P(X) (1)
747:
748: #else
749:
750: /* Nonzero if X is a hard reg that can be used as an index. */
751: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
752: /* Nonzero if X is a hard reg that can be used as a base reg. */
753: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
754:
755: #endif
756:
757: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
758: that is a valid memory address for an instruction.
759: The MODE argument is the machine mode for the MEM expression
760: that wants to use this address.
761:
762: */
763:
764: #define GO_IF_LEGITIMATE_ADDRESS(mode, operand, ADDR) \
765: { \
766: rtx xfoob; \
767: \
768: /* accept (R0) */ \
769: if (GET_CODE (operand) == REG \
770: && REG_OK_FOR_BASE_P(operand)) \
771: goto ADDR; \
772: \
773: /* accept @#address */ \
774: if (CONSTANT_ADDRESS_P (operand)) \
775: goto ADDR; \
776: \
777: /* accept X(R0) */ \
778: if (GET_CODE (operand) == PLUS \
779: && GET_CODE (XEXP (operand, 0)) == REG \
780: && REG_OK_FOR_BASE_P (XEXP (operand, 0)) \
781: && CONSTANT_ADDRESS_P (XEXP (operand, 1))) \
782: goto ADDR; \
783: \
784: /* accept -(R0) */ \
785: if (GET_CODE (operand) == PRE_DEC \
786: && GET_CODE (XEXP (operand, 0)) == REG \
787: && REG_OK_FOR_BASE_P (XEXP (operand, 0))) \
788: goto ADDR; \
789: \
790: /* accept (R0)+ */ \
791: if (GET_CODE (operand) == POST_INC \
792: && GET_CODE (XEXP (operand, 0)) == REG \
793: && REG_OK_FOR_BASE_P (XEXP (operand, 0))) \
794: goto ADDR; \
795: \
796: /* handle another level of indirection ! */ \
797: if (GET_CODE(operand) != MEM) \
798: goto fail; \
799: \
800: xfoob = XEXP (operand, 0); \
801: \
802: /* (MEM:xx (MEM:xx ())) is not valid for SI, DI and currently */ \
803: /* also forbidden for float, because we have to handle this */ \
804: /* in output_move_double and/or output_move_quad() - we could */ \
805: /* do it, but currently it's not worth it!!! */ \
806: /* now that DFmode cannot go into CPU register file, */ \
807: /* maybe I should allow float ... */ \
808: /* but then I have to handle memory-to-memory moves in movdf ?? */ \
809: \
810: if (GET_MODE_BITSIZE(mode) > 16) \
811: goto fail; \
812: \
813: /* accept @(R0) - which is @0(R0) */ \
814: if (GET_CODE (xfoob) == REG \
815: && REG_OK_FOR_BASE_P(xfoob)) \
816: goto ADDR; \
817: \
818: /* accept @address */ \
819: if (CONSTANT_ADDRESS_P (xfoob)) \
820: goto ADDR; \
821: \
822: /* accept @X(R0) */ \
823: if (GET_CODE (xfoob) == PLUS \
824: && GET_CODE (XEXP (xfoob, 0)) == REG \
825: && REG_OK_FOR_BASE_P (XEXP (xfoob, 0)) \
826: && CONSTANT_ADDRESS_P (XEXP (xfoob, 1))) \
827: goto ADDR; \
828: \
829: /* accept @-(R0) */ \
830: if (GET_CODE (xfoob) == PRE_DEC \
831: && GET_CODE (XEXP (xfoob, 0)) == REG \
832: && REG_OK_FOR_BASE_P (XEXP (xfoob, 0))) \
833: goto ADDR; \
834: \
835: /* accept @(R0)+ */ \
836: if (GET_CODE (xfoob) == POST_INC \
837: && GET_CODE (XEXP (xfoob, 0)) == REG \
838: && REG_OK_FOR_BASE_P (XEXP (xfoob, 0))) \
839: goto ADDR; \
840: \
841: /* anything else is illegal */ \
842: fail: ; \
843: }
844:
845:
846: /* Try machine-dependent ways of modifying an illegitimate address
847: to be legitimate. If we find one, return the new, valid address.
848: This macro is used in only one place: `memory_address' in explow.c.
849:
850: OLDX is the address as it was before break_out_memory_refs was called.
851: In some cases it is useful to look at this to decide what needs to be done.
852:
853: MODE and WIN are passed so that this macro can use
854: GO_IF_LEGITIMATE_ADDRESS.
855:
856: It is always safe for this macro to do nothing. It exists to recognize
857: opportunities to optimize the output. */
858:
859: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}
860:
861:
862: /* Go to LABEL if ADDR (a legitimate address expression)
863: has an effect that depends on the machine mode it is used for.
864: On the the pdp this is for predec/postinc */
865:
866: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
867: { if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) \
868: goto LABEL; \
869: }
870:
871:
872: /* Specify the machine mode that this machine uses
873: for the index in the tablejump instruction. */
874: #define CASE_VECTOR_MODE HImode
875:
876: /* Define this if a raw index is all that is needed for a
877: `tablejump' insn. */
878: #define CASE_TAKES_INDEX_RAW
879:
880: /* Define this if the tablejump instruction expects the table
881: to contain offsets from the address of the table.
882: Do not define this if the table should contain absolute addresses. */
883: /* #define CASE_VECTOR_PC_RELATIVE */
884:
885: /* Specify the tree operation to be used to convert reals to integers. */
886: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
887:
888: /* This is the kind of divide that is easiest to do in the general case. */
889: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
890:
891: /* Define this as 1 if `char' should by default be signed; else as 0. */
892: #define DEFAULT_SIGNED_CHAR 1
893:
894: /* Max number of bytes we can move from memory to memory
895: in one reasonably fast instruction.
896: */
897:
898: #define MOVE_MAX 2
899:
900: /* Zero extension is faster if the target is known to be zero */
901: /* #define SLOW_ZERO_EXTEND */
902:
903: /* Nonzero if access to memory by byte is slow and undesirable. -
904: */
905: #define SLOW_BYTE_ACCESS 0
906:
907: /* Do not break .stabs pseudos into continuations. */
908: #define DBX_CONTIN_LENGTH 0
909:
910: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
911: is done just by pretending it is already truncated. */
912: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
913:
914:
915: /* Add any extra modes needed to represent the condition code.
916:
917: CCFPmode is used for FPU, but should we use a separate reg? */
918: #define EXTRA_CC_MODES CCFPmode
919:
920: /* the name for the mode above */
921: #define EXTRA_CC_NAMES "CCFPmode"
922:
923: /* Give a comparison code (EQ, NE etc) and the first operand of a COMPARE,
924: return the mode to be used for the comparison. For floating-point, CCFPmode
925: should be used. */
926:
927: #define SELECT_CC_MODE(OP,X,Y) \
928: (GET_MODE_CLASS(GET_MODE(X)) == MODE_FLOAT? CCFPmode : CCmode)
929:
930: /* We assume that the store-condition-codes instructions store 0 for false
931: and some other value for true. This is the value stored for true. */
932:
933: /* #define STORE_FLAG_VALUE 1 */
934:
935: /* Specify the machine mode that pointers have.
936: After generation of rtl, the compiler makes no further distinction
937: between pointers and any other objects of this machine mode. */
938: #define Pmode HImode
939:
940: /* A function address in a call instruction
941: is a word address (for indexing purposes)
942: so give the MEM rtx a word's mode. */
943: #define FUNCTION_MODE HImode
944:
945: /* Define this if addresses of constant functions
946: shouldn't be put through pseudo regs where they can be cse'd.
947: Desirable on machines where ordinary constants are expensive
948: but a CALL with constant address is cheap. */
949: /* #define NO_FUNCTION_CSE */
950:
951: /* Compute the cost of computing a constant rtl expression RTX
952: whose rtx-code is CODE. The body of this macro is a portion
953: of a switch statement. If the code is computed here,
954: return it with a return statement. Otherwise, break from the switch.
955:
956: -1, 0, 1 are cheaper for add, sub ...
957: */
958:
959: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
960: case CONST_INT: \
961: if (INTVAL(RTX) == 0 \
962: || INTVAL(RTX) == -1 \
963: || INTVAL(RTX) == 1) \
964: return 0; \
965: case CONST: \
966: case LABEL_REF: \
967: case SYMBOL_REF: \
968: /* twice as expensive as REG */ \
969: return 2; \
970: case CONST_DOUBLE: \
971: /* twice (or 4 times) as expensive as 16 bit */ \
972: return 4;
973:
974: /* cost of moving one register class to another */
975: #define REGISTER_MOVE_COST(CLASS1, CLASS2) register_move_cost(CLASS1, CLASS2)
976:
977: /* Tell emit-rtl.c how to initialize special values on a per-function base. */
978: extern int optimize;
979: extern struct rtx_def *cc0_reg_rtx;
980:
981: #define CC_STATUS_MDEP rtx
982:
983: #define CC_STATUS_MDEP_INIT (cc_status.mdep = 0)
984:
985: /* Tell final.c how to eliminate redundant test instructions. */
986:
987: /* Here we define machine-dependent flags and fields in cc_status
988: (see `conditions.h'). */
989:
990: #define CC_IN_FPU 04000
991:
992: /* Do UPDATE_CC if EXP is a set, used in
993: NOTICE_UPDATE_CC
994:
995: floats only do compare correctly, else nullify ...
996:
997: get cc0 out soon ...
998: */
999:
1000: /* Store in cc_status the expressions
1001: that the condition codes will describe
1002: after execution of an instruction whose pattern is EXP.
1003: Do not alter them if the instruction would not alter the cc's. */
1004:
1005: #define NOTICE_UPDATE_CC(EXP, INSN) \
1006: { if (GET_CODE (EXP) == SET) \
1007: { \
1008: notice_update_cc_on_set(EXP, INSN); \
1009: } \
1010: else if (GET_CODE (EXP) == PARALLEL \
1011: && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \
1012: { \
1013: notice_update_cc_on_set(XVECEXP (EXP, 0, 0), INSN); \
1014: } \
1015: else if (GET_CODE (EXP) == CALL) \
1016: { /* all bets are off */ CC_STATUS_INIT; } \
1017: if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \
1018: && cc_status.value2 \
1019: && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \
1020: printf ("here!\n", cc_status.value2 = 0); \
1021: }
1022:
1023: /* Control the assembler format that we output. */
1024:
1025: /* Output at beginning of assembler file. */
1026:
1027: #if 0
1028: #define ASM_FILE_START(FILE) \
1029: ( \
1030: fprintf (FILE, "\t.data\n"), \
1031: fprintf (FILE, "$help$: . = .+8 ; space for tmp moves!\n") \
1032: /* do we need reg def's R0 = %0 etc ??? */ \
1033: )
1034: #else
1035: #define ASM_FILE_START(FILE) (0)
1036: #endif
1037:
1038:
1039: /* Output to assembler file text saying following lines
1040: may contain character constants, extra white space, comments, etc. */
1041:
1042: #define ASM_APP_ON ""
1043:
1044: /* Output to assembler file text saying following lines
1045: no longer contain unusual constructs. */
1046:
1047: #define ASM_APP_OFF ""
1048:
1049: /* Output before read-only data. */
1050:
1051: #define TEXT_SECTION_ASM_OP "\t.text\n"
1052:
1053: /* Output before writable data. */
1054:
1055: #define DATA_SECTION_ASM_OP "\t.data\n"
1056:
1057: /* How to refer to registers in assembler output.
1058: This sequence is indexed by compiler's hard-register-number (see above). */
1059:
1060: #define REGISTER_NAMES \
1061: {"r0", "r1", "r2", "r3", "r4", "fp", "sp", "pc", \
1062: "ac0", "ac1", "ac2", "ac3", "ac4", "ac5" }
1063:
1064: /* How to renumber registers for dbx and gdb. */
1065:
1066: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1067:
1068: /* This is how to output the definition of a user-level label named NAME,
1069: such as the label on a static function or variable NAME. */
1070:
1071: #define ASM_OUTPUT_LABEL(FILE,NAME) \
1072: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1073:
1074: /* This is how to output a command to make the user-level label named NAME
1075: defined for reference from other files. */
1076:
1077: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1078: do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs("\n", FILE); } while (0)
1079:
1080: /* This is how to output a reference to a user-level label named NAME.
1081: `assemble_name' uses this. */
1082:
1083: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1084: fprintf (FILE, "_%s", NAME)
1085:
1086: /* This is how to output an internal numbered label where
1087: PREFIX is the class of label and NUM is the number within the class. */
1088:
1089: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1090: fprintf (FILE, "%s_%d:\n", PREFIX, NUM)
1091:
1092: /* This is how to store into the string LABEL
1093: the symbol_ref name of an internal numbered label where
1094: PREFIX is the class of label and NUM is the number within the class.
1095: This is suitable for output with `assemble_name'. */
1096:
1097: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1098: sprintf (LABEL, "*%s_%d", PREFIX, NUM)
1099:
1100: /* This is how to output an assembler line defining a `double' constant. */
1101:
1102: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1103: fprintf (FILE, "\tdouble %.20e\n", (VALUE))
1104:
1105: /* This is how to output an assembler line defining a `float' constant. */
1106:
1107: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1108: fprintf (FILE, "\tfloat %.12e\n", (VALUE))
1109:
1110: /* This is how to output an assembler line defining an `int' constant. */
1111:
1112: #define ASM_OUTPUT_INT(FILE,VALUE) \
1113: ( fprintf (FILE, "\t.word "), \
1114: output_addr_const (FILE, (VALUE)), \
1115: fprintf (FILE, "\n"))
1116:
1117: /* Likewise for `short' and `char' constants. */
1118:
1119: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1120: ( fprintf (FILE, "\t.word "), \
1121: output_addr_const (FILE, (VALUE)), \
1122: fprintf (FILE, " /*short*/\n"))
1123:
1124: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1125: ( fprintf (FILE, "\t.byte "), \
1126: output_addr_const (FILE, (VALUE)), \
1127: fprintf (FILE, " /* char */\n"))
1128:
1129: /* This is how to output an assembler line for a numeric constant byte.-
1130:
1131: do we really NEED it ? let's output it with a comment and grep the
1132: assembly source ;-)
1133: */
1134:
1135: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1136: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1137:
1138: #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1139: output_ascii (FILE, P, SIZE)
1140:
1141: #define ASM_OUTPUT_ADDR_VEC_PROLOGUE(FILE, MODE, LEN) \
1142: fprintf (FILE, "\t/* HELP! */\n");
1143:
1144: /* This is how to output an element of a case-vector that is absolute. */
1145:
1146: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1147: fprintf (FILE, "\t.word L_%d\n", VALUE)
1148:
1149: /* This is how to output an element of a case-vector that is relative.
1150: (the pdp does not use such vectors,
1151: but we must define this macro anyway.) */
1152:
1153: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1154: fprintf (FILE, "\tERROR @L%d-@L%d ! error should not be used\n", VALUE, REL)
1155:
1156: /* This is how to output an assembler line
1157: that says to advance the location counter
1158: to a multiple of 2**LOG bytes.
1159:
1160: who needs this????
1161: */
1162:
1163: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1164: if ((LOG) != 0) \
1165: fprintf (FILE, "\t.align %d\n", 1<<(LOG))
1166:
1167: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1168: fprintf (FILE, "\t.=.+ %d\n", (SIZE))
1169:
1170: /* This says how to output an assembler line
1171: to define a global common symbol. */
1172:
1173: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1174: ( fprintf ((FILE), ".globl "), \
1175: assemble_name ((FILE), (NAME)), \
1176: fprintf ((FILE), "\n"), \
1177: assemble_name ((FILE), (NAME)), \
1178: fprintf ((FILE), ": .=.+ %d\n", (ROUNDED)) \
1179: )
1180:
1181: /* This says how to output an assembler line
1182: to define a local common symbol. */
1183:
1184: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1185: ( assemble_name ((FILE), (NAME)), \
1186: fprintf ((FILE), ":\t.=.+ %d\n", (ROUNDED)))
1187:
1188: /* Store in OUTPUT a string (made with alloca) containing
1189: an assembler-name for a local static variable named NAME.
1190: LABELNO is an integer which is different for each call. */
1191:
1192: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1193: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1194: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1195:
1196: /* Define the parentheses used to group arithmetic operations
1197: in assembler code. */
1198:
1199: #define ASM_OPEN_PAREN "("
1200: #define ASM_CLOSE_PAREN ")"
1201:
1202: /* Define results of standard character escape sequences. */
1203: #define TARGET_BELL 007
1204: #define TARGET_BS 010
1205: #define TARGET_TAB 011
1206: #define TARGET_NEWLINE 012
1207: #define TARGET_VT 013
1208: #define TARGET_FF 014
1209: #define TARGET_CR 015
1210:
1211: /* Print operand X (an rtx) in assembler syntax to file FILE.
1212: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1213: For `%' followed by punctuation, CODE is the punctuation and X is null.
1214:
1215: */
1216:
1217:
1218: #define PRINT_OPERAND(FILE, X, CODE) \
1219: { if (CODE == '#') fprintf (FILE, "#"); \
1220: else if (GET_CODE (X) == REG) \
1221: fprintf (FILE, "%s", reg_names[REGNO (X)]); \
1222: else if (GET_CODE (X) == MEM) \
1223: output_address (XEXP (X, 0)); \
1224: else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != SImode) \
1225: { union { double d; int i[2]; } u; \
1226: u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X); \
1227: fprintf (FILE, "#%.20e", u.d); } \
1228: else { putc ('$', FILE); output_addr_const (FILE, X); }}
1229:
1230: /* Print a memory address as an operand to reference that memory location. */
1231:
1232: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1233: print_operand_address (FILE, ADDR)
1234:
1235: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1236: ( \
1237: fprintf (FILE, "\tmov %s, -(sp)\n", reg_names[REGNO]) \
1238: )
1239:
1240: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1241: ( \
1242: fprintf (FILE, "\tmov (sp)+, %s\n", reg_names[REGNO]) \
1243: )
1244:
1245:
1246: #define ASM_IDENTIFY_GCC(FILE) \
1247: fprintf(FILE, "gcc_compiled:\n")
1248:
1249: #define ASM_OUTPUT_DOUBLE_INT(a,b) fprintf(a,"%d", b)
1250:
1251: /* trampoline - how should i do it in separate i+d ?
1252: have some allocate_trampoline magic???
1253:
1254: the following should work for shared I/D: */
1255:
1256: /* lets see whether this works as trampoline:
1257: MV #STATIC, $4 0x940Y 0x0000 <- STATIC; Y = STATIC_CHAIN_REGNUM
1258: JMP FUNCTION 0x0058 0x0000 <- FUNCTION
1259: */
1260:
1261: #define TRAMPOLINE_TEMPLATE(FILE) \
1262: { \
1263: if (TARGET_SPLIT) \
1264: abort(); \
1265: \
1266: ASM_OUTPUT_INT (FILE, gen_rtx(CONST_INT, VOIDmode, 0x9400+STATIC_CHAIN_REGNUM)); \
1267: ASM_OUTPUT_INT (FILE, const0_rtx); \
1268: ASM_OUTPUT_INT (FILE, gen_rtx(CONST_INT, VOIDmode, 0x0058)); \
1269: ASM_OUTPUT_INT (FILE, const0_rtx); \
1270: }
1271:
1272: #define TRAMPOLINE_SIZE 8
1273: #define TRAMPOLINE_ALIGN 16
1274:
1275: /* Emit RTL insns to initialize the variable parts of a trampoline.
1276: FNADDR is an RTX for the address of the function's pure code.
1277: CXT is an RTX for the static chain value for the function. */
1278:
1279: #define INITIALIZE_TRAMPOLINE(TRAMP,FNADDR,CXT) \
1280: { \
1281: if (TARGET_SPLIT) \
1282: abort(); \
1283: \
1284: emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 2)), CXT); \
1285: emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 6)), FNADDR); \
1286: }
1287:
1288:
1289: /* Some machines may desire to change what optimizations are
1290: performed for various optimization levels. This macro, if
1291: defined, is executed once just after the optimization level is
1292: determined and before the remainder of the command options have
1293: been parsed. Values set in this macro are used as the default
1294: values for the other command line options.
1295:
1296: LEVEL is the optimization level specified; 2 if -O2 is
1297: specified, 1 if -O is specified, and 0 if neither is specified. */
1298:
1299: #define OPTIMIZATION_OPTIONS(LEVEL) \
1300: { \
1301: if (LEVEL >= 3) \
1302: { \
1303: flag_inline_functions = 1; \
1304: flag_omit_frame_pointer = 1; \
1305: /* flag_unroll_loops = 1; */ \
1306: } \
1307: }
1308:
1309:
1310: /* Provide the costs of a rtl expression. This is in the body of a
1311: switch on CODE.
1312:
1313: we don't say how expensive SImode is - pretty expensive!!!
1314:
1315: there is something wrong in MULT because MULT is not
1316: as cheap as total = 2 even if we can shift!
1317:
1318: if TARGET_SPACE make mult etc cheap, but not 1, so when
1319: in doubt the faster insn is chosen.
1320: */
1321:
1322: #define RTX_COSTS(X,CODE,OUTER_CODE) \
1323: case MULT: \
1324: if (TARGET_SPACE) \
1325: total = COSTS_N_INSNS(2); \
1326: else \
1327: total = COSTS_N_INSNS (11); \
1328: break; \
1329: case DIV: \
1330: if (TARGET_SPACE) \
1331: total = COSTS_N_INSNS(2); \
1332: else \
1333: total = COSTS_N_INSNS (25); \
1334: break; \
1335: case MOD: \
1336: if (TARGET_SPACE) \
1337: total = COSTS_N_INSNS(2); \
1338: else \
1339: total = COSTS_N_INSNS (26); \
1340: break; \
1341: case ABS: \
1342: /* equivalent to length, so same for TARGET_SPACE */ \
1343: total = COSTS_N_INSNS (3); \
1344: break; \
1345: case ZERO_EXTEND: \
1346: /* only used for: qi->hi */ \
1347: total = COSTS_N_INSNS(1); \
1348: break; \
1349: case SIGN_EXTEND: \
1350: if (GET_MODE(X) == HImode) \
1351: total = COSTS_N_INSNS(1); \
1352: else if (GET_MODE(X) == SImode) \
1353: total = COSTS_N_INSNS(6); \
1354: else \
1355: abort(); \
1356: break; \
1357: /* case LSHIFT: */ \
1358: case ASHIFT: \
1359: case LSHIFTRT: \
1360: case ASHIFTRT: \
1361: if (TARGET_SPACE) \
1362: total = COSTS_N_INSNS(1); \
1363: else if (GET_MODE(X) == QImode) \
1364: { \
1365: if (GET_CODE(XEXP (X,1)) != CONST_INT) \
1366: abort(); \
1367: total = COSTS_N_INSNS(INTVAL(XEXP (X,1))); \
1368: } \
1369: else if (GET_MODE(X) == HImode) \
1370: { \
1371: if (GET_CODE(XEXP (X,1)) == CONST_INT) \
1372: { \
1373: if (abs (INTVAL (XEXP (X, 1))) == 1) \
1374: total = COSTS_N_INSNS(1); \
1375: else \
1376: total = COSTS_N_INSNS(2.5 + 0.5 *INTVAL(XEXP(X,1))); \
1377: } \
1378: else /* worst case */ \
1379: total = COSTS_N_INSNS (10); \
1380: } \
1381: else if (GET_MODE(X) == SImode) \
1382: { \
1383: if (GET_CODE(XEXP (X,1)) == CONST_INT) \
1384: total = COSTS_N_INSNS(2.5 + 0.5 *INTVAL(XEXP(X,1))); \
1385: else /* worst case */ \
1386: total = COSTS_N_INSNS(18); \
1387: } \
1388: break;
1389:
1390:
1391: /* there is no point in avoiding branches on a pdp,
1392: since branches are really cheap - I just want to find out
1393: how much difference the BRANCH_COST macro makes in code */
1394: #define BRANCH_COST (TARGET_BRANCH_CHEAP ? 0 : 1)
1395:
1396:
1397: #define COMPARE_FLAG_MODE HImode
1398:
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