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1.1 root 1: /* Definitions of target machine for GNU compiler, for the pdp-11 1.1.1.2 ! root 2: Copyright (C) 1994, 1995 Free Software Foundation, Inc. 1.1 root 3: Contributed by Michael K. Gschwind ([email protected]). 4: 5: This file is part of GNU CC. 6: 7: GNU CC is free software; you can redistribute it and/or modify 8: it under the terms of the GNU General Public License as published by 9: the Free Software Foundation; either version 1, or (at your option) 10: any later version. 11: 12: GNU CC is distributed in the hope that it will be useful, 13: but WITHOUT ANY WARRANTY; without even the implied warranty of 14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15: GNU General Public License for more details. 16: 17: You should have received a copy of the GNU General Public License 18: along with GNU CC; see the file COPYING. If not, write to 1.1.1.2 ! root 19: the Free Software Foundation, 59 Temple Place - Suite 330, ! 20: Boston, MA 02111-1307, USA. */ 1.1 root 21: 22: 23: /* declarations */ 24: char *output_jump(); 25: char *output_move_double(); 26: char *output_move_quad(); 27: char *output_block_move(); 28: 1.1.1.2 ! root 29: /* check whether load_fpu_reg or not */ 1.1 root 30: #define LOAD_FPU_REG_P(x) ((x)>=8 && (x)<=11) 31: #define NO_LOAD_FPU_REG_P(x) ((x)==12 || (x)==13) 32: #define FPU_REG_P(x) (LOAD_FPU_REG_P(x) || NO_LOAD_FPU_REG_P(x)) 33: #define CPU_REG_P(x) ((x)<8) 34: 35: /* Names to predefine in the preprocessor for this target machine. */ 36: 37: #define CPP_PREDEFINES "-Dpdp11" 38: 39: /* Print subsidiary information on the compiler version in use. */ 40: #define TARGET_VERSION fprintf (stderr, " (pdp11)"); 41: 42: 43: /* Generate DBX debugging information. */ 44: 45: /* #define DBX_DEBUGGING_INFO */ 46: 47: /* Run-time compilation parameters selecting different hardware subsets. 48: */ 49: 50: extern int target_flags; 51: 52: /* Macro to define tables used to set the flags. 53: This is a list in braces of pairs in braces, 54: each pair being { "NAME", VALUE } 55: where VALUE is the bits to set or minus the bits to clear. 56: An empty string NAME is used to identify the default VALUE. */ 57: 58: #define TARGET_SWITCHES \ 59: { { "fpu", 1}, \ 60: { "soft-float", -1}, \ 61: /* return float result in ac0 */\ 62: { "ac0", 2}, \ 63: { "no-ac0", -2}, \ 64: /* is 11/40 */ \ 65: { "40", 4}, \ 66: { "no-40", -4}, \ 67: /* is 11/45 */ \ 68: { "45", 8}, \ 69: { "no-45", -8}, \ 70: /* is 11/10 */ \ 71: { "10", -12}, \ 72: /* use movstrhi for bcopy */ \ 73: { "bcopy", 16}, \ 74: { "bcopy-builtin", -16}, \ 75: /* use 32 bit for int */ \ 76: { "int32", 32}, \ 77: { "no-int16", 32}, \ 78: { "int16", -32}, \ 79: { "no-int32", -32}, \ 80: /* use 32 bit for float */ \ 81: { "float32", 64}, \ 82: { "no-float64", 64}, \ 83: { "float64", -64}, \ 84: { "no-float32", -64}, \ 85: /* allow abshi pattern? - can trigger "optimizations" which make code SLOW! */\ 86: { "abshi", 128}, \ 87: { "no-abshi", -128}, \ 88: /* is branching expensive - on a PDP, it's actually really cheap */ \ 1.1.1.2 ! root 89: /* this is just to play around and check what code gcc generates */ \ 1.1 root 90: { "branch-expensive", 256}, \ 91: { "branch-cheap", -256}, \ 92: /* optimize for space instead of time - just in a couple of places */ \ 93: { "space", 512 }, \ 94: { "time", -512 }, \ 95: /* split instruction and data memory? */ \ 96: { "split", 1024 }, \ 97: { "no-split", -1024 }, \ 98: /* default */ \ 99: { "", TARGET_DEFAULT} \ 100: } 101: 102: #define TARGET_DEFAULT (1 | 8 | 128) 103: 104: #define TARGET_FPU (target_flags & 1) 105: #define TARGET_SOFT_FLOAT (!TARGET_FPU) 106: 107: #define TARGET_AC0 ((target_flags & 2) && TARGET_FPU) 108: #define TARGET_NO_AC0 (! TARGET_AC0) 109: 110: #define TARGET_45 (target_flags & 8) 111: #define TARGET_40_PLUS ((target_flags & 4) || (target_flags)) 112: #define TARGET_10 (! TARGET_40_PLUS) 113: 114: #define TARGET_BCOPY_BUILTIN (! (target_flags & 16)) 115: 116: #define TARGET_INT16 (! TARGET_INT32) 117: #define TARGET_INT32 (target_flags & 32) 118: 119: #define TARGET_FLOAT32 (target_flags & 64) 120: #define TARGET_FLOAT64 (! TARGET_FLOAT32) 121: 122: #define TARGET_ABSHI_BUILTIN (target_flags & 128) 123: 124: #define TARGET_BRANCH_EXPENSIVE (target_flags & 256) 125: #define TARGET_BRANCH_CHEAP (!TARGET_BRANCH_EXPENSIVE) 126: 127: #define TARGET_SPACE (target_flags & 512) 128: #define TARGET_TIME (! TARGET_SPACE) 129: 130: #define TARGET_SPLIT (target_flags & 1024) 131: #define TARGET_NOSPLIT (! TARGET_SPLIT) 132: 133: 134: /* TYPE SIZES */ 135: #define CHAR_TYPE_SIZE 8 136: #define SHORT_TYPE_SIZE 16 137: #define INT_TYPE_SIZE (TARGET_INT16 ? 16 : 32) 138: #define LONG_TYPE_SIZE 32 139: #define LONG_LONG_TYPE_SIZE 64 140: 141: /* if we set FLOAT_TYPE_SIZE to 32, we could have the benefit 142: of saving core for huge arrays - the definitions are 143: already in md - but floats can never reside in 144: an FPU register - we keep the FPU in double float mode 145: all the time !! */ 146: #define FLOAT_TYPE_SIZE (TARGET_FLOAT32 ? 32 : 64) 147: #define DOUBLE_TYPE_SIZE 64 148: #define LONG_DOUBLE_TYPE_SIZE 64 149: 150: /* machine types from ansi */ 151: #define SIZE_TYPE "unsigned int" /* definition of size_t */ 152: 153: /* is used in cexp.y - we don't have target_flags there, 154: so just give default definition 155: 156: hope it does not come back to haunt us! */ 157: #define WCHAR_TYPE "int" /* or long int???? */ 158: #define WCHAR_TYPE_SIZE 16 159: 160: #define PTRDIFF_TYPE "int" 161: 162: /* target machine storage layout */ 163: 164: /* Define this if most significant bit is lowest numbered 165: in instructions that operate on numbered bit-fields. */ 166: #define BITS_BIG_ENDIAN 0 167: 168: /* Define this if most significant byte of a word is the lowest numbered. */ 169: #define BYTES_BIG_ENDIAN 0 170: 171: /* Define this if most significant word of a multiword number is numbered. */ 172: #define WORDS_BIG_ENDIAN 1 173: 1.1.1.2 ! root 174: /* number of bits in an addressable storage unit */ 1.1 root 175: #define BITS_PER_UNIT 8 176: 177: /* Width in bits of a "word", which is the contents of a machine register. 178: Note that this is not necessarily the width of data type `int'; 179: if using 16-bit ints on a 68000, this would still be 32. 180: But on a machine with 16-bit registers, this would be 16. */ 181: /* This is a machine with 16-bit registers */ 182: #define BITS_PER_WORD 16 183: 184: /* Width of a word, in units (bytes). 185: 186: UNITS OR BYTES - seems like units */ 187: #define UNITS_PER_WORD 2 188: 189: /* Maximum sized of reasonable data type 190: DImode or Dfmode ...*/ 191: #define MAX_FIXED_MODE_SIZE 64 192: 193: /* Width in bits of a pointer. 194: See also the macro `Pmode' defined below. */ 195: #define POINTER_SIZE 16 196: 197: /* Allocation boundary (in *bits*) for storing pointers in memory. */ 198: #define POINTER_BOUNDARY 16 199: 200: /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 201: #define PARM_BOUNDARY 16 202: 203: /* Allocation boundary (in *bits*) for the code of a function. */ 204: #define FUNCTION_BOUNDARY 16 205: 206: /* Alignment of field after `int : 0' in a structure. */ 207: #define EMPTY_FIELD_BOUNDARY 16 208: 209: /* No data type wants to be aligned rounder than this. */ 210: #define BIGGEST_ALIGNMENT 16 211: 212: /* Define this if move instructions will actually fail to work 213: when given unaligned data. */ 214: #define STRICT_ALIGNMENT 1 215: 216: /* Standard register usage. */ 217: 218: /* Number of actual hardware registers. 219: The hardware registers are assigned numbers for the compiler 220: from 0 to just below FIRST_PSEUDO_REGISTER. 221: All registers that the compiler knows about must be given numbers, 222: even those that are not normally considered general registers. 223: 224: we have 8 integer registers, plus 6 float 225: (don't use scratch float !) */ 226: 227: #define FIRST_PSEUDO_REGISTER 14 228: 229: /* 1 for registers that have pervasive standard uses 230: and are not available for the register allocator. 231: 232: On the pdp, these are: 233: Reg 7 = pc; 234: reg 6 = sp; 235: reg 5 = fp; not necessarily! 236: */ 237: 238: /* don't let them touch fp regs for the time being !*/ 239: 240: #define FIXED_REGISTERS \ 241: {0, 0, 0, 0, 0, 0, 1, 1, \ 242: 0, 0, 0, 0, 0, 0 } 243: 244: 245: 246: /* 1 for registers not available across function calls. 247: These must include the FIXED_REGISTERS and also any 248: registers that can be used without being saved. 249: The latter must include the registers where values are returned 250: and the register where structure-value addresses are passed. 251: Aside from that, you can include as many other registers as you like. */ 252: 253: /* don't know about fp */ 254: #define CALL_USED_REGISTERS \ 255: {1, 1, 0, 0, 0, 0, 1, 1, \ 256: 0, 0, 0, 0, 0, 0 } 257: 258: 259: /* Make sure everything's fine if we *don't* have an FPU. 260: This assumes that putting a register in fixed_regs will keep the 261: compiler's mitts completely off it. We don't bother to zero it out 262: of register classes. 263: */ 264: #define CONDITIONAL_REGISTER_USAGE \ 265: { \ 266: int i; \ 267: HARD_REG_SET x; \ 268: if (!TARGET_FPU) \ 269: { \ 270: COPY_HARD_REG_SET (x, reg_class_contents[(int)FPU_REGS]); \ 271: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \ 272: if (TEST_HARD_REG_BIT (x, i)) \ 273: fixed_regs[i] = call_used_regs[i] = 1; \ 274: } \ 275: \ 276: if (TARGET_AC0) \ 277: call_used_regs[8] = 1; \ 278: } 279: 280: /* Return number of consecutive hard regs needed starting at reg REGNO 281: to hold something of mode MODE. 282: This is ordinarily the length in words of a value of mode MODE 283: but can be less for certain modes in special long registers. 284: */ 285: 286: #define HARD_REGNO_NREGS(REGNO, MODE) \ 287: ((REGNO < 8)? \ 288: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) \ 289: :1) 290: 291: 292: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. 293: On the pdp, the cpu registers can hold any mode - check alignment 294: 295: FPU can only hold DF - simplifies life! 296: */ 297: #define HARD_REGNO_MODE_OK(REGNO, MODE) \ 298: ((REGNO < 8)? \ 299: ((GET_MODE_BITSIZE(MODE) <= 16) \ 300: || (GET_MODE_BITSIZE(MODE) == 32 && !(REGNO & 1))) \ 301: :(MODE) == DFmode) 302: 303: 304: /* Value is 1 if it is a good idea to tie two pseudo registers 305: when one has mode MODE1 and one has mode MODE2. 306: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 307: for any hard reg, then this must be 0 for correct output. */ 308: #define MODES_TIEABLE_P(MODE1, MODE2) 0 309: 310: /* Specify the registers used for certain standard purposes. 311: The values of these macros are register numbers. */ 312: 313: /* the pdp11 pc overloaded on a register that the compiler knows about. */ 314: #define PC_REGNUM 7 315: 316: /* Register to use for pushing function arguments. */ 317: #define STACK_POINTER_REGNUM 6 318: 319: /* Base register for access to local variables of the function. */ 320: #define FRAME_POINTER_REGNUM 5 321: 322: /* Value should be nonzero if functions must have frame pointers. 323: Zero means the frame pointer need not be set up (and parms 324: may be accessed via the stack pointer) in functions that seem suitable. 325: This is computed in `reload', in reload1.c. 326: */ 327: 328: #define FRAME_POINTER_REQUIRED 0 329: 330: /* Base register for access to arguments of the function. */ 331: #define ARG_POINTER_REGNUM 5 332: 333: /* Register in which static-chain is passed to a function. */ 334: /* ??? - i don't want to give up a reg for this! */ 335: #define STATIC_CHAIN_REGNUM 4 336: 337: /* Register in which address to store a structure value 338: is passed to a function. 339: let's make it an invisible first argument!!! */ 340: 341: #define STRUCT_VALUE 0 342: 343: 344: /* Define the classes of registers for register constraints in the 345: machine description. Also define ranges of constants. 346: 347: One of the classes must always be named ALL_REGS and include all hard regs. 348: If there is more than one class, another class must be named NO_REGS 349: and contain no registers. 350: 351: The name GENERAL_REGS must be the name of a class (or an alias for 352: another name such as ALL_REGS). This is the class of registers 353: that is allowed by "g" or "r" in a register constraint. 354: Also, registers outside this class are allocated only when 355: instructions express preferences for them. 356: 357: The classes must be numbered in nondecreasing order; that is, 358: a larger-numbered class must never be contained completely 359: in a smaller-numbered class. 360: 361: For any two classes, it is very desirable that there be another 362: class that represents their union. */ 363: 364: /* The pdp has a couple of classes: 365: 366: MUL_REGS are used for odd numbered regs, to use in 16 bit multiplication 367: (even numbered do 32 bit multiply) 368: LMUL_REGS long multiply registers (even numbered regs ) 369: (don't need them, all 32 bit regs are even numbered!) 370: GENERAL_REGS is all cpu 371: LOAD_FPU_REGS is the first four cpu regs, they are easier to load 372: NO_LOAD_FPU_REGS is ac4 and ac5, currently - difficult to load them 373: FPU_REGS is all fpu regs 374: */ 375: 376: enum reg_class { NO_REGS, MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS, FPU_REGS, ALL_REGS, LIM_REG_CLASSES }; 377: 378: #define N_REG_CLASSES (int) LIM_REG_CLASSES 379: 380: /* have to allow this till cmpsi/tstsi are fixed in a better way !! */ 381: #define SMALL_REGISTER_CLASSES 382: 383: /* Since GENERAL_REGS is the same class as ALL_REGS, 384: don't give it a different class number; just make it an alias. */ 385: 386: /* #define GENERAL_REGS ALL_REGS */ 387: 388: /* Give names of register classes as strings for dump file. */ 389: 390: #define REG_CLASS_NAMES {"NO_REGS", "MUL_REGS", "GENERAL_REGS", "LOAD_FPU_REGS", "NO_LOAD_FPU_REGS", "FPU_REGS", "ALL_REGS" } 391: 392: /* Define which registers fit in which classes. 393: This is an initializer for a vector of HARD_REG_SET 394: of length N_REG_CLASSES. */ 395: 396: #define REG_CLASS_CONTENTS {0, 0x00aa, 0x00ff, 0x0f00, 0x3000, 0x3f00, 0x3fff} 397: 398: /* The same information, inverted: 399: Return the class number of the smallest class containing 400: reg number REGNO. This could be a conditional expression 401: or could index an array. */ 402: 403: #define REGNO_REG_CLASS(REGNO) \ 404: ((REGNO)>=8?((REGNO)<=11?LOAD_FPU_REGS:NO_LOAD_FPU_REGS):((REGNO&1)?MUL_REGS:GENERAL_REGS)) 405: 406: 407: /* The class value for index registers, and the one for base regs. */ 408: #define INDEX_REG_CLASS GENERAL_REGS 409: #define BASE_REG_CLASS GENERAL_REGS 410: 411: /* Get reg_class from a letter such as appears in the machine description. */ 412: 413: #define REG_CLASS_FROM_LETTER(C) \ 414: ((C) == 'f' ? FPU_REGS : \ 415: ((C) == 'd' ? MUL_REGS : \ 416: ((C) == 'a' ? LOAD_FPU_REGS : NO_REGS))) 417: 418: 419: /* The letters I, J, K, L and M in a register constraint string 420: can be used to stand for particular ranges of immediate operands. 421: This macro defines what the ranges are. 422: C is the letter, and VALUE is a constant value. 423: Return 1 if VALUE is in the range specified by C. 424: 425: I bits 31-16 0000 426: J bits 15-00 0000 427: K completely random 32 bit 428: L,M,N -1,1,0 respectively 429: O where doing shifts in sequence is faster than 430: one big shift 431: */ 432: 433: #define CONST_OK_FOR_LETTER_P(VALUE, C) \ 434: ((C) == 'I' ? ((VALUE) & 0xffff0000) == 0 \ 435: : (C) == 'J' ? ((VALUE) & 0x0000ffff) == 0 \ 436: : (C) == 'K' ? (((VALUE) & 0xffff0000) != 0 \ 437: && ((VALUE) & 0x0000ffff) != 0) \ 438: : (C) == 'L' ? ((VALUE) == 1) \ 439: : (C) == 'M' ? ((VALUE) == -1) \ 440: : (C) == 'N' ? ((VALUE) == 0) \ 441: : (C) == 'O' ? (abs(VALUE) >1 && abs(VALUE) <= 4) \ 442: : 0) 443: 444: /* Similar, but for floating constants, and defining letters G and H. 445: Here VALUE is the CONST_DOUBLE rtx itself. */ 446: 447: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 448: ((C) == 'G' && XINT (VALUE, 0) == 0 && XINT (VALUE, 1) == 0) 449: 450: 451: /* Letters in the range `Q' through `U' may be defined in a 452: machine-dependent fashion to stand for arbitrary operand types. 453: The machine description macro `EXTRA_CONSTRAINT' is passed the 454: operand as its first argument and the constraint letter as its 455: second operand. 456: 1.1.1.2 ! root 457: `Q' is for memory references using take more than 1 instruction. ! 458: `R' is for memory references which take 1 word for the instruction. */ 1.1 root 459: 460: #define EXTRA_CONSTRAINT(OP,CODE) \ 461: ((GET_CODE (OP) != MEM) ? 0 \ 462: : !legitimate_address_p (GET_MODE (OP), XEXP (OP, 0)) ? 0 \ 463: : ((CODE) == 'Q') ? !simple_memory_operand (OP, GET_MODE (OP)) \ 464: : ((CODE) == 'R') ? simple_memory_operand (OP, GET_MODE (OP)) \ 465: : 0) 466: 467: /* Given an rtx X being reloaded into a reg required to be 468: in class CLASS, return the class of reg to actually use. 469: In general this is just CLASS; but on some machines 470: in some cases it is preferable to use a more restrictive class. 471: 472: loading is easier into LOAD_FPU_REGS than FPU_REGS! */ 473: 474: #define PREFERRED_RELOAD_CLASS(X,CLASS) \ 475: (((CLASS) != FPU_REGS)?(CLASS):LOAD_FPU_REGS) 476: 477: #define SECONDARY_RELOAD_CLASS(CLASS,MODE,x) \ 478: (((CLASS) == NO_LOAD_FPU_REGS && !(REG_P(x) && LOAD_FPU_REG_P(REGNO(x))))?LOAD_FPU_REGS:NO_REGS) 479: 480: /* Return the maximum number of consecutive registers 481: needed to represent mode MODE in a register of class CLASS. */ 482: #define CLASS_MAX_NREGS(CLASS, MODE) \ 483: ((CLASS == GENERAL_REGS || CLASS == MUL_REGS)? \ 484: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD): \ 485: 1 \ 486: ) 487: 488: 489: /* Stack layout; function entry, exit and calling. */ 490: 491: /* Define this if pushing a word on the stack 492: makes the stack pointer a smaller address. */ 493: #define STACK_GROWS_DOWNWARD 494: 495: /* Define this if the nominal address of the stack frame 496: is at the high-address end of the local variables; 497: that is, each additional local variable allocated 498: goes at a more negative offset in the frame. 499: */ 500: #define FRAME_GROWS_DOWNWARD 501: 502: /* Offset within stack frame to start allocating local variables at. 503: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 504: first local allocated. Otherwise, it is the offset to the BEGINNING 505: of the first local allocated. */ 506: #define STARTING_FRAME_OFFSET 0 507: 508: /* If we generate an insn to push BYTES bytes, 509: this says how many the stack pointer really advances by. 510: On the pdp11, the stack is on an even boundary */ 511: #define PUSH_ROUNDING(BYTES) ((BYTES + 1) & ~1) 512: 513: /* current_first_parm_offset stores the # of registers pushed on the 514: stack */ 515: extern int current_first_parm_offset; 516: 517: /* Offset of first parameter from the argument pointer register value. 518: For the pdp11, this is non-zero to account for the return address. 519: 1 - return address 520: 2 - frame pointer (always saved, even when not used!!!!) 521: -- chnage some day !!!:q! 522: 523: */ 524: #define FIRST_PARM_OFFSET(FNDECL) 4 525: 526: /* Value is 1 if returning from a function call automatically 527: pops the arguments described by the number-of-args field in the call. 1.1.1.2 ! root 528: FUNDECL is the declaration node of the function (as a tree), 1.1 root 529: FUNTYPE is the data type of the function (as a tree), 530: or for a library call it is an identifier node for the subroutine name. */ 531: 1.1.1.2 ! root 532: #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 1.1 root 533: 534: /* Define how to find the value returned by a function. 535: VALTYPE is the data type of the value (as a tree). 536: If the precise function being called is known, FUNC is its FUNCTION_DECL; 537: otherwise, FUNC is 0. */ 538: #define BASE_RETURN_VALUE_REG(MODE) \ 539: ((MODE) == DFmode ? 8 : 0) 540: 541: /* On the pdp11 the value is found in R0 (or ac0??? 542: not without FPU!!!! ) */ 543: 544: #define FUNCTION_VALUE(VALTYPE, FUNC) \ 545: gen_rtx (REG, TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG(TYPE_MODE(VALTYPE))) 546: 547: /* and the called function leaves it in the first register. 548: Difference only on machines with register windows. */ 549: 550: #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \ 551: gen_rtx (REG, TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG(TYPE_MODE(VALTYPE))) 552: 553: /* Define how to find the value returned by a library function 554: assuming the value has mode MODE. */ 555: 556: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, BASE_RETURN_VALUE_REG(MODE)) 557: 558: /* 1 if N is a possible register number for a function value 559: as seen by the caller. 560: On the pdp, the first "output" reg is the only register thus used. 561: 562: maybe ac0 ? - as option someday! */ 563: 564: #define FUNCTION_VALUE_REGNO_P(N) (((N) == 0) || (TARGET_AC0 && (N) == 8)) 565: 566: /* should probably return DImode and DFmode in memory,lest 567: we fill up all regs! 568: 1.1.1.2 ! root 569: have to, else we crash - exception: maybe return result in 1.1 root 570: ac0 if DFmode and FPU present - compatibility problem with 571: libraries for non-floating point ... 572: */ 573: 574: #define RETURN_IN_MEMORY(TYPE) \ 575: (TYPE_MODE(TYPE) == DImode || (TYPE_MODE(TYPE) == DFmode && ! TARGET_AC0)) 576: 577: 578: /* 1 if N is a possible register number for function argument passing. 579: - not used on pdp */ 580: 581: #define FUNCTION_ARG_REGNO_P(N) 0 582: 583: /* Define a data type for recording info about an argument list 584: during the scan of that argument list. This data type should 585: hold all necessary information about the function itself 586: and about the args processed so far, enough to enable macros 587: such as FUNCTION_ARG to determine where the next arg should go. 588: 589: */ 590: 591: #define CUMULATIVE_ARGS int 592: 593: /* Initialize a variable CUM of type CUMULATIVE_ARGS 594: for a call to a function whose data type is FNTYPE. 595: For a library call, FNTYPE is 0. 596: 597: ...., the offset normally starts at 0, but starts at 1 word 598: when the function gets a structure-value-address as an 599: invisible first argument. */ 600: 601: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \ 602: ((CUM) = 0) 603: 604: /* Update the data in CUM to advance over an argument 605: of mode MODE and data type TYPE. 606: (TYPE is null for libcalls where that information may not be available.) 607: 608: */ 609: 610: 611: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 612: ((CUM) += ((MODE) != BLKmode \ 613: ? (GET_MODE_SIZE (MODE)) \ 614: : (int_size_in_bytes (TYPE)))) 615: 616: /* Determine where to put an argument to a function. 617: Value is zero to push the argument on the stack, 618: or a hard register in which to store the argument. 619: 620: MODE is the argument's machine mode. 621: TYPE is the data type of the argument (as a tree). 622: This is null for libcalls where that information may 623: not be available. 624: CUM is a variable of type CUMULATIVE_ARGS which gives info about 625: the preceding args and about the function being called. 626: NAMED is nonzero if this argument is a named parameter 627: (otherwise it is an extra parameter matching an ellipsis). */ 628: 629: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0 630: 631: /* Define where a function finds its arguments. 632: This would be different from FUNCTION_ARG if we had register windows. */ 633: /* 634: #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \ 635: FUNCTION_ARG (CUM, MODE, TYPE, NAMED) 636: */ 637: 638: /* For an arg passed partly in registers and partly in memory, 639: this is the number of registers used. 640: For args passed entirely in registers or entirely in memory, zero. */ 641: 642: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0 643: 644: /* This macro generates the assembly code for function entry. */ 645: #define FUNCTION_PROLOGUE(FILE, SIZE) \ 646: output_function_prologue(FILE, SIZE); 647: 648: /* Output assembler code to FILE to increment profiler label # LABELNO 649: for profiling a function entry. */ 650: 651: #define FUNCTION_PROFILER(FILE, LABELNO) \ 652: abort (); 653: 654: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 655: the stack pointer does not matter. The value is tested only in 656: functions that have frame pointers. 657: No definition is equivalent to always zero. */ 658: 659: extern int may_call_alloca; 660: extern int current_function_pretend_args_size; 661: 662: #define EXIT_IGNORE_STACK 1 663: 664: /* This macro generates the assembly code for function exit, 665: on machines that need it. If FUNCTION_EPILOGUE is not defined 666: then individual return instructions are generated for each 667: return statement. Args are same as for FUNCTION_PROLOGUE. 668: */ 669: 670: #define FUNCTION_EPILOGUE(FILE, SIZE) \ 671: output_function_epilogue(FILE, SIZE); 672: 673: #define INITIAL_FRAME_POINTER_OFFSET(DEPTH_VAR) \ 674: { \ 675: int offset, regno; \ 676: offset = get_frame_size(); \ 677: for (regno = 0; regno < 8; regno++) \ 678: if (regs_ever_live[regno] && ! call_used_regs[regno]) \ 679: offset += 2; \ 680: for (regno = 8; regno < 14; regno++) \ 681: if (regs_ever_live[regno] && ! call_used_regs[regno]) \ 682: offset += 8; \ 683: /* offset -= 2; no fp on stack frame */ \ 684: (DEPTH_VAR) = offset; \ 685: } 686: 687: 688: /* Addressing modes, and classification of registers for them. */ 689: 690: #define HAVE_POST_INCREMENT 691: /* #define HAVE_POST_DECREMENT */ 692: 693: #define HAVE_PRE_DECREMENT 694: /* #define HAVE_PRE_INCREMENT */ 695: 696: /* Macros to check register numbers against specific register classes. */ 697: 698: /* These assume that REGNO is a hard or pseudo reg number. 699: They give nonzero only if REGNO is a hard reg of the suitable class 700: or a pseudo reg currently allocated to a suitable hard reg. 701: Since they use reg_renumber, they are safe only once reg_renumber 702: has been allocated, which happens in local-alloc.c. */ 703: 704: #define REGNO_OK_FOR_INDEX_P(REGNO) \ 705: ((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8) 706: #define REGNO_OK_FOR_BASE_P(REGNO) \ 707: ((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8) 708: 709: /* Now macros that check whether X is a register and also, 710: strictly, whether it is in a specified class. 711: */ 712: 713: 714: 715: /* Maximum number of registers that can appear in a valid memory address. */ 716: 717: #define MAX_REGS_PER_ADDRESS 2 718: 719: /* Recognize any constant value that is a valid address. */ 720: 721: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X) 722: 723: /* Nonzero if the constant value X is a legitimate general operand. 724: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 725: 726: #define LEGITIMATE_CONSTANT_P(X) (1) 727: 728: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 729: and check its validity for a certain class. 730: We have two alternate definitions for each of them. 731: The usual definition accepts all pseudo regs; the other rejects 732: them unless they have been allocated suitable hard regs. 733: The symbol REG_OK_STRICT causes the latter definition to be used. 734: 735: Most source files want to accept pseudo regs in the hope that 736: they will get allocated to the class that the insn wants them to be in. 737: Source files for reload pass need to be strict. 738: After reload, it makes no difference, since pseudo regs have 739: been eliminated by then. */ 740: 741: #ifndef REG_OK_STRICT 742: 743: /* Nonzero if X is a hard reg that can be used as an index 744: or if it is a pseudo reg. */ 745: #define REG_OK_FOR_INDEX_P(X) (1) 746: /* Nonzero if X is a hard reg that can be used as a base reg 747: or if it is a pseudo reg. */ 748: #define REG_OK_FOR_BASE_P(X) (1) 749: 750: #else 751: 752: /* Nonzero if X is a hard reg that can be used as an index. */ 753: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 754: /* Nonzero if X is a hard reg that can be used as a base reg. */ 755: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 756: 757: #endif 758: 759: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 760: that is a valid memory address for an instruction. 761: The MODE argument is the machine mode for the MEM expression 762: that wants to use this address. 763: 764: */ 765: 766: #define GO_IF_LEGITIMATE_ADDRESS(mode, operand, ADDR) \ 767: { \ 768: rtx xfoob; \ 769: \ 770: /* accept (R0) */ \ 771: if (GET_CODE (operand) == REG \ 772: && REG_OK_FOR_BASE_P(operand)) \ 773: goto ADDR; \ 774: \ 775: /* accept @#address */ \ 776: if (CONSTANT_ADDRESS_P (operand)) \ 777: goto ADDR; \ 778: \ 779: /* accept X(R0) */ \ 780: if (GET_CODE (operand) == PLUS \ 781: && GET_CODE (XEXP (operand, 0)) == REG \ 782: && REG_OK_FOR_BASE_P (XEXP (operand, 0)) \ 783: && CONSTANT_ADDRESS_P (XEXP (operand, 1))) \ 784: goto ADDR; \ 785: \ 786: /* accept -(R0) */ \ 787: if (GET_CODE (operand) == PRE_DEC \ 788: && GET_CODE (XEXP (operand, 0)) == REG \ 789: && REG_OK_FOR_BASE_P (XEXP (operand, 0))) \ 790: goto ADDR; \ 791: \ 792: /* accept (R0)+ */ \ 793: if (GET_CODE (operand) == POST_INC \ 794: && GET_CODE (XEXP (operand, 0)) == REG \ 795: && REG_OK_FOR_BASE_P (XEXP (operand, 0))) \ 796: goto ADDR; \ 797: \ 798: /* handle another level of indirection ! */ \ 799: if (GET_CODE(operand) != MEM) \ 800: goto fail; \ 801: \ 802: xfoob = XEXP (operand, 0); \ 803: \ 804: /* (MEM:xx (MEM:xx ())) is not valid for SI, DI and currently */ \ 805: /* also forbidden for float, because we have to handle this */ \ 806: /* in output_move_double and/or output_move_quad() - we could */ \ 807: /* do it, but currently it's not worth it!!! */ \ 808: /* now that DFmode cannot go into CPU register file, */ \ 809: /* maybe I should allow float ... */ \ 810: /* but then I have to handle memory-to-memory moves in movdf ?? */ \ 811: \ 812: if (GET_MODE_BITSIZE(mode) > 16) \ 813: goto fail; \ 814: \ 815: /* accept @(R0) - which is @0(R0) */ \ 816: if (GET_CODE (xfoob) == REG \ 817: && REG_OK_FOR_BASE_P(xfoob)) \ 818: goto ADDR; \ 819: \ 820: /* accept @address */ \ 821: if (CONSTANT_ADDRESS_P (xfoob)) \ 822: goto ADDR; \ 823: \ 824: /* accept @X(R0) */ \ 825: if (GET_CODE (xfoob) == PLUS \ 826: && GET_CODE (XEXP (xfoob, 0)) == REG \ 827: && REG_OK_FOR_BASE_P (XEXP (xfoob, 0)) \ 828: && CONSTANT_ADDRESS_P (XEXP (xfoob, 1))) \ 829: goto ADDR; \ 830: \ 831: /* accept @-(R0) */ \ 832: if (GET_CODE (xfoob) == PRE_DEC \ 833: && GET_CODE (XEXP (xfoob, 0)) == REG \ 834: && REG_OK_FOR_BASE_P (XEXP (xfoob, 0))) \ 835: goto ADDR; \ 836: \ 837: /* accept @(R0)+ */ \ 838: if (GET_CODE (xfoob) == POST_INC \ 839: && GET_CODE (XEXP (xfoob, 0)) == REG \ 840: && REG_OK_FOR_BASE_P (XEXP (xfoob, 0))) \ 841: goto ADDR; \ 842: \ 1.1.1.2 ! root 843: /* anything else is invalid */ \ 1.1 root 844: fail: ; \ 845: } 846: 847: 848: /* Try machine-dependent ways of modifying an illegitimate address 849: to be legitimate. If we find one, return the new, valid address. 850: This macro is used in only one place: `memory_address' in explow.c. 851: 852: OLDX is the address as it was before break_out_memory_refs was called. 853: In some cases it is useful to look at this to decide what needs to be done. 854: 855: MODE and WIN are passed so that this macro can use 856: GO_IF_LEGITIMATE_ADDRESS. 857: 858: It is always safe for this macro to do nothing. It exists to recognize 859: opportunities to optimize the output. */ 860: 861: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {} 862: 863: 864: /* Go to LABEL if ADDR (a legitimate address expression) 865: has an effect that depends on the machine mode it is used for. 866: On the the pdp this is for predec/postinc */ 867: 868: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ 869: { if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) \ 870: goto LABEL; \ 871: } 872: 873: 874: /* Specify the machine mode that this machine uses 875: for the index in the tablejump instruction. */ 876: #define CASE_VECTOR_MODE HImode 877: 878: /* Define this if a raw index is all that is needed for a 879: `tablejump' insn. */ 880: #define CASE_TAKES_INDEX_RAW 881: 882: /* Define this if the tablejump instruction expects the table 883: to contain offsets from the address of the table. 884: Do not define this if the table should contain absolute addresses. */ 885: /* #define CASE_VECTOR_PC_RELATIVE */ 886: 887: /* Specify the tree operation to be used to convert reals to integers. */ 888: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR 889: 890: /* This is the kind of divide that is easiest to do in the general case. */ 891: #define EASY_DIV_EXPR TRUNC_DIV_EXPR 892: 893: /* Define this as 1 if `char' should by default be signed; else as 0. */ 894: #define DEFAULT_SIGNED_CHAR 1 895: 896: /* Max number of bytes we can move from memory to memory 897: in one reasonably fast instruction. 898: */ 899: 900: #define MOVE_MAX 2 901: 902: /* Zero extension is faster if the target is known to be zero */ 903: /* #define SLOW_ZERO_EXTEND */ 904: 905: /* Nonzero if access to memory by byte is slow and undesirable. - 906: */ 907: #define SLOW_BYTE_ACCESS 0 908: 909: /* Do not break .stabs pseudos into continuations. */ 910: #define DBX_CONTIN_LENGTH 0 911: 912: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 913: is done just by pretending it is already truncated. */ 914: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 915: 916: 917: /* Add any extra modes needed to represent the condition code. 918: 919: CCFPmode is used for FPU, but should we use a separate reg? */ 920: #define EXTRA_CC_MODES CCFPmode 921: 922: /* the name for the mode above */ 923: #define EXTRA_CC_NAMES "CCFPmode" 924: 925: /* Give a comparison code (EQ, NE etc) and the first operand of a COMPARE, 926: return the mode to be used for the comparison. For floating-point, CCFPmode 927: should be used. */ 928: 929: #define SELECT_CC_MODE(OP,X,Y) \ 930: (GET_MODE_CLASS(GET_MODE(X)) == MODE_FLOAT? CCFPmode : CCmode) 931: 932: /* We assume that the store-condition-codes instructions store 0 for false 933: and some other value for true. This is the value stored for true. */ 934: 935: /* #define STORE_FLAG_VALUE 1 */ 936: 937: /* Specify the machine mode that pointers have. 938: After generation of rtl, the compiler makes no further distinction 939: between pointers and any other objects of this machine mode. */ 940: #define Pmode HImode 941: 942: /* A function address in a call instruction 943: is a word address (for indexing purposes) 944: so give the MEM rtx a word's mode. */ 945: #define FUNCTION_MODE HImode 946: 947: /* Define this if addresses of constant functions 948: shouldn't be put through pseudo regs where they can be cse'd. 949: Desirable on machines where ordinary constants are expensive 950: but a CALL with constant address is cheap. */ 951: /* #define NO_FUNCTION_CSE */ 952: 953: /* Compute the cost of computing a constant rtl expression RTX 954: whose rtx-code is CODE. The body of this macro is a portion 955: of a switch statement. If the code is computed here, 956: return it with a return statement. Otherwise, break from the switch. 957: 958: -1, 0, 1 are cheaper for add, sub ... 959: */ 960: 961: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ 962: case CONST_INT: \ 963: if (INTVAL(RTX) == 0 \ 964: || INTVAL(RTX) == -1 \ 965: || INTVAL(RTX) == 1) \ 966: return 0; \ 967: case CONST: \ 968: case LABEL_REF: \ 969: case SYMBOL_REF: \ 970: /* twice as expensive as REG */ \ 971: return 2; \ 972: case CONST_DOUBLE: \ 973: /* twice (or 4 times) as expensive as 16 bit */ \ 974: return 4; 975: 976: /* cost of moving one register class to another */ 977: #define REGISTER_MOVE_COST(CLASS1, CLASS2) register_move_cost(CLASS1, CLASS2) 978: 979: /* Tell emit-rtl.c how to initialize special values on a per-function base. */ 980: extern int optimize; 981: extern struct rtx_def *cc0_reg_rtx; 982: 983: #define CC_STATUS_MDEP rtx 984: 985: #define CC_STATUS_MDEP_INIT (cc_status.mdep = 0) 986: 987: /* Tell final.c how to eliminate redundant test instructions. */ 988: 989: /* Here we define machine-dependent flags and fields in cc_status 990: (see `conditions.h'). */ 991: 992: #define CC_IN_FPU 04000 993: 994: /* Do UPDATE_CC if EXP is a set, used in 995: NOTICE_UPDATE_CC 996: 997: floats only do compare correctly, else nullify ... 998: 999: get cc0 out soon ... 1000: */ 1001: 1002: /* Store in cc_status the expressions 1003: that the condition codes will describe 1004: after execution of an instruction whose pattern is EXP. 1005: Do not alter them if the instruction would not alter the cc's. */ 1006: 1007: #define NOTICE_UPDATE_CC(EXP, INSN) \ 1008: { if (GET_CODE (EXP) == SET) \ 1009: { \ 1010: notice_update_cc_on_set(EXP, INSN); \ 1011: } \ 1012: else if (GET_CODE (EXP) == PARALLEL \ 1013: && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \ 1014: { \ 1015: notice_update_cc_on_set(XVECEXP (EXP, 0, 0), INSN); \ 1016: } \ 1017: else if (GET_CODE (EXP) == CALL) \ 1018: { /* all bets are off */ CC_STATUS_INIT; } \ 1019: if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \ 1020: && cc_status.value2 \ 1021: && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \ 1022: printf ("here!\n", cc_status.value2 = 0); \ 1023: } 1024: 1025: /* Control the assembler format that we output. */ 1026: 1027: /* Output at beginning of assembler file. */ 1028: 1029: #if 0 1030: #define ASM_FILE_START(FILE) \ 1031: ( \ 1032: fprintf (FILE, "\t.data\n"), \ 1033: fprintf (FILE, "$help$: . = .+8 ; space for tmp moves!\n") \ 1034: /* do we need reg def's R0 = %0 etc ??? */ \ 1035: ) 1036: #else 1037: #define ASM_FILE_START(FILE) (0) 1038: #endif 1039: 1040: 1041: /* Output to assembler file text saying following lines 1042: may contain character constants, extra white space, comments, etc. */ 1043: 1044: #define ASM_APP_ON "" 1045: 1046: /* Output to assembler file text saying following lines 1047: no longer contain unusual constructs. */ 1048: 1049: #define ASM_APP_OFF "" 1050: 1051: /* Output before read-only data. */ 1052: 1053: #define TEXT_SECTION_ASM_OP "\t.text\n" 1054: 1055: /* Output before writable data. */ 1056: 1057: #define DATA_SECTION_ASM_OP "\t.data\n" 1058: 1059: /* How to refer to registers in assembler output. 1060: This sequence is indexed by compiler's hard-register-number (see above). */ 1061: 1062: #define REGISTER_NAMES \ 1063: {"r0", "r1", "r2", "r3", "r4", "fp", "sp", "pc", \ 1064: "ac0", "ac1", "ac2", "ac3", "ac4", "ac5" } 1065: 1066: /* How to renumber registers for dbx and gdb. */ 1067: 1068: #define DBX_REGISTER_NUMBER(REGNO) (REGNO) 1069: 1070: /* This is how to output the definition of a user-level label named NAME, 1071: such as the label on a static function or variable NAME. */ 1072: 1073: #define ASM_OUTPUT_LABEL(FILE,NAME) \ 1074: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) 1075: 1076: /* This is how to output a command to make the user-level label named NAME 1077: defined for reference from other files. */ 1078: 1079: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ 1080: do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs("\n", FILE); } while (0) 1081: 1082: /* This is how to output a reference to a user-level label named NAME. 1083: `assemble_name' uses this. */ 1084: 1085: #define ASM_OUTPUT_LABELREF(FILE,NAME) \ 1086: fprintf (FILE, "_%s", NAME) 1087: 1088: /* This is how to output an internal numbered label where 1089: PREFIX is the class of label and NUM is the number within the class. */ 1090: 1091: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ 1092: fprintf (FILE, "%s_%d:\n", PREFIX, NUM) 1093: 1094: /* This is how to store into the string LABEL 1095: the symbol_ref name of an internal numbered label where 1096: PREFIX is the class of label and NUM is the number within the class. 1097: This is suitable for output with `assemble_name'. */ 1098: 1099: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ 1100: sprintf (LABEL, "*%s_%d", PREFIX, NUM) 1101: 1102: /* This is how to output an assembler line defining a `double' constant. */ 1103: 1104: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ 1105: fprintf (FILE, "\tdouble %.20e\n", (VALUE)) 1106: 1107: /* This is how to output an assembler line defining a `float' constant. */ 1108: 1109: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ 1110: fprintf (FILE, "\tfloat %.12e\n", (VALUE)) 1111: 1112: /* This is how to output an assembler line defining an `int' constant. */ 1113: 1114: #define ASM_OUTPUT_INT(FILE,VALUE) \ 1115: ( fprintf (FILE, "\t.word "), \ 1116: output_addr_const (FILE, (VALUE)), \ 1117: fprintf (FILE, "\n")) 1118: 1119: /* Likewise for `short' and `char' constants. */ 1120: 1121: #define ASM_OUTPUT_SHORT(FILE,VALUE) \ 1122: ( fprintf (FILE, "\t.word "), \ 1123: output_addr_const (FILE, (VALUE)), \ 1124: fprintf (FILE, " /*short*/\n")) 1125: 1126: #define ASM_OUTPUT_CHAR(FILE,VALUE) \ 1127: ( fprintf (FILE, "\t.byte "), \ 1128: output_addr_const (FILE, (VALUE)), \ 1129: fprintf (FILE, " /* char */\n")) 1130: 1131: /* This is how to output an assembler line for a numeric constant byte.- 1132: 1133: do we really NEED it ? let's output it with a comment and grep the 1134: assembly source ;-) 1135: */ 1136: 1137: #define ASM_OUTPUT_BYTE(FILE,VALUE) \ 1138: fprintf (FILE, "\t.byte 0x%x\n", (VALUE)) 1139: 1140: #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \ 1141: output_ascii (FILE, P, SIZE) 1142: 1143: #define ASM_OUTPUT_ADDR_VEC_PROLOGUE(FILE, MODE, LEN) \ 1144: fprintf (FILE, "\t/* HELP! */\n"); 1145: 1146: /* This is how to output an element of a case-vector that is absolute. */ 1147: 1148: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 1149: fprintf (FILE, "\t.word L_%d\n", VALUE) 1150: 1151: /* This is how to output an element of a case-vector that is relative. 1152: (the pdp does not use such vectors, 1153: but we must define this macro anyway.) */ 1154: 1155: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \ 1156: fprintf (FILE, "\tERROR @L%d-@L%d ! error should not be used\n", VALUE, REL) 1157: 1158: /* This is how to output an assembler line 1159: that says to advance the location counter 1160: to a multiple of 2**LOG bytes. 1161: 1162: who needs this???? 1163: */ 1164: 1165: #define ASM_OUTPUT_ALIGN(FILE,LOG) \ 1166: if ((LOG) != 0) \ 1167: fprintf (FILE, "\t.align %d\n", 1<<(LOG)) 1168: 1169: #define ASM_OUTPUT_SKIP(FILE,SIZE) \ 1170: fprintf (FILE, "\t.=.+ %d\n", (SIZE)) 1171: 1172: /* This says how to output an assembler line 1173: to define a global common symbol. */ 1174: 1175: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ 1176: ( fprintf ((FILE), ".globl "), \ 1177: assemble_name ((FILE), (NAME)), \ 1178: fprintf ((FILE), "\n"), \ 1179: assemble_name ((FILE), (NAME)), \ 1180: fprintf ((FILE), ": .=.+ %d\n", (ROUNDED)) \ 1181: ) 1182: 1183: /* This says how to output an assembler line 1184: to define a local common symbol. */ 1185: 1186: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ 1187: ( assemble_name ((FILE), (NAME)), \ 1188: fprintf ((FILE), ":\t.=.+ %d\n", (ROUNDED))) 1189: 1190: /* Store in OUTPUT a string (made with alloca) containing 1191: an assembler-name for a local static variable named NAME. 1192: LABELNO is an integer which is different for each call. */ 1193: 1194: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ 1195: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ 1196: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) 1197: 1198: /* Define the parentheses used to group arithmetic operations 1199: in assembler code. */ 1200: 1201: #define ASM_OPEN_PAREN "(" 1202: #define ASM_CLOSE_PAREN ")" 1203: 1204: /* Define results of standard character escape sequences. */ 1205: #define TARGET_BELL 007 1206: #define TARGET_BS 010 1207: #define TARGET_TAB 011 1208: #define TARGET_NEWLINE 012 1209: #define TARGET_VT 013 1210: #define TARGET_FF 014 1211: #define TARGET_CR 015 1212: 1213: /* Print operand X (an rtx) in assembler syntax to file FILE. 1214: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. 1215: For `%' followed by punctuation, CODE is the punctuation and X is null. 1216: 1217: */ 1218: 1219: 1220: #define PRINT_OPERAND(FILE, X, CODE) \ 1221: { if (CODE == '#') fprintf (FILE, "#"); \ 1222: else if (GET_CODE (X) == REG) \ 1223: fprintf (FILE, "%s", reg_names[REGNO (X)]); \ 1224: else if (GET_CODE (X) == MEM) \ 1225: output_address (XEXP (X, 0)); \ 1226: else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != SImode) \ 1227: { union { double d; int i[2]; } u; \ 1228: u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X); \ 1229: fprintf (FILE, "#%.20e", u.d); } \ 1230: else { putc ('$', FILE); output_addr_const (FILE, X); }} 1231: 1232: /* Print a memory address as an operand to reference that memory location. */ 1233: 1234: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ 1235: print_operand_address (FILE, ADDR) 1236: 1237: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ 1238: ( \ 1239: fprintf (FILE, "\tmov %s, -(sp)\n", reg_names[REGNO]) \ 1240: ) 1241: 1242: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ 1243: ( \ 1244: fprintf (FILE, "\tmov (sp)+, %s\n", reg_names[REGNO]) \ 1245: ) 1246: 1247: 1248: #define ASM_IDENTIFY_GCC(FILE) \ 1249: fprintf(FILE, "gcc_compiled:\n") 1250: 1251: #define ASM_OUTPUT_DOUBLE_INT(a,b) fprintf(a,"%d", b) 1252: 1253: /* trampoline - how should i do it in separate i+d ? 1254: have some allocate_trampoline magic??? 1255: 1256: the following should work for shared I/D: */ 1257: 1258: /* lets see whether this works as trampoline: 1259: MV #STATIC, $4 0x940Y 0x0000 <- STATIC; Y = STATIC_CHAIN_REGNUM 1260: JMP FUNCTION 0x0058 0x0000 <- FUNCTION 1261: */ 1262: 1263: #define TRAMPOLINE_TEMPLATE(FILE) \ 1264: { \ 1265: if (TARGET_SPLIT) \ 1266: abort(); \ 1267: \ 1268: ASM_OUTPUT_INT (FILE, gen_rtx(CONST_INT, VOIDmode, 0x9400+STATIC_CHAIN_REGNUM)); \ 1269: ASM_OUTPUT_INT (FILE, const0_rtx); \ 1270: ASM_OUTPUT_INT (FILE, gen_rtx(CONST_INT, VOIDmode, 0x0058)); \ 1271: ASM_OUTPUT_INT (FILE, const0_rtx); \ 1272: } 1273: 1274: #define TRAMPOLINE_SIZE 8 1275: #define TRAMPOLINE_ALIGN 16 1276: 1277: /* Emit RTL insns to initialize the variable parts of a trampoline. 1278: FNADDR is an RTX for the address of the function's pure code. 1279: CXT is an RTX for the static chain value for the function. */ 1280: 1281: #define INITIALIZE_TRAMPOLINE(TRAMP,FNADDR,CXT) \ 1282: { \ 1283: if (TARGET_SPLIT) \ 1284: abort(); \ 1285: \ 1286: emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 2)), CXT); \ 1287: emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 6)), FNADDR); \ 1288: } 1289: 1290: 1291: /* Some machines may desire to change what optimizations are 1292: performed for various optimization levels. This macro, if 1293: defined, is executed once just after the optimization level is 1294: determined and before the remainder of the command options have 1295: been parsed. Values set in this macro are used as the default 1296: values for the other command line options. 1297: 1298: LEVEL is the optimization level specified; 2 if -O2 is 1299: specified, 1 if -O is specified, and 0 if neither is specified. */ 1300: 1301: #define OPTIMIZATION_OPTIONS(LEVEL) \ 1302: { \ 1303: if (LEVEL >= 3) \ 1304: { \ 1305: flag_inline_functions = 1; \ 1306: flag_omit_frame_pointer = 1; \ 1307: /* flag_unroll_loops = 1; */ \ 1308: } \ 1309: } 1310: 1311: 1312: /* Provide the costs of a rtl expression. This is in the body of a 1313: switch on CODE. 1314: 1315: we don't say how expensive SImode is - pretty expensive!!! 1316: 1317: there is something wrong in MULT because MULT is not 1318: as cheap as total = 2 even if we can shift! 1319: 1320: if TARGET_SPACE make mult etc cheap, but not 1, so when 1321: in doubt the faster insn is chosen. 1322: */ 1323: 1324: #define RTX_COSTS(X,CODE,OUTER_CODE) \ 1325: case MULT: \ 1326: if (TARGET_SPACE) \ 1327: total = COSTS_N_INSNS(2); \ 1328: else \ 1329: total = COSTS_N_INSNS (11); \ 1330: break; \ 1331: case DIV: \ 1332: if (TARGET_SPACE) \ 1333: total = COSTS_N_INSNS(2); \ 1334: else \ 1335: total = COSTS_N_INSNS (25); \ 1336: break; \ 1337: case MOD: \ 1338: if (TARGET_SPACE) \ 1339: total = COSTS_N_INSNS(2); \ 1340: else \ 1341: total = COSTS_N_INSNS (26); \ 1342: break; \ 1343: case ABS: \ 1344: /* equivalent to length, so same for TARGET_SPACE */ \ 1345: total = COSTS_N_INSNS (3); \ 1346: break; \ 1347: case ZERO_EXTEND: \ 1348: /* only used for: qi->hi */ \ 1349: total = COSTS_N_INSNS(1); \ 1350: break; \ 1351: case SIGN_EXTEND: \ 1352: if (GET_MODE(X) == HImode) \ 1353: total = COSTS_N_INSNS(1); \ 1354: else if (GET_MODE(X) == SImode) \ 1355: total = COSTS_N_INSNS(6); \ 1356: else \ 1.1.1.2 ! root 1357: total = COSTS_N_INSNS(2); \ 1.1 root 1358: break; \ 1359: /* case LSHIFT: */ \ 1360: case ASHIFT: \ 1361: case LSHIFTRT: \ 1362: case ASHIFTRT: \ 1363: if (TARGET_SPACE) \ 1364: total = COSTS_N_INSNS(1); \ 1365: else if (GET_MODE(X) == QImode) \ 1366: { \ 1367: if (GET_CODE(XEXP (X,1)) != CONST_INT) \ 1.1.1.2 ! root 1368: total = COSTS_N_INSNS(8); /* worst case */ \ ! 1369: else \ 1.1 root 1370: total = COSTS_N_INSNS(INTVAL(XEXP (X,1))); \ 1371: } \ 1372: else if (GET_MODE(X) == HImode) \ 1373: { \ 1374: if (GET_CODE(XEXP (X,1)) == CONST_INT) \ 1375: { \ 1376: if (abs (INTVAL (XEXP (X, 1))) == 1) \ 1377: total = COSTS_N_INSNS(1); \ 1378: else \ 1379: total = COSTS_N_INSNS(2.5 + 0.5 *INTVAL(XEXP(X,1))); \ 1380: } \ 1381: else /* worst case */ \ 1382: total = COSTS_N_INSNS (10); \ 1383: } \ 1384: else if (GET_MODE(X) == SImode) \ 1385: { \ 1386: if (GET_CODE(XEXP (X,1)) == CONST_INT) \ 1387: total = COSTS_N_INSNS(2.5 + 0.5 *INTVAL(XEXP(X,1))); \ 1388: else /* worst case */ \ 1389: total = COSTS_N_INSNS(18); \ 1390: } \ 1391: break; 1392: 1393: 1394: /* there is no point in avoiding branches on a pdp, 1395: since branches are really cheap - I just want to find out 1396: how much difference the BRANCH_COST macro makes in code */ 1397: #define BRANCH_COST (TARGET_BRANCH_CHEAP ? 0 : 1) 1398: 1399: 1400: #define COMPARE_FLAG_MODE HImode 1401:
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