--- gcc/config/romp.h	2018/04/24 17:54:25	1.1.1.2
+++ gcc/config/romp.h	2018/04/24 18:05:03	1.1.1.4
@@ -83,6 +83,9 @@ extern int target_flags;
       flag_force_mem = 1;		\
     }					\
 }
+
+/* Match <sys/types.h>'s definition.  */
+#define SIZE_TYPE "long int"
 
 /* target machine storage layout */
 
@@ -418,7 +421,7 @@ enum reg_class { NO_REGS, R0_REGS, R15_R
      && REGNO (OP) >= FIRST_PSEUDO_REGISTER		\
      && reg_renumber != 0				\
      && reg_renumber[REGNO (OP)] < 0)			\
-    || (memory_operand (OP, VOIDmode)			\
+    || (GET_CODE (OP) == MEM				\
         && ! symbolic_memory_operand (OP, VOIDmode)))	\
    : (C) == 'R' ? current_function_operand (OP, VOIDmode) \
    : (C) == 'S' ? constant_pool_address_operand (OP, VOIDmode) \
@@ -638,8 +641,9 @@ struct rt_cargs {int gregs, fregs; };
 
 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED)				\
   (! (NAMED) ? 0							\
-  : USE_FP_REG(MODE,CUM) ? gen_rtx(REG, (MODE),(CUM.fregs) + 17)	\
-  : (CUM).gregs < 4 ? gen_rtx(REG, (MODE), 2 + (CUM).gregs) : 0)
+   : ((TYPE) != 0 && TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST) ? 0	\
+   : USE_FP_REG(MODE,CUM) ? gen_rtx(REG, (MODE),(CUM.fregs) + 17)	\
+   : (CUM).gregs < 4 ? gen_rtx(REG, (MODE), 2 + (CUM).gregs) : 0)
 
 /* For an arg passed partly in registers and partly in memory,
    this is the number of registers used.
@@ -1222,22 +1226,38 @@ struct rt_cargs {int gregs, fregs; };
 #define NO_FUNCTION_CSE
 
 /* Define this if shift instructions ignore all but the low-order
-   few bits. */
-#define SHIFT_COUNT_TRUNCATED
+   few bits.
+
+   This is not true on the RT since it uses the low-order 6, not 5, bits.
+   At some point, this should be extended to see how to express that.  */
+
+/* #define SHIFT_COUNT_TRUNCATED */
 
-/* Compute the cost of computing a constant rtl expression RTX
-   whose rtx-code is CODE.  The body of this macro is a portion
-   of a switch statement.  If the code is computed here,
-   return it with a return statement.  Otherwise, break from the switch.  */
+/* Compute the cost of computing a constant rtl expression RTX whose
+   rtx-code is CODE, contained within an expression of code OUTER_CODE.
+   The body of this macro is a portion of a switch statement.  If the
+   code is computed here, return it with a return statement.  Otherwise,
+   break from the switch.  */
 
-#define CONST_COSTS(RTX,CODE) \
+#define CONST_COSTS(RTX,CODE,OUTER_CODE) \
   case CONST_INT:						\
-    return 0;							\
+    if ((OUTER_CODE) == IOR && exact_log2 (INTVAL (RTX)) >= 0	\
+	|| (OUTER_CODE) == AND && exact_log2 (~INTVAL (RTX)) >= 0 \
+	|| (((OUTER_CODE) == PLUS || (OUTER_CODE) == MINUS)	\
+	    && (unsigned int) (INTVAL (RTX) + 15) < 31)		\
+	|| ((OUTER_CODE) == SET && (unsigned int) INTVAL (RTX) < 16))\
+      return 0;							\
+    return ((unsigned int) (INTVAL(RTX) + 0x8000) < 0x10000		\
+	    || (INTVAL (RTX) & 0xffff0000) == 0) ? 0 : COSTS_N_INSNS (2);\
   case CONST:							\
   case LABEL_REF:						\
   case SYMBOL_REF:						\
+    if (current_function_operand (RTX, Pmode)) return 0;	\
+    return COSTS_N_INSNS (2);					\
   case CONST_DOUBLE:						\
-    return COSTS_N_INSNS (2);
+    if ((RTX) == CONST0_RTX (GET_MODE (RTX))) return 2;		\
+    return ((GET_MODE_CLASS (GET_MODE (RTX)) == MODE_FLOAT)	\
+	    ? COSTS_N_INSNS (5) : COSTS_N_INSNS (4));
 
 /* Provide the costs of a rtl expression.  This is in the body of a
    switch on CODE. 
@@ -1245,11 +1265,12 @@ struct rt_cargs {int gregs, fregs; };
    References to our own data area are really references to r14, so they
    are very cheap.  Multiples and divides are very expensive.  */
 
-#define RTX_COSTS(X,CODE)				\
+#define RTX_COSTS(X,CODE,OUTER_CODE)			\
   case MEM:						\
     return current_function_operand (X, Pmode) ? 0 : COSTS_N_INSNS (2);	\
   case MULT:						\
-    return TARGET_IN_LINE_MUL ? COSTS_N_INSNS (19) : COSTS_N_INSNS (25); \
+    return (TARGET_IN_LINE_MUL && GET_MODE_CLASS (GET_MODE (X)) == MODE_INT)\
+	   ? COSTS_N_INSNS (19) : COSTS_N_INSNS (25);	\
   case DIV:						\
   case UDIV:						\
   case MOD:						\
@@ -1322,9 +1343,16 @@ struct rt_cargs {int gregs, fregs; };
 
 #define ASM_FILE_START(FILE)				\
 { extern char *version_string;				\
+  char *p;						\
+							\
   fprintf (FILE, "\t.globl .oVncs\n\t.set .oVncs,0\n") ; \
-  fprintf (FILE, "\t.globl .oVgcc%s\n\t.set .oVgcc%s,0\n", \
-	   version_string, version_string);		\
+  fprintf (FILE, "\t.globl .oVgcc");			\
+  for (p = version_string; *p != ' ' && *p != 0; p++)	\
+    fprintf (FILE, "%c", *p);				\
+  fprintf (FILE, "\n\t.set .oVgcc");			\
+  for (p = version_string; *p != ' ' && *p != 0; p++)	\
+    fprintf (FILE, "%c", *p);				\
+  fprintf (FILE, ",0\n");				\
 }
 
 /* Output to assembler file text saying following lines