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1.1 root 1: /* Definitions of target machine for GNU compiler, for ROMP chip.
2: Copyright (C) 1989, 1991 Free Software Foundation, Inc.
3: Contributed by Richard Kenner ([email protected])
4:
5: This file is part of GNU CC.
6:
7: GNU CC is free software; you can redistribute it and/or modify
8: it under the terms of the GNU General Public License as published by
9: the Free Software Foundation; either version 2, or (at your option)
10: any later version.
11:
12: GNU CC is distributed in the hope that it will be useful,
13: but WITHOUT ANY WARRANTY; without even the implied warranty of
14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15: GNU General Public License for more details.
16:
17: You should have received a copy of the GNU General Public License
18: along with GNU CC; see the file COPYING. If not, write to
19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20:
21:
22: /* Names to predefine in the preprocessor for this target machine. */
23:
24: #define CPP_PREDEFINES "-Dibm032 -Dunix"
25:
26: /* Print subsidiary information on the compiler version in use. */
27: #define TARGET_VERSION ;
28:
29: /* Add -lfp_p when running with -p or -pg. */
30: #define LIB_SPEC "%{pg:-lfp_p}%{p:-lfp_p} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
31:
32: /* Run-time compilation parameters selecting different hardware subsets. */
33:
34: /* Flag to generate all multiplies as an in-line sequence of multiply-step
35: insns instead of calling a library routine. */
36: #define TARGET_IN_LINE_MUL (target_flags & 1)
37:
38: /* Flag to generate padded floating-point data blocks. Otherwise, we generate
39: them the minimum size. This trades off execution speed against size. */
40: #define TARGET_FULL_FP_BLOCKS (target_flags & 2)
41:
42: /* Flag to pass and return floating point values in floating point registers.
43: Since this violates the linkage convention, we feel free to destroy fr2
44: and fr3 on function calls.
45: fr1-fr3 are used to pass the arguments. */
46: #define TARGET_FP_REGS (target_flags & 4)
47:
48: /* Flag to return structures of more than one word in memory. This is for
49: compatibility with the MetaWare HighC (hc) compiler. */
50: #define TARGET_HC_STRUCT_RETURN (target_flags & 010)
51:
52: extern int target_flags;
53:
54: /* Macro to define tables used to set the flags.
55: This is a list in braces of pairs in braces,
56: each pair being { "NAME", VALUE }
57: where VALUE is the bits to set or minus the bits to clear.
58: An empty string NAME is used to identify the default VALUE. */
59:
60: #define TARGET_SWITCHES \
61: { {"in-line-mul", 1}, \
62: {"call-lib-mul", -1}, \
63: {"full-fp-blocks", 2}, \
64: {"minimum-fp-blocks", -2}, \
65: {"fp-arg-in-fpregs", 4}, \
66: {"fp-arg-in-gregs", -4}, \
67: {"hc-struct-return", 010}, \
68: {"nohc-struct-return", - 010}, \
69: { "", TARGET_DEFAULT}}
70:
71: #define TARGET_DEFAULT 3
72:
1.1.1.2 root 73: /* Define this to change the optimizations performed by default.
1.1 root 74:
75: This used to depend on the value of write_symbols,
76: but that is contrary to the general plan for GCC options. */
77:
78: #define OPTIMIZATION_OPTIONS(LEVEL) \
79: { \
80: if ((LEVEL) > 0) \
81: { \
82: flag_force_addr = 1; \
83: flag_force_mem = 1; \
84: } \
85: }
1.1.1.4 ! root 86:
! 87: /* Match <sys/types.h>'s definition. */
! 88: #define SIZE_TYPE "long int"
1.1 root 89:
90: /* target machine storage layout */
91:
92: /* Define this if most significant bit is lowest numbered
93: in instructions that operate on numbered bit-fields. */
94: /* That is true on ROMP. */
95: #define BITS_BIG_ENDIAN 1
96:
97: /* Define this if most significant byte of a word is the lowest numbered. */
98: /* That is true on ROMP. */
99: #define BYTES_BIG_ENDIAN 1
100:
101: /* Define this if most significant word of a multiword number is lowest
102: numbered.
103:
104: For ROMP we can decide arbitrarily since there are no machine instructions
105: for them. Might as well be consistent with bits and bytes. */
106: #define WORDS_BIG_ENDIAN 1
107:
1.1.1.2 root 108: /* number of bits in an addressable storage unit */
1.1 root 109: #define BITS_PER_UNIT 8
110:
111: /* Width in bits of a "word", which is the contents of a machine register.
112: Note that this is not necessarily the width of data type `int';
113: if using 16-bit ints on a 68000, this would still be 32.
114: But on a machine with 16-bit registers, this would be 16. */
115: #define BITS_PER_WORD 32
116:
117: /* Width of a word, in units (bytes). */
118: #define UNITS_PER_WORD 4
119:
120: /* Width in bits of a pointer.
121: See also the macro `Pmode' defined below. */
122: #define POINTER_SIZE 32
123:
124: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
125: #define PARM_BOUNDARY 32
126:
127: /* Boundary (in *bits*) on which stack pointer should be aligned. */
128: #define STACK_BOUNDARY 32
129:
130: /* Allocation boundary (in *bits*) for the code of a function. */
131: #define FUNCTION_BOUNDARY 16
132:
133: /* No data type wants to be aligned rounder than this. */
134: #define BIGGEST_ALIGNMENT 32
135:
136: /* Alignment of field after `int : 0' in a structure. */
137: #define EMPTY_FIELD_BOUNDARY 32
138:
139: /* Every structure's size must be a multiple of this. */
140: #define STRUCTURE_SIZE_BOUNDARY 8
141:
142: /* A bitfield declared as `int' forces `int' alignment for the struct. */
143: #define PCC_BITFIELD_TYPE_MATTERS 1
144:
145: /* Make strings word-aligned so strcpy from constants will be faster. */
146: #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
147: (TREE_CODE (EXP) == STRING_CST \
148: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
149:
150: /* Make arrays of chars word-aligned for the same reasons. */
151: #define DATA_ALIGNMENT(TYPE, ALIGN) \
152: (TREE_CODE (TYPE) == ARRAY_TYPE \
153: && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
154: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
155:
1.1.1.2 root 156: /* Set this nonzero if move instructions will actually fail to work
1.1 root 157: when given unaligned data. */
1.1.1.2 root 158: #define STRICT_ALIGNMENT 1
1.1 root 159:
160: /* Standard register usage. */
161:
162: /* Number of actual hardware registers.
163: The hardware registers are assigned numbers for the compiler
164: from 0 to just below FIRST_PSEUDO_REGISTER.
165: All registers that the compiler knows about must be given numbers,
166: even those that are not normally considered general registers.
167:
168: ROMP has 16 fullword registers and 8 floating point registers.
169:
170: In addition, the difference between the frame and argument pointers is
171: a function of the number of registers saved, so we need to have a register
172: to use for AP that will later be eliminated in favor of sp or fp. This is
173: a normal register, but it is fixed. */
174:
175: #define FIRST_PSEUDO_REGISTER 25
176:
177: /* 1 for registers that have pervasive standard uses
178: and are not available for the register allocator.
179:
180: On ROMP, r1 is used for the stack and r14 is used for a
181: data area pointer.
182:
183: HACK WARNING: On the RT, there is a bug in code generation for
184: the MC68881 when the first and third operands are the same floating-point
185: register. See the definition of the FINAL_PRESCAN_INSN macro for details.
186: Here we need to reserve fr0 for this purpose. */
187: #define FIXED_REGISTERS \
188: {0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
189: 1, \
190: 1, 0, 0, 0, 0, 0, 0, 0}
191:
192: /* 1 for registers not available across function calls.
193: These must include the FIXED_REGISTERS and also any
194: registers that can be used without being saved.
195: The latter must include the registers where values are returned
196: and the register where structure-value addresses are passed.
197: Aside from that, you can include as many other registers as you like. */
198: #define CALL_USED_REGISTERS \
199: {1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
200: 1, \
201: 1, 1, 0, 0, 0, 0, 0, 0}
202:
203: /* List the order in which to allocate registers. Each register must be
204: listed once, even those in FIXED_REGISTERS.
205:
206: We allocate in the following order:
207: fr0, fr1 (not saved)
208: fr2 ... fr6
209: fr7 (more expensive for some FPA's)
210: r0 (not saved and won't conflict with parameter register)
211: r4, r3, r2 (not saved, highest used first to make less conflict)
212: r5 (not saved, but forces r6 to be saved if DI/DFmode)
213: r15, r14, r13, r12, r11, r10, r9, r8, r7, r6 (less to save)
214: r1, ap */
215:
216: #define REG_ALLOC_ORDER \
217: {17, 18, \
218: 19, 20, 21, 22, 23, \
219: 24, \
220: 0, \
221: 4, 3, 2, \
222: 5, \
223: 15, 14, 13, 12, 11, 10, \
224: 9, 8, 7, 6, \
225: 1, 16}
226:
227: /* True if register is floating-point. */
228: #define FP_REGNO_P(N) ((N) >= 17)
229:
230: /* Return number of consecutive hard regs needed starting at reg REGNO
231: to hold something of mode MODE.
232: This is ordinarily the length in words of a value of mode MODE
233: but can be less for certain modes in special long registers.
234:
235: On ROMP, ordinary registers hold 32 bits worth;
236: a single floating point register is always enough for
237: anything that can be stored in them at all. */
238: #define HARD_REGNO_NREGS(REGNO, MODE) \
239: (FP_REGNO_P (REGNO) ? GET_MODE_NUNITS (MODE) \
240: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
241:
242: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
243: On ROMP, the cpu registers can hold any mode but the float registers
244: can hold only floating point. */
245: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
246: (! FP_REGNO_P (REGNO) || GET_MODE_CLASS (MODE) == MODE_FLOAT \
247: || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT)
248:
249: /* Value is 1 if it is a good idea to tie two pseudo registers
250: when one has mode MODE1 and one has mode MODE2.
251: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
252: for any hard reg, then this must be 0 for correct output. */
253: #define MODES_TIEABLE_P(MODE1, MODE2) \
254: ((GET_MODE_CLASS (MODE1) == MODE_FLOAT \
255: || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
256: == (GET_MODE_CLASS (MODE2) == MODE_FLOAT \
257: || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
258:
259: /* A C expression returning the cost of moving data from a register of class
260: CLASS1 to one of CLASS2.
261:
262: On the ROMP, access to floating-point registers is expensive (even between
263: two FP regs.) */
264: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
265: (2 + 10 * ((CLASS1) == FP_REGS) + 10 * (CLASS2 == FP_REGS))
266:
267: /* Specify the registers used for certain standard purposes.
268: The values of these macros are register numbers. */
269:
270: /* ROMP pc isn't overloaded on a register that the compiler knows about. */
271: /* #define PC_REGNUM */
272:
273: /* Register to use for pushing function arguments. */
274: #define STACK_POINTER_REGNUM 1
275:
276: /* Base register for access to local variables of the function. */
277: #define FRAME_POINTER_REGNUM 13
278:
279: /* Value should be nonzero if functions must have frame pointers.
280: Zero means the frame pointer need not be set up (and parms
281: may be accessed via the stack pointer) in functions that seem suitable.
282: This is computed in `reload', in reload1.c. */
283: #define FRAME_POINTER_REQUIRED 0
284:
285: /* Base register for access to arguments of the function. */
286: #define ARG_POINTER_REGNUM 16
287:
288: /* Place to put static chain when calling a function that requires it. */
289: #define STATIC_CHAIN \
290: gen_rtx (MEM, Pmode, gen_rtx (PLUS, Pmode, stack_pointer_rtx, \
291: gen_rtx (CONST_INT, VOIDmode, -36)))
292:
293: /* Place where static chain is found upon entry to routine. */
294: #define STATIC_CHAIN_INCOMING \
295: gen_rtx (MEM, Pmode, gen_rtx (PLUS, Pmode, arg_pointer_rtx, \
296: gen_rtx (CONST_INT, VOIDmode, -20)))
297:
298: /* Place that structure value return address is placed.
299:
300: On the ROMP, it is passed as an extra parameter. */
301: #define STRUCT_VALUE 0
302:
303: /* Define the classes of registers for register constraints in the
304: machine description. Also define ranges of constants.
305:
306: One of the classes must always be named ALL_REGS and include all hard regs.
307: If there is more than one class, another class must be named NO_REGS
308: and contain no registers.
309:
310: The name GENERAL_REGS must be the name of a class (or an alias for
311: another name such as ALL_REGS). This is the class of registers
312: that is allowed by "g" or "r" in a register constraint.
313: Also, registers outside this class are allocated only when
314: instructions express preferences for them.
315:
316: The classes must be numbered in nondecreasing order; that is,
317: a larger-numbered class must never be contained completely
318: in a smaller-numbered class.
319:
320: For any two classes, it is very desirable that there be another
321: class that represents their union. */
322:
323: /* The ROMP has two types of registers, general and floating-point.
324:
325: However, r0 is special in that it cannot be used as a base register.
326: So make a class for registers valid as base registers.
327:
328: For floating-point support, add classes that just consist of r0 and
329: r15, respectively. */
330:
331: enum reg_class { NO_REGS, R0_REGS, R15_REGS, BASE_REGS, GENERAL_REGS,
332: FP_REGS, ALL_REGS, LIM_REG_CLASSES };
333:
334: #define N_REG_CLASSES (int) LIM_REG_CLASSES
335:
336: /* Give names of register classes as strings for dump file. */
337:
338: #define REG_CLASS_NAMES \
339: {"NO_REGS", "R0_REGS", "R15_REGS", "BASE_REGS", "GENERAL_REGS", \
340: "FP_REGS", "ALL_REGS" }
341:
342: /* Define which registers fit in which classes.
343: This is an initializer for a vector of HARD_REG_SET
344: of length N_REG_CLASSES. */
345:
346: #define REG_CLASS_CONTENTS {0, 0x00001, 0x08000, 0x1fffe, 0x1ffff, \
347: 0x1fe0000, 0x1ffffff }
348:
349: /* The same information, inverted:
350: Return the class number of the smallest class containing
351: reg number REGNO. This could be a conditional expression
352: or could index an array. */
353:
354: #define REGNO_REG_CLASS(REGNO) \
355: ((REGNO) == 0 ? GENERAL_REGS : FP_REGNO_P (REGNO) ? FP_REGS : BASE_REGS)
356:
357: /* The class value for index registers, and the one for base regs. */
358: #define INDEX_REG_CLASS BASE_REGS
359: #define BASE_REG_CLASS BASE_REGS
360:
361: /* Get reg_class from a letter such as appears in the machine description. */
362:
363: #define REG_CLASS_FROM_LETTER(C) \
364: ((C) == 'f' ? FP_REGS \
365: : (C) == 'b' ? BASE_REGS \
366: : (C) == 'z' ? R0_REGS \
367: : (C) == 't' ? R15_REGS \
368: : NO_REGS)
369:
370: /* The letters I, J, K, L, M, N, and P in a register constraint string
371: can be used to stand for particular ranges of immediate operands.
372: This macro defines what the ranges are.
373: C is the letter, and VALUE is a constant value.
374: Return 1 if VALUE is in the range specified by C.
375:
376: `I' is constants less than 16
377: `J' is negative constants greater than -16
378: `K' is the range for a normal D insn.
379: `L' is a constant with only the low-order 16 bits set
380: `M' is a constant with only the high-order 16 bits set
381: `N' is a single-bit constant
382: `O' is a constant with either the high-order or low-order 16 bits all ones
383: `P' is the complement of a single-bit constant
384: */
385:
386: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
387: ( (C) == 'I' ? (unsigned) (VALUE) < 0x10 \
388: : (C) == 'J' ? (VALUE) < 0 && (VALUE) > -16 \
389: : (C) == 'K' ? (unsigned) ((VALUE) + 0x8000) < 0x10000 \
390: : (C) == 'L' ? ((VALUE) & 0xffff0000) == 0 \
391: : (C) == 'M' ? ((VALUE) & 0xffff) == 0 \
392: : (C) == 'N' ? exact_log2 (VALUE) >= 0 \
393: : (C) == 'O' ? ((VALUE) & 0xffff) == 0xffff \
394: || ((VALUE) & 0xffff0000) == 0xffff0000 \
395: : (C) == 'P' ? exact_log2 (~ (VALUE)) >= 0 \
396: : 0)
397:
398: /* Similar, but for floating constants, and defining letters G and H.
399: Here VALUE is the CONST_DOUBLE rtx itself.
400: No floating-point constants on ROMP. */
401:
402: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 0
403:
404: /* Optional extra constraints for this machine.
405:
406: For the ROMP, `Q' means that this is a memory operand but not a symbolic
407: memory operand. Note that an unassigned pseudo register is such a
408: memory operand. If register allocation has not been done, we reject
409: pseudos, since we assume (hope) that they will get hard registers.
410:
411: `R' means that this is a constant pool reference to the current function.
412: This is just r14 and so can be treated as a register. We bother with this
413: just in move insns as that is the only place it is likely to occur.
414:
415: `S' means that this is the address of a constant pool location. This is
416: equal to r14 plus a constant. We also only check for this in move insns. */
417:
418: #define EXTRA_CONSTRAINT(OP, C) \
419: ((C) == 'Q' ? \
420: ((GET_CODE (OP) == REG \
421: && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
422: && reg_renumber != 0 \
423: && reg_renumber[REGNO (OP)] < 0) \
1.1.1.4 ! root 424: || (GET_CODE (OP) == MEM \
1.1 root 425: && ! symbolic_memory_operand (OP, VOIDmode))) \
426: : (C) == 'R' ? current_function_operand (OP, VOIDmode) \
427: : (C) == 'S' ? constant_pool_address_operand (OP, VOIDmode) \
428: : 0)
429:
430: /* Given an rtx X being reloaded into a reg required to be
431: in class CLASS, return the class of reg to actually use.
432: In general this is just CLASS; but on some machines
433: in some cases it is preferable to use a more restrictive class.
434:
435: For the ROMP, if X is a memory reference that involves a symbol,
436: we must use a BASE_REGS register instead of GENERAL_REGS
437: to do the reload. The argument of MEM be either REG, PLUS, or SYMBOL_REF
438: to be valid, so we assume that this is the case.
439:
440: Also, if X is an integer class, ensure that floating-point registers
441: aren't used. */
442:
443: #define PREFERRED_RELOAD_CLASS(X,CLASS) \
444: ((CLASS) == FP_REGS && GET_MODE_CLASS (GET_MODE (X)) == MODE_INT \
445: ? GENERAL_REGS : \
446: (CLASS) != GENERAL_REGS ? (CLASS) : \
447: GET_CODE (X) != MEM ? GENERAL_REGS : \
448: GET_CODE (XEXP (X, 0)) == SYMBOL_REF ? BASE_REGS : \
449: GET_CODE (XEXP (X, 0)) == LABEL_REF ? BASE_REGS : \
450: GET_CODE (XEXP (X, 0)) == CONST ? BASE_REGS : \
451: GET_CODE (XEXP (X, 0)) == REG ? GENERAL_REGS : \
452: GET_CODE (XEXP (X, 0)) != PLUS ? GENERAL_REGS : \
453: GET_CODE (XEXP (XEXP (X, 0), 1)) == SYMBOL_REF ? BASE_REGS : \
454: GET_CODE (XEXP (XEXP (X, 0), 1)) == LABEL_REF ? BASE_REGS : \
455: GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST ? BASE_REGS : GENERAL_REGS)
456:
457: /* Return the register class of a scratch register needed to store into
458: OUT from a register of class CLASS in MODE.
459:
460: On the ROMP, we cannot store into a symbolic memory address from an
461: integer register; we need a BASE_REGS register as a scratch to do it. */
462:
463: #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) \
464: (GET_MODE_CLASS (MODE) == MODE_INT && symbolic_memory_operand (OUT, MODE) \
465: ? BASE_REGS : NO_REGS)
466:
467: /* Return the maximum number of consecutive registers
468: needed to represent mode MODE in a register of class CLASS.
469:
470: On ROMP, this is the size of MODE in words,
471: except in the FP regs, where a single reg is always enough. */
472: #define CLASS_MAX_NREGS(CLASS, MODE) \
473: ((CLASS) == FP_REGS ? 1 \
474: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
475:
476: /* Stack layout; function entry, exit and calling. */
477:
478: /* Define this if pushing a word on the stack
479: makes the stack pointer a smaller address. */
480: #define STACK_GROWS_DOWNWARD
481:
482: /* Define this if the nominal address of the stack frame
483: is at the high-address end of the local variables;
484: that is, each additional local variable allocated
485: goes at a more negative offset in the frame. */
486: #define FRAME_GROWS_DOWNWARD
487:
488: /* Offset within stack frame to start allocating local variables at.
489: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
490: first local allocated. Otherwise, it is the offset to the BEGINNING
491: of the first local allocated.
492: On the ROMP, if we set the frame pointer to 15 words below the highest
493: address of the highest local variable, the first 16 words will be
494: addressable via D-short insns. */
495: #define STARTING_FRAME_OFFSET 64
496:
497: /* If we generate an insn to push BYTES bytes,
498: this says how many the stack pointer really advances by.
499: On ROMP, don't define this because there are no push insns. */
500: /* #define PUSH_ROUNDING(BYTES) */
501:
502: /* Offset of first parameter from the argument pointer register value.
503: On the ROMP, we define the argument pointer to the start of the argument
504: area. */
505: #define FIRST_PARM_OFFSET(FNDECL) 0
506:
507: /* Define this if stack space is still allocated for a parameter passed
508: in a register. The value is the number of bytes. */
509: #define REG_PARM_STACK_SPACE(FNDECL) 16
510:
511: /* This is the difference between the logical top of stack and the actual sp.
512:
513: For the ROMP, sp points past the words allocated for the first four outgoing
514: arguments (they are part of the callee's frame). */
515: #define STACK_POINTER_OFFSET -16
516:
517: /* Define this if the maximum size of all the outgoing args is to be
518: accumulated and pushed during the prologue. The amount can be
519: found in the variable current_function_outgoing_args_size. */
520: #define ACCUMULATE_OUTGOING_ARGS
521:
522: /* Value is the number of bytes of arguments automatically
523: popped when returning from a subroutine call.
524: FUNTYPE is the data type of the function (as a tree),
525: or for a library call it is an identifier node for the subroutine name.
526: SIZE is the number of bytes of arguments passed on the stack. */
527:
528: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
529:
530: /* Define how to find the value returned by a function.
531: VALTYPE is the data type of the value (as a tree).
532: If the precise function being called is known, FUNC is its FUNCTION_DECL;
533: otherwise, FUNC is 0.
534:
535: On ROMP the value is found in r2, unless the machine specific option
536: fp-arg-in-fpregs is selected, in which case FP return values are in fr1 */
537:
538: #define FUNCTION_VALUE(VALTYPE, FUNC) \
539: gen_rtx (REG, TYPE_MODE (VALTYPE), \
540: (TARGET_FP_REGS && \
541: GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_FLOAT) ? 18 : 2)
542:
543: /* Define how to find the value returned by a library function
544: assuming the value has mode MODE. */
545:
546: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 2)
547:
548: /* The definition of this macro implies that there are cases where
549: a scalar value cannot be returned in registers.
550:
551: For the ROMP, if compatibility with HC is required, anything of
552: type DImode is returned in memory. */
553:
554: #define RETURN_IN_MEMORY(type) \
555: (TARGET_HC_STRUCT_RETURN && TYPE_MODE (type) == DImode)
556:
557: /* 1 if N is a possible register number for a function value
558: as seen by the caller.
559:
560: On ROMP, r2 is the only register thus used unless fp values are to be
561: returned in fp regs, in which case fr1 is also used. */
562:
563: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || ((N) == 18 && TARGET_FP_REGS))
564:
565: /* 1 if N is a possible register number for function argument passing.
566: On ROMP, these are r2-r5 (and fr1-fr4 if fp regs are used). */
567:
568: #define FUNCTION_ARG_REGNO_P(N) \
569: (((N) <= 5 && (N) >= 2) || (TARGET_FP_REGS && (N) > 17 && (N) < 21))
570:
571: /* Define a data type for recording info about an argument list
572: during the scan of that argument list. This data type should
573: hold all necessary information about the function itself
574: and about the args processed so far, enough to enable macros
575: such as FUNCTION_ARG to determine where the next arg should go.
576:
577: On the ROMP, this is a structure. The first word is the number of
578: words of (integer only if -mfp-arg-in-fpregs is specified) arguments
579: scanned so far (including the invisible argument, if any, which holds
580: the structure-value-address). The second word hold the corresponding
581: value for floating-point arguments, except that both single and double
582: count as one register. */
583:
584: struct rt_cargs {int gregs, fregs; };
585: #define CUMULATIVE_ARGS struct rt_cargs
586:
587: #define USE_FP_REG(MODE,CUM) \
588: (TARGET_FP_REGS && GET_MODE_CLASS (MODE) == MODE_FLOAT \
589: && (CUM).fregs < 3)
590:
591: /* Define intermediate macro to compute the size (in registers) of an argument
592: for the ROMP. */
593:
594: #define ROMP_ARG_SIZE(MODE, TYPE, NAMED) \
595: (! (NAMED) ? 0 \
596: : (MODE) != BLKmode \
597: ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \
598: : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
599:
600: /* Initialize a variable CUM of type CUMULATIVE_ARGS
601: for a call to a function whose data type is FNTYPE.
602: For a library call, FNTYPE is 0.
603:
604: On ROMP, the offset normally starts at 0, but starts at 4 bytes
605: when the function gets a structure-value-address as an
606: invisible first argument. */
607:
608: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
609: (CUM).gregs = 0, \
610: (CUM).fregs = 0
611:
612: /* Update the data in CUM to advance over an argument
613: of mode MODE and data type TYPE.
614: (TYPE is null for libcalls where that information may not be available.) */
615:
616: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
617: { if (NAMED) \
618: { \
619: if (USE_FP_REG(MODE, CUM)) \
620: (CUM).fregs++; \
621: else \
622: (CUM).gregs += ROMP_ARG_SIZE (MODE, TYPE, NAMED); \
623: } \
624: }
625:
626: /* Determine where to put an argument to a function.
627: Value is zero to push the argument on the stack,
628: or a hard register in which to store the argument.
629:
630: MODE is the argument's machine mode.
631: TYPE is the data type of the argument (as a tree).
632: This is null for libcalls where that information may
633: not be available.
634: CUM is a variable of type CUMULATIVE_ARGS which gives info about
635: the preceding args and about the function being called.
636: NAMED is nonzero if this argument is a named parameter
637: (otherwise it is an extra parameter matching an ellipsis).
638:
639: On ROMP the first four words of args are normally in registers
640: and the rest are pushed. */
641:
642: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
643: (! (NAMED) ? 0 \
1.1.1.3 root 644: : ((TYPE) != 0 && TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST) ? 0 \
645: : USE_FP_REG(MODE,CUM) ? gen_rtx(REG, (MODE),(CUM.fregs) + 17) \
646: : (CUM).gregs < 4 ? gen_rtx(REG, (MODE), 2 + (CUM).gregs) : 0)
1.1 root 647:
648: /* For an arg passed partly in registers and partly in memory,
649: this is the number of registers used.
650: For args passed entirely in registers or entirely in memory, zero. */
651:
652: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
653: (! (NAMED) ? 0 \
654: : USE_FP_REG(MODE,CUM) ? 0 \
655: : (((CUM).gregs < 4 \
656: && 4 < ((CUM).gregs + ROMP_ARG_SIZE (MODE, TYPE, NAMED))) \
657: ? 4 - (CUM).gregs : 0))
658:
659: /* Perform any needed actions needed for a function that is receiving a
660: variable number of arguments.
661:
662: CUM is as above.
663:
664: MODE and TYPE are the mode and type of the current parameter.
665:
666: PRETEND_SIZE is a variable that should be set to the amount of stack
667: that must be pushed by the prolog to pretend that our caller pushed
668: it.
669:
670: Normally, this macro will push all remaining incoming registers on the
671: stack and set PRETEND_SIZE to the length of the registers pushed. */
672:
673: #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
674: { if (TARGET_FP_REGS) \
675: error ("can't have varargs with -mfp-arg-in-fp-regs"); \
676: else if ((CUM).gregs < 4) \
677: { \
678: int first_reg_offset = (CUM).gregs; \
679: \
680: if (MUST_PASS_IN_STACK (MODE, TYPE)) \
681: first_reg_offset += ROMP_ARG_SIZE (TYPE_MODE (TYPE), TYPE, 1); \
682: \
683: if (first_reg_offset > 4) \
684: first_reg_offset = 4; \
685: \
686: if (! NO_RTL && first_reg_offset != 4) \
687: move_block_from_reg \
688: (2 + first_reg_offset, \
689: gen_rtx (MEM, BLKmode, \
690: plus_constant (virtual_incoming_args_rtx, \
691: first_reg_offset * 4)), \
692: 4 - first_reg_offset); \
693: PRETEND_SIZE = (4 - first_reg_offset) * UNITS_PER_WORD; \
694: } \
695: }
696:
697: /* This macro produces the initial definition of a function name.
698: On the ROMP, we need to place an extra '.' in the function name. */
699:
700: #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
701: { if (TREE_PUBLIC(DECL)) \
702: fprintf (FILE, "\t.globl _.%s\n", NAME); \
703: fprintf (FILE, "_.%s:\n", NAME); \
704: }
705:
706: /* This macro is used to output the start of the data area.
707:
708: On the ROMP, the _name is a pointer to the data area. At that
709: location is the address of _.name, which is really the name of
710: the function. We need to set all this up here.
711:
712: The global declaration of the data area, if needed, is done in
713: `assemble_function', where it thinks it is globalizing the function
714: itself. */
715:
716: #define ASM_OUTPUT_POOL_PROLOGUE(FILE, NAME, DECL, SIZE) \
717: { extern int data_offset; \
718: data_section (); \
719: fprintf (FILE, "\t.align 2\n"); \
720: ASM_OUTPUT_LABEL (FILE, NAME); \
721: fprintf (FILE, "\t.long _.%s, 0, ", NAME); \
722: if (current_function_calls_alloca) \
723: fprintf (FILE, "0x%x\n", \
724: 0xf6900000 + current_function_outgoing_args_size); \
725: else \
726: fprintf (FILE, "0\n"); \
727: data_offset = ((SIZE) + 12 + 3) / 4; \
728: }
729:
730: /* Select section for constant in constant pool.
731:
732: On ROMP, all constants are in the data area. */
733:
734: #define SELECT_RTX_SECTION(MODE, X) data_section ()
735:
736: /* This macro generates the assembly code for function entry.
737: FILE is a stdio stream to output the code to.
738: SIZE is an int: how many units of temporary storage to allocate.
739: Refer to the array `regs_ever_live' to determine which registers
740: to save; `regs_ever_live[I]' is nonzero if register number I
741: is ever used in the function. This macro is responsible for
742: knowing which registers should not be saved even if used. */
743:
744: #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE)
745:
746: /* Output assembler code to FILE to increment profiler label # LABELNO
747: for profiling a function entry. */
748:
749: #define FUNCTION_PROFILER(FILE, LABELNO) \
750: fprintf(FILE, "\tcas r0,r15,r0\n\tbali r15,mcount\n");
751:
752: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
753: the stack pointer does not matter. The value is tested only in
754: functions that have frame pointers.
755: No definition is equivalent to always zero. */
756: /* #define EXIT_IGNORE_STACK 1 */
757:
758: /* This macro generates the assembly code for function exit,
759: on machines that need it. If FUNCTION_EPILOGUE is not defined
760: then individual return instructions are generated for each
761: return statement. Args are same as for FUNCTION_PROLOGUE.
762:
763: The function epilogue should not depend on the current stack pointer!
764: It should use the frame pointer only. This is mandatory because
765: of alloca; we also take advantage of it to omit stack adjustments
766: before returning. */
767:
768: #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE)
769:
770: /* Output assembler code for a block containing the constant parts
771: of a trampoline, leaving space for the variable parts.
772:
773: The trampoline should set the static chain pointer to value placed
774: into the trampoline and should branch to the specified routine.
775:
776: On the ROMP, we have a problem. There are no free registers to use
777: to construct the static chain and function addresses. Hence we use
778: the following kludge: r15 (the return address) is first saved in mq.
779: Then we use r15 to form the function address. We then branch to the
780: function and restore r15 in the delay slot. This makes it appear that
781: the function was called directly from the caller.
782:
783: (Note that the function address built is actually that of the data block.
784: This is passed in r0 and the actual routine address is loaded into r15.)
785:
786: In addition, note that the address of the "called function", in this case
787: the trampoline, is actually the address of the data area. So we need to
788: make a fake data area that will contain the address of the trampoline.
789: Note that this must be defined as two half-words, since the trampoline
790: template (as opposed to the trampoline on the stack) is only half-word
791: aligned. */
792:
793: #define TRAMPOLINE_TEMPLATE(FILE) \
794: { \
795: fprintf (FILE, "\t.short 0,0\n"); \
796: fprintf (FILE, "\tcau r0,0(r0)\n"); \
797: fprintf (FILE, "\toil r0,r0,0\n"); \
798: fprintf (FILE, "\tmts r10,r15\n"); \
799: fprintf (FILE, "\tst r0,-36(r1)\n"); \
800: fprintf (FILE, "\tcau r15,0(r0)\n"); \
801: fprintf (FILE, "\toil r15,r15,0\n"); \
802: fprintf (FILE, "\tcas r0,r15,r0\n"); \
803: fprintf (FILE, "\tls r15,0(r15)\n"); \
804: fprintf (FILE, "\tbrx r15\n"); \
805: fprintf (FILE, "\tmfs r10,r15\n"); \
806: }
807:
808: /* Length in units of the trampoline for entering a nested function. */
809:
810: #define TRAMPOLINE_SIZE 36
811:
812: /* Emit RTL insns to initialize the variable parts of a trampoline.
813: FNADDR is an RTX for the address of the function's pure code.
814: CXT is an RTX for the static chain value for the function.
815:
816: On the RT, the static chain and function addresses are written in
817: two 16-bit sections.
818:
819: We also need to write the address of the first instruction in
820: the trampoline into the first word of the trampoline to simulate a
821: data area. */
822:
823: #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
824: { \
825: rtx _addr, _temp; \
826: rtx _val; \
827: \
828: _temp = expand_binop (SImode, add_optab, ADDR, \
829: gen_rtx (CONST_INT, VOIDmode, 4), \
830: 0, 1, OPTAB_LIB_WIDEN); \
831: emit_move_insn (gen_rtx (MEM, SImode, \
832: memory_address (SImode, ADDR)), _temp); \
833: \
834: _val = force_reg (SImode, CXT); \
835: _addr = memory_address (HImode, plus_constant (ADDR, 10)); \
836: emit_move_insn (gen_rtx (MEM, HImode, _addr), \
837: gen_lowpart (HImode, _val)); \
838: _temp = expand_shift (RSHIFT_EXPR, SImode, _val, \
839: build_int_2 (16, 0), 0, 1); \
840: _addr = memory_address (HImode, plus_constant (ADDR, 6)); \
841: emit_move_insn (gen_rtx (MEM, HImode, _addr), \
842: gen_lowpart (HImode, _temp)); \
843: \
844: _val = force_reg (SImode, FNADDR); \
845: _addr = memory_address (HImode, plus_constant (ADDR, 24)); \
846: emit_move_insn (gen_rtx (MEM, HImode, _addr), \
847: gen_lowpart (HImode, _val)); \
848: _temp = expand_shift (RSHIFT_EXPR, SImode, _val, \
849: build_int_2 (16, 0), 0, 1); \
850: _addr = memory_address (HImode, plus_constant (ADDR, 20)); \
851: emit_move_insn (gen_rtx (MEM, HImode, _addr), \
852: gen_lowpart (HImode, _temp)); \
853: \
854: }
855:
856: /* Definitions for register eliminations.
857:
858: We have two registers that can be eliminated on the ROMP. First, the
859: frame pointer register can often be eliminated in favor of the stack
860: pointer register. Secondly, the argument pointer register can always be
861: eliminated; it is replaced with either the stack or frame pointer.
862:
863: In addition, we use the elimination mechanism to see if r14 is needed.
864: Initially we assume that it isn't. If it is, we spill it. This is done
865: by making it an eliminable register. It doesn't matter what we replace
866: it with, since it will never occur in the rtl at this point. */
867:
868: /* This is an array of structures. Each structure initializes one pair
869: of eliminable registers. The "from" register number is given first,
870: followed by "to". Eliminations of the same "from" register are listed
871: in order of preference. */
872: #define ELIMINABLE_REGS \
873: {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
874: { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
875: { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
876: { 14, 0}}
877:
878: /* Given FROM and TO register numbers, say whether this elimination is allowed.
879: Frame pointer elimination is automatically handled.
880:
881: For the ROMP, if frame pointer elimination is being done, we would like to
882: convert ap into fp, not sp.
883:
884: We need r14 if various conditions (tested in romp_using_r14) are true.
885:
886: All other eliminations are valid. */
887: #define CAN_ELIMINATE(FROM, TO) \
888: ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
889: ? ! frame_pointer_needed \
890: : (FROM) == 14 ? ! romp_using_r14 () \
891: : 1)
892:
893: /* Define the offset between two registers, one to be eliminated, and the other
894: its replacement, at the start of a routine. */
895: #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
896: { if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
897: { \
898: if (romp_pushes_stack ()) \
899: (OFFSET) = ((get_frame_size () - 64) \
900: + current_function_outgoing_args_size); \
901: else \
902: (OFFSET) = - (romp_sa_size () + 64); \
903: } \
904: else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
905: (OFFSET) = romp_sa_size () - 16 + 64; \
906: else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
907: { \
908: if (romp_pushes_stack ()) \
909: (OFFSET) = (get_frame_size () + (romp_sa_size () - 16) \
910: + current_function_outgoing_args_size); \
911: else \
912: (OFFSET) = -16; \
913: } \
914: else if ((FROM) == 14) \
915: (OFFSET) = 0; \
916: else \
917: abort (); \
918: }
919:
920: /* Addressing modes, and classification of registers for them. */
921:
922: /* #define HAVE_POST_INCREMENT */
923: /* #define HAVE_POST_DECREMENT */
924:
925: /* #define HAVE_PRE_DECREMENT */
926: /* #define HAVE_PRE_INCREMENT */
927:
928: /* Macros to check register numbers against specific register classes. */
929:
930: /* These assume that REGNO is a hard or pseudo reg number.
931: They give nonzero only if REGNO is a hard reg of the suitable class
932: or a pseudo reg currently allocated to a suitable hard reg.
933: Since they use reg_renumber, they are safe only once reg_renumber
934: has been allocated, which happens in local-alloc.c. */
935:
936: #define REGNO_OK_FOR_INDEX_P(REGNO) 0
937: #define REGNO_OK_FOR_BASE_P(REGNO) \
938: ((REGNO) < FIRST_PSEUDO_REGISTER \
939: ? (REGNO) < 16 && (REGNO) != 0 && (REGNO) != 16 \
940: : (reg_renumber[REGNO] < 16 && reg_renumber[REGNO] >= 0 \
941: && reg_renumber[REGNO] != 16))
942:
943: /* Maximum number of registers that can appear in a valid memory address. */
944:
945: #define MAX_REGS_PER_ADDRESS 1
946:
947: /* Recognize any constant value that is a valid address. */
948:
949: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
950:
951: /* Nonzero if the constant value X is a legitimate general operand.
952: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
953:
954: On the ROMP, there is a bit of a hack here. Basically, we wish to
955: only issue instructions that are not `as' macros. However, in the
956: case of `get', `load', and `store', if the operand is a relocatable
957: symbol (possibly +/- an integer), there is no way to express the
958: resulting split-relocation except with the macro. Therefore, allow
959: either a constant valid in a normal (sign-extended) D-format insn or
960: a relocatable expression.
961:
962: Also, for DFmode and DImode, we must ensure that both words are
963: addressable.
964:
965: We define two macros: The first is given an offset (0 or 4) and indicates
966: that the operand is a CONST_INT that is valid for that offset. The second
967: indicates a valid non-CONST_INT constant. */
968:
969: #define LEGITIMATE_ADDRESS_INTEGER_P(X,OFFSET) \
970: (GET_CODE (X) == CONST_INT \
971: && (unsigned) (INTVAL (X) + (OFFSET) + 0x8000) < 0x10000)
972:
973: #define LEGITIMATE_ADDRESS_CONSTANT_P(X) \
974: (GET_CODE (X) == SYMBOL_REF \
975: || GET_CODE (X) == LABEL_REF \
976: || (GET_CODE (X) == CONST \
977: && (GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \
978: || GET_CODE (XEXP (XEXP (X, 0), 0)) == LABEL_REF) \
979: && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT))
980:
981: /* Include all constant integers and constant double, but exclude
982: SYMBOL_REFs that are to be obtained from the data area (see below). */
983: #define LEGITIMATE_CONSTANT_P(X) \
984: ((LEGITIMATE_ADDRESS_CONSTANT_P (X) \
985: || GET_CODE (X) == CONST_INT \
986: || GET_CODE (X) == CONST_DOUBLE) \
987: && ! (GET_CODE (X) == SYMBOL_REF && SYMBOL_REF_FLAG (X)))
988:
989: /* For no good reason, we do the same as the other RT compilers and load
990: the addresses of data areas for a function from our data area. That means
991: that we need to mark such SYMBOL_REFs. We do so here. */
992: #define ENCODE_SECTION_INFO(DECL) \
993: if (TREE_CODE (TREE_TYPE (DECL)) == FUNCTION_TYPE) \
994: SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1;
995:
996: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
997: and check its validity for a certain class.
998: We have two alternate definitions for each of them.
999: The usual definition accepts all pseudo regs; the other rejects
1000: them unless they have been allocated suitable hard regs.
1001: The symbol REG_OK_STRICT causes the latter definition to be used.
1002:
1003: Most source files want to accept pseudo regs in the hope that
1004: they will get allocated to the class that the insn wants them to be in.
1005: Source files for reload pass need to be strict.
1006: After reload, it makes no difference, since pseudo regs have
1007: been eliminated by then. */
1008:
1009: #ifndef REG_OK_STRICT
1010:
1011: /* Nonzero if X is a hard reg that can be used as an index
1012: or if it is a pseudo reg. */
1013: #define REG_OK_FOR_INDEX_P(X) 0
1014: /* Nonzero if X is a hard reg that can be used as a base reg
1015: or if it is a pseudo reg. */
1016: #define REG_OK_FOR_BASE_P(X) \
1017: (REGNO (X) != 0 && (REGNO (X) < 17 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1018:
1019: #else
1020:
1021: /* Nonzero if X is a hard reg that can be used as an index. */
1022: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1023: /* Nonzero if X is a hard reg that can be used as a base reg. */
1024: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1025:
1026: #endif
1027:
1028: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1029: that is a valid memory address for an instruction.
1030: The MODE argument is the machine mode for the MEM expression
1031: that wants to use this address.
1032:
1033: On the ROMP, a legitimate address is either a legitimate constant,
1034: a register plus a legitimate constant, or a register. See the
1035: discussion at the LEGITIMATE_ADDRESS_CONSTANT_P macro. */
1036: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1037: { if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1038: goto ADDR; \
1039: if (GET_CODE (X) != CONST_INT && LEGITIMATE_ADDRESS_CONSTANT_P (X)) \
1040: goto ADDR; \
1041: if (GET_CODE (X) == PLUS \
1042: && GET_CODE (XEXP (X, 0)) == REG \
1043: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1044: && LEGITIMATE_ADDRESS_CONSTANT_P (XEXP (X, 1))) \
1045: goto ADDR; \
1046: if (GET_CODE (X) == PLUS \
1047: && GET_CODE (XEXP (X, 0)) == REG \
1048: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1049: && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 0) \
1050: && (((MODE) != DFmode && (MODE) != DImode) \
1051: || (LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 4)))) \
1052: goto ADDR; \
1053: }
1054:
1055: /* Try machine-dependent ways of modifying an illegitimate address
1056: to be legitimate. If we find one, return the new, valid address.
1057: This macro is used in only one place: `memory_address' in explow.c.
1058:
1059: OLDX is the address as it was before break_out_memory_refs was called.
1060: In some cases it is useful to look at this to decide what needs to be done.
1061:
1062: MODE and WIN are passed so that this macro can use
1063: GO_IF_LEGITIMATE_ADDRESS.
1064:
1065: It is always safe for this macro to do nothing. It exists to recognize
1066: opportunities to optimize the output.
1067:
1068: On ROMP, check for the sum of a register with a constant
1069: integer that is out of range. If so, generate code to add the
1070: constant with the low-order 16 bits masked to the register and force
1071: this result into another register (this can be done with `cau').
1072: Then generate an address of REG+(CONST&0xffff), allowing for the
1073: possibility of bit 16 being a one.
1074:
1075: If the register is not OK for a base register, abort. */
1076:
1077: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1078: { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1079: && GET_CODE (XEXP (X, 1)) == CONST_INT \
1080: && (unsigned) (INTVAL (XEXP (X, 1)) + 0x8000) >= 0x10000) \
1081: { int high_int, low_int; \
1082: if (! REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1083: abort (); \
1084: high_int = INTVAL (XEXP (X, 1)) >> 16; \
1085: low_int = INTVAL (XEXP (X, 1)) & 0xffff; \
1086: if (low_int & 0x8000) \
1087: high_int += 1, low_int |= 0xffff0000; \
1088: (X) = gen_rtx (PLUS, SImode, \
1089: force_operand \
1090: (gen_rtx (PLUS, SImode, XEXP (X, 0), \
1091: gen_rtx (CONST_INT, VOIDmode, \
1092: high_int << 16)), 0),\
1093: gen_rtx (CONST_INT, VOIDmode, low_int)); \
1094: } \
1095: }
1096:
1097: /* Go to LABEL if ADDR (a legitimate address expression)
1098: has an effect that depends on the machine mode it is used for.
1099:
1100: On the ROMP this is true only if the address is valid with a zero offset
1101: but not with an offset of four (this means it cannot be used as an
1102: address for DImode or DFmode). Since we know it is valid, we just check
1103: for an address that is not valid with an offset of four. */
1104:
1105: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1106: { if (GET_CODE (ADDR) == PLUS \
1107: && ! LEGITIMATE_ADDRESS_CONSTANT_P (XEXP (ADDR, 1)) \
1108: && ! LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 4)) \
1109: goto LABEL; \
1110: }
1111:
1112: /* Define this if some processing needs to be done immediately before
1113: emitting code for an insn.
1114:
1115: This is used on the ROMP, to compensate for a bug in the floating-point
1116: code. When a floating-point operation is done with the first and third
1117: operands both the same floating-point register, it will generate bad code
1118: for the MC68881. So we must detect this. If it occurs, we patch the
1119: first operand to be fr0 and insert a move insn to move it to the desired
1120: destination. */
1121: #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) \
1122: { rtx op0, op1, op2, operation, tem; \
1123: if (NOPERANDS >= 3 && get_attr_type (INSN) == TYPE_FP) \
1124: { \
1125: op0 = OPERANDS[0]; \
1126: operation = OPERANDS[1]; \
1127: if (float_conversion (operation, VOIDmode)) \
1128: operation = XEXP (operation, 0); \
1129: if (float_binary (operation, VOIDmode)) \
1130: { \
1131: op1 = XEXP (operation, 0), op2 = XEXP (operation, 1); \
1132: if (float_conversion (op1, VOIDmode)) \
1133: op1 = XEXP (op1, 0); \
1134: if (float_conversion (op2, VOIDmode)) \
1135: op2 = XEXP (op2, 0); \
1136: if (rtx_equal_p (op0, op2) \
1137: && (GET_CODE (operation) == PLUS \
1138: || GET_CODE (operation) == MULT)) \
1139: tem = op1, op1 = op2, op2 = tem; \
1140: if (GET_CODE (op0) == REG && FP_REGNO_P (REGNO (op0)) \
1141: && GET_CODE (op2) == REG && FP_REGNO_P (REGNO (op2)) \
1142: && REGNO (op0) == REGNO (op2)) \
1143: { \
1144: tem = gen_rtx (REG, GET_MODE (op0), 17); \
1145: emit_insn_after (gen_move_insn (op0, tem), INSN); \
1146: SET_DEST (XVECEXP (PATTERN (INSN), 0, 0)) = tem; \
1147: OPERANDS[0] = tem; \
1148: } \
1149: } \
1150: } \
1151: }
1152:
1153: /* Specify the machine mode that this machine uses
1154: for the index in the tablejump instruction. */
1155: #define CASE_VECTOR_MODE SImode
1156:
1157: /* Define this if the tablejump instruction expects the table
1158: to contain offsets from the address of the table.
1159: Do not define this if the table should contain absolute addresses. */
1160: /* #define CASE_VECTOR_PC_RELATIVE */
1161:
1162: /* Specify the tree operation to be used to convert reals to integers. */
1163: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1164:
1165: /* This is the kind of divide that is easiest to do in the general case. */
1166: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1167:
1168: /* Define this as 1 if `char' should by default be signed; else as 0. */
1169: #define DEFAULT_SIGNED_CHAR 0
1170:
1171: /* This flag, if defined, says the same insns that convert to a signed fixnum
1172: also convert validly to an unsigned one.
1173:
1174: We actually lie a bit here as overflow conditions are different. But
1175: they aren't being checked anyway. */
1176:
1177: #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
1178:
1179: /* Max number of bytes we can move from memory to memory
1180: in one reasonably fast instruction. */
1181: #define MOVE_MAX 4
1182:
1183: /* Nonzero if access to memory by bytes is no faster than for words.
1184: Also non-zero if doing byte operations (specifically shifts) in registers
1185: is undesirable. */
1186: #define SLOW_BYTE_ACCESS 1
1187:
1188: /* Define if normal loads of shorter-than-word items from memory clears
1189: the rest of the bigs in the register. */
1190: #define BYTE_LOADS_ZERO_EXTEND
1191:
1192: /* This is BSD, so it wants DBX format. */
1193: #define DBX_DEBUGGING_INFO
1194:
1195: /* We don't have GAS for the RT yet, so don't write out special
1196: .stabs in cc1plus. */
1197:
1198: #define FASCIST_ASSEMBLER
1199:
1200: /* Do not break .stabs pseudos into continuations. */
1201: #define DBX_CONTIN_LENGTH 0
1202:
1203: /* Don't try to use the `x' type-cross-reference character in DBX data.
1204: Also has the consequence of putting each struct, union or enum
1205: into a separate .stabs, containing only cross-refs to the others. */
1206: #define DBX_NO_XREFS
1207:
1208: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1209: is done just by pretending it is already truncated. */
1210: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1211:
1212: /* Specify the machine mode that pointers have.
1213: After generation of rtl, the compiler makes no further distinction
1214: between pointers and any other objects of this machine mode. */
1215: #define Pmode SImode
1216:
1217: /* Mode of a function address in a call instruction (for indexing purposes).
1218:
1219: Doesn't matter on ROMP. */
1220: #define FUNCTION_MODE SImode
1221:
1222: /* Define this if addresses of constant functions
1223: shouldn't be put through pseudo regs where they can be cse'd.
1224: Desirable on machines where ordinary constants are expensive
1225: but a CALL with constant address is cheap. */
1226: #define NO_FUNCTION_CSE
1227:
1228: /* Define this if shift instructions ignore all but the low-order
1.1.1.4 ! root 1229: few bits.
! 1230:
! 1231: This is not true on the RT since it uses the low-order 6, not 5, bits.
! 1232: At some point, this should be extended to see how to express that. */
! 1233:
! 1234: /* #define SHIFT_COUNT_TRUNCATED */
1.1 root 1235:
1.1.1.3 root 1236: /* Compute the cost of computing a constant rtl expression RTX whose
1237: rtx-code is CODE, contained within an expression of code OUTER_CODE.
1238: The body of this macro is a portion of a switch statement. If the
1239: code is computed here, return it with a return statement. Otherwise,
1240: break from the switch. */
1.1 root 1241:
1.1.1.3 root 1242: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1.1 root 1243: case CONST_INT: \
1.1.1.3 root 1244: if ((OUTER_CODE) == IOR && exact_log2 (INTVAL (RTX)) >= 0 \
1245: || (OUTER_CODE) == AND && exact_log2 (~INTVAL (RTX)) >= 0 \
1246: || (((OUTER_CODE) == PLUS || (OUTER_CODE) == MINUS) \
1247: && (unsigned int) (INTVAL (RTX) + 15) < 31) \
1248: || ((OUTER_CODE) == SET && (unsigned int) INTVAL (RTX) < 16))\
1249: return 0; \
1250: return ((unsigned int) (INTVAL(RTX) + 0x8000) < 0x10000 \
1251: || (INTVAL (RTX) & 0xffff0000) == 0) ? 0 : COSTS_N_INSNS (2);\
1.1 root 1252: case CONST: \
1253: case LABEL_REF: \
1254: case SYMBOL_REF: \
1.1.1.3 root 1255: if (current_function_operand (RTX, Pmode)) return 0; \
1256: return COSTS_N_INSNS (2); \
1.1 root 1257: case CONST_DOUBLE: \
1.1.1.3 root 1258: if ((RTX) == CONST0_RTX (GET_MODE (RTX))) return 2; \
1259: return ((GET_MODE_CLASS (GET_MODE (RTX)) == MODE_FLOAT) \
1260: ? COSTS_N_INSNS (5) : COSTS_N_INSNS (4));
1.1 root 1261:
1262: /* Provide the costs of a rtl expression. This is in the body of a
1263: switch on CODE.
1264:
1265: References to our own data area are really references to r14, so they
1266: are very cheap. Multiples and divides are very expensive. */
1267:
1.1.1.3 root 1268: #define RTX_COSTS(X,CODE,OUTER_CODE) \
1.1 root 1269: case MEM: \
1270: return current_function_operand (X, Pmode) ? 0 : COSTS_N_INSNS (2); \
1271: case MULT: \
1.1.1.3 root 1272: return (TARGET_IN_LINE_MUL && GET_MODE_CLASS (GET_MODE (X)) == MODE_INT)\
1273: ? COSTS_N_INSNS (19) : COSTS_N_INSNS (25); \
1.1 root 1274: case DIV: \
1275: case UDIV: \
1276: case MOD: \
1277: case UMOD: \
1278: return COSTS_N_INSNS (45);
1279:
1280: /* Compute the cost of an address. This is meant to approximate the size
1281: and/or execution delay of an insn using that address. If the cost is
1282: approximated by the RTL complexity, including CONST_COSTS above, as
1283: is usually the case for CISC machines, this macro should not be defined.
1284: For aggressively RISCy machines, only one insn format is allowed, so
1285: this macro should be a constant. The value of this macro only matters
1286: for valid addresses.
1287:
1288: For the ROMP, everything is cost 0 except for addresses involving
1289: symbolic constants, which are cost 1. */
1290:
1291: #define ADDRESS_COST(RTX) \
1292: ((GET_CODE (RTX) == SYMBOL_REF \
1293: && ! CONSTANT_POOL_ADDRESS_P (RTX)) \
1294: || GET_CODE (RTX) == LABEL_REF \
1295: || (GET_CODE (RTX) == CONST \
1296: && ! constant_pool_address_operand (RTX, Pmode)) \
1297: || (GET_CODE (RTX) == PLUS \
1298: && ((GET_CODE (XEXP (RTX, 1)) == SYMBOL_REF \
1299: && ! CONSTANT_POOL_ADDRESS_P (XEXP (RTX, 0))) \
1300: || GET_CODE (XEXP (RTX, 1)) == LABEL_REF \
1301: || GET_CODE (XEXP (RTX, 1)) == CONST)))
1302:
1303: /* Adjust the length of an INSN. LENGTH is the currently-computed length and
1304: should be adjusted to reflect any required changes. This macro is used when
1305: there is some systematic length adjustment required that would be difficult
1306: to express in the length attribute.
1307:
1308: On the ROMP, there are two adjustments: First, a 2-byte insn in the delay
1309: slot of a CALL (including floating-point operations) actually takes four
1310: bytes. Second, we have to make the worst-case alignment assumption for
1311: address vectors. */
1312:
1313: #define ADJUST_INSN_LENGTH(X,LENGTH) \
1314: if (GET_CODE (X) == INSN && GET_CODE (PATTERN (X)) == SEQUENCE \
1315: && GET_CODE (XVECEXP (PATTERN (X), 0, 0)) != JUMP_INSN \
1316: && get_attr_length (XVECEXP (PATTERN (X), 0, 1)) == 2) \
1317: (LENGTH) += 2; \
1318: else if (GET_CODE (X) == JUMP_INSN && GET_CODE (PATTERN (X)) == ADDR_VEC) \
1319: (LENGTH) += 2;
1320:
1321: /* Tell final.c how to eliminate redundant test instructions. */
1322:
1323: /* Here we define machine-dependent flags and fields in cc_status
1324: (see `conditions.h'). */
1325:
1326: /* Set if condition code (really not-Z) is stored in `test bit'. */
1327: #define CC_IN_TB 01000
1328:
1329: /* Set if condition code is set by an unsigned compare. */
1330: #define CC_UNSIGNED 02000
1331:
1332: /* Store in cc_status the expressions
1333: that the condition codes will describe
1334: after execution of an instruction whose pattern is EXP.
1335: Do not alter them if the instruction would not alter the cc's. */
1336:
1337: #define NOTICE_UPDATE_CC(BODY,INSN) \
1338: update_cc (BODY, INSN)
1339:
1340: /* Control the assembler format that we output. */
1341:
1342: /* Output at beginning of assembler file. */
1343:
1344: #define ASM_FILE_START(FILE) \
1345: { extern char *version_string; \
1.1.1.4 ! root 1346: char *p; \
! 1347: \
1.1 root 1348: fprintf (FILE, "\t.globl .oVncs\n\t.set .oVncs,0\n") ; \
1.1.1.4 ! root 1349: fprintf (FILE, "\t.globl .oVgcc"); \
! 1350: for (p = version_string; *p != ' ' && *p != 0; p++) \
! 1351: fprintf (FILE, "%c", *p); \
! 1352: fprintf (FILE, "\n\t.set .oVgcc"); \
! 1353: for (p = version_string; *p != ' ' && *p != 0; p++) \
! 1354: fprintf (FILE, "%c", *p); \
! 1355: fprintf (FILE, ",0\n"); \
1.1 root 1356: }
1357:
1358: /* Output to assembler file text saying following lines
1359: may contain character constants, extra white space, comments, etc. */
1360:
1361: #define ASM_APP_ON ""
1362:
1363: /* Output to assembler file text saying following lines
1364: no longer contain unusual constructs. */
1365:
1366: #define ASM_APP_OFF ""
1367:
1368: /* Output before instructions and read-only data. */
1369:
1.1.1.2 root 1370: #define TEXT_SECTION_ASM_OP ".text"
1.1 root 1371:
1372: /* Output before writable data. */
1373:
1.1.1.2 root 1374: #define DATA_SECTION_ASM_OP ".data"
1.1 root 1375:
1376: /* How to refer to registers in assembler output.
1377: This sequence is indexed by compiler's hard-register-number (see above). */
1378:
1379: #define REGISTER_NAMES \
1380: {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \
1381: "r10", "r11", "r12", "r13", "r14", "r15", "ap", \
1382: "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7" }
1383:
1384: /* How to renumber registers for dbx and gdb. */
1385:
1386: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1387:
1388: /* This is how to output the definition of a user-level label named NAME,
1389: such as the label on a static function or variable NAME. */
1390:
1391: #define ASM_OUTPUT_LABEL(FILE,NAME) \
1392: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1393:
1394: /* This is how to output a command to make the user-level label named NAME
1395: defined for reference from other files. */
1396:
1397: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1398: do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1399:
1400: /* This is how to output a reference to a user-level label named NAME.
1401: `assemble_name' uses this. */
1402:
1403: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1404: fprintf (FILE, "_%s", NAME)
1405:
1406: /* This is how to output an internal numbered label where
1407: PREFIX is the class of label and NUM is the number within the class. */
1408:
1409: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1410: fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1411:
1412: /* This is how to output a label for a jump table. Arguments are the same as
1413: for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is
1414: passed. */
1415:
1416: #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1417: { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
1418:
1419: /* This is how to store into the string LABEL
1420: the symbol_ref name of an internal numbered label where
1421: PREFIX is the class of label and NUM is the number within the class.
1422: This is suitable for output with `assemble_name'. */
1423:
1424: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1425: sprintf (LABEL, "*%s%d", PREFIX, NUM)
1426:
1427: /* This is how to output an assembler line defining a `double' constant. */
1428:
1429: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1430: fprintf (FILE, "\t.double 0d%.20e\n", (VALUE))
1431:
1432: /* This is how to output an assembler line defining a `float' constant.
1433:
1434: WARNING: Believe it or not, the ROMP assembler has a bug in its
1435: handling of single-precision floating-point values making it impossible
1436: to output such values in the expected way. Therefore, it must be output
1437: in hex. THIS WILL NOT WORK IF CROSS-COMPILING FROM A MACHINE THAT DOES
1438: NOT USE IEEE-FORMAT FLOATING-POINT, but there is nothing that can be done
1439: about it short of fixing the assembler. */
1440:
1441: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1442: do { union { int i; float f; } u_i_f; \
1443: u_i_f.f = (VALUE); \
1444: fprintf (FILE, "\t.long 0x%x\n", u_i_f.i);\
1445: } while (0)
1446:
1447: /* This is how to output an assembler line defining an `int' constant. */
1448:
1449: #define ASM_OUTPUT_INT(FILE,VALUE) \
1450: ( fprintf (FILE, "\t.long "), \
1451: output_addr_const (FILE, (VALUE)), \
1452: fprintf (FILE, "\n"))
1453:
1454: /* Likewise for `char' and `short' constants. */
1455:
1456: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1457: ( fprintf (FILE, "\t.short "), \
1458: output_addr_const (FILE, (VALUE)), \
1459: fprintf (FILE, "\n"))
1460:
1461: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1462: ( fprintf (FILE, "\t.byte "), \
1463: output_addr_const (FILE, (VALUE)), \
1464: fprintf (FILE, "\n"))
1465:
1466: /* This is how to output an assembler line for a numeric constant byte. */
1467:
1468: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1469: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1470:
1471: /* This is how to output code to push a register on the stack.
1472: It need not be very fast code. */
1473:
1474: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1475: fprintf (FILE, "\tsis r1,4\n\tsts %s,0(r1)\n", reg_names[REGNO])
1476:
1477: /* This is how to output an insn to pop a register from the stack.
1478: It need not be very fast code. */
1479:
1480: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1481: fprintf (FILE, "\tls r1,0(r1)\n\tais r1,4\n", reg_names[REGNO])
1482:
1483: /* This is how to output an element of a case-vector that is absolute. */
1484:
1485: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1486: fprintf (FILE, "\t.long L%d\n", VALUE)
1487:
1488: /* This is how to output an element of a case-vector that is relative.
1489: (ROMP does not use such vectors,
1490: but we must define this macro anyway.) */
1491:
1492: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) abort ()
1493:
1494: /* This is how to output an assembler line
1495: that says to advance the location counter
1496: to a multiple of 2**LOG bytes. */
1497:
1498: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1499: if ((LOG) != 0) \
1500: fprintf (FILE, "\t.align %d\n", (LOG))
1501:
1502: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1503: fprintf (FILE, "\t.space %d\n", (SIZE))
1504:
1505: /* This says how to output an assembler line
1506: to define a global common symbol. */
1507:
1508: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1509: ( fputs (".comm ", (FILE)), \
1510: assemble_name ((FILE), (NAME)), \
1511: fprintf ((FILE), ",%d\n", (SIZE)))
1512:
1513: /* This says how to output an assembler line
1514: to define a local common symbol. */
1515:
1516: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1517: ( fputs (".lcomm ", (FILE)), \
1518: assemble_name ((FILE), (NAME)), \
1519: fprintf ((FILE), ",%d\n", (SIZE)))
1520:
1521: /* Store in OUTPUT a string (made with alloca) containing
1522: an assembler-name for a local static variable named NAME.
1523: LABELNO is an integer which is different for each call. */
1524:
1525: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1526: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1527: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1528:
1529: /* Define the parentheses used to group arithmetic operations
1530: in assembler code. */
1531:
1532: #define ASM_OPEN_PAREN "("
1533: #define ASM_CLOSE_PAREN ")"
1534:
1535: /* Define results of standard character escape sequences. */
1536: #define TARGET_BELL 007
1537: #define TARGET_BS 010
1538: #define TARGET_TAB 011
1539: #define TARGET_NEWLINE 012
1540: #define TARGET_VT 013
1541: #define TARGET_FF 014
1542: #define TARGET_CR 015
1543:
1544: /* Print operand X (an rtx) in assembler syntax to file FILE.
1545: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1546: For `%' followed by punctuation, CODE is the punctuation and X is null. */
1547:
1548: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1549:
1550: /* Define which CODE values are valid. */
1551:
1552: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1553: ((CODE) == '.' || (CODE) == '#')
1554:
1555: /* Print a memory address as an operand to reference that memory location. */
1556:
1557: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1558: { register rtx addr = ADDR; \
1559: register rtx base = 0, offset = addr; \
1560: if (GET_CODE (addr) == REG) \
1561: base = addr, offset = const0_rtx; \
1562: else if (GET_CODE (addr) == PLUS \
1563: && GET_CODE (XEXP (addr, 0)) == REG) \
1564: base = XEXP (addr, 0), offset = XEXP (addr, 1); \
1565: else if (GET_CODE (addr) == SYMBOL_REF \
1566: && CONSTANT_POOL_ADDRESS_P (addr)) \
1567: { \
1568: offset = gen_rtx (CONST_INT, VOIDmode, get_pool_offset (addr) + 12); \
1569: base = gen_rtx (REG, SImode, 14); \
1570: } \
1571: else if (GET_CODE (addr) == CONST \
1572: && GET_CODE (XEXP (addr, 0)) == PLUS \
1573: && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT \
1574: && GET_CODE (XEXP (XEXP (addr, 0), 0)) == SYMBOL_REF \
1575: && CONSTANT_POOL_ADDRESS_P (XEXP (XEXP (addr, 0), 0))) \
1576: { \
1577: offset = plus_constant (XEXP (XEXP (addr, 0), 1), \
1578: (get_pool_offset (XEXP (XEXP (addr, 0), 0)) \
1579: + 12)); \
1580: base = gen_rtx (REG, SImode, 14); \
1581: } \
1582: output_addr_const (FILE, offset); \
1583: if (base) \
1584: fprintf (FILE, "(%s)", reg_names [REGNO (base)]); \
1585: }
1586:
1587: /* Define the codes that are matched by predicates in aux-output.c. */
1588:
1589: #define PREDICATE_CODES \
1590: {"zero_memory_operand", {SUBREG, MEM}}, \
1591: {"short_memory_operand", {SUBREG, MEM}}, \
1592: {"symbolic_memory_operand", {SUBREG, MEM}}, \
1593: {"current_function_operand", {MEM}}, \
1594: {"constant_pool_address_operand", {SUBREG, CONST}}, \
1595: {"romp_symbolic_operand", {LABEL_REF, SYMBOL_REF, CONST}}, \
1596: {"constant_operand", {LABEL_REF, SYMBOL_REF, PLUS, CONST, CONST_INT}}, \
1597: {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
1598: {"reg_or_any_cint_operand", {SUBREG, REG, CONST_INT}}, \
1599: {"short_cint_operand", {CONST_INT}}, \
1600: {"reg_or_D_operand", {SUBREG, REG, CONST_INT}}, \
1601: {"reg_or_add_operand", {SUBREG, REG, LABEL_REF, SYMBOL_REF, \
1602: PLUS, CONST, CONST_INT}}, \
1603: {"reg_or_and_operand", {SUBREG, REG, CONST_INT}}, \
1604: {"reg_or_mem_operand", {SUBREG, REG, MEM}}, \
1605: {"reg_or_nonsymb_mem_operand", {SUBREG, REG, MEM}}, \
1606: {"romp_operand", {SUBREG, MEM, REG, CONST_INT, CONST, LABEL_REF, \
1607: SYMBOL_REF, CONST_DOUBLE}}, \
1608: {"reg_0_operand", {REG}}, \
1609: {"reg_15_operand", {REG}}, \
1610: {"float_binary", {PLUS, MINUS, MULT, DIV}}, \
1611: {"float_unary", {NEG, ABS}}, \
1612: {"float_conversion", {FLOAT_TRUNCATE, FLOAT_EXTEND, FLOAT, FIX}},
1613:
1614: /* Define functions defined in aux-output.c and used in templates. */
1615:
1616: extern char *output_in_line_mul ();
1617: extern char *output_fpop ();
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