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1.1 root 1: /* Definitions of target machine for GNU compiler, for ROMP chip.
1.1.1.2 root 2: Copyright (C) 1989, 1991, 1993 Free Software Foundation, Inc.
1.1 root 3: Contributed by Richard Kenner ([email protected])
4:
5: This file is part of GNU CC.
6:
7: GNU CC is free software; you can redistribute it and/or modify
8: it under the terms of the GNU General Public License as published by
9: the Free Software Foundation; either version 2, or (at your option)
10: any later version.
11:
12: GNU CC is distributed in the hope that it will be useful,
13: but WITHOUT ANY WARRANTY; without even the implied warranty of
14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15: GNU General Public License for more details.
16:
17: You should have received a copy of the GNU General Public License
18: along with GNU CC; see the file COPYING. If not, write to
19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20:
21:
22: /* Names to predefine in the preprocessor for this target machine. */
23:
1.1.1.2 root 24: #define CPP_PREDEFINES "-Dibm032 -Dunix -Asystem(unix) -Asystem(bsd) -Acpu(ibm032) -Amachine(ibm032)"
1.1 root 25:
26: /* Print subsidiary information on the compiler version in use. */
27: #define TARGET_VERSION ;
28:
29: /* Add -lfp_p when running with -p or -pg. */
30: #define LIB_SPEC "%{pg:-lfp_p}%{p:-lfp_p} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
31:
32: /* Run-time compilation parameters selecting different hardware subsets. */
33:
34: /* Flag to generate all multiplies as an in-line sequence of multiply-step
35: insns instead of calling a library routine. */
36: #define TARGET_IN_LINE_MUL (target_flags & 1)
37:
38: /* Flag to generate padded floating-point data blocks. Otherwise, we generate
39: them the minimum size. This trades off execution speed against size. */
40: #define TARGET_FULL_FP_BLOCKS (target_flags & 2)
41:
42: /* Flag to pass and return floating point values in floating point registers.
43: Since this violates the linkage convention, we feel free to destroy fr2
44: and fr3 on function calls.
45: fr1-fr3 are used to pass the arguments. */
46: #define TARGET_FP_REGS (target_flags & 4)
47:
48: /* Flag to return structures of more than one word in memory. This is for
49: compatibility with the MetaWare HighC (hc) compiler. */
50: #define TARGET_HC_STRUCT_RETURN (target_flags & 010)
51:
52: extern int target_flags;
53:
54: /* Macro to define tables used to set the flags.
55: This is a list in braces of pairs in braces,
56: each pair being { "NAME", VALUE }
57: where VALUE is the bits to set or minus the bits to clear.
58: An empty string NAME is used to identify the default VALUE. */
59:
60: #define TARGET_SWITCHES \
61: { {"in-line-mul", 1}, \
62: {"call-lib-mul", -1}, \
63: {"full-fp-blocks", 2}, \
64: {"minimum-fp-blocks", -2}, \
65: {"fp-arg-in-fpregs", 4}, \
66: {"fp-arg-in-gregs", -4}, \
67: {"hc-struct-return", 010}, \
68: {"nohc-struct-return", - 010}, \
69: { "", TARGET_DEFAULT}}
70:
71: #define TARGET_DEFAULT 3
72:
73: /* target machine storage layout */
74:
75: /* Define this if most significant bit is lowest numbered
76: in instructions that operate on numbered bit-fields. */
77: /* That is true on ROMP. */
78: #define BITS_BIG_ENDIAN 1
79:
80: /* Define this if most significant byte of a word is the lowest numbered. */
81: /* That is true on ROMP. */
82: #define BYTES_BIG_ENDIAN 1
83:
84: /* Define this if most significant word of a multiword number is lowest
85: numbered.
86:
87: For ROMP we can decide arbitrarily since there are no machine instructions
88: for them. Might as well be consistent with bits and bytes. */
89: #define WORDS_BIG_ENDIAN 1
90:
91: /* number of bits in an addressable storage unit */
92: #define BITS_PER_UNIT 8
93:
94: /* Width in bits of a "word", which is the contents of a machine register.
95: Note that this is not necessarily the width of data type `int';
96: if using 16-bit ints on a 68000, this would still be 32.
97: But on a machine with 16-bit registers, this would be 16. */
98: #define BITS_PER_WORD 32
99:
100: /* Width of a word, in units (bytes). */
101: #define UNITS_PER_WORD 4
102:
103: /* Width in bits of a pointer.
104: See also the macro `Pmode' defined below. */
105: #define POINTER_SIZE 32
106:
107: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
108: #define PARM_BOUNDARY 32
109:
110: /* Boundary (in *bits*) on which stack pointer should be aligned. */
111: #define STACK_BOUNDARY 32
112:
113: /* Allocation boundary (in *bits*) for the code of a function. */
114: #define FUNCTION_BOUNDARY 16
115:
116: /* No data type wants to be aligned rounder than this. */
117: #define BIGGEST_ALIGNMENT 32
118:
119: /* Alignment of field after `int : 0' in a structure. */
120: #define EMPTY_FIELD_BOUNDARY 32
121:
122: /* Every structure's size must be a multiple of this. */
123: #define STRUCTURE_SIZE_BOUNDARY 8
124:
125: /* A bitfield declared as `int' forces `int' alignment for the struct. */
126: #define PCC_BITFIELD_TYPE_MATTERS 1
127:
128: /* Make strings word-aligned so strcpy from constants will be faster. */
129: #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
130: (TREE_CODE (EXP) == STRING_CST \
131: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
132:
133: /* Make arrays of chars word-aligned for the same reasons. */
134: #define DATA_ALIGNMENT(TYPE, ALIGN) \
135: (TREE_CODE (TYPE) == ARRAY_TYPE \
136: && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
137: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
138:
139: /* Set this nonzero if move instructions will actually fail to work
140: when given unaligned data. */
141: #define STRICT_ALIGNMENT 1
142:
143: /* Standard register usage. */
144:
145: /* Number of actual hardware registers.
146: The hardware registers are assigned numbers for the compiler
147: from 0 to just below FIRST_PSEUDO_REGISTER.
148: All registers that the compiler knows about must be given numbers,
149: even those that are not normally considered general registers.
150:
151: ROMP has 16 fullword registers and 8 floating point registers.
152:
153: In addition, the difference between the frame and argument pointers is
154: a function of the number of registers saved, so we need to have a register
155: to use for AP that will later be eliminated in favor of sp or fp. This is
156: a normal register, but it is fixed. */
157:
158: #define FIRST_PSEUDO_REGISTER 25
159:
160: /* 1 for registers that have pervasive standard uses
161: and are not available for the register allocator.
162:
163: On ROMP, r1 is used for the stack and r14 is used for a
164: data area pointer.
165:
166: HACK WARNING: On the RT, there is a bug in code generation for
167: the MC68881 when the first and third operands are the same floating-point
168: register. See the definition of the FINAL_PRESCAN_INSN macro for details.
169: Here we need to reserve fr0 for this purpose. */
170: #define FIXED_REGISTERS \
171: {0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
172: 1, \
173: 1, 0, 0, 0, 0, 0, 0, 0}
174:
175: /* 1 for registers not available across function calls.
176: These must include the FIXED_REGISTERS and also any
177: registers that can be used without being saved.
178: The latter must include the registers where values are returned
179: and the register where structure-value addresses are passed.
180: Aside from that, you can include as many other registers as you like. */
181: #define CALL_USED_REGISTERS \
182: {1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
183: 1, \
184: 1, 1, 0, 0, 0, 0, 0, 0}
185:
186: /* List the order in which to allocate registers. Each register must be
187: listed once, even those in FIXED_REGISTERS.
188:
189: We allocate in the following order:
190: fr0, fr1 (not saved)
191: fr2 ... fr6
192: fr7 (more expensive for some FPA's)
193: r0 (not saved and won't conflict with parameter register)
194: r4, r3, r2 (not saved, highest used first to make less conflict)
195: r5 (not saved, but forces r6 to be saved if DI/DFmode)
196: r15, r14, r13, r12, r11, r10, r9, r8, r7, r6 (less to save)
197: r1, ap */
198:
199: #define REG_ALLOC_ORDER \
200: {17, 18, \
201: 19, 20, 21, 22, 23, \
202: 24, \
203: 0, \
204: 4, 3, 2, \
205: 5, \
206: 15, 14, 13, 12, 11, 10, \
207: 9, 8, 7, 6, \
208: 1, 16}
209:
210: /* True if register is floating-point. */
211: #define FP_REGNO_P(N) ((N) >= 17)
212:
213: /* Return number of consecutive hard regs needed starting at reg REGNO
214: to hold something of mode MODE.
215: This is ordinarily the length in words of a value of mode MODE
216: but can be less for certain modes in special long registers.
217:
218: On ROMP, ordinary registers hold 32 bits worth;
219: a single floating point register is always enough for
220: anything that can be stored in them at all. */
221: #define HARD_REGNO_NREGS(REGNO, MODE) \
222: (FP_REGNO_P (REGNO) ? GET_MODE_NUNITS (MODE) \
223: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
224:
225: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
226: On ROMP, the cpu registers can hold any mode but the float registers
227: can hold only floating point. */
228: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
229: (! FP_REGNO_P (REGNO) || GET_MODE_CLASS (MODE) == MODE_FLOAT \
230: || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT)
231:
232: /* Value is 1 if it is a good idea to tie two pseudo registers
233: when one has mode MODE1 and one has mode MODE2.
234: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
235: for any hard reg, then this must be 0 for correct output. */
236: #define MODES_TIEABLE_P(MODE1, MODE2) \
237: ((GET_MODE_CLASS (MODE1) == MODE_FLOAT \
238: || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
239: == (GET_MODE_CLASS (MODE2) == MODE_FLOAT \
240: || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
241:
242: /* A C expression returning the cost of moving data from a register of class
243: CLASS1 to one of CLASS2.
244:
245: On the ROMP, access to floating-point registers is expensive (even between
246: two FP regs.) */
247: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
248: (2 + 10 * ((CLASS1) == FP_REGS) + 10 * (CLASS2 == FP_REGS))
249:
250: /* Specify the registers used for certain standard purposes.
251: The values of these macros are register numbers. */
252:
253: /* ROMP pc isn't overloaded on a register that the compiler knows about. */
254: /* #define PC_REGNUM */
255:
256: /* Register to use for pushing function arguments. */
257: #define STACK_POINTER_REGNUM 1
258:
259: /* Base register for access to local variables of the function. */
260: #define FRAME_POINTER_REGNUM 13
261:
262: /* Value should be nonzero if functions must have frame pointers.
263: Zero means the frame pointer need not be set up (and parms
264: may be accessed via the stack pointer) in functions that seem suitable.
265: This is computed in `reload', in reload1.c. */
266: #define FRAME_POINTER_REQUIRED 0
267:
268: /* Base register for access to arguments of the function. */
269: #define ARG_POINTER_REGNUM 16
270:
271: /* Place to put static chain when calling a function that requires it. */
272: #define STATIC_CHAIN \
273: gen_rtx (MEM, Pmode, gen_rtx (PLUS, Pmode, stack_pointer_rtx, \
274: gen_rtx (CONST_INT, VOIDmode, -36)))
275:
276: /* Place where static chain is found upon entry to routine. */
277: #define STATIC_CHAIN_INCOMING \
278: gen_rtx (MEM, Pmode, gen_rtx (PLUS, Pmode, arg_pointer_rtx, \
279: gen_rtx (CONST_INT, VOIDmode, -20)))
280:
281: /* Place that structure value return address is placed.
282:
283: On the ROMP, it is passed as an extra parameter. */
284: #define STRUCT_VALUE 0
285:
286: /* Define the classes of registers for register constraints in the
287: machine description. Also define ranges of constants.
288:
289: One of the classes must always be named ALL_REGS and include all hard regs.
290: If there is more than one class, another class must be named NO_REGS
291: and contain no registers.
292:
293: The name GENERAL_REGS must be the name of a class (or an alias for
294: another name such as ALL_REGS). This is the class of registers
295: that is allowed by "g" or "r" in a register constraint.
296: Also, registers outside this class are allocated only when
297: instructions express preferences for them.
298:
299: The classes must be numbered in nondecreasing order; that is,
300: a larger-numbered class must never be contained completely
301: in a smaller-numbered class.
302:
303: For any two classes, it is very desirable that there be another
304: class that represents their union. */
305:
306: /* The ROMP has two types of registers, general and floating-point.
307:
308: However, r0 is special in that it cannot be used as a base register.
309: So make a class for registers valid as base registers.
310:
311: For floating-point support, add classes that just consist of r0 and
312: r15, respectively. */
313:
314: enum reg_class { NO_REGS, R0_REGS, R15_REGS, BASE_REGS, GENERAL_REGS,
315: FP_REGS, ALL_REGS, LIM_REG_CLASSES };
316:
317: #define N_REG_CLASSES (int) LIM_REG_CLASSES
318:
319: /* Give names of register classes as strings for dump file. */
320:
321: #define REG_CLASS_NAMES \
322: {"NO_REGS", "R0_REGS", "R15_REGS", "BASE_REGS", "GENERAL_REGS", \
323: "FP_REGS", "ALL_REGS" }
324:
325: /* Define which registers fit in which classes.
326: This is an initializer for a vector of HARD_REG_SET
327: of length N_REG_CLASSES. */
328:
329: #define REG_CLASS_CONTENTS {0, 0x00001, 0x08000, 0x1fffe, 0x1ffff, \
330: 0x1fe0000, 0x1ffffff }
331:
332: /* The same information, inverted:
333: Return the class number of the smallest class containing
334: reg number REGNO. This could be a conditional expression
335: or could index an array. */
336:
337: #define REGNO_REG_CLASS(REGNO) \
338: ((REGNO) == 0 ? GENERAL_REGS : FP_REGNO_P (REGNO) ? FP_REGS : BASE_REGS)
339:
340: /* The class value for index registers, and the one for base regs. */
341: #define INDEX_REG_CLASS BASE_REGS
342: #define BASE_REG_CLASS BASE_REGS
343:
344: /* Get reg_class from a letter such as appears in the machine description. */
345:
346: #define REG_CLASS_FROM_LETTER(C) \
347: ((C) == 'f' ? FP_REGS \
348: : (C) == 'b' ? BASE_REGS \
349: : (C) == 'z' ? R0_REGS \
350: : (C) == 't' ? R15_REGS \
351: : NO_REGS)
352:
353: /* The letters I, J, K, L, M, N, and P in a register constraint string
354: can be used to stand for particular ranges of immediate operands.
355: This macro defines what the ranges are.
356: C is the letter, and VALUE is a constant value.
357: Return 1 if VALUE is in the range specified by C.
358:
359: `I' is constants less than 16
360: `J' is negative constants greater than -16
361: `K' is the range for a normal D insn.
362: `L' is a constant with only the low-order 16 bits set
363: `M' is a constant with only the high-order 16 bits set
364: `N' is a single-bit constant
365: `O' is a constant with either the high-order or low-order 16 bits all ones
366: `P' is the complement of a single-bit constant
367: */
368:
369: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
370: ( (C) == 'I' ? (unsigned) (VALUE) < 0x10 \
371: : (C) == 'J' ? (VALUE) < 0 && (VALUE) > -16 \
372: : (C) == 'K' ? (unsigned) ((VALUE) + 0x8000) < 0x10000 \
373: : (C) == 'L' ? ((VALUE) & 0xffff0000) == 0 \
374: : (C) == 'M' ? ((VALUE) & 0xffff) == 0 \
375: : (C) == 'N' ? exact_log2 (VALUE) >= 0 \
376: : (C) == 'O' ? ((VALUE) & 0xffff) == 0xffff \
377: || ((VALUE) & 0xffff0000) == 0xffff0000 \
378: : (C) == 'P' ? exact_log2 (~ (VALUE)) >= 0 \
379: : 0)
380:
381: /* Similar, but for floating constants, and defining letters G and H.
382: Here VALUE is the CONST_DOUBLE rtx itself.
383: No floating-point constants on ROMP. */
384:
385: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 0
386:
387: /* Optional extra constraints for this machine.
388:
389: For the ROMP, `Q' means that this is a memory operand but not a symbolic
390: memory operand. Note that an unassigned pseudo register is such a
391: memory operand. If register allocation has not been done, we reject
392: pseudos, since we assume (hope) that they will get hard registers.
393:
394: `R' means that this is a constant pool reference to the current function.
395: This is just r14 and so can be treated as a register. We bother with this
396: just in move insns as that is the only place it is likely to occur.
397:
398: `S' means that this is the address of a constant pool location. This is
399: equal to r14 plus a constant. We also only check for this in move insns. */
400:
401: #define EXTRA_CONSTRAINT(OP, C) \
402: ((C) == 'Q' ? \
403: ((GET_CODE (OP) == REG \
404: && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
405: && reg_renumber != 0 \
406: && reg_renumber[REGNO (OP)] < 0) \
407: || (GET_CODE (OP) == MEM \
408: && ! symbolic_memory_operand (OP, VOIDmode))) \
409: : (C) == 'R' ? current_function_operand (OP, VOIDmode) \
410: : (C) == 'S' ? constant_pool_address_operand (OP, VOIDmode) \
411: : 0)
412:
413: /* Given an rtx X being reloaded into a reg required to be
414: in class CLASS, return the class of reg to actually use.
415: In general this is just CLASS; but on some machines
416: in some cases it is preferable to use a more restrictive class.
417:
418: For the ROMP, if X is a memory reference that involves a symbol,
419: we must use a BASE_REGS register instead of GENERAL_REGS
420: to do the reload. The argument of MEM be either REG, PLUS, or SYMBOL_REF
421: to be valid, so we assume that this is the case.
422:
423: Also, if X is an integer class, ensure that floating-point registers
424: aren't used. */
425:
426: #define PREFERRED_RELOAD_CLASS(X,CLASS) \
427: ((CLASS) == FP_REGS && GET_MODE_CLASS (GET_MODE (X)) == MODE_INT \
428: ? GENERAL_REGS : \
429: (CLASS) != GENERAL_REGS ? (CLASS) : \
430: GET_CODE (X) != MEM ? GENERAL_REGS : \
431: GET_CODE (XEXP (X, 0)) == SYMBOL_REF ? BASE_REGS : \
432: GET_CODE (XEXP (X, 0)) == LABEL_REF ? BASE_REGS : \
433: GET_CODE (XEXP (X, 0)) == CONST ? BASE_REGS : \
434: GET_CODE (XEXP (X, 0)) == REG ? GENERAL_REGS : \
435: GET_CODE (XEXP (X, 0)) != PLUS ? GENERAL_REGS : \
436: GET_CODE (XEXP (XEXP (X, 0), 1)) == SYMBOL_REF ? BASE_REGS : \
437: GET_CODE (XEXP (XEXP (X, 0), 1)) == LABEL_REF ? BASE_REGS : \
438: GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST ? BASE_REGS : GENERAL_REGS)
439:
440: /* Return the register class of a scratch register needed to store into
441: OUT from a register of class CLASS in MODE.
442:
443: On the ROMP, we cannot store into a symbolic memory address from an
444: integer register; we need a BASE_REGS register as a scratch to do it. */
445:
446: #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) \
447: (GET_MODE_CLASS (MODE) == MODE_INT && symbolic_memory_operand (OUT, MODE) \
448: ? BASE_REGS : NO_REGS)
449:
450: /* Return the maximum number of consecutive registers
451: needed to represent mode MODE in a register of class CLASS.
452:
453: On ROMP, this is the size of MODE in words,
454: except in the FP regs, where a single reg is always enough. */
455: #define CLASS_MAX_NREGS(CLASS, MODE) \
456: ((CLASS) == FP_REGS ? 1 \
457: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
458:
459: /* Stack layout; function entry, exit and calling. */
460:
461: /* Define this if pushing a word on the stack
462: makes the stack pointer a smaller address. */
463: #define STACK_GROWS_DOWNWARD
464:
465: /* Define this if the nominal address of the stack frame
466: is at the high-address end of the local variables;
467: that is, each additional local variable allocated
468: goes at a more negative offset in the frame. */
469: #define FRAME_GROWS_DOWNWARD
470:
471: /* Offset within stack frame to start allocating local variables at.
472: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
473: first local allocated. Otherwise, it is the offset to the BEGINNING
474: of the first local allocated.
475: On the ROMP, if we set the frame pointer to 15 words below the highest
476: address of the highest local variable, the first 16 words will be
477: addressable via D-short insns. */
478: #define STARTING_FRAME_OFFSET 64
479:
480: /* If we generate an insn to push BYTES bytes,
481: this says how many the stack pointer really advances by.
482: On ROMP, don't define this because there are no push insns. */
483: /* #define PUSH_ROUNDING(BYTES) */
484:
485: /* Offset of first parameter from the argument pointer register value.
486: On the ROMP, we define the argument pointer to the start of the argument
487: area. */
488: #define FIRST_PARM_OFFSET(FNDECL) 0
489:
490: /* Define this if stack space is still allocated for a parameter passed
491: in a register. The value is the number of bytes. */
492: #define REG_PARM_STACK_SPACE(FNDECL) 16
493:
494: /* This is the difference between the logical top of stack and the actual sp.
495:
496: For the ROMP, sp points past the words allocated for the first four outgoing
497: arguments (they are part of the callee's frame). */
498: #define STACK_POINTER_OFFSET -16
499:
500: /* Define this if the maximum size of all the outgoing args is to be
501: accumulated and pushed during the prologue. The amount can be
502: found in the variable current_function_outgoing_args_size. */
503: #define ACCUMULATE_OUTGOING_ARGS
504:
505: /* Value is the number of bytes of arguments automatically
506: popped when returning from a subroutine call.
507: FUNTYPE is the data type of the function (as a tree),
508: or for a library call it is an identifier node for the subroutine name.
509: SIZE is the number of bytes of arguments passed on the stack. */
510:
511: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
512:
513: /* Define how to find the value returned by a function.
514: VALTYPE is the data type of the value (as a tree).
515: If the precise function being called is known, FUNC is its FUNCTION_DECL;
516: otherwise, FUNC is 0.
517:
518: On ROMP the value is found in r2, unless the machine specific option
519: fp-arg-in-fpregs is selected, in which case FP return values are in fr1 */
520:
521: #define FUNCTION_VALUE(VALTYPE, FUNC) \
522: gen_rtx (REG, TYPE_MODE (VALTYPE), \
523: (TARGET_FP_REGS && \
524: GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_FLOAT) ? 18 : 2)
525:
526: /* Define how to find the value returned by a library function
527: assuming the value has mode MODE. */
528:
529: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 2)
530:
531: /* The definition of this macro implies that there are cases where
532: a scalar value cannot be returned in registers.
533:
534: For the ROMP, if compatibility with HC is required, anything of
535: type DImode is returned in memory. */
536:
537: #define RETURN_IN_MEMORY(type) \
538: (TYPE_MODE (type) == BLKmode \
539: || (TARGET_HC_STRUCT_RETURN && TYPE_MODE (type) == DImode))
540:
541: /* 1 if N is a possible register number for a function value
542: as seen by the caller.
543:
544: On ROMP, r2 is the only register thus used unless fp values are to be
545: returned in fp regs, in which case fr1 is also used. */
546:
547: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || ((N) == 18 && TARGET_FP_REGS))
548:
549: /* 1 if N is a possible register number for function argument passing.
550: On ROMP, these are r2-r5 (and fr1-fr4 if fp regs are used). */
551:
552: #define FUNCTION_ARG_REGNO_P(N) \
553: (((N) <= 5 && (N) >= 2) || (TARGET_FP_REGS && (N) > 17 && (N) < 21))
554:
555: /* Define a data type for recording info about an argument list
556: during the scan of that argument list. This data type should
557: hold all necessary information about the function itself
558: and about the args processed so far, enough to enable macros
559: such as FUNCTION_ARG to determine where the next arg should go.
560:
561: On the ROMP, this is a structure. The first word is the number of
562: words of (integer only if -mfp-arg-in-fpregs is specified) arguments
563: scanned so far (including the invisible argument, if any, which holds
564: the structure-value-address). The second word hold the corresponding
565: value for floating-point arguments, except that both single and double
566: count as one register. */
567:
568: struct rt_cargs {int gregs, fregs; };
569: #define CUMULATIVE_ARGS struct rt_cargs
570:
571: #define USE_FP_REG(MODE,CUM) \
572: (TARGET_FP_REGS && GET_MODE_CLASS (MODE) == MODE_FLOAT \
573: && (CUM).fregs < 3)
574:
575: /* Define intermediate macro to compute the size (in registers) of an argument
576: for the ROMP. */
577:
578: #define ROMP_ARG_SIZE(MODE, TYPE, NAMED) \
579: (! (NAMED) ? 0 \
580: : (MODE) != BLKmode \
581: ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \
582: : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
583:
584: /* Initialize a variable CUM of type CUMULATIVE_ARGS
585: for a call to a function whose data type is FNTYPE.
586: For a library call, FNTYPE is 0.
587:
588: On ROMP, the offset normally starts at 0, but starts at 4 bytes
589: when the function gets a structure-value-address as an
590: invisible first argument. */
591:
592: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
593: (CUM).gregs = 0, \
594: (CUM).fregs = 0
595:
596: /* Update the data in CUM to advance over an argument
597: of mode MODE and data type TYPE.
598: (TYPE is null for libcalls where that information may not be available.) */
599:
600: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
601: { if (NAMED) \
602: { \
603: if (USE_FP_REG(MODE, CUM)) \
604: (CUM).fregs++; \
605: else \
606: (CUM).gregs += ROMP_ARG_SIZE (MODE, TYPE, NAMED); \
607: } \
608: }
609:
610: /* Determine where to put an argument to a function.
611: Value is zero to push the argument on the stack,
612: or a hard register in which to store the argument.
613:
614: MODE is the argument's machine mode.
615: TYPE is the data type of the argument (as a tree).
616: This is null for libcalls where that information may
617: not be available.
618: CUM is a variable of type CUMULATIVE_ARGS which gives info about
619: the preceding args and about the function being called.
620: NAMED is nonzero if this argument is a named parameter
621: (otherwise it is an extra parameter matching an ellipsis).
622:
623: On ROMP the first four words of args are normally in registers
624: and the rest are pushed. */
625:
626: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
627: (! (NAMED) ? 0 \
628: : ((TYPE) != 0 && TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST) ? 0 \
629: : USE_FP_REG(MODE,CUM) ? gen_rtx(REG, (MODE),(CUM.fregs) + 17) \
630: : (CUM).gregs < 4 ? gen_rtx(REG, (MODE), 2 + (CUM).gregs) : 0)
631:
632: /* For an arg passed partly in registers and partly in memory,
633: this is the number of registers used.
634: For args passed entirely in registers or entirely in memory, zero. */
635:
636: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
637: (! (NAMED) ? 0 \
638: : USE_FP_REG(MODE,CUM) ? 0 \
639: : (((CUM).gregs < 4 \
640: && 4 < ((CUM).gregs + ROMP_ARG_SIZE (MODE, TYPE, NAMED))) \
641: ? 4 - (CUM).gregs : 0))
642:
643: /* Perform any needed actions needed for a function that is receiving a
644: variable number of arguments.
645:
646: CUM is as above.
647:
648: MODE and TYPE are the mode and type of the current parameter.
649:
650: PRETEND_SIZE is a variable that should be set to the amount of stack
651: that must be pushed by the prolog to pretend that our caller pushed
652: it.
653:
654: Normally, this macro will push all remaining incoming registers on the
655: stack and set PRETEND_SIZE to the length of the registers pushed. */
656:
657: #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
658: { if (TARGET_FP_REGS) \
659: error ("can't have varargs with -mfp-arg-in-fp-regs"); \
660: else if ((CUM).gregs < 4) \
661: { \
662: int first_reg_offset = (CUM).gregs; \
663: \
664: if (MUST_PASS_IN_STACK (MODE, TYPE)) \
665: first_reg_offset += ROMP_ARG_SIZE (TYPE_MODE (TYPE), TYPE, 1); \
666: \
667: if (first_reg_offset > 4) \
668: first_reg_offset = 4; \
669: \
670: if (! NO_RTL && first_reg_offset != 4) \
671: move_block_from_reg \
672: (2 + first_reg_offset, \
673: gen_rtx (MEM, BLKmode, \
674: plus_constant (virtual_incoming_args_rtx, \
675: first_reg_offset * 4)), \
1.1.1.2 root 676: 4 - first_reg_offset, (4 - first_reg_offset) * UNITS_PER_WORD); \
1.1 root 677: PRETEND_SIZE = (4 - first_reg_offset) * UNITS_PER_WORD; \
678: } \
679: }
680:
681: /* This macro produces the initial definition of a function name.
682: On the ROMP, we need to place an extra '.' in the function name. */
683:
684: #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
685: { if (TREE_PUBLIC(DECL)) \
686: fprintf (FILE, "\t.globl _.%s\n", NAME); \
687: fprintf (FILE, "_.%s:\n", NAME); \
688: }
689:
690: /* This macro is used to output the start of the data area.
691:
692: On the ROMP, the _name is a pointer to the data area. At that
693: location is the address of _.name, which is really the name of
694: the function. We need to set all this up here.
695:
696: The global declaration of the data area, if needed, is done in
697: `assemble_function', where it thinks it is globalizing the function
698: itself. */
699:
700: #define ASM_OUTPUT_POOL_PROLOGUE(FILE, NAME, DECL, SIZE) \
701: { extern int data_offset; \
702: data_section (); \
703: fprintf (FILE, "\t.align 2\n"); \
704: ASM_OUTPUT_LABEL (FILE, NAME); \
705: fprintf (FILE, "\t.long _.%s, 0, ", NAME); \
706: if (current_function_calls_alloca) \
707: fprintf (FILE, "0x%x\n", \
708: 0xf6900000 + current_function_outgoing_args_size); \
709: else \
710: fprintf (FILE, "0\n"); \
711: data_offset = ((SIZE) + 12 + 3) / 4; \
712: }
713:
714: /* Select section for constant in constant pool.
715:
716: On ROMP, all constants are in the data area. */
717:
718: #define SELECT_RTX_SECTION(MODE, X) data_section ()
719:
720: /* This macro generates the assembly code for function entry.
721: FILE is a stdio stream to output the code to.
722: SIZE is an int: how many units of temporary storage to allocate.
723: Refer to the array `regs_ever_live' to determine which registers
724: to save; `regs_ever_live[I]' is nonzero if register number I
725: is ever used in the function. This macro is responsible for
726: knowing which registers should not be saved even if used. */
727:
728: #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE)
729:
730: /* Output assembler code to FILE to increment profiler label # LABELNO
731: for profiling a function entry. */
732:
733: #define FUNCTION_PROFILER(FILE, LABELNO) \
734: fprintf(FILE, "\tcas r0,r15,r0\n\tbali r15,mcount\n");
735:
736: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
737: the stack pointer does not matter. The value is tested only in
738: functions that have frame pointers.
739: No definition is equivalent to always zero. */
740: /* #define EXIT_IGNORE_STACK 1 */
741:
742: /* This macro generates the assembly code for function exit,
743: on machines that need it. If FUNCTION_EPILOGUE is not defined
744: then individual return instructions are generated for each
745: return statement. Args are same as for FUNCTION_PROLOGUE.
746:
747: The function epilogue should not depend on the current stack pointer!
748: It should use the frame pointer only. This is mandatory because
749: of alloca; we also take advantage of it to omit stack adjustments
750: before returning. */
751:
752: #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE)
753:
754: /* Output assembler code for a block containing the constant parts
755: of a trampoline, leaving space for the variable parts.
756:
757: The trampoline should set the static chain pointer to value placed
758: into the trampoline and should branch to the specified routine.
759:
760: On the ROMP, we have a problem. There are no free registers to use
761: to construct the static chain and function addresses. Hence we use
762: the following kludge: r15 (the return address) is first saved in mq.
763: Then we use r15 to form the function address. We then branch to the
764: function and restore r15 in the delay slot. This makes it appear that
765: the function was called directly from the caller.
766:
767: (Note that the function address built is actually that of the data block.
768: This is passed in r0 and the actual routine address is loaded into r15.)
769:
770: In addition, note that the address of the "called function", in this case
771: the trampoline, is actually the address of the data area. So we need to
772: make a fake data area that will contain the address of the trampoline.
773: Note that this must be defined as two half-words, since the trampoline
774: template (as opposed to the trampoline on the stack) is only half-word
775: aligned. */
776:
777: #define TRAMPOLINE_TEMPLATE(FILE) \
778: { \
779: fprintf (FILE, "\t.short 0,0\n"); \
780: fprintf (FILE, "\tcau r0,0(r0)\n"); \
781: fprintf (FILE, "\toil r0,r0,0\n"); \
782: fprintf (FILE, "\tmts r10,r15\n"); \
783: fprintf (FILE, "\tst r0,-36(r1)\n"); \
784: fprintf (FILE, "\tcau r15,0(r0)\n"); \
785: fprintf (FILE, "\toil r15,r15,0\n"); \
786: fprintf (FILE, "\tcas r0,r15,r0\n"); \
787: fprintf (FILE, "\tls r15,0(r15)\n"); \
788: fprintf (FILE, "\tbrx r15\n"); \
789: fprintf (FILE, "\tmfs r10,r15\n"); \
790: }
791:
792: /* Length in units of the trampoline for entering a nested function. */
793:
794: #define TRAMPOLINE_SIZE 36
795:
796: /* Emit RTL insns to initialize the variable parts of a trampoline.
797: FNADDR is an RTX for the address of the function's pure code.
798: CXT is an RTX for the static chain value for the function.
799:
800: On the RT, the static chain and function addresses are written in
801: two 16-bit sections.
802:
803: We also need to write the address of the first instruction in
804: the trampoline into the first word of the trampoline to simulate a
805: data area. */
806:
807: #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
808: { \
809: rtx _addr, _temp; \
810: rtx _val; \
811: \
812: _temp = expand_binop (SImode, add_optab, ADDR, \
813: gen_rtx (CONST_INT, VOIDmode, 4), \
814: 0, 1, OPTAB_LIB_WIDEN); \
815: emit_move_insn (gen_rtx (MEM, SImode, \
816: memory_address (SImode, ADDR)), _temp); \
817: \
818: _val = force_reg (SImode, CXT); \
819: _addr = memory_address (HImode, plus_constant (ADDR, 10)); \
820: emit_move_insn (gen_rtx (MEM, HImode, _addr), \
821: gen_lowpart (HImode, _val)); \
822: _temp = expand_shift (RSHIFT_EXPR, SImode, _val, \
823: build_int_2 (16, 0), 0, 1); \
824: _addr = memory_address (HImode, plus_constant (ADDR, 6)); \
825: emit_move_insn (gen_rtx (MEM, HImode, _addr), \
826: gen_lowpart (HImode, _temp)); \
827: \
828: _val = force_reg (SImode, FNADDR); \
829: _addr = memory_address (HImode, plus_constant (ADDR, 24)); \
830: emit_move_insn (gen_rtx (MEM, HImode, _addr), \
831: gen_lowpart (HImode, _val)); \
832: _temp = expand_shift (RSHIFT_EXPR, SImode, _val, \
833: build_int_2 (16, 0), 0, 1); \
834: _addr = memory_address (HImode, plus_constant (ADDR, 20)); \
835: emit_move_insn (gen_rtx (MEM, HImode, _addr), \
836: gen_lowpart (HImode, _temp)); \
837: \
838: }
839:
840: /* Definitions for register eliminations.
841:
842: We have two registers that can be eliminated on the ROMP. First, the
843: frame pointer register can often be eliminated in favor of the stack
844: pointer register. Secondly, the argument pointer register can always be
845: eliminated; it is replaced with either the stack or frame pointer.
846:
847: In addition, we use the elimination mechanism to see if r14 is needed.
848: Initially we assume that it isn't. If it is, we spill it. This is done
849: by making it an eliminable register. It doesn't matter what we replace
850: it with, since it will never occur in the rtl at this point. */
851:
852: /* This is an array of structures. Each structure initializes one pair
853: of eliminable registers. The "from" register number is given first,
854: followed by "to". Eliminations of the same "from" register are listed
855: in order of preference. */
856: #define ELIMINABLE_REGS \
857: {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
858: { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
859: { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
860: { 14, 0}}
861:
862: /* Given FROM and TO register numbers, say whether this elimination is allowed.
863: Frame pointer elimination is automatically handled.
864:
865: For the ROMP, if frame pointer elimination is being done, we would like to
866: convert ap into fp, not sp.
867:
868: We need r14 if various conditions (tested in romp_using_r14) are true.
869:
870: All other eliminations are valid. */
871: #define CAN_ELIMINATE(FROM, TO) \
872: ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
873: ? ! frame_pointer_needed \
874: : (FROM) == 14 ? ! romp_using_r14 () \
875: : 1)
876:
877: /* Define the offset between two registers, one to be eliminated, and the other
878: its replacement, at the start of a routine. */
879: #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
880: { if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
881: { \
882: if (romp_pushes_stack ()) \
883: (OFFSET) = ((get_frame_size () - 64) \
884: + current_function_outgoing_args_size); \
885: else \
886: (OFFSET) = - (romp_sa_size () + 64); \
887: } \
888: else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
889: (OFFSET) = romp_sa_size () - 16 + 64; \
890: else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
891: { \
892: if (romp_pushes_stack ()) \
893: (OFFSET) = (get_frame_size () + (romp_sa_size () - 16) \
894: + current_function_outgoing_args_size); \
895: else \
896: (OFFSET) = -16; \
897: } \
898: else if ((FROM) == 14) \
899: (OFFSET) = 0; \
900: else \
901: abort (); \
902: }
903:
904: /* Addressing modes, and classification of registers for them. */
905:
906: /* #define HAVE_POST_INCREMENT */
907: /* #define HAVE_POST_DECREMENT */
908:
909: /* #define HAVE_PRE_DECREMENT */
910: /* #define HAVE_PRE_INCREMENT */
911:
912: /* Macros to check register numbers against specific register classes. */
913:
914: /* These assume that REGNO is a hard or pseudo reg number.
915: They give nonzero only if REGNO is a hard reg of the suitable class
916: or a pseudo reg currently allocated to a suitable hard reg.
917: Since they use reg_renumber, they are safe only once reg_renumber
918: has been allocated, which happens in local-alloc.c. */
919:
920: #define REGNO_OK_FOR_INDEX_P(REGNO) 0
921: #define REGNO_OK_FOR_BASE_P(REGNO) \
922: ((REGNO) < FIRST_PSEUDO_REGISTER \
923: ? (REGNO) < 16 && (REGNO) != 0 && (REGNO) != 16 \
924: : (reg_renumber[REGNO] < 16 && reg_renumber[REGNO] >= 0 \
925: && reg_renumber[REGNO] != 16))
926:
927: /* Maximum number of registers that can appear in a valid memory address. */
928:
929: #define MAX_REGS_PER_ADDRESS 1
930:
931: /* Recognize any constant value that is a valid address. */
932:
933: #define CONSTANT_ADDRESS_P(X) \
934: (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
935: || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
936: || GET_CODE (X) == HIGH)
937:
938: /* Nonzero if the constant value X is a legitimate general operand.
939: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
940:
941: On the ROMP, there is a bit of a hack here. Basically, we wish to
942: only issue instructions that are not `as' macros. However, in the
943: case of `get', `load', and `store', if the operand is a relocatable
944: symbol (possibly +/- an integer), there is no way to express the
945: resulting split-relocation except with the macro. Therefore, allow
946: either a constant valid in a normal (sign-extended) D-format insn or
947: a relocatable expression.
948:
949: Also, for DFmode and DImode, we must ensure that both words are
950: addressable.
951:
952: We define two macros: The first is given an offset (0 or 4) and indicates
953: that the operand is a CONST_INT that is valid for that offset. The second
954: indicates a valid non-CONST_INT constant. */
955:
956: #define LEGITIMATE_ADDRESS_INTEGER_P(X,OFFSET) \
957: (GET_CODE (X) == CONST_INT \
958: && (unsigned) (INTVAL (X) + (OFFSET) + 0x8000) < 0x10000)
959:
960: #define LEGITIMATE_ADDRESS_CONSTANT_P(X) \
961: (GET_CODE (X) == SYMBOL_REF \
962: || GET_CODE (X) == LABEL_REF \
963: || (GET_CODE (X) == CONST \
964: && (GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \
965: || GET_CODE (XEXP (XEXP (X, 0), 0)) == LABEL_REF) \
966: && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT))
967:
968: /* Include all constant integers and constant double, but exclude
969: SYMBOL_REFs that are to be obtained from the data area (see below). */
970: #define LEGITIMATE_CONSTANT_P(X) \
971: ((LEGITIMATE_ADDRESS_CONSTANT_P (X) \
972: || GET_CODE (X) == CONST_INT \
973: || GET_CODE (X) == CONST_DOUBLE) \
974: && ! (GET_CODE (X) == SYMBOL_REF && SYMBOL_REF_FLAG (X)))
975:
976: /* For no good reason, we do the same as the other RT compilers and load
977: the addresses of data areas for a function from our data area. That means
978: that we need to mark such SYMBOL_REFs. We do so here. */
979: #define ENCODE_SECTION_INFO(DECL) \
980: if (TREE_CODE (TREE_TYPE (DECL)) == FUNCTION_TYPE) \
981: SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1;
982:
983: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
984: and check its validity for a certain class.
985: We have two alternate definitions for each of them.
986: The usual definition accepts all pseudo regs; the other rejects
987: them unless they have been allocated suitable hard regs.
988: The symbol REG_OK_STRICT causes the latter definition to be used.
989:
990: Most source files want to accept pseudo regs in the hope that
991: they will get allocated to the class that the insn wants them to be in.
992: Source files for reload pass need to be strict.
993: After reload, it makes no difference, since pseudo regs have
994: been eliminated by then. */
995:
996: #ifndef REG_OK_STRICT
997:
998: /* Nonzero if X is a hard reg that can be used as an index
999: or if it is a pseudo reg. */
1000: #define REG_OK_FOR_INDEX_P(X) 0
1001: /* Nonzero if X is a hard reg that can be used as a base reg
1002: or if it is a pseudo reg. */
1003: #define REG_OK_FOR_BASE_P(X) \
1004: (REGNO (X) != 0 && (REGNO (X) < 17 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1005:
1006: #else
1007:
1008: /* Nonzero if X is a hard reg that can be used as an index. */
1009: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1010: /* Nonzero if X is a hard reg that can be used as a base reg. */
1011: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1012:
1013: #endif
1014:
1015: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1016: that is a valid memory address for an instruction.
1017: The MODE argument is the machine mode for the MEM expression
1018: that wants to use this address.
1019:
1020: On the ROMP, a legitimate address is either a legitimate constant,
1021: a register plus a legitimate constant, or a register. See the
1022: discussion at the LEGITIMATE_ADDRESS_CONSTANT_P macro. */
1023: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1024: { if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1025: goto ADDR; \
1026: if (GET_CODE (X) != CONST_INT && LEGITIMATE_ADDRESS_CONSTANT_P (X)) \
1027: goto ADDR; \
1028: if (GET_CODE (X) == PLUS \
1029: && GET_CODE (XEXP (X, 0)) == REG \
1030: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1031: && LEGITIMATE_ADDRESS_CONSTANT_P (XEXP (X, 1))) \
1032: goto ADDR; \
1033: if (GET_CODE (X) == PLUS \
1034: && GET_CODE (XEXP (X, 0)) == REG \
1035: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1036: && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 0) \
1037: && (((MODE) != DFmode && (MODE) != DImode) \
1038: || (LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 4)))) \
1039: goto ADDR; \
1040: }
1041:
1042: /* Try machine-dependent ways of modifying an illegitimate address
1043: to be legitimate. If we find one, return the new, valid address.
1044: This macro is used in only one place: `memory_address' in explow.c.
1045:
1046: OLDX is the address as it was before break_out_memory_refs was called.
1047: In some cases it is useful to look at this to decide what needs to be done.
1048:
1049: MODE and WIN are passed so that this macro can use
1050: GO_IF_LEGITIMATE_ADDRESS.
1051:
1052: It is always safe for this macro to do nothing. It exists to recognize
1053: opportunities to optimize the output.
1054:
1055: On ROMP, check for the sum of a register with a constant
1056: integer that is out of range. If so, generate code to add the
1057: constant with the low-order 16 bits masked to the register and force
1058: this result into another register (this can be done with `cau').
1059: Then generate an address of REG+(CONST&0xffff), allowing for the
1060: possibility of bit 16 being a one.
1061:
1062: If the register is not OK for a base register, abort. */
1063:
1064: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1065: { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1066: && GET_CODE (XEXP (X, 1)) == CONST_INT \
1067: && (unsigned) (INTVAL (XEXP (X, 1)) + 0x8000) >= 0x10000) \
1068: { int high_int, low_int; \
1069: if (! REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1070: abort (); \
1071: high_int = INTVAL (XEXP (X, 1)) >> 16; \
1072: low_int = INTVAL (XEXP (X, 1)) & 0xffff; \
1073: if (low_int & 0x8000) \
1074: high_int += 1, low_int |= 0xffff0000; \
1075: (X) = gen_rtx (PLUS, SImode, \
1076: force_operand \
1077: (gen_rtx (PLUS, SImode, XEXP (X, 0), \
1078: gen_rtx (CONST_INT, VOIDmode, \
1079: high_int << 16)), 0),\
1080: gen_rtx (CONST_INT, VOIDmode, low_int)); \
1081: } \
1082: }
1083:
1084: /* Go to LABEL if ADDR (a legitimate address expression)
1085: has an effect that depends on the machine mode it is used for.
1086:
1087: On the ROMP this is true only if the address is valid with a zero offset
1088: but not with an offset of four (this means it cannot be used as an
1089: address for DImode or DFmode). Since we know it is valid, we just check
1090: for an address that is not valid with an offset of four. */
1091:
1092: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1093: { if (GET_CODE (ADDR) == PLUS \
1094: && ! LEGITIMATE_ADDRESS_CONSTANT_P (XEXP (ADDR, 1)) \
1095: && ! LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 4)) \
1096: goto LABEL; \
1097: }
1098:
1099: /* Define this if some processing needs to be done immediately before
1100: emitting code for an insn.
1101:
1102: This is used on the ROMP, to compensate for a bug in the floating-point
1103: code. When a floating-point operation is done with the first and third
1104: operands both the same floating-point register, it will generate bad code
1105: for the MC68881. So we must detect this. If it occurs, we patch the
1106: first operand to be fr0 and insert a move insn to move it to the desired
1107: destination. */
1108: #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) \
1109: { rtx op0, op1, op2, operation, tem; \
1110: if (NOPERANDS >= 3 && get_attr_type (INSN) == TYPE_FP) \
1111: { \
1112: op0 = OPERANDS[0]; \
1113: operation = OPERANDS[1]; \
1114: if (float_conversion (operation, VOIDmode)) \
1115: operation = XEXP (operation, 0); \
1116: if (float_binary (operation, VOIDmode)) \
1117: { \
1118: op1 = XEXP (operation, 0), op2 = XEXP (operation, 1); \
1119: if (float_conversion (op1, VOIDmode)) \
1120: op1 = XEXP (op1, 0); \
1121: if (float_conversion (op2, VOIDmode)) \
1122: op2 = XEXP (op2, 0); \
1123: if (rtx_equal_p (op0, op2) \
1124: && (GET_CODE (operation) == PLUS \
1125: || GET_CODE (operation) == MULT)) \
1126: tem = op1, op1 = op2, op2 = tem; \
1127: if (GET_CODE (op0) == REG && FP_REGNO_P (REGNO (op0)) \
1128: && GET_CODE (op2) == REG && FP_REGNO_P (REGNO (op2)) \
1129: && REGNO (op0) == REGNO (op2)) \
1130: { \
1131: tem = gen_rtx (REG, GET_MODE (op0), 17); \
1132: emit_insn_after (gen_move_insn (op0, tem), INSN); \
1133: SET_DEST (XVECEXP (PATTERN (INSN), 0, 0)) = tem; \
1134: OPERANDS[0] = tem; \
1135: } \
1136: } \
1137: } \
1138: }
1139:
1140: /* Specify the machine mode that this machine uses
1141: for the index in the tablejump instruction. */
1142: #define CASE_VECTOR_MODE SImode
1143:
1144: /* Define this if the tablejump instruction expects the table
1145: to contain offsets from the address of the table.
1146: Do not define this if the table should contain absolute addresses. */
1147: /* #define CASE_VECTOR_PC_RELATIVE */
1148:
1149: /* Specify the tree operation to be used to convert reals to integers. */
1150: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1151:
1152: /* This is the kind of divide that is easiest to do in the general case. */
1153: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1154:
1155: /* Define this as 1 if `char' should by default be signed; else as 0. */
1156: #define DEFAULT_SIGNED_CHAR 0
1157:
1158: /* This flag, if defined, says the same insns that convert to a signed fixnum
1159: also convert validly to an unsigned one.
1160:
1161: We actually lie a bit here as overflow conditions are different. But
1162: they aren't being checked anyway. */
1163:
1164: #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
1165:
1166: /* Max number of bytes we can move from memory to memory
1167: in one reasonably fast instruction. */
1168: #define MOVE_MAX 4
1169:
1170: /* Nonzero if access to memory by bytes is no faster than for words.
1171: Also non-zero if doing byte operations (specifically shifts) in registers
1172: is undesirable. */
1173: #define SLOW_BYTE_ACCESS 1
1174:
1.1.1.2 root 1175: /* Define if operations between registers always perform the operation
1176: on the full register even if a narrower mode is specified. */
1177: #define WORD_REGISTER_OPERATIONS
1178:
1179: /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1180: will either zero-extend or sign-extend. The value of this macro should
1181: be the code that says which one of the two operations is implicitly
1182: done, NIL if none. */
1183: #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1.1 root 1184:
1185: /* This is BSD, so it wants DBX format. */
1186: #define DBX_DEBUGGING_INFO
1187:
1.1.1.2 root 1188: /* Define the letter code used in a stabs entry for parameters passed
1189: with the register attribute.
1190:
1191: GCC's default value, 'P', is used by dbx to refers to an external
1192: procedure. The section 5 manual page for dbx implies that 'R' would be the
1193: right letter, but dbx 1.5 has a bug in it that precludes its use.
1194: Probably that is why neither hc or pcc use this. pcc puts in two
1195: stabs entries: one for the parameter location and one for the register
1196: location. The letter `r' (register)
1197: would be okay, but it loses parameter attribute of the stabs entry. */
1198: #define DBX_REGPARM_STABS_LETTER 'R'
1199:
1200: /* A C expression for the integer offset value of an automatic variable
1201: (N_LSYM) having address X (an RTX). This gets used in .stabs entries
1202: for the local variables. Compare with the default definition. */
1203: extern int romp_debugger_auto_correction();
1204: #define DEBUGGER_AUTO_OFFSET(X) \
1205: (GET_CODE (X) == PLUS \
1206: ? romp_debugger_auto_correction (INTVAL (XEXP (X, 1)) ) \
1207: : 0 )
1208:
1209: /* A C expression for the integer offset value of an argument (N_PSYM)
1210: having address X (an RTX). The nominal offset is OFFSET. */
1211: extern int romp_debugger_arg_correction();
1212: #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
1213: romp_debugger_arg_correction (OFFSET);
1214:
1.1 root 1215: /* We don't have GAS for the RT yet, so don't write out special
1216: .stabs in cc1plus. */
1217:
1218: #define FASCIST_ASSEMBLER
1219:
1220: /* Do not break .stabs pseudos into continuations. */
1221: #define DBX_CONTIN_LENGTH 0
1222:
1223: /* Don't try to use the `x' type-cross-reference character in DBX data.
1224: Also has the consequence of putting each struct, union or enum
1225: into a separate .stabs, containing only cross-refs to the others. */
1226: #define DBX_NO_XREFS
1227:
1228: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1229: is done just by pretending it is already truncated. */
1230: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1231:
1232: /* Specify the machine mode that pointers have.
1233: After generation of rtl, the compiler makes no further distinction
1234: between pointers and any other objects of this machine mode. */
1235: #define Pmode SImode
1236:
1237: /* Mode of a function address in a call instruction (for indexing purposes).
1238:
1239: Doesn't matter on ROMP. */
1240: #define FUNCTION_MODE SImode
1241:
1242: /* Define this if addresses of constant functions
1243: shouldn't be put through pseudo regs where they can be cse'd.
1244: Desirable on machines where ordinary constants are expensive
1245: but a CALL with constant address is cheap. */
1246: #define NO_FUNCTION_CSE
1247:
1248: /* Define this if shift instructions ignore all but the low-order
1249: few bits.
1250:
1251: This is not true on the RT since it uses the low-order 6, not 5, bits.
1252: At some point, this should be extended to see how to express that. */
1253:
1254: /* #define SHIFT_COUNT_TRUNCATED */
1255:
1256: /* Compute the cost of computing a constant rtl expression RTX whose
1257: rtx-code is CODE, contained within an expression of code OUTER_CODE.
1258: The body of this macro is a portion of a switch statement. If the
1259: code is computed here, return it with a return statement. Otherwise,
1260: break from the switch. */
1261:
1262: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1263: case CONST_INT: \
1264: if ((OUTER_CODE) == IOR && exact_log2 (INTVAL (RTX)) >= 0 \
1265: || (OUTER_CODE) == AND && exact_log2 (~INTVAL (RTX)) >= 0 \
1266: || (((OUTER_CODE) == PLUS || (OUTER_CODE) == MINUS) \
1267: && (unsigned int) (INTVAL (RTX) + 15) < 31) \
1268: || ((OUTER_CODE) == SET && (unsigned int) INTVAL (RTX) < 16))\
1269: return 0; \
1270: return ((unsigned int) (INTVAL(RTX) + 0x8000) < 0x10000 \
1271: || (INTVAL (RTX) & 0xffff0000) == 0) ? 0 : COSTS_N_INSNS (2);\
1272: case CONST: \
1273: case LABEL_REF: \
1274: case SYMBOL_REF: \
1275: if (current_function_operand (RTX, Pmode)) return 0; \
1276: return COSTS_N_INSNS (2); \
1277: case CONST_DOUBLE: \
1278: if ((RTX) == CONST0_RTX (GET_MODE (RTX))) return 2; \
1279: return ((GET_MODE_CLASS (GET_MODE (RTX)) == MODE_FLOAT) \
1280: ? COSTS_N_INSNS (5) : COSTS_N_INSNS (4));
1281:
1282: /* Provide the costs of a rtl expression. This is in the body of a
1283: switch on CODE.
1284:
1285: References to our own data area are really references to r14, so they
1286: are very cheap. Multiples and divides are very expensive. */
1287:
1288: #define RTX_COSTS(X,CODE,OUTER_CODE) \
1289: case MEM: \
1290: return current_function_operand (X, Pmode) ? 0 : COSTS_N_INSNS (2); \
1291: case MULT: \
1292: return (TARGET_IN_LINE_MUL && GET_MODE_CLASS (GET_MODE (X)) == MODE_INT)\
1293: ? COSTS_N_INSNS (19) : COSTS_N_INSNS (25); \
1294: case DIV: \
1295: case UDIV: \
1296: case MOD: \
1297: case UMOD: \
1298: return COSTS_N_INSNS (45);
1299:
1300: /* Compute the cost of an address. This is meant to approximate the size
1301: and/or execution delay of an insn using that address. If the cost is
1302: approximated by the RTL complexity, including CONST_COSTS above, as
1303: is usually the case for CISC machines, this macro should not be defined.
1304: For aggressively RISCy machines, only one insn format is allowed, so
1305: this macro should be a constant. The value of this macro only matters
1306: for valid addresses.
1307:
1308: For the ROMP, everything is cost 0 except for addresses involving
1309: symbolic constants, which are cost 1. */
1310:
1311: #define ADDRESS_COST(RTX) \
1312: ((GET_CODE (RTX) == SYMBOL_REF \
1313: && ! CONSTANT_POOL_ADDRESS_P (RTX)) \
1314: || GET_CODE (RTX) == LABEL_REF \
1315: || (GET_CODE (RTX) == CONST \
1316: && ! constant_pool_address_operand (RTX, Pmode)) \
1317: || (GET_CODE (RTX) == PLUS \
1318: && ((GET_CODE (XEXP (RTX, 1)) == SYMBOL_REF \
1319: && ! CONSTANT_POOL_ADDRESS_P (XEXP (RTX, 0))) \
1320: || GET_CODE (XEXP (RTX, 1)) == LABEL_REF \
1321: || GET_CODE (XEXP (RTX, 1)) == CONST)))
1322:
1323: /* Adjust the length of an INSN. LENGTH is the currently-computed length and
1324: should be adjusted to reflect any required changes. This macro is used when
1325: there is some systematic length adjustment required that would be difficult
1326: to express in the length attribute.
1327:
1328: On the ROMP, there are two adjustments: First, a 2-byte insn in the delay
1329: slot of a CALL (including floating-point operations) actually takes four
1330: bytes. Second, we have to make the worst-case alignment assumption for
1331: address vectors. */
1332:
1333: #define ADJUST_INSN_LENGTH(X,LENGTH) \
1334: if (GET_CODE (X) == INSN && GET_CODE (PATTERN (X)) == SEQUENCE \
1335: && GET_CODE (XVECEXP (PATTERN (X), 0, 0)) != JUMP_INSN \
1336: && get_attr_length (XVECEXP (PATTERN (X), 0, 1)) == 2) \
1337: (LENGTH) += 2; \
1338: else if (GET_CODE (X) == JUMP_INSN && GET_CODE (PATTERN (X)) == ADDR_VEC) \
1339: (LENGTH) += 2;
1340:
1341: /* Tell final.c how to eliminate redundant test instructions. */
1342:
1343: /* Here we define machine-dependent flags and fields in cc_status
1344: (see `conditions.h'). */
1345:
1346: /* Set if condition code (really not-Z) is stored in `test bit'. */
1347: #define CC_IN_TB 01000
1348:
1349: /* Set if condition code is set by an unsigned compare. */
1350: #define CC_UNSIGNED 02000
1351:
1352: /* Store in cc_status the expressions
1353: that the condition codes will describe
1354: after execution of an instruction whose pattern is EXP.
1355: Do not alter them if the instruction would not alter the cc's. */
1356:
1357: #define NOTICE_UPDATE_CC(BODY,INSN) \
1358: update_cc (BODY, INSN)
1359:
1360: /* Control the assembler format that we output. */
1361:
1362: /* Output at beginning of assembler file. */
1363:
1364: #define ASM_FILE_START(FILE) \
1365: { extern char *version_string; \
1366: char *p; \
1367: \
1368: fprintf (FILE, "\t.globl .oVncs\n\t.set .oVncs,0\n") ; \
1369: fprintf (FILE, "\t.globl .oVgcc"); \
1370: for (p = version_string; *p != ' ' && *p != 0; p++) \
1371: fprintf (FILE, "%c", *p); \
1372: fprintf (FILE, "\n\t.set .oVgcc"); \
1373: for (p = version_string; *p != ' ' && *p != 0; p++) \
1374: fprintf (FILE, "%c", *p); \
1375: fprintf (FILE, ",0\n"); \
1376: }
1377:
1378: /* Output to assembler file text saying following lines
1379: may contain character constants, extra white space, comments, etc. */
1380:
1381: #define ASM_APP_ON ""
1382:
1383: /* Output to assembler file text saying following lines
1384: no longer contain unusual constructs. */
1385:
1386: #define ASM_APP_OFF ""
1387:
1388: /* Output before instructions and read-only data. */
1389:
1390: #define TEXT_SECTION_ASM_OP ".text"
1391:
1392: /* Output before writable data. */
1393:
1394: #define DATA_SECTION_ASM_OP ".data"
1395:
1396: /* How to refer to registers in assembler output.
1397: This sequence is indexed by compiler's hard-register-number (see above). */
1398:
1399: #define REGISTER_NAMES \
1400: {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \
1401: "r10", "r11", "r12", "r13", "r14", "r15", "ap", \
1402: "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7" }
1403:
1404: /* How to renumber registers for dbx and gdb. */
1405:
1406: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1407:
1408: /* This is how to output the definition of a user-level label named NAME,
1409: such as the label on a static function or variable NAME. */
1410:
1411: #define ASM_OUTPUT_LABEL(FILE,NAME) \
1412: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1413:
1414: /* This is how to output a command to make the user-level label named NAME
1415: defined for reference from other files. */
1416:
1417: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1418: do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1419:
1420: /* This is how to output a reference to a user-level label named NAME.
1421: `assemble_name' uses this. */
1422:
1423: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1424: fprintf (FILE, "_%s", NAME)
1425:
1426: /* This is how to output an internal numbered label where
1427: PREFIX is the class of label and NUM is the number within the class. */
1428:
1429: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1430: fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1431:
1432: /* This is how to output a label for a jump table. Arguments are the same as
1433: for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is
1434: passed. */
1435:
1436: #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1437: { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
1438:
1439: /* This is how to store into the string LABEL
1440: the symbol_ref name of an internal numbered label where
1441: PREFIX is the class of label and NUM is the number within the class.
1442: This is suitable for output with `assemble_name'. */
1443:
1444: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1445: sprintf (LABEL, "*%s%d", PREFIX, NUM)
1446:
1447: /* This is how to output an assembler line defining a `double' constant. */
1448:
1449: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1450: fprintf (FILE, "\t.double 0d%.20e\n", (VALUE))
1451:
1452: /* This is how to output an assembler line defining a `float' constant.
1453:
1454: WARNING: Believe it or not, the ROMP assembler has a bug in its
1455: handling of single-precision floating-point values making it impossible
1456: to output such values in the expected way. Therefore, it must be output
1457: in hex. THIS WILL NOT WORK IF CROSS-COMPILING FROM A MACHINE THAT DOES
1458: NOT USE IEEE-FORMAT FLOATING-POINT, but there is nothing that can be done
1459: about it short of fixing the assembler. */
1460:
1461: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1462: do { union { int i; float f; } u_i_f; \
1463: u_i_f.f = (VALUE); \
1464: fprintf (FILE, "\t.long 0x%x\n", u_i_f.i);\
1465: } while (0)
1466:
1467: /* This is how to output an assembler line defining an `int' constant. */
1468:
1469: #define ASM_OUTPUT_INT(FILE,VALUE) \
1470: ( fprintf (FILE, "\t.long "), \
1471: output_addr_const (FILE, (VALUE)), \
1472: fprintf (FILE, "\n"))
1473:
1474: /* Likewise for `char' and `short' constants. */
1475:
1476: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1477: ( fprintf (FILE, "\t.short "), \
1478: output_addr_const (FILE, (VALUE)), \
1479: fprintf (FILE, "\n"))
1480:
1481: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1482: ( fprintf (FILE, "\t.byte "), \
1483: output_addr_const (FILE, (VALUE)), \
1484: fprintf (FILE, "\n"))
1485:
1486: /* This is how to output an assembler line for a numeric constant byte. */
1487:
1488: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1489: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1490:
1491: /* This is how to output code to push a register on the stack.
1492: It need not be very fast code. */
1493:
1494: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1495: fprintf (FILE, "\tsis r1,4\n\tsts %s,0(r1)\n", reg_names[REGNO])
1496:
1497: /* This is how to output an insn to pop a register from the stack.
1498: It need not be very fast code. */
1499:
1500: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1501: fprintf (FILE, "\tls r1,0(r1)\n\tais r1,4\n", reg_names[REGNO])
1502:
1503: /* This is how to output an element of a case-vector that is absolute. */
1504:
1505: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1506: fprintf (FILE, "\t.long L%d\n", VALUE)
1507:
1508: /* This is how to output an element of a case-vector that is relative.
1509: (ROMP does not use such vectors,
1510: but we must define this macro anyway.) */
1511:
1512: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) abort ()
1513:
1514: /* This is how to output an assembler line
1515: that says to advance the location counter
1516: to a multiple of 2**LOG bytes. */
1517:
1518: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1519: if ((LOG) != 0) \
1520: fprintf (FILE, "\t.align %d\n", (LOG))
1521:
1522: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1523: fprintf (FILE, "\t.space %d\n", (SIZE))
1524:
1525: /* This says how to output an assembler line
1526: to define a global common symbol. */
1527:
1528: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1529: ( fputs (".comm ", (FILE)), \
1530: assemble_name ((FILE), (NAME)), \
1531: fprintf ((FILE), ",%d\n", (SIZE)))
1532:
1533: /* This says how to output an assembler line
1534: to define a local common symbol. */
1535:
1536: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1537: ( fputs (".lcomm ", (FILE)), \
1538: assemble_name ((FILE), (NAME)), \
1539: fprintf ((FILE), ",%d\n", (SIZE)))
1540:
1541: /* Store in OUTPUT a string (made with alloca) containing
1542: an assembler-name for a local static variable named NAME.
1543: LABELNO is an integer which is different for each call. */
1544:
1545: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1546: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1547: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1548:
1549: /* Define the parentheses used to group arithmetic operations
1550: in assembler code. */
1551:
1552: #define ASM_OPEN_PAREN "("
1553: #define ASM_CLOSE_PAREN ")"
1554:
1555: /* Define results of standard character escape sequences. */
1556: #define TARGET_BELL 007
1557: #define TARGET_BS 010
1558: #define TARGET_TAB 011
1559: #define TARGET_NEWLINE 012
1560: #define TARGET_VT 013
1561: #define TARGET_FF 014
1562: #define TARGET_CR 015
1563:
1564: /* Print operand X (an rtx) in assembler syntax to file FILE.
1565: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1566: For `%' followed by punctuation, CODE is the punctuation and X is null. */
1567:
1568: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1569:
1570: /* Define which CODE values are valid. */
1571:
1572: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1573: ((CODE) == '.' || (CODE) == '#')
1574:
1575: /* Print a memory address as an operand to reference that memory location. */
1576:
1577: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1578: { register rtx addr = ADDR; \
1579: register rtx base = 0, offset = addr; \
1580: if (GET_CODE (addr) == REG) \
1581: base = addr, offset = const0_rtx; \
1582: else if (GET_CODE (addr) == PLUS \
1583: && GET_CODE (XEXP (addr, 0)) == REG) \
1584: base = XEXP (addr, 0), offset = XEXP (addr, 1); \
1585: else if (GET_CODE (addr) == SYMBOL_REF \
1586: && CONSTANT_POOL_ADDRESS_P (addr)) \
1587: { \
1588: offset = gen_rtx (CONST_INT, VOIDmode, get_pool_offset (addr) + 12); \
1589: base = gen_rtx (REG, SImode, 14); \
1590: } \
1591: else if (GET_CODE (addr) == CONST \
1592: && GET_CODE (XEXP (addr, 0)) == PLUS \
1593: && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT \
1594: && GET_CODE (XEXP (XEXP (addr, 0), 0)) == SYMBOL_REF \
1595: && CONSTANT_POOL_ADDRESS_P (XEXP (XEXP (addr, 0), 0))) \
1596: { \
1597: offset = plus_constant (XEXP (XEXP (addr, 0), 1), \
1598: (get_pool_offset (XEXP (XEXP (addr, 0), 0)) \
1599: + 12)); \
1600: base = gen_rtx (REG, SImode, 14); \
1601: } \
1602: output_addr_const (FILE, offset); \
1603: if (base) \
1604: fprintf (FILE, "(%s)", reg_names [REGNO (base)]); \
1605: }
1606:
1607: /* Define the codes that are matched by predicates in aux-output.c. */
1608:
1609: #define PREDICATE_CODES \
1610: {"zero_memory_operand", {SUBREG, MEM}}, \
1611: {"short_memory_operand", {SUBREG, MEM}}, \
1612: {"symbolic_memory_operand", {SUBREG, MEM}}, \
1613: {"current_function_operand", {MEM}}, \
1614: {"constant_pool_address_operand", {SUBREG, CONST}}, \
1615: {"romp_symbolic_operand", {LABEL_REF, SYMBOL_REF, CONST}}, \
1616: {"constant_operand", {LABEL_REF, SYMBOL_REF, PLUS, CONST, CONST_INT}}, \
1617: {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
1618: {"reg_or_any_cint_operand", {SUBREG, REG, CONST_INT}}, \
1619: {"short_cint_operand", {CONST_INT}}, \
1620: {"reg_or_D_operand", {SUBREG, REG, CONST_INT}}, \
1621: {"reg_or_add_operand", {SUBREG, REG, LABEL_REF, SYMBOL_REF, \
1622: PLUS, CONST, CONST_INT}}, \
1623: {"reg_or_and_operand", {SUBREG, REG, CONST_INT}}, \
1624: {"reg_or_mem_operand", {SUBREG, REG, MEM}}, \
1625: {"reg_or_nonsymb_mem_operand", {SUBREG, REG, MEM}}, \
1626: {"romp_operand", {SUBREG, MEM, REG, CONST_INT, CONST, LABEL_REF, \
1627: SYMBOL_REF, CONST_DOUBLE}}, \
1628: {"reg_0_operand", {REG}}, \
1629: {"reg_15_operand", {REG}}, \
1630: {"float_binary", {PLUS, MINUS, MULT, DIV}}, \
1631: {"float_unary", {NEG, ABS}}, \
1632: {"float_conversion", {FLOAT_TRUNCATE, FLOAT_EXTEND, FLOAT, FIX}},
1633:
1634: /* Define functions defined in aux-output.c and used in templates. */
1635:
1636: extern char *output_in_line_mul ();
1637: extern char *output_fpop ();
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