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1.1 root 1: /* Definitions of target machine for GNU compiler, for ROMP chip. 1.1.1.4 ! root 2: Copyright (C) 1989, 1991, 1993, 1995 Free Software Foundation, Inc. 1.1 root 3: Contributed by Richard Kenner ([email protected]) 4: 5: This file is part of GNU CC. 6: 7: GNU CC is free software; you can redistribute it and/or modify 8: it under the terms of the GNU General Public License as published by 9: the Free Software Foundation; either version 2, or (at your option) 10: any later version. 11: 12: GNU CC is distributed in the hope that it will be useful, 13: but WITHOUT ANY WARRANTY; without even the implied warranty of 14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15: GNU General Public License for more details. 16: 17: You should have received a copy of the GNU General Public License 18: along with GNU CC; see the file COPYING. If not, write to 1.1.1.4 ! root 19: the Free Software Foundation, 59 Temple Place - Suite 330, ! 20: Boston, MA 02111-1307, USA. */ 1.1 root 21: 22: 23: /* Names to predefine in the preprocessor for this target machine. */ 24: 1.1.1.2 root 25: #define CPP_PREDEFINES "-Dibm032 -Dunix -Asystem(unix) -Asystem(bsd) -Acpu(ibm032) -Amachine(ibm032)" 1.1 root 26: 27: /* Print subsidiary information on the compiler version in use. */ 28: #define TARGET_VERSION ; 29: 30: /* Add -lfp_p when running with -p or -pg. */ 31: #define LIB_SPEC "%{pg:-lfp_p}%{p:-lfp_p} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}" 32: 33: /* Run-time compilation parameters selecting different hardware subsets. */ 34: 35: /* Flag to generate all multiplies as an in-line sequence of multiply-step 36: insns instead of calling a library routine. */ 37: #define TARGET_IN_LINE_MUL (target_flags & 1) 38: 39: /* Flag to generate padded floating-point data blocks. Otherwise, we generate 40: them the minimum size. This trades off execution speed against size. */ 41: #define TARGET_FULL_FP_BLOCKS (target_flags & 2) 42: 43: /* Flag to pass and return floating point values in floating point registers. 44: Since this violates the linkage convention, we feel free to destroy fr2 45: and fr3 on function calls. 46: fr1-fr3 are used to pass the arguments. */ 47: #define TARGET_FP_REGS (target_flags & 4) 48: 49: /* Flag to return structures of more than one word in memory. This is for 50: compatibility with the MetaWare HighC (hc) compiler. */ 51: #define TARGET_HC_STRUCT_RETURN (target_flags & 010) 52: 53: extern int target_flags; 54: 55: /* Macro to define tables used to set the flags. 56: This is a list in braces of pairs in braces, 57: each pair being { "NAME", VALUE } 58: where VALUE is the bits to set or minus the bits to clear. 59: An empty string NAME is used to identify the default VALUE. */ 60: 61: #define TARGET_SWITCHES \ 62: { {"in-line-mul", 1}, \ 63: {"call-lib-mul", -1}, \ 64: {"full-fp-blocks", 2}, \ 65: {"minimum-fp-blocks", -2}, \ 66: {"fp-arg-in-fpregs", 4}, \ 67: {"fp-arg-in-gregs", -4}, \ 68: {"hc-struct-return", 010}, \ 69: {"nohc-struct-return", - 010}, \ 70: { "", TARGET_DEFAULT}} 71: 72: #define TARGET_DEFAULT 3 73: 74: /* target machine storage layout */ 75: 76: /* Define this if most significant bit is lowest numbered 77: in instructions that operate on numbered bit-fields. */ 78: /* That is true on ROMP. */ 79: #define BITS_BIG_ENDIAN 1 80: 81: /* Define this if most significant byte of a word is the lowest numbered. */ 82: /* That is true on ROMP. */ 83: #define BYTES_BIG_ENDIAN 1 84: 85: /* Define this if most significant word of a multiword number is lowest 86: numbered. 87: 88: For ROMP we can decide arbitrarily since there are no machine instructions 89: for them. Might as well be consistent with bits and bytes. */ 90: #define WORDS_BIG_ENDIAN 1 91: 92: /* number of bits in an addressable storage unit */ 93: #define BITS_PER_UNIT 8 94: 95: /* Width in bits of a "word", which is the contents of a machine register. 96: Note that this is not necessarily the width of data type `int'; 97: if using 16-bit ints on a 68000, this would still be 32. 98: But on a machine with 16-bit registers, this would be 16. */ 99: #define BITS_PER_WORD 32 100: 101: /* Width of a word, in units (bytes). */ 102: #define UNITS_PER_WORD 4 103: 104: /* Width in bits of a pointer. 105: See also the macro `Pmode' defined below. */ 106: #define POINTER_SIZE 32 107: 108: /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 109: #define PARM_BOUNDARY 32 110: 111: /* Boundary (in *bits*) on which stack pointer should be aligned. */ 112: #define STACK_BOUNDARY 32 113: 114: /* Allocation boundary (in *bits*) for the code of a function. */ 115: #define FUNCTION_BOUNDARY 16 116: 117: /* No data type wants to be aligned rounder than this. */ 118: #define BIGGEST_ALIGNMENT 32 119: 120: /* Alignment of field after `int : 0' in a structure. */ 121: #define EMPTY_FIELD_BOUNDARY 32 122: 123: /* Every structure's size must be a multiple of this. */ 124: #define STRUCTURE_SIZE_BOUNDARY 8 125: 126: /* A bitfield declared as `int' forces `int' alignment for the struct. */ 127: #define PCC_BITFIELD_TYPE_MATTERS 1 128: 129: /* Make strings word-aligned so strcpy from constants will be faster. */ 130: #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ 131: (TREE_CODE (EXP) == STRING_CST \ 132: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) 133: 134: /* Make arrays of chars word-aligned for the same reasons. */ 135: #define DATA_ALIGNMENT(TYPE, ALIGN) \ 136: (TREE_CODE (TYPE) == ARRAY_TYPE \ 137: && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ 138: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) 139: 140: /* Set this nonzero if move instructions will actually fail to work 141: when given unaligned data. */ 142: #define STRICT_ALIGNMENT 1 143: 144: /* Standard register usage. */ 145: 146: /* Number of actual hardware registers. 147: The hardware registers are assigned numbers for the compiler 148: from 0 to just below FIRST_PSEUDO_REGISTER. 149: All registers that the compiler knows about must be given numbers, 150: even those that are not normally considered general registers. 151: 152: ROMP has 16 fullword registers and 8 floating point registers. 153: 154: In addition, the difference between the frame and argument pointers is 155: a function of the number of registers saved, so we need to have a register 156: to use for AP that will later be eliminated in favor of sp or fp. This is 157: a normal register, but it is fixed. */ 158: 159: #define FIRST_PSEUDO_REGISTER 25 160: 161: /* 1 for registers that have pervasive standard uses 162: and are not available for the register allocator. 163: 164: On ROMP, r1 is used for the stack and r14 is used for a 165: data area pointer. 166: 167: HACK WARNING: On the RT, there is a bug in code generation for 168: the MC68881 when the first and third operands are the same floating-point 169: register. See the definition of the FINAL_PRESCAN_INSN macro for details. 170: Here we need to reserve fr0 for this purpose. */ 171: #define FIXED_REGISTERS \ 172: {0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 173: 1, \ 174: 1, 0, 0, 0, 0, 0, 0, 0} 175: 176: /* 1 for registers not available across function calls. 177: These must include the FIXED_REGISTERS and also any 178: registers that can be used without being saved. 179: The latter must include the registers where values are returned 180: and the register where structure-value addresses are passed. 181: Aside from that, you can include as many other registers as you like. */ 182: #define CALL_USED_REGISTERS \ 183: {1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 184: 1, \ 185: 1, 1, 0, 0, 0, 0, 0, 0} 186: 187: /* List the order in which to allocate registers. Each register must be 188: listed once, even those in FIXED_REGISTERS. 189: 190: We allocate in the following order: 191: fr0, fr1 (not saved) 192: fr2 ... fr6 193: fr7 (more expensive for some FPA's) 194: r0 (not saved and won't conflict with parameter register) 195: r4, r3, r2 (not saved, highest used first to make less conflict) 196: r5 (not saved, but forces r6 to be saved if DI/DFmode) 197: r15, r14, r13, r12, r11, r10, r9, r8, r7, r6 (less to save) 198: r1, ap */ 199: 200: #define REG_ALLOC_ORDER \ 201: {17, 18, \ 202: 19, 20, 21, 22, 23, \ 203: 24, \ 204: 0, \ 205: 4, 3, 2, \ 206: 5, \ 207: 15, 14, 13, 12, 11, 10, \ 208: 9, 8, 7, 6, \ 209: 1, 16} 210: 211: /* True if register is floating-point. */ 212: #define FP_REGNO_P(N) ((N) >= 17) 213: 214: /* Return number of consecutive hard regs needed starting at reg REGNO 215: to hold something of mode MODE. 216: This is ordinarily the length in words of a value of mode MODE 217: but can be less for certain modes in special long registers. 218: 219: On ROMP, ordinary registers hold 32 bits worth; 220: a single floating point register is always enough for 221: anything that can be stored in them at all. */ 222: #define HARD_REGNO_NREGS(REGNO, MODE) \ 223: (FP_REGNO_P (REGNO) ? GET_MODE_NUNITS (MODE) \ 224: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) 225: 226: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. 227: On ROMP, the cpu registers can hold any mode but the float registers 228: can hold only floating point. */ 229: #define HARD_REGNO_MODE_OK(REGNO, MODE) \ 230: (! FP_REGNO_P (REGNO) || GET_MODE_CLASS (MODE) == MODE_FLOAT \ 231: || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) 232: 233: /* Value is 1 if it is a good idea to tie two pseudo registers 234: when one has mode MODE1 and one has mode MODE2. 235: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 236: for any hard reg, then this must be 0 for correct output. */ 237: #define MODES_TIEABLE_P(MODE1, MODE2) \ 238: ((GET_MODE_CLASS (MODE1) == MODE_FLOAT \ 239: || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \ 240: == (GET_MODE_CLASS (MODE2) == MODE_FLOAT \ 241: || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT)) 242: 243: /* A C expression returning the cost of moving data from a register of class 244: CLASS1 to one of CLASS2. 245: 246: On the ROMP, access to floating-point registers is expensive (even between 247: two FP regs.) */ 248: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ 249: (2 + 10 * ((CLASS1) == FP_REGS) + 10 * (CLASS2 == FP_REGS)) 250: 251: /* Specify the registers used for certain standard purposes. 252: The values of these macros are register numbers. */ 253: 254: /* ROMP pc isn't overloaded on a register that the compiler knows about. */ 255: /* #define PC_REGNUM */ 256: 257: /* Register to use for pushing function arguments. */ 258: #define STACK_POINTER_REGNUM 1 259: 260: /* Base register for access to local variables of the function. */ 261: #define FRAME_POINTER_REGNUM 13 262: 263: /* Value should be nonzero if functions must have frame pointers. 264: Zero means the frame pointer need not be set up (and parms 265: may be accessed via the stack pointer) in functions that seem suitable. 266: This is computed in `reload', in reload1.c. */ 267: #define FRAME_POINTER_REQUIRED 0 268: 269: /* Base register for access to arguments of the function. */ 270: #define ARG_POINTER_REGNUM 16 271: 272: /* Place to put static chain when calling a function that requires it. */ 273: #define STATIC_CHAIN \ 274: gen_rtx (MEM, Pmode, gen_rtx (PLUS, Pmode, stack_pointer_rtx, \ 275: gen_rtx (CONST_INT, VOIDmode, -36))) 276: 277: /* Place where static chain is found upon entry to routine. */ 278: #define STATIC_CHAIN_INCOMING \ 279: gen_rtx (MEM, Pmode, gen_rtx (PLUS, Pmode, arg_pointer_rtx, \ 280: gen_rtx (CONST_INT, VOIDmode, -20))) 281: 282: /* Place that structure value return address is placed. 283: 284: On the ROMP, it is passed as an extra parameter. */ 285: #define STRUCT_VALUE 0 286: 287: /* Define the classes of registers for register constraints in the 288: machine description. Also define ranges of constants. 289: 290: One of the classes must always be named ALL_REGS and include all hard regs. 291: If there is more than one class, another class must be named NO_REGS 292: and contain no registers. 293: 294: The name GENERAL_REGS must be the name of a class (or an alias for 295: another name such as ALL_REGS). This is the class of registers 296: that is allowed by "g" or "r" in a register constraint. 297: Also, registers outside this class are allocated only when 298: instructions express preferences for them. 299: 300: The classes must be numbered in nondecreasing order; that is, 301: a larger-numbered class must never be contained completely 302: in a smaller-numbered class. 303: 304: For any two classes, it is very desirable that there be another 305: class that represents their union. */ 306: 307: /* The ROMP has two types of registers, general and floating-point. 308: 309: However, r0 is special in that it cannot be used as a base register. 310: So make a class for registers valid as base registers. 311: 312: For floating-point support, add classes that just consist of r0 and 313: r15, respectively. */ 314: 315: enum reg_class { NO_REGS, R0_REGS, R15_REGS, BASE_REGS, GENERAL_REGS, 316: FP_REGS, ALL_REGS, LIM_REG_CLASSES }; 317: 318: #define N_REG_CLASSES (int) LIM_REG_CLASSES 319: 320: /* Give names of register classes as strings for dump file. */ 321: 322: #define REG_CLASS_NAMES \ 323: {"NO_REGS", "R0_REGS", "R15_REGS", "BASE_REGS", "GENERAL_REGS", \ 324: "FP_REGS", "ALL_REGS" } 325: 326: /* Define which registers fit in which classes. 327: This is an initializer for a vector of HARD_REG_SET 328: of length N_REG_CLASSES. */ 329: 330: #define REG_CLASS_CONTENTS {0, 0x00001, 0x08000, 0x1fffe, 0x1ffff, \ 331: 0x1fe0000, 0x1ffffff } 332: 333: /* The same information, inverted: 334: Return the class number of the smallest class containing 335: reg number REGNO. This could be a conditional expression 336: or could index an array. */ 337: 338: #define REGNO_REG_CLASS(REGNO) \ 339: ((REGNO) == 0 ? GENERAL_REGS : FP_REGNO_P (REGNO) ? FP_REGS : BASE_REGS) 340: 341: /* The class value for index registers, and the one for base regs. */ 342: #define INDEX_REG_CLASS BASE_REGS 343: #define BASE_REG_CLASS BASE_REGS 344: 345: /* Get reg_class from a letter such as appears in the machine description. */ 346: 347: #define REG_CLASS_FROM_LETTER(C) \ 348: ((C) == 'f' ? FP_REGS \ 349: : (C) == 'b' ? BASE_REGS \ 350: : (C) == 'z' ? R0_REGS \ 351: : (C) == 't' ? R15_REGS \ 352: : NO_REGS) 353: 354: /* The letters I, J, K, L, M, N, and P in a register constraint string 355: can be used to stand for particular ranges of immediate operands. 356: This macro defines what the ranges are. 357: C is the letter, and VALUE is a constant value. 358: Return 1 if VALUE is in the range specified by C. 359: 360: `I' is constants less than 16 361: `J' is negative constants greater than -16 362: `K' is the range for a normal D insn. 363: `L' is a constant with only the low-order 16 bits set 364: `M' is a constant with only the high-order 16 bits set 365: `N' is a single-bit constant 366: `O' is a constant with either the high-order or low-order 16 bits all ones 367: `P' is the complement of a single-bit constant 368: */ 369: 370: #define CONST_OK_FOR_LETTER_P(VALUE, C) \ 371: ( (C) == 'I' ? (unsigned) (VALUE) < 0x10 \ 372: : (C) == 'J' ? (VALUE) < 0 && (VALUE) > -16 \ 373: : (C) == 'K' ? (unsigned) ((VALUE) + 0x8000) < 0x10000 \ 374: : (C) == 'L' ? ((VALUE) & 0xffff0000) == 0 \ 375: : (C) == 'M' ? ((VALUE) & 0xffff) == 0 \ 376: : (C) == 'N' ? exact_log2 (VALUE) >= 0 \ 377: : (C) == 'O' ? ((VALUE) & 0xffff) == 0xffff \ 378: || ((VALUE) & 0xffff0000) == 0xffff0000 \ 379: : (C) == 'P' ? exact_log2 (~ (VALUE)) >= 0 \ 380: : 0) 381: 382: /* Similar, but for floating constants, and defining letters G and H. 383: Here VALUE is the CONST_DOUBLE rtx itself. 384: No floating-point constants on ROMP. */ 385: 386: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 0 387: 388: /* Optional extra constraints for this machine. 389: 390: For the ROMP, `Q' means that this is a memory operand but not a symbolic 391: memory operand. Note that an unassigned pseudo register is such a 392: memory operand. If register allocation has not been done, we reject 393: pseudos, since we assume (hope) that they will get hard registers. 394: 395: `R' means that this is a constant pool reference to the current function. 396: This is just r14 and so can be treated as a register. We bother with this 397: just in move insns as that is the only place it is likely to occur. 398: 399: `S' means that this is the address of a constant pool location. This is 400: equal to r14 plus a constant. We also only check for this in move insns. */ 401: 402: #define EXTRA_CONSTRAINT(OP, C) \ 403: ((C) == 'Q' ? \ 404: ((GET_CODE (OP) == REG \ 405: && REGNO (OP) >= FIRST_PSEUDO_REGISTER \ 406: && reg_renumber != 0 \ 407: && reg_renumber[REGNO (OP)] < 0) \ 408: || (GET_CODE (OP) == MEM \ 409: && ! symbolic_memory_operand (OP, VOIDmode))) \ 410: : (C) == 'R' ? current_function_operand (OP, VOIDmode) \ 411: : (C) == 'S' ? constant_pool_address_operand (OP, VOIDmode) \ 412: : 0) 413: 414: /* Given an rtx X being reloaded into a reg required to be 415: in class CLASS, return the class of reg to actually use. 416: In general this is just CLASS; but on some machines 417: in some cases it is preferable to use a more restrictive class. 418: 419: For the ROMP, if X is a memory reference that involves a symbol, 420: we must use a BASE_REGS register instead of GENERAL_REGS 421: to do the reload. The argument of MEM be either REG, PLUS, or SYMBOL_REF 422: to be valid, so we assume that this is the case. 423: 424: Also, if X is an integer class, ensure that floating-point registers 425: aren't used. */ 426: 427: #define PREFERRED_RELOAD_CLASS(X,CLASS) \ 428: ((CLASS) == FP_REGS && GET_MODE_CLASS (GET_MODE (X)) == MODE_INT \ 429: ? GENERAL_REGS : \ 430: (CLASS) != GENERAL_REGS ? (CLASS) : \ 431: GET_CODE (X) != MEM ? GENERAL_REGS : \ 432: GET_CODE (XEXP (X, 0)) == SYMBOL_REF ? BASE_REGS : \ 433: GET_CODE (XEXP (X, 0)) == LABEL_REF ? BASE_REGS : \ 434: GET_CODE (XEXP (X, 0)) == CONST ? BASE_REGS : \ 435: GET_CODE (XEXP (X, 0)) == REG ? GENERAL_REGS : \ 436: GET_CODE (XEXP (X, 0)) != PLUS ? GENERAL_REGS : \ 437: GET_CODE (XEXP (XEXP (X, 0), 1)) == SYMBOL_REF ? BASE_REGS : \ 438: GET_CODE (XEXP (XEXP (X, 0), 1)) == LABEL_REF ? BASE_REGS : \ 439: GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST ? BASE_REGS : GENERAL_REGS) 440: 441: /* Return the register class of a scratch register needed to store into 442: OUT from a register of class CLASS in MODE. 443: 444: On the ROMP, we cannot store into a symbolic memory address from an 445: integer register; we need a BASE_REGS register as a scratch to do it. */ 446: 447: #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) \ 448: (GET_MODE_CLASS (MODE) == MODE_INT && symbolic_memory_operand (OUT, MODE) \ 449: ? BASE_REGS : NO_REGS) 450: 451: /* Return the maximum number of consecutive registers 452: needed to represent mode MODE in a register of class CLASS. 453: 454: On ROMP, this is the size of MODE in words, 455: except in the FP regs, where a single reg is always enough. */ 456: #define CLASS_MAX_NREGS(CLASS, MODE) \ 457: ((CLASS) == FP_REGS ? 1 \ 458: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) 459: 460: /* Stack layout; function entry, exit and calling. */ 461: 462: /* Define this if pushing a word on the stack 463: makes the stack pointer a smaller address. */ 464: #define STACK_GROWS_DOWNWARD 465: 466: /* Define this if the nominal address of the stack frame 467: is at the high-address end of the local variables; 468: that is, each additional local variable allocated 469: goes at a more negative offset in the frame. */ 470: #define FRAME_GROWS_DOWNWARD 471: 472: /* Offset within stack frame to start allocating local variables at. 473: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 474: first local allocated. Otherwise, it is the offset to the BEGINNING 475: of the first local allocated. 476: On the ROMP, if we set the frame pointer to 15 words below the highest 477: address of the highest local variable, the first 16 words will be 478: addressable via D-short insns. */ 479: #define STARTING_FRAME_OFFSET 64 480: 481: /* If we generate an insn to push BYTES bytes, 482: this says how many the stack pointer really advances by. 483: On ROMP, don't define this because there are no push insns. */ 484: /* #define PUSH_ROUNDING(BYTES) */ 485: 486: /* Offset of first parameter from the argument pointer register value. 487: On the ROMP, we define the argument pointer to the start of the argument 488: area. */ 489: #define FIRST_PARM_OFFSET(FNDECL) 0 490: 491: /* Define this if stack space is still allocated for a parameter passed 492: in a register. The value is the number of bytes. */ 493: #define REG_PARM_STACK_SPACE(FNDECL) 16 494: 495: /* This is the difference between the logical top of stack and the actual sp. 496: 497: For the ROMP, sp points past the words allocated for the first four outgoing 498: arguments (they are part of the callee's frame). */ 499: #define STACK_POINTER_OFFSET -16 500: 501: /* Define this if the maximum size of all the outgoing args is to be 502: accumulated and pushed during the prologue. The amount can be 503: found in the variable current_function_outgoing_args_size. */ 504: #define ACCUMULATE_OUTGOING_ARGS 505: 506: /* Value is the number of bytes of arguments automatically 507: popped when returning from a subroutine call. 1.1.1.4 ! root 508: FUNDECL is the declaration node of the function (as a tree), 1.1 root 509: FUNTYPE is the data type of the function (as a tree), 510: or for a library call it is an identifier node for the subroutine name. 511: SIZE is the number of bytes of arguments passed on the stack. */ 512: 1.1.1.4 ! root 513: #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 1.1 root 514: 515: /* Define how to find the value returned by a function. 516: VALTYPE is the data type of the value (as a tree). 517: If the precise function being called is known, FUNC is its FUNCTION_DECL; 518: otherwise, FUNC is 0. 519: 520: On ROMP the value is found in r2, unless the machine specific option 521: fp-arg-in-fpregs is selected, in which case FP return values are in fr1 */ 522: 523: #define FUNCTION_VALUE(VALTYPE, FUNC) \ 524: gen_rtx (REG, TYPE_MODE (VALTYPE), \ 525: (TARGET_FP_REGS && \ 526: GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_FLOAT) ? 18 : 2) 527: 528: /* Define how to find the value returned by a library function 529: assuming the value has mode MODE. */ 530: 531: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 2) 532: 533: /* The definition of this macro implies that there are cases where 534: a scalar value cannot be returned in registers. 535: 536: For the ROMP, if compatibility with HC is required, anything of 537: type DImode is returned in memory. */ 538: 539: #define RETURN_IN_MEMORY(type) \ 540: (TYPE_MODE (type) == BLKmode \ 541: || (TARGET_HC_STRUCT_RETURN && TYPE_MODE (type) == DImode)) 542: 543: /* 1 if N is a possible register number for a function value 544: as seen by the caller. 545: 546: On ROMP, r2 is the only register thus used unless fp values are to be 547: returned in fp regs, in which case fr1 is also used. */ 548: 549: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || ((N) == 18 && TARGET_FP_REGS)) 550: 551: /* 1 if N is a possible register number for function argument passing. 552: On ROMP, these are r2-r5 (and fr1-fr4 if fp regs are used). */ 553: 554: #define FUNCTION_ARG_REGNO_P(N) \ 555: (((N) <= 5 && (N) >= 2) || (TARGET_FP_REGS && (N) > 17 && (N) < 21)) 556: 557: /* Define a data type for recording info about an argument list 558: during the scan of that argument list. This data type should 559: hold all necessary information about the function itself 560: and about the args processed so far, enough to enable macros 561: such as FUNCTION_ARG to determine where the next arg should go. 562: 563: On the ROMP, this is a structure. The first word is the number of 564: words of (integer only if -mfp-arg-in-fpregs is specified) arguments 565: scanned so far (including the invisible argument, if any, which holds 566: the structure-value-address). The second word hold the corresponding 567: value for floating-point arguments, except that both single and double 568: count as one register. */ 569: 570: struct rt_cargs {int gregs, fregs; }; 571: #define CUMULATIVE_ARGS struct rt_cargs 572: 573: #define USE_FP_REG(MODE,CUM) \ 574: (TARGET_FP_REGS && GET_MODE_CLASS (MODE) == MODE_FLOAT \ 575: && (CUM).fregs < 3) 576: 577: /* Define intermediate macro to compute the size (in registers) of an argument 578: for the ROMP. */ 579: 580: #define ROMP_ARG_SIZE(MODE, TYPE, NAMED) \ 581: (! (NAMED) ? 0 \ 582: : (MODE) != BLKmode \ 583: ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \ 584: : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) 585: 586: /* Initialize a variable CUM of type CUMULATIVE_ARGS 587: for a call to a function whose data type is FNTYPE. 588: For a library call, FNTYPE is 0. 589: 590: On ROMP, the offset normally starts at 0, but starts at 4 bytes 591: when the function gets a structure-value-address as an 592: invisible first argument. */ 593: 594: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \ 595: (CUM).gregs = 0, \ 596: (CUM).fregs = 0 597: 598: /* Update the data in CUM to advance over an argument 599: of mode MODE and data type TYPE. 600: (TYPE is null for libcalls where that information may not be available.) */ 601: 602: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 603: { if (NAMED) \ 604: { \ 605: if (USE_FP_REG(MODE, CUM)) \ 606: (CUM).fregs++; \ 607: else \ 608: (CUM).gregs += ROMP_ARG_SIZE (MODE, TYPE, NAMED); \ 609: } \ 610: } 611: 612: /* Determine where to put an argument to a function. 613: Value is zero to push the argument on the stack, 614: or a hard register in which to store the argument. 615: 616: MODE is the argument's machine mode. 617: TYPE is the data type of the argument (as a tree). 618: This is null for libcalls where that information may 619: not be available. 620: CUM is a variable of type CUMULATIVE_ARGS which gives info about 621: the preceding args and about the function being called. 622: NAMED is nonzero if this argument is a named parameter 623: (otherwise it is an extra parameter matching an ellipsis). 624: 625: On ROMP the first four words of args are normally in registers 626: and the rest are pushed. */ 627: 628: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 629: (! (NAMED) ? 0 \ 630: : ((TYPE) != 0 && TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST) ? 0 \ 631: : USE_FP_REG(MODE,CUM) ? gen_rtx(REG, (MODE),(CUM.fregs) + 17) \ 632: : (CUM).gregs < 4 ? gen_rtx(REG, (MODE), 2 + (CUM).gregs) : 0) 633: 634: /* For an arg passed partly in registers and partly in memory, 635: this is the number of registers used. 636: For args passed entirely in registers or entirely in memory, zero. */ 637: 638: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ 639: (! (NAMED) ? 0 \ 640: : USE_FP_REG(MODE,CUM) ? 0 \ 641: : (((CUM).gregs < 4 \ 642: && 4 < ((CUM).gregs + ROMP_ARG_SIZE (MODE, TYPE, NAMED))) \ 643: ? 4 - (CUM).gregs : 0)) 644: 645: /* Perform any needed actions needed for a function that is receiving a 646: variable number of arguments. 647: 648: CUM is as above. 649: 650: MODE and TYPE are the mode and type of the current parameter. 651: 652: PRETEND_SIZE is a variable that should be set to the amount of stack 653: that must be pushed by the prolog to pretend that our caller pushed 654: it. 655: 656: Normally, this macro will push all remaining incoming registers on the 657: stack and set PRETEND_SIZE to the length of the registers pushed. */ 658: 659: #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \ 660: { if (TARGET_FP_REGS) \ 661: error ("can't have varargs with -mfp-arg-in-fp-regs"); \ 662: else if ((CUM).gregs < 4) \ 663: { \ 664: int first_reg_offset = (CUM).gregs; \ 665: \ 666: if (MUST_PASS_IN_STACK (MODE, TYPE)) \ 667: first_reg_offset += ROMP_ARG_SIZE (TYPE_MODE (TYPE), TYPE, 1); \ 668: \ 669: if (first_reg_offset > 4) \ 670: first_reg_offset = 4; \ 671: \ 672: if (! NO_RTL && first_reg_offset != 4) \ 673: move_block_from_reg \ 674: (2 + first_reg_offset, \ 675: gen_rtx (MEM, BLKmode, \ 676: plus_constant (virtual_incoming_args_rtx, \ 677: first_reg_offset * 4)), \ 1.1.1.2 root 678: 4 - first_reg_offset, (4 - first_reg_offset) * UNITS_PER_WORD); \ 1.1 root 679: PRETEND_SIZE = (4 - first_reg_offset) * UNITS_PER_WORD; \ 680: } \ 681: } 682: 683: /* This macro produces the initial definition of a function name. 684: On the ROMP, we need to place an extra '.' in the function name. */ 685: 686: #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \ 687: { if (TREE_PUBLIC(DECL)) \ 688: fprintf (FILE, "\t.globl _.%s\n", NAME); \ 689: fprintf (FILE, "_.%s:\n", NAME); \ 690: } 691: 692: /* This macro is used to output the start of the data area. 693: 694: On the ROMP, the _name is a pointer to the data area. At that 695: location is the address of _.name, which is really the name of 696: the function. We need to set all this up here. 697: 698: The global declaration of the data area, if needed, is done in 699: `assemble_function', where it thinks it is globalizing the function 700: itself. */ 701: 702: #define ASM_OUTPUT_POOL_PROLOGUE(FILE, NAME, DECL, SIZE) \ 703: { extern int data_offset; \ 704: data_section (); \ 705: fprintf (FILE, "\t.align 2\n"); \ 706: ASM_OUTPUT_LABEL (FILE, NAME); \ 707: fprintf (FILE, "\t.long _.%s, 0, ", NAME); \ 708: if (current_function_calls_alloca) \ 709: fprintf (FILE, "0x%x\n", \ 710: 0xf6900000 + current_function_outgoing_args_size); \ 711: else \ 712: fprintf (FILE, "0\n"); \ 713: data_offset = ((SIZE) + 12 + 3) / 4; \ 714: } 715: 716: /* Select section for constant in constant pool. 717: 718: On ROMP, all constants are in the data area. */ 719: 720: #define SELECT_RTX_SECTION(MODE, X) data_section () 721: 722: /* This macro generates the assembly code for function entry. 723: FILE is a stdio stream to output the code to. 724: SIZE is an int: how many units of temporary storage to allocate. 725: Refer to the array `regs_ever_live' to determine which registers 726: to save; `regs_ever_live[I]' is nonzero if register number I 727: is ever used in the function. This macro is responsible for 728: knowing which registers should not be saved even if used. */ 729: 730: #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE) 731: 732: /* Output assembler code to FILE to increment profiler label # LABELNO 733: for profiling a function entry. */ 734: 735: #define FUNCTION_PROFILER(FILE, LABELNO) \ 736: fprintf(FILE, "\tcas r0,r15,r0\n\tbali r15,mcount\n"); 737: 738: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 739: the stack pointer does not matter. The value is tested only in 740: functions that have frame pointers. 741: No definition is equivalent to always zero. */ 742: /* #define EXIT_IGNORE_STACK 1 */ 743: 744: /* This macro generates the assembly code for function exit, 745: on machines that need it. If FUNCTION_EPILOGUE is not defined 746: then individual return instructions are generated for each 747: return statement. Args are same as for FUNCTION_PROLOGUE. 748: 749: The function epilogue should not depend on the current stack pointer! 750: It should use the frame pointer only. This is mandatory because 751: of alloca; we also take advantage of it to omit stack adjustments 752: before returning. */ 753: 754: #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE) 755: 756: /* Output assembler code for a block containing the constant parts 757: of a trampoline, leaving space for the variable parts. 758: 759: The trampoline should set the static chain pointer to value placed 760: into the trampoline and should branch to the specified routine. 761: 762: On the ROMP, we have a problem. There are no free registers to use 763: to construct the static chain and function addresses. Hence we use 764: the following kludge: r15 (the return address) is first saved in mq. 765: Then we use r15 to form the function address. We then branch to the 766: function and restore r15 in the delay slot. This makes it appear that 767: the function was called directly from the caller. 768: 769: (Note that the function address built is actually that of the data block. 770: This is passed in r0 and the actual routine address is loaded into r15.) 771: 772: In addition, note that the address of the "called function", in this case 773: the trampoline, is actually the address of the data area. So we need to 774: make a fake data area that will contain the address of the trampoline. 775: Note that this must be defined as two half-words, since the trampoline 776: template (as opposed to the trampoline on the stack) is only half-word 777: aligned. */ 778: 779: #define TRAMPOLINE_TEMPLATE(FILE) \ 780: { \ 781: fprintf (FILE, "\t.short 0,0\n"); \ 782: fprintf (FILE, "\tcau r0,0(r0)\n"); \ 783: fprintf (FILE, "\toil r0,r0,0\n"); \ 784: fprintf (FILE, "\tmts r10,r15\n"); \ 785: fprintf (FILE, "\tst r0,-36(r1)\n"); \ 786: fprintf (FILE, "\tcau r15,0(r0)\n"); \ 787: fprintf (FILE, "\toil r15,r15,0\n"); \ 788: fprintf (FILE, "\tcas r0,r15,r0\n"); \ 789: fprintf (FILE, "\tls r15,0(r15)\n"); \ 790: fprintf (FILE, "\tbrx r15\n"); \ 791: fprintf (FILE, "\tmfs r10,r15\n"); \ 792: } 793: 794: /* Length in units of the trampoline for entering a nested function. */ 795: 796: #define TRAMPOLINE_SIZE 36 797: 798: /* Emit RTL insns to initialize the variable parts of a trampoline. 799: FNADDR is an RTX for the address of the function's pure code. 800: CXT is an RTX for the static chain value for the function. 801: 802: On the RT, the static chain and function addresses are written in 803: two 16-bit sections. 804: 805: We also need to write the address of the first instruction in 806: the trampoline into the first word of the trampoline to simulate a 807: data area. */ 808: 809: #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \ 810: { \ 811: rtx _addr, _temp; \ 812: rtx _val; \ 813: \ 814: _temp = expand_binop (SImode, add_optab, ADDR, \ 815: gen_rtx (CONST_INT, VOIDmode, 4), \ 816: 0, 1, OPTAB_LIB_WIDEN); \ 817: emit_move_insn (gen_rtx (MEM, SImode, \ 818: memory_address (SImode, ADDR)), _temp); \ 819: \ 820: _val = force_reg (SImode, CXT); \ 821: _addr = memory_address (HImode, plus_constant (ADDR, 10)); \ 822: emit_move_insn (gen_rtx (MEM, HImode, _addr), \ 823: gen_lowpart (HImode, _val)); \ 824: _temp = expand_shift (RSHIFT_EXPR, SImode, _val, \ 825: build_int_2 (16, 0), 0, 1); \ 826: _addr = memory_address (HImode, plus_constant (ADDR, 6)); \ 827: emit_move_insn (gen_rtx (MEM, HImode, _addr), \ 828: gen_lowpart (HImode, _temp)); \ 829: \ 830: _val = force_reg (SImode, FNADDR); \ 831: _addr = memory_address (HImode, plus_constant (ADDR, 24)); \ 832: emit_move_insn (gen_rtx (MEM, HImode, _addr), \ 833: gen_lowpart (HImode, _val)); \ 834: _temp = expand_shift (RSHIFT_EXPR, SImode, _val, \ 835: build_int_2 (16, 0), 0, 1); \ 836: _addr = memory_address (HImode, plus_constant (ADDR, 20)); \ 837: emit_move_insn (gen_rtx (MEM, HImode, _addr), \ 838: gen_lowpart (HImode, _temp)); \ 839: \ 840: } 841: 842: /* Definitions for register eliminations. 843: 844: We have two registers that can be eliminated on the ROMP. First, the 845: frame pointer register can often be eliminated in favor of the stack 846: pointer register. Secondly, the argument pointer register can always be 847: eliminated; it is replaced with either the stack or frame pointer. 848: 849: In addition, we use the elimination mechanism to see if r14 is needed. 850: Initially we assume that it isn't. If it is, we spill it. This is done 851: by making it an eliminable register. It doesn't matter what we replace 852: it with, since it will never occur in the rtl at this point. */ 853: 854: /* This is an array of structures. Each structure initializes one pair 855: of eliminable registers. The "from" register number is given first, 856: followed by "to". Eliminations of the same "from" register are listed 857: in order of preference. */ 858: #define ELIMINABLE_REGS \ 859: {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 860: { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 861: { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ 862: { 14, 0}} 863: 864: /* Given FROM and TO register numbers, say whether this elimination is allowed. 865: Frame pointer elimination is automatically handled. 866: 867: For the ROMP, if frame pointer elimination is being done, we would like to 868: convert ap into fp, not sp. 869: 870: We need r14 if various conditions (tested in romp_using_r14) are true. 871: 872: All other eliminations are valid. */ 873: #define CAN_ELIMINATE(FROM, TO) \ 874: ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \ 875: ? ! frame_pointer_needed \ 876: : (FROM) == 14 ? ! romp_using_r14 () \ 877: : 1) 878: 879: /* Define the offset between two registers, one to be eliminated, and the other 880: its replacement, at the start of a routine. */ 881: #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 882: { if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ 883: { \ 884: if (romp_pushes_stack ()) \ 885: (OFFSET) = ((get_frame_size () - 64) \ 886: + current_function_outgoing_args_size); \ 887: else \ 888: (OFFSET) = - (romp_sa_size () + 64); \ 889: } \ 890: else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \ 891: (OFFSET) = romp_sa_size () - 16 + 64; \ 892: else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ 893: { \ 894: if (romp_pushes_stack ()) \ 895: (OFFSET) = (get_frame_size () + (romp_sa_size () - 16) \ 896: + current_function_outgoing_args_size); \ 897: else \ 898: (OFFSET) = -16; \ 899: } \ 900: else if ((FROM) == 14) \ 901: (OFFSET) = 0; \ 902: else \ 903: abort (); \ 904: } 905: 906: /* Addressing modes, and classification of registers for them. */ 907: 908: /* #define HAVE_POST_INCREMENT */ 909: /* #define HAVE_POST_DECREMENT */ 910: 911: /* #define HAVE_PRE_DECREMENT */ 912: /* #define HAVE_PRE_INCREMENT */ 913: 914: /* Macros to check register numbers against specific register classes. */ 915: 916: /* These assume that REGNO is a hard or pseudo reg number. 917: They give nonzero only if REGNO is a hard reg of the suitable class 918: or a pseudo reg currently allocated to a suitable hard reg. 919: Since they use reg_renumber, they are safe only once reg_renumber 920: has been allocated, which happens in local-alloc.c. */ 921: 922: #define REGNO_OK_FOR_INDEX_P(REGNO) 0 923: #define REGNO_OK_FOR_BASE_P(REGNO) \ 924: ((REGNO) < FIRST_PSEUDO_REGISTER \ 925: ? (REGNO) < 16 && (REGNO) != 0 && (REGNO) != 16 \ 926: : (reg_renumber[REGNO] < 16 && reg_renumber[REGNO] >= 0 \ 927: && reg_renumber[REGNO] != 16)) 928: 929: /* Maximum number of registers that can appear in a valid memory address. */ 930: 931: #define MAX_REGS_PER_ADDRESS 1 932: 933: /* Recognize any constant value that is a valid address. */ 934: 935: #define CONSTANT_ADDRESS_P(X) \ 936: (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ 937: || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ 938: || GET_CODE (X) == HIGH) 939: 940: /* Nonzero if the constant value X is a legitimate general operand. 941: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. 942: 943: On the ROMP, there is a bit of a hack here. Basically, we wish to 944: only issue instructions that are not `as' macros. However, in the 945: case of `get', `load', and `store', if the operand is a relocatable 946: symbol (possibly +/- an integer), there is no way to express the 947: resulting split-relocation except with the macro. Therefore, allow 948: either a constant valid in a normal (sign-extended) D-format insn or 949: a relocatable expression. 950: 951: Also, for DFmode and DImode, we must ensure that both words are 952: addressable. 953: 954: We define two macros: The first is given an offset (0 or 4) and indicates 955: that the operand is a CONST_INT that is valid for that offset. The second 956: indicates a valid non-CONST_INT constant. */ 957: 958: #define LEGITIMATE_ADDRESS_INTEGER_P(X,OFFSET) \ 959: (GET_CODE (X) == CONST_INT \ 960: && (unsigned) (INTVAL (X) + (OFFSET) + 0x8000) < 0x10000) 961: 962: #define LEGITIMATE_ADDRESS_CONSTANT_P(X) \ 963: (GET_CODE (X) == SYMBOL_REF \ 964: || GET_CODE (X) == LABEL_REF \ 965: || (GET_CODE (X) == CONST \ 966: && (GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \ 967: || GET_CODE (XEXP (XEXP (X, 0), 0)) == LABEL_REF) \ 968: && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT)) 969: 970: /* Include all constant integers and constant double, but exclude 971: SYMBOL_REFs that are to be obtained from the data area (see below). */ 972: #define LEGITIMATE_CONSTANT_P(X) \ 973: ((LEGITIMATE_ADDRESS_CONSTANT_P (X) \ 974: || GET_CODE (X) == CONST_INT \ 975: || GET_CODE (X) == CONST_DOUBLE) \ 976: && ! (GET_CODE (X) == SYMBOL_REF && SYMBOL_REF_FLAG (X))) 977: 978: /* For no good reason, we do the same as the other RT compilers and load 979: the addresses of data areas for a function from our data area. That means 980: that we need to mark such SYMBOL_REFs. We do so here. */ 981: #define ENCODE_SECTION_INFO(DECL) \ 982: if (TREE_CODE (TREE_TYPE (DECL)) == FUNCTION_TYPE) \ 983: SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; 984: 985: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 986: and check its validity for a certain class. 987: We have two alternate definitions for each of them. 988: The usual definition accepts all pseudo regs; the other rejects 989: them unless they have been allocated suitable hard regs. 990: The symbol REG_OK_STRICT causes the latter definition to be used. 991: 992: Most source files want to accept pseudo regs in the hope that 993: they will get allocated to the class that the insn wants them to be in. 994: Source files for reload pass need to be strict. 995: After reload, it makes no difference, since pseudo regs have 996: been eliminated by then. */ 997: 998: #ifndef REG_OK_STRICT 999: 1000: /* Nonzero if X is a hard reg that can be used as an index 1001: or if it is a pseudo reg. */ 1002: #define REG_OK_FOR_INDEX_P(X) 0 1003: /* Nonzero if X is a hard reg that can be used as a base reg 1004: or if it is a pseudo reg. */ 1005: #define REG_OK_FOR_BASE_P(X) \ 1006: (REGNO (X) != 0 && (REGNO (X) < 17 || REGNO (X) >= FIRST_PSEUDO_REGISTER)) 1007: 1008: #else 1009: 1010: /* Nonzero if X is a hard reg that can be used as an index. */ 1011: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 1012: /* Nonzero if X is a hard reg that can be used as a base reg. */ 1013: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 1014: 1015: #endif 1016: 1017: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 1018: that is a valid memory address for an instruction. 1019: The MODE argument is the machine mode for the MEM expression 1020: that wants to use this address. 1021: 1022: On the ROMP, a legitimate address is either a legitimate constant, 1023: a register plus a legitimate constant, or a register. See the 1024: discussion at the LEGITIMATE_ADDRESS_CONSTANT_P macro. */ 1025: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 1026: { if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \ 1027: goto ADDR; \ 1028: if (GET_CODE (X) != CONST_INT && LEGITIMATE_ADDRESS_CONSTANT_P (X)) \ 1029: goto ADDR; \ 1030: if (GET_CODE (X) == PLUS \ 1031: && GET_CODE (XEXP (X, 0)) == REG \ 1032: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ 1033: && LEGITIMATE_ADDRESS_CONSTANT_P (XEXP (X, 1))) \ 1034: goto ADDR; \ 1035: if (GET_CODE (X) == PLUS \ 1036: && GET_CODE (XEXP (X, 0)) == REG \ 1037: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ 1038: && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 0) \ 1039: && (((MODE) != DFmode && (MODE) != DImode) \ 1040: || (LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 4)))) \ 1041: goto ADDR; \ 1042: } 1043: 1044: /* Try machine-dependent ways of modifying an illegitimate address 1045: to be legitimate. If we find one, return the new, valid address. 1046: This macro is used in only one place: `memory_address' in explow.c. 1047: 1048: OLDX is the address as it was before break_out_memory_refs was called. 1049: In some cases it is useful to look at this to decide what needs to be done. 1050: 1051: MODE and WIN are passed so that this macro can use 1052: GO_IF_LEGITIMATE_ADDRESS. 1053: 1054: It is always safe for this macro to do nothing. It exists to recognize 1055: opportunities to optimize the output. 1056: 1057: On ROMP, check for the sum of a register with a constant 1058: integer that is out of range. If so, generate code to add the 1059: constant with the low-order 16 bits masked to the register and force 1060: this result into another register (this can be done with `cau'). 1061: Then generate an address of REG+(CONST&0xffff), allowing for the 1062: possibility of bit 16 being a one. 1063: 1064: If the register is not OK for a base register, abort. */ 1065: 1066: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ 1067: { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \ 1068: && GET_CODE (XEXP (X, 1)) == CONST_INT \ 1069: && (unsigned) (INTVAL (XEXP (X, 1)) + 0x8000) >= 0x10000) \ 1070: { int high_int, low_int; \ 1071: if (! REG_OK_FOR_BASE_P (XEXP (X, 0))) \ 1072: abort (); \ 1073: high_int = INTVAL (XEXP (X, 1)) >> 16; \ 1074: low_int = INTVAL (XEXP (X, 1)) & 0xffff; \ 1075: if (low_int & 0x8000) \ 1076: high_int += 1, low_int |= 0xffff0000; \ 1077: (X) = gen_rtx (PLUS, SImode, \ 1078: force_operand \ 1079: (gen_rtx (PLUS, SImode, XEXP (X, 0), \ 1080: gen_rtx (CONST_INT, VOIDmode, \ 1081: high_int << 16)), 0),\ 1082: gen_rtx (CONST_INT, VOIDmode, low_int)); \ 1083: } \ 1084: } 1085: 1086: /* Go to LABEL if ADDR (a legitimate address expression) 1087: has an effect that depends on the machine mode it is used for. 1088: 1089: On the ROMP this is true only if the address is valid with a zero offset 1090: but not with an offset of four (this means it cannot be used as an 1091: address for DImode or DFmode). Since we know it is valid, we just check 1092: for an address that is not valid with an offset of four. */ 1093: 1094: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ 1095: { if (GET_CODE (ADDR) == PLUS \ 1096: && ! LEGITIMATE_ADDRESS_CONSTANT_P (XEXP (ADDR, 1)) \ 1097: && ! LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 4)) \ 1098: goto LABEL; \ 1099: } 1100: 1101: /* Define this if some processing needs to be done immediately before 1102: emitting code for an insn. 1103: 1104: This is used on the ROMP, to compensate for a bug in the floating-point 1105: code. When a floating-point operation is done with the first and third 1106: operands both the same floating-point register, it will generate bad code 1107: for the MC68881. So we must detect this. If it occurs, we patch the 1108: first operand to be fr0 and insert a move insn to move it to the desired 1109: destination. */ 1110: #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) \ 1111: { rtx op0, op1, op2, operation, tem; \ 1112: if (NOPERANDS >= 3 && get_attr_type (INSN) == TYPE_FP) \ 1113: { \ 1114: op0 = OPERANDS[0]; \ 1115: operation = OPERANDS[1]; \ 1116: if (float_conversion (operation, VOIDmode)) \ 1117: operation = XEXP (operation, 0); \ 1118: if (float_binary (operation, VOIDmode)) \ 1119: { \ 1120: op1 = XEXP (operation, 0), op2 = XEXP (operation, 1); \ 1121: if (float_conversion (op1, VOIDmode)) \ 1122: op1 = XEXP (op1, 0); \ 1123: if (float_conversion (op2, VOIDmode)) \ 1124: op2 = XEXP (op2, 0); \ 1125: if (rtx_equal_p (op0, op2) \ 1126: && (GET_CODE (operation) == PLUS \ 1127: || GET_CODE (operation) == MULT)) \ 1128: tem = op1, op1 = op2, op2 = tem; \ 1129: if (GET_CODE (op0) == REG && FP_REGNO_P (REGNO (op0)) \ 1130: && GET_CODE (op2) == REG && FP_REGNO_P (REGNO (op2)) \ 1131: && REGNO (op0) == REGNO (op2)) \ 1132: { \ 1133: tem = gen_rtx (REG, GET_MODE (op0), 17); \ 1134: emit_insn_after (gen_move_insn (op0, tem), INSN); \ 1135: SET_DEST (XVECEXP (PATTERN (INSN), 0, 0)) = tem; \ 1136: OPERANDS[0] = tem; \ 1137: } \ 1138: } \ 1139: } \ 1140: } 1141: 1142: /* Specify the machine mode that this machine uses 1143: for the index in the tablejump instruction. */ 1144: #define CASE_VECTOR_MODE SImode 1145: 1146: /* Define this if the tablejump instruction expects the table 1147: to contain offsets from the address of the table. 1148: Do not define this if the table should contain absolute addresses. */ 1149: /* #define CASE_VECTOR_PC_RELATIVE */ 1150: 1151: /* Specify the tree operation to be used to convert reals to integers. */ 1152: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR 1153: 1154: /* This is the kind of divide that is easiest to do in the general case. */ 1155: #define EASY_DIV_EXPR TRUNC_DIV_EXPR 1156: 1157: /* Define this as 1 if `char' should by default be signed; else as 0. */ 1158: #define DEFAULT_SIGNED_CHAR 0 1159: 1160: /* This flag, if defined, says the same insns that convert to a signed fixnum 1161: also convert validly to an unsigned one. 1162: 1163: We actually lie a bit here as overflow conditions are different. But 1164: they aren't being checked anyway. */ 1165: 1166: #define FIXUNS_TRUNC_LIKE_FIX_TRUNC 1167: 1168: /* Max number of bytes we can move from memory to memory 1169: in one reasonably fast instruction. */ 1170: #define MOVE_MAX 4 1171: 1172: /* Nonzero if access to memory by bytes is no faster than for words. 1173: Also non-zero if doing byte operations (specifically shifts) in registers 1174: is undesirable. */ 1175: #define SLOW_BYTE_ACCESS 1 1176: 1.1.1.2 root 1177: /* Define if operations between registers always perform the operation 1178: on the full register even if a narrower mode is specified. */ 1179: #define WORD_REGISTER_OPERATIONS 1180: 1181: /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD 1182: will either zero-extend or sign-extend. The value of this macro should 1183: be the code that says which one of the two operations is implicitly 1184: done, NIL if none. */ 1185: #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND 1.1 root 1186: 1187: /* This is BSD, so it wants DBX format. */ 1188: #define DBX_DEBUGGING_INFO 1189: 1.1.1.2 root 1190: /* Define the letter code used in a stabs entry for parameters passed 1191: with the register attribute. 1192: 1193: GCC's default value, 'P', is used by dbx to refers to an external 1194: procedure. The section 5 manual page for dbx implies that 'R' would be the 1195: right letter, but dbx 1.5 has a bug in it that precludes its use. 1196: Probably that is why neither hc or pcc use this. pcc puts in two 1197: stabs entries: one for the parameter location and one for the register 1198: location. The letter `r' (register) 1199: would be okay, but it loses parameter attribute of the stabs entry. */ 1200: #define DBX_REGPARM_STABS_LETTER 'R' 1201: 1202: /* A C expression for the integer offset value of an automatic variable 1203: (N_LSYM) having address X (an RTX). This gets used in .stabs entries 1204: for the local variables. Compare with the default definition. */ 1205: extern int romp_debugger_auto_correction(); 1206: #define DEBUGGER_AUTO_OFFSET(X) \ 1207: (GET_CODE (X) == PLUS \ 1208: ? romp_debugger_auto_correction (INTVAL (XEXP (X, 1)) ) \ 1209: : 0 ) 1210: 1211: /* A C expression for the integer offset value of an argument (N_PSYM) 1212: having address X (an RTX). The nominal offset is OFFSET. */ 1213: extern int romp_debugger_arg_correction(); 1214: #define DEBUGGER_ARG_OFFSET(OFFSET, X) \ 1215: romp_debugger_arg_correction (OFFSET); 1216: 1.1 root 1217: /* We don't have GAS for the RT yet, so don't write out special 1218: .stabs in cc1plus. */ 1219: 1220: #define FASCIST_ASSEMBLER 1221: 1222: /* Do not break .stabs pseudos into continuations. */ 1223: #define DBX_CONTIN_LENGTH 0 1224: 1225: /* Don't try to use the `x' type-cross-reference character in DBX data. 1226: Also has the consequence of putting each struct, union or enum 1227: into a separate .stabs, containing only cross-refs to the others. */ 1228: #define DBX_NO_XREFS 1229: 1230: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 1231: is done just by pretending it is already truncated. */ 1232: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 1233: 1234: /* Specify the machine mode that pointers have. 1235: After generation of rtl, the compiler makes no further distinction 1236: between pointers and any other objects of this machine mode. */ 1237: #define Pmode SImode 1238: 1239: /* Mode of a function address in a call instruction (for indexing purposes). 1240: 1241: Doesn't matter on ROMP. */ 1242: #define FUNCTION_MODE SImode 1243: 1244: /* Define this if addresses of constant functions 1245: shouldn't be put through pseudo regs where they can be cse'd. 1246: Desirable on machines where ordinary constants are expensive 1247: but a CALL with constant address is cheap. */ 1248: #define NO_FUNCTION_CSE 1249: 1250: /* Define this if shift instructions ignore all but the low-order 1251: few bits. 1252: 1253: This is not true on the RT since it uses the low-order 6, not 5, bits. 1254: At some point, this should be extended to see how to express that. */ 1255: 1256: /* #define SHIFT_COUNT_TRUNCATED */ 1257: 1258: /* Compute the cost of computing a constant rtl expression RTX whose 1259: rtx-code is CODE, contained within an expression of code OUTER_CODE. 1260: The body of this macro is a portion of a switch statement. If the 1261: code is computed here, return it with a return statement. Otherwise, 1262: break from the switch. */ 1263: 1264: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ 1265: case CONST_INT: \ 1266: if ((OUTER_CODE) == IOR && exact_log2 (INTVAL (RTX)) >= 0 \ 1267: || (OUTER_CODE) == AND && exact_log2 (~INTVAL (RTX)) >= 0 \ 1268: || (((OUTER_CODE) == PLUS || (OUTER_CODE) == MINUS) \ 1269: && (unsigned int) (INTVAL (RTX) + 15) < 31) \ 1270: || ((OUTER_CODE) == SET && (unsigned int) INTVAL (RTX) < 16))\ 1271: return 0; \ 1272: return ((unsigned int) (INTVAL(RTX) + 0x8000) < 0x10000 \ 1273: || (INTVAL (RTX) & 0xffff0000) == 0) ? 0 : COSTS_N_INSNS (2);\ 1274: case CONST: \ 1275: case LABEL_REF: \ 1276: case SYMBOL_REF: \ 1277: if (current_function_operand (RTX, Pmode)) return 0; \ 1278: return COSTS_N_INSNS (2); \ 1279: case CONST_DOUBLE: \ 1280: if ((RTX) == CONST0_RTX (GET_MODE (RTX))) return 2; \ 1281: return ((GET_MODE_CLASS (GET_MODE (RTX)) == MODE_FLOAT) \ 1282: ? COSTS_N_INSNS (5) : COSTS_N_INSNS (4)); 1283: 1284: /* Provide the costs of a rtl expression. This is in the body of a 1285: switch on CODE. 1286: 1287: References to our own data area are really references to r14, so they 1288: are very cheap. Multiples and divides are very expensive. */ 1289: 1290: #define RTX_COSTS(X,CODE,OUTER_CODE) \ 1291: case MEM: \ 1292: return current_function_operand (X, Pmode) ? 0 : COSTS_N_INSNS (2); \ 1293: case MULT: \ 1294: return (TARGET_IN_LINE_MUL && GET_MODE_CLASS (GET_MODE (X)) == MODE_INT)\ 1295: ? COSTS_N_INSNS (19) : COSTS_N_INSNS (25); \ 1296: case DIV: \ 1297: case UDIV: \ 1298: case MOD: \ 1299: case UMOD: \ 1300: return COSTS_N_INSNS (45); 1301: 1302: /* Compute the cost of an address. This is meant to approximate the size 1303: and/or execution delay of an insn using that address. If the cost is 1304: approximated by the RTL complexity, including CONST_COSTS above, as 1305: is usually the case for CISC machines, this macro should not be defined. 1306: For aggressively RISCy machines, only one insn format is allowed, so 1307: this macro should be a constant. The value of this macro only matters 1308: for valid addresses. 1309: 1310: For the ROMP, everything is cost 0 except for addresses involving 1311: symbolic constants, which are cost 1. */ 1312: 1313: #define ADDRESS_COST(RTX) \ 1314: ((GET_CODE (RTX) == SYMBOL_REF \ 1315: && ! CONSTANT_POOL_ADDRESS_P (RTX)) \ 1316: || GET_CODE (RTX) == LABEL_REF \ 1317: || (GET_CODE (RTX) == CONST \ 1318: && ! constant_pool_address_operand (RTX, Pmode)) \ 1319: || (GET_CODE (RTX) == PLUS \ 1320: && ((GET_CODE (XEXP (RTX, 1)) == SYMBOL_REF \ 1321: && ! CONSTANT_POOL_ADDRESS_P (XEXP (RTX, 0))) \ 1322: || GET_CODE (XEXP (RTX, 1)) == LABEL_REF \ 1323: || GET_CODE (XEXP (RTX, 1)) == CONST))) 1324: 1325: /* Adjust the length of an INSN. LENGTH is the currently-computed length and 1326: should be adjusted to reflect any required changes. This macro is used when 1327: there is some systematic length adjustment required that would be difficult 1328: to express in the length attribute. 1329: 1330: On the ROMP, there are two adjustments: First, a 2-byte insn in the delay 1331: slot of a CALL (including floating-point operations) actually takes four 1332: bytes. Second, we have to make the worst-case alignment assumption for 1333: address vectors. */ 1334: 1335: #define ADJUST_INSN_LENGTH(X,LENGTH) \ 1336: if (GET_CODE (X) == INSN && GET_CODE (PATTERN (X)) == SEQUENCE \ 1337: && GET_CODE (XVECEXP (PATTERN (X), 0, 0)) != JUMP_INSN \ 1338: && get_attr_length (XVECEXP (PATTERN (X), 0, 1)) == 2) \ 1339: (LENGTH) += 2; \ 1340: else if (GET_CODE (X) == JUMP_INSN && GET_CODE (PATTERN (X)) == ADDR_VEC) \ 1341: (LENGTH) += 2; 1342: 1343: /* Tell final.c how to eliminate redundant test instructions. */ 1344: 1345: /* Here we define machine-dependent flags and fields in cc_status 1346: (see `conditions.h'). */ 1347: 1348: /* Set if condition code (really not-Z) is stored in `test bit'. */ 1349: #define CC_IN_TB 01000 1350: 1351: /* Set if condition code is set by an unsigned compare. */ 1352: #define CC_UNSIGNED 02000 1353: 1354: /* Store in cc_status the expressions 1355: that the condition codes will describe 1356: after execution of an instruction whose pattern is EXP. 1357: Do not alter them if the instruction would not alter the cc's. */ 1358: 1359: #define NOTICE_UPDATE_CC(BODY,INSN) \ 1360: update_cc (BODY, INSN) 1361: 1362: /* Control the assembler format that we output. */ 1363: 1364: /* Output at beginning of assembler file. */ 1365: 1366: #define ASM_FILE_START(FILE) \ 1367: { extern char *version_string; \ 1368: char *p; \ 1369: \ 1370: fprintf (FILE, "\t.globl .oVncs\n\t.set .oVncs,0\n") ; \ 1371: fprintf (FILE, "\t.globl .oVgcc"); \ 1372: for (p = version_string; *p != ' ' && *p != 0; p++) \ 1373: fprintf (FILE, "%c", *p); \ 1374: fprintf (FILE, "\n\t.set .oVgcc"); \ 1375: for (p = version_string; *p != ' ' && *p != 0; p++) \ 1376: fprintf (FILE, "%c", *p); \ 1377: fprintf (FILE, ",0\n"); \ 1378: } 1379: 1380: /* Output to assembler file text saying following lines 1381: may contain character constants, extra white space, comments, etc. */ 1382: 1383: #define ASM_APP_ON "" 1384: 1385: /* Output to assembler file text saying following lines 1386: no longer contain unusual constructs. */ 1387: 1388: #define ASM_APP_OFF "" 1389: 1390: /* Output before instructions and read-only data. */ 1391: 1392: #define TEXT_SECTION_ASM_OP ".text" 1393: 1394: /* Output before writable data. */ 1395: 1396: #define DATA_SECTION_ASM_OP ".data" 1397: 1398: /* How to refer to registers in assembler output. 1399: This sequence is indexed by compiler's hard-register-number (see above). */ 1400: 1401: #define REGISTER_NAMES \ 1402: {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \ 1403: "r10", "r11", "r12", "r13", "r14", "r15", "ap", \ 1404: "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7" } 1405: 1406: /* How to renumber registers for dbx and gdb. */ 1407: 1408: #define DBX_REGISTER_NUMBER(REGNO) (REGNO) 1409: 1410: /* This is how to output the definition of a user-level label named NAME, 1411: such as the label on a static function or variable NAME. */ 1412: 1413: #define ASM_OUTPUT_LABEL(FILE,NAME) \ 1414: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) 1415: 1416: /* This is how to output a command to make the user-level label named NAME 1417: defined for reference from other files. */ 1418: 1419: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ 1420: do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0) 1421: 1422: /* This is how to output a reference to a user-level label named NAME. 1423: `assemble_name' uses this. */ 1424: 1425: #define ASM_OUTPUT_LABELREF(FILE,NAME) \ 1426: fprintf (FILE, "_%s", NAME) 1427: 1428: /* This is how to output an internal numbered label where 1429: PREFIX is the class of label and NUM is the number within the class. */ 1430: 1431: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ 1432: fprintf (FILE, "%s%d:\n", PREFIX, NUM) 1433: 1434: /* This is how to output a label for a jump table. Arguments are the same as 1435: for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is 1436: passed. */ 1437: 1438: #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ 1439: { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); } 1440: 1441: /* This is how to store into the string LABEL 1442: the symbol_ref name of an internal numbered label where 1443: PREFIX is the class of label and NUM is the number within the class. 1444: This is suitable for output with `assemble_name'. */ 1445: 1446: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ 1447: sprintf (LABEL, "*%s%d", PREFIX, NUM) 1448: 1449: /* This is how to output an assembler line defining a `double' constant. */ 1450: 1451: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ 1452: fprintf (FILE, "\t.double 0d%.20e\n", (VALUE)) 1453: 1454: /* This is how to output an assembler line defining a `float' constant. 1455: 1456: WARNING: Believe it or not, the ROMP assembler has a bug in its 1457: handling of single-precision floating-point values making it impossible 1458: to output such values in the expected way. Therefore, it must be output 1459: in hex. THIS WILL NOT WORK IF CROSS-COMPILING FROM A MACHINE THAT DOES 1460: NOT USE IEEE-FORMAT FLOATING-POINT, but there is nothing that can be done 1461: about it short of fixing the assembler. */ 1462: 1463: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ 1464: do { union { int i; float f; } u_i_f; \ 1465: u_i_f.f = (VALUE); \ 1466: fprintf (FILE, "\t.long 0x%x\n", u_i_f.i);\ 1467: } while (0) 1468: 1469: /* This is how to output an assembler line defining an `int' constant. */ 1470: 1471: #define ASM_OUTPUT_INT(FILE,VALUE) \ 1472: ( fprintf (FILE, "\t.long "), \ 1473: output_addr_const (FILE, (VALUE)), \ 1474: fprintf (FILE, "\n")) 1475: 1476: /* Likewise for `char' and `short' constants. */ 1477: 1478: #define ASM_OUTPUT_SHORT(FILE,VALUE) \ 1479: ( fprintf (FILE, "\t.short "), \ 1480: output_addr_const (FILE, (VALUE)), \ 1481: fprintf (FILE, "\n")) 1482: 1483: #define ASM_OUTPUT_CHAR(FILE,VALUE) \ 1484: ( fprintf (FILE, "\t.byte "), \ 1485: output_addr_const (FILE, (VALUE)), \ 1486: fprintf (FILE, "\n")) 1487: 1488: /* This is how to output an assembler line for a numeric constant byte. */ 1489: 1490: #define ASM_OUTPUT_BYTE(FILE,VALUE) \ 1491: fprintf (FILE, "\t.byte 0x%x\n", (VALUE)) 1492: 1493: /* This is how to output code to push a register on the stack. 1494: It need not be very fast code. */ 1495: 1496: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ 1497: fprintf (FILE, "\tsis r1,4\n\tsts %s,0(r1)\n", reg_names[REGNO]) 1498: 1499: /* This is how to output an insn to pop a register from the stack. 1500: It need not be very fast code. */ 1501: 1502: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ 1503: fprintf (FILE, "\tls r1,0(r1)\n\tais r1,4\n", reg_names[REGNO]) 1504: 1505: /* This is how to output an element of a case-vector that is absolute. */ 1506: 1507: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 1508: fprintf (FILE, "\t.long L%d\n", VALUE) 1509: 1510: /* This is how to output an element of a case-vector that is relative. 1511: (ROMP does not use such vectors, 1512: but we must define this macro anyway.) */ 1513: 1514: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) abort () 1515: 1516: /* This is how to output an assembler line 1517: that says to advance the location counter 1518: to a multiple of 2**LOG bytes. */ 1519: 1520: #define ASM_OUTPUT_ALIGN(FILE,LOG) \ 1521: if ((LOG) != 0) \ 1522: fprintf (FILE, "\t.align %d\n", (LOG)) 1523: 1524: #define ASM_OUTPUT_SKIP(FILE,SIZE) \ 1525: fprintf (FILE, "\t.space %d\n", (SIZE)) 1526: 1527: /* This says how to output an assembler line 1528: to define a global common symbol. */ 1529: 1530: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ 1531: ( fputs (".comm ", (FILE)), \ 1532: assemble_name ((FILE), (NAME)), \ 1533: fprintf ((FILE), ",%d\n", (SIZE))) 1534: 1535: /* This says how to output an assembler line 1536: to define a local common symbol. */ 1537: 1538: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \ 1539: ( fputs (".lcomm ", (FILE)), \ 1540: assemble_name ((FILE), (NAME)), \ 1541: fprintf ((FILE), ",%d\n", (SIZE))) 1542: 1543: /* Store in OUTPUT a string (made with alloca) containing 1544: an assembler-name for a local static variable named NAME. 1545: LABELNO is an integer which is different for each call. */ 1546: 1547: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ 1548: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ 1549: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) 1550: 1551: /* Define the parentheses used to group arithmetic operations 1552: in assembler code. */ 1553: 1554: #define ASM_OPEN_PAREN "(" 1555: #define ASM_CLOSE_PAREN ")" 1556: 1557: /* Define results of standard character escape sequences. */ 1558: #define TARGET_BELL 007 1559: #define TARGET_BS 010 1560: #define TARGET_TAB 011 1561: #define TARGET_NEWLINE 012 1562: #define TARGET_VT 013 1563: #define TARGET_FF 014 1564: #define TARGET_CR 015 1565: 1566: /* Print operand X (an rtx) in assembler syntax to file FILE. 1567: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. 1568: For `%' followed by punctuation, CODE is the punctuation and X is null. */ 1569: 1570: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) 1571: 1572: /* Define which CODE values are valid. */ 1573: 1574: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ 1575: ((CODE) == '.' || (CODE) == '#') 1576: 1577: /* Print a memory address as an operand to reference that memory location. */ 1578: 1579: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ 1580: { register rtx addr = ADDR; \ 1581: register rtx base = 0, offset = addr; \ 1582: if (GET_CODE (addr) == REG) \ 1583: base = addr, offset = const0_rtx; \ 1584: else if (GET_CODE (addr) == PLUS \ 1585: && GET_CODE (XEXP (addr, 0)) == REG) \ 1586: base = XEXP (addr, 0), offset = XEXP (addr, 1); \ 1587: else if (GET_CODE (addr) == SYMBOL_REF \ 1588: && CONSTANT_POOL_ADDRESS_P (addr)) \ 1589: { \ 1590: offset = gen_rtx (CONST_INT, VOIDmode, get_pool_offset (addr) + 12); \ 1591: base = gen_rtx (REG, SImode, 14); \ 1592: } \ 1593: else if (GET_CODE (addr) == CONST \ 1594: && GET_CODE (XEXP (addr, 0)) == PLUS \ 1595: && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT \ 1596: && GET_CODE (XEXP (XEXP (addr, 0), 0)) == SYMBOL_REF \ 1597: && CONSTANT_POOL_ADDRESS_P (XEXP (XEXP (addr, 0), 0))) \ 1598: { \ 1599: offset = plus_constant (XEXP (XEXP (addr, 0), 1), \ 1600: (get_pool_offset (XEXP (XEXP (addr, 0), 0)) \ 1601: + 12)); \ 1602: base = gen_rtx (REG, SImode, 14); \ 1603: } \ 1604: output_addr_const (FILE, offset); \ 1605: if (base) \ 1606: fprintf (FILE, "(%s)", reg_names [REGNO (base)]); \ 1607: } 1608: 1609: /* Define the codes that are matched by predicates in aux-output.c. */ 1610: 1611: #define PREDICATE_CODES \ 1612: {"zero_memory_operand", {SUBREG, MEM}}, \ 1613: {"short_memory_operand", {SUBREG, MEM}}, \ 1614: {"symbolic_memory_operand", {SUBREG, MEM}}, \ 1615: {"current_function_operand", {MEM}}, \ 1616: {"constant_pool_address_operand", {SUBREG, CONST}}, \ 1617: {"romp_symbolic_operand", {LABEL_REF, SYMBOL_REF, CONST}}, \ 1618: {"constant_operand", {LABEL_REF, SYMBOL_REF, PLUS, CONST, CONST_INT}}, \ 1619: {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \ 1620: {"reg_or_any_cint_operand", {SUBREG, REG, CONST_INT}}, \ 1621: {"short_cint_operand", {CONST_INT}}, \ 1622: {"reg_or_D_operand", {SUBREG, REG, CONST_INT}}, \ 1623: {"reg_or_add_operand", {SUBREG, REG, LABEL_REF, SYMBOL_REF, \ 1624: PLUS, CONST, CONST_INT}}, \ 1625: {"reg_or_and_operand", {SUBREG, REG, CONST_INT}}, \ 1626: {"reg_or_mem_operand", {SUBREG, REG, MEM}}, \ 1627: {"reg_or_nonsymb_mem_operand", {SUBREG, REG, MEM}}, \ 1628: {"romp_operand", {SUBREG, MEM, REG, CONST_INT, CONST, LABEL_REF, \ 1629: SYMBOL_REF, CONST_DOUBLE}}, \ 1630: {"reg_0_operand", {REG}}, \ 1631: {"reg_15_operand", {REG}}, \ 1632: {"float_binary", {PLUS, MINUS, MULT, DIV}}, \ 1633: {"float_unary", {NEG, ABS}}, \ 1634: {"float_conversion", {FLOAT_TRUNCATE, FLOAT_EXTEND, FLOAT, FIX}}, 1635: 1636: /* Define functions defined in aux-output.c and used in templates. */ 1637: 1638: extern char *output_in_line_mul (); 1639: extern char *output_fpop ();
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