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1.1 root 1: /* Subroutines used for code generation on IBM RS/6000.
2: Copyright (C) 1991 Free Software Foundation, Inc.
3: Contributed by Richard Kenner ([email protected])
4:
5: This file is part of GNU CC.
6:
7: GNU CC is free software; you can redistribute it and/or modify
8: it under the terms of the GNU General Public License as published by
9: the Free Software Foundation; either version 2, or (at your option)
10: any later version.
11:
12: GNU CC is distributed in the hope that it will be useful,
13: but WITHOUT ANY WARRANTY; without even the implied warranty of
14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15: GNU General Public License for more details.
16:
17: You should have received a copy of the GNU General Public License
18: along with GNU CC; see the file COPYING. If not, write to
19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20:
21: #include <stdio.h>
22: #include "config.h"
23: #include "rtl.h"
24: #include "regs.h"
25: #include "hard-reg-set.h"
26: #include "real.h"
27: #include "insn-config.h"
28: #include "conditions.h"
29: #include "insn-flags.h"
30: #include "output.h"
31: #include "insn-attr.h"
32: #include "flags.h"
33: #include "recog.h"
34: #include "expr.h"
35: #include "obstack.h"
36:
37: #define min(A,B) ((A) < (B) ? (A) : (B))
38: #define max(A,B) ((A) > (B) ? (A) : (B))
39:
40: /* Set to non-zero by "fix" operation to indicate that itrunc and
41: uitrunc must be defined. */
42:
43: int rs6000_trunc_used;
44:
45: /* Set to non-zero once they have been defined. */
46:
47: static int trunc_defined;
48:
49: /* Save information from a "cmpxx" operation until the branch or scc is
50: emitted. */
51:
52: rtx rs6000_compare_op0, rs6000_compare_op1;
53: int rs6000_compare_fp_p;
54:
55: /* Return non-zero if this function is known to have a null epilogue. */
56:
57: int
58: direct_return ()
59: {
60: return (reload_completed
61: && first_reg_to_save () == 32
62: && first_fp_reg_to_save () == 64
63: && ! regs_ever_live[65]
64: && ! rs6000_pushes_stack ());
65: }
66:
67: /* Returns 1 always. */
68:
69: int
70: any_operand (op, mode)
71: register rtx op;
72: enum machine_mode mode;
73: {
74: return 1;
75: }
76:
77: /* Return 1 if OP is a constant that can fit in a D field. */
78:
79: int
80: short_cint_operand (op, mode)
81: register rtx op;
82: enum machine_mode mode;
83: {
84: return (GET_CODE (op) == CONST_INT
85: && (unsigned) (INTVAL (op) + 0x8000) < 0x10000);
86: }
87:
88: /* Similar for a unsigned D field. */
89:
90: int
91: u_short_cint_operand (op, mode)
92: register rtx op;
93: enum machine_mode mode;
94: {
95: return (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff0000) == 0);
96: }
97:
98: /* Returns 1 if OP is a register that is not special (i.e., not MQ,
99: ctr, or lr). */
100:
101: int
102: gen_reg_operand (op, mode)
103: register rtx op;
104: enum machine_mode mode;
105: {
106: return (register_operand (op, mode)
107: && (GET_CODE (op) != REG || REGNO (op) >= 67 || REGNO (op) < 64));
108: }
109:
110: /* Returns 1 if OP is either a pseudo-register or a register denoting a
111: CR field. */
112:
113: int
114: cc_reg_operand (op, mode)
115: register rtx op;
116: enum machine_mode mode;
117: {
118: return (register_operand (op, mode)
119: && (GET_CODE (op) != REG
120: || REGNO (op) >= FIRST_PSEUDO_REGISTER
121: || CR_REGNO_P (REGNO (op))));
122: }
123:
124: /* Returns 1 if OP is either a constant integer valid for a D-field or a
125: non-special register. If a register, it must be in the proper mode unless
126: MODE is VOIDmode. */
127:
128: int
129: reg_or_short_operand (op, mode)
130: register rtx op;
131: enum machine_mode mode;
132: {
133: if (GET_CODE (op) == CONST_INT)
134: return short_cint_operand (op, mode);
135:
136: return gen_reg_operand (op, mode);
137: }
138:
139: /* Similar, except check if the negation of the constant would be valid for
140: a D-field. */
141:
142: int
143: reg_or_neg_short_operand (op, mode)
144: register rtx op;
145: enum machine_mode mode;
146: {
147: if (GET_CODE (op) == CONST_INT)
148: return CONST_OK_FOR_LETTER_P (INTVAL (op), 'P');
149:
150: return gen_reg_operand (op, mode);
151: }
152:
153: /* Return 1 if the operand is either a register or an integer whose high-order
154: 16 bits are zero. */
155:
156: int
157: reg_or_u_short_operand (op, mode)
158: register rtx op;
159: enum machine_mode mode;
160: {
161: if (GET_CODE (op) == CONST_INT
162: && (INTVAL (op) & 0xffff0000) == 0)
163: return 1;
164:
165: return gen_reg_operand (op, mode);
166: }
167:
168: /* Return 1 is the operand is either a non-special register or ANY
169: constant integer. */
170:
171: int
172: reg_or_cint_operand (op, mode)
173: register rtx op;
174: enum machine_mode mode;
175: {
176: return GET_CODE (op) == CONST_INT || gen_reg_operand (op, mode);
177: }
178:
179: /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a
180: register with one instruction per word. For SFmode, this means that
181: the low 16-bits are zero. For DFmode, it means the low 16-bits of
182: the first word are zero and the high 16 bits of the second word
183: are zero (usually all bits in the low-order word will be zero).
184:
185: We only do this if we can safely read CONST_DOUBLE_{LOW,HIGH}. */
186:
187: int
188: easy_fp_constant (op, mode)
189: register rtx op;
190: register enum machine_mode mode;
191: {
192: rtx low, high;
193:
194: if (GET_CODE (op) != CONST_DOUBLE
195: || GET_MODE (op) != mode
196: || GET_MODE_CLASS (mode) != MODE_FLOAT)
197: return 0;
198:
199: high = operand_subword (op, 0, 0, mode);
200: low = operand_subword (op, 1, 0, mode);
201:
202: if (high == 0 || GET_CODE (high) != CONST_INT || (INTVAL (high) & 0xffff))
203: return 0;
204:
205: return (mode == SFmode
206: || (low != 0 && GET_CODE (low) == CONST_INT
207: && (INTVAL (low) & 0xffff0000) == 0));
208: }
209:
210: /* Return 1 if the operand is either a floating-point register, a pseudo
211: register, or memory. */
212:
213: int
214: fp_reg_or_mem_operand (op, mode)
215: register rtx op;
216: enum machine_mode mode;
217: {
218: return (memory_operand (op, mode)
219: || (register_operand (op, mode)
220: && (GET_CODE (op) != REG
221: || REGNO (op) >= FIRST_PSEUDO_REGISTER
222: || FP_REGNO_P (REGNO (op)))));
223: }
224:
225: /* Return 1 if the operand is either an easy FP constant (see above) or
226: memory. */
227:
228: int
229: mem_or_easy_const_operand (op, mode)
230: register rtx op;
231: enum machine_mode mode;
232: {
233: return memory_operand (op, mode) || easy_fp_constant (op, mode);
234: }
235:
236: /* Return 1 if the operand is either a non-special register or an item
237: that can be used as the operand of an SI add insn. */
238:
239: int
240: add_operand (op, mode)
241: register rtx op;
242: enum machine_mode mode;
243: {
244: return (reg_or_short_operand (op, mode)
245: || (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff) == 0));
246: }
247:
248: /* Return 1 if the operand is a non-special register or a constant that
249: can be used as the operand of an OR or XOR insn on the RS/6000. */
250:
251: int
252: logical_operand (op, mode)
253: register rtx op;
254: enum machine_mode mode;
255: {
256: return (gen_reg_operand (op, mode)
257: || (GET_CODE (op) == CONST_INT
258: && ((INTVAL (op) & 0xffff0000) == 0
259: || (INTVAL (op) & 0xffff) == 0)));
260: }
261:
262: /* Return 1 if C is a constant that can be encoded in a mask on the
263: RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
264: Reject all ones and all zeros, since these should have been optimized
265: away and confuse the making of MB and ME. */
266:
267: int
268: mask_constant (c)
269: register int c;
270: {
271: int i;
272: int last_bit_value;
273: int transitions = 0;
274:
275: if (c == 0 || c == ~0)
276: return 0;
277:
278: last_bit_value = c & 1;
279:
280: for (i = 1; i < 32; i++)
281: if (((c >>= 1) & 1) != last_bit_value)
282: last_bit_value ^= 1, transitions++;
283:
284: return transitions <= 2;
285: }
286:
287: /* Return 1 if the operand is a constant that is a mask on the RS/6000. */
288:
289: int
290: mask_operand (op, mode)
291: register rtx op;
292: enum machine_mode mode;
293: {
294: return GET_CODE (op) == CONST_INT && mask_constant (INTVAL (op));
295: }
296:
297: /* Return 1 if the operand is either a non-special register or a
298: constant that can be used as the operand of an RS/6000 logical AND insn. */
299:
300: int
301: and_operand (op, mode)
302: register rtx op;
303: enum machine_mode mode;
304: {
305: return (reg_or_short_operand (op, mode)
306: || logical_operand (op, mode)
307: || mask_operand (op, mode));
308: }
309:
310: /* Return 1 if the operand is a general register or memory operand. */
311:
312: int
313: reg_or_mem_operand (op, mode)
314: register rtx op;
315: register enum machine_mode mode;
316: {
317: return gen_reg_operand (op, mode) || memory_operand (op, mode);
318: }
319:
320: /* Return 1 if the operand, used inside a MEM, is a valid first argument
321: to CALL. This is a SYMBOL_REF or a pseudo-register, which will be
322: forced to lr. */
323:
324: int
325: call_operand (op, mode)
326: register rtx op;
327: enum machine_mode mode;
328: {
329: if (mode != VOIDmode && GET_MODE (op) != mode)
330: return 0;
331:
332: return (GET_CODE (op) == SYMBOL_REF
333: || (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER));
334: }
335:
336: /* Return 1 if this operand is a valid input for a move insn. */
337:
338: int
339: input_operand (op, mode)
340: register rtx op;
341: enum machine_mode mode;
342: {
343: if (memory_operand (op, mode))
344: return 1;
345:
346: /* For floating-point or multi-word mode, only register or memory
347: is valid. */
348: if (GET_MODE_CLASS (mode) == MODE_FLOAT
349: || GET_MODE_SIZE (mode) > UNITS_PER_WORD)
350: return gen_reg_operand (op, mode);
351:
352: /* For SImode, we can also load from a special register, so any register
353: is valid. */
354: if (mode == SImode && register_operand (op, mode))
355: return 1;
356:
357: /* For HImode and QImode, any constant is valid along with any
358: non-special register. */
359: if (mode == HImode || mode == QImode)
360: return register_operand (op, mode) || GET_CODE (op) == CONST_INT;
361:
362: /* Otherwise, we will be doing this SET with an add, so anything valid
363: for an add will be valid. */
364: return add_operand (op, mode);
365: }
366:
367: /* Return 1 if OP is a load multiple operation. It is known to be a
368: PARALLEL and the first section will be tested. */
369:
370: int
371: load_multiple_operation (op, mode)
372: rtx op;
373: enum machine_mode mode;
374: {
375: int count = XVECLEN (op, 0);
376: int dest_regno;
377: rtx src_addr;
378: int i;
379:
380: /* Perform a quick check so we don't blow up below. */
381: if (count <= 1
382: || GET_CODE (XVECEXP (op, 0, 0)) != SET
383: || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
384: || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
385: return 0;
386:
387: dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
388: src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
389:
390: for (i = 1; i < count; i++)
391: {
392: rtx elt = XVECEXP (op, 0, i);
393:
394: if (GET_CODE (elt) != SET
395: || GET_CODE (SET_DEST (elt)) != REG
396: || GET_MODE (SET_DEST (elt)) != SImode
397: || REGNO (SET_DEST (elt)) != dest_regno + i
398: || GET_CODE (SET_SRC (elt)) != MEM
399: || GET_MODE (SET_SRC (elt)) != SImode
400: || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
401: || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
402: || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
403: || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != i * 4)
404: return 0;
405: }
406:
407: return 1;
408: }
409:
410: /* Similar, but tests for store multiple. Here, the second vector element
411: is a CLOBBER. It will be tested later. */
412:
413: int
414: store_multiple_operation (op, mode)
415: rtx op;
416: enum machine_mode mode;
417: {
418: int count = XVECLEN (op, 0) - 1;
419: int src_regno;
420: rtx dest_addr;
421: int i;
422:
423: /* Perform a quick check so we don't blow up below. */
424: if (count <= 1
425: || GET_CODE (XVECEXP (op, 0, 0)) != SET
426: || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
427: || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
428: return 0;
429:
430: src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
431: dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
432:
433: for (i = 1; i < count; i++)
434: {
435: rtx elt = XVECEXP (op, 0, i + 1);
436:
437: if (GET_CODE (elt) != SET
438: || GET_CODE (SET_SRC (elt)) != REG
439: || GET_MODE (SET_SRC (elt)) != SImode
440: || REGNO (SET_SRC (elt)) != src_regno + i
441: || GET_CODE (SET_DEST (elt)) != MEM
442: || GET_MODE (SET_DEST (elt)) != SImode
443: || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
444: || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
445: || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
446: || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != i * 4)
447: return 0;
448: }
449:
450: return 1;
451: }
452:
453: /* Return 1 if OP is a comparison operation that is valid for a branch insn.
454: We only check the opcode against the mode of the CC value here. */
455:
456: int
457: branch_comparison_operator (op, mode)
458: register rtx op;
459: enum machine_mode mode;
460: {
461: enum rtx_code code = GET_CODE (op);
462: enum machine_mode cc_mode;
463:
464: if (GET_RTX_CLASS (code) != '<')
465: return 0;
466:
467: cc_mode = GET_MODE (XEXP (op, 0));
468: if (GET_MODE_CLASS (cc_mode) != MODE_CC)
469: return 0;
470:
471: if ((code == GT || code == LT || code == GE || code == LE)
472: && cc_mode == CCUNSmode)
473: return 0;
474:
475: if ((code == GTU || code == LTU || code == GEU || code == LEU)
476: && (cc_mode != CCUNSmode))
477: return 0;
478:
479: return 1;
480: }
481:
482: /* Return 1 if OP is a comparison operation that is valid for an scc insn.
483: We check the opcode against the mode of the CC value and disallow EQ or
484: NE comparisons for integers. */
485:
486: int
487: scc_comparison_operator (op, mode)
488: register rtx op;
489: enum machine_mode mode;
490: {
491: enum rtx_code code = GET_CODE (op);
492: enum machine_mode cc_mode;
493:
494: if (GET_MODE (op) != mode && mode != VOIDmode)
495: return 0;
496:
497: if (GET_RTX_CLASS (code) != '<')
498: return 0;
499:
500: cc_mode = GET_MODE (XEXP (op, 0));
501: if (GET_MODE_CLASS (cc_mode) != MODE_CC)
502: return 0;
503:
504: if (code == NE && cc_mode != CCFPmode)
505: return 0;
506:
507: if ((code == GT || code == LT || code == GE || code == LE)
508: && cc_mode == CCUNSmode)
509: return 0;
510:
511: if ((code == GTU || code == LTU || code == GEU || code == LEU)
512: && (cc_mode != CCUNSmode))
513: return 0;
514:
515: return 1;
516: }
517:
518: /* Return 1 if ANDOP is a mask that has no bits on that are not in the
519: mask required to convert the result of a rotate insn into a shift
520: left insn of SHIFTOP bits. Both are known to be CONST_INT. */
521:
522: int
523: includes_lshift_p (shiftop, andop)
524: register rtx shiftop;
525: register rtx andop;
526: {
527: int shift_mask = (~0 << INTVAL (shiftop));
528:
529: return (INTVAL (andop) & ~shift_mask) == 0;
530: }
531:
532: /* Similar, but for right shift. */
533:
534: int
535: includes_rshift_p (shiftop, andop)
536: register rtx shiftop;
537: register rtx andop;
538: {
539: unsigned shift_mask = ~0;
540:
541: shift_mask >>= INTVAL (shiftop);
542:
543: return (INTVAL (andop) & ~ shift_mask) == 0;
544: }
545:
546: /* Return the register class of a scratch register needed to copy IN into
547: or out of a register in CLASS in MODE. If it can be done directly,
548: NO_REGS is returned. */
549:
550: enum reg_class
551: secondary_reload_class (class, mode, in)
552: enum reg_class class;
553: enum machine_mode mode;
554: rtx in;
555: {
556: int regno = true_regnum (in);
557:
558: if (regno >= FIRST_PSEUDO_REGISTER)
559: regno = -1;
560:
561: /* We can place anything into GENERAL_REGS and can put GENERAL_REGS
562: into anything. */
563: if (class == GENERAL_REGS || class == BASE_REGS
564: || (regno >= 0 && INT_REGNO_P (regno)))
565: return NO_REGS;
566:
567: /* Constants, memory, and FP registers can go into FP registers. */
568: if ((regno == -1 || FP_REGNO_P (regno))
569: && (class == FLOAT_REGS || class == NON_SPECIAL_REGS))
570: return NO_REGS;
571:
572: /* We can copy among the CR registers. */
573: if ((class == CR_REGS || class == CR0_REGS)
574: && regno >= 0 && CR_REGNO_P (regno))
575: return NO_REGS;
576:
577: /* Otherwise, we need GENERAL_REGS. */
578: return GENERAL_REGS;
579: }
580:
581: /* Given a comparison operation, return the bit number in CCR to test. We
582: know this is a valid comparison.
583:
584: SCC_P is 1 if this is for an scc. That means that %D will have been
585: used instead of %C, so the bits will be in different places.
586:
1.1.1.2 ! root 587: Return -1 if OP isn't a valid comparison for some reason. */
1.1 root 588:
589: int
590: ccr_bit (op, scc_p)
591: register rtx op;
592: int scc_p;
593: {
594: enum rtx_code code = GET_CODE (op);
595: enum machine_mode cc_mode;
596: int cc_regnum;
597: int base_bit;
598:
599: if (GET_RTX_CLASS (code) != '<')
600: return -1;
601:
602: cc_mode = GET_MODE (XEXP (op, 0));
603: cc_regnum = REGNO (XEXP (op, 0));
604: base_bit = 4 * (cc_regnum - 68);
605:
606: switch (code)
607: {
608: case NE:
609: return scc_p ? base_bit + 3 : base_bit + 2;
610: case EQ:
611: return base_bit + 2;
612: case GT: case GTU:
613: return base_bit + 1;
614: case LT: case LTU:
615: return base_bit;
616:
617: case GE: case GEU:
618: /* If floating-point, we will have done a cror to put the bit in the
619: unordered position. So test that bit. For integer, this is ! LT
620: unless this is an scc insn. */
621: return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit;
622:
623: case LE: case LEU:
624: return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit + 1;
625:
626: default:
627: abort ();
628: }
629: }
630:
631: /* Print an operand. Recognize special options, documented below. */
632:
633: void
634: print_operand (file, x, code)
635: FILE *file;
636: rtx x;
637: char code;
638: {
639: int i;
640: int val;
641:
642: /* These macros test for integers and extract the low-order bits. */
643: #define INT_P(X) \
644: ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
645: && GET_MODE (X) == VOIDmode)
646:
647: #define INT_LOWPART(X) \
648: (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
649:
650: switch (code)
651: {
652: case 'h':
653: /* If constant, output low-order six bits. Otherwise, write normally. */
654: if (INT_P (x))
655: fprintf (file, "%d", INT_LOWPART (x) & 31);
656: else
657: print_operand (file, x, 0);
658: return;
659:
660: case 'H':
661: /* X must be a constant. Output the low order 6 bits plus 24. */
662: if (! INT_P (x))
663: output_operand_lossage ("invalid %%H value");
664:
665: fprintf (file, "%d", (INT_LOWPART (x) + 24) & 31);
666: return;
667:
668: case 'b':
669: /* Low-order 16 bits of constant, unsigned. */
670: if (! INT_P (x))
671: output_operand_lossage ("invalid %%b value");
672:
673: fprintf (file, "%d", INT_LOWPART (x) & 0xffff);
674: return;
675:
676: case 'w':
677: /* If constant, low-order 16 bits of constant, signed. Otherwise, write
678: normally. */
679: if (INT_P (x))
680: fprintf (file, "%d", (INT_LOWPART (x) << 16) >> 16);
681: else
682: print_operand (file, x, 0);
683: return;
684:
685: case 'W':
686: /* If constant, low-order 16 bits of constant, unsigned.
687: Otherwise, write normally. */
688: if (INT_P (x))
689: fprintf (file, "%d", INT_LOWPART (x) & 0xffff);
690: else
691: print_operand (file, x, 0);
692: return;
693:
694: case 'u':
695: /* High-order 16 bits of constant. */
696: if (! INT_P (x))
697: output_operand_lossage ("invalid %%u value");
698:
699: fprintf (file, "%d", (INT_LOWPART (x) >> 16) & 0xffff);
700: return;
701:
702: case 's':
703: /* Low 5 bits of 32 - value */
704: if (! INT_P (x))
705: output_operand_lossage ("invalid %%s value");
706:
707: fprintf (file, "%d", (32 - INT_LOWPART (x)) & 31);
708: return;
709:
710: case 'S':
711: /* Low 5 bits of 31 - value */
712: if (! INT_P (x))
713: output_operand_lossage ("invalid %%S value");
714:
715: fprintf (file, "%d", (31 - INT_LOWPART (x)) & 31);
716: return;
717:
718: case 'p':
719: /* X is a CONST_INT that is a power of two. Output the logarithm. */
720: if (! INT_P (x)
721: || (i = exact_log2 (INT_LOWPART (x))) < 0)
722: output_operand_lossage ("invalid %%p value");
723:
724: fprintf (file, "%d", i);
725: return;
726:
727: case 'm':
728: /* MB value for a mask operand. */
729: if (! mask_operand (x, VOIDmode))
730: output_operand_lossage ("invalid %%m value");
731:
732: val = INT_LOWPART (x);
733:
734: /* If the high bit is set and the low bit is not, the value is zero.
735: If the high bit is zero, the value is the first 1 bit we find from
736: the left. */
737: if (val < 0 && (val & 1) == 0)
738: {
739: fprintf (file, "0");
740: return;
741: }
742: else if (val >= 0)
743: {
744: for (i = 1; i < 32; i++)
745: if ((val <<= 1) < 0)
746: break;
747: fprintf (file, "%d", i);
748: return;
749: }
750:
751: /* Otherwise, look for the first 0 bit from the right. The result is its
752: number plus 1. We know the low-order bit is one. */
753: for (i = 0; i < 32; i++)
754: if (((val >>= 1) & 1) == 0)
755: break;
756:
757: /* If we ended in ...01, I would be 0. The correct value is 31, so
758: we want 31 - i. */
759: fprintf (file, "%d", 31 - i);
760: return;
761:
762: case 'M':
763: /* ME value for a mask operand. */
764: if (! mask_operand (x, VOIDmode))
765: output_operand_lossage ("invalid %%m value");
766:
767: val = INT_LOWPART (x);
768:
769: /* If the low bit is set and the high bit is not, the value is 31.
770: If the low bit is zero, the value is the first 1 bit we find from
771: the right. */
772: if ((val & 1) && val >= 0)
773: {
774: fprintf (file, "31");
775: return;
776: }
777: else if ((val & 1) == 0)
778: {
779: for (i = 0; i < 32; i++)
780: if ((val >>= 1) & 1)
781: break;
782:
783: /* If we had ....10, I would be 0. The result should be
784: 30, so we need 30 - i. */
785: fprintf (file, "%d", 30 - i);
786: return;
787: }
788:
789: /* Otherwise, look for the first 0 bit from the left. The result is its
790: number minus 1. We know the high-order bit is one. */
791: for (i = 0; i < 32; i++)
792: if ((val <<= 1) >= 0)
793: break;
794:
795: fprintf (file, "%d", i);
796: return;
797:
798: case 'f':
799: /* X is a CR register. Print the shift count needed to move it
800: to the high-order four bits. */
801: if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
802: output_operand_lossage ("invalid %%f value");
803: else
804: fprintf (file, "%d", 4 * (REGNO (x) - 68));
805: return;
806:
807: case 'F':
808: /* Similar, but print the count for the rotate in the opposite
809: direction. */
810: if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
811: output_operand_lossage ("invalid %%F value");
812: else
813: fprintf (file, "%d", 32 - 4 * (REGNO (x) - 68));
814: return;
815:
816: case 'R':
817: /* X is a CR register. Print the mask for `mtcrf'. */
818: if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
819: output_operand_lossage ("invalid %%R value");
820: else
821: fprintf (file, "%d", 128 >> (REGNO (x) - 68));
822: return;
823:
824: case 'X':
825: if (GET_CODE (x) == MEM
826: && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x, 0)))
827: fprintf (file, "x");
828: return;
829:
830: case 'U':
1.1.1.2 ! root 831: /* Print `u' is this has an auto-increment or auto-decrement. */
1.1 root 832: if (GET_CODE (x) == MEM
833: && (GET_CODE (XEXP (x, 0)) == PRE_INC
834: || GET_CODE (XEXP (x, 0)) == PRE_DEC))
835: fprintf (file, "u");
836: return;
837:
838: case 'I':
839: /* Print `i' is this is a constant, else nothing. */
840: if (INT_P (x))
841: fprintf (file, "i");
842: return;
843:
844: case 'N':
845: /* Write the number of elements in the vector times 4. */
846: if (GET_CODE (x) != PARALLEL)
847: output_operand_lossage ("invalid %%N value");
848:
849: fprintf (file, "%d", XVECLEN (x, 0) * 4);
850: return;
851:
852: case 'O':
853: /* Similar, but subtract 1 first. */
854: if (GET_CODE (x) != PARALLEL)
855: output_operand_lossage ("invalid %%N value");
856:
857: fprintf (file, "%d", (XVECLEN (x, 0) - 1) * 4);
858: return;
859:
860: case 'P':
861: /* The operand must be an indirect memory reference. The result
862: is the register number. */
863: if (GET_CODE (x) != MEM || GET_CODE (XEXP (x, 0)) != REG
864: || REGNO (XEXP (x, 0)) >= 32)
865: output_operand_lossage ("invalid %%P value");
866:
867: fprintf (file, "%d", REGNO (XEXP (x, 0)));
868: return;
869:
870: case 'L':
871: /* Write second word of DImode or DFmode reference. Works on register
872: or non-indexed memory only. */
873: if (GET_CODE (x) == REG)
874: fprintf (file, "%d", REGNO (x) + 1);
875: else if (GET_CODE (x) == MEM)
876: {
877: /* Handle possible auto-increment. Since it is pre-increment and
878: we have already done it, we can just use an offset of four. */
879: if (GET_CODE (XEXP (x, 0)) == PRE_INC
880: || GET_CODE (XEXP (x, 0)) == PRE_DEC)
881: output_address (plus_constant (XEXP (XEXP (x, 0), 0), 4));
882: else
883: output_address (plus_constant (XEXP (x, 0), 4));
884: }
885: return;
886:
887: case 'Y':
888: /* Similar, for third word of TImode */
889: if (GET_CODE (x) == REG)
890: fprintf (file, "%d", REGNO (x) + 2);
891: else if (GET_CODE (x) == MEM)
892: {
893: if (GET_CODE (XEXP (x, 0)) == PRE_INC
894: || GET_CODE (XEXP (x, 0)) == PRE_DEC)
895: output_address (plus_constant (XEXP (XEXP (x, 0), 0), 8));
896: else
897: output_address (plus_constant (XEXP (x, 0), 8));
898: }
899: return;
900:
901: case 'Z':
902: /* Similar, for last word of TImode. */
903: if (GET_CODE (x) == REG)
904: fprintf (file, "%d", REGNO (x) + 3);
905: else if (GET_CODE (x) == MEM)
906: {
907: if (GET_CODE (XEXP (x, 0)) == PRE_INC
908: || GET_CODE (XEXP (x, 0)) == PRE_DEC)
909: output_address (plus_constant (XEXP (XEXP (x, 0), 0), 12));
910: else
911: output_address (plus_constant (XEXP (x, 0), 12));
912: }
913: return;
914:
915: case 't':
916: /* Write 12 if this jump operation will branch if true, 4 otherwise.
917: All floating-point operations except NE branch true and integer
918: EQ, LT, GT, LTU and GTU also branch true. */
919: if (GET_RTX_CLASS (GET_CODE (x)) != '<')
920: output_operand_lossage ("invalid %%t value");
921:
922: else if ((GET_MODE (XEXP (x, 0)) == CCFPmode
923: && GET_CODE (x) != NE)
924: || GET_CODE (x) == EQ
925: || GET_CODE (x) == LT || GET_CODE (x) == GT
926: || GET_CODE (x) == LTU || GET_CODE (x) == GTU)
927: fprintf (file, "12");
928: else
929: fprintf (file, "4");
930: return;
931:
932: case 'T':
933: /* Opposite of 't': write 4 if this jump operation will branch if true,
934: 12 otherwise. */
935: if (GET_RTX_CLASS (GET_CODE (x)) != '<')
936: output_operand_lossage ("invalid %%t value");
937:
938: else if ((GET_MODE (XEXP (x, 0)) == CCFPmode
939: && GET_CODE (x) != NE)
940: || GET_CODE (x) == EQ
941: || GET_CODE (x) == LT || GET_CODE (x) == GT
942: || GET_CODE (x) == LTU || GET_CODE (x) == GTU)
943: fprintf (file, "4");
944: else
945: fprintf (file, "12");
946: return;
947:
948: case 'j':
949: /* Write the bit number in CCR for jump. */
950: i = ccr_bit (x, 0);
951: if (i == -1)
952: output_operand_lossage ("invalid %%j code");
953: else
954: fprintf (file, "%d", i);
955: return;
956:
957: case 'J':
958: /* Similar, but add one for shift count in rlinm for scc and pass
959: scc flag to `ccr_bit'. */
960: i = ccr_bit (x, 1);
961: if (i == -1)
962: output_operand_lossage ("invalid %%J code");
963: else
964: fprintf (file, "%d", i + 1);
965: return;
966:
967: case 'C':
968: /* This is an optional cror needed for LE or GE floating-point
969: comparisons. Otherwise write nothing. */
970: if ((GET_CODE (x) == LE || GET_CODE (x) == GE)
971: && GET_MODE (XEXP (x, 0)) == CCFPmode)
972: {
973: int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
974:
975: fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3,
976: base_bit + 2, base_bit + (GET_CODE (x) == GE));
977: }
978: return;
979:
980: case 'D':
981: /* Similar, except that this is for an scc, so we must be able to
982: encode the test in a single bit that is one. We do the above
983: for any LE, GE, GEU, or LEU and invert the bit for NE. */
984: if (GET_CODE (x) == LE || GET_CODE (x) == GE
985: || GET_CODE (x) == LEU || GET_CODE (x) == GEU)
986: {
987: int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
988:
989: fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3,
990: base_bit + 2,
991: base_bit + (GET_CODE (x) == GE || GET_CODE (x) == GEU));
992: }
993:
994: else if (GET_CODE (x) == NE)
995: {
996: int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
997:
998: fprintf (file, "crnor %d,%d,%d\n\t", base_bit + 3,
999: base_bit + 2, base_bit + 2);
1000: }
1001: return;
1002:
1003: case 'z':
1.1.1.2 ! root 1004: /* X is a SYMBOL_REF. Write out the name preceded by a
! 1005: period and without any trailing data in brackets. Used for function
1.1 root 1006: names. */
1007: if (GET_CODE (x) != SYMBOL_REF)
1008: abort ();
1009:
1010: fprintf (file, ".");
1011: RS6000_OUTPUT_BASENAME (file, XSTR (x, 0));
1012: return;
1013:
1.1.1.2 ! root 1014: case 'A':
! 1015: /* If X is a constant integer whose low-order 5 bits are zero,
! 1016: write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
! 1017: in the RS/6000 assembler where "sri" with a zero shift count
! 1018: write a trash instruction. */
! 1019: if (GET_CODE (x) != CONST_INT && (INTVAL (x) & 31) == 0)
! 1020: fprintf (file, "l");
! 1021: else
! 1022: fprintf (file, "r");
! 1023: return;
! 1024:
1.1 root 1025: case 0:
1026: if (GET_CODE (x) == REG)
1027: fprintf (file, "%s", reg_names[REGNO (x)]);
1028: else if (GET_CODE (x) == MEM)
1029: {
1030: /* We need to handle PRE_INC and PRE_DEC here, since we need to
1031: know the width from the mode. */
1032: if (GET_CODE (XEXP (x, 0)) == PRE_INC)
1033: fprintf (file, "%d(%d)", GET_MODE_SIZE (GET_MODE (x)),
1034: REGNO (XEXP (XEXP (x, 0), 0)));
1035: else if (GET_CODE (XEXP (x, 0)) == PRE_DEC)
1036: fprintf (file, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x)),
1037: REGNO (XEXP (XEXP (x, 0), 0)));
1038: else
1039: output_address (XEXP (x, 0));
1040: }
1041: else
1042: output_addr_const (file, x);
1043: break;
1044:
1045: default:
1046: output_operand_lossage ("invalid %%xn code");
1047: }
1048: }
1049:
1050: /* Print the address of an operand. */
1051:
1052: void
1053: print_operand_address (file, x)
1054: FILE *file;
1055: register rtx x;
1056: {
1057: if (GET_CODE (x) == REG)
1058: fprintf (file, "0(%d)", REGNO (x));
1059: else if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == CONST)
1060: {
1061: output_addr_const (file, x);
1062: fprintf (file, "(2)");
1063: }
1064: else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == REG)
1065: {
1066: if (REGNO (XEXP (x, 0)) == 0)
1067: fprintf (file, "%d,%d", REGNO (XEXP (x, 1)), REGNO (XEXP (x, 0)));
1068: else
1069: fprintf (file, "%d,%d", REGNO (XEXP (x, 0)), REGNO (XEXP (x, 1)));
1070: }
1071: else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT)
1072: fprintf (file, "%d(%d)", INTVAL (XEXP (x, 1)), REGNO (XEXP (x, 0)));
1073: else
1074: abort ();
1075: }
1076:
1077: /* This page contains routines that are used to determine what the function
1078: prologue and epilogue code will do and write them out. */
1079:
1080: /* Return the first fixed-point register that is required to be saved. 32 if
1081: none. */
1082:
1083: int
1084: first_reg_to_save ()
1085: {
1086: int first_reg;
1087:
1088: /* Find lowest numbered live register. */
1089: for (first_reg = 13; first_reg <= 31; first_reg++)
1090: if (regs_ever_live[first_reg])
1091: break;
1092:
1093: return first_reg;
1094: }
1095:
1096: /* Similar, for FP regs. */
1097:
1098: int
1099: first_fp_reg_to_save ()
1100: {
1101: int first_reg;
1102:
1103: /* Find lowest numbered live register. */
1104: for (first_reg = 14 + 32; first_reg <= 63; first_reg++)
1105: if (regs_ever_live[first_reg])
1106: break;
1107:
1108: return first_reg;
1109: }
1110:
1111: /* Return 1 if we need to save CR. */
1112:
1113: int
1114: must_save_cr ()
1115: {
1116: return regs_ever_live[70] || regs_ever_live[71] || regs_ever_live[72];
1117: }
1118:
1119: /* Compute the size of the save area in the stack, including the space for
1120: the fixed area. */
1121:
1122: int
1123: rs6000_sa_size ()
1124: {
1125: int size;
1126: int i;
1127:
1128: /* We have the six fixed words, plus the size of the register save
1129: areas, rounded to a double-word. */
1130: size = 6 + (32 - first_reg_to_save ()) + (64 - first_fp_reg_to_save ()) * 2;
1131: if (size & 1)
1132: size++;
1133:
1134: return size * 4;
1135: }
1136:
1137: /* Return non-zero if this function makes calls. */
1138:
1139: int
1140: rs6000_makes_calls ()
1141: {
1142: rtx insn;
1143:
1144: for (insn = get_insns (); insn; insn = next_insn (insn))
1145: if (GET_CODE (insn) == CALL_INSN)
1146: return 1;
1147:
1148: return 0;
1149: }
1150:
1151: /* Return non-zero if this function needs to push space on the stack. */
1152:
1153: int
1154: rs6000_pushes_stack ()
1155: {
1156: int total_size = (rs6000_sa_size () + get_frame_size ()
1157: + current_function_outgoing_args_size);
1158:
1159: /* We need to push the stack if a frame pointer is needed (because the
1160: stack might be dynamically adjusted), if we are debugging, if the
1161: total stack size is more than 220 bytes, or if we make calls. */
1162:
1163: return (frame_pointer_needed || write_symbols != NO_DEBUG
1164: || total_size > 220
1165: || rs6000_makes_calls ());
1166: }
1167:
1168: /* Write function prologue. */
1169:
1170: void
1171: output_prolog (file, size)
1172: FILE *file;
1173: int size;
1174: {
1175: int first_reg = first_reg_to_save ();
1176: int must_push = rs6000_pushes_stack ();
1177: int first_fp_reg = first_fp_reg_to_save ();
1178: int basic_size = rs6000_sa_size ();
1179: int total_size = (basic_size + size + current_function_outgoing_args_size);
1180:
1181: /* Round size to multiple of 8 bytes. */
1182: total_size = (total_size + 7) & ~7;
1183:
1184: /* Write .extern for any function we will call to save and restore fp
1185: values. */
1186: if (first_fp_reg < 62)
1187: fprintf (file, "\t.extern ._savef%d\n\t.extern ._restf%d\n",
1188: first_fp_reg - 32, first_fp_reg - 32);
1189:
1190: /* Write .extern for truncation routines, if needed. */
1191: if (rs6000_trunc_used && ! trunc_defined)
1192: {
1193: fprintf (file, "\t.extern .itrunc\n\t.extern .uitrunc\n");
1194: trunc_defined = 1;
1195: }
1196:
1197: /* If we have to call a function to save fpr's, we will be using LR. */
1198: if (first_fp_reg < 62)
1199: regs_ever_live[65] = 1;
1200:
1201: /* If we use the link register, get it into r0. */
1202: if (regs_ever_live[65])
1203: fprintf (file, "\tmflr 0\n");
1204:
1205: /* If we need to save CR, put it into r12. */
1206: if (must_save_cr ())
1207: fprintf (file, "\tmfcr 12\n");
1208:
1209: /* Do any required saving of fpr's. If only one or two to save, do it
1210: ourself. Otherwise, call function. */
1211: if (first_fp_reg == 62)
1212: fprintf (file, "\tstfd 30,-16(1)\n\tstfd 31,-8(1)\n");
1213: else if (first_fp_reg == 63)
1214: fprintf (file, "\tstfd 31,-8(1)\n");
1215: else if (first_fp_reg != 64)
1216: fprintf (file, "\tbl ._savef%d\n\tcror 15,15,15\n", first_fp_reg - 32);
1217:
1218: /* Now save gpr's. */
1219: if (first_reg == 31)
1220: fprintf (file, "\tst 31,%d(1)\n", -4 - (64 - first_fp_reg) * 8);
1221: else if (first_reg != 32)
1222: fprintf (file, "\tstm %d,%d(1)\n", first_reg,
1223: - (32 - first_reg) * 4 - (64 - first_fp_reg) * 8);
1224:
1225: /* Save lr if we used it. */
1226: if (regs_ever_live[65])
1227: fprintf (file, "\tst 0,8(1)\n");
1228:
1229: /* Save CR if we use any that must be preserved. */
1230: if (must_save_cr ())
1231: fprintf (file, "\tst 12,4(1)\n");
1232:
1233: /* Update stack and set back pointer. */
1234: if (must_push)
1235: {
1236: if (total_size < 32767)
1237: fprintf (file, "\tstu 1,%d(1)\n", - total_size);
1238: else
1239: {
1240: fprintf (file, "\tcau 0,0,%d\n\toril 0,0,%d\n",
1241: (total_size >> 16) & 0xffff, total_size & 0xffff);
1242: fprintf (file, "\tsf 12,0,1\n\tst 1,0(12)\n\toril 1,12,0\n");
1243: }
1244: }
1245:
1246: /* Set frame pointer, if needed. */
1247: if (frame_pointer_needed)
1248: fprintf (file, "\toril 31,1,0\n");
1249: }
1250:
1251: /* Write function epilogue. */
1252:
1253: void
1254: output_epilog (file, size)
1255: FILE *file;
1256: int size;
1257: {
1258: int first_reg = first_reg_to_save ();
1259: int must_push = rs6000_pushes_stack ();
1260: int first_fp_reg = first_fp_reg_to_save ();
1261: int basic_size = rs6000_sa_size ();
1262: int total_size = (basic_size + size + current_function_outgoing_args_size);
1263: rtx insn = get_last_insn ();
1264:
1265: /* Round size to multiple of 8 bytes. */
1266: total_size = (total_size + 7) & ~7;
1267:
1268: /* If the last insn was a BARRIER, we don't have to write anything except
1269: the trace table. */
1270: if (GET_CODE (insn) == NOTE)
1271: insn = prev_nonnote_insn (insn);
1272: if (insn == 0 || GET_CODE (insn) != BARRIER)
1273: {
1274: /* If we have a frame pointer, a call to alloca, or a large stack
1275: frame, restore the old stack pointer using the backchain. Otherwise,
1276: we know what size to update it with. */
1277: if (frame_pointer_needed || current_function_calls_alloca
1278: || total_size > 32767)
1279: fprintf (file, "\tl 1,0(1)\n");
1280: else if (must_push)
1281: fprintf (file, "\tai 1,1,%d\n", total_size);
1282:
1.1.1.2 ! root 1283: /* Get the old lr if we saved it. */
1.1 root 1284: if (regs_ever_live[65])
1.1.1.2 ! root 1285: fprintf (file, "\tl 0,8(1)\n");
1.1 root 1286:
1287: /* Get the old cr if we saved it. */
1288: if (must_save_cr ())
1289: fprintf (file, "\tl 12,4(1)\n");
1290:
1.1.1.2 ! root 1291: /* Set LR here to try to overlap restores below. */
! 1292: if (regs_ever_live[65])
! 1293: fprintf (file, "\tmtlr 0\n");
! 1294:
1.1 root 1295: /* Restore gpr's. */
1296: if (first_reg == 31)
1297: fprintf (file, "\tl 31,%d(1)\n", -4 - (64 - first_fp_reg) * 8);
1298: else if (first_reg != 32)
1299: fprintf (file, "\tlm %d,%d(1)\n", first_reg,
1300: - (32 - first_reg) * 4 - (64 - first_fp_reg) * 8);
1301:
1.1.1.2 ! root 1302: /* Restore fpr's if we can do it without calling a function. */
1.1 root 1303: if (first_fp_reg == 62)
1304: fprintf (file, "\tlfd 30,-16(1)\n\tlfd 31,-8(1)\n");
1305: else if (first_fp_reg == 63)
1306: fprintf (file, "\tlfd 31,-8(1)\n");
1307:
1308: /* If we saved cr, restore it here. Just set cr2, cr3, and cr4. */
1309: if (must_save_cr ())
1310: fprintf (file, "\tmtcrf 0x38,12\n");
1311:
1.1.1.2 ! root 1312: /* If we have to restore more than two FP registers, branch to the
! 1313: restore function. It will return to our caller. */
! 1314: if (first_fp_reg < 62)
! 1315: fprintf (file, "\tb ._restf%d\n\tcror 15,15,15\n", first_fp_reg - 32);
! 1316: else
! 1317: fprintf (file, "\tbr\n");
1.1 root 1318: }
1.1.1.2 ! root 1319:
! 1320: /* ??? Need to output a traceback table here when -g was given for complete
! 1321: debugging output. */
1.1 root 1322: }
1323:
1324: /* Output a TOC entry. We derive the entry name from what is
1325: being written. */
1326:
1327: void
1328: output_toc (file, x, labelno)
1329: FILE *file;
1330: rtx x;
1331: int labelno;
1332: {
1333: char buf[256];
1334: char *name = buf;
1335: rtx base = x;
1336: int offset = 0;
1337:
1338: ASM_OUTPUT_INTERNAL_LABEL (file, "LC", labelno);
1339:
1340: /* Handle FP constants specially. */
1341: if (GET_CODE (x) == CONST_DOUBLE
1342: && GET_MODE (x) == DFmode
1343: && TARGET_FLOAT_FORMAT == HOST_FLOAT_FORMAT
1344: && BITS_PER_WORD == HOST_BITS_PER_INT
1345: && TARGET_FP_IN_TOC)
1346: {
1347: fprintf (file, "\t.tc FD_%x_%x[TC],%d,%d\n",
1348: CONST_DOUBLE_LOW (x), CONST_DOUBLE_HIGH (x),
1349: CONST_DOUBLE_LOW (x), CONST_DOUBLE_HIGH (x));
1350: return;
1351: }
1352: else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode
1353: && TARGET_FP_IN_TOC)
1354: {
1355: rtx val = operand_subword (x, 0, 0, SFmode);
1356:
1357: if (val == 0 || GET_CODE (val) != CONST_INT)
1358: abort ();
1359:
1360: fprintf (file, "\t.tc FS_%x[TC],%d\n", INTVAL (val), INTVAL (val));
1361: return;
1362: }
1363:
1364: if (GET_CODE (x) == CONST)
1365: {
1366: base = XEXP (XEXP (x, 0), 0);
1367: offset = INTVAL (XEXP (XEXP (x, 0), 1));
1368: }
1369:
1370: if (GET_CODE (base) == SYMBOL_REF)
1371: name = XSTR (base, 0);
1372: else if (GET_CODE (base) == LABEL_REF)
1373: ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (base, 0)));
1374: else if (GET_CODE (base) == CODE_LABEL)
1375: ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (base));
1376: else
1377: abort ();
1378:
1379: fprintf (file, "\t.tc ");
1380: RS6000_OUTPUT_BASENAME (file, name);
1381:
1382: if (offset < 0)
1383: fprintf (file, "P.N.%d", - offset);
1384: else if (offset)
1385: fprintf (file, ".P.%d", offset);
1386:
1387: fprintf (file, "[TC],");
1388: output_addr_const (file, x);
1389: fprintf (file, "\n");
1390: }
1391:
1392: /* Output an assembler pseudo-op to write an ASCII string of N characters
1393: starting at P to FILE.
1394:
1395: On the RS/6000, we have to do this using the .byte operation and
1396: write out special characters outside the quoted string.
1397: Also, the assembler is broken; very long strings are truncated,
1398: so we must artificially break them up early. */
1399:
1400: void
1401: output_ascii (file, p, n)
1402: FILE *file;
1403: char *p;
1404: int n;
1405: {
1406: char c;
1407: int i, count_string;
1408: char *for_string = "\t.byte \"";
1409: char *for_decimal = "\t.byte ";
1410: char *to_close = NULL;
1411:
1412: count_string = 0;
1413: for (i = 0; i < n; i++)
1414: {
1415: c = *p++;
1416: if (c >= ' ' && c < 0177)
1417: {
1418: if (for_string)
1419: fputs (for_string, file);
1420: putc (c, file);
1421:
1422: /* Write two quotes to get one. */
1423: if (c == '"')
1424: {
1425: putc (c, file);
1426: ++count_string;
1427: }
1428:
1429: for_string = NULL;
1430: for_decimal = "\"\n\t.byte ";
1431: to_close = "\"\n";
1432: ++count_string;
1433:
1434: if (count_string >= 512)
1435: {
1436: fputs (to_close, file);
1437:
1438: for_string = "\t.byte \"";
1439: for_decimal = "\t.byte ";
1440: to_close = NULL;
1441: count_string = 0;
1442: }
1443: }
1444: else
1445: {
1446: if (for_decimal)
1447: fputs (for_decimal, file);
1448: fprintf (file, "%d", c);
1449:
1450: for_string = "\n\t.byte \"";
1451: for_decimal = ", ";
1452: to_close = "\n";
1453: count_string = 0;
1454: }
1455: }
1456:
1457: /* Now close the string if we have written one. Then end the line. */
1458: if (to_close)
1459: fprintf (file, to_close);
1460: }
1461:
1462: /* Generate a unique section name for FILENAME for a section type
1463: represented by SECTION_DESC. Output goes into BUF.
1464:
1465: SECTION_DESC can be any string, as long as it is different for each
1466: possible section type.
1467:
1468: We name the section in the same manner as xlc. The name begins with an
1469: underscore followed by the filename (after stripping any leading directory
1470: names) with the period replaced by the string SECTION_DESC. If FILENAME
1471: does not contain a period, SECTION_DESC is appended at the end of the
1472: name. */
1473:
1474: void
1475: rs6000_gen_section_name (buf, filename, section_desc)
1476: char **buf;
1477: char *filename;
1478: char *section_desc;
1479: {
1480: char *q, *after_last_slash;
1481: char *p;
1482: int len;
1483: int used_desc = 0;
1484:
1485: after_last_slash = filename;
1486: for (q = filename; *q; q++)
1487: if (*q == '/')
1488: after_last_slash = q + 1;
1489:
1490: len = strlen (filename) + strlen (section_desc) + 2;
1491: *buf = (char *) permalloc (len);
1492:
1493: p = *buf;
1494: *p++ = '_';
1495:
1496: for (q = after_last_slash; *q; q++)
1497: {
1498: if (*q == '.')
1499: {
1500: strcpy (p, section_desc);
1501: p += strlen (section_desc);
1502: used_desc = 1;
1503: }
1504:
1505: else if (isalnum (*q))
1506: *p++ = *q;
1507: }
1508:
1509: if (! used_desc)
1510: strcpy (p, section_desc);
1511: else
1512: *p = '\0';
1513: }
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