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1.1 root 1: /* Subroutines used for code generation on IBM RS/6000.
2: Copyright (C) 1991 Free Software Foundation, Inc.
3: Contributed by Richard Kenner ([email protected])
4:
5: This file is part of GNU CC.
6:
7: GNU CC is free software; you can redistribute it and/or modify
8: it under the terms of the GNU General Public License as published by
9: the Free Software Foundation; either version 2, or (at your option)
10: any later version.
11:
12: GNU CC is distributed in the hope that it will be useful,
13: but WITHOUT ANY WARRANTY; without even the implied warranty of
14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15: GNU General Public License for more details.
16:
17: You should have received a copy of the GNU General Public License
18: along with GNU CC; see the file COPYING. If not, write to
19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20:
21: #include <stdio.h>
22: #include "config.h"
23: #include "rtl.h"
24: #include "regs.h"
25: #include "hard-reg-set.h"
26: #include "real.h"
27: #include "insn-config.h"
28: #include "conditions.h"
29: #include "insn-flags.h"
30: #include "output.h"
31: #include "insn-attr.h"
32: #include "flags.h"
33: #include "recog.h"
34: #include "expr.h"
35: #include "obstack.h"
1.1.1.3 ! root 36: #include "tree.h"
! 37:
! 38: extern char *language_string;
1.1 root 39:
40: #define min(A,B) ((A) < (B) ? (A) : (B))
41: #define max(A,B) ((A) > (B) ? (A) : (B))
42:
43: /* Set to non-zero by "fix" operation to indicate that itrunc and
44: uitrunc must be defined. */
45:
46: int rs6000_trunc_used;
47:
48: /* Set to non-zero once they have been defined. */
49:
50: static int trunc_defined;
51:
52: /* Save information from a "cmpxx" operation until the branch or scc is
53: emitted. */
54:
55: rtx rs6000_compare_op0, rs6000_compare_op1;
56: int rs6000_compare_fp_p;
57:
58: /* Return non-zero if this function is known to have a null epilogue. */
59:
60: int
61: direct_return ()
62: {
63: return (reload_completed
64: && first_reg_to_save () == 32
65: && first_fp_reg_to_save () == 64
66: && ! regs_ever_live[65]
67: && ! rs6000_pushes_stack ());
68: }
69:
70: /* Returns 1 always. */
71:
72: int
73: any_operand (op, mode)
74: register rtx op;
75: enum machine_mode mode;
76: {
77: return 1;
78: }
79:
80: /* Return 1 if OP is a constant that can fit in a D field. */
81:
82: int
83: short_cint_operand (op, mode)
84: register rtx op;
85: enum machine_mode mode;
86: {
87: return (GET_CODE (op) == CONST_INT
88: && (unsigned) (INTVAL (op) + 0x8000) < 0x10000);
89: }
90:
91: /* Similar for a unsigned D field. */
92:
93: int
94: u_short_cint_operand (op, mode)
95: register rtx op;
96: enum machine_mode mode;
97: {
98: return (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff0000) == 0);
99: }
100:
1.1.1.3 ! root 101: /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
! 102:
! 103: int
! 104: non_short_cint_operand (op, mode)
! 105: register rtx op;
! 106: enum machine_mode mode;
! 107: {
! 108: return (GET_CODE (op) == CONST_INT
! 109: && (unsigned) (INTVAL (op) + 0x8000) >= 0x10000);
! 110: }
! 111:
1.1 root 112: /* Returns 1 if OP is a register that is not special (i.e., not MQ,
113: ctr, or lr). */
114:
115: int
1.1.1.3 ! root 116: gpc_reg_operand (op, mode)
1.1 root 117: register rtx op;
118: enum machine_mode mode;
119: {
120: return (register_operand (op, mode)
121: && (GET_CODE (op) != REG || REGNO (op) >= 67 || REGNO (op) < 64));
122: }
123:
124: /* Returns 1 if OP is either a pseudo-register or a register denoting a
125: CR field. */
126:
127: int
128: cc_reg_operand (op, mode)
129: register rtx op;
130: enum machine_mode mode;
131: {
132: return (register_operand (op, mode)
133: && (GET_CODE (op) != REG
134: || REGNO (op) >= FIRST_PSEUDO_REGISTER
135: || CR_REGNO_P (REGNO (op))));
136: }
137:
138: /* Returns 1 if OP is either a constant integer valid for a D-field or a
139: non-special register. If a register, it must be in the proper mode unless
140: MODE is VOIDmode. */
141:
142: int
143: reg_or_short_operand (op, mode)
144: register rtx op;
145: enum machine_mode mode;
146: {
147: if (GET_CODE (op) == CONST_INT)
148: return short_cint_operand (op, mode);
149:
1.1.1.3 ! root 150: return gpc_reg_operand (op, mode);
1.1 root 151: }
152:
153: /* Similar, except check if the negation of the constant would be valid for
154: a D-field. */
155:
156: int
157: reg_or_neg_short_operand (op, mode)
158: register rtx op;
159: enum machine_mode mode;
160: {
161: if (GET_CODE (op) == CONST_INT)
162: return CONST_OK_FOR_LETTER_P (INTVAL (op), 'P');
163:
1.1.1.3 ! root 164: return gpc_reg_operand (op, mode);
1.1 root 165: }
166:
167: /* Return 1 if the operand is either a register or an integer whose high-order
168: 16 bits are zero. */
169:
170: int
171: reg_or_u_short_operand (op, mode)
172: register rtx op;
173: enum machine_mode mode;
174: {
175: if (GET_CODE (op) == CONST_INT
176: && (INTVAL (op) & 0xffff0000) == 0)
177: return 1;
178:
1.1.1.3 ! root 179: return gpc_reg_operand (op, mode);
1.1 root 180: }
181:
182: /* Return 1 is the operand is either a non-special register or ANY
183: constant integer. */
184:
185: int
186: reg_or_cint_operand (op, mode)
187: register rtx op;
188: enum machine_mode mode;
189: {
1.1.1.3 ! root 190: return GET_CODE (op) == CONST_INT || gpc_reg_operand (op, mode);
1.1 root 191: }
192:
193: /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a
194: register with one instruction per word. For SFmode, this means that
195: the low 16-bits are zero. For DFmode, it means the low 16-bits of
196: the first word are zero and the high 16 bits of the second word
197: are zero (usually all bits in the low-order word will be zero).
198:
199: We only do this if we can safely read CONST_DOUBLE_{LOW,HIGH}. */
200:
201: int
202: easy_fp_constant (op, mode)
203: register rtx op;
204: register enum machine_mode mode;
205: {
206: rtx low, high;
207:
208: if (GET_CODE (op) != CONST_DOUBLE
209: || GET_MODE (op) != mode
210: || GET_MODE_CLASS (mode) != MODE_FLOAT)
211: return 0;
212:
213: high = operand_subword (op, 0, 0, mode);
214: low = operand_subword (op, 1, 0, mode);
215:
216: if (high == 0 || GET_CODE (high) != CONST_INT || (INTVAL (high) & 0xffff))
217: return 0;
218:
219: return (mode == SFmode
220: || (low != 0 && GET_CODE (low) == CONST_INT
221: && (INTVAL (low) & 0xffff0000) == 0));
222: }
223:
224: /* Return 1 if the operand is either a floating-point register, a pseudo
225: register, or memory. */
226:
227: int
228: fp_reg_or_mem_operand (op, mode)
229: register rtx op;
230: enum machine_mode mode;
231: {
232: return (memory_operand (op, mode)
233: || (register_operand (op, mode)
234: && (GET_CODE (op) != REG
235: || REGNO (op) >= FIRST_PSEUDO_REGISTER
236: || FP_REGNO_P (REGNO (op)))));
237: }
238:
239: /* Return 1 if the operand is either an easy FP constant (see above) or
240: memory. */
241:
242: int
243: mem_or_easy_const_operand (op, mode)
244: register rtx op;
245: enum machine_mode mode;
246: {
247: return memory_operand (op, mode) || easy_fp_constant (op, mode);
248: }
249:
250: /* Return 1 if the operand is either a non-special register or an item
251: that can be used as the operand of an SI add insn. */
252:
253: int
254: add_operand (op, mode)
255: register rtx op;
256: enum machine_mode mode;
257: {
258: return (reg_or_short_operand (op, mode)
259: || (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff) == 0));
260: }
261:
1.1.1.3 ! root 262: /* Return 1 if OP is a constant but not a valid add_operand. */
! 263:
! 264: int
! 265: non_add_cint_operand (op, mode)
! 266: register rtx op;
! 267: enum machine_mode mode;
! 268: {
! 269: return (GET_CODE (op) == CONST_INT
! 270: && (unsigned) (INTVAL (op) + 0x8000) >= 0x10000
! 271: && (INTVAL (op) & 0xffff) != 0);
! 272: }
! 273:
1.1 root 274: /* Return 1 if the operand is a non-special register or a constant that
275: can be used as the operand of an OR or XOR insn on the RS/6000. */
276:
277: int
278: logical_operand (op, mode)
279: register rtx op;
280: enum machine_mode mode;
281: {
1.1.1.3 ! root 282: return (gpc_reg_operand (op, mode)
1.1 root 283: || (GET_CODE (op) == CONST_INT
284: && ((INTVAL (op) & 0xffff0000) == 0
285: || (INTVAL (op) & 0xffff) == 0)));
286: }
287:
1.1.1.3 ! root 288: /* Return 1 if C is a constant that is not a logical operand (as
! 289: above). */
! 290:
! 291: int
! 292: non_logical_cint_operand (op, mode)
! 293: register rtx op;
! 294: enum machine_mode mode;
! 295: {
! 296: return (GET_CODE (op) == CONST_INT
! 297: && (INTVAL (op) & 0xffff0000) != 0
! 298: && (INTVAL (op) & 0xffff) != 0);
! 299: }
! 300:
1.1 root 301: /* Return 1 if C is a constant that can be encoded in a mask on the
302: RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
303: Reject all ones and all zeros, since these should have been optimized
304: away and confuse the making of MB and ME. */
305:
306: int
307: mask_constant (c)
308: register int c;
309: {
310: int i;
311: int last_bit_value;
312: int transitions = 0;
313:
314: if (c == 0 || c == ~0)
315: return 0;
316:
317: last_bit_value = c & 1;
318:
319: for (i = 1; i < 32; i++)
320: if (((c >>= 1) & 1) != last_bit_value)
321: last_bit_value ^= 1, transitions++;
322:
323: return transitions <= 2;
324: }
325:
326: /* Return 1 if the operand is a constant that is a mask on the RS/6000. */
327:
328: int
329: mask_operand (op, mode)
330: register rtx op;
331: enum machine_mode mode;
332: {
333: return GET_CODE (op) == CONST_INT && mask_constant (INTVAL (op));
334: }
335:
336: /* Return 1 if the operand is either a non-special register or a
337: constant that can be used as the operand of an RS/6000 logical AND insn. */
338:
339: int
340: and_operand (op, mode)
341: register rtx op;
342: enum machine_mode mode;
343: {
344: return (reg_or_short_operand (op, mode)
345: || logical_operand (op, mode)
346: || mask_operand (op, mode));
347: }
348:
1.1.1.3 ! root 349: /* Return 1 if the operand is a constant but not a valid operand for an AND
! 350: insn. */
! 351:
! 352: int
! 353: non_and_cint_operand (op, mode)
! 354: register rtx op;
! 355: enum machine_mode mode;
! 356: {
! 357: return GET_CODE (op) == CONST_INT && ! and_operand (op, mode);
! 358: }
! 359:
1.1 root 360: /* Return 1 if the operand is a general register or memory operand. */
361:
362: int
363: reg_or_mem_operand (op, mode)
364: register rtx op;
365: register enum machine_mode mode;
366: {
1.1.1.3 ! root 367: return gpc_reg_operand (op, mode) || memory_operand (op, mode);
1.1 root 368: }
369:
370: /* Return 1 if the operand, used inside a MEM, is a valid first argument
371: to CALL. This is a SYMBOL_REF or a pseudo-register, which will be
372: forced to lr. */
373:
374: int
375: call_operand (op, mode)
376: register rtx op;
377: enum machine_mode mode;
378: {
379: if (mode != VOIDmode && GET_MODE (op) != mode)
380: return 0;
381:
382: return (GET_CODE (op) == SYMBOL_REF
383: || (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER));
384: }
385:
386: /* Return 1 if this operand is a valid input for a move insn. */
387:
388: int
389: input_operand (op, mode)
390: register rtx op;
391: enum machine_mode mode;
392: {
393: if (memory_operand (op, mode))
394: return 1;
395:
396: /* For floating-point or multi-word mode, only register or memory
397: is valid. */
398: if (GET_MODE_CLASS (mode) == MODE_FLOAT
399: || GET_MODE_SIZE (mode) > UNITS_PER_WORD)
1.1.1.3 ! root 400: return gpc_reg_operand (op, mode);
1.1 root 401:
1.1.1.3 ! root 402: /* The only cases left are integral modes one word or smaller (we
! 403: do not get called for MODE_CC values). These can be in any
! 404: register. */
! 405: if (register_operand (op, mode))
! 406: return;
! 407:
! 408: /* For HImode and QImode, any constant is valid. */
! 409: if ((mode == HImode || mode == QImode)
! 410: && GET_CODE (op) == CONST_INT)
1.1 root 411: return 1;
412:
413: /* Otherwise, we will be doing this SET with an add, so anything valid
414: for an add will be valid. */
415: return add_operand (op, mode);
416: }
417:
418: /* Return 1 if OP is a load multiple operation. It is known to be a
419: PARALLEL and the first section will be tested. */
420:
421: int
422: load_multiple_operation (op, mode)
423: rtx op;
424: enum machine_mode mode;
425: {
426: int count = XVECLEN (op, 0);
427: int dest_regno;
428: rtx src_addr;
429: int i;
430:
431: /* Perform a quick check so we don't blow up below. */
432: if (count <= 1
433: || GET_CODE (XVECEXP (op, 0, 0)) != SET
434: || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
435: || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
436: return 0;
437:
438: dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
439: src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
440:
441: for (i = 1; i < count; i++)
442: {
443: rtx elt = XVECEXP (op, 0, i);
444:
445: if (GET_CODE (elt) != SET
446: || GET_CODE (SET_DEST (elt)) != REG
447: || GET_MODE (SET_DEST (elt)) != SImode
448: || REGNO (SET_DEST (elt)) != dest_regno + i
449: || GET_CODE (SET_SRC (elt)) != MEM
450: || GET_MODE (SET_SRC (elt)) != SImode
451: || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
452: || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
453: || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
454: || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != i * 4)
455: return 0;
456: }
457:
458: return 1;
459: }
460:
461: /* Similar, but tests for store multiple. Here, the second vector element
462: is a CLOBBER. It will be tested later. */
463:
464: int
465: store_multiple_operation (op, mode)
466: rtx op;
467: enum machine_mode mode;
468: {
469: int count = XVECLEN (op, 0) - 1;
470: int src_regno;
471: rtx dest_addr;
472: int i;
473:
474: /* Perform a quick check so we don't blow up below. */
475: if (count <= 1
476: || GET_CODE (XVECEXP (op, 0, 0)) != SET
477: || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
478: || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
479: return 0;
480:
481: src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
482: dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
483:
484: for (i = 1; i < count; i++)
485: {
486: rtx elt = XVECEXP (op, 0, i + 1);
487:
488: if (GET_CODE (elt) != SET
489: || GET_CODE (SET_SRC (elt)) != REG
490: || GET_MODE (SET_SRC (elt)) != SImode
491: || REGNO (SET_SRC (elt)) != src_regno + i
492: || GET_CODE (SET_DEST (elt)) != MEM
493: || GET_MODE (SET_DEST (elt)) != SImode
494: || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
495: || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
496: || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
497: || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != i * 4)
498: return 0;
499: }
500:
501: return 1;
502: }
503:
504: /* Return 1 if OP is a comparison operation that is valid for a branch insn.
505: We only check the opcode against the mode of the CC value here. */
506:
507: int
508: branch_comparison_operator (op, mode)
509: register rtx op;
510: enum machine_mode mode;
511: {
512: enum rtx_code code = GET_CODE (op);
513: enum machine_mode cc_mode;
514:
515: if (GET_RTX_CLASS (code) != '<')
516: return 0;
517:
518: cc_mode = GET_MODE (XEXP (op, 0));
519: if (GET_MODE_CLASS (cc_mode) != MODE_CC)
520: return 0;
521:
522: if ((code == GT || code == LT || code == GE || code == LE)
523: && cc_mode == CCUNSmode)
524: return 0;
525:
526: if ((code == GTU || code == LTU || code == GEU || code == LEU)
527: && (cc_mode != CCUNSmode))
528: return 0;
529:
530: return 1;
531: }
532:
533: /* Return 1 if OP is a comparison operation that is valid for an scc insn.
534: We check the opcode against the mode of the CC value and disallow EQ or
535: NE comparisons for integers. */
536:
537: int
538: scc_comparison_operator (op, mode)
539: register rtx op;
540: enum machine_mode mode;
541: {
542: enum rtx_code code = GET_CODE (op);
543: enum machine_mode cc_mode;
544:
545: if (GET_MODE (op) != mode && mode != VOIDmode)
546: return 0;
547:
548: if (GET_RTX_CLASS (code) != '<')
549: return 0;
550:
551: cc_mode = GET_MODE (XEXP (op, 0));
552: if (GET_MODE_CLASS (cc_mode) != MODE_CC)
553: return 0;
554:
555: if (code == NE && cc_mode != CCFPmode)
556: return 0;
557:
558: if ((code == GT || code == LT || code == GE || code == LE)
559: && cc_mode == CCUNSmode)
560: return 0;
561:
562: if ((code == GTU || code == LTU || code == GEU || code == LEU)
563: && (cc_mode != CCUNSmode))
564: return 0;
565:
1.1.1.3 ! root 566: if (cc_mode == CCEQmode && code != EQ && code != NE)
! 567: return 0;
! 568:
1.1 root 569: return 1;
570: }
571:
572: /* Return 1 if ANDOP is a mask that has no bits on that are not in the
573: mask required to convert the result of a rotate insn into a shift
574: left insn of SHIFTOP bits. Both are known to be CONST_INT. */
575:
576: int
577: includes_lshift_p (shiftop, andop)
578: register rtx shiftop;
579: register rtx andop;
580: {
581: int shift_mask = (~0 << INTVAL (shiftop));
582:
583: return (INTVAL (andop) & ~shift_mask) == 0;
584: }
585:
586: /* Similar, but for right shift. */
587:
588: int
589: includes_rshift_p (shiftop, andop)
590: register rtx shiftop;
591: register rtx andop;
592: {
593: unsigned shift_mask = ~0;
594:
595: shift_mask >>= INTVAL (shiftop);
596:
597: return (INTVAL (andop) & ~ shift_mask) == 0;
598: }
599:
600: /* Return the register class of a scratch register needed to copy IN into
601: or out of a register in CLASS in MODE. If it can be done directly,
602: NO_REGS is returned. */
603:
604: enum reg_class
605: secondary_reload_class (class, mode, in)
606: enum reg_class class;
607: enum machine_mode mode;
608: rtx in;
609: {
610: int regno = true_regnum (in);
611:
612: if (regno >= FIRST_PSEUDO_REGISTER)
613: regno = -1;
614:
615: /* We can place anything into GENERAL_REGS and can put GENERAL_REGS
616: into anything. */
617: if (class == GENERAL_REGS || class == BASE_REGS
618: || (regno >= 0 && INT_REGNO_P (regno)))
619: return NO_REGS;
620:
621: /* Constants, memory, and FP registers can go into FP registers. */
622: if ((regno == -1 || FP_REGNO_P (regno))
623: && (class == FLOAT_REGS || class == NON_SPECIAL_REGS))
624: return NO_REGS;
625:
626: /* We can copy among the CR registers. */
627: if ((class == CR_REGS || class == CR0_REGS)
628: && regno >= 0 && CR_REGNO_P (regno))
629: return NO_REGS;
630:
631: /* Otherwise, we need GENERAL_REGS. */
632: return GENERAL_REGS;
633: }
634:
635: /* Given a comparison operation, return the bit number in CCR to test. We
636: know this is a valid comparison.
637:
638: SCC_P is 1 if this is for an scc. That means that %D will have been
639: used instead of %C, so the bits will be in different places.
640:
1.1.1.2 root 641: Return -1 if OP isn't a valid comparison for some reason. */
1.1 root 642:
643: int
644: ccr_bit (op, scc_p)
645: register rtx op;
646: int scc_p;
647: {
648: enum rtx_code code = GET_CODE (op);
649: enum machine_mode cc_mode;
650: int cc_regnum;
651: int base_bit;
652:
653: if (GET_RTX_CLASS (code) != '<')
654: return -1;
655:
656: cc_mode = GET_MODE (XEXP (op, 0));
657: cc_regnum = REGNO (XEXP (op, 0));
658: base_bit = 4 * (cc_regnum - 68);
659:
1.1.1.3 ! root 660: /* In CCEQmode cases we have made sure that the result is always in the
! 661: third bit of the CR field. */
! 662:
! 663: if (cc_mode == CCEQmode)
! 664: return base_bit + 3;
! 665:
1.1 root 666: switch (code)
667: {
668: case NE:
669: return scc_p ? base_bit + 3 : base_bit + 2;
670: case EQ:
671: return base_bit + 2;
672: case GT: case GTU:
673: return base_bit + 1;
674: case LT: case LTU:
675: return base_bit;
676:
677: case GE: case GEU:
678: /* If floating-point, we will have done a cror to put the bit in the
679: unordered position. So test that bit. For integer, this is ! LT
680: unless this is an scc insn. */
681: return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit;
682:
683: case LE: case LEU:
684: return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit + 1;
685:
686: default:
687: abort ();
688: }
689: }
690:
691: /* Print an operand. Recognize special options, documented below. */
692:
693: void
694: print_operand (file, x, code)
695: FILE *file;
696: rtx x;
697: char code;
698: {
699: int i;
700: int val;
701:
702: /* These macros test for integers and extract the low-order bits. */
703: #define INT_P(X) \
704: ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
705: && GET_MODE (X) == VOIDmode)
706:
707: #define INT_LOWPART(X) \
708: (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
709:
710: switch (code)
711: {
712: case 'h':
713: /* If constant, output low-order six bits. Otherwise, write normally. */
714: if (INT_P (x))
715: fprintf (file, "%d", INT_LOWPART (x) & 31);
716: else
717: print_operand (file, x, 0);
718: return;
719:
720: case 'H':
721: /* X must be a constant. Output the low order 6 bits plus 24. */
722: if (! INT_P (x))
723: output_operand_lossage ("invalid %%H value");
724:
725: fprintf (file, "%d", (INT_LOWPART (x) + 24) & 31);
726: return;
727:
728: case 'b':
729: /* Low-order 16 bits of constant, unsigned. */
730: if (! INT_P (x))
731: output_operand_lossage ("invalid %%b value");
732:
733: fprintf (file, "%d", INT_LOWPART (x) & 0xffff);
734: return;
735:
736: case 'w':
737: /* If constant, low-order 16 bits of constant, signed. Otherwise, write
738: normally. */
739: if (INT_P (x))
740: fprintf (file, "%d", (INT_LOWPART (x) << 16) >> 16);
741: else
742: print_operand (file, x, 0);
743: return;
744:
745: case 'W':
746: /* If constant, low-order 16 bits of constant, unsigned.
747: Otherwise, write normally. */
748: if (INT_P (x))
749: fprintf (file, "%d", INT_LOWPART (x) & 0xffff);
750: else
751: print_operand (file, x, 0);
752: return;
753:
754: case 'u':
755: /* High-order 16 bits of constant. */
756: if (! INT_P (x))
757: output_operand_lossage ("invalid %%u value");
758:
759: fprintf (file, "%d", (INT_LOWPART (x) >> 16) & 0xffff);
760: return;
761:
762: case 's':
763: /* Low 5 bits of 32 - value */
764: if (! INT_P (x))
765: output_operand_lossage ("invalid %%s value");
766:
767: fprintf (file, "%d", (32 - INT_LOWPART (x)) & 31);
768: return;
769:
770: case 'S':
771: /* Low 5 bits of 31 - value */
772: if (! INT_P (x))
773: output_operand_lossage ("invalid %%S value");
774:
775: fprintf (file, "%d", (31 - INT_LOWPART (x)) & 31);
776: return;
777:
778: case 'p':
779: /* X is a CONST_INT that is a power of two. Output the logarithm. */
780: if (! INT_P (x)
781: || (i = exact_log2 (INT_LOWPART (x))) < 0)
782: output_operand_lossage ("invalid %%p value");
783:
784: fprintf (file, "%d", i);
785: return;
786:
787: case 'm':
788: /* MB value for a mask operand. */
789: if (! mask_operand (x, VOIDmode))
790: output_operand_lossage ("invalid %%m value");
791:
792: val = INT_LOWPART (x);
793:
794: /* If the high bit is set and the low bit is not, the value is zero.
795: If the high bit is zero, the value is the first 1 bit we find from
796: the left. */
797: if (val < 0 && (val & 1) == 0)
798: {
799: fprintf (file, "0");
800: return;
801: }
802: else if (val >= 0)
803: {
804: for (i = 1; i < 32; i++)
805: if ((val <<= 1) < 0)
806: break;
807: fprintf (file, "%d", i);
808: return;
809: }
810:
811: /* Otherwise, look for the first 0 bit from the right. The result is its
812: number plus 1. We know the low-order bit is one. */
813: for (i = 0; i < 32; i++)
814: if (((val >>= 1) & 1) == 0)
815: break;
816:
817: /* If we ended in ...01, I would be 0. The correct value is 31, so
818: we want 31 - i. */
819: fprintf (file, "%d", 31 - i);
820: return;
821:
822: case 'M':
823: /* ME value for a mask operand. */
824: if (! mask_operand (x, VOIDmode))
825: output_operand_lossage ("invalid %%m value");
826:
827: val = INT_LOWPART (x);
828:
829: /* If the low bit is set and the high bit is not, the value is 31.
830: If the low bit is zero, the value is the first 1 bit we find from
831: the right. */
832: if ((val & 1) && val >= 0)
833: {
834: fprintf (file, "31");
835: return;
836: }
837: else if ((val & 1) == 0)
838: {
839: for (i = 0; i < 32; i++)
840: if ((val >>= 1) & 1)
841: break;
842:
843: /* If we had ....10, I would be 0. The result should be
844: 30, so we need 30 - i. */
845: fprintf (file, "%d", 30 - i);
846: return;
847: }
848:
849: /* Otherwise, look for the first 0 bit from the left. The result is its
850: number minus 1. We know the high-order bit is one. */
851: for (i = 0; i < 32; i++)
852: if ((val <<= 1) >= 0)
853: break;
854:
855: fprintf (file, "%d", i);
856: return;
857:
858: case 'f':
859: /* X is a CR register. Print the shift count needed to move it
860: to the high-order four bits. */
861: if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
862: output_operand_lossage ("invalid %%f value");
863: else
864: fprintf (file, "%d", 4 * (REGNO (x) - 68));
865: return;
866:
867: case 'F':
868: /* Similar, but print the count for the rotate in the opposite
869: direction. */
870: if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
871: output_operand_lossage ("invalid %%F value");
872: else
873: fprintf (file, "%d", 32 - 4 * (REGNO (x) - 68));
874: return;
875:
1.1.1.3 ! root 876: case 'E':
! 877: /* X is a CR register. Print the number of the third bit of the CR */
! 878: if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
! 879: output_operand_lossage ("invalid %%E value");
! 880:
! 881: fprintf(file, "%d", 4 * (REGNO (x) - 68) + 3);
! 882: break;
! 883:
1.1 root 884: case 'R':
885: /* X is a CR register. Print the mask for `mtcrf'. */
886: if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
887: output_operand_lossage ("invalid %%R value");
888: else
889: fprintf (file, "%d", 128 >> (REGNO (x) - 68));
890: return;
891:
892: case 'X':
893: if (GET_CODE (x) == MEM
894: && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x, 0)))
895: fprintf (file, "x");
896: return;
897:
898: case 'U':
1.1.1.2 root 899: /* Print `u' is this has an auto-increment or auto-decrement. */
1.1 root 900: if (GET_CODE (x) == MEM
901: && (GET_CODE (XEXP (x, 0)) == PRE_INC
902: || GET_CODE (XEXP (x, 0)) == PRE_DEC))
903: fprintf (file, "u");
904: return;
905:
906: case 'I':
907: /* Print `i' is this is a constant, else nothing. */
908: if (INT_P (x))
909: fprintf (file, "i");
910: return;
911:
912: case 'N':
913: /* Write the number of elements in the vector times 4. */
914: if (GET_CODE (x) != PARALLEL)
915: output_operand_lossage ("invalid %%N value");
916:
917: fprintf (file, "%d", XVECLEN (x, 0) * 4);
918: return;
919:
920: case 'O':
921: /* Similar, but subtract 1 first. */
922: if (GET_CODE (x) != PARALLEL)
923: output_operand_lossage ("invalid %%N value");
924:
925: fprintf (file, "%d", (XVECLEN (x, 0) - 1) * 4);
926: return;
927:
928: case 'P':
929: /* The operand must be an indirect memory reference. The result
930: is the register number. */
931: if (GET_CODE (x) != MEM || GET_CODE (XEXP (x, 0)) != REG
932: || REGNO (XEXP (x, 0)) >= 32)
933: output_operand_lossage ("invalid %%P value");
934:
935: fprintf (file, "%d", REGNO (XEXP (x, 0)));
936: return;
937:
938: case 'L':
939: /* Write second word of DImode or DFmode reference. Works on register
940: or non-indexed memory only. */
941: if (GET_CODE (x) == REG)
942: fprintf (file, "%d", REGNO (x) + 1);
943: else if (GET_CODE (x) == MEM)
944: {
945: /* Handle possible auto-increment. Since it is pre-increment and
946: we have already done it, we can just use an offset of four. */
947: if (GET_CODE (XEXP (x, 0)) == PRE_INC
948: || GET_CODE (XEXP (x, 0)) == PRE_DEC)
949: output_address (plus_constant (XEXP (XEXP (x, 0), 0), 4));
950: else
951: output_address (plus_constant (XEXP (x, 0), 4));
952: }
953: return;
954:
955: case 'Y':
956: /* Similar, for third word of TImode */
957: if (GET_CODE (x) == REG)
958: fprintf (file, "%d", REGNO (x) + 2);
959: else if (GET_CODE (x) == MEM)
960: {
961: if (GET_CODE (XEXP (x, 0)) == PRE_INC
962: || GET_CODE (XEXP (x, 0)) == PRE_DEC)
963: output_address (plus_constant (XEXP (XEXP (x, 0), 0), 8));
964: else
965: output_address (plus_constant (XEXP (x, 0), 8));
966: }
967: return;
968:
969: case 'Z':
970: /* Similar, for last word of TImode. */
971: if (GET_CODE (x) == REG)
972: fprintf (file, "%d", REGNO (x) + 3);
973: else if (GET_CODE (x) == MEM)
974: {
975: if (GET_CODE (XEXP (x, 0)) == PRE_INC
976: || GET_CODE (XEXP (x, 0)) == PRE_DEC)
977: output_address (plus_constant (XEXP (XEXP (x, 0), 0), 12));
978: else
979: output_address (plus_constant (XEXP (x, 0), 12));
980: }
981: return;
982:
983: case 't':
984: /* Write 12 if this jump operation will branch if true, 4 otherwise.
985: All floating-point operations except NE branch true and integer
986: EQ, LT, GT, LTU and GTU also branch true. */
987: if (GET_RTX_CLASS (GET_CODE (x)) != '<')
988: output_operand_lossage ("invalid %%t value");
989:
990: else if ((GET_MODE (XEXP (x, 0)) == CCFPmode
991: && GET_CODE (x) != NE)
992: || GET_CODE (x) == EQ
993: || GET_CODE (x) == LT || GET_CODE (x) == GT
994: || GET_CODE (x) == LTU || GET_CODE (x) == GTU)
995: fprintf (file, "12");
996: else
997: fprintf (file, "4");
998: return;
999:
1000: case 'T':
1001: /* Opposite of 't': write 4 if this jump operation will branch if true,
1002: 12 otherwise. */
1003: if (GET_RTX_CLASS (GET_CODE (x)) != '<')
1004: output_operand_lossage ("invalid %%t value");
1005:
1006: else if ((GET_MODE (XEXP (x, 0)) == CCFPmode
1007: && GET_CODE (x) != NE)
1008: || GET_CODE (x) == EQ
1009: || GET_CODE (x) == LT || GET_CODE (x) == GT
1010: || GET_CODE (x) == LTU || GET_CODE (x) == GTU)
1011: fprintf (file, "4");
1012: else
1013: fprintf (file, "12");
1014: return;
1015:
1016: case 'j':
1017: /* Write the bit number in CCR for jump. */
1018: i = ccr_bit (x, 0);
1019: if (i == -1)
1020: output_operand_lossage ("invalid %%j code");
1021: else
1022: fprintf (file, "%d", i);
1023: return;
1024:
1025: case 'J':
1026: /* Similar, but add one for shift count in rlinm for scc and pass
1027: scc flag to `ccr_bit'. */
1028: i = ccr_bit (x, 1);
1029: if (i == -1)
1030: output_operand_lossage ("invalid %%J code");
1031: else
1032: fprintf (file, "%d", i + 1);
1033: return;
1034:
1035: case 'C':
1036: /* This is an optional cror needed for LE or GE floating-point
1037: comparisons. Otherwise write nothing. */
1038: if ((GET_CODE (x) == LE || GET_CODE (x) == GE)
1039: && GET_MODE (XEXP (x, 0)) == CCFPmode)
1040: {
1041: int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
1042:
1043: fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3,
1044: base_bit + 2, base_bit + (GET_CODE (x) == GE));
1045: }
1046: return;
1047:
1048: case 'D':
1049: /* Similar, except that this is for an scc, so we must be able to
1050: encode the test in a single bit that is one. We do the above
1051: for any LE, GE, GEU, or LEU and invert the bit for NE. */
1052: if (GET_CODE (x) == LE || GET_CODE (x) == GE
1053: || GET_CODE (x) == LEU || GET_CODE (x) == GEU)
1054: {
1055: int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
1056:
1057: fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3,
1058: base_bit + 2,
1059: base_bit + (GET_CODE (x) == GE || GET_CODE (x) == GEU));
1060: }
1061:
1062: else if (GET_CODE (x) == NE)
1063: {
1064: int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
1065:
1066: fprintf (file, "crnor %d,%d,%d\n\t", base_bit + 3,
1067: base_bit + 2, base_bit + 2);
1068: }
1069: return;
1070:
1071: case 'z':
1.1.1.2 root 1072: /* X is a SYMBOL_REF. Write out the name preceded by a
1073: period and without any trailing data in brackets. Used for function
1.1 root 1074: names. */
1075: if (GET_CODE (x) != SYMBOL_REF)
1076: abort ();
1077:
1078: fprintf (file, ".");
1079: RS6000_OUTPUT_BASENAME (file, XSTR (x, 0));
1080: return;
1081:
1.1.1.2 root 1082: case 'A':
1083: /* If X is a constant integer whose low-order 5 bits are zero,
1084: write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
1085: in the RS/6000 assembler where "sri" with a zero shift count
1086: write a trash instruction. */
1.1.1.3 ! root 1087: if (GET_CODE (x) == CONST_INT && (INTVAL (x) & 31) == 0)
1.1.1.2 root 1088: fprintf (file, "l");
1089: else
1090: fprintf (file, "r");
1091: return;
1092:
1.1 root 1093: case 0:
1094: if (GET_CODE (x) == REG)
1095: fprintf (file, "%s", reg_names[REGNO (x)]);
1096: else if (GET_CODE (x) == MEM)
1097: {
1098: /* We need to handle PRE_INC and PRE_DEC here, since we need to
1099: know the width from the mode. */
1100: if (GET_CODE (XEXP (x, 0)) == PRE_INC)
1101: fprintf (file, "%d(%d)", GET_MODE_SIZE (GET_MODE (x)),
1102: REGNO (XEXP (XEXP (x, 0), 0)));
1103: else if (GET_CODE (XEXP (x, 0)) == PRE_DEC)
1104: fprintf (file, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x)),
1105: REGNO (XEXP (XEXP (x, 0), 0)));
1106: else
1107: output_address (XEXP (x, 0));
1108: }
1109: else
1110: output_addr_const (file, x);
1111: break;
1112:
1113: default:
1114: output_operand_lossage ("invalid %%xn code");
1115: }
1116: }
1117:
1118: /* Print the address of an operand. */
1119:
1120: void
1121: print_operand_address (file, x)
1122: FILE *file;
1123: register rtx x;
1124: {
1125: if (GET_CODE (x) == REG)
1126: fprintf (file, "0(%d)", REGNO (x));
1127: else if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == CONST)
1128: {
1129: output_addr_const (file, x);
1130: fprintf (file, "(2)");
1131: }
1132: else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == REG)
1133: {
1134: if (REGNO (XEXP (x, 0)) == 0)
1135: fprintf (file, "%d,%d", REGNO (XEXP (x, 1)), REGNO (XEXP (x, 0)));
1136: else
1137: fprintf (file, "%d,%d", REGNO (XEXP (x, 0)), REGNO (XEXP (x, 1)));
1138: }
1139: else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT)
1140: fprintf (file, "%d(%d)", INTVAL (XEXP (x, 1)), REGNO (XEXP (x, 0)));
1141: else
1142: abort ();
1143: }
1144:
1145: /* This page contains routines that are used to determine what the function
1146: prologue and epilogue code will do and write them out. */
1147:
1148: /* Return the first fixed-point register that is required to be saved. 32 if
1149: none. */
1150:
1151: int
1152: first_reg_to_save ()
1153: {
1154: int first_reg;
1155:
1156: /* Find lowest numbered live register. */
1157: for (first_reg = 13; first_reg <= 31; first_reg++)
1158: if (regs_ever_live[first_reg])
1159: break;
1160:
1.1.1.3 ! root 1161: /* If profiling, then we must save/restore every register that contains
! 1162: a parameter before/after the .mcount call. Use registers from 30 down
! 1163: to 23 to do this. Don't use the frame pointer in reg 31.
! 1164:
! 1165: For now, save enough room for all of the parameter registers. */
! 1166: if (profile_flag)
! 1167: if (first_reg > 23)
! 1168: first_reg = 23;
! 1169:
1.1 root 1170: return first_reg;
1171: }
1172:
1173: /* Similar, for FP regs. */
1174:
1175: int
1176: first_fp_reg_to_save ()
1177: {
1178: int first_reg;
1179:
1180: /* Find lowest numbered live register. */
1181: for (first_reg = 14 + 32; first_reg <= 63; first_reg++)
1182: if (regs_ever_live[first_reg])
1183: break;
1184:
1185: return first_reg;
1186: }
1187:
1188: /* Return 1 if we need to save CR. */
1189:
1190: int
1191: must_save_cr ()
1192: {
1193: return regs_ever_live[70] || regs_ever_live[71] || regs_ever_live[72];
1194: }
1195:
1196: /* Compute the size of the save area in the stack, including the space for
1197: the fixed area. */
1198:
1199: int
1200: rs6000_sa_size ()
1201: {
1202: int size;
1203: int i;
1204:
1205: /* We have the six fixed words, plus the size of the register save
1206: areas, rounded to a double-word. */
1207: size = 6 + (32 - first_reg_to_save ()) + (64 - first_fp_reg_to_save ()) * 2;
1208: if (size & 1)
1209: size++;
1210:
1211: return size * 4;
1212: }
1213:
1214: /* Return non-zero if this function makes calls. */
1215:
1216: int
1217: rs6000_makes_calls ()
1218: {
1219: rtx insn;
1220:
1221: for (insn = get_insns (); insn; insn = next_insn (insn))
1222: if (GET_CODE (insn) == CALL_INSN)
1223: return 1;
1224:
1225: return 0;
1226: }
1227:
1228: /* Return non-zero if this function needs to push space on the stack. */
1229:
1230: int
1231: rs6000_pushes_stack ()
1232: {
1233: int total_size = (rs6000_sa_size () + get_frame_size ()
1234: + current_function_outgoing_args_size);
1235:
1236: /* We need to push the stack if a frame pointer is needed (because the
1237: stack might be dynamically adjusted), if we are debugging, if the
1238: total stack size is more than 220 bytes, or if we make calls. */
1239:
1240: return (frame_pointer_needed || write_symbols != NO_DEBUG
1241: || total_size > 220
1242: || rs6000_makes_calls ());
1243: }
1244:
1245: /* Write function prologue. */
1246:
1247: void
1248: output_prolog (file, size)
1249: FILE *file;
1250: int size;
1251: {
1252: int first_reg = first_reg_to_save ();
1253: int must_push = rs6000_pushes_stack ();
1254: int first_fp_reg = first_fp_reg_to_save ();
1255: int basic_size = rs6000_sa_size ();
1256: int total_size = (basic_size + size + current_function_outgoing_args_size);
1257:
1258: /* Round size to multiple of 8 bytes. */
1259: total_size = (total_size + 7) & ~7;
1260:
1261: /* Write .extern for any function we will call to save and restore fp
1262: values. */
1263: if (first_fp_reg < 62)
1264: fprintf (file, "\t.extern ._savef%d\n\t.extern ._restf%d\n",
1265: first_fp_reg - 32, first_fp_reg - 32);
1266:
1267: /* Write .extern for truncation routines, if needed. */
1268: if (rs6000_trunc_used && ! trunc_defined)
1269: {
1270: fprintf (file, "\t.extern .itrunc\n\t.extern .uitrunc\n");
1271: trunc_defined = 1;
1272: }
1273:
1.1.1.3 ! root 1274: /* If we have to call a function to save fpr's, or if we are doing profiling,
! 1275: then we will be using LR. */
! 1276: if (first_fp_reg < 62 || profile_flag)
1.1 root 1277: regs_ever_live[65] = 1;
1278:
1279: /* If we use the link register, get it into r0. */
1280: if (regs_ever_live[65])
1281: fprintf (file, "\tmflr 0\n");
1282:
1283: /* If we need to save CR, put it into r12. */
1284: if (must_save_cr ())
1285: fprintf (file, "\tmfcr 12\n");
1286:
1287: /* Do any required saving of fpr's. If only one or two to save, do it
1288: ourself. Otherwise, call function. */
1289: if (first_fp_reg == 62)
1290: fprintf (file, "\tstfd 30,-16(1)\n\tstfd 31,-8(1)\n");
1291: else if (first_fp_reg == 63)
1292: fprintf (file, "\tstfd 31,-8(1)\n");
1293: else if (first_fp_reg != 64)
1294: fprintf (file, "\tbl ._savef%d\n\tcror 15,15,15\n", first_fp_reg - 32);
1295:
1296: /* Now save gpr's. */
1297: if (first_reg == 31)
1298: fprintf (file, "\tst 31,%d(1)\n", -4 - (64 - first_fp_reg) * 8);
1299: else if (first_reg != 32)
1300: fprintf (file, "\tstm %d,%d(1)\n", first_reg,
1301: - (32 - first_reg) * 4 - (64 - first_fp_reg) * 8);
1302:
1303: /* Save lr if we used it. */
1304: if (regs_ever_live[65])
1305: fprintf (file, "\tst 0,8(1)\n");
1306:
1307: /* Save CR if we use any that must be preserved. */
1308: if (must_save_cr ())
1309: fprintf (file, "\tst 12,4(1)\n");
1310:
1311: /* Update stack and set back pointer. */
1312: if (must_push)
1313: {
1314: if (total_size < 32767)
1315: fprintf (file, "\tstu 1,%d(1)\n", - total_size);
1316: else
1317: {
1318: fprintf (file, "\tcau 0,0,%d\n\toril 0,0,%d\n",
1319: (total_size >> 16) & 0xffff, total_size & 0xffff);
1320: fprintf (file, "\tsf 12,0,1\n\tst 1,0(12)\n\toril 1,12,0\n");
1321: }
1322: }
1323:
1324: /* Set frame pointer, if needed. */
1325: if (frame_pointer_needed)
1326: fprintf (file, "\toril 31,1,0\n");
1327: }
1328:
1329: /* Write function epilogue. */
1330:
1331: void
1332: output_epilog (file, size)
1333: FILE *file;
1334: int size;
1335: {
1336: int first_reg = first_reg_to_save ();
1337: int must_push = rs6000_pushes_stack ();
1338: int first_fp_reg = first_fp_reg_to_save ();
1339: int basic_size = rs6000_sa_size ();
1340: int total_size = (basic_size + size + current_function_outgoing_args_size);
1341: rtx insn = get_last_insn ();
1342:
1343: /* Round size to multiple of 8 bytes. */
1344: total_size = (total_size + 7) & ~7;
1345:
1346: /* If the last insn was a BARRIER, we don't have to write anything except
1347: the trace table. */
1348: if (GET_CODE (insn) == NOTE)
1349: insn = prev_nonnote_insn (insn);
1350: if (insn == 0 || GET_CODE (insn) != BARRIER)
1351: {
1352: /* If we have a frame pointer, a call to alloca, or a large stack
1353: frame, restore the old stack pointer using the backchain. Otherwise,
1354: we know what size to update it with. */
1355: if (frame_pointer_needed || current_function_calls_alloca
1356: || total_size > 32767)
1357: fprintf (file, "\tl 1,0(1)\n");
1358: else if (must_push)
1359: fprintf (file, "\tai 1,1,%d\n", total_size);
1360:
1.1.1.2 root 1361: /* Get the old lr if we saved it. */
1.1 root 1362: if (regs_ever_live[65])
1.1.1.2 root 1363: fprintf (file, "\tl 0,8(1)\n");
1.1 root 1364:
1365: /* Get the old cr if we saved it. */
1366: if (must_save_cr ())
1367: fprintf (file, "\tl 12,4(1)\n");
1368:
1.1.1.2 root 1369: /* Set LR here to try to overlap restores below. */
1370: if (regs_ever_live[65])
1371: fprintf (file, "\tmtlr 0\n");
1372:
1.1 root 1373: /* Restore gpr's. */
1374: if (first_reg == 31)
1375: fprintf (file, "\tl 31,%d(1)\n", -4 - (64 - first_fp_reg) * 8);
1376: else if (first_reg != 32)
1377: fprintf (file, "\tlm %d,%d(1)\n", first_reg,
1378: - (32 - first_reg) * 4 - (64 - first_fp_reg) * 8);
1379:
1.1.1.2 root 1380: /* Restore fpr's if we can do it without calling a function. */
1.1 root 1381: if (first_fp_reg == 62)
1382: fprintf (file, "\tlfd 30,-16(1)\n\tlfd 31,-8(1)\n");
1383: else if (first_fp_reg == 63)
1384: fprintf (file, "\tlfd 31,-8(1)\n");
1385:
1386: /* If we saved cr, restore it here. Just set cr2, cr3, and cr4. */
1387: if (must_save_cr ())
1388: fprintf (file, "\tmtcrf 0x38,12\n");
1389:
1.1.1.2 root 1390: /* If we have to restore more than two FP registers, branch to the
1391: restore function. It will return to our caller. */
1392: if (first_fp_reg < 62)
1393: fprintf (file, "\tb ._restf%d\n\tcror 15,15,15\n", first_fp_reg - 32);
1394: else
1395: fprintf (file, "\tbr\n");
1.1 root 1396: }
1.1.1.2 root 1397:
1.1.1.3 ! root 1398: /* Output a traceback table here. See /usr/include/sys/debug.h for info
! 1399: on its format. */
! 1400: {
! 1401: char *fname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0);
! 1402: int fixed_parms, float_parms, parm_info;
! 1403: int i;
! 1404:
! 1405: /* Need label immediately before tbtab, so we can compute its offset
! 1406: from the function start. */
! 1407: if (*fname == '*')
! 1408: ++fname;
! 1409: fprintf (file, "LT..");
! 1410: ASM_OUTPUT_LABEL (file, fname);
! 1411:
! 1412: /* The .tbtab psuedo-op can only be used for the first eight
! 1413: expressions, since it can't handle the possibly variable length
! 1414: fields that follow. However, if you omit the optional fields,
! 1415: the assembler outputs zeros for all optional fields anyways, giving each
! 1416: variable length field is minimum length (as defined in sys/debug.h).
! 1417: Thus we can not use the .tbtab psuedo-op at all. */
! 1418:
! 1419: /* An all-zero word flags the start of the tbtab, for debuggers that have
! 1420: to find it by searching forward from the entry point or from the
! 1421: current pc. */
! 1422: fprintf (file, "\t.long 0\n");
! 1423:
! 1424: /* Tbtab format type. Use format type 0. */
! 1425: fprintf (file, "\t.byte 0,");
! 1426:
! 1427: /* Language type. Unfortunately, there doesn't seem to be any official way
! 1428: to get this info, so we use language_string. C is 0. C++ is 9.
! 1429: No number defined for Obj-C, but it doesn't have its own
! 1430: language_string, so we can't detect it anyways. */
! 1431: if (! strcmp (language_string, "GNU C"))
! 1432: i = 0;
! 1433: else if (! strcmp (language_string, "GNU C++"))
! 1434: i = 9;
! 1435: else
! 1436: abort ();
! 1437: fprintf (file, "%d,", i);
! 1438:
! 1439: /* 8 single bit fields: global linkage (not set for C extern linkage,
! 1440: apparently a PL/I convention?), out-of-line epilogue/prologue, offset
! 1441: from start of procedure stored in tbtab, internal function, function
! 1442: has controlled storage, function has no toc, function uses fp,
! 1443: function logs/aborts fp operations. */
! 1444: /* Assume that fp operations are used if any fp reg must be saved. */
! 1445: fprintf (file, "%d,", (1 << 5) | ((first_fp_reg != 64) << 1));
! 1446:
! 1447: /* 6 bitfields: function is interrupt handler, name present in proc table,
! 1448: function calls alloca, on condition directives (controls stack walks,
! 1449: 3 bits), saves condition reg, saves link reg. */
! 1450: /* The `function calls alloca' bit seems to be set whenever reg 31 is
! 1451: set up as a frame pointer, even when there is no alloca call. */
! 1452: fprintf (file, "%d,",
! 1453: ((1 << 6) | (frame_pointer_needed << 5)
! 1454: | (must_save_cr () << 1) | (regs_ever_live[65])));
! 1455:
! 1456: /* 3 bitfields: saves backchain, spare bit, number of fpr saved
! 1457: (6 bits). */
! 1458: fprintf (file, "%d,",
! 1459: (must_push << 7) | (64 - first_fp_reg_to_save ()));
! 1460:
! 1461: /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */
! 1462: fprintf (file, "%d,", (32 - first_reg_to_save ()));
! 1463:
! 1464: {
! 1465: /* Compute the parameter info from the function decl argument list. */
! 1466: tree decl;
! 1467: int next_parm_info_bit;
! 1468:
! 1469: next_parm_info_bit = 31;
! 1470: parm_info = 0;
! 1471: fixed_parms = 0;
! 1472: float_parms = 0;
! 1473:
! 1474: for (decl = DECL_ARGUMENTS (current_function_decl);
! 1475: decl; decl = TREE_CHAIN (decl))
! 1476: {
! 1477: rtx parameter = DECL_INCOMING_RTL (decl);
! 1478: enum machine_mode mode = GET_MODE (parameter);
! 1479:
! 1480: if (GET_CODE (parameter) == REG)
! 1481: {
! 1482: if (GET_MODE_CLASS (mode) == MODE_FLOAT)
! 1483: {
! 1484: int bits;
! 1485:
! 1486: float_parms++;
! 1487:
! 1488: if (mode == SFmode)
! 1489: bits = 0x2;
! 1490: else if (mode == DFmode)
! 1491: bits = 0x3;
! 1492: else
! 1493: abort ();
! 1494:
! 1495: /* If only one bit will fit, don't or in this entry. */
! 1496: if (next_parm_info_bit > 0)
! 1497: parm_info |= (bits << (next_parm_info_bit - 1));
! 1498: next_parm_info_bit -= 2;
! 1499: }
! 1500: else
! 1501: {
! 1502: fixed_parms += ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1))
! 1503: / UNITS_PER_WORD);
! 1504: next_parm_info_bit -= 1;
! 1505: }
! 1506: }
! 1507: }
! 1508: }
! 1509:
! 1510: /* Number of fixed point parameters. */
! 1511: /* This is actually the number of words of fixed point parameters; thus
! 1512: an 8 byte struct counts as 2; and thus the maximum value is 8. */
! 1513: fprintf (file, "%d,", fixed_parms);
! 1514:
! 1515: /* 2 bitfields: number of floating point parameters (7 bits), parameters
! 1516: all on stack. */
! 1517: /* This is actually the number of fp registers that hold parameters;
! 1518: and thus the maximum value is 13. */
! 1519: /* Set parameters on stack bit if parameters are not in their original
! 1520: registers, irregardless of whether they are on the stack? Xlc
! 1521: seems to set the bit when not optimizing. */
! 1522: fprintf (file, "%d\n", ((float_parms << 1) | (! optimize)));
! 1523:
! 1524: /* Optional fields follow. Some are variable length. */
! 1525:
! 1526: /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float,
! 1527: 11 double float. */
! 1528: /* There is an entry for each parameter in a register, in the order that
! 1529: they occur in the parameter list. Any intervening arguments on the
! 1530: stack are ignored. If the list overflows a long (max possible length
! 1531: 34 bits) then completely leave off all elements that don't fit. */
! 1532: /* Only emit this long if there was at least one parameter. */
! 1533: if (fixed_parms || float_parms)
! 1534: fprintf (file, "\t.long %d\n", parm_info);
! 1535:
! 1536: /* Offset from start of code to tb table. */
! 1537: fprintf (file, "\t.long LT..");
! 1538: RS6000_OUTPUT_BASENAME (file, fname);
! 1539: fprintf (file, "-.");
! 1540: RS6000_OUTPUT_BASENAME (file, fname);
! 1541: fprintf (file, "\n");
! 1542:
! 1543: /* Interrupt handler mask. */
! 1544: /* Omit this long, since we never set the iterrupt handler bit above. */
! 1545:
! 1546: /* Number of CTL (controlled storage) anchors. */
! 1547: /* Omit this long, since the has_ctl bit is never set above. */
! 1548:
! 1549: /* Displacement into stack of each CTL anchor. */
! 1550: /* Omit this list of longs, because there are no CTL anchors. */
! 1551:
! 1552: /* Length of function name. */
! 1553: fprintf (file, "\t.short %d\n", strlen (fname));
! 1554:
! 1555: /* Function name. */
! 1556: assemble_string (fname, strlen (fname));
! 1557:
! 1558: /* Register for alloca automatic storage; this is always reg 31.
! 1559: Only emit this if the alloca bit was set above. */
! 1560: if (frame_pointer_needed)
! 1561: fprintf (file, "\t.byte 31\n");
! 1562: }
1.1 root 1563: }
1564:
1565: /* Output a TOC entry. We derive the entry name from what is
1566: being written. */
1567:
1568: void
1569: output_toc (file, x, labelno)
1570: FILE *file;
1571: rtx x;
1572: int labelno;
1573: {
1574: char buf[256];
1575: char *name = buf;
1576: rtx base = x;
1577: int offset = 0;
1578:
1579: ASM_OUTPUT_INTERNAL_LABEL (file, "LC", labelno);
1580:
1581: /* Handle FP constants specially. */
1582: if (GET_CODE (x) == CONST_DOUBLE
1583: && GET_MODE (x) == DFmode
1584: && TARGET_FLOAT_FORMAT == HOST_FLOAT_FORMAT
1585: && BITS_PER_WORD == HOST_BITS_PER_INT
1586: && TARGET_FP_IN_TOC)
1587: {
1588: fprintf (file, "\t.tc FD_%x_%x[TC],%d,%d\n",
1589: CONST_DOUBLE_LOW (x), CONST_DOUBLE_HIGH (x),
1590: CONST_DOUBLE_LOW (x), CONST_DOUBLE_HIGH (x));
1591: return;
1592: }
1593: else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode
1594: && TARGET_FP_IN_TOC)
1595: {
1596: rtx val = operand_subword (x, 0, 0, SFmode);
1597:
1598: if (val == 0 || GET_CODE (val) != CONST_INT)
1599: abort ();
1600:
1601: fprintf (file, "\t.tc FS_%x[TC],%d\n", INTVAL (val), INTVAL (val));
1602: return;
1603: }
1604:
1605: if (GET_CODE (x) == CONST)
1606: {
1607: base = XEXP (XEXP (x, 0), 0);
1608: offset = INTVAL (XEXP (XEXP (x, 0), 1));
1609: }
1610:
1611: if (GET_CODE (base) == SYMBOL_REF)
1612: name = XSTR (base, 0);
1613: else if (GET_CODE (base) == LABEL_REF)
1614: ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (base, 0)));
1615: else if (GET_CODE (base) == CODE_LABEL)
1616: ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (base));
1617: else
1618: abort ();
1619:
1620: fprintf (file, "\t.tc ");
1621: RS6000_OUTPUT_BASENAME (file, name);
1622:
1623: if (offset < 0)
1.1.1.3 ! root 1624: fprintf (file, ".N%d", - offset);
1.1 root 1625: else if (offset)
1.1.1.3 ! root 1626: fprintf (file, ".P%d", offset);
1.1 root 1627:
1628: fprintf (file, "[TC],");
1629: output_addr_const (file, x);
1630: fprintf (file, "\n");
1631: }
1632:
1633: /* Output an assembler pseudo-op to write an ASCII string of N characters
1634: starting at P to FILE.
1635:
1636: On the RS/6000, we have to do this using the .byte operation and
1637: write out special characters outside the quoted string.
1638: Also, the assembler is broken; very long strings are truncated,
1639: so we must artificially break them up early. */
1640:
1641: void
1642: output_ascii (file, p, n)
1643: FILE *file;
1644: char *p;
1645: int n;
1646: {
1647: char c;
1648: int i, count_string;
1649: char *for_string = "\t.byte \"";
1650: char *for_decimal = "\t.byte ";
1651: char *to_close = NULL;
1652:
1653: count_string = 0;
1654: for (i = 0; i < n; i++)
1655: {
1656: c = *p++;
1657: if (c >= ' ' && c < 0177)
1658: {
1659: if (for_string)
1660: fputs (for_string, file);
1661: putc (c, file);
1662:
1663: /* Write two quotes to get one. */
1664: if (c == '"')
1665: {
1666: putc (c, file);
1667: ++count_string;
1668: }
1669:
1670: for_string = NULL;
1671: for_decimal = "\"\n\t.byte ";
1672: to_close = "\"\n";
1673: ++count_string;
1674:
1675: if (count_string >= 512)
1676: {
1677: fputs (to_close, file);
1678:
1679: for_string = "\t.byte \"";
1680: for_decimal = "\t.byte ";
1681: to_close = NULL;
1682: count_string = 0;
1683: }
1684: }
1685: else
1686: {
1687: if (for_decimal)
1688: fputs (for_decimal, file);
1689: fprintf (file, "%d", c);
1690:
1691: for_string = "\n\t.byte \"";
1692: for_decimal = ", ";
1693: to_close = "\n";
1694: count_string = 0;
1695: }
1696: }
1697:
1698: /* Now close the string if we have written one. Then end the line. */
1699: if (to_close)
1700: fprintf (file, to_close);
1701: }
1702:
1703: /* Generate a unique section name for FILENAME for a section type
1704: represented by SECTION_DESC. Output goes into BUF.
1705:
1706: SECTION_DESC can be any string, as long as it is different for each
1707: possible section type.
1708:
1709: We name the section in the same manner as xlc. The name begins with an
1710: underscore followed by the filename (after stripping any leading directory
1711: names) with the period replaced by the string SECTION_DESC. If FILENAME
1712: does not contain a period, SECTION_DESC is appended at the end of the
1713: name. */
1714:
1715: void
1716: rs6000_gen_section_name (buf, filename, section_desc)
1717: char **buf;
1718: char *filename;
1719: char *section_desc;
1720: {
1721: char *q, *after_last_slash;
1722: char *p;
1723: int len;
1724: int used_desc = 0;
1725:
1726: after_last_slash = filename;
1727: for (q = filename; *q; q++)
1728: if (*q == '/')
1729: after_last_slash = q + 1;
1730:
1731: len = strlen (filename) + strlen (section_desc) + 2;
1732: *buf = (char *) permalloc (len);
1733:
1734: p = *buf;
1735: *p++ = '_';
1736:
1737: for (q = after_last_slash; *q; q++)
1738: {
1739: if (*q == '.')
1740: {
1741: strcpy (p, section_desc);
1742: p += strlen (section_desc);
1743: used_desc = 1;
1744: }
1745:
1746: else if (isalnum (*q))
1747: *p++ = *q;
1748: }
1749:
1750: if (! used_desc)
1751: strcpy (p, section_desc);
1752: else
1753: *p = '\0';
1754: }
1.1.1.3 ! root 1755:
! 1756: /* Write function profiler code. */
! 1757:
! 1758: void
! 1759: output_function_profiler (file, labelno)
! 1760: FILE *file;
! 1761: int labelno;
! 1762: {
! 1763: /* The last used parameter register. */
! 1764: int last_parm_reg;
! 1765: int i, j;
! 1766:
! 1767: /* Set up a TOC entry for the profiler label. */
! 1768: toc_section ();
! 1769: fprintf (file, "LPC..%d:\n\t.tc\tLP..%d[TC],LP..%d\n",
! 1770: labelno, labelno, labelno);
! 1771: text_section ();
! 1772:
! 1773: /* Figure out last used parameter register. The proper thing to do is
! 1774: to walk incoming args of the function. A function might have live
! 1775: parameter registers even if it has no incoming args. */
! 1776:
! 1777: for (last_parm_reg = 10;
! 1778: last_parm_reg > 2 && ! regs_ever_live [last_parm_reg];
! 1779: last_parm_reg--)
! 1780: ;
! 1781:
! 1782: /* Save parameter registers in regs 23-30. Don't overwrite reg 31, since
! 1783: it might be set up as the frame pointer. */
! 1784:
! 1785: for (i = 3, j = 30; i <= last_parm_reg; i++, j--)
! 1786: fprintf (file, "\tai %d,%d,0\n", j, i);
! 1787:
! 1788: /* Load location address into r3, and call mcount. */
! 1789:
! 1790: fprintf (file, "\tl 3,LPC..%d(2)\n\tbl .mcount\n", labelno);
! 1791:
! 1792: /* Restore parameter registers. */
! 1793:
! 1794: for (i = 3, j = 30; i <= last_parm_reg; i++, j--)
! 1795: fprintf (file, "\tai %d,%d,0\n", i, j);
! 1796: }
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