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1.1 root 1: /* Subroutines used for code generation on IBM RS/6000.
2: Copyright (C) 1991 Free Software Foundation, Inc.
3: Contributed by Richard Kenner ([email protected])
4:
5: This file is part of GNU CC.
6:
7: GNU CC is free software; you can redistribute it and/or modify
8: it under the terms of the GNU General Public License as published by
9: the Free Software Foundation; either version 2, or (at your option)
10: any later version.
11:
12: GNU CC is distributed in the hope that it will be useful,
13: but WITHOUT ANY WARRANTY; without even the implied warranty of
14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15: GNU General Public License for more details.
16:
17: You should have received a copy of the GNU General Public License
18: along with GNU CC; see the file COPYING. If not, write to
19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20:
21: #include <stdio.h>
22: #include "config.h"
23: #include "rtl.h"
24: #include "regs.h"
25: #include "hard-reg-set.h"
26: #include "real.h"
27: #include "insn-config.h"
28: #include "conditions.h"
29: #include "insn-flags.h"
30: #include "output.h"
31: #include "insn-attr.h"
32: #include "flags.h"
33: #include "recog.h"
34: #include "expr.h"
35: #include "obstack.h"
1.1.1.3 root 36: #include "tree.h"
37:
38: extern char *language_string;
1.1 root 39:
40: #define min(A,B) ((A) < (B) ? (A) : (B))
41: #define max(A,B) ((A) > (B) ? (A) : (B))
42:
43: /* Set to non-zero by "fix" operation to indicate that itrunc and
44: uitrunc must be defined. */
45:
46: int rs6000_trunc_used;
47:
48: /* Set to non-zero once they have been defined. */
49:
50: static int trunc_defined;
51:
52: /* Save information from a "cmpxx" operation until the branch or scc is
53: emitted. */
54:
55: rtx rs6000_compare_op0, rs6000_compare_op1;
56: int rs6000_compare_fp_p;
57:
58: /* Return non-zero if this function is known to have a null epilogue. */
59:
60: int
61: direct_return ()
62: {
63: return (reload_completed
64: && first_reg_to_save () == 32
65: && first_fp_reg_to_save () == 64
66: && ! regs_ever_live[65]
67: && ! rs6000_pushes_stack ());
68: }
69:
70: /* Returns 1 always. */
71:
72: int
73: any_operand (op, mode)
74: register rtx op;
75: enum machine_mode mode;
76: {
77: return 1;
78: }
79:
80: /* Return 1 if OP is a constant that can fit in a D field. */
81:
82: int
83: short_cint_operand (op, mode)
84: register rtx op;
85: enum machine_mode mode;
86: {
87: return (GET_CODE (op) == CONST_INT
88: && (unsigned) (INTVAL (op) + 0x8000) < 0x10000);
89: }
90:
91: /* Similar for a unsigned D field. */
92:
93: int
94: u_short_cint_operand (op, mode)
95: register rtx op;
96: enum machine_mode mode;
97: {
98: return (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff0000) == 0);
99: }
100:
1.1.1.3 root 101: /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
102:
103: int
104: non_short_cint_operand (op, mode)
105: register rtx op;
106: enum machine_mode mode;
107: {
108: return (GET_CODE (op) == CONST_INT
109: && (unsigned) (INTVAL (op) + 0x8000) >= 0x10000);
110: }
111:
1.1 root 112: /* Returns 1 if OP is a register that is not special (i.e., not MQ,
113: ctr, or lr). */
114:
115: int
1.1.1.3 root 116: gpc_reg_operand (op, mode)
1.1 root 117: register rtx op;
118: enum machine_mode mode;
119: {
120: return (register_operand (op, mode)
121: && (GET_CODE (op) != REG || REGNO (op) >= 67 || REGNO (op) < 64));
122: }
123:
124: /* Returns 1 if OP is either a pseudo-register or a register denoting a
125: CR field. */
126:
127: int
128: cc_reg_operand (op, mode)
129: register rtx op;
130: enum machine_mode mode;
131: {
132: return (register_operand (op, mode)
133: && (GET_CODE (op) != REG
134: || REGNO (op) >= FIRST_PSEUDO_REGISTER
135: || CR_REGNO_P (REGNO (op))));
136: }
137:
138: /* Returns 1 if OP is either a constant integer valid for a D-field or a
139: non-special register. If a register, it must be in the proper mode unless
140: MODE is VOIDmode. */
141:
142: int
143: reg_or_short_operand (op, mode)
144: register rtx op;
145: enum machine_mode mode;
146: {
147: if (GET_CODE (op) == CONST_INT)
148: return short_cint_operand (op, mode);
149:
1.1.1.3 root 150: return gpc_reg_operand (op, mode);
1.1 root 151: }
152:
153: /* Similar, except check if the negation of the constant would be valid for
154: a D-field. */
155:
156: int
157: reg_or_neg_short_operand (op, mode)
158: register rtx op;
159: enum machine_mode mode;
160: {
161: if (GET_CODE (op) == CONST_INT)
162: return CONST_OK_FOR_LETTER_P (INTVAL (op), 'P');
163:
1.1.1.3 root 164: return gpc_reg_operand (op, mode);
1.1 root 165: }
166:
167: /* Return 1 if the operand is either a register or an integer whose high-order
168: 16 bits are zero. */
169:
170: int
171: reg_or_u_short_operand (op, mode)
172: register rtx op;
173: enum machine_mode mode;
174: {
175: if (GET_CODE (op) == CONST_INT
176: && (INTVAL (op) & 0xffff0000) == 0)
177: return 1;
178:
1.1.1.3 root 179: return gpc_reg_operand (op, mode);
1.1 root 180: }
181:
182: /* Return 1 is the operand is either a non-special register or ANY
183: constant integer. */
184:
185: int
186: reg_or_cint_operand (op, mode)
187: register rtx op;
188: enum machine_mode mode;
189: {
1.1.1.3 root 190: return GET_CODE (op) == CONST_INT || gpc_reg_operand (op, mode);
1.1 root 191: }
192:
193: /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a
194: register with one instruction per word. For SFmode, this means that
195: the low 16-bits are zero. For DFmode, it means the low 16-bits of
196: the first word are zero and the high 16 bits of the second word
197: are zero (usually all bits in the low-order word will be zero).
198:
199: We only do this if we can safely read CONST_DOUBLE_{LOW,HIGH}. */
200:
201: int
202: easy_fp_constant (op, mode)
203: register rtx op;
204: register enum machine_mode mode;
205: {
206: rtx low, high;
207:
208: if (GET_CODE (op) != CONST_DOUBLE
209: || GET_MODE (op) != mode
210: || GET_MODE_CLASS (mode) != MODE_FLOAT)
211: return 0;
212:
213: high = operand_subword (op, 0, 0, mode);
214: low = operand_subword (op, 1, 0, mode);
215:
216: if (high == 0 || GET_CODE (high) != CONST_INT || (INTVAL (high) & 0xffff))
217: return 0;
218:
219: return (mode == SFmode
220: || (low != 0 && GET_CODE (low) == CONST_INT
221: && (INTVAL (low) & 0xffff0000) == 0));
222: }
223:
224: /* Return 1 if the operand is either a floating-point register, a pseudo
225: register, or memory. */
226:
227: int
228: fp_reg_or_mem_operand (op, mode)
229: register rtx op;
230: enum machine_mode mode;
231: {
232: return (memory_operand (op, mode)
233: || (register_operand (op, mode)
234: && (GET_CODE (op) != REG
235: || REGNO (op) >= FIRST_PSEUDO_REGISTER
236: || FP_REGNO_P (REGNO (op)))));
237: }
238:
239: /* Return 1 if the operand is either an easy FP constant (see above) or
240: memory. */
241:
242: int
243: mem_or_easy_const_operand (op, mode)
244: register rtx op;
245: enum machine_mode mode;
246: {
247: return memory_operand (op, mode) || easy_fp_constant (op, mode);
248: }
249:
250: /* Return 1 if the operand is either a non-special register or an item
251: that can be used as the operand of an SI add insn. */
252:
253: int
254: add_operand (op, mode)
255: register rtx op;
256: enum machine_mode mode;
257: {
258: return (reg_or_short_operand (op, mode)
259: || (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff) == 0));
260: }
261:
1.1.1.3 root 262: /* Return 1 if OP is a constant but not a valid add_operand. */
263:
264: int
265: non_add_cint_operand (op, mode)
266: register rtx op;
267: enum machine_mode mode;
268: {
269: return (GET_CODE (op) == CONST_INT
270: && (unsigned) (INTVAL (op) + 0x8000) >= 0x10000
271: && (INTVAL (op) & 0xffff) != 0);
272: }
273:
1.1 root 274: /* Return 1 if the operand is a non-special register or a constant that
275: can be used as the operand of an OR or XOR insn on the RS/6000. */
276:
277: int
278: logical_operand (op, mode)
279: register rtx op;
280: enum machine_mode mode;
281: {
1.1.1.3 root 282: return (gpc_reg_operand (op, mode)
1.1 root 283: || (GET_CODE (op) == CONST_INT
284: && ((INTVAL (op) & 0xffff0000) == 0
285: || (INTVAL (op) & 0xffff) == 0)));
286: }
287:
1.1.1.3 root 288: /* Return 1 if C is a constant that is not a logical operand (as
289: above). */
290:
291: int
292: non_logical_cint_operand (op, mode)
293: register rtx op;
294: enum machine_mode mode;
295: {
296: return (GET_CODE (op) == CONST_INT
297: && (INTVAL (op) & 0xffff0000) != 0
298: && (INTVAL (op) & 0xffff) != 0);
299: }
300:
1.1 root 301: /* Return 1 if C is a constant that can be encoded in a mask on the
302: RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
303: Reject all ones and all zeros, since these should have been optimized
304: away and confuse the making of MB and ME. */
305:
306: int
307: mask_constant (c)
308: register int c;
309: {
310: int i;
311: int last_bit_value;
312: int transitions = 0;
313:
314: if (c == 0 || c == ~0)
315: return 0;
316:
317: last_bit_value = c & 1;
318:
319: for (i = 1; i < 32; i++)
320: if (((c >>= 1) & 1) != last_bit_value)
321: last_bit_value ^= 1, transitions++;
322:
323: return transitions <= 2;
324: }
325:
326: /* Return 1 if the operand is a constant that is a mask on the RS/6000. */
327:
328: int
329: mask_operand (op, mode)
330: register rtx op;
331: enum machine_mode mode;
332: {
333: return GET_CODE (op) == CONST_INT && mask_constant (INTVAL (op));
334: }
335:
336: /* Return 1 if the operand is either a non-special register or a
337: constant that can be used as the operand of an RS/6000 logical AND insn. */
338:
339: int
340: and_operand (op, mode)
341: register rtx op;
342: enum machine_mode mode;
343: {
344: return (reg_or_short_operand (op, mode)
345: || logical_operand (op, mode)
346: || mask_operand (op, mode));
347: }
348:
1.1.1.3 root 349: /* Return 1 if the operand is a constant but not a valid operand for an AND
350: insn. */
351:
352: int
353: non_and_cint_operand (op, mode)
354: register rtx op;
355: enum machine_mode mode;
356: {
357: return GET_CODE (op) == CONST_INT && ! and_operand (op, mode);
358: }
359:
1.1 root 360: /* Return 1 if the operand is a general register or memory operand. */
361:
362: int
363: reg_or_mem_operand (op, mode)
364: register rtx op;
365: register enum machine_mode mode;
366: {
1.1.1.3 root 367: return gpc_reg_operand (op, mode) || memory_operand (op, mode);
1.1 root 368: }
369:
370: /* Return 1 if the operand, used inside a MEM, is a valid first argument
371: to CALL. This is a SYMBOL_REF or a pseudo-register, which will be
372: forced to lr. */
373:
374: int
375: call_operand (op, mode)
376: register rtx op;
377: enum machine_mode mode;
378: {
379: if (mode != VOIDmode && GET_MODE (op) != mode)
380: return 0;
381:
382: return (GET_CODE (op) == SYMBOL_REF
383: || (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER));
384: }
385:
386: /* Return 1 if this operand is a valid input for a move insn. */
387:
388: int
389: input_operand (op, mode)
390: register rtx op;
391: enum machine_mode mode;
392: {
393: if (memory_operand (op, mode))
394: return 1;
395:
396: /* For floating-point or multi-word mode, only register or memory
397: is valid. */
398: if (GET_MODE_CLASS (mode) == MODE_FLOAT
399: || GET_MODE_SIZE (mode) > UNITS_PER_WORD)
1.1.1.3 root 400: return gpc_reg_operand (op, mode);
1.1 root 401:
1.1.1.3 root 402: /* The only cases left are integral modes one word or smaller (we
403: do not get called for MODE_CC values). These can be in any
404: register. */
405: if (register_operand (op, mode))
406: return;
407:
408: /* For HImode and QImode, any constant is valid. */
409: if ((mode == HImode || mode == QImode)
410: && GET_CODE (op) == CONST_INT)
1.1 root 411: return 1;
412:
413: /* Otherwise, we will be doing this SET with an add, so anything valid
414: for an add will be valid. */
415: return add_operand (op, mode);
416: }
417:
418: /* Return 1 if OP is a load multiple operation. It is known to be a
419: PARALLEL and the first section will be tested. */
420:
421: int
422: load_multiple_operation (op, mode)
423: rtx op;
424: enum machine_mode mode;
425: {
426: int count = XVECLEN (op, 0);
427: int dest_regno;
428: rtx src_addr;
429: int i;
430:
431: /* Perform a quick check so we don't blow up below. */
432: if (count <= 1
433: || GET_CODE (XVECEXP (op, 0, 0)) != SET
434: || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
435: || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
436: return 0;
437:
438: dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
439: src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
440:
441: for (i = 1; i < count; i++)
442: {
443: rtx elt = XVECEXP (op, 0, i);
444:
445: if (GET_CODE (elt) != SET
446: || GET_CODE (SET_DEST (elt)) != REG
447: || GET_MODE (SET_DEST (elt)) != SImode
448: || REGNO (SET_DEST (elt)) != dest_regno + i
449: || GET_CODE (SET_SRC (elt)) != MEM
450: || GET_MODE (SET_SRC (elt)) != SImode
451: || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
452: || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
453: || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
454: || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != i * 4)
455: return 0;
456: }
457:
458: return 1;
459: }
460:
461: /* Similar, but tests for store multiple. Here, the second vector element
462: is a CLOBBER. It will be tested later. */
463:
464: int
465: store_multiple_operation (op, mode)
466: rtx op;
467: enum machine_mode mode;
468: {
469: int count = XVECLEN (op, 0) - 1;
470: int src_regno;
471: rtx dest_addr;
472: int i;
473:
474: /* Perform a quick check so we don't blow up below. */
475: if (count <= 1
476: || GET_CODE (XVECEXP (op, 0, 0)) != SET
477: || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
478: || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
479: return 0;
480:
481: src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
482: dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
483:
484: for (i = 1; i < count; i++)
485: {
486: rtx elt = XVECEXP (op, 0, i + 1);
487:
488: if (GET_CODE (elt) != SET
489: || GET_CODE (SET_SRC (elt)) != REG
490: || GET_MODE (SET_SRC (elt)) != SImode
491: || REGNO (SET_SRC (elt)) != src_regno + i
492: || GET_CODE (SET_DEST (elt)) != MEM
493: || GET_MODE (SET_DEST (elt)) != SImode
494: || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
495: || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
496: || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
497: || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != i * 4)
498: return 0;
499: }
500:
501: return 1;
502: }
503:
504: /* Return 1 if OP is a comparison operation that is valid for a branch insn.
505: We only check the opcode against the mode of the CC value here. */
506:
507: int
508: branch_comparison_operator (op, mode)
509: register rtx op;
510: enum machine_mode mode;
511: {
512: enum rtx_code code = GET_CODE (op);
513: enum machine_mode cc_mode;
514:
515: if (GET_RTX_CLASS (code) != '<')
516: return 0;
517:
518: cc_mode = GET_MODE (XEXP (op, 0));
519: if (GET_MODE_CLASS (cc_mode) != MODE_CC)
520: return 0;
521:
522: if ((code == GT || code == LT || code == GE || code == LE)
523: && cc_mode == CCUNSmode)
524: return 0;
525:
526: if ((code == GTU || code == LTU || code == GEU || code == LEU)
527: && (cc_mode != CCUNSmode))
528: return 0;
529:
530: return 1;
531: }
532:
533: /* Return 1 if OP is a comparison operation that is valid for an scc insn.
534: We check the opcode against the mode of the CC value and disallow EQ or
535: NE comparisons for integers. */
536:
537: int
538: scc_comparison_operator (op, mode)
539: register rtx op;
540: enum machine_mode mode;
541: {
542: enum rtx_code code = GET_CODE (op);
543: enum machine_mode cc_mode;
544:
545: if (GET_MODE (op) != mode && mode != VOIDmode)
546: return 0;
547:
548: if (GET_RTX_CLASS (code) != '<')
549: return 0;
550:
551: cc_mode = GET_MODE (XEXP (op, 0));
552: if (GET_MODE_CLASS (cc_mode) != MODE_CC)
553: return 0;
554:
555: if (code == NE && cc_mode != CCFPmode)
556: return 0;
557:
558: if ((code == GT || code == LT || code == GE || code == LE)
559: && cc_mode == CCUNSmode)
560: return 0;
561:
562: if ((code == GTU || code == LTU || code == GEU || code == LEU)
563: && (cc_mode != CCUNSmode))
564: return 0;
565:
1.1.1.3 root 566: if (cc_mode == CCEQmode && code != EQ && code != NE)
567: return 0;
568:
1.1 root 569: return 1;
570: }
571:
572: /* Return 1 if ANDOP is a mask that has no bits on that are not in the
573: mask required to convert the result of a rotate insn into a shift
574: left insn of SHIFTOP bits. Both are known to be CONST_INT. */
575:
576: int
577: includes_lshift_p (shiftop, andop)
578: register rtx shiftop;
579: register rtx andop;
580: {
581: int shift_mask = (~0 << INTVAL (shiftop));
582:
583: return (INTVAL (andop) & ~shift_mask) == 0;
584: }
585:
586: /* Similar, but for right shift. */
587:
588: int
589: includes_rshift_p (shiftop, andop)
590: register rtx shiftop;
591: register rtx andop;
592: {
593: unsigned shift_mask = ~0;
594:
595: shift_mask >>= INTVAL (shiftop);
596:
597: return (INTVAL (andop) & ~ shift_mask) == 0;
598: }
599:
600: /* Return the register class of a scratch register needed to copy IN into
601: or out of a register in CLASS in MODE. If it can be done directly,
602: NO_REGS is returned. */
603:
604: enum reg_class
605: secondary_reload_class (class, mode, in)
606: enum reg_class class;
607: enum machine_mode mode;
608: rtx in;
609: {
610: int regno = true_regnum (in);
611:
612: if (regno >= FIRST_PSEUDO_REGISTER)
613: regno = -1;
614:
615: /* We can place anything into GENERAL_REGS and can put GENERAL_REGS
616: into anything. */
617: if (class == GENERAL_REGS || class == BASE_REGS
618: || (regno >= 0 && INT_REGNO_P (regno)))
619: return NO_REGS;
620:
621: /* Constants, memory, and FP registers can go into FP registers. */
622: if ((regno == -1 || FP_REGNO_P (regno))
623: && (class == FLOAT_REGS || class == NON_SPECIAL_REGS))
624: return NO_REGS;
625:
626: /* We can copy among the CR registers. */
627: if ((class == CR_REGS || class == CR0_REGS)
628: && regno >= 0 && CR_REGNO_P (regno))
629: return NO_REGS;
630:
631: /* Otherwise, we need GENERAL_REGS. */
632: return GENERAL_REGS;
633: }
634:
635: /* Given a comparison operation, return the bit number in CCR to test. We
636: know this is a valid comparison.
637:
638: SCC_P is 1 if this is for an scc. That means that %D will have been
639: used instead of %C, so the bits will be in different places.
640:
1.1.1.2 root 641: Return -1 if OP isn't a valid comparison for some reason. */
1.1 root 642:
643: int
644: ccr_bit (op, scc_p)
645: register rtx op;
646: int scc_p;
647: {
648: enum rtx_code code = GET_CODE (op);
649: enum machine_mode cc_mode;
650: int cc_regnum;
651: int base_bit;
652:
653: if (GET_RTX_CLASS (code) != '<')
654: return -1;
655:
656: cc_mode = GET_MODE (XEXP (op, 0));
657: cc_regnum = REGNO (XEXP (op, 0));
658: base_bit = 4 * (cc_regnum - 68);
659:
1.1.1.3 root 660: /* In CCEQmode cases we have made sure that the result is always in the
661: third bit of the CR field. */
662:
663: if (cc_mode == CCEQmode)
664: return base_bit + 3;
665:
1.1 root 666: switch (code)
667: {
668: case NE:
669: return scc_p ? base_bit + 3 : base_bit + 2;
670: case EQ:
671: return base_bit + 2;
672: case GT: case GTU:
673: return base_bit + 1;
674: case LT: case LTU:
675: return base_bit;
676:
677: case GE: case GEU:
678: /* If floating-point, we will have done a cror to put the bit in the
679: unordered position. So test that bit. For integer, this is ! LT
680: unless this is an scc insn. */
681: return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit;
682:
683: case LE: case LEU:
684: return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit + 1;
685:
686: default:
687: abort ();
688: }
689: }
690:
691: /* Print an operand. Recognize special options, documented below. */
692:
693: void
694: print_operand (file, x, code)
695: FILE *file;
696: rtx x;
697: char code;
698: {
699: int i;
700: int val;
701:
702: /* These macros test for integers and extract the low-order bits. */
703: #define INT_P(X) \
704: ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
705: && GET_MODE (X) == VOIDmode)
706:
707: #define INT_LOWPART(X) \
708: (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
709:
710: switch (code)
711: {
712: case 'h':
1.1.1.4 ! root 713: /* If constant, output low-order five bits. Otherwise,
! 714: write normally. */
1.1 root 715: if (INT_P (x))
716: fprintf (file, "%d", INT_LOWPART (x) & 31);
717: else
718: print_operand (file, x, 0);
719: return;
720:
721: case 'H':
1.1.1.4 ! root 722: /* X must be a constant. Output the low order 5 bits plus 24. */
1.1 root 723: if (! INT_P (x))
724: output_operand_lossage ("invalid %%H value");
725:
726: fprintf (file, "%d", (INT_LOWPART (x) + 24) & 31);
727: return;
728:
729: case 'b':
730: /* Low-order 16 bits of constant, unsigned. */
731: if (! INT_P (x))
732: output_operand_lossage ("invalid %%b value");
733:
734: fprintf (file, "%d", INT_LOWPART (x) & 0xffff);
735: return;
736:
737: case 'w':
738: /* If constant, low-order 16 bits of constant, signed. Otherwise, write
739: normally. */
740: if (INT_P (x))
1.1.1.4 ! root 741: fprintf (file, "%d",
! 742: (INT_LOWPART (x) & 0xffff) - 2 * (INT_LOWPART (x) & 0x8000));
1.1 root 743: else
744: print_operand (file, x, 0);
745: return;
746:
747: case 'W':
748: /* If constant, low-order 16 bits of constant, unsigned.
749: Otherwise, write normally. */
750: if (INT_P (x))
751: fprintf (file, "%d", INT_LOWPART (x) & 0xffff);
752: else
753: print_operand (file, x, 0);
754: return;
755:
756: case 'u':
757: /* High-order 16 bits of constant. */
758: if (! INT_P (x))
759: output_operand_lossage ("invalid %%u value");
760:
761: fprintf (file, "%d", (INT_LOWPART (x) >> 16) & 0xffff);
762: return;
763:
764: case 's':
765: /* Low 5 bits of 32 - value */
766: if (! INT_P (x))
767: output_operand_lossage ("invalid %%s value");
768:
769: fprintf (file, "%d", (32 - INT_LOWPART (x)) & 31);
770: return;
771:
772: case 'S':
773: /* Low 5 bits of 31 - value */
774: if (! INT_P (x))
775: output_operand_lossage ("invalid %%S value");
776:
777: fprintf (file, "%d", (31 - INT_LOWPART (x)) & 31);
778: return;
779:
780: case 'p':
781: /* X is a CONST_INT that is a power of two. Output the logarithm. */
782: if (! INT_P (x)
783: || (i = exact_log2 (INT_LOWPART (x))) < 0)
784: output_operand_lossage ("invalid %%p value");
785:
786: fprintf (file, "%d", i);
787: return;
788:
789: case 'm':
790: /* MB value for a mask operand. */
791: if (! mask_operand (x, VOIDmode))
792: output_operand_lossage ("invalid %%m value");
793:
794: val = INT_LOWPART (x);
795:
796: /* If the high bit is set and the low bit is not, the value is zero.
797: If the high bit is zero, the value is the first 1 bit we find from
798: the left. */
799: if (val < 0 && (val & 1) == 0)
800: {
801: fprintf (file, "0");
802: return;
803: }
804: else if (val >= 0)
805: {
806: for (i = 1; i < 32; i++)
807: if ((val <<= 1) < 0)
808: break;
809: fprintf (file, "%d", i);
810: return;
811: }
812:
813: /* Otherwise, look for the first 0 bit from the right. The result is its
814: number plus 1. We know the low-order bit is one. */
815: for (i = 0; i < 32; i++)
816: if (((val >>= 1) & 1) == 0)
817: break;
818:
819: /* If we ended in ...01, I would be 0. The correct value is 31, so
820: we want 31 - i. */
821: fprintf (file, "%d", 31 - i);
822: return;
823:
824: case 'M':
825: /* ME value for a mask operand. */
826: if (! mask_operand (x, VOIDmode))
827: output_operand_lossage ("invalid %%m value");
828:
829: val = INT_LOWPART (x);
830:
831: /* If the low bit is set and the high bit is not, the value is 31.
832: If the low bit is zero, the value is the first 1 bit we find from
833: the right. */
834: if ((val & 1) && val >= 0)
835: {
836: fprintf (file, "31");
837: return;
838: }
839: else if ((val & 1) == 0)
840: {
841: for (i = 0; i < 32; i++)
842: if ((val >>= 1) & 1)
843: break;
844:
845: /* If we had ....10, I would be 0. The result should be
846: 30, so we need 30 - i. */
847: fprintf (file, "%d", 30 - i);
848: return;
849: }
850:
851: /* Otherwise, look for the first 0 bit from the left. The result is its
852: number minus 1. We know the high-order bit is one. */
853: for (i = 0; i < 32; i++)
854: if ((val <<= 1) >= 0)
855: break;
856:
857: fprintf (file, "%d", i);
858: return;
859:
860: case 'f':
861: /* X is a CR register. Print the shift count needed to move it
862: to the high-order four bits. */
863: if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
864: output_operand_lossage ("invalid %%f value");
865: else
866: fprintf (file, "%d", 4 * (REGNO (x) - 68));
867: return;
868:
869: case 'F':
870: /* Similar, but print the count for the rotate in the opposite
871: direction. */
872: if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
873: output_operand_lossage ("invalid %%F value");
874: else
875: fprintf (file, "%d", 32 - 4 * (REGNO (x) - 68));
876: return;
877:
1.1.1.3 root 878: case 'E':
879: /* X is a CR register. Print the number of the third bit of the CR */
880: if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
881: output_operand_lossage ("invalid %%E value");
882:
883: fprintf(file, "%d", 4 * (REGNO (x) - 68) + 3);
884: break;
885:
1.1 root 886: case 'R':
887: /* X is a CR register. Print the mask for `mtcrf'. */
888: if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
889: output_operand_lossage ("invalid %%R value");
890: else
891: fprintf (file, "%d", 128 >> (REGNO (x) - 68));
892: return;
893:
894: case 'X':
895: if (GET_CODE (x) == MEM
896: && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x, 0)))
897: fprintf (file, "x");
898: return;
899:
900: case 'U':
1.1.1.2 root 901: /* Print `u' is this has an auto-increment or auto-decrement. */
1.1 root 902: if (GET_CODE (x) == MEM
903: && (GET_CODE (XEXP (x, 0)) == PRE_INC
904: || GET_CODE (XEXP (x, 0)) == PRE_DEC))
905: fprintf (file, "u");
906: return;
907:
908: case 'I':
909: /* Print `i' is this is a constant, else nothing. */
910: if (INT_P (x))
911: fprintf (file, "i");
912: return;
913:
914: case 'N':
915: /* Write the number of elements in the vector times 4. */
916: if (GET_CODE (x) != PARALLEL)
917: output_operand_lossage ("invalid %%N value");
918:
919: fprintf (file, "%d", XVECLEN (x, 0) * 4);
920: return;
921:
922: case 'O':
923: /* Similar, but subtract 1 first. */
924: if (GET_CODE (x) != PARALLEL)
925: output_operand_lossage ("invalid %%N value");
926:
927: fprintf (file, "%d", (XVECLEN (x, 0) - 1) * 4);
928: return;
929:
930: case 'P':
931: /* The operand must be an indirect memory reference. The result
932: is the register number. */
933: if (GET_CODE (x) != MEM || GET_CODE (XEXP (x, 0)) != REG
934: || REGNO (XEXP (x, 0)) >= 32)
935: output_operand_lossage ("invalid %%P value");
936:
937: fprintf (file, "%d", REGNO (XEXP (x, 0)));
938: return;
939:
940: case 'L':
941: /* Write second word of DImode or DFmode reference. Works on register
942: or non-indexed memory only. */
943: if (GET_CODE (x) == REG)
944: fprintf (file, "%d", REGNO (x) + 1);
945: else if (GET_CODE (x) == MEM)
946: {
947: /* Handle possible auto-increment. Since it is pre-increment and
948: we have already done it, we can just use an offset of four. */
949: if (GET_CODE (XEXP (x, 0)) == PRE_INC
950: || GET_CODE (XEXP (x, 0)) == PRE_DEC)
951: output_address (plus_constant (XEXP (XEXP (x, 0), 0), 4));
952: else
953: output_address (plus_constant (XEXP (x, 0), 4));
954: }
955: return;
956:
957: case 'Y':
958: /* Similar, for third word of TImode */
959: if (GET_CODE (x) == REG)
960: fprintf (file, "%d", REGNO (x) + 2);
961: else if (GET_CODE (x) == MEM)
962: {
963: if (GET_CODE (XEXP (x, 0)) == PRE_INC
964: || GET_CODE (XEXP (x, 0)) == PRE_DEC)
965: output_address (plus_constant (XEXP (XEXP (x, 0), 0), 8));
966: else
967: output_address (plus_constant (XEXP (x, 0), 8));
968: }
969: return;
970:
971: case 'Z':
972: /* Similar, for last word of TImode. */
973: if (GET_CODE (x) == REG)
974: fprintf (file, "%d", REGNO (x) + 3);
975: else if (GET_CODE (x) == MEM)
976: {
977: if (GET_CODE (XEXP (x, 0)) == PRE_INC
978: || GET_CODE (XEXP (x, 0)) == PRE_DEC)
979: output_address (plus_constant (XEXP (XEXP (x, 0), 0), 12));
980: else
981: output_address (plus_constant (XEXP (x, 0), 12));
982: }
983: return;
984:
985: case 't':
986: /* Write 12 if this jump operation will branch if true, 4 otherwise.
987: All floating-point operations except NE branch true and integer
988: EQ, LT, GT, LTU and GTU also branch true. */
989: if (GET_RTX_CLASS (GET_CODE (x)) != '<')
990: output_operand_lossage ("invalid %%t value");
991:
992: else if ((GET_MODE (XEXP (x, 0)) == CCFPmode
993: && GET_CODE (x) != NE)
994: || GET_CODE (x) == EQ
995: || GET_CODE (x) == LT || GET_CODE (x) == GT
996: || GET_CODE (x) == LTU || GET_CODE (x) == GTU)
997: fprintf (file, "12");
998: else
999: fprintf (file, "4");
1000: return;
1001:
1002: case 'T':
1003: /* Opposite of 't': write 4 if this jump operation will branch if true,
1004: 12 otherwise. */
1005: if (GET_RTX_CLASS (GET_CODE (x)) != '<')
1006: output_operand_lossage ("invalid %%t value");
1007:
1008: else if ((GET_MODE (XEXP (x, 0)) == CCFPmode
1009: && GET_CODE (x) != NE)
1010: || GET_CODE (x) == EQ
1011: || GET_CODE (x) == LT || GET_CODE (x) == GT
1012: || GET_CODE (x) == LTU || GET_CODE (x) == GTU)
1013: fprintf (file, "4");
1014: else
1015: fprintf (file, "12");
1016: return;
1017:
1018: case 'j':
1019: /* Write the bit number in CCR for jump. */
1020: i = ccr_bit (x, 0);
1021: if (i == -1)
1022: output_operand_lossage ("invalid %%j code");
1023: else
1024: fprintf (file, "%d", i);
1025: return;
1026:
1027: case 'J':
1028: /* Similar, but add one for shift count in rlinm for scc and pass
1029: scc flag to `ccr_bit'. */
1030: i = ccr_bit (x, 1);
1031: if (i == -1)
1032: output_operand_lossage ("invalid %%J code");
1033: else
1034: fprintf (file, "%d", i + 1);
1035: return;
1036:
1037: case 'C':
1038: /* This is an optional cror needed for LE or GE floating-point
1039: comparisons. Otherwise write nothing. */
1040: if ((GET_CODE (x) == LE || GET_CODE (x) == GE)
1041: && GET_MODE (XEXP (x, 0)) == CCFPmode)
1042: {
1043: int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
1044:
1045: fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3,
1046: base_bit + 2, base_bit + (GET_CODE (x) == GE));
1047: }
1048: return;
1049:
1050: case 'D':
1051: /* Similar, except that this is for an scc, so we must be able to
1052: encode the test in a single bit that is one. We do the above
1053: for any LE, GE, GEU, or LEU and invert the bit for NE. */
1054: if (GET_CODE (x) == LE || GET_CODE (x) == GE
1055: || GET_CODE (x) == LEU || GET_CODE (x) == GEU)
1056: {
1057: int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
1058:
1059: fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3,
1060: base_bit + 2,
1061: base_bit + (GET_CODE (x) == GE || GET_CODE (x) == GEU));
1062: }
1063:
1064: else if (GET_CODE (x) == NE)
1065: {
1066: int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
1067:
1068: fprintf (file, "crnor %d,%d,%d\n\t", base_bit + 3,
1069: base_bit + 2, base_bit + 2);
1070: }
1071: return;
1072:
1073: case 'z':
1.1.1.2 root 1074: /* X is a SYMBOL_REF. Write out the name preceded by a
1075: period and without any trailing data in brackets. Used for function
1.1 root 1076: names. */
1077: if (GET_CODE (x) != SYMBOL_REF)
1078: abort ();
1079:
1080: fprintf (file, ".");
1081: RS6000_OUTPUT_BASENAME (file, XSTR (x, 0));
1082: return;
1083:
1.1.1.2 root 1084: case 'A':
1085: /* If X is a constant integer whose low-order 5 bits are zero,
1086: write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
1087: in the RS/6000 assembler where "sri" with a zero shift count
1088: write a trash instruction. */
1.1.1.3 root 1089: if (GET_CODE (x) == CONST_INT && (INTVAL (x) & 31) == 0)
1.1.1.2 root 1090: fprintf (file, "l");
1091: else
1092: fprintf (file, "r");
1093: return;
1094:
1.1 root 1095: case 0:
1096: if (GET_CODE (x) == REG)
1097: fprintf (file, "%s", reg_names[REGNO (x)]);
1098: else if (GET_CODE (x) == MEM)
1099: {
1100: /* We need to handle PRE_INC and PRE_DEC here, since we need to
1101: know the width from the mode. */
1102: if (GET_CODE (XEXP (x, 0)) == PRE_INC)
1103: fprintf (file, "%d(%d)", GET_MODE_SIZE (GET_MODE (x)),
1104: REGNO (XEXP (XEXP (x, 0), 0)));
1105: else if (GET_CODE (XEXP (x, 0)) == PRE_DEC)
1106: fprintf (file, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x)),
1107: REGNO (XEXP (XEXP (x, 0), 0)));
1108: else
1109: output_address (XEXP (x, 0));
1110: }
1111: else
1112: output_addr_const (file, x);
1113: break;
1114:
1115: default:
1116: output_operand_lossage ("invalid %%xn code");
1117: }
1118: }
1119:
1120: /* Print the address of an operand. */
1121:
1122: void
1123: print_operand_address (file, x)
1124: FILE *file;
1125: register rtx x;
1126: {
1127: if (GET_CODE (x) == REG)
1128: fprintf (file, "0(%d)", REGNO (x));
1129: else if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == CONST)
1130: {
1131: output_addr_const (file, x);
1132: fprintf (file, "(2)");
1133: }
1134: else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == REG)
1135: {
1136: if (REGNO (XEXP (x, 0)) == 0)
1137: fprintf (file, "%d,%d", REGNO (XEXP (x, 1)), REGNO (XEXP (x, 0)));
1138: else
1139: fprintf (file, "%d,%d", REGNO (XEXP (x, 0)), REGNO (XEXP (x, 1)));
1140: }
1141: else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT)
1142: fprintf (file, "%d(%d)", INTVAL (XEXP (x, 1)), REGNO (XEXP (x, 0)));
1143: else
1144: abort ();
1145: }
1146:
1147: /* This page contains routines that are used to determine what the function
1148: prologue and epilogue code will do and write them out. */
1149:
1150: /* Return the first fixed-point register that is required to be saved. 32 if
1151: none. */
1152:
1153: int
1154: first_reg_to_save ()
1155: {
1156: int first_reg;
1157:
1158: /* Find lowest numbered live register. */
1159: for (first_reg = 13; first_reg <= 31; first_reg++)
1160: if (regs_ever_live[first_reg])
1161: break;
1162:
1.1.1.3 root 1163: /* If profiling, then we must save/restore every register that contains
1164: a parameter before/after the .mcount call. Use registers from 30 down
1165: to 23 to do this. Don't use the frame pointer in reg 31.
1166:
1167: For now, save enough room for all of the parameter registers. */
1168: if (profile_flag)
1169: if (first_reg > 23)
1170: first_reg = 23;
1171:
1.1 root 1172: return first_reg;
1173: }
1174:
1175: /* Similar, for FP regs. */
1176:
1177: int
1178: first_fp_reg_to_save ()
1179: {
1180: int first_reg;
1181:
1182: /* Find lowest numbered live register. */
1183: for (first_reg = 14 + 32; first_reg <= 63; first_reg++)
1184: if (regs_ever_live[first_reg])
1185: break;
1186:
1187: return first_reg;
1188: }
1189:
1190: /* Return 1 if we need to save CR. */
1191:
1192: int
1193: must_save_cr ()
1194: {
1195: return regs_ever_live[70] || regs_ever_live[71] || regs_ever_live[72];
1196: }
1197:
1198: /* Compute the size of the save area in the stack, including the space for
1199: the fixed area. */
1200:
1201: int
1202: rs6000_sa_size ()
1203: {
1204: int size;
1205: int i;
1206:
1207: /* We have the six fixed words, plus the size of the register save
1208: areas, rounded to a double-word. */
1209: size = 6 + (32 - first_reg_to_save ()) + (64 - first_fp_reg_to_save ()) * 2;
1210: if (size & 1)
1211: size++;
1212:
1213: return size * 4;
1214: }
1215:
1216: /* Return non-zero if this function makes calls. */
1217:
1218: int
1219: rs6000_makes_calls ()
1220: {
1221: rtx insn;
1222:
1223: for (insn = get_insns (); insn; insn = next_insn (insn))
1224: if (GET_CODE (insn) == CALL_INSN)
1225: return 1;
1226:
1227: return 0;
1228: }
1229:
1230: /* Return non-zero if this function needs to push space on the stack. */
1231:
1232: int
1233: rs6000_pushes_stack ()
1234: {
1235: int total_size = (rs6000_sa_size () + get_frame_size ()
1236: + current_function_outgoing_args_size);
1237:
1238: /* We need to push the stack if a frame pointer is needed (because the
1239: stack might be dynamically adjusted), if we are debugging, if the
1240: total stack size is more than 220 bytes, or if we make calls. */
1241:
1242: return (frame_pointer_needed || write_symbols != NO_DEBUG
1243: || total_size > 220
1244: || rs6000_makes_calls ());
1245: }
1246:
1247: /* Write function prologue. */
1248:
1249: void
1250: output_prolog (file, size)
1251: FILE *file;
1252: int size;
1253: {
1254: int first_reg = first_reg_to_save ();
1255: int must_push = rs6000_pushes_stack ();
1256: int first_fp_reg = first_fp_reg_to_save ();
1257: int basic_size = rs6000_sa_size ();
1258: int total_size = (basic_size + size + current_function_outgoing_args_size);
1259:
1260: /* Round size to multiple of 8 bytes. */
1261: total_size = (total_size + 7) & ~7;
1262:
1263: /* Write .extern for any function we will call to save and restore fp
1264: values. */
1265: if (first_fp_reg < 62)
1266: fprintf (file, "\t.extern ._savef%d\n\t.extern ._restf%d\n",
1267: first_fp_reg - 32, first_fp_reg - 32);
1268:
1269: /* Write .extern for truncation routines, if needed. */
1270: if (rs6000_trunc_used && ! trunc_defined)
1271: {
1272: fprintf (file, "\t.extern .itrunc\n\t.extern .uitrunc\n");
1273: trunc_defined = 1;
1274: }
1275:
1.1.1.3 root 1276: /* If we have to call a function to save fpr's, or if we are doing profiling,
1277: then we will be using LR. */
1278: if (first_fp_reg < 62 || profile_flag)
1.1 root 1279: regs_ever_live[65] = 1;
1280:
1281: /* If we use the link register, get it into r0. */
1282: if (regs_ever_live[65])
1283: fprintf (file, "\tmflr 0\n");
1284:
1285: /* If we need to save CR, put it into r12. */
1286: if (must_save_cr ())
1287: fprintf (file, "\tmfcr 12\n");
1288:
1289: /* Do any required saving of fpr's. If only one or two to save, do it
1290: ourself. Otherwise, call function. */
1291: if (first_fp_reg == 62)
1292: fprintf (file, "\tstfd 30,-16(1)\n\tstfd 31,-8(1)\n");
1293: else if (first_fp_reg == 63)
1294: fprintf (file, "\tstfd 31,-8(1)\n");
1295: else if (first_fp_reg != 64)
1296: fprintf (file, "\tbl ._savef%d\n\tcror 15,15,15\n", first_fp_reg - 32);
1297:
1298: /* Now save gpr's. */
1299: if (first_reg == 31)
1300: fprintf (file, "\tst 31,%d(1)\n", -4 - (64 - first_fp_reg) * 8);
1301: else if (first_reg != 32)
1302: fprintf (file, "\tstm %d,%d(1)\n", first_reg,
1303: - (32 - first_reg) * 4 - (64 - first_fp_reg) * 8);
1304:
1305: /* Save lr if we used it. */
1306: if (regs_ever_live[65])
1307: fprintf (file, "\tst 0,8(1)\n");
1308:
1309: /* Save CR if we use any that must be preserved. */
1310: if (must_save_cr ())
1311: fprintf (file, "\tst 12,4(1)\n");
1312:
1313: /* Update stack and set back pointer. */
1314: if (must_push)
1315: {
1316: if (total_size < 32767)
1317: fprintf (file, "\tstu 1,%d(1)\n", - total_size);
1318: else
1319: {
1320: fprintf (file, "\tcau 0,0,%d\n\toril 0,0,%d\n",
1321: (total_size >> 16) & 0xffff, total_size & 0xffff);
1322: fprintf (file, "\tsf 12,0,1\n\tst 1,0(12)\n\toril 1,12,0\n");
1323: }
1324: }
1325:
1326: /* Set frame pointer, if needed. */
1327: if (frame_pointer_needed)
1328: fprintf (file, "\toril 31,1,0\n");
1329: }
1330:
1331: /* Write function epilogue. */
1332:
1333: void
1334: output_epilog (file, size)
1335: FILE *file;
1336: int size;
1337: {
1338: int first_reg = first_reg_to_save ();
1339: int must_push = rs6000_pushes_stack ();
1340: int first_fp_reg = first_fp_reg_to_save ();
1341: int basic_size = rs6000_sa_size ();
1342: int total_size = (basic_size + size + current_function_outgoing_args_size);
1343: rtx insn = get_last_insn ();
1344:
1345: /* Round size to multiple of 8 bytes. */
1346: total_size = (total_size + 7) & ~7;
1347:
1348: /* If the last insn was a BARRIER, we don't have to write anything except
1349: the trace table. */
1350: if (GET_CODE (insn) == NOTE)
1351: insn = prev_nonnote_insn (insn);
1352: if (insn == 0 || GET_CODE (insn) != BARRIER)
1353: {
1354: /* If we have a frame pointer, a call to alloca, or a large stack
1355: frame, restore the old stack pointer using the backchain. Otherwise,
1356: we know what size to update it with. */
1357: if (frame_pointer_needed || current_function_calls_alloca
1358: || total_size > 32767)
1359: fprintf (file, "\tl 1,0(1)\n");
1360: else if (must_push)
1361: fprintf (file, "\tai 1,1,%d\n", total_size);
1362:
1.1.1.2 root 1363: /* Get the old lr if we saved it. */
1.1 root 1364: if (regs_ever_live[65])
1.1.1.2 root 1365: fprintf (file, "\tl 0,8(1)\n");
1.1 root 1366:
1367: /* Get the old cr if we saved it. */
1368: if (must_save_cr ())
1369: fprintf (file, "\tl 12,4(1)\n");
1370:
1.1.1.2 root 1371: /* Set LR here to try to overlap restores below. */
1372: if (regs_ever_live[65])
1373: fprintf (file, "\tmtlr 0\n");
1374:
1.1 root 1375: /* Restore gpr's. */
1376: if (first_reg == 31)
1377: fprintf (file, "\tl 31,%d(1)\n", -4 - (64 - first_fp_reg) * 8);
1378: else if (first_reg != 32)
1379: fprintf (file, "\tlm %d,%d(1)\n", first_reg,
1380: - (32 - first_reg) * 4 - (64 - first_fp_reg) * 8);
1381:
1.1.1.2 root 1382: /* Restore fpr's if we can do it without calling a function. */
1.1 root 1383: if (first_fp_reg == 62)
1384: fprintf (file, "\tlfd 30,-16(1)\n\tlfd 31,-8(1)\n");
1385: else if (first_fp_reg == 63)
1386: fprintf (file, "\tlfd 31,-8(1)\n");
1387:
1388: /* If we saved cr, restore it here. Just set cr2, cr3, and cr4. */
1389: if (must_save_cr ())
1390: fprintf (file, "\tmtcrf 0x38,12\n");
1391:
1.1.1.2 root 1392: /* If we have to restore more than two FP registers, branch to the
1393: restore function. It will return to our caller. */
1394: if (first_fp_reg < 62)
1395: fprintf (file, "\tb ._restf%d\n\tcror 15,15,15\n", first_fp_reg - 32);
1396: else
1397: fprintf (file, "\tbr\n");
1.1 root 1398: }
1.1.1.2 root 1399:
1.1.1.3 root 1400: /* Output a traceback table here. See /usr/include/sys/debug.h for info
1401: on its format. */
1402: {
1403: char *fname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0);
1404: int fixed_parms, float_parms, parm_info;
1405: int i;
1406:
1407: /* Need label immediately before tbtab, so we can compute its offset
1408: from the function start. */
1409: if (*fname == '*')
1410: ++fname;
1411: fprintf (file, "LT..");
1412: ASM_OUTPUT_LABEL (file, fname);
1413:
1.1.1.4 ! root 1414: /* The .tbtab pseudo-op can only be used for the first eight
1.1.1.3 root 1415: expressions, since it can't handle the possibly variable length
1416: fields that follow. However, if you omit the optional fields,
1417: the assembler outputs zeros for all optional fields anyways, giving each
1418: variable length field is minimum length (as defined in sys/debug.h).
1.1.1.4 ! root 1419: Thus we can not use the .tbtab pseudo-op at all. */
1.1.1.3 root 1420:
1421: /* An all-zero word flags the start of the tbtab, for debuggers that have
1422: to find it by searching forward from the entry point or from the
1423: current pc. */
1424: fprintf (file, "\t.long 0\n");
1425:
1426: /* Tbtab format type. Use format type 0. */
1427: fprintf (file, "\t.byte 0,");
1428:
1429: /* Language type. Unfortunately, there doesn't seem to be any official way
1430: to get this info, so we use language_string. C is 0. C++ is 9.
1431: No number defined for Obj-C, but it doesn't have its own
1432: language_string, so we can't detect it anyways. */
1433: if (! strcmp (language_string, "GNU C"))
1434: i = 0;
1.1.1.4 ! root 1435: else if (! strcmp (language_string, "GNU F77"))
! 1436: i = 1;
! 1437: else if (! strcmp (language_string, "GNU Ada"))
! 1438: i = 3;
! 1439: else if (! strcmp (language_string, "GNU PASCAL"))
! 1440: i = 2;
1.1.1.3 root 1441: else if (! strcmp (language_string, "GNU C++"))
1442: i = 9;
1443: else
1444: abort ();
1445: fprintf (file, "%d,", i);
1446:
1447: /* 8 single bit fields: global linkage (not set for C extern linkage,
1448: apparently a PL/I convention?), out-of-line epilogue/prologue, offset
1449: from start of procedure stored in tbtab, internal function, function
1450: has controlled storage, function has no toc, function uses fp,
1451: function logs/aborts fp operations. */
1452: /* Assume that fp operations are used if any fp reg must be saved. */
1453: fprintf (file, "%d,", (1 << 5) | ((first_fp_reg != 64) << 1));
1454:
1455: /* 6 bitfields: function is interrupt handler, name present in proc table,
1456: function calls alloca, on condition directives (controls stack walks,
1457: 3 bits), saves condition reg, saves link reg. */
1458: /* The `function calls alloca' bit seems to be set whenever reg 31 is
1459: set up as a frame pointer, even when there is no alloca call. */
1460: fprintf (file, "%d,",
1461: ((1 << 6) | (frame_pointer_needed << 5)
1462: | (must_save_cr () << 1) | (regs_ever_live[65])));
1463:
1464: /* 3 bitfields: saves backchain, spare bit, number of fpr saved
1465: (6 bits). */
1466: fprintf (file, "%d,",
1467: (must_push << 7) | (64 - first_fp_reg_to_save ()));
1468:
1469: /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */
1470: fprintf (file, "%d,", (32 - first_reg_to_save ()));
1471:
1472: {
1473: /* Compute the parameter info from the function decl argument list. */
1474: tree decl;
1475: int next_parm_info_bit;
1476:
1477: next_parm_info_bit = 31;
1478: parm_info = 0;
1479: fixed_parms = 0;
1480: float_parms = 0;
1481:
1482: for (decl = DECL_ARGUMENTS (current_function_decl);
1483: decl; decl = TREE_CHAIN (decl))
1484: {
1485: rtx parameter = DECL_INCOMING_RTL (decl);
1486: enum machine_mode mode = GET_MODE (parameter);
1487:
1488: if (GET_CODE (parameter) == REG)
1489: {
1490: if (GET_MODE_CLASS (mode) == MODE_FLOAT)
1491: {
1492: int bits;
1493:
1494: float_parms++;
1495:
1496: if (mode == SFmode)
1497: bits = 0x2;
1498: else if (mode == DFmode)
1499: bits = 0x3;
1500: else
1501: abort ();
1502:
1503: /* If only one bit will fit, don't or in this entry. */
1504: if (next_parm_info_bit > 0)
1505: parm_info |= (bits << (next_parm_info_bit - 1));
1506: next_parm_info_bit -= 2;
1507: }
1508: else
1509: {
1510: fixed_parms += ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1))
1511: / UNITS_PER_WORD);
1512: next_parm_info_bit -= 1;
1513: }
1514: }
1515: }
1516: }
1517:
1518: /* Number of fixed point parameters. */
1519: /* This is actually the number of words of fixed point parameters; thus
1520: an 8 byte struct counts as 2; and thus the maximum value is 8. */
1521: fprintf (file, "%d,", fixed_parms);
1522:
1523: /* 2 bitfields: number of floating point parameters (7 bits), parameters
1524: all on stack. */
1525: /* This is actually the number of fp registers that hold parameters;
1526: and thus the maximum value is 13. */
1527: /* Set parameters on stack bit if parameters are not in their original
1.1.1.4 ! root 1528: registers, regardless of whether they are on the stack? Xlc
1.1.1.3 root 1529: seems to set the bit when not optimizing. */
1530: fprintf (file, "%d\n", ((float_parms << 1) | (! optimize)));
1531:
1532: /* Optional fields follow. Some are variable length. */
1533:
1534: /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float,
1535: 11 double float. */
1536: /* There is an entry for each parameter in a register, in the order that
1537: they occur in the parameter list. Any intervening arguments on the
1538: stack are ignored. If the list overflows a long (max possible length
1539: 34 bits) then completely leave off all elements that don't fit. */
1540: /* Only emit this long if there was at least one parameter. */
1541: if (fixed_parms || float_parms)
1542: fprintf (file, "\t.long %d\n", parm_info);
1543:
1544: /* Offset from start of code to tb table. */
1545: fprintf (file, "\t.long LT..");
1546: RS6000_OUTPUT_BASENAME (file, fname);
1547: fprintf (file, "-.");
1548: RS6000_OUTPUT_BASENAME (file, fname);
1549: fprintf (file, "\n");
1550:
1551: /* Interrupt handler mask. */
1.1.1.4 ! root 1552: /* Omit this long, since we never set the interrupt handler bit above. */
1.1.1.3 root 1553:
1554: /* Number of CTL (controlled storage) anchors. */
1555: /* Omit this long, since the has_ctl bit is never set above. */
1556:
1557: /* Displacement into stack of each CTL anchor. */
1558: /* Omit this list of longs, because there are no CTL anchors. */
1559:
1560: /* Length of function name. */
1561: fprintf (file, "\t.short %d\n", strlen (fname));
1562:
1563: /* Function name. */
1564: assemble_string (fname, strlen (fname));
1565:
1566: /* Register for alloca automatic storage; this is always reg 31.
1567: Only emit this if the alloca bit was set above. */
1568: if (frame_pointer_needed)
1569: fprintf (file, "\t.byte 31\n");
1570: }
1.1 root 1571: }
1572:
1573: /* Output a TOC entry. We derive the entry name from what is
1574: being written. */
1575:
1576: void
1577: output_toc (file, x, labelno)
1578: FILE *file;
1579: rtx x;
1580: int labelno;
1581: {
1582: char buf[256];
1583: char *name = buf;
1584: rtx base = x;
1585: int offset = 0;
1586:
1587: ASM_OUTPUT_INTERNAL_LABEL (file, "LC", labelno);
1588:
1589: /* Handle FP constants specially. */
1590: if (GET_CODE (x) == CONST_DOUBLE
1591: && GET_MODE (x) == DFmode
1592: && TARGET_FLOAT_FORMAT == HOST_FLOAT_FORMAT
1593: && BITS_PER_WORD == HOST_BITS_PER_INT
1594: && TARGET_FP_IN_TOC)
1595: {
1596: fprintf (file, "\t.tc FD_%x_%x[TC],%d,%d\n",
1597: CONST_DOUBLE_LOW (x), CONST_DOUBLE_HIGH (x),
1598: CONST_DOUBLE_LOW (x), CONST_DOUBLE_HIGH (x));
1599: return;
1600: }
1601: else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode
1602: && TARGET_FP_IN_TOC)
1603: {
1604: rtx val = operand_subword (x, 0, 0, SFmode);
1605:
1606: if (val == 0 || GET_CODE (val) != CONST_INT)
1607: abort ();
1608:
1609: fprintf (file, "\t.tc FS_%x[TC],%d\n", INTVAL (val), INTVAL (val));
1610: return;
1611: }
1612:
1613: if (GET_CODE (x) == CONST)
1614: {
1615: base = XEXP (XEXP (x, 0), 0);
1616: offset = INTVAL (XEXP (XEXP (x, 0), 1));
1617: }
1618:
1619: if (GET_CODE (base) == SYMBOL_REF)
1620: name = XSTR (base, 0);
1621: else if (GET_CODE (base) == LABEL_REF)
1622: ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (base, 0)));
1623: else if (GET_CODE (base) == CODE_LABEL)
1624: ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (base));
1625: else
1626: abort ();
1627:
1628: fprintf (file, "\t.tc ");
1629: RS6000_OUTPUT_BASENAME (file, name);
1630:
1631: if (offset < 0)
1.1.1.3 root 1632: fprintf (file, ".N%d", - offset);
1.1 root 1633: else if (offset)
1.1.1.3 root 1634: fprintf (file, ".P%d", offset);
1.1 root 1635:
1636: fprintf (file, "[TC],");
1637: output_addr_const (file, x);
1638: fprintf (file, "\n");
1639: }
1640:
1641: /* Output an assembler pseudo-op to write an ASCII string of N characters
1642: starting at P to FILE.
1643:
1644: On the RS/6000, we have to do this using the .byte operation and
1645: write out special characters outside the quoted string.
1646: Also, the assembler is broken; very long strings are truncated,
1647: so we must artificially break them up early. */
1648:
1649: void
1650: output_ascii (file, p, n)
1651: FILE *file;
1652: char *p;
1653: int n;
1654: {
1655: char c;
1656: int i, count_string;
1657: char *for_string = "\t.byte \"";
1658: char *for_decimal = "\t.byte ";
1659: char *to_close = NULL;
1660:
1661: count_string = 0;
1662: for (i = 0; i < n; i++)
1663: {
1664: c = *p++;
1665: if (c >= ' ' && c < 0177)
1666: {
1667: if (for_string)
1668: fputs (for_string, file);
1669: putc (c, file);
1670:
1671: /* Write two quotes to get one. */
1672: if (c == '"')
1673: {
1674: putc (c, file);
1675: ++count_string;
1676: }
1677:
1678: for_string = NULL;
1679: for_decimal = "\"\n\t.byte ";
1680: to_close = "\"\n";
1681: ++count_string;
1682:
1683: if (count_string >= 512)
1684: {
1685: fputs (to_close, file);
1686:
1687: for_string = "\t.byte \"";
1688: for_decimal = "\t.byte ";
1689: to_close = NULL;
1690: count_string = 0;
1691: }
1692: }
1693: else
1694: {
1695: if (for_decimal)
1696: fputs (for_decimal, file);
1697: fprintf (file, "%d", c);
1698:
1699: for_string = "\n\t.byte \"";
1700: for_decimal = ", ";
1701: to_close = "\n";
1702: count_string = 0;
1703: }
1704: }
1705:
1706: /* Now close the string if we have written one. Then end the line. */
1707: if (to_close)
1708: fprintf (file, to_close);
1709: }
1710:
1711: /* Generate a unique section name for FILENAME for a section type
1712: represented by SECTION_DESC. Output goes into BUF.
1713:
1714: SECTION_DESC can be any string, as long as it is different for each
1715: possible section type.
1716:
1717: We name the section in the same manner as xlc. The name begins with an
1718: underscore followed by the filename (after stripping any leading directory
1719: names) with the period replaced by the string SECTION_DESC. If FILENAME
1720: does not contain a period, SECTION_DESC is appended at the end of the
1721: name. */
1722:
1723: void
1724: rs6000_gen_section_name (buf, filename, section_desc)
1725: char **buf;
1726: char *filename;
1727: char *section_desc;
1728: {
1729: char *q, *after_last_slash;
1730: char *p;
1731: int len;
1732: int used_desc = 0;
1733:
1734: after_last_slash = filename;
1735: for (q = filename; *q; q++)
1736: if (*q == '/')
1737: after_last_slash = q + 1;
1738:
1739: len = strlen (filename) + strlen (section_desc) + 2;
1740: *buf = (char *) permalloc (len);
1741:
1742: p = *buf;
1743: *p++ = '_';
1744:
1745: for (q = after_last_slash; *q; q++)
1746: {
1747: if (*q == '.')
1748: {
1749: strcpy (p, section_desc);
1750: p += strlen (section_desc);
1751: used_desc = 1;
1752: }
1753:
1754: else if (isalnum (*q))
1755: *p++ = *q;
1756: }
1757:
1758: if (! used_desc)
1759: strcpy (p, section_desc);
1760: else
1761: *p = '\0';
1762: }
1.1.1.3 root 1763:
1764: /* Write function profiler code. */
1765:
1766: void
1767: output_function_profiler (file, labelno)
1768: FILE *file;
1769: int labelno;
1770: {
1771: /* The last used parameter register. */
1772: int last_parm_reg;
1773: int i, j;
1774:
1775: /* Set up a TOC entry for the profiler label. */
1776: toc_section ();
1777: fprintf (file, "LPC..%d:\n\t.tc\tLP..%d[TC],LP..%d\n",
1778: labelno, labelno, labelno);
1779: text_section ();
1780:
1781: /* Figure out last used parameter register. The proper thing to do is
1782: to walk incoming args of the function. A function might have live
1783: parameter registers even if it has no incoming args. */
1784:
1785: for (last_parm_reg = 10;
1786: last_parm_reg > 2 && ! regs_ever_live [last_parm_reg];
1787: last_parm_reg--)
1788: ;
1789:
1790: /* Save parameter registers in regs 23-30. Don't overwrite reg 31, since
1791: it might be set up as the frame pointer. */
1792:
1793: for (i = 3, j = 30; i <= last_parm_reg; i++, j--)
1794: fprintf (file, "\tai %d,%d,0\n", j, i);
1795:
1796: /* Load location address into r3, and call mcount. */
1797:
1798: fprintf (file, "\tl 3,LPC..%d(2)\n\tbl .mcount\n", labelno);
1799:
1800: /* Restore parameter registers. */
1801:
1802: for (i = 3, j = 30; i <= last_parm_reg; i++, j--)
1803: fprintf (file, "\tai %d,%d,0\n", i, j);
1804: }
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