--- gcc/config/rs6000.h 2018/04/24 17:51:31 1.1.1.1 +++ gcc/config/rs6000.h 2018/04/24 18:04:01 1.1.1.4 @@ -30,8 +30,12 @@ the Free Software Foundation, 675 Mass A /* Print subsidiary information on the compiler version in use. */ #define TARGET_VERSION ; -/* Tell the assembler to assume that all undefined names are external. Don't - do this until the fixed IBM assembler is more generally available. */ +/* Tell the assembler to assume that all undefined names are external. + + Don't do this until the fixed IBM assembler is more generally available. + When this becomes permanently defined, the ASM_OUTPUT_EXTERNAL, + ASM_OUTPUT_EXTERNAL_LIBCALL, and RS6000_OUTPUT_BASENAME macros will no + longer be needed. */ /* #define ASM_SPEC "-u" */ @@ -45,13 +49,15 @@ the Free Software Foundation, 675 Mass A -bnodelcsect undoes a poor choice of default relating to multiply-defined csects. See AIX documentation for more information about this. */ -#define LINK_SPEC "-T512 -H512 -btextro -bhalt:4 -bnodelcsect" +#define LINK_SPEC "-T512 -H512 -btextro -bhalt:4 -bnodelcsect\ + %{static:-bnso -bI:/lib/syscalls.exp}" -/* Add -lfp_p when running with -p or -pg. */ -#define LIB_SPEC "%{pg:-lfp_p}%{p:-lfp_p} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}" +/* Profiled library versions are used by linking with special directories. */ +#define LIB_SPEC "%{pg:-L/lib/profiled -L/usr/lib/profiled}\ + %{p:-L/lib/profiled -L/usr/lib/profiled} %{g*:-lg} -lc" /* gcc must do the search itself to find libgcc.a, not use -l. */ -#define LINK_LIBGCC_SPECIAL +#define LINK_LIBGCC_SPECIAL_1 /* Don't turn -B into -L if the argument specifies a relative file name. */ #define RELATIVE_PREFIX_NOT_LINKDIR @@ -89,17 +95,26 @@ extern int target_flags; } \ } -/* Define this to modify the options specified by the user. - - We turn off profiling because we don't know how to do it. */ +/* Define this to modify the options specified by the user. */ #define OVERRIDE_OPTIONS \ { \ - profile_flag = profile_block_flag = 0; \ + profile_block_flag = 0; \ } /* target machine storage layout */ +/* Define this macro if it is advisible to hold scalars in registers + in a wider mode than that declared by the program. In such cases, + the value is constrained to be within the bounds of the declared + type, but kept valid in the wider mode. The signedness of the + extension may differ from that of the type. */ + +#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ + if (GET_MODE_CLASS (MODE) == MODE_INT \ + && GET_MODE_SIZE (MODE) < 4) \ + (MODE) == SImode; + /* Define this if most significant bit is lowest numbered in instructions that operate on numbered bit-fields. */ /* That is true on RS/6000. */ @@ -116,7 +131,7 @@ extern int target_flags; instructions for them. Might as well be consistent with bits and bytes. */ #define WORDS_BIG_ENDIAN 1 -/* number of bits in an addressible storage unit */ +/* number of bits in an addressable storage unit */ #define BITS_PER_UNIT 8 /* Width in bits of a "word", which is the contents of a machine register. @@ -128,6 +143,9 @@ extern int target_flags; /* Width of a word, in units (bytes). */ #define UNITS_PER_WORD 4 +/* Type used for ptrdiff_t, as a string used in a declaration. */ +#define PTRDIFF_TYPE "int" + /* Type used for wchar_t, as a string used in a declaration. */ #define WCHAR_TYPE "short unsigned int" @@ -170,9 +188,9 @@ extern int target_flags; && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) -/* Define this if move instructions will actually fail to work +/* Non-zero if move instructions will actually fail to work when given unaligned data. */ -/* #define STRICT_ALIGNMENT */ +#define STRICT_ALIGNMENT 0 /* Standard register usage. */ @@ -324,15 +342,15 @@ extern int target_flags; On the RS/6000, bump this up a bit. */ -#define MEMORY_MOVE_COST(MODE) 4 +#define MEMORY_MOVE_COST(MODE) 6 /* Specify the cost of a branch insn; roughly the number of extra insns that should be added to avoid a branch. - Set this to 2 on the RS/6000 since that is roughly the average cost of an + Set this to 3 on the RS/6000 since that is roughly the average cost of an unscheduled conditional branch. */ -#define BRANCH_COST 2 +#define BRANCH_COST 3 /* Specify the registers used for certain standard purposes. The values of these macros are register numbers. */ @@ -395,7 +413,8 @@ extern int target_flags; enum reg_class { NO_REGS, BASE_REGS, GENERAL_REGS, FLOAT_REGS, NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS, LINK_OR_CTR_REGS, - SPECIAL_REGS, CR0_REGS, CR_REGS, ALL_REGS, LIM_REG_CLASSES }; + SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS, CR_REGS, NON_FLOAT_REGS, + ALL_REGS, LIM_REG_CLASSES }; #define N_REG_CLASSES (int) LIM_REG_CLASSES @@ -404,7 +423,8 @@ enum reg_class { NO_REGS, BASE_REGS, GEN #define REG_CLASS_NAMES \ { "NO_REGS", "BASE_REGS", "GENERAL_REGS", "FLOAT_REGS", \ "NON_SPECIAL_REGS", "MQ_REGS", "LINK_REGS", "CTR_REGS", \ - "LINK_OR_CTR_REGS", "SPECIAL_REGS", "CR0_REGS", "CR_REGS", "ALL_REGS" } + "LINK_OR_CTR_REGS", "SPECIAL_REGS", "SPEC_OR_GEN_REGS", \ + "CR0_REGS", "CR_REGS", "NON_FLOAT_REGS", "ALL_REGS" } /* Define which registers fit in which classes. This is an initializer for a vector of HARD_REG_SET @@ -412,9 +432,10 @@ enum reg_class { NO_REGS, BASE_REGS, GEN #define REG_CLASS_CONTENTS \ { {0, 0, 0}, {0xfffffffe, 0, 8}, {~0, 0, 8}, \ - {0, ~0, 0}, {~0, ~0, 0}, {0, 0, 1}, {0, 0, 2}, \ - {0, 0, 4}, {0, 0, 6}, {0, 0, 7}, {0, 0, 16}, \ - {0, 0, 0xff0}, {~0, ~0, 0xfff5} } + {0, ~0, 0}, {~0, ~0, 8}, {0, 0, 1}, {0, 0, 2}, \ + {0, 0, 4}, {0, 0, 6}, {0, 0, 7}, {~0, 0, 15}, \ + {0, 0, 16}, {0, 0, 0xff0}, {~0, 0, 0xffff}, \ + {~0, ~0, 0xffff} } /* The same information, inverted: Return the class number of the smallest class containing @@ -490,8 +511,9 @@ enum reg_class { NO_REGS, BASE_REGS, GEN For the RS/6000, `Q' means that this is a memory operand that is just an offset from a register. */ -#define EXTRA_CONSTRAINT(OP, C) \ - ((C) == 'Q' ? indirect_operand (OP, VOIDmode) : 0) +#define EXTRA_CONSTRAINT(OP, C) \ + ((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \ + : 0) /* Given an rtx X being reloaded into a reg required to be in class CLASS, return the class of reg to actually use. @@ -704,12 +726,16 @@ struct rs6000_args {int words, fregno, n and the rest are pushed. The first 13 FP args are in registers. If this is floating-point and no prototype is specified, we use - both an FP and integer register (or possibly FP reg and stack). */ + both an FP and integer register (or possibly FP reg and stack). Library + functions (when TYPE is zero) always have the proper types for args, + so we can pass the FP value just in one register. emit_library_function + doesn't support EXPR_LIST anyway. */ #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ (! (NAMED) ? 0 \ - : USE_FP_FOR_ARG_P (CUM, MODE, TYPE) \ - ? ((CUM).nargs_prototype > 0 \ + : ((TYPE) != 0 && TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST) ? 0 \ + : USE_FP_FOR_ARG_P (CUM, MODE, TYPE) \ + ? ((CUM).nargs_prototype > 0 || (TYPE) == 0 \ ? gen_rtx (REG, MODE, (CUM).fregno) \ : ((CUM).words < 8 \ ? gen_rtx (EXPR_LIST, VOIDmode, \ @@ -777,12 +803,10 @@ struct rs6000_args {int words, fregno, n #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE) /* Output assembler code to FILE to increment profiler label # LABELNO - for profiling a function entry. - - I have no real idea what r3 should point to here. */ + for profiling a function entry. */ #define FUNCTION_PROFILER(FILE, LABELNO) \ - fprintf(FILE, "\tbl mcount\n"); + output_function_profiler ((FILE), (LABELNO)); /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, the stack pointer does not matter. No definition is equivalent to @@ -827,14 +851,20 @@ struct rs6000_args {int words, fregno, n #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, SImode, memory_address (SImode, ADDR)), \ - force_reg (SImode, FNADDR)); \ emit_move_insn (gen_rtx (MEM, SImode, \ - memory_address (SImode, plus_constant (ADDR, 4))), \ - gen_rtx (REG, SImode, 2)); \ + memory_address (SImode, (ADDR))), \ + gen_rtx (MEM, SImode, \ + memory_address (SImode, (FNADDR)))); \ emit_move_insn (gen_rtx (MEM, SImode, \ - memory_address (SImode, plus_constant (ADDR, 8))), \ - force_reg (SImode, CXT)); \ + memory_address (SImode, \ + plus_constant ((ADDR), 4))), \ + gen_rtx (MEM, SImode, \ + memory_address (SImode, \ + plus_constant ((FNADDR), 4)))); \ + emit_move_insn (gen_rtx (MEM, SImode, \ + memory_address (SImode, \ + plus_constant ((ADDR), 8))), \ + force_reg (SImode, (CXT))); \ } /* Definitions for register eliminations. @@ -1076,11 +1106,16 @@ struct rs6000_args {int words, fregno, n gen_rtx (CONST_INT, VOIDmode, \ high_int << 16)), 0),\ gen_rtx (CONST_INT, VOIDmode, low_int)); \ + goto WIN; \ } \ else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \ - && GET_CODE (XEXP (X, 1)) != CONST_INT) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ - force_operand (XEXP (X, 1), 0)); \ + && GET_CODE (XEXP (X, 1)) != CONST_INT \ + && (MODE) != DImode && (MODE) != TImode) \ + { \ + (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ + force_reg (SImode, force_operand (XEXP (X, 1), 0))); \ + goto WIN; \ + } \ } /* Go to LABEL if ADDR (a legitimate address expression) @@ -1143,25 +1178,19 @@ struct rs6000_args {int words, fregno, n /* Define if normal loads of shorter-than-word items from memory clears the rest of the bigs in the register. */ #define BYTE_LOADS_ZERO_EXTEND + +/* The RS/6000 uses the XCOFF format. */ -/* We can't support any debugging info on the RS/6000 since it has its - own format. */ -/* #define DBX_DEBUGGING_INFO */ -/* #define SDB_DEBUGGING_INFO */ +#define XCOFF_DEBUGGING_INFO + +/* Define if the object format being used is COFF or a superset. */ +#define OBJECT_FORMAT_COFF /* We don't have GAS for the RS/6000 yet, so don't write out special .stabs in cc1plus. */ #define FASCIST_ASSEMBLER -/* Do not break .stabs pseudos into continuations. */ -#define DBX_CONTIN_LENGTH 0 - -/* Don't try to use the `x' type-cross-reference character in DBX data. - Also has the consequence of putting each struct, union or enum - into a separate .stabs, containing only cross-refs to the others. */ -#define DBX_NO_XREFS - /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits is done just by pretending it is already truncated. */ #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 @@ -1198,7 +1227,7 @@ struct rs6000_args {int words, fregno, n On the RS/6000, if it is legal in the insn, it is free. So this always returns 0. */ -#define CONST_COSTS(RTX,CODE) \ +#define CONST_COSTS(RTX,CODE,OUTER_CODE) \ case CONST_INT: \ case CONST: \ case LABEL_REF: \ @@ -1209,7 +1238,7 @@ struct rs6000_args {int words, fregno, n /* Provide the costs of a rtl expression. This is in the body of a switch on CODE. */ -#define RTX_COSTS(X,CODE) \ +#define RTX_COSTS(X,CODE,OUTER_CODE) \ case MULT: \ return (GET_CODE (XEXP (X, 1)) != CONST_INT \ ? COSTS_N_INSNS (5) \ @@ -1250,22 +1279,26 @@ struct rs6000_args {int words, fregno, n /* Add any extra modes needed to represent the condition code. For the RS/6000, we need separate modes when unsigned (logical) comparisons - are being done and we need a separate mode for floating-point. */ + are being done and we need a separate mode for floating-point. We also + use a mode for the case when we are comparing the results of two + comparisons. */ -#define EXTRA_CC_MODES CCUNSmode, CCFPmode +#define EXTRA_CC_MODES CCUNSmode, CCFPmode, CCEQmode /* Define the names for the modes specified above. */ -#define EXTRA_CC_NAMES "CCUNS", "CCFP" +#define EXTRA_CC_NAMES "CCUNS", "CCFP", "CCEQ" /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, return the mode to be used for the comparison. For floating-point, CCFPmode - should be used. CC_NOOVmode should be used when the first operand is a - PLUS, MINUS, or NEG. CCmode should be used when no special processing is - needed. */ -#define SELECT_CC_MODE(OP,X) \ + should be used. CCUNSmode should be used for unsigned comparisons. + CCEQmode should be used when we are doing an inequality comparison on + the result of a comparison. CCmode should be used in all other cases. */ + +#define SELECT_CC_MODE(OP,X,Y) \ (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode \ - : ((OP) == GTU || (OP) == LTU || (OP) == GEU || (OP) == LEU \ - ? CCUNSmode : CCmode)) + : (OP) == GTU || (OP) == LTU || (OP) == GEU || (OP) == LEU ? CCUNSmode \ + : (((OP) == EQ || (OP) == NE) && GET_RTX_CLASS (GET_CODE (X)) == '<' \ + ? CCEQmode : CCmode)) /* Define the information needed to generate branch and scc insns. This is stored from the compare operation. Note that we can't use "rtx" here @@ -1286,19 +1319,23 @@ extern int rs6000_trunc_used; On the RS/6000, we want to go into the TOC section so at least one .toc will be emitted. - Also initialize the section names for the RS/6000 at this point. */ + Also initialize the section names for the RS/6000 at this point. + + Also, in order to output proper .bs/.es pairs, we need at least one static + [RW] section emitted. */ #define ASM_FILE_START(FILE) \ { \ - rs6000_gen_section_name (&rs6000_bss_section_name, \ + rs6000_gen_section_name (&xcoff_bss_section_name, \ main_input_filename, ".bss_"); \ - rs6000_gen_section_name (&rs6000_private_data_section_name, \ + rs6000_gen_section_name (&xcoff_private_data_section_name, \ main_input_filename, ".rw_"); \ - rs6000_gen_section_name (&rs6000_read_only_section_name, \ + rs6000_gen_section_name (&xcoff_read_only_section_name, \ main_input_filename, ".ro_"); \ \ toc_section (); \ - bss_section (); \ + if (write_symbols != NO_DEBUG) \ + private_data_section (); \ } /* Output at end of assembler file. @@ -1313,13 +1350,6 @@ extern int rs6000_trunc_used; fprintf (FILE, "\t.long _section_.text\n"); \ } -/* Names of bss and data sections. These should be unique names for each - compilation unit. */ - -extern char *rs6000_bss_section_name; -extern char *rs6000_private_data_section_name; -extern char *rs6000_read_only_section_name; - /* We define this to prevent the name mangler from putting dollar signs into function names. */ @@ -1331,6 +1361,10 @@ extern char *rs6000_read_only_section_na #define DOLLARS_IN_IDENTIFIERS 0 +/* Implicit library calls should use memcpy, not bcopy, etc. */ + +#define TARGET_MEM_FUNCTIONS + /* Define the extra sections we need. We define three: one is the read-only data section which is used for constants. This is a csect whose name is derived from the name of the input file. The second is for initialized @@ -1357,8 +1391,8 @@ read_only_data_section () \ { \ if (in_section != read_only_data) \ { \ - fprintf (asm_out_file, "\t.csect\t%s[RO]\n", \ - rs6000_read_only_section_name); \ + fprintf (asm_out_file, "\t.csect %s[RO]\n", \ + xcoff_read_only_section_name); \ in_section = read_only_data; \ } \ } \ @@ -1369,7 +1403,7 @@ private_data_section () \ if (in_section != private_data) \ { \ fprintf (asm_out_file, "\t.csect %s[RW]\n", \ - rs6000_private_data_section_name); \ + xcoff_private_data_section_name); \ \ in_section = private_data; \ } \ @@ -1380,8 +1414,8 @@ read_only_private_data_section () \ { \ if (in_section != read_only_private_data) \ { \ - fprintf (asm_out_file, "\t.csect\t%s[RO]\n", \ - rs6000_private_data_section_name); \ + fprintf (asm_out_file, "\t.csect %s[RO]\n", \ + xcoff_private_data_section_name); \ in_section = read_only_private_data; \ } \ } \ @@ -1393,18 +1427,7 @@ toc_section () \ fprintf (asm_out_file, "\t.toc\n"); \ \ in_section = toc; \ -} \ - \ -void \ -bss_section () \ -{ \ - if (in_section != bss) \ - { \ - fprintf (asm_out_file, "\t.csect\t%s[BS]\n", \ - rs6000_bss_section_name); \ - in_section = bss; \ - } \ -} \ +} /* This macro produces the initial definition of a function name. On the RS/6000, we need to place an extra '.' in the function name and @@ -1414,12 +1437,20 @@ bss_section () \ `text_section' call previously done. We do have to go back to that csect, however. */ +/* ??? What do the 16 and 044 in the .function line really mean? */ + #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \ { if (TREE_PUBLIC (DECL)) \ { \ fprintf (FILE, "\t.globl ."); \ RS6000_OUTPUT_BASENAME (FILE, NAME); \ - fprintf (FILE,"\n"); \ + fprintf (FILE, "\n"); \ + } \ + else if (write_symbols == XCOFF_DEBUG) \ + { \ + fprintf (FILE, "\t.lglobl ."); \ + RS6000_OUTPUT_BASENAME (FILE, NAME); \ + fprintf (FILE, "\n"); \ } \ fprintf (FILE, "\t.csect "); \ RS6000_OUTPUT_BASENAME (FILE, NAME); \ @@ -1428,10 +1459,12 @@ bss_section () \ fprintf (FILE, ":\n"); \ fprintf (FILE, "\t.long ."); \ RS6000_OUTPUT_BASENAME (FILE, NAME); \ - fprintf (FILE, ", TOC[tc0], 0\n"); \ + fprintf (FILE, ", TOC[tc0], 0\n"); \ fprintf (FILE, "\t.csect [PR]\n."); \ RS6000_OUTPUT_BASENAME (FILE, NAME); \ fprintf (FILE, ":\n"); \ + if (write_symbols == XCOFF_DEBUG) \ + xcoffout_declare_function (FILE, DECL, NAME); \ } /* Return non-zero if this entry is to be written into the constant pool @@ -1566,11 +1599,11 @@ bss_section () \ /* Output before instructions. */ -#define TEXT_SECTION_ASM_OP "\t.csect [PR]" +#define TEXT_SECTION_ASM_OP ".csect [PR]" /* Output before writable data. */ -#define DATA_SECTION_ASM_OP "\t.csect .data[RW]" +#define DATA_SECTION_ASM_OP ".csect .data[RW]" /* How to refer to registers in assembler output. This sequence is indexed by compiler's hard-register-number (see above). */ @@ -1608,7 +1641,8 @@ bss_section () \ "fr28", 60, "fr29", 61, "fr30", 62, "fr31", 63, \ /* no additional names for: mq, lr, ctr, ap */ \ "cr0", 68, "cr1", 69, "cr2", 70, "cr3", 71, \ - "cr4", 72, "cr5", 73, "cr6", 74, "cr7", 75 } + "cr4", 72, "cr5", 73, "cr6", 74, "cr7", 75, \ + "cc", 68 } /* How to renumber registers for dbx and gdb. */ @@ -1742,7 +1776,7 @@ bss_section () \ #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \ do { fputs (".lcomm ", (FILE)); \ RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \ - fprintf ((FILE), ",%d,%s\n", (SIZE), rs6000_bss_section_name); \ + fprintf ((FILE), ",%d,%s\n", (SIZE), xcoff_bss_section_name); \ } while (0) /* Store in OUTPUT a string (made with alloca) containing @@ -1787,7 +1821,8 @@ bss_section () \ #define PREDICATE_CODES \ {"short_cint_operand", {CONST_INT}}, \ {"u_short_cint_operand", {CONST_INT}}, \ - {"gen_reg_operand", {SUBREG, REG}}, \ + {"non_short_cint_operand", {CONST_INT}}, \ + {"gpc_reg_operand", {SUBREG, REG}}, \ {"cc_reg_operand", {SUBREG, REG}}, \ {"reg_or_short_operand", {SUBREG, REG, CONST_INT}}, \ {"reg_or_neg_short_operand", {SUBREG, REG, CONST_INT}}, \ @@ -1798,8 +1833,11 @@ bss_section () \ {"fp_reg_or_mem_operand", {SUBREG, MEM, REG}}, \ {"mem_or_easy_const_operand", {SUBREG, MEM, CONST_DOUBLE}}, \ {"add_operand", {SUBREG, REG, CONST_INT}}, \ + {"non_add_cint_operand", {CONST_INT}}, \ {"and_operand", {SUBREG, REG, CONST_INT}}, \ + {"non_and_cint_operand", {CONST_INT}}, \ {"logical_operand", {SUBREG, REG, CONST_INT}}, \ + {"non_logical_cint_operand", {CONST_INT}}, \ {"mask_operand", {CONST_INT}}, \ {"call_operand", {SYMBOL_REF, REG}}, \ {"input_operand", {SUBREG, MEM, REG, CONST_INT}}, \