|
|
1.1 root 1: /* Definitions of target machine for GNU compiler, for IBM RS/6000.
2: Copyright (C) 1992 Free Software Foundation, Inc.
3: Contributed by Richard Kenner ([email protected])
4:
5: This file is part of GNU CC.
6:
7: GNU CC is free software; you can redistribute it and/or modify
8: it under the terms of the GNU General Public License as published by
9: the Free Software Foundation; either version 2, or (at your option)
10: any later version.
11:
12: GNU CC is distributed in the hope that it will be useful,
13: but WITHOUT ANY WARRANTY; without even the implied warranty of
14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15: GNU General Public License for more details.
16:
17: You should have received a copy of the GNU General Public License
18: along with GNU CC; see the file COPYING. If not, write to
19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20:
21:
22: /* Note that some other tm.h files include this one and then override
23: many of the definitions that relate to assembler syntax. */
24:
25:
26: /* Names to predefine in the preprocessor for this target machine. */
27:
28: #define CPP_PREDEFINES "-D_IBMR2 -D_AIX"
29:
30: /* Print subsidiary information on the compiler version in use. */
31: #define TARGET_VERSION ;
32:
33: /* Tell the assembler to assume that all undefined names are external. Don't
34: do this until the fixed IBM assembler is more generally available. */
35:
36: /* #define ASM_SPEC "-u" */
37:
38: /* Define the options for the binder: Start text at 512, align all segments
39: to 512 bytes, and warn if there is text relocation.
40:
41: The -bhalt:4 option supposedly changes the level at which ld will abort,
42: but it also suppresses warnings about multiply defined symbols and is
43: used by the AIX cc command. So we use it here.
44:
45: -bnodelcsect undoes a poor choice of default relating to multiply-defined
46: csects. See AIX documentation for more information about this. */
47:
48: #define LINK_SPEC "-T512 -H512 -btextro -bhalt:4 -bnodelcsect"
49:
50: /* Add -lfp_p when running with -p or -pg. */
51: #define LIB_SPEC "%{pg:-lfp_p}%{p:-lfp_p} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
52:
53: /* gcc must do the search itself to find libgcc.a, not use -l. */
54: #define LINK_LIBGCC_SPECIAL
55:
56: /* Don't turn -B into -L if the argument specifies a relative file name. */
57: #define RELATIVE_PREFIX_NOT_LINKDIR
58:
59: /* Run-time compilation parameters selecting different hardware subsets. */
60:
61: /* Flag to allow putting fp constants in the TOC; can be turned off when
62: the TOC overflows. */
63:
64: #define TARGET_FP_IN_TOC (target_flags & 1)
65:
66: extern int target_flags;
67:
68: /* Macro to define tables used to set the flags.
69: This is a list in braces of pairs in braces,
70: each pair being { "NAME", VALUE }
71: where VALUE is the bits to set or minus the bits to clear.
72: An empty string NAME is used to identify the default VALUE. */
73:
74: #define TARGET_SWITCHES \
75: {{"fp-in-toc", 1}, \
76: {"no-fp-in-toc", -1}, \
77: { "", TARGET_DEFAULT}}
78:
79: #define TARGET_DEFAULT 1
80:
81: /* On the RS/6000, we turn on various flags if optimization is selected. */
82:
83: #define OPTIMIZATION_OPTIONS(LEVEL) \
84: { \
85: if ((LEVEL) > 0) \
86: { \
87: flag_force_mem = 1; \
88: flag_omit_frame_pointer = 1; \
89: } \
90: }
91:
92: /* Define this to modify the options specified by the user.
93:
94: We turn off profiling because we don't know how to do it. */
95:
96: #define OVERRIDE_OPTIONS \
97: { \
98: profile_flag = profile_block_flag = 0; \
99: }
100:
101: /* target machine storage layout */
102:
103: /* Define this if most significant bit is lowest numbered
104: in instructions that operate on numbered bit-fields. */
105: /* That is true on RS/6000. */
106: #define BITS_BIG_ENDIAN 1
107:
108: /* Define this if most significant byte of a word is the lowest numbered. */
109: /* That is true on RS/6000. */
110: #define BYTES_BIG_ENDIAN 1
111:
112: /* Define this if most significant word of a multiword number is lowest
113: numbered.
114:
115: For RS/6000 we can decide arbitrarily since there are no machine
116: instructions for them. Might as well be consistent with bits and bytes. */
117: #define WORDS_BIG_ENDIAN 1
118:
119: /* number of bits in an addressible storage unit */
120: #define BITS_PER_UNIT 8
121:
122: /* Width in bits of a "word", which is the contents of a machine register.
123: Note that this is not necessarily the width of data type `int';
124: if using 16-bit ints on a 68000, this would still be 32.
125: But on a machine with 16-bit registers, this would be 16. */
126: #define BITS_PER_WORD 32
127:
128: /* Width of a word, in units (bytes). */
129: #define UNITS_PER_WORD 4
130:
131: /* Type used for wchar_t, as a string used in a declaration. */
132: #define WCHAR_TYPE "short unsigned int"
133:
134: /* Width of wchar_t in bits. */
135: #define WCHAR_TYPE_SIZE 16
136:
137: /* Width in bits of a pointer.
138: See also the macro `Pmode' defined below. */
139: #define POINTER_SIZE 32
140:
141: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
142: #define PARM_BOUNDARY 32
143:
144: /* Boundary (in *bits*) on which stack pointer should be aligned. */
145: #define STACK_BOUNDARY 64
146:
147: /* Allocation boundary (in *bits*) for the code of a function. */
148: #define FUNCTION_BOUNDARY 32
149:
150: /* No data type wants to be aligned rounder than this. */
151: #define BIGGEST_ALIGNMENT 32
152:
153: /* Alignment of field after `int : 0' in a structure. */
154: #define EMPTY_FIELD_BOUNDARY 32
155:
156: /* Every structure's size must be a multiple of this. */
157: #define STRUCTURE_SIZE_BOUNDARY 8
158:
159: /* A bitfield declared as `int' forces `int' alignment for the struct. */
160: #define PCC_BITFIELD_TYPE_MATTERS 1
161:
162: /* Make strings word-aligned so strcpy from constants will be faster. */
163: #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
164: (TREE_CODE (EXP) == STRING_CST \
165: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
166:
167: /* Make arrays of chars word-aligned for the same reasons. */
168: #define DATA_ALIGNMENT(TYPE, ALIGN) \
169: (TREE_CODE (TYPE) == ARRAY_TYPE \
170: && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
171: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
172:
173: /* Define this if move instructions will actually fail to work
174: when given unaligned data. */
175: /* #define STRICT_ALIGNMENT */
176:
177: /* Standard register usage. */
178:
179: /* Number of actual hardware registers.
180: The hardware registers are assigned numbers for the compiler
181: from 0 to just below FIRST_PSEUDO_REGISTER.
182: All registers that the compiler knows about must be given numbers,
183: even those that are not normally considered general registers.
184:
185: RS/6000 has 32 fixed-point registers, 32 floating-point registers,
186: an MQ register, a count register, a link register, and 8 condition
187: register fields, which we view here as separate registers.
188:
189: In addition, the difference between the frame and argument pointers is
190: a function of the number of registers saved, so we need to have a
191: register for AP that will later be eliminated in favor of SP or FP.
192: This is a normal register, but it is fixed. */
193:
194: #define FIRST_PSEUDO_REGISTER 76
195:
196: /* 1 for registers that have pervasive standard uses
197: and are not available for the register allocator.
198:
199: On RS/6000, r1 is used for the stack and r2 is used as the TOC pointer.
200:
201: cr5 is not supposed to be used. */
202:
203: #define FIXED_REGISTERS \
204: {0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
205: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
206: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
207: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
208: 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0}
209:
210: /* 1 for registers not available across function calls.
211: These must include the FIXED_REGISTERS and also any
212: registers that can be used without being saved.
213: The latter must include the registers where values are returned
214: and the register where structure-value addresses are passed.
215: Aside from that, you can include as many other registers as you like. */
216:
217: #define CALL_USED_REGISTERS \
218: {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, \
219: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
220: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \
221: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
222: 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1}
223:
224: /* List the order in which to allocate registers. Each register must be
225: listed once, even those in FIXED_REGISTERS.
226:
227: We allocate in the following order:
228: fp0 (not saved or used for anything)
229: fp13 - fp2 (not saved; incoming fp arg registers)
230: fp1 (not saved; return value)
231: fp31 - fp14 (saved; order given to save least number)
232: cr1, cr6, cr7 (not saved or special)
233: cr0 (not saved, but used for arithmetic operations)
234: cr2, cr3, cr4 (saved)
235: r0 (not saved; cannot be base reg)
236: r9 (not saved; best for TImode)
237: r11, r10, r8-r4 (not saved; highest used first to make less conflict)
238: r3 (not saved; return value register)
239: r31 - r13 (saved; order given to save least number)
240: r12 (not saved; if used for DImode or DFmode would use r13)
241: mq (not saved; best to use it if we can)
242: ctr (not saved; when we have the choice ctr is better)
243: lr (saved)
244: cr5, r1, r2, ap (fixed) */
245:
246: #define REG_ALLOC_ORDER \
247: {32, \
248: 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, \
249: 33, \
250: 63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \
251: 50, 49, 48, 47, 46, \
252: 69, 74, 75, 68, 70, 71, 72, \
253: 0, \
254: 9, 11, 10, 8, 7, 6, 5, 4, \
255: 3, \
256: 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, \
257: 18, 17, 16, 15, 14, 13, 12, \
258: 64, 66, 65, \
259: 73, 1, 2, 67}
260:
261: /* True if register is floating-point. */
262: #define FP_REGNO_P(N) ((N) >= 32 && (N) <= 63)
263:
264: /* True if register is a condition register. */
265: #define CR_REGNO_P(N) ((N) >= 68 && (N) <= 75)
266:
267: /* True if register is an integer register. */
268: #define INT_REGNO_P(N) ((N) <= 31 || (N) == 67)
269:
270: /* Return number of consecutive hard regs needed starting at reg REGNO
271: to hold something of mode MODE.
272: This is ordinarily the length in words of a value of mode MODE
273: but can be less for certain modes in special long registers.
274:
275: On RS/6000, ordinary registers hold 32 bits worth;
276: a single floating point register holds 64 bits worth. */
277:
278: #define HARD_REGNO_NREGS(REGNO, MODE) \
279: (FP_REGNO_P (REGNO) \
280: ? ((GET_MODE_SIZE (MODE) + 2 * UNITS_PER_WORD - 1) / (2 * UNITS_PER_WORD)) \
281: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
282:
283: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
284: On RS/6000, the cpu registers can hold any mode but the float registers
285: can hold only floating modes and CR register can only hold CC modes. We
286: cannot put DImode or TImode anywhere except general register and they
287: must be able to fit within the register set. */
288:
289: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
290: (FP_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_FLOAT \
291: : CR_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_CC \
292: : ! INT_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_INT \
293: : 1)
294:
295: /* Value is 1 if it is a good idea to tie two pseudo registers
296: when one has mode MODE1 and one has mode MODE2.
297: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
298: for any hard reg, then this must be 0 for correct output. */
299: #define MODES_TIEABLE_P(MODE1, MODE2) \
300: (GET_MODE_CLASS (MODE1) == MODE_FLOAT \
301: ? GET_MODE_CLASS (MODE2) == MODE_FLOAT \
302: : GET_MODE_CLASS (MODE2) == MODE_FLOAT \
303: ? GET_MODE_CLASS (MODE1) == MODE_FLOAT \
304: : GET_MODE_CLASS (MODE1) == MODE_CC \
305: ? GET_MODE_CLASS (MODE2) == MODE_CC \
306: : GET_MODE_CLASS (MODE2) == MODE_CC \
307: ? GET_MODE_CLASS (MODE1) == MODE_CC \
308: : 1)
309:
310: /* A C expression returning the cost of moving data from a register of class
311: CLASS1 to one of CLASS2.
312:
313: On the RS/6000, copying between floating-point and fixed-point
314: registers is expensive. */
315:
316: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
317: ((CLASS1) == FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 2 \
318: : (CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS ? 10 \
319: : (CLASS1) != FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 10 \
320: : 2)
321:
322: /* A C expressions returning the cost of moving data of MODE from a register to
323: or from memory.
324:
325: On the RS/6000, bump this up a bit. */
326:
327: #define MEMORY_MOVE_COST(MODE) 4
328:
329: /* Specify the cost of a branch insn; roughly the number of extra insns that
330: should be added to avoid a branch.
331:
332: Set this to 2 on the RS/6000 since that is roughly the average cost of an
333: unscheduled conditional branch. */
334:
335: #define BRANCH_COST 2
336:
337: /* Specify the registers used for certain standard purposes.
338: The values of these macros are register numbers. */
339:
340: /* RS/6000 pc isn't overloaded on a register that the compiler knows about. */
341: /* #define PC_REGNUM */
342:
343: /* Register to use for pushing function arguments. */
344: #define STACK_POINTER_REGNUM 1
345:
346: /* Base register for access to local variables of the function. */
347: #define FRAME_POINTER_REGNUM 31
348:
349: /* Value should be nonzero if functions must have frame pointers.
350: Zero means the frame pointer need not be set up (and parms
351: may be accessed via the stack pointer) in functions that seem suitable.
352: This is computed in `reload', in reload1.c. */
353: #define FRAME_POINTER_REQUIRED 0
354:
355: /* Base register for access to arguments of the function. */
356: #define ARG_POINTER_REGNUM 67
357:
358: /* Place to put static chain when calling a function that requires it. */
359: #define STATIC_CHAIN_REGNUM 11
360:
361: /* Place that structure value return address is placed.
362:
363: On the RS/6000, it is passed as an extra parameter. */
364: #define STRUCT_VALUE 0
365:
366: /* Define the classes of registers for register constraints in the
367: machine description. Also define ranges of constants.
368:
369: One of the classes must always be named ALL_REGS and include all hard regs.
370: If there is more than one class, another class must be named NO_REGS
371: and contain no registers.
372:
373: The name GENERAL_REGS must be the name of a class (or an alias for
374: another name such as ALL_REGS). This is the class of registers
375: that is allowed by "g" or "r" in a register constraint.
376: Also, registers outside this class are allocated only when
377: instructions express preferences for them.
378:
379: The classes must be numbered in nondecreasing order; that is,
380: a larger-numbered class must never be contained completely
381: in a smaller-numbered class.
382:
383: For any two classes, it is very desirable that there be another
384: class that represents their union. */
385:
386: /* The RS/6000 has three types of registers, fixed-point, floating-point,
387: and condition registers, plus three special registers, MQ, CTR, and the
388: link register.
389:
390: However, r0 is special in that it cannot be used as a base register.
391: So make a class for registers valid as base registers.
392:
393: Also, cr0 is the only condition code register that can be used in
394: arithmetic insns, so make a separate class for it. */
395:
396: enum reg_class { NO_REGS, BASE_REGS, GENERAL_REGS, FLOAT_REGS,
397: NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS, LINK_OR_CTR_REGS,
398: SPECIAL_REGS, CR0_REGS, CR_REGS, ALL_REGS, LIM_REG_CLASSES };
399:
400: #define N_REG_CLASSES (int) LIM_REG_CLASSES
401:
402: /* Give names of register classes as strings for dump file. */
403:
404: #define REG_CLASS_NAMES \
405: { "NO_REGS", "BASE_REGS", "GENERAL_REGS", "FLOAT_REGS", \
406: "NON_SPECIAL_REGS", "MQ_REGS", "LINK_REGS", "CTR_REGS", \
407: "LINK_OR_CTR_REGS", "SPECIAL_REGS", "CR0_REGS", "CR_REGS", "ALL_REGS" }
408:
409: /* Define which registers fit in which classes.
410: This is an initializer for a vector of HARD_REG_SET
411: of length N_REG_CLASSES. */
412:
413: #define REG_CLASS_CONTENTS \
414: { {0, 0, 0}, {0xfffffffe, 0, 8}, {~0, 0, 8}, \
415: {0, ~0, 0}, {~0, ~0, 0}, {0, 0, 1}, {0, 0, 2}, \
416: {0, 0, 4}, {0, 0, 6}, {0, 0, 7}, {0, 0, 16}, \
417: {0, 0, 0xff0}, {~0, ~0, 0xfff5} }
418:
419: /* The same information, inverted:
420: Return the class number of the smallest class containing
421: reg number REGNO. This could be a conditional expression
422: or could index an array. */
423:
424: #define REGNO_REG_CLASS(REGNO) \
425: ((REGNO) == 0 ? GENERAL_REGS \
426: : (REGNO) < 32 ? BASE_REGS \
427: : FP_REGNO_P (REGNO) ? FLOAT_REGS \
428: : (REGNO) == 68 ? CR0_REGS \
429: : CR_REGNO_P (REGNO) ? CR_REGS \
430: : (REGNO) == 64 ? MQ_REGS \
431: : (REGNO) == 65 ? LINK_REGS \
432: : (REGNO) == 66 ? CTR_REGS \
433: : (REGNO) == 67 ? BASE_REGS \
434: : NO_REGS)
435:
436: /* The class value for index registers, and the one for base regs. */
437: #define INDEX_REG_CLASS GENERAL_REGS
438: #define BASE_REG_CLASS BASE_REGS
439:
440: /* Get reg_class from a letter such as appears in the machine description. */
441:
442: #define REG_CLASS_FROM_LETTER(C) \
443: ((C) == 'f' ? FLOAT_REGS \
444: : (C) == 'b' ? BASE_REGS \
445: : (C) == 'h' ? SPECIAL_REGS \
446: : (C) == 'q' ? MQ_REGS \
447: : (C) == 'c' ? CTR_REGS \
448: : (C) == 'l' ? LINK_REGS \
449: : (C) == 'x' ? CR0_REGS \
450: : (C) == 'y' ? CR_REGS \
451: : NO_REGS)
452:
453: /* The letters I, J, K, L, M, N, and P in a register constraint string
454: can be used to stand for particular ranges of immediate operands.
455: This macro defines what the ranges are.
456: C is the letter, and VALUE is a constant value.
457: Return 1 if VALUE is in the range specified by C.
458:
459: `I' is signed 16-bit constants
460: `J' is a constant with only the high-order 16 bits non-zero
461: `K' is a constant with only the low-order 16 bits non-zero
462: `L' is a constant that can be placed into a mask operand
463: `M' is a constant that is greater than 31
464: `N' is a constant that is an exact power of two
465: `O' is the constant zero
466: `P' is a constant whose negation is a signed 16-bit constant */
467:
468: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
469: ( (C) == 'I' ? (unsigned) ((VALUE) + 0x8000) < 0x10000 \
470: : (C) == 'J' ? ((VALUE) & 0xffff) == 0 \
471: : (C) == 'K' ? ((VALUE) & 0xffff0000) == 0 \
472: : (C) == 'L' ? mask_constant (VALUE) \
473: : (C) == 'M' ? (VALUE) > 31 \
474: : (C) == 'N' ? exact_log2 (VALUE) >= 0 \
475: : (C) == 'O' ? (VALUE) == 0 \
476: : (C) == 'P' ? (unsigned) ((- (VALUE)) + 0x8000) < 0x1000 \
477: : 0)
478:
479: /* Similar, but for floating constants, and defining letters G and H.
480: Here VALUE is the CONST_DOUBLE rtx itself.
481:
482: We flag for special constants when we can copy the constant into
483: a general register in two insns for DF and one insn for SF. */
484:
485: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
486: ((C) == 'G' ? easy_fp_constant (VALUE, GET_MODE (VALUE)) : 0)
487:
488: /* Optional extra constraints for this machine.
489:
490: For the RS/6000, `Q' means that this is a memory operand that is just
491: an offset from a register. */
492:
493: #define EXTRA_CONSTRAINT(OP, C) \
494: ((C) == 'Q' ? indirect_operand (OP, VOIDmode) : 0)
495:
496: /* Given an rtx X being reloaded into a reg required to be
497: in class CLASS, return the class of reg to actually use.
498: In general this is just CLASS; but on some machines
499: in some cases it is preferable to use a more restrictive class.
500:
501: On the RS/6000, we have to return NO_REGS when we want to reload a
502: floating-point CONST_DOUBLE to force it to be copied to memory. */
503:
504: #define PREFERRED_RELOAD_CLASS(X,CLASS) \
505: ((GET_CODE (X) == CONST_DOUBLE \
506: && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
507: ? NO_REGS : (CLASS))
508:
509: /* Return the register class of a scratch register needed to copy IN into
510: or out of a register in CLASS in MODE. If it can be done directly,
511: NO_REGS is returned. */
512:
513: #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
514: secondary_reload_class (CLASS, MODE, IN)
515:
516: /* Return the maximum number of consecutive registers
517: needed to represent mode MODE in a register of class CLASS.
518:
519: On RS/6000, this is the size of MODE in words,
520: except in the FP regs, where a single reg is enough for two words. */
521: #define CLASS_MAX_NREGS(CLASS, MODE) \
522: ((CLASS) == FLOAT_REGS \
523: ? ((GET_MODE_SIZE (MODE) + 2 * UNITS_PER_WORD - 1) / (2 * UNITS_PER_WORD)) \
524: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
525:
526: /* Stack layout; function entry, exit and calling. */
527:
528: /* Define this if pushing a word on the stack
529: makes the stack pointer a smaller address. */
530: #define STACK_GROWS_DOWNWARD
531:
532: /* Define this if the nominal address of the stack frame
533: is at the high-address end of the local variables;
534: that is, each additional local variable allocated
535: goes at a more negative offset in the frame.
536:
537: On the RS/6000, we grow upwards, from the area after the outgoing
538: arguments. */
539: /* #define FRAME_GROWS_DOWNWARD */
540:
541: /* Offset within stack frame to start allocating local variables at.
542: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
543: first local allocated. Otherwise, it is the offset to the BEGINNING
544: of the first local allocated.
545:
546: On the RS/6000, the frame pointer is the same as the stack pointer,
547: except for dynamic allocations. So we start after the fixed area and
548: outgoing parameter area. */
549:
550: #define STARTING_FRAME_OFFSET (current_function_outgoing_args_size + 24)
551:
552: /* If we generate an insn to push BYTES bytes,
553: this says how many the stack pointer really advances by.
554: On RS/6000, don't define this because there are no push insns. */
555: /* #define PUSH_ROUNDING(BYTES) */
556:
557: /* Offset of first parameter from the argument pointer register value.
558: On the RS/6000, we define the argument pointer to the start of the fixed
559: area. */
560: #define FIRST_PARM_OFFSET(FNDECL) 24
561:
562: /* Define this if stack space is still allocated for a parameter passed
563: in a register. The value is the number of bytes allocated to this
564: area. */
565: #define REG_PARM_STACK_SPACE(FNDECL) 32
566:
567: /* Define this if the above stack space is to be considered part of the
568: space allocated by the caller. */
569: #define OUTGOING_REG_PARM_STACK_SPACE
570:
571: /* This is the difference between the logical top of stack and the actual sp.
572:
573: For the RS/6000, sp points past the fixed area. */
574: #define STACK_POINTER_OFFSET 24
575:
576: /* Define this if the maximum size of all the outgoing args is to be
577: accumulated and pushed during the prologue. The amount can be
578: found in the variable current_function_outgoing_args_size. */
579: #define ACCUMULATE_OUTGOING_ARGS
580:
581: /* Value is the number of bytes of arguments automatically
582: popped when returning from a subroutine call.
583: FUNTYPE is the data type of the function (as a tree),
584: or for a library call it is an identifier node for the subroutine name.
585: SIZE is the number of bytes of arguments passed on the stack. */
586:
587: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
588:
589: /* Define how to find the value returned by a function.
590: VALTYPE is the data type of the value (as a tree).
591: If the precise function being called is known, FUNC is its FUNCTION_DECL;
592: otherwise, FUNC is 0.
593:
594: On RS/6000 an integer value is in r3 and a floating-point value is in
595: fp1. */
596:
597: #define FUNCTION_VALUE(VALTYPE, FUNC) \
598: gen_rtx (REG, TYPE_MODE (VALTYPE), \
599: TREE_CODE (VALTYPE) == REAL_TYPE ? 33 : 3)
600:
601: /* Define how to find the value returned by a library function
602: assuming the value has mode MODE. */
603:
604: #define LIBCALL_VALUE(MODE) \
605: gen_rtx (REG, MODE, GET_MODE_CLASS (MODE) == MODE_FLOAT ? 33 : 3)
606:
607: /* The definition of this macro implies that there are cases where
608: a scalar value cannot be returned in registers.
609:
610: For the RS/6000, any structure or union type is returned in memory. */
611:
612: #define RETURN_IN_MEMORY(TYPE) \
613: (TREE_CODE (TYPE) == RECORD_TYPE || TREE_CODE (TYPE) == UNION_TYPE)
614:
615: /* 1 if N is a possible register number for a function value
616: as seen by the caller.
617:
618: On RS/6000, this is r3 and fp1. */
619:
620: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 3 || ((N) == 33))
621:
622: /* 1 if N is a possible register number for function argument passing.
623: On RS/6000, these are r3-r10 and fp1-fp13. */
624:
625: #define FUNCTION_ARG_REGNO_P(N) \
626: (((N) <= 10 && (N) >= 3) || ((N) >= 33 && (N) <= 45))
627:
628: /* Define a data type for recording info about an argument list
629: during the scan of that argument list. This data type should
630: hold all necessary information about the function itself
631: and about the args processed so far, enough to enable macros
632: such as FUNCTION_ARG to determine where the next arg should go.
633:
634: On the RS/6000, this is a structure. The first element is the number of
635: total argument words, the second is used to store the next
636: floating-point register number, and the third says how many more args we
637: have prototype types for. */
638:
639: struct rs6000_args {int words, fregno, nargs_prototype; };
640: #define CUMULATIVE_ARGS struct rs6000_args
641:
642: /* Define intermediate macro to compute the size (in registers) of an argument
643: for the RS/6000. */
644:
645: #define RS6000_ARG_SIZE(MODE, TYPE, NAMED) \
646: (! (NAMED) ? 0 \
647: : (MODE) != BLKmode \
648: ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \
649: : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
650:
651: /* Initialize a variable CUM of type CUMULATIVE_ARGS
652: for a call to a function whose data type is FNTYPE.
653: For a library call, FNTYPE is 0. */
654:
655: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
656: (CUM).words = 0, \
657: (CUM).fregno = 33, \
658: (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
659: ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
660: + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
661: || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \
662: : 0)
663:
664: /* Similar, but when scanning the definition of a procedure. We always
665: set NARGS_PROTOTYPE large so we never return an EXPR_LIST. */
666:
667: #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
668: (CUM).words = 0, \
669: (CUM).fregno = 33, \
670: (CUM).nargs_prototype = 1000
671:
672: /* Update the data in CUM to advance over an argument
673: of mode MODE and data type TYPE.
674: (TYPE is null for libcalls where that information may not be available.) */
675:
676: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
677: { (CUM).nargs_prototype--; \
678: if (NAMED) \
679: { \
680: (CUM).words += RS6000_ARG_SIZE (MODE, TYPE, NAMED); \
681: if (GET_MODE_CLASS (MODE) == MODE_FLOAT) \
682: (CUM).fregno++; \
683: } \
684: }
685:
686: /* Non-zero if we can use a floating-point register to pass this arg. */
687: #define USE_FP_FOR_ARG_P(CUM,MODE,TYPE) \
688: (GET_MODE_CLASS (MODE) == MODE_FLOAT && (CUM).fregno < 46)
689:
690: /* Determine where to put an argument to a function.
691: Value is zero to push the argument on the stack,
692: or a hard register in which to store the argument.
693:
694: MODE is the argument's machine mode.
695: TYPE is the data type of the argument (as a tree).
696: This is null for libcalls where that information may
697: not be available.
698: CUM is a variable of type CUMULATIVE_ARGS which gives info about
699: the preceding args and about the function being called.
700: NAMED is nonzero if this argument is a named parameter
701: (otherwise it is an extra parameter matching an ellipsis).
702:
703: On RS/6000 the first eight words of non-FP are normally in registers
704: and the rest are pushed. The first 13 FP args are in registers.
705:
706: If this is floating-point and no prototype is specified, we use
707: both an FP and integer register (or possibly FP reg and stack). */
708:
709: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
710: (! (NAMED) ? 0 \
711: : USE_FP_FOR_ARG_P (CUM, MODE, TYPE) \
712: ? ((CUM).nargs_prototype > 0 \
713: ? gen_rtx (REG, MODE, (CUM).fregno) \
714: : ((CUM).words < 8 \
715: ? gen_rtx (EXPR_LIST, VOIDmode, \
716: gen_rtx (REG, (MODE), 3 + (CUM).words), \
717: gen_rtx (REG, (MODE), (CUM).fregno)) \
718: : gen_rtx (EXPR_LIST, VOIDmode, 0, \
719: gen_rtx (REG, (MODE), (CUM).fregno)))) \
720: : (CUM).words < 8 ? gen_rtx(REG, (MODE), 3 + (CUM).words) : 0)
721:
722: /* For an arg passed partly in registers and partly in memory,
723: this is the number of registers used.
724: For args passed entirely in registers or entirely in memory, zero. */
725:
726: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
727: (! (NAMED) ? 0 \
728: : USE_FP_FOR_ARG_P (CUM, MODE, TYPE) && (CUM).nargs_prototype >= 0 ? 0 \
729: : (((CUM).words < 8 \
730: && 8 < ((CUM).words + RS6000_ARG_SIZE (MODE, TYPE, NAMED))) \
731: ? 8 - (CUM).words : 0))
732:
733: /* Perform any needed actions needed for a function that is receiving a
734: variable number of arguments.
735:
736: CUM is as above.
737:
738: MODE and TYPE are the mode and type of the current parameter.
739:
740: PRETEND_SIZE is a variable that should be set to the amount of stack
741: that must be pushed by the prolog to pretend that our caller pushed
742: it.
743:
744: Normally, this macro will push all remaining incoming registers on the
745: stack and set PRETEND_SIZE to the length of the registers pushed. */
746:
747: #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
748: { if ((CUM).words < 8) \
749: { \
750: int first_reg_offset = (CUM).words; \
751: \
752: if (MUST_PASS_IN_STACK (MODE, TYPE)) \
753: first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (TYPE), TYPE, 1); \
754: \
755: if (first_reg_offset > 8) \
756: first_reg_offset = 8; \
757: \
758: if (! (NO_RTL) && first_reg_offset != 8) \
759: move_block_from_reg \
760: (3 + first_reg_offset, \
761: gen_rtx (MEM, BLKmode, \
762: plus_constant (virtual_incoming_args_rtx, \
763: first_reg_offset * 4)), \
764: 8 - first_reg_offset); \
765: PRETEND_SIZE = (8 - first_reg_offset) * UNITS_PER_WORD; \
766: } \
767: }
768:
769: /* This macro generates the assembly code for function entry.
770: FILE is a stdio stream to output the code to.
771: SIZE is an int: how many units of temporary storage to allocate.
772: Refer to the array `regs_ever_live' to determine which registers
773: to save; `regs_ever_live[I]' is nonzero if register number I
774: is ever used in the function. This macro is responsible for
775: knowing which registers should not be saved even if used. */
776:
777: #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE)
778:
779: /* Output assembler code to FILE to increment profiler label # LABELNO
780: for profiling a function entry.
781:
782: I have no real idea what r3 should point to here. */
783:
784: #define FUNCTION_PROFILER(FILE, LABELNO) \
785: fprintf(FILE, "\tbl mcount\n");
786:
787: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
788: the stack pointer does not matter. No definition is equivalent to
789: always zero.
790:
791: On the RS/6000, this is non-zero because we can restore the stack from
792: its backpointer, which we maintain. */
793: #define EXIT_IGNORE_STACK 1
794:
795: /* This macro generates the assembly code for function exit,
796: on machines that need it. If FUNCTION_EPILOGUE is not defined
797: then individual return instructions are generated for each
798: return statement. Args are same as for FUNCTION_PROLOGUE.
799:
800: The function epilogue should not depend on the current stack pointer!
801: It should use the frame pointer only. This is mandatory because
802: of alloca; we also take advantage of it to omit stack adjustments
803: before returning. */
804:
805: #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE)
806:
807: /* Output assembler code for a block containing the constant parts
808: of a trampoline, leaving space for the variable parts.
809:
810: The trampoline should set the static chain pointer to value placed
811: into the trampoline and should branch to the specified routine.
812:
813: On the RS/6000, this is not code at all, but merely a data area,
814: since that is the way all functions are called. The first word is
815: the address of the function, the second word is the TOC pointer (r2),
816: and the third word is the static chain value. */
817:
818: #define TRAMPOLINE_TEMPLATE(FILE) { fprintf (FILE, "\t.long 0, 0, 0\n"); }
819:
820: /* Length in units of the trampoline for entering a nested function. */
821:
822: #define TRAMPOLINE_SIZE 12
823:
824: /* Emit RTL insns to initialize the variable parts of a trampoline.
825: FNADDR is an RTX for the address of the function's pure code.
826: CXT is an RTX for the static chain value for the function. */
827:
828: #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
829: { \
830: emit_move_insn (gen_rtx (MEM, SImode, memory_address (SImode, ADDR)), \
831: force_reg (SImode, FNADDR)); \
832: emit_move_insn (gen_rtx (MEM, SImode, \
833: memory_address (SImode, plus_constant (ADDR, 4))), \
834: gen_rtx (REG, SImode, 2)); \
835: emit_move_insn (gen_rtx (MEM, SImode, \
836: memory_address (SImode, plus_constant (ADDR, 8))), \
837: force_reg (SImode, CXT)); \
838: }
839:
840: /* Definitions for register eliminations.
841:
842: We have two registers that can be eliminated on the RS/6000. First, the
843: frame pointer register can often be eliminated in favor of the stack
844: pointer register. Secondly, the argument pointer register can always be
845: eliminated; it is replaced with either the stack or frame pointer. */
846:
847: /* This is an array of structures. Each structure initializes one pair
848: of eliminable registers. The "from" register number is given first,
849: followed by "to". Eliminations of the same "from" register are listed
850: in order of preference. */
851: #define ELIMINABLE_REGS \
852: {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
853: { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
854: { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM} }
855:
856: /* Given FROM and TO register numbers, say whether this elimination is allowed.
857: Frame pointer elimination is automatically handled.
858:
859: For the RS/6000, if frame pointer elimination is being done, we would like
860: to convert ap into fp, not sp. */
861:
862: #define CAN_ELIMINATE(FROM, TO) \
863: ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
864: ? ! frame_pointer_needed \
865: : 1)
866:
867: /* Define the offset between two registers, one to be eliminated, and the other
868: its replacement, at the start of a routine. */
869: #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
870: { \
871: int total_stack_size = (rs6000_sa_size () + get_frame_size () \
872: + current_function_outgoing_args_size); \
873: \
874: total_stack_size = (total_stack_size + 7) & ~7; \
875: \
876: if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
877: { \
878: if (rs6000_pushes_stack ()) \
879: (OFFSET) = 0; \
880: else \
881: (OFFSET) = - total_stack_size; \
882: } \
883: else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
884: (OFFSET) = total_stack_size; \
885: else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
886: { \
887: if (rs6000_pushes_stack ()) \
888: (OFFSET) = total_stack_size; \
889: else \
890: (OFFSET) = 0; \
891: } \
892: else \
893: abort (); \
894: }
895:
896: /* Addressing modes, and classification of registers for them. */
897:
898: /* #define HAVE_POST_INCREMENT */
899: /* #define HAVE_POST_DECREMENT */
900:
901: #define HAVE_PRE_DECREMENT
902: #define HAVE_PRE_INCREMENT
903:
904: /* Macros to check register numbers against specific register classes. */
905:
906: /* These assume that REGNO is a hard or pseudo reg number.
907: They give nonzero only if REGNO is a hard reg of the suitable class
908: or a pseudo reg currently allocated to a suitable hard reg.
909: Since they use reg_renumber, they are safe only once reg_renumber
910: has been allocated, which happens in local-alloc.c. */
911:
912: #define REGNO_OK_FOR_INDEX_P(REGNO) \
913: ((REGNO) < FIRST_PSEUDO_REGISTER \
914: ? (REGNO) <= 31 || (REGNO) == 67 \
915: : (reg_renumber[REGNO] >= 0 \
916: && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67)))
917:
918: #define REGNO_OK_FOR_BASE_P(REGNO) \
919: ((REGNO) < FIRST_PSEUDO_REGISTER \
920: ? ((REGNO) > 0 && (REGNO) <= 31) || (REGNO) == 67 \
921: : (reg_renumber[REGNO] > 0 \
922: && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67)))
923:
924: /* Maximum number of registers that can appear in a valid memory address. */
925:
926: #define MAX_REGS_PER_ADDRESS 2
927:
928: /* Recognize any constant value that is a valid address. */
929:
930: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
931:
932: /* Nonzero if the constant value X is a legitimate general operand.
933: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
934:
935: On the RS/6000, all integer constants are acceptable, most won't be valid
936: for particular insns, though. Only easy FP constants are
937: acceptable. */
938:
939: #define LEGITIMATE_CONSTANT_P(X) \
940: (GET_CODE (X) != CONST_DOUBLE || GET_MODE (X) == VOIDmode \
941: || easy_fp_constant (X, GET_MODE (X)))
942:
943: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
944: and check its validity for a certain class.
945: We have two alternate definitions for each of them.
946: The usual definition accepts all pseudo regs; the other rejects
947: them unless they have been allocated suitable hard regs.
948: The symbol REG_OK_STRICT causes the latter definition to be used.
949:
950: Most source files want to accept pseudo regs in the hope that
951: they will get allocated to the class that the insn wants them to be in.
952: Source files for reload pass need to be strict.
953: After reload, it makes no difference, since pseudo regs have
954: been eliminated by then. */
955:
956: #ifndef REG_OK_STRICT
957:
958: /* Nonzero if X is a hard reg that can be used as an index
959: or if it is a pseudo reg. */
960: #define REG_OK_FOR_INDEX_P(X) \
961: (REGNO (X) <= 31 || REGNO (X) == 67 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
962:
963: /* Nonzero if X is a hard reg that can be used as a base reg
964: or if it is a pseudo reg. */
965: #define REG_OK_FOR_BASE_P(X) \
966: (REGNO (X) > 0 && REG_OK_FOR_INDEX_P (X))
967:
968: #else
969:
970: /* Nonzero if X is a hard reg that can be used as an index. */
971: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
972: /* Nonzero if X is a hard reg that can be used as a base reg. */
973: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
974:
975: #endif
976:
977: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
978: that is a valid memory address for an instruction.
979: The MODE argument is the machine mode for the MEM expression
980: that wants to use this address.
981:
982: On the RS/6000, there are four valid address: a SYMBOL_REF that
983: refers to a constant pool entry of an address (or the sum of it
984: plus a constant), a short (16-bit signed) constant plus a register,
985: the sum of two registers, or a register indirect, possibly with an
986: auto-increment. For DFmode and DImode with an constant plus register,
987: we must ensure that both words are addressable. */
988:
989: #define LEGITIMATE_CONSTANT_POOL_BASE_P(X) \
990: (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X) \
991: && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (X)))
992:
993: #define LEGITIMATE_CONSTANT_POOL_ADDRESS_P(X) \
994: (LEGITIMATE_CONSTANT_POOL_BASE_P (X) \
995: || (GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \
996: && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \
997: && LEGITIMATE_CONSTANT_POOL_BASE_P (XEXP (XEXP (X, 0), 0))))
998:
999: #define LEGITIMATE_ADDRESS_INTEGER_P(X,OFFSET) \
1000: (GET_CODE (X) == CONST_INT \
1001: && (unsigned) (INTVAL (X) + (OFFSET) + 0x8000) < 0x10000)
1002:
1003: #define LEGITIMATE_OFFSET_ADDRESS_P(MODE,X) \
1004: (GET_CODE (X) == PLUS \
1005: && GET_CODE (XEXP (X, 0)) == REG \
1006: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1007: && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 0) \
1008: && (((MODE) != DFmode && (MODE) != DImode) \
1009: || LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 4)))
1010:
1011: #define LEGITIMATE_INDEXED_ADDRESS_P(X) \
1012: (GET_CODE (X) == PLUS \
1013: && GET_CODE (XEXP (X, 0)) == REG \
1014: && GET_CODE (XEXP (X, 1)) == REG \
1015: && ((REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1016: && REG_OK_FOR_INDEX_P (XEXP (X, 1))) \
1017: || (REG_OK_FOR_BASE_P (XEXP (X, 1)) \
1018: && REG_OK_FOR_INDEX_P (XEXP (X, 0)))))
1019:
1020: #define LEGITIMATE_INDIRECT_ADDRESS_P(X) \
1021: (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X))
1022:
1023: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1024: { if (LEGITIMATE_INDIRECT_ADDRESS_P (X)) \
1025: goto ADDR; \
1026: if (GET_CODE (X) == PRE_INC \
1027: && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (X, 0))) \
1028: goto ADDR; \
1029: if (GET_CODE (X) == PRE_DEC \
1030: && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (X, 0))) \
1031: goto ADDR; \
1032: if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (X)) \
1033: goto ADDR; \
1034: if (LEGITIMATE_OFFSET_ADDRESS_P (MODE, X)) \
1035: goto ADDR; \
1036: if ((MODE) != DImode && (MODE) != TImode \
1037: && LEGITIMATE_INDEXED_ADDRESS_P (X)) \
1038: goto ADDR; \
1039: }
1040:
1041: /* Try machine-dependent ways of modifying an illegitimate address
1042: to be legitimate. If we find one, return the new, valid address.
1043: This macro is used in only one place: `memory_address' in explow.c.
1044:
1045: OLDX is the address as it was before break_out_memory_refs was called.
1046: In some cases it is useful to look at this to decide what needs to be done.
1047:
1048: MODE and WIN are passed so that this macro can use
1049: GO_IF_LEGITIMATE_ADDRESS.
1050:
1051: It is always safe for this macro to do nothing. It exists to recognize
1052: opportunities to optimize the output.
1053:
1054: On RS/6000, first check for the sum of a register with a constant
1055: integer that is out of range. If so, generate code to add the
1056: constant with the low-order 16 bits masked to the register and force
1057: this result into another register (this can be done with `cau').
1058: Then generate an address of REG+(CONST&0xffff), allowing for the
1059: possibility of bit 16 being a one.
1060:
1061: Then check for the sum of a register and something not constant, try to
1062: load the other things into a register and return the sum. */
1063:
1064: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1065: { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1066: && GET_CODE (XEXP (X, 1)) == CONST_INT \
1067: && (unsigned) (INTVAL (XEXP (X, 1)) + 0x8000) >= 0x10000) \
1068: { int high_int, low_int; \
1069: high_int = INTVAL (XEXP (X, 1)) >> 16; \
1070: low_int = INTVAL (XEXP (X, 1)) & 0xffff; \
1071: if (low_int & 0x8000) \
1072: high_int += 1, low_int |= 0xffff0000; \
1073: (X) = gen_rtx (PLUS, SImode, \
1074: force_operand \
1075: (gen_rtx (PLUS, SImode, XEXP (X, 0), \
1076: gen_rtx (CONST_INT, VOIDmode, \
1077: high_int << 16)), 0),\
1078: gen_rtx (CONST_INT, VOIDmode, low_int)); \
1079: } \
1080: else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1081: && GET_CODE (XEXP (X, 1)) != CONST_INT) \
1082: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
1083: force_operand (XEXP (X, 1), 0)); \
1084: }
1085:
1086: /* Go to LABEL if ADDR (a legitimate address expression)
1087: has an effect that depends on the machine mode it is used for.
1088:
1089: On the RS/6000 this is true if the address is valid with a zero offset
1090: but not with an offset of four (this means it cannot be used as an
1091: address for DImode or DFmode) or is a pre-increment or decrement. Since
1092: we know it is valid, we just check for an address that is not valid with
1093: an offset of four. */
1094:
1095: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1096: { if (GET_CODE (ADDR) == PLUS \
1097: && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 0) \
1098: && ! LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 4)) \
1099: goto LABEL; \
1100: if (GET_CODE (ADDR) == PRE_INC) \
1101: goto LABEL; \
1102: if (GET_CODE (ADDR) == PRE_DEC) \
1103: goto LABEL; \
1104: }
1105:
1106: /* Define this if some processing needs to be done immediately before
1107: emitting code for an insn. */
1108:
1109: /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */
1110:
1111: /* Specify the machine mode that this machine uses
1112: for the index in the tablejump instruction. */
1113: #define CASE_VECTOR_MODE SImode
1114:
1115: /* Define this if the tablejump instruction expects the table
1116: to contain offsets from the address of the table.
1117: Do not define this if the table should contain absolute addresses. */
1118: #define CASE_VECTOR_PC_RELATIVE
1119:
1120: /* Specify the tree operation to be used to convert reals to integers. */
1121: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1122:
1123: /* This is the kind of divide that is easiest to do in the general case. */
1124: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1125:
1126: /* Define this as 1 if `char' should by default be signed; else as 0. */
1127: #define DEFAULT_SIGNED_CHAR 0
1128:
1129: /* This flag, if defined, says the same insns that convert to a signed fixnum
1130: also convert validly to an unsigned one. */
1131:
1132: /* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */
1133:
1134: /* Max number of bytes we can move from memory to memory
1135: in one reasonably fast instruction. */
1136: #define MOVE_MAX 16
1137:
1138: /* Nonzero if access to memory by bytes is no faster than for words.
1139: Also non-zero if doing byte operations (specifically shifts) in registers
1140: is undesirable. */
1141: #define SLOW_BYTE_ACCESS 1
1142:
1143: /* Define if normal loads of shorter-than-word items from memory clears
1144: the rest of the bigs in the register. */
1145: #define BYTE_LOADS_ZERO_EXTEND
1146:
1147: /* We can't support any debugging info on the RS/6000 since it has its
1148: own format. */
1149: /* #define DBX_DEBUGGING_INFO */
1150: /* #define SDB_DEBUGGING_INFO */
1151:
1152: /* We don't have GAS for the RS/6000 yet, so don't write out special
1153: .stabs in cc1plus. */
1154:
1155: #define FASCIST_ASSEMBLER
1156:
1157: /* Do not break .stabs pseudos into continuations. */
1158: #define DBX_CONTIN_LENGTH 0
1159:
1160: /* Don't try to use the `x' type-cross-reference character in DBX data.
1161: Also has the consequence of putting each struct, union or enum
1162: into a separate .stabs, containing only cross-refs to the others. */
1163: #define DBX_NO_XREFS
1164:
1165: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1166: is done just by pretending it is already truncated. */
1167: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1168:
1169: /* Specify the machine mode that pointers have.
1170: After generation of rtl, the compiler makes no further distinction
1171: between pointers and any other objects of this machine mode. */
1172: #define Pmode SImode
1173:
1174: /* Mode of a function address in a call instruction (for indexing purposes).
1175:
1176: Doesn't matter on RS/6000. */
1177: #define FUNCTION_MODE SImode
1178:
1179: /* Define this if addresses of constant functions
1180: shouldn't be put through pseudo regs where they can be cse'd.
1181: Desirable on machines where ordinary constants are expensive
1182: but a CALL with constant address is cheap. */
1183: #define NO_FUNCTION_CSE
1184:
1185: /* Define this if shift instructions ignore all but the low-order
1186: few bits. */
1187: #define SHIFT_COUNT_TRUNCATED
1188:
1189: /* Use atexit for static constructors/destructors, instead of defining
1190: our own exit function. */
1191: #define HAVE_ATEXIT
1192:
1193: /* Compute the cost of computing a constant rtl expression RTX
1194: whose rtx-code is CODE. The body of this macro is a portion
1195: of a switch statement. If the code is computed here,
1196: return it with a return statement. Otherwise, break from the switch.
1197:
1198: On the RS/6000, if it is legal in the insn, it is free. So this
1199: always returns 0. */
1200:
1201: #define CONST_COSTS(RTX,CODE) \
1202: case CONST_INT: \
1203: case CONST: \
1204: case LABEL_REF: \
1205: case SYMBOL_REF: \
1206: case CONST_DOUBLE: \
1207: return 0;
1208:
1209: /* Provide the costs of a rtl expression. This is in the body of a
1210: switch on CODE. */
1211:
1212: #define RTX_COSTS(X,CODE) \
1213: case MULT: \
1214: return (GET_CODE (XEXP (X, 1)) != CONST_INT \
1215: ? COSTS_N_INSNS (5) \
1216: : INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \
1217: ? COSTS_N_INSNS (3) : COSTS_N_INSNS (4)); \
1218: case DIV: \
1219: case MOD: \
1220: if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1221: && exact_log2 (INTVAL (XEXP (X, 1))) >= 0) \
1222: return COSTS_N_INSNS (2); \
1223: /* otherwise fall through to normal divide. */ \
1224: case UDIV: \
1225: case UMOD: \
1226: return COSTS_N_INSNS (19); \
1227: case MEM: \
1228: /* MEM should be slightly more expensive than (plus (reg) (const)) */ \
1229: return 5;
1230:
1231: /* Compute the cost of an address. This is meant to approximate the size
1232: and/or execution delay of an insn using that address. If the cost is
1233: approximated by the RTL complexity, including CONST_COSTS above, as
1234: is usually the case for CISC machines, this macro should not be defined.
1235: For aggressively RISCy machines, only one insn format is allowed, so
1236: this macro should be a constant. The value of this macro only matters
1237: for valid addresses.
1238:
1239: For the RS/6000, everything is cost 0. */
1240:
1241: #define ADDRESS_COST(RTX) 0
1242:
1243: /* Adjust the length of an INSN. LENGTH is the currently-computed length and
1244: should be adjusted to reflect any required changes. This macro is used when
1245: there is some systematic length adjustment required that would be difficult
1246: to express in the length attribute. */
1247:
1248: /* #define ADJUST_INSN_LENGTH(X,LENGTH) */
1249:
1250: /* Add any extra modes needed to represent the condition code.
1251:
1252: For the RS/6000, we need separate modes when unsigned (logical) comparisons
1253: are being done and we need a separate mode for floating-point. */
1254:
1255: #define EXTRA_CC_MODES CCUNSmode, CCFPmode
1256:
1257: /* Define the names for the modes specified above. */
1258: #define EXTRA_CC_NAMES "CCUNS", "CCFP"
1259:
1260: /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1261: return the mode to be used for the comparison. For floating-point, CCFPmode
1262: should be used. CC_NOOVmode should be used when the first operand is a
1263: PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1264: needed. */
1265: #define SELECT_CC_MODE(OP,X) \
1266: (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode \
1267: : ((OP) == GTU || (OP) == LTU || (OP) == GEU || (OP) == LEU \
1268: ? CCUNSmode : CCmode))
1269:
1270: /* Define the information needed to generate branch and scc insns. This is
1271: stored from the compare operation. Note that we can't use "rtx" here
1272: since it hasn't been defined! */
1273:
1274: extern struct rtx_def *rs6000_compare_op0, *rs6000_compare_op1;
1275: extern int rs6000_compare_fp_p;
1276:
1277: /* Set to non-zero by "fix" operation to indicate that itrunc and
1278: uitrunc must be defined. */
1279:
1280: extern int rs6000_trunc_used;
1281:
1282: /* Control the assembler format that we output. */
1283:
1284: /* Output at beginning of assembler file.
1285:
1286: On the RS/6000, we want to go into the TOC section so at least one
1287: .toc will be emitted.
1288:
1289: Also initialize the section names for the RS/6000 at this point. */
1290:
1291: #define ASM_FILE_START(FILE) \
1292: { \
1293: rs6000_gen_section_name (&rs6000_bss_section_name, \
1294: main_input_filename, ".bss_"); \
1295: rs6000_gen_section_name (&rs6000_private_data_section_name, \
1296: main_input_filename, ".rw_"); \
1297: rs6000_gen_section_name (&rs6000_read_only_section_name, \
1298: main_input_filename, ".ro_"); \
1299: \
1300: toc_section (); \
1301: bss_section (); \
1302: }
1303:
1304: /* Output at end of assembler file.
1305:
1306: On the RS/6000, referencing data should automatically pull in text. */
1307:
1308: #define ASM_FILE_END(FILE) \
1309: { \
1310: text_section (); \
1311: fprintf (FILE, "_section_.text:\n"); \
1312: data_section (); \
1313: fprintf (FILE, "\t.long _section_.text\n"); \
1314: }
1315:
1316: /* Names of bss and data sections. These should be unique names for each
1317: compilation unit. */
1318:
1319: extern char *rs6000_bss_section_name;
1320: extern char *rs6000_private_data_section_name;
1321: extern char *rs6000_read_only_section_name;
1322:
1323: /* We define this to prevent the name mangler from putting dollar signs into
1324: function names. */
1325:
1326: #define NO_DOLLAR_IN_LABEL
1327:
1328: /* We define this to 0 so that gcc will never accept a dollar sign in a
1329: variable name. This is needed because the AIX assembler will not accept
1330: dollar signs. */
1331:
1332: #define DOLLARS_IN_IDENTIFIERS 0
1333:
1334: /* Define the extra sections we need. We define three: one is the read-only
1335: data section which is used for constants. This is a csect whose name is
1336: derived from the name of the input file. The second is for initialized
1337: global variables. This is a csect whose name is that of the variable.
1338: The third is the TOC. */
1339:
1340: #define EXTRA_SECTIONS \
1341: read_only_data, private_data, read_only_private_data, toc, bss
1342:
1343: /* Define the name of our readonly data section. */
1344:
1345: #define READONLY_DATA_SECTION read_only_data_section
1346:
1347: /* Indicate that jump tables go in the text section. */
1348:
1349: #define JUMP_TABLES_IN_TEXT_SECTION
1350:
1351: /* Define the routines to implement these extra sections. */
1352:
1353: #define EXTRA_SECTION_FUNCTIONS \
1354: \
1355: void \
1356: read_only_data_section () \
1357: { \
1358: if (in_section != read_only_data) \
1359: { \
1360: fprintf (asm_out_file, "\t.csect\t%s[RO]\n", \
1361: rs6000_read_only_section_name); \
1362: in_section = read_only_data; \
1363: } \
1364: } \
1365: \
1366: void \
1367: private_data_section () \
1368: { \
1369: if (in_section != private_data) \
1370: { \
1371: fprintf (asm_out_file, "\t.csect %s[RW]\n", \
1372: rs6000_private_data_section_name); \
1373: \
1374: in_section = private_data; \
1375: } \
1376: } \
1377: \
1378: void \
1379: read_only_private_data_section () \
1380: { \
1381: if (in_section != read_only_private_data) \
1382: { \
1383: fprintf (asm_out_file, "\t.csect\t%s[RO]\n", \
1384: rs6000_private_data_section_name); \
1385: in_section = read_only_private_data; \
1386: } \
1387: } \
1388: \
1389: void \
1390: toc_section () \
1391: { \
1392: if (in_section != toc) \
1393: fprintf (asm_out_file, "\t.toc\n"); \
1394: \
1395: in_section = toc; \
1396: } \
1397: \
1398: void \
1399: bss_section () \
1400: { \
1401: if (in_section != bss) \
1402: { \
1403: fprintf (asm_out_file, "\t.csect\t%s[BS]\n", \
1404: rs6000_bss_section_name); \
1405: in_section = bss; \
1406: } \
1407: } \
1408:
1409: /* This macro produces the initial definition of a function name.
1410: On the RS/6000, we need to place an extra '.' in the function name and
1411: output the function descriptor.
1412:
1413: The csect for the function will have already been created by the
1414: `text_section' call previously done. We do have to go back to that
1415: csect, however. */
1416:
1417: #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
1418: { if (TREE_PUBLIC (DECL)) \
1419: { \
1420: fprintf (FILE, "\t.globl ."); \
1421: RS6000_OUTPUT_BASENAME (FILE, NAME); \
1422: fprintf (FILE,"\n"); \
1423: } \
1424: fprintf (FILE, "\t.csect "); \
1425: RS6000_OUTPUT_BASENAME (FILE, NAME); \
1426: fprintf (FILE, "[DS]\n"); \
1427: RS6000_OUTPUT_BASENAME (FILE, NAME); \
1428: fprintf (FILE, ":\n"); \
1429: fprintf (FILE, "\t.long ."); \
1430: RS6000_OUTPUT_BASENAME (FILE, NAME); \
1431: fprintf (FILE, ", TOC[tc0], 0\n"); \
1432: fprintf (FILE, "\t.csect [PR]\n."); \
1433: RS6000_OUTPUT_BASENAME (FILE, NAME); \
1434: fprintf (FILE, ":\n"); \
1435: }
1436:
1437: /* Return non-zero if this entry is to be written into the constant pool
1438: in a special way. We do so if this is a SYMBOL_REF, LABEL_REF or a CONST
1439: containing one of them. If -mfp-in-toc (the default), we also do
1440: this for floating-point constants. We actually can only do this
1441: if the FP formats of the target and host machines are the same, but
1442: we can't check that since not every file that uses
1443: GO_IF_LEGITIMATE_ADDRESS_P includes real.h. */
1444:
1445: #define ASM_OUTPUT_SPECIAL_POOL_ENTRY_P(X) \
1446: (GET_CODE (X) == SYMBOL_REF \
1447: || (GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \
1448: && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF) \
1449: || GET_CODE (X) == LABEL_REF \
1450: || (TARGET_FP_IN_TOC && GET_CODE (X) == CONST_DOUBLE \
1451: && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
1452: && BITS_PER_WORD == HOST_BITS_PER_INT))
1453:
1454: /* Select section for constant in constant pool.
1455:
1456: On RS/6000, all constants are in the private read-only data area.
1457: However, if this is being placed in the TOC it must be output as a
1458: toc entry. */
1459:
1460: #define SELECT_RTX_SECTION(MODE, X) \
1461: { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \
1462: toc_section (); \
1463: else \
1464: read_only_private_data_section (); \
1465: }
1466:
1467: /* Macro to output a special constant pool entry. Go to WIN if we output
1468: it. Otherwise, it is written the usual way.
1469:
1470: On the RS/6000, toc entries are handled this way. */
1471:
1472: #define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, X, MODE, ALIGN, LABELNO, WIN) \
1473: { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \
1474: { \
1475: output_toc (FILE, X, LABELNO); \
1476: goto WIN; \
1477: } \
1478: }
1479:
1480: /* Select the section for an initialized data object.
1481:
1482: On the RS/6000, we have a special section for all variables except those
1483: that are static. */
1484:
1485: #define SELECT_SECTION(EXP,RELOC) \
1486: { \
1487: if ((TREE_READONLY (EXP) \
1488: || (TREE_CODE (EXP) == STRING_CST \
1489: && !flag_writable_strings)) \
1490: && ! TREE_THIS_VOLATILE (EXP) \
1491: && ! (RELOC)) \
1492: { \
1493: if (TREE_PUBLIC (EXP)) \
1494: read_only_data_section (); \
1495: else \
1496: read_only_private_data_section (); \
1497: } \
1498: else \
1499: { \
1500: if (TREE_PUBLIC (EXP)) \
1501: data_section (); \
1502: else \
1503: private_data_section (); \
1504: } \
1505: }
1506:
1507: /* This outputs NAME to FILE up to the first null or '['. */
1508:
1509: #define RS6000_OUTPUT_BASENAME(FILE, NAME) \
1510: if ((NAME)[0] == '*') \
1511: assemble_name (FILE, NAME); \
1512: else \
1513: { \
1514: char *_p; \
1515: for (_p = (NAME); *_p && *_p != '['; _p++) \
1516: fputc (*_p, FILE); \
1517: }
1518:
1519: /* Output something to declare an external symbol to the assembler. Most
1520: assemblers don't need this.
1521:
1522: If we haven't already, add "[RW]" (or "[DS]" for a function) to the
1523: name. Normally we write this out along with the name. In the few cases
1524: where we can't, it gets stripped off. */
1525:
1526: #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1527: { rtx _symref = XEXP (DECL_RTL (DECL), 0); \
1528: if ((TREE_CODE (DECL) == VAR_DECL \
1529: || TREE_CODE (DECL) == FUNCTION_DECL) \
1530: && (NAME)[0] != '*' \
1531: && (NAME)[strlen (NAME) - 1] != ']') \
1532: { \
1533: char *_name = (char *) permalloc (strlen (XSTR (_symref, 0)) + 5); \
1534: strcpy (_name, XSTR (_symref, 0)); \
1535: strcat (_name, TREE_CODE (DECL) == FUNCTION_DECL ? "[DS]" : "[RW]"); \
1536: XSTR (_symref, 0) = _name; \
1537: } \
1538: fprintf (FILE, "\t.extern "); \
1539: assemble_name (FILE, XSTR (_symref, 0)); \
1540: if (TREE_CODE (DECL) == FUNCTION_DECL) \
1541: { \
1542: fprintf (FILE, "\n\t.extern ."); \
1543: RS6000_OUTPUT_BASENAME (FILE, XSTR (_symref, 0)); \
1544: } \
1545: fprintf (FILE, "\n"); \
1546: }
1547:
1548: /* Similar, but for libcall. We only have to worry about the function name,
1549: not that of the descriptor. */
1550:
1551: #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \
1552: { fprintf (FILE, "\t.extern ."); \
1553: assemble_name (FILE, XSTR (FUN, 0)); \
1554: fprintf (FILE, "\n"); \
1555: }
1556:
1557: /* Output to assembler file text saying following lines
1558: may contain character constants, extra white space, comments, etc. */
1559:
1560: #define ASM_APP_ON ""
1561:
1562: /* Output to assembler file text saying following lines
1563: no longer contain unusual constructs. */
1564:
1565: #define ASM_APP_OFF ""
1566:
1567: /* Output before instructions. */
1568:
1569: #define TEXT_SECTION_ASM_OP "\t.csect [PR]"
1570:
1571: /* Output before writable data. */
1572:
1573: #define DATA_SECTION_ASM_OP "\t.csect .data[RW]"
1574:
1575: /* How to refer to registers in assembler output.
1576: This sequence is indexed by compiler's hard-register-number (see above). */
1577:
1578: #define REGISTER_NAMES \
1579: {"0", "1", "2", "3", "4", "5", "6", "7", \
1580: "8", "9", "10", "11", "12", "13", "14", "15", \
1581: "16", "17", "18", "19", "20", "21", "22", "23", \
1582: "24", "25", "26", "27", "28", "29", "30", "31", \
1583: "0", "1", "2", "3", "4", "5", "6", "7", \
1584: "8", "9", "10", "11", "12", "13", "14", "15", \
1585: "16", "17", "18", "19", "20", "21", "22", "23", \
1586: "24", "25", "26", "27", "28", "29", "30", "31", \
1587: "mq", "lr", "ctr", "ap", \
1588: "0", "1", "2", "3", "4", "5", "6", "7" }
1589:
1590: /* Table of additional register names to use in user input. */
1591:
1592: #define ADDITIONAL_REGISTER_NAMES \
1593: {"r0", 0, "r1", 1, "r2", 2, "r3", 3, \
1594: "r4", 4, "r5", 5, "r6", 6, "r7", 7, \
1595: "r8", 8, "r9", 9, "r10", 10, "r11", 11, \
1596: "r12", 12, "r13", 13, "r14", 14, "r15", 15, \
1597: "r16", 16, "r17", 17, "r18", 18, "r19", 19, \
1598: "r20", 20, "r21", 21, "r22", 22, "r23", 23, \
1599: "r24", 24, "r25", 25, "r26", 26, "r27", 27, \
1600: "r28", 28, "r29", 29, "r30", 30, "r31", 31, \
1601: "fr0", 32, "fr1", 33, "fr2", 34, "fr3", 35, \
1602: "fr4", 36, "fr5", 37, "fr6", 38, "fr7", 39, \
1603: "fr8", 40, "fr9", 41, "fr10", 42, "fr11", 43, \
1604: "fr12", 44, "fr13", 45, "fr14", 46, "fr15", 47, \
1605: "fr16", 48, "fr17", 49, "fr18", 50, "fr19", 51, \
1606: "fr20", 52, "fr21", 53, "fr22", 54, "fr23", 55, \
1607: "fr24", 56, "fr25", 57, "fr26", 58, "fr27", 59, \
1608: "fr28", 60, "fr29", 61, "fr30", 62, "fr31", 63, \
1609: /* no additional names for: mq, lr, ctr, ap */ \
1610: "cr0", 68, "cr1", 69, "cr2", 70, "cr3", 71, \
1611: "cr4", 72, "cr5", 73, "cr6", 74, "cr7", 75 }
1612:
1613: /* How to renumber registers for dbx and gdb. */
1614:
1615: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1616:
1617: /* This is how to output the definition of a user-level label named NAME,
1618: such as the label on a static function or variable NAME. */
1619:
1620: #define ASM_OUTPUT_LABEL(FILE,NAME) \
1621: do { RS6000_OUTPUT_BASENAME (FILE, NAME); fputs (":\n", FILE); } while (0)
1622:
1623: /* This is how to output a command to make the user-level label named NAME
1624: defined for reference from other files. */
1625:
1626: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1627: do { fputs ("\t.globl ", FILE); \
1628: RS6000_OUTPUT_BASENAME (FILE, NAME); fputs ("\n", FILE);} while (0)
1629:
1630: /* This is how to output a reference to a user-level label named NAME.
1631: `assemble_name' uses this. */
1632:
1633: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1634: fprintf (FILE, NAME)
1635:
1636: /* This is how to output an internal numbered label where
1637: PREFIX is the class of label and NUM is the number within the class. */
1638:
1639: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1640: fprintf (FILE, "%s..%d:\n", PREFIX, NUM)
1641:
1642: /* This is how to output a label for a jump table. Arguments are the same as
1643: for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is
1644: passed. */
1645:
1646: #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1647: { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
1648:
1649: /* This is how to store into the string LABEL
1650: the symbol_ref name of an internal numbered label where
1651: PREFIX is the class of label and NUM is the number within the class.
1652: This is suitable for output with `assemble_name'. */
1653:
1654: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1655: sprintf (LABEL, "%s..%d", PREFIX, NUM)
1656:
1657: /* This is how to output an assembler line defining a `double' constant. */
1658:
1659: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1660: fprintf (FILE, "\t.double 0d%.20e\n", (VALUE))
1661:
1662: /* This is how to output an assembler line defining a `float' constant. */
1663:
1664: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1665: fprintf (FILE, "\t.float 0d%.20e\n", (VALUE))
1666:
1667: /* This is how to output an assembler line defining an `int' constant. */
1668:
1669: #define ASM_OUTPUT_INT(FILE,VALUE) \
1670: ( fprintf (FILE, "\t.long "), \
1671: output_addr_const (FILE, (VALUE)), \
1672: fprintf (FILE, "\n"))
1673:
1674: /* Likewise for `char' and `short' constants. */
1675:
1676: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1677: ( fprintf (FILE, "\t.short "), \
1678: output_addr_const (FILE, (VALUE)), \
1679: fprintf (FILE, "\n"))
1680:
1681: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1682: ( fprintf (FILE, "\t.byte "), \
1683: output_addr_const (FILE, (VALUE)), \
1684: fprintf (FILE, "\n"))
1685:
1686: /* This is how to output an assembler line for a numeric constant byte. */
1687:
1688: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1689: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1690:
1691: /* This is how to output an assembler line to define N characters starting
1692: at P to FILE. */
1693:
1694: #define ASM_OUTPUT_ASCII(FILE, P, N) output_ascii ((FILE), (P), (N))
1695:
1696: /* This is how to output code to push a register on the stack.
1697: It need not be very fast code. */
1698:
1699: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1700: fprintf (FILE, "\tstu %s,-4(r1)\n", reg_names[REGNO]);
1701:
1702: /* This is how to output an insn to pop a register from the stack.
1703: It need not be very fast code. */
1704:
1705: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1706: fprintf (FILE, "\tl %s,0(r1)\n\tai r1,r1,4\n", reg_names[REGNO])
1707:
1708: /* This is how to output an element of a case-vector that is absolute.
1709: (RS/6000 does not use such vectors, but we must define this macro
1710: anyway.) */
1711:
1712: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1713: fprintf (FILE, "\t.long L..%d\n", VALUE)
1714:
1715: /* This is how to output an element of a case-vector that is relative. */
1716:
1717: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1718: fprintf (FILE, "\t.long L..%d-L..%d\n", VALUE, REL)
1719:
1720: /* This is how to output an assembler line
1721: that says to advance the location counter
1722: to a multiple of 2**LOG bytes. */
1723:
1724: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1725: if ((LOG) != 0) \
1726: fprintf (FILE, "\t.align %d\n", (LOG))
1727:
1728: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1729: fprintf (FILE, "\t.space %d\n", (SIZE))
1730:
1731: /* This says how to output an assembler line
1732: to define a global common symbol. */
1733:
1734: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1735: do { fputs (".comm ", (FILE)); \
1736: RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \
1737: fprintf ((FILE), ",%d\n", (SIZE)); } while (0)
1738:
1739: /* This says how to output an assembler line
1740: to define a local common symbol. */
1741:
1742: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1743: do { fputs (".lcomm ", (FILE)); \
1744: RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \
1745: fprintf ((FILE), ",%d,%s\n", (SIZE), rs6000_bss_section_name); \
1746: } while (0)
1747:
1748: /* Store in OUTPUT a string (made with alloca) containing
1749: an assembler-name for a local static variable named NAME.
1750: LABELNO is an integer which is different for each call. */
1751:
1752: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1753: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1754: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1755:
1756: /* Define the parentheses used to group arithmetic operations
1757: in assembler code. */
1758:
1759: #define ASM_OPEN_PAREN "("
1760: #define ASM_CLOSE_PAREN ")"
1761:
1762: /* Define results of standard character escape sequences. */
1763: #define TARGET_BELL 007
1764: #define TARGET_BS 010
1765: #define TARGET_TAB 011
1766: #define TARGET_NEWLINE 012
1767: #define TARGET_VT 013
1768: #define TARGET_FF 014
1769: #define TARGET_CR 015
1770:
1771: /* Print operand X (an rtx) in assembler syntax to file FILE.
1772: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1773: For `%' followed by punctuation, CODE is the punctuation and X is null. */
1774:
1775: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1776:
1777: /* Define which CODE values are valid. */
1778:
1779: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) 0
1780:
1781: /* Print a memory address as an operand to reference that memory location. */
1782:
1783: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1784:
1785: /* Define the codes that are matched by predicates in rs6000.c. */
1786:
1787: #define PREDICATE_CODES \
1788: {"short_cint_operand", {CONST_INT}}, \
1789: {"u_short_cint_operand", {CONST_INT}}, \
1790: {"gen_reg_operand", {SUBREG, REG}}, \
1791: {"cc_reg_operand", {SUBREG, REG}}, \
1792: {"reg_or_short_operand", {SUBREG, REG, CONST_INT}}, \
1793: {"reg_or_neg_short_operand", {SUBREG, REG, CONST_INT}}, \
1794: {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \
1795: {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
1796: {"easy_fp_constant", {CONST_DOUBLE}}, \
1797: {"reg_or_mem_operand", {SUBREG, MEM, REG}}, \
1798: {"fp_reg_or_mem_operand", {SUBREG, MEM, REG}}, \
1799: {"mem_or_easy_const_operand", {SUBREG, MEM, CONST_DOUBLE}}, \
1800: {"add_operand", {SUBREG, REG, CONST_INT}}, \
1801: {"and_operand", {SUBREG, REG, CONST_INT}}, \
1802: {"logical_operand", {SUBREG, REG, CONST_INT}}, \
1803: {"mask_operand", {CONST_INT}}, \
1804: {"call_operand", {SYMBOL_REF, REG}}, \
1805: {"input_operand", {SUBREG, MEM, REG, CONST_INT}}, \
1806: {"branch_comparison_operation", {EQ, NE, LE, LT, GE, \
1807: LT, LEU, LTU, GEU, GTU}}, \
1808: {"scc_comparison_operation", {EQ, NE, LE, LT, GE, \
1809: LT, LEU, LTU, GEU, GTU}},
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.