--- gcc/config/rs6000/rs6000.c 2018/04/24 18:22:47 1.1.1.3 +++ gcc/config/rs6000/rs6000.c 2018/04/24 18:30:31 1.1.1.4 @@ -1,5 +1,5 @@ /* Subroutines used for code generation on IBM RS/6000. - Copyright (C) 1991, 1993, 1994 Free Software Foundation, Inc. + Copyright (C) 1991, 1993, 1994, 1995 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) This file is part of GNU CC. @@ -16,7 +16,8 @@ GNU General Public License for more deta You should have received a copy of the GNU General Public License along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ +the Free Software Foundation, 59 Temple Place - Suite 330, +Boston, MA 02111-1307, USA. */ #include #include @@ -63,6 +64,113 @@ static int common_mode_defined; rtx rs6000_compare_op0, rs6000_compare_op1; int rs6000_compare_fp_p; + +#ifdef USING_SVR4_H +/* Label number of label created for -mrelocatable, to call to so we can + get the address of the GOT section */ +int rs6000_pic_labelno; +#endif + +/* Whether a System V.4 varargs area was created. */ +int rs6000_sysv_varargs_p; + +/* Temporary memory used to convert integer -> float */ +static rtx stack_temps[NUM_MACHINE_MODES]; + + +/* Print the options used in the assembly file. */ + +extern char *version_string, *language_string; + +struct asm_option +{ + char *string; + int *variable; + int on_value; +}; + +#define MAX_LINE 79 + +static int +output_option (file, type, name, pos) + FILE *file; + char *type; + char *name; + int pos; +{ + int type_len = strlen (type); + int name_len = strlen (name); + + if (1 + type_len + name_len + pos > MAX_LINE) + { + fprintf (file, "\n # %s%s", type, name); + return 3 + type_len + name_len; + } + fprintf (file, " %s%s", type, name); + return pos + 1 + type_len + name_len; +} + +static struct { char *name; int value; } m_options[] = TARGET_SWITCHES; + +void +output_options (file, f_options, f_len, W_options, W_len) + FILE *file; + struct asm_option *f_options; + int f_len; + struct asm_option *W_options; + int W_len; +{ + int j; + int flags = target_flags; + int pos = 32767; + + fprintf (file, " # %s %s", language_string, version_string); + + if (optimize) + { + char opt_string[20]; + sprintf (opt_string, "%d", optimize); + pos = output_option (file, "-O", opt_string, pos); + } + + if (profile_flag) + pos = output_option (file, "-p", "", pos); + + if (profile_block_flag) + pos = output_option (file, "-a", "", pos); + + if (inhibit_warnings) + pos = output_option (file, "-w", "", pos); + + for (j = 0; j < f_len; j++) + { + if (*f_options[j].variable == f_options[j].on_value) + pos = output_option (file, "-f", f_options[j].string, pos); + } + + for (j = 0; j < W_len; j++) + { + if (*W_options[j].variable == W_options[j].on_value) + pos = output_option (file, "-W", W_options[j].string, pos); + } + + for (j = 0; j < sizeof m_options / sizeof m_options[0]; j++) + { + if (m_options[j].name[0] != '\0' + && m_options[j].value > 0 + && ((m_options[j].value & flags) == m_options[j].value)) + { + pos = output_option (file, "-m", m_options[j].name, pos); + flags &= ~ m_options[j].value; + } + } + + if (rs6000_cpu_string != (char *)0) + pos = output_option (file, "-mcpu=", rs6000_cpu_string, pos); + + fputs ("\n\n", file); +} + /* Override command line options. Mostly we process the processor type and sometimes adjust other TARGET_ options. */ @@ -75,7 +183,7 @@ rs6000_override_options () /* Simplify the entries below by making a mask for any POWER variant and any PowerPC variant. */ -#define POWER_MASKS (MASK_POWER | MASK_POWER2) +#define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING) #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \ | MASK_PPC_GFXOPT | MASK_POWERPC64) #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT) @@ -89,56 +197,44 @@ rs6000_override_options () } processor_target_table[] = {{"common", PROCESSOR_COMMON, 0, POWER_MASKS | POWERPC_MASKS}, {"power", PROCESSOR_POWER, - MASK_POWER, + MASK_POWER | MASK_MULTIPLE | MASK_STRING, MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, {"powerpc", PROCESSOR_POWERPC, MASK_POWERPC | MASK_NEW_MNEMONICS, POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, {"rios", PROCESSOR_RIOS1, - MASK_POWER, + MASK_POWER | MASK_MULTIPLE | MASK_STRING, MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, {"rios1", PROCESSOR_RIOS1, - MASK_POWER, + MASK_POWER | MASK_MULTIPLE | MASK_STRING, MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, {"rsc", PROCESSOR_PPC601, - MASK_POWER, + MASK_POWER | MASK_MULTIPLE | MASK_STRING, MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, {"rsc1", PROCESSOR_PPC601, - MASK_POWER, + MASK_POWER | MASK_MULTIPLE | MASK_STRING, MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, {"rios2", PROCESSOR_RIOS2, - MASK_POWER | MASK_POWER2, + MASK_POWER | MASK_MULTIPLE | MASK_STRING | MASK_POWER2, POWERPC_MASKS | MASK_NEW_MNEMONICS}, + {"403", PROCESSOR_PPC403, + MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, + POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, {"601", PROCESSOR_PPC601, - MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS, - MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64}, - {"mpc601", PROCESSOR_PPC601, - MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS, - MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64}, - {"ppc601", PROCESSOR_PPC601, - MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS, + MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_MULTIPLE | MASK_STRING, MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64}, {"603", PROCESSOR_PPC603, MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, - {"mpc603", PROCESSOR_PPC603, - MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, - POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, - {"ppc603", PROCESSOR_PPC603, - MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, - POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, {"604", PROCESSOR_PPC604, MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, - POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, - {"mpc604", PROCESSOR_PPC604, - MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, - POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, - {"ppc604", PROCESSOR_PPC604, - MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, - POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}}; + POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}}; int ptt_size = sizeof (processor_target_table) / sizeof (struct ptt); + int multiple = TARGET_MULTIPLE; /* save current -mmultiple/-mno-multiple status */ + int string = TARGET_STRING; /* save current -mstring/-mno-string status */ + profile_block_flag = 0; /* Identify the processor type */ @@ -162,18 +258,86 @@ rs6000_override_options () rs6000_cpu = PROCESSOR_DEFAULT; } } + + /* If -mmultiple or -mno-multiple was explicitly used, don't + override with the processor default */ + if (TARGET_MULTIPLE_SET) + target_flags = (target_flags & ~MASK_MULTIPLE) | multiple; + + /* If -mstring or -mno-string was explicitly used, don't + override with the processor default */ + if (TARGET_STRING_SET) + target_flags = (target_flags & ~MASK_STRING) | string; + + /* Don't allow -mmultiple or -mstring on little endian systems, because the + hardware doesn't support the instructions used in little endian mode */ + if (!BYTES_BIG_ENDIAN) + { + if (TARGET_MULTIPLE) + { + target_flags &= ~MASK_MULTIPLE; + if (TARGET_MULTIPLE_SET) + warning ("-mmultiple is not supported on little endian systems"); + } + + if (TARGET_STRING) + { + target_flags &= ~MASK_STRING; + if (TARGET_STRING_SET) + warning ("-mstring is not supported on little endian systems"); + } + } + +#ifdef SUBTARGET_OVERRIDE_OPTIONS + SUBTARGET_OVERRIDE_OPTIONS; +#endif +} + +/* Create a CONST_DOUBLE from a string. */ + +struct rtx_def * +rs6000_float_const (string, mode) + char *string; + enum machine_mode mode; +{ + REAL_VALUE_TYPE value = REAL_VALUE_ATOF (string, mode); + return immed_real_const_1 (value, mode); } + + +/* Create a CONST_DOUBLE like immed_double_const, except reverse the + two parts of the constant if the target is little endian. */ + +struct rtx_def * +rs6000_immed_double_const (i0, i1, mode) + HOST_WIDE_INT i0, i1; + enum machine_mode mode; +{ + if (! WORDS_BIG_ENDIAN) + return immed_double_const (i1, i0, mode); + + return immed_double_const (i0, i1, mode); +} + /* Return non-zero if this function is known to have a null epilogue. */ int direct_return () { - return (reload_completed - && first_reg_to_save () == 32 - && first_fp_reg_to_save () == 64 - && ! regs_ever_live[65] - && ! rs6000_pushes_stack ()); + if (reload_completed) + { + rs6000_stack_t *info = rs6000_stack_info (); + + if (info->first_gp_reg_save == 32 + && info->first_fp_reg_save == 64 + && !info->lr_save_p + && !info->cr_save_p + && !info->push_p) + return 1; + } + + return 0; } /* Returns 1 always. */ @@ -321,7 +485,18 @@ easy_fp_constant (op, mode) return (mode == SFmode || (low != 0 && input_operand (low, word_mode))); } - + +/* Return 1 if the operand is an offsettable memory address. */ + +int +offsettable_addr_operand (op, mode) + register rtx op; + enum machine_mode mode; +{ + return offsettable_address_p (reload_completed | reload_in_progress, + mode, op); +} + /* Return 1 if the operand is either a floating-point register, a pseudo register, or memory. */ @@ -468,6 +643,26 @@ reg_or_mem_operand (op, mode) return gpc_reg_operand (op, mode) || memory_operand (op, mode); } +/* Return 1 if the operand is a general register or memory operand without + pre-inc or pre_dec which produces invalid form of PowerPC lwa + instruction. */ + +int +lwa_operand (op, mode) + register rtx op; + register enum machine_mode mode; +{ + rtx inner = op; + + if (reload_completed && GET_CODE (inner) == SUBREG) + inner = SUBREG_REG (inner); + + return gpc_reg_operand (inner, mode) + || (memory_operand (inner, mode) + && GET_CODE (XEXP (inner, 0)) != PRE_INC + && GET_CODE (XEXP (inner, 0)) != PRE_DEC); +} + /* Return 1 if the operand, used inside a MEM, is a valid first argument to CALL. This is a SYMBOL_REF or a pseudo-register, which will be forced to lr. */ @@ -534,7 +729,7 @@ input_operand (op, mode) return 1; /* A SYMBOL_REF referring to the TOC is valid. */ - if (GET_CODE (op) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (op)) + if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op)) return 1; /* Otherwise, we will be doing this SET with an add, so anything valid @@ -542,6 +737,647 @@ input_operand (op, mode) return add_operand (op, mode); } +/* Initialize a variable CUM of type CUMULATIVE_ARGS + for a call to a function whose data type is FNTYPE. + For a library call, FNTYPE is 0. + + For incoming args we set the number of arguments in the prototype large + so we never return an EXPR_LIST. */ + +void +init_cumulative_args (cum, fntype, libname, incoming) + CUMULATIVE_ARGS *cum; + tree fntype; + rtx libname; + int incoming; +{ + static CUMULATIVE_ARGS zero_cumulative; + + *cum = zero_cumulative; + cum->words = 0; + cum->fregno = FP_ARG_MIN_REG; + cum->prototype = (fntype && TYPE_ARG_TYPES (fntype)); + + if (incoming) + { + cum->nargs_prototype = 1000; /* don't return an EXPR_LIST */ +#ifdef TARGET_V4_CALLS + if (TARGET_V4_CALLS) + cum->varargs_offset = RS6000_VARARGS_OFFSET; +#endif + } + + else if (cum->prototype) + cum->nargs_prototype = (list_length (TYPE_ARG_TYPES (fntype)) - 1 + + (TYPE_MODE (TREE_TYPE (fntype)) == BLKmode + || RETURN_IN_MEMORY (TREE_TYPE (fntype)))); + + else + cum->nargs_prototype = 0; + + cum->orig_nargs = cum->nargs_prototype; + if (TARGET_DEBUG_ARG) + { + fprintf (stderr, "\ninit_cumulative_args:"); + if (fntype) + { + tree ret_type = TREE_TYPE (fntype); + fprintf (stderr, " ret code = %s,", + tree_code_name[ (int)TREE_CODE (ret_type) ]); + } + +#ifdef TARGET_V4_CALLS + if (TARGET_V4_CALLS && incoming) + fprintf (stderr, " varargs = %d, ", cum->varargs_offset); +#endif + + fprintf (stderr, " proto = %d, nargs = %d\n", + cum->prototype, cum->nargs_prototype); + } +} + +/* Update the data in CUM to advance over an argument + of mode MODE and data type TYPE. + (TYPE is null for libcalls where that information may not be available.) */ + +void +function_arg_advance (cum, mode, type, named) + CUMULATIVE_ARGS *cum; + enum machine_mode mode; + tree type; + int named; +{ + cum->nargs_prototype--; + +#ifdef TARGET_V4_CALLS + if (TARGET_V4_CALLS) + { + /* Long longs must not be split between registers and stack */ + if ((GET_MODE_CLASS (mode) != MODE_FLOAT || TARGET_SOFT_FLOAT) + && type && !AGGREGATE_TYPE_P (type) + && cum->words < GP_ARG_NUM_REG + && cum->words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG) + { + cum->words = GP_ARG_NUM_REG; + } + + /* Aggregates get passed as pointers */ + if (type && AGGREGATE_TYPE_P (type)) + cum->words++; + + /* Floats go in registers, & don't occupy space in the GP registers + like they do for AIX unless software floating point. */ + else if (GET_MODE_CLASS (mode) == MODE_FLOAT + && TARGET_HARD_FLOAT + && cum->fregno <= FP_ARG_V4_MAX_REG) + cum->fregno++; + + else + cum->words += RS6000_ARG_SIZE (mode, type, 1); + } + else +#endif + if (named) + { + cum->words += RS6000_ARG_SIZE (mode, type, named); + if (GET_MODE_CLASS (mode) == MODE_FLOAT && TARGET_HARD_FLOAT) + cum->fregno++; + } + + if (TARGET_DEBUG_ARG) + fprintf (stderr, + "function_adv: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d\n", + cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named); +} + +/* Determine where to put an argument to a function. + Value is zero to push the argument on the stack, + or a hard register in which to store the argument. + + MODE is the argument's machine mode. + TYPE is the data type of the argument (as a tree). + This is null for libcalls where that information may + not be available. + CUM is a variable of type CUMULATIVE_ARGS which gives info about + the preceding args and about the function being called. + NAMED is nonzero if this argument is a named parameter + (otherwise it is an extra parameter matching an ellipsis). + + On RS/6000 the first eight words of non-FP are normally in registers + and the rest are pushed. Under AIX, the first 13 FP args are in registers. + Under V.4, the first 8 FP args are in registers. + + If this is floating-point and no prototype is specified, we use + both an FP and integer register (or possibly FP reg and stack). Library + functions (when TYPE is zero) always have the proper types for args, + so we can pass the FP value just in one register. emit_library_function + doesn't support EXPR_LIST anyway. */ + +struct rtx_def * +function_arg (cum, mode, type, named) + CUMULATIVE_ARGS *cum; + enum machine_mode mode; + tree type; + int named; +{ + if (TARGET_DEBUG_ARG) + fprintf (stderr, + "function_arg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d\n", + cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named); + + /* Return a marker to indicate whether CR1 needs to set or clear the bit that V.4 + uses to say fp args were passed in registers. Assume that we don't need the + marker for software floating point, or compiler generated library calls. */ + if (mode == VOIDmode) + { +#ifdef TARGET_V4_CALLS + if (TARGET_V4_CALLS && TARGET_HARD_FLOAT && cum->nargs_prototype < 0 + && type && (cum->prototype || TARGET_NO_PROTOTYPE)) + return GEN_INT ((cum->fregno == FP_ARG_MIN_REG) ? -1 : 1); +#endif + + return GEN_INT (0); + } + + if (!named) + { +#ifdef TARGET_V4_CALLS + if (!TARGET_V4_CALLS) +#endif + return NULL_RTX; + } + + if (type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST) + return NULL_RTX; + + if (USE_FP_FOR_ARG_P (*cum, mode, type)) + { + if ((cum->nargs_prototype > 0) +#ifdef TARGET_V4_CALLS + || TARGET_V4_CALLS /* V.4 never passes FP values in GP registers */ +#endif + || !type) + return gen_rtx (REG, mode, cum->fregno); + + return gen_rtx (EXPR_LIST, VOIDmode, + ((cum->words < GP_ARG_NUM_REG) + ? gen_rtx (REG, mode, GP_ARG_MIN_REG + cum->words) + : NULL_RTX), + gen_rtx (REG, mode, cum->fregno)); + } + +#ifdef TARGET_V4_CALLS + /* Long longs won't be split between register and stack */ + else if (TARGET_V4_CALLS && + cum->words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG) + { + return NULL_RTX; + } +#endif + + else if (cum->words < GP_ARG_NUM_REG) + return gen_rtx (REG, mode, GP_ARG_MIN_REG + cum->words); + + return NULL_RTX; +} + +/* For an arg passed partly in registers and partly in memory, + this is the number of registers used. + For args passed entirely in registers or entirely in memory, zero. */ + +int +function_arg_partial_nregs (cum, mode, type, named) + CUMULATIVE_ARGS *cum; + enum machine_mode mode; + tree type; + int named; +{ + if (! named) + return 0; + +#ifdef TARGET_V4_CALLS + if (TARGET_V4_CALLS) + return 0; +#endif + + if (USE_FP_FOR_ARG_P (*cum, mode, type)) + { + if (cum->nargs_prototype >= 0) + return 0; + } + + if (cum->words < GP_ARG_NUM_REG + && GP_ARG_NUM_REG < (cum->words + RS6000_ARG_SIZE (mode, type, named))) + { + int ret = GP_ARG_NUM_REG - cum->words; + if (ret && TARGET_DEBUG_ARG) + fprintf (stderr, "function_arg_partial_nregs: %d\n", ret); + + return ret; + } + + return 0; +} + +/* A C expression that indicates when an argument must be passed by + reference. If nonzero for an argument, a copy of that argument is + made in memory and a pointer to the argument is passed instead of + the argument itself. The pointer is passed in whatever way is + appropriate for passing a pointer to that type. + + Under V.4, structures and unions are passed by reference. */ + +int +function_arg_pass_by_reference (cum, mode, type, named) + CUMULATIVE_ARGS *cum; + enum machine_mode mode; + tree type; + int named; +{ +#ifdef TARGET_V4_CALLS + if (TARGET_V4_CALLS && type && AGGREGATE_TYPE_P (type)) + { + if (TARGET_DEBUG_ARG) + fprintf (stderr, "function_arg_pass_by_reference: aggregate\n"); + + return 1; + } +#endif + + return 0; +} + + +/* Perform any needed actions needed for a function that is receiving a + variable number of arguments. + + CUM is as above. + + MODE and TYPE are the mode and type of the current parameter. + + PRETEND_SIZE is a variable that should be set to the amount of stack + that must be pushed by the prolog to pretend that our caller pushed + it. + + Normally, this macro will push all remaining incoming registers on the + stack and set PRETEND_SIZE to the length of the registers pushed. */ + +void +setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl) + CUMULATIVE_ARGS *cum; + enum machine_mode mode; + tree type; + int *pretend_size; + int no_rtl; + +{ + rtx save_area = virtual_incoming_args_rtx; + int reg_size = (TARGET_64BIT) ? 8 : 4; + + if (TARGET_DEBUG_ARG) + fprintf (stderr, + "setup_vararg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, no_rtl= %d\n", + cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), no_rtl); + +#ifdef TARGET_V4_CALLS + if (TARGET_V4_CALLS && !no_rtl) + { + rs6000_sysv_varargs_p = 1; + save_area = plus_constant (frame_pointer_rtx, RS6000_VARARGS_OFFSET); + } +#endif + + if (cum->words < 8) + { + int first_reg_offset = cum->words; + + if (MUST_PASS_IN_STACK (mode, type)) + first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (type), type, 1); + + if (first_reg_offset > GP_ARG_NUM_REG) + first_reg_offset = GP_ARG_NUM_REG; + + if (!no_rtl && first_reg_offset != GP_ARG_NUM_REG) + move_block_from_reg + (GP_ARG_MIN_REG + first_reg_offset, + gen_rtx (MEM, BLKmode, + plus_constant (save_area, first_reg_offset * reg_size)), + GP_ARG_NUM_REG - first_reg_offset, + (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD); + + *pretend_size = (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD; + } + +#ifdef TARGET_V4_CALLS + /* Save FP registers if needed. */ + if (TARGET_V4_CALLS && TARGET_HARD_FLOAT && !no_rtl) + { + int fregno = cum->fregno; + int num_fp_reg = FP_ARG_V4_MAX_REG + 1 - fregno; + + if (num_fp_reg >= 0) + { + rtx cr1 = gen_rtx (REG, CCmode, 69); + rtx lab = gen_label_rtx (); + int off = (GP_ARG_NUM_REG * reg_size) + ((fregno - FP_ARG_MIN_REG) * 8); + + emit_jump_insn (gen_rtx (SET, VOIDmode, + pc_rtx, + gen_rtx (IF_THEN_ELSE, VOIDmode, + gen_rtx (NE, VOIDmode, cr1, const0_rtx), + gen_rtx (LABEL_REF, VOIDmode, lab), + pc_rtx))); + + while ( num_fp_reg-- >= 0) + { + emit_move_insn (gen_rtx (MEM, DFmode, plus_constant (save_area, off)), + gen_rtx (REG, DFmode, fregno++)); + off += 8; + } + + emit_label (lab); + } + } +#endif +} + +/* If defined, is a C expression that produces the machine-specific + code for a call to `__builtin_saveregs'. This code will be moved + to the very beginning of the function, before any parameter access + are made. The return value of this function should be an RTX that + contains the value to use as the return of `__builtin_saveregs'. + + The argument ARGS is a `tree_list' containing the arguments that + were passed to `__builtin_saveregs'. + + If this macro is not defined, the compiler will output an ordinary + call to the library function `__builtin_saveregs'. + + On the Power/PowerPC return the address of the area on the stack + used to hold arguments. Under AIX, this includes the 8 word register + save area. Under V.4 this does not. */ + +struct rtx_def * +expand_builtin_saveregs (args) + tree args; +{ + return virtual_incoming_args_rtx; +} + + +/* Allocate a stack temp. Only allocate one stack temp per type for a + function. */ + +struct rtx_def * +rs6000_stack_temp (mode, size) + enum machine_mode mode; + int size; +{ + rtx temp = stack_temps[ (int)mode ]; + rtx addr; + + if (temp == NULL_RTX) + { + temp = assign_stack_local (mode, size, 0); + addr = XEXP (temp, 0); + + if ((size > 4 && !offsettable_address_p (0, mode, addr)) + || (size <= 4 && !memory_address_p (mode, addr))) + { + XEXP (temp, 0) = copy_addr_to_reg (addr); + } + + stack_temps[ (int)mode ] = temp; + } + + return temp; +} + + +/* Generate a memory reference for expand_block_move, copying volatile, + and other bits from an original memory reference. */ + +static rtx +expand_block_move_mem (mode, addr, orig_mem) + enum machine_mode mode; + rtx addr; + rtx orig_mem; +{ + rtx mem = gen_rtx (MEM, mode, addr); + MEM_VOLATILE_P (mem) = MEM_VOLATILE_P (orig_mem); + MEM_IN_STRUCT_P (mem) = MEM_IN_STRUCT_P (orig_mem); + return mem; +} + +/* Expand a block move operation, and return 1 if successful. Return 0 + if we should let the compiler generate normal code. + + operands[0] is the destination + operands[1] is the source + operands[2] is the length + operands[3] is the alignment */ + +#define MAX_MOVE_REG 4 + +int +expand_block_move (operands) + rtx operands[]; +{ + rtx bytes_rtx = operands[2]; + rtx align_rtx = operands[3]; + int constp = (GET_CODE (bytes_rtx) == CONST_INT); + int align = XINT (align_rtx, 0); + int bytes; + int offset; + int num_reg; + int i; + rtx src_reg; + rtx dest_reg; + rtx src_addr; + rtx dest_addr; + rtx tmp_reg; + rtx stores[MAX_MOVE_REG]; + int move_bytes; + + /* If this is not a fixed size move, just call memcpy */ + if (!constp) + return 0; + + /* Anything to move? */ + bytes = INTVAL (bytes_rtx); + if (bytes <= 0) + return 1; + + /* Don't support real large moves. If string instructions are not used, + then don't generate more than 8 loads. */ + if (TARGET_STRING) + { + if (bytes > 4*8) + return 0; + } + else if (!STRICT_ALIGNMENT) + { + if (bytes > 4*8) + return 0; + } + else if (bytes > 8*align) + return 0; + + /* Move the address into scratch registers. */ + dest_reg = copy_addr_to_reg (XEXP (operands[0], 0)); + src_reg = copy_addr_to_reg (XEXP (operands[1], 0)); + + if (TARGET_STRING) /* string instructions are available */ + { + for ( ; bytes > 0; bytes -= move_bytes) + { + if (bytes > 24 /* move up to 32 bytes at a time */ + && !fixed_regs[5] + && !fixed_regs[6] + && !fixed_regs[7] + && !fixed_regs[8] + && !fixed_regs[9] + && !fixed_regs[10] + && !fixed_regs[11] + && !fixed_regs[12]) + { + move_bytes = (bytes > 32) ? 32 : bytes; + emit_insn (gen_movstrsi_8reg (dest_reg, + src_reg, + GEN_INT ((move_bytes == 32) ? 0 : move_bytes), + align_rtx)); + } + else if (bytes > 16 /* move up to 24 bytes at a time */ + && !fixed_regs[7] + && !fixed_regs[8] + && !fixed_regs[9] + && !fixed_regs[10] + && !fixed_regs[11] + && !fixed_regs[12]) + { + move_bytes = (bytes > 24) ? 24 : bytes; + emit_insn (gen_movstrsi_6reg (dest_reg, + src_reg, + GEN_INT (move_bytes), + align_rtx)); + } + else if (bytes > 8 /* move up to 16 bytes at a time */ + && !fixed_regs[9] + && !fixed_regs[10] + && !fixed_regs[11] + && !fixed_regs[12]) + { + move_bytes = (bytes > 16) ? 16 : bytes; + emit_insn (gen_movstrsi_4reg (dest_reg, + src_reg, + GEN_INT (move_bytes), + align_rtx)); + } + else if (bytes > 4 && !TARGET_64BIT) + { /* move up to 8 bytes at a time */ + move_bytes = (bytes > 8) ? 8 : bytes; + emit_insn (gen_movstrsi_2reg (dest_reg, + src_reg, + GEN_INT (move_bytes), + align_rtx)); + } + else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT)) + { /* move 4 bytes */ + move_bytes = 4; + tmp_reg = gen_reg_rtx (SImode); + emit_move_insn (tmp_reg, gen_rtx (MEM, SImode, src_reg)); + emit_move_insn (gen_rtx (MEM, SImode, dest_reg), tmp_reg); + } + else if (bytes == 2 && (align >= 2 || !STRICT_ALIGNMENT)) + { /* move 2 bytes */ + move_bytes = 2; + tmp_reg = gen_reg_rtx (HImode); + emit_move_insn (tmp_reg, gen_rtx (MEM, HImode, src_reg)); + emit_move_insn (gen_rtx (MEM, HImode, dest_reg), tmp_reg); + } + else if (bytes == 1) /* move 1 byte */ + { + move_bytes = 1; + tmp_reg = gen_reg_rtx (QImode); + emit_move_insn (tmp_reg, gen_rtx (MEM, QImode, src_reg)); + emit_move_insn (gen_rtx (MEM, QImode, dest_reg), tmp_reg); + } + else + { /* move up to 4 bytes at a time */ + move_bytes = (bytes > 4) ? 4 : bytes; + emit_insn (gen_movstrsi_1reg (dest_reg, + src_reg, + GEN_INT (move_bytes), + align_rtx)); + } + + if (bytes > move_bytes) + { + emit_insn (gen_addsi3 (src_reg, src_reg, GEN_INT (move_bytes))); + emit_insn (gen_addsi3 (dest_reg, dest_reg, GEN_INT (move_bytes))); + } + } + } + + else /* string instructions not available */ + { + num_reg = offset = 0; + for ( ; bytes > 0; (bytes -= move_bytes), (offset += move_bytes)) + { + /* Calculate the correct offset for src/dest */ + if (offset == 0) + { + src_addr = src_reg; + dest_addr = dest_reg; + } + else + { + src_addr = gen_rtx (PLUS, Pmode, src_reg, GEN_INT (offset)); + dest_addr = gen_rtx (PLUS, Pmode, dest_reg, GEN_INT (offset)); + } + + /* Generate the appropriate load and store, saving the stores for later */ + if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT)) + { + move_bytes = 4; + tmp_reg = gen_reg_rtx (SImode); + emit_insn (gen_movsi (tmp_reg, gen_rtx (MEM, SImode, src_addr))); + stores[ num_reg++ ] = gen_movsi (gen_rtx (MEM, SImode, dest_addr), tmp_reg); + } + else if (bytes >= 2 && (align >= 2 || !STRICT_ALIGNMENT)) + { + move_bytes = 2; + tmp_reg = gen_reg_rtx (HImode); + emit_insn (gen_movhi (tmp_reg, gen_rtx (MEM, HImode, src_addr))); + stores[ num_reg++ ] = gen_movhi (gen_rtx (MEM, HImode, dest_addr), tmp_reg); + } + else + { + move_bytes = 1; + tmp_reg = gen_reg_rtx (QImode); + emit_insn (gen_movqi (tmp_reg, gen_rtx (MEM, QImode, src_addr))); + stores[ num_reg++ ] = gen_movqi (gen_rtx (MEM, QImode, dest_addr), tmp_reg); + } + + if (num_reg >= MAX_MOVE_REG) + { + for (i = 0; i < num_reg; i++) + emit_insn (stores[i]); + num_reg = 0; + } + } + + if (num_reg > 0) + { + for (i = 0; i < num_reg; i++) + emit_insn (stores[i]); + } + } + + return 1; +} + + /* Return 1 if OP is a load multiple operation. It is known to be a PARALLEL and the first section will be tested. */ @@ -723,6 +1559,78 @@ includes_rshift_p (shiftop, andop) return (INTVAL (andop) & ~ shift_mask) == 0; } + +/* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates + for lfq and stfq insns. + + Note reg1 and reg2 *must* be hard registers. To be sure we will + abort if we are passed pseudo registers. */ + +int +registers_ok_for_quad_peep (reg1, reg2) + rtx reg1, reg2; +{ + /* We might have been passed a SUBREG. */ + if (GET_CODE (reg1) != REG || GET_CODE (reg2) != REG) + return 0; + + return (REGNO (reg1) == REGNO (reg2) - 1); +} + +/* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and + addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */ + +int +addrs_ok_for_quad_peep (addr1, addr2) + register rtx addr1; + register rtx addr2; +{ + int reg1; + int offset1; + + /* Extract an offset (if used) from the first addr. */ + if (GET_CODE (addr1) == PLUS) + { + /* If not a REG, return zero. */ + if (GET_CODE (XEXP (addr1, 0)) != REG) + return 0; + else + { + reg1 = REGNO (XEXP (addr1, 0)); + /* The offset must be constant! */ + if (GET_CODE (XEXP (addr1, 1)) != CONST_INT) + return 0; + offset1 = INTVAL (XEXP (addr1, 1)); + } + } + else if (GET_CODE (addr1) != REG) + return 0; + else + { + reg1 = REGNO (addr1); + /* This was a simple (mem (reg)) expression. Offset is 0. */ + offset1 = 0; + } + + /* Make sure the second address is a (mem (plus (reg) (const_int). */ + if (GET_CODE (addr2) != PLUS) + return 0; + + if (GET_CODE (XEXP (addr2, 0)) != REG + || GET_CODE (XEXP (addr2, 1)) != CONST_INT) + return 0; + + if (reg1 != REGNO (XEXP (addr2, 0))) + return 0; + + /* The offset for the second addr must be 8 more than the first addr. */ + if (INTVAL (XEXP (addr2, 1)) != offset1 + 8) + return 0; + + /* All the tests passed. addr1 and addr2 are valid for lfq or stfq + instructions. */ + return 1; +} /* Return the register class of a scratch register needed to copy IN into or out of a register in CLASS in MODE. If it can be done directly, @@ -844,7 +1752,7 @@ print_operand (file, x, code) case '*': /* Write the register number of the TOC register. */ - fputs (TARGET_MINIMAL_TOC ? "30" : "2", file); + fputs (TARGET_MINIMAL_TOC ? reg_names[30] : reg_names[2], file); return; case 'A': @@ -948,14 +1856,6 @@ print_operand (file, x, code) print_operand (file, x, 0); return; - case 'H': - /* X must be a constant. Output the low order 5 bits plus 24. */ - if (! INT_P (x)) - output_operand_lossage ("invalid %%H value"); - - fprintf (file, "%d", (INT_LOWPART (x) + 24) & 31); - return; - case 'I': /* Print `i' if this is a constant, else nothing. */ if (INT_P (x)) @@ -1130,14 +2030,6 @@ print_operand (file, x, code) fprintf (file, "%d", (32 - INT_LOWPART (x)) & 31); return; - case 'S': - /* Low 5 bits of 31 - value */ - if (! INT_P (x)) - output_operand_lossage ("invalid %%S value"); - - fprintf (file, "%d", (31 - INT_LOWPART (x)) & 31); - return; - case 't': /* Write 12 if this jump operation will branch if true, 4 otherwise. All floating-point operations except NE branch true and integer @@ -1229,11 +2121,15 @@ print_operand (file, x, code) case 'z': /* X is a SYMBOL_REF. Write out the name preceded by a period and without any trailing data in brackets. Used for function - names. */ + names. If we are configured for System V (or the embedded ABI) on + the PowerPC, do not emit the period, since those systems do not use + TOCs and the like. */ if (GET_CODE (x) != SYMBOL_REF) abort (); +#ifndef USING_SVR4_H putc ('.', file); +#endif RS6000_OUTPUT_BASENAME (file, XSTR (x, 0)); return; @@ -1284,26 +2180,36 @@ print_operand_address (file, x) register rtx x; { if (GET_CODE (x) == REG) - fprintf (file, "0(%d)", REGNO (x)); + fprintf (file, "0(%s)", reg_names[ REGNO (x) ]); else if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == CONST) { output_addr_const (file, x); /* When TARGET_MINIMAL_TOC, use the indirected toc table pointer instead of the toc pointer. */ - if (TARGET_MINIMAL_TOC) - fprintf (file, "(30)"); +#ifdef TARGET_NO_TOC + if (TARGET_NO_TOC) + ; else - fprintf (file, "(2)"); +#endif + fprintf (file, "(%s)", reg_names[ TARGET_MINIMAL_TOC ? 30 : 2 ]); } else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == REG) { if (REGNO (XEXP (x, 0)) == 0) - fprintf (file, "%d,%d", REGNO (XEXP (x, 1)), REGNO (XEXP (x, 0))); + fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 1)) ], + reg_names[ REGNO (XEXP (x, 0)) ]); else - fprintf (file, "%d,%d", REGNO (XEXP (x, 0)), REGNO (XEXP (x, 1))); + fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 0)) ], + reg_names[ REGNO (XEXP (x, 1)) ]); } else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT) - fprintf (file, "%d(%d)", INTVAL (XEXP (x, 1)), REGNO (XEXP (x, 0))); + fprintf (file, "%d(%s)", INTVAL (XEXP (x, 1)), reg_names[ REGNO (XEXP (x, 0)) ]); + else if (TARGET_ELF && !TARGET_64BIT && GET_CODE (x) == LO_SUM + && GET_CODE (XEXP (x, 0)) == REG && CONSTANT_P (XEXP (x, 1))) + { + output_addr_const (file, XEXP (x, 1)); + fprintf (file, "@l(%s)", reg_names[ REGNO (XEXP (x, 0)) ]); + } else abort (); } @@ -1329,9 +2235,11 @@ first_reg_to_save () to 23 to do this. Don't use the frame pointer in reg 31. For now, save enough room for all of the parameter registers. */ +#ifndef USING_SVR4_H if (profile_flag) if (first_reg > 23) first_reg = 23; +#endif return first_reg; } @@ -1351,31 +2259,6 @@ first_fp_reg_to_save () return first_reg; } -/* Return 1 if we need to save CR. */ - -int -must_save_cr () -{ - return regs_ever_live[70] || regs_ever_live[71] || regs_ever_live[72]; -} - -/* Compute the size of the save area in the stack, including the space for - the fixed area. */ - -int -rs6000_sa_size () -{ - int size; - - /* We have the six fixed words, plus the size of the register save - areas, rounded to a double-word. */ - size = 6 + (32 - first_reg_to_save ()) + (64 - first_fp_reg_to_save ()) * 2; - if (size & 1) - size++; - - return size * 4; -} - /* Return non-zero if this function makes calls. */ int @@ -1394,44 +2277,352 @@ rs6000_makes_calls () return 0; } -/* Return non-zero if this function needs to push space on the stack. */ + +/* Calculate the stack information for the current function. This is + complicated by having two separate calling sequences, the AIX calling + sequence and the V.4 calling sequence. + + AIX stack frames look like: + + SP----> +---------------------------------------+ + | back chain to caller | 0 + +---------------------------------------+ + | saved CR | 4 + +---------------------------------------+ + | saved LR | 8 + +---------------------------------------+ + | reserved for compilers | 12 + +---------------------------------------+ + | reserved for binders | 16 + +---------------------------------------+ + | saved TOC pointer | 20 + +---------------------------------------+ + | Parameter save area (P) | 24 + +---------------------------------------+ + | Alloca space (A) | 24+P + +---------------------------------------+ + | Local variable space (L) | 24+P+A + +---------------------------------------+ + | Save area for GP registers (G) | 24+P+A+L + +---------------------------------------+ + | Save area for FP registers (F) | 24+P+A+L+G + +---------------------------------------+ + old SP->| back chain to caller's caller | + +---------------------------------------+ + + V.4 stack frames look like: + + SP----> +---------------------------------------+ + | back chain to caller | 0 + +---------------------------------------+ + | caller's saved LR | 4 + +---------------------------------------+ + | Parameter save area (P) | 8 + +---------------------------------------+ + | Alloca space (A) | 8+P + +---------------------------------------+ + | Varargs save area (V) | 8+P+A + +---------------------------------------+ + | Local variable space (L) | 8+P+A+V + +---------------------------------------+ + | saved CR (C) | 8+P+A+V+L + +---------------------------------------+ + | Save area for GP registers (G) | 8+P+A+V+L+C + +---------------------------------------+ + | Save area for FP registers (F) | 8+P+A+V+L+C+G + +---------------------------------------+ + old SP->| back chain to caller's caller | + +---------------------------------------+ +*/ + +rs6000_stack_t * +rs6000_stack_info () +{ + static rs6000_stack_t info, zero_info; + rs6000_stack_t *info_ptr = &info; + int reg_size = TARGET_64BIT ? 8 : 4; + enum rs6000_abi abi; + + /* Zero all fields portably */ + info = zero_info; + + /* Select which calling sequence */ +#ifdef TARGET_V4_CALLS + if (TARGET_V4_CALLS) + abi = ABI_V4; + else +#endif + abi = ABI_AIX; -int -rs6000_pushes_stack () + info_ptr->abi = abi; + + /* Calculate which registers need to be saved & save area size */ + info_ptr->first_gp_reg_save = first_reg_to_save (); + info_ptr->gp_size = reg_size * (32 - info_ptr->first_gp_reg_save); + + info_ptr->first_fp_reg_save = first_fp_reg_to_save (); + info_ptr->fp_size = 8 * (64 - info_ptr->first_fp_reg_save); + + /* Does this function call anything? */ + info_ptr->calls_p = rs6000_makes_calls (); + + /* Determine if we need to save the link register */ + if (regs_ever_live[65] || profile_flag +#ifdef TARGET_RELOCATABLE + || (TARGET_RELOCATABLE && (get_pool_size () != 0)) +#endif + || (info_ptr->first_fp_reg_save != 64 + && !FP_SAVE_INLINE (info_ptr->first_fp_reg_save)) + || (abi == ABI_V4 && current_function_calls_alloca) + || info_ptr->calls_p) + { + info_ptr->lr_save_p = 1; + regs_ever_live[65] = 1; + } + + /* Determine if we need to save the condition code registers */ + if (regs_ever_live[70] || regs_ever_live[71] || regs_ever_live[72]) + { + info_ptr->cr_save_p = 1; + if (abi == ABI_V4) + info_ptr->cr_size = reg_size; + } + + /* Determine various sizes */ + info_ptr->reg_size = reg_size; + info_ptr->fixed_size = RS6000_SAVE_AREA; + info_ptr->varargs_size = RS6000_VARARGS_AREA; + info_ptr->vars_size = ALIGN (get_frame_size (), 8); + info_ptr->parm_size = ALIGN (current_function_outgoing_args_size, 8); + info_ptr->save_size = ALIGN (info_ptr->fp_size + info_ptr->gp_size + info_ptr->cr_size, 8); + info_ptr->total_size = ALIGN (info_ptr->vars_size + + info_ptr->parm_size + + info_ptr->save_size + + info_ptr->varargs_size + + info_ptr->fixed_size, STACK_BOUNDARY / BITS_PER_UNIT); + + /* Determine if we need to allocate any stack frame. + For AIX We need to push the stack if a frame pointer is needed (because + the stack might be dynamically adjusted), if we are debugging, if the + total stack size is more than 220 bytes, or if we make calls. + + For V.4 we don't have the stack cushion that AIX uses, but assume that + the debugger can handle stackless frames. */ + + if (info_ptr->calls_p) + info_ptr->push_p = 1; + + else if (abi == ABI_V4) + info_ptr->push_p = (info_ptr->total_size > info_ptr->fixed_size + || info_ptr->lr_save_p); + + else + info_ptr->push_p = (frame_pointer_needed + || write_symbols != NO_DEBUG + || info_ptr->total_size > 220); + + /* Calculate the offsets */ + info_ptr->fp_save_offset = - info_ptr->fp_size; + info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size; + switch (abi) + { + default: + info_ptr->cr_save_offset = 4; + info_ptr->lr_save_offset = 8; + break; + + case ABI_V4: + info_ptr->cr_save_offset = info_ptr->gp_save_offset - reg_size; + info_ptr->lr_save_offset = reg_size; + break; + } + + /* Zero offsets if we're not saving those registers */ + if (!info_ptr->fp_size) + info_ptr->fp_save_offset = 0; + + if (!info_ptr->gp_size) + info_ptr->gp_save_offset = 0; + + if (!info_ptr->lr_save_p) + info_ptr->lr_save_offset = 0; + + if (!info_ptr->cr_save_p) + info_ptr->cr_save_offset = 0; + + return info_ptr; +} + +void +debug_stack_info (info) + rs6000_stack_t *info; { - int total_size = (rs6000_sa_size () + get_frame_size () - + current_function_outgoing_args_size); + char *abi_string; + + if (!info) + info = rs6000_stack_info (); + + fprintf (stderr, "\nStack information for function %s:\n", + ((current_function_decl && DECL_NAME (current_function_decl)) + ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl)) + : "")); + + switch (info->abi) + { + default: abi_string = "Unknown"; break; + case ABI_NONE: abi_string = "NONE"; break; + case ABI_AIX: abi_string = "AIX"; break; + case ABI_V4: abi_string = "V.4"; break; + } + + fprintf (stderr, "\tABI = %5s\n", abi_string); + + if (info->first_gp_reg_save != 32) + fprintf (stderr, "\tfirst_gp_reg_save = %5d\n", info->first_gp_reg_save); + + if (info->first_fp_reg_save != 64) + fprintf (stderr, "\tfirst_fp_reg_save = %5d\n", info->first_fp_reg_save); + + if (info->lr_save_p) + fprintf (stderr, "\tlr_save_p = %5d\n", info->lr_save_p); + + if (info->cr_save_p) + fprintf (stderr, "\tcr_save_p = %5d\n", info->cr_save_p); + + if (info->push_p) + fprintf (stderr, "\tpush_p = %5d\n", info->push_p); + + if (info->calls_p) + fprintf (stderr, "\tcalls_p = %5d\n", info->calls_p); + + if (info->gp_save_offset) + fprintf (stderr, "\tgp_save_offset = %5d\n", info->gp_save_offset); - /* We need to push the stack if a frame pointer is needed (because the - stack might be dynamically adjusted), if we are debugging, if the - total stack size is more than 220 bytes, or if we make calls. */ + if (info->fp_save_offset) + fprintf (stderr, "\tfp_save_offset = %5d\n", info->fp_save_offset); - return (frame_pointer_needed || write_symbols != NO_DEBUG - || total_size > 220 - || rs6000_makes_calls ()); + if (info->lr_save_offset) + fprintf (stderr, "\tlr_save_offset = %5d\n", info->lr_save_offset); + + if (info->cr_save_offset) + fprintf (stderr, "\tcr_save_offset = %5d\n", info->cr_save_offset); + + if (info->varargs_save_offset) + fprintf (stderr, "\tvarargs_save_offset = %5d\n", info->varargs_save_offset); + + if (info->total_size) + fprintf (stderr, "\ttotal_size = %5d\n", info->total_size); + + if (info->varargs_size) + fprintf (stderr, "\tvarargs_size = %5d\n", info->varargs_size); + + if (info->vars_size) + fprintf (stderr, "\tvars_size = %5d\n", info->vars_size); + + if (info->parm_size) + fprintf (stderr, "\tparm_size = %5d\n", info->parm_size); + + if (info->fixed_size) + fprintf (stderr, "\tfixed_size = %5d\n", info->fixed_size); + + if (info->gp_size) + fprintf (stderr, "\tgp_size = %5d\n", info->gp_size); + + if (info->fp_size) + fprintf (stderr, "\tfp_size = %5d\n", info->fp_size); + + if (info->cr_size) + fprintf (stderr, "\tcr_size = %5d\n", info->cr_size); + + if (info->save_size) + fprintf (stderr, "\tsave_size = %5d\n", info->save_size); + + if (info->reg_size != 4) + fprintf (stderr, "\treg_size = %5d\n", info->reg_size); + + fprintf (stderr, "\n"); } -/* Write function prologue. */ + + +#ifdef USING_SVR4_H +/* Write out a System V.4 style traceback table before the prologue + + At present, only emit the basic tag table (ie, do not emit tag_types other + than 0, which might use more than 1 tag word). + + The first tag word looks like: + + 0 1 2 3 + 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + | 0 |ver| tag |e|s| alloca | # fprs | # gprs |s|l|c|f| + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + +*/ + +void +svr4_traceback (file, name, decl) + FILE *file; + tree name, decl; +{ + rs6000_stack_t *info = rs6000_stack_info (); + long tag; + long version = 0; /* version number */ + long tag_type = 0; /* function type */ + long extended_tag = 0; /* additional tag words needed */ + long spare = 0; /* reserved for future use */ + long fpscr_max = 0; /* 1 if the function has a FPSCR save word */ + long fpr_max = 64 - info->first_fp_reg_save; /* # of floating point registers saved */ + long gpr_max = 32 - info->first_gp_reg_save; /* # of general purpose registers saved */ + long alloca_reg; /* stack/frame register */ + + if (frame_pointer_needed) + alloca_reg = 31; + + else if (info->push_p != 0) + alloca_reg = 1; + + else + alloca_reg = 0; + tag = ((version << 24) + | (tag_type << 21) + | (extended_tag << 20) + | (spare << 19) + | (alloca_reg << 14) + | (fpr_max << 9) + | (gpr_max << 4) + | (info->push_p << 3) + | (info->lr_save_p << 2) + | (info->cr_save_p << 1) + | (fpscr_max << 0)); + + fprintf (file, "\t.long 0x%lx\n", tag); +} + +#endif /* USING_SVR4_H */ + +/* Write function prologue. */ void output_prolog (file, size) FILE *file; int size; { - int first_reg = first_reg_to_save (); - int must_push = rs6000_pushes_stack (); - int first_fp_reg = first_fp_reg_to_save (); - int basic_size = rs6000_sa_size (); - int total_size = (basic_size + size + current_function_outgoing_args_size); + rs6000_stack_t *info = rs6000_stack_info (); + char *store_reg = (TARGET_64BIT) ? "\tstd %s,%d(%s)" : "\t{st|stw} %s,%d(%s)\n"; - /* Round size to multiple of 8 bytes. */ - total_size = (total_size + 7) & ~7; + if (TARGET_DEBUG_STACK) + debug_stack_info (info); /* Write .extern for any function we will call to save and restore fp values. */ - if (first_fp_reg < 62) - fprintf (file, "\t.extern ._savef%d\n\t.extern ._restf%d\n", - first_fp_reg - 32, first_fp_reg - 32); +#ifndef USING_SVR4_H + if (info->first_fp_reg_save < 62) + fprintf (file, "\t.extern %s%d%s\n\t.extern %s%d%s\n", + SAVE_FP_PREFIX, info->first_fp_reg_save - 32, SAVE_FP_SUFFIX, + RESTORE_FP_PREFIX, info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX); +#endif /* Write .extern for truncation routines, if needed. */ if (rs6000_trunc_used && ! trunc_defined) @@ -1440,6 +2631,7 @@ output_prolog (file, size) RS6000_ITRUNC, RS6000_UITRUNC); trunc_defined = 1; } + /* Write .extern for AIX common mode routines, if needed. */ if (! TARGET_POWER && ! TARGET_POWERPC && ! common_mode_defined) { @@ -1452,84 +2644,140 @@ output_prolog (file, size) common_mode_defined = 1; } - /* If we have to call a function to save fpr's, or if we are doing profiling, - then we will be using LR. */ - if (first_fp_reg < 62 || profile_flag) - regs_ever_live[65] = 1; - /* If we use the link register, get it into r0. */ - if (regs_ever_live[65]) - asm_fprintf (file, "\tmflr 0\n"); + if (info->lr_save_p) + asm_fprintf (file, "\tmflr %s\n", reg_names[0]); /* If we need to save CR, put it into r12. */ - if (must_save_cr ()) - asm_fprintf (file, "\tmfcr 12\n"); + if (info->cr_save_p) + asm_fprintf (file, "\tmfcr %s\n", reg_names[12]); /* Do any required saving of fpr's. If only one or two to save, do it ourself. Otherwise, call function. Note that since they are statically linked, we do not need a nop following them. */ - if (first_fp_reg == 62) - asm_fprintf (file, "\tstfd 30,-16(1)\n\tstfd 31,-8(1)\n"); - else if (first_fp_reg == 63) - asm_fprintf (file, "\tstfd 31,-8(1)\n"); - else if (first_fp_reg != 64) - asm_fprintf (file, "\tbl ._savef%d\n", first_fp_reg - 32); + if (FP_SAVE_INLINE (info->first_fp_reg_save)) + { + int regno = info->first_fp_reg_save; + int loc = info->fp_save_offset; + + for ( ; regno < 64; regno++, loc += 8) + asm_fprintf (file, "\tstfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[1]); + } + else if (info->first_fp_reg_save != 64) + asm_fprintf (file, "\tbl %s%d%s\n", SAVE_FP_PREFIX, + info->first_fp_reg_save - 32, SAVE_FP_SUFFIX); /* Now save gpr's. */ - if (! TARGET_POWER || first_reg == 31) + if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT) { - int regno, loc; + int regno = info->first_gp_reg_save; + int loc = info->gp_save_offset; + int reg_size = (TARGET_64BIT) ? 8 : 4; - for (regno = first_reg, - loc = - (32 - first_reg) * 4 - (64 - first_fp_reg) * 8; - regno < 32; - regno++, loc += 4) - asm_fprintf (file, "\t{st|stw} %d,%d(1)\n", regno, loc); + for ( ; regno < 32; regno++, loc += reg_size) + asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[1]); } - else if (first_reg != 32) - asm_fprintf (file, "\t{stm|stmw} %d,%d(1)\n", first_reg, - - (32 - first_reg) * 4 - (64 - first_fp_reg) * 8); + else if (info->first_gp_reg_save != 32) + asm_fprintf (file, "\t{stm|stmw} %s,%d(%s)\n", + reg_names[info->first_gp_reg_save], + info->gp_save_offset, + reg_names[1]); /* Save lr if we used it. */ - if (regs_ever_live[65]) - asm_fprintf (file, "\t{st|stw} 0,8(1)\n"); + if (info->lr_save_p) + asm_fprintf (file, store_reg, reg_names[0], info->lr_save_offset, reg_names[1]); /* Save CR if we use any that must be preserved. */ - if (must_save_cr ()) - asm_fprintf (file, "\t{st|stw} 12,4(1)\n"); + if (info->cr_save_p) + asm_fprintf (file, store_reg, reg_names[12], info->cr_save_offset, reg_names[1]); /* Update stack and set back pointer. */ - if (must_push) + if (info->push_p) { - if (total_size < 32767) - asm_fprintf (file, "\t{stu|stwu} 1,%d(1)\n", - total_size); + if (info->total_size < 32767) + asm_fprintf (file, + (TARGET_64BIT) ? "\tstdu %s,%d(%s)\n" : "\t{stu|stwu} %s,%d(%s)\n", + reg_names[1], - info->total_size, reg_names[1]); else { - asm_fprintf (file, "\t{cau 0,0,%d|lis 0,%d}\n\t{oril|ori} 0,0,%d\n", - (total_size >> 16) & 0xffff, total_size & 0xffff); - if (TARGET_POWERPC) - asm_fprintf (file, "\tsubf 12,0,1\n"); - else - asm_fprintf (file, "\t{sf|subfc} 12,0,1\n"); - asm_fprintf (file, "\t{st|stw} 1,0(12)\n\tmr 1,12\n"); + int neg_size = - info->total_size; + asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n", + reg_names[0], (neg_size >> 16) & 0xffff, + reg_names[0], reg_names[0], neg_size & 0xffff); + asm_fprintf (file, + (TARGET_64BIT) ? "\tstdux %s,%s,%s\n" : "\t{stux|stwux} %s,%s,%s\n", + reg_names[1], reg_names[1], reg_names[0]); } } /* Set frame pointer, if needed. */ if (frame_pointer_needed) - asm_fprintf (file, "\tmr 31,1\n"); + asm_fprintf (file, "\tmr %s,%s\n", reg_names[31], reg_names[1]); /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the TOC_TABLE address into register 30. */ - if (TARGET_MINIMAL_TOC && get_pool_size () != 0) + if (TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0) { - char buf[100]; + char buf[256]; +#ifdef USING_SVR4_H + if (TARGET_RELOCATABLE) + { + ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); + fprintf (file, "\tbl "); + assemble_name (file, buf); + fprintf (file, "\n"); + + ASM_OUTPUT_INTERNAL_LABEL (file, "LCF", rs6000_pic_labelno); + fprintf (file, "\tmflr %s\n", reg_names[30]); + + if (TARGET_POWERPC64) + fprintf (file, "\tld"); + else if (TARGET_NEW_MNEMONICS) + fprintf (file, "\tlwz"); + else + fprintf (file, "\tl"); + + fprintf (file, " %s,(", reg_names[0]); + ASM_GENERATE_INTERNAL_LABEL (buf, "LCL", rs6000_pic_labelno); + assemble_name (file, buf); + fprintf (file, "-"); + ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); + assemble_name (file, buf); + fprintf (file, ")(%s)\n", reg_names[30]); + asm_fprintf (file, "\t{cax|add} %s,%s,%s\n", + reg_names[30], reg_names[0], reg_names[30]); + rs6000_pic_labelno++; + } + else if (!TARGET_64BIT) + { + ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1); + asm_fprintf (file, "\t{cau|addis} %s,%s,", reg_names[30], reg_names[0]); + assemble_name (file, buf); + asm_fprintf (file, "@ha\n"); + if (TARGET_NEW_MNEMONICS) + { + asm_fprintf (file, "\taddi %s,%s,", reg_names[30], reg_names[30]); + assemble_name (file, buf); + asm_fprintf (file, "@l\n"); + } + else + { + asm_fprintf (file, "\tcal %s,", reg_names[30]); + assemble_name (file, buf); + asm_fprintf (file, "@l(%s)\n", reg_names[30]); + } + } + else + abort (); + +#else /* !USING_SVR4_H */ ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 0); - asm_fprintf (file, "\t{l|lwz} 30,"); + asm_fprintf (file, "\t{l|lwz} %s,", reg_names[30]); assemble_name (file, buf); - asm_fprintf (file, "(2)\n"); + asm_fprintf (file, "(%s)\n", reg_names[2]); +#endif /* USING_SVR4_H */ } } @@ -1540,15 +2788,14 @@ output_epilog (file, size) FILE *file; int size; { - int first_reg = first_reg_to_save (); - int must_push = rs6000_pushes_stack (); - int first_fp_reg = first_fp_reg_to_save (); - int basic_size = rs6000_sa_size (); - int total_size = (basic_size + size + current_function_outgoing_args_size); + rs6000_stack_t *info = rs6000_stack_info (); + char *load_reg = (TARGET_64BIT) ? "\tld %s,%d(%s)" : "\t{l|lwz} %s,%d(%s)\n"; rtx insn = get_last_insn (); + int i; - /* Round size to multiple of 8 bytes. */ - total_size = (total_size + 7) & ~7; + /* Forget about any temporaries created */ + for (i = 0; i < NUM_MACHINE_MODES; i++) + stack_temps[i] = NULL_RTX; /* If the last insn was a BARRIER, we don't have to write anything except the trace table. */ @@ -1560,57 +2807,68 @@ output_epilog (file, size) frame, restore the old stack pointer using the backchain. Otherwise, we know what size to update it with. */ if (frame_pointer_needed || current_function_calls_alloca - || total_size > 32767) - asm_fprintf (file, "\t{l|lwz} 1,0(1)\n"); - else if (must_push) - asm_fprintf (file, "\t{cal 1,%d(1)|addi 1,1,%d}\n", total_size); + || info->total_size > 32767) + asm_fprintf (file, load_reg, reg_names[1], 0, reg_names[1]); + else if (info->push_p) + { + if (TARGET_NEW_MNEMONICS) + asm_fprintf (file, "\taddi %s,%s,%d\n", reg_names[1], reg_names[1], info->total_size); + else + asm_fprintf (file, "\tcal %s,%d(%s)\n", reg_names[1], info->total_size, reg_names[1]); + } /* Get the old lr if we saved it. */ - if (regs_ever_live[65]) - asm_fprintf (file, "\t{l|lwz} 0,8(1)\n"); + if (info->lr_save_p) + asm_fprintf (file, load_reg, reg_names[0], info->lr_save_offset, reg_names[1]); /* Get the old cr if we saved it. */ - if (must_save_cr ()) - asm_fprintf (file, "\t{l|lwz} 12,4(1)\n"); + if (info->cr_save_p) + asm_fprintf (file, load_reg, reg_names[12], info->cr_save_offset, reg_names[1]); /* Set LR here to try to overlap restores below. */ - if (regs_ever_live[65]) - asm_fprintf (file, "\tmtlr 0\n"); + if (info->lr_save_p) + asm_fprintf (file, "\tmtlr %s\n", reg_names[0]); /* Restore gpr's. */ - if (! TARGET_POWER || first_reg == 31) + if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT) { - int regno, loc; + int regno = info->first_gp_reg_save; + int loc = info->gp_save_offset; + int reg_size = (TARGET_64BIT) ? 8 : 4; - for (regno = first_reg, - loc = - (32 - first_reg) * 4 - (64 - first_fp_reg) * 8; - regno < 32; - regno++, loc += 4) - asm_fprintf (file, "\t{l|lwz} %d,%d(1)\n", regno, loc); + for ( ; regno < 32; regno++, loc += reg_size) + asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[1]); } - else if (first_reg != 32) - asm_fprintf (file, "\t{lm|lmw} %d,%d(1)\n", first_reg, - - (32 - first_reg) * 4 - (64 - first_fp_reg) * 8); + else if (info->first_gp_reg_save != 32) + asm_fprintf (file, "\t{lm|lmw} %s,%d(%s)\n", + reg_names[info->first_gp_reg_save], + info->gp_save_offset, + reg_names[1]); /* Restore fpr's if we can do it without calling a function. */ - if (first_fp_reg == 62) - asm_fprintf (file, "\tlfd 30,-16(1)\n\tlfd 31,-8(1)\n"); - else if (first_fp_reg == 63) - asm_fprintf (file, "\tlfd 31,-8(1)\n"); + if (FP_SAVE_INLINE (info->first_fp_reg_save)) + { + int regno = info->first_fp_reg_save; + int loc = info->fp_save_offset; + + for ( ; regno < 64; regno++, loc += 8) + asm_fprintf (file, "\tlfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[1]); + } /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4 that were used. */ - if (must_save_cr ()) - asm_fprintf (file, "\tmtcrf %d,12\n", + if (info->cr_save_p) + asm_fprintf (file, "\tmtcrf %d,%s\n", (regs_ever_live[70] != 0) * 0x20 + (regs_ever_live[71] != 0) * 0x10 - + (regs_ever_live[72] != 0) * 0x8); + + (regs_ever_live[72] != 0) * 0x8, reg_names[12]); /* If we have to restore more than two FP registers, branch to the restore function. It will return to our caller. */ - if (first_fp_reg < 62) - asm_fprintf (file, "\tb ._restf%d\n", first_fp_reg - 32); + if (info->first_fp_reg_save != 64 && !FP_SAVE_INLINE (info->first_fp_reg_save)) + asm_fprintf (file, "\tb %s%d%s\n", RESTORE_FP_PREFIX, + info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX); else asm_fprintf (file, "\t{br|blr}\n"); } @@ -1625,7 +2883,11 @@ output_epilog (file, size) middle, and the two halves are placed at locations far apart in memory.'' The traceback table has this property, since it includes the offset from the start of the function to the - traceback table itself. */ + traceback table itself. + + System V.4 Powerpc's (and the embedded ABI derived from it) use a + different traceback table located before the prologue. */ +#ifndef USING_SVR4_H if (! flag_inhibit_size_directive) { char *fname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0); @@ -1680,7 +2942,7 @@ output_epilog (file, size) has controlled storage, function has no toc, function uses fp, function logs/aborts fp operations. */ /* Assume that fp operations are used if any fp reg must be saved. */ - fprintf (file, "%d,", (1 << 5) | ((first_fp_reg != 64) << 1)); + fprintf (file, "%d,", (1 << 5) | ((info->first_fp_reg_save != 64) << 1)); /* 6 bitfields: function is interrupt handler, name present in proc table, function calls alloca, on condition directives @@ -1690,12 +2952,12 @@ output_epilog (file, size) set up as a frame pointer, even when there is no alloca call. */ fprintf (file, "%d,", ((1 << 6) | (frame_pointer_needed << 5) - | (must_save_cr () << 1) | (regs_ever_live[65]))); + | (info->cr_save_p << 1) | (info->lr_save_p))); /* 3 bitfields: saves backchain, spare bit, number of fpr saved (6 bits). */ fprintf (file, "%d,", - (must_push << 7) | (64 - first_fp_reg_to_save ())); + (info->push_p << 7) | (64 - info->first_fp_reg_save)); /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */ fprintf (file, "%d,", (32 - first_reg_to_save ())); @@ -1803,6 +3065,10 @@ output_epilog (file, size) if (frame_pointer_needed) fprintf (file, "\t.byte 31\n"); } +#endif /* !USING_SVR4_H */ + + /* Reset varargs indicator */ + rs6000_sysv_varargs_p = 0; } /* Output a TOC entry. We derive the entry name from what is @@ -1819,24 +3085,48 @@ output_toc (file, x, labelno) rtx base = x; int offset = 0; - ASM_OUTPUT_INTERNAL_LABEL (file, "LC", labelno); + if (TARGET_NO_TOC) + abort (); + + /* if we're going to put a double constant in the TOC, make sure it's + aligned properly when strict alignment is on. */ + if (GET_CODE (x) == CONST_DOUBLE + && STRICT_ALIGNMENT + && GET_MODE (x) == DFmode + && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) { + ASM_OUTPUT_ALIGN (file, 3); + } + + +#ifdef USING_SVR4_H + if (TARGET_MINIMAL_TOC) + { + ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LC"); + fprintf (file, "%d = .-", labelno); + ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LCTOC"); + fprintf (file, "1\n"); + } + else +#endif /* USING_SVR4_H */ + ASM_OUTPUT_INTERNAL_LABEL (file, "LC", labelno); /* Handle FP constants specially. Note that if we have a minimal TOC, things we put here aren't actually in the TOC, so we can allow FP constants. */ if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == DFmode - && TARGET_FLOAT_FORMAT == HOST_FLOAT_FORMAT - && BITS_PER_WORD == HOST_BITS_PER_INT && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) { + REAL_VALUE_TYPE r; + long l[2]; + + REAL_VALUE_FROM_CONST_DOUBLE (r, x); + REAL_VALUE_TO_TARGET_DOUBLE (r, l); if (TARGET_MINIMAL_TOC) - fprintf (file, "\t.long %d\n\t.long %d\n", - CONST_DOUBLE_LOW (x), CONST_DOUBLE_HIGH (x)); + fprintf (file, "\t.long %ld\n\t.long %ld\n", l[0], l[1]); else - fprintf (file, "\t.tc FD_%x_%x[TC],%d,%d\n", - CONST_DOUBLE_LOW (x), CONST_DOUBLE_HIGH (x), - CONST_DOUBLE_LOW (x), CONST_DOUBLE_HIGH (x)); + fprintf (file, "\t.tc FD_%lx_%lx[TC],%ld,%ld\n", + l[0], l[1], l[0], l[1]); return; } else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode @@ -2019,6 +3309,9 @@ output_function_profiler (file, labelno) FILE *file; int labelno; { +#ifdef USING_SVR4_H + abort (); +#else /* The last used parameter register. */ int last_parm_reg; int i, j; @@ -2070,6 +3363,7 @@ output_function_profiler (file, labelno) for (i = 3, j = 30; i <= last_parm_reg; i++, j--) fprintf (file, "\tai %d,%d,0\n", i, j); +#endif } /* Adjust the cost of a scheduling dependency. Return the new cost of