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1.1 root 1: /* Subroutines used for code generation on IBM RS/6000. 1.1.1.3 ! root 2: Copyright (C) 1991, 1993, 1994 Free Software Foundation, Inc. ! 3: Contributed by Richard Kenner ([email protected]) 1.1 root 4: 5: This file is part of GNU CC. 6: 7: GNU CC is free software; you can redistribute it and/or modify 8: it under the terms of the GNU General Public License as published by 9: the Free Software Foundation; either version 2, or (at your option) 10: any later version. 11: 12: GNU CC is distributed in the hope that it will be useful, 13: but WITHOUT ANY WARRANTY; without even the implied warranty of 14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15: GNU General Public License for more details. 16: 17: You should have received a copy of the GNU General Public License 18: along with GNU CC; see the file COPYING. If not, write to 19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ 20: 21: #include <stdio.h> 1.1.1.3 ! root 22: #include <ctype.h> 1.1 root 23: #include "config.h" 24: #include "rtl.h" 25: #include "regs.h" 26: #include "hard-reg-set.h" 27: #include "real.h" 28: #include "insn-config.h" 29: #include "conditions.h" 30: #include "insn-flags.h" 31: #include "output.h" 32: #include "insn-attr.h" 33: #include "flags.h" 34: #include "recog.h" 35: #include "expr.h" 36: #include "obstack.h" 37: #include "tree.h" 38: 39: extern char *language_string; 1.1.1.2 root 40: extern int profile_block_flag; 1.1 root 41: 42: #define min(A,B) ((A) < (B) ? (A) : (B)) 43: #define max(A,B) ((A) > (B) ? (A) : (B)) 44: 1.1.1.2 root 45: /* Target cpu type */ 46: 47: enum processor_type rs6000_cpu; 48: char *rs6000_cpu_string; 49: 1.1 root 50: /* Set to non-zero by "fix" operation to indicate that itrunc and 51: uitrunc must be defined. */ 52: 53: int rs6000_trunc_used; 54: 55: /* Set to non-zero once they have been defined. */ 56: 57: static int trunc_defined; 58: 1.1.1.3 ! root 59: /* Set to non-zero once AIX common-mode calls have been defined. */ ! 60: static int common_mode_defined; 1.1 root 61: /* Save information from a "cmpxx" operation until the branch or scc is 62: emitted. */ 63: 64: rtx rs6000_compare_op0, rs6000_compare_op1; 65: int rs6000_compare_fp_p; 66: 1.1.1.2 root 67: /* Override command line options. Mostly we process the processor 68: type and sometimes adjust other TARGET_ options. */ 69: 70: void 71: rs6000_override_options () 72: { 73: int i; 74: 75: /* Simplify the entries below by making a mask for any POWER 76: variant and any PowerPC variant. */ 77: 78: #define POWER_MASKS (MASK_POWER | MASK_POWER2) 1.1.1.3 ! root 79: #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \ ! 80: | MASK_PPC_GFXOPT | MASK_POWERPC64) ! 81: #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT) 1.1.1.2 root 82: 83: static struct ptt 84: { 85: char *name; /* Canonical processor name. */ 86: enum processor_type processor; /* Processor type enum value. */ 87: int target_enable; /* Target flags to enable. */ 88: int target_disable; /* Target flags to disable. */ 89: } processor_target_table[] 1.1.1.3 ! root 90: = {{"common", PROCESSOR_COMMON, 0, POWER_MASKS | POWERPC_MASKS}, ! 91: {"power", PROCESSOR_POWER, ! 92: MASK_POWER, ! 93: MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, ! 94: {"powerpc", PROCESSOR_POWERPC, ! 95: MASK_POWERPC | MASK_NEW_MNEMONICS, ! 96: POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, ! 97: {"rios", PROCESSOR_RIOS1, ! 98: MASK_POWER, ! 99: MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, ! 100: {"rios1", PROCESSOR_RIOS1, ! 101: MASK_POWER, ! 102: MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, ! 103: {"rsc", PROCESSOR_PPC601, ! 104: MASK_POWER, ! 105: MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, ! 106: {"rsc1", PROCESSOR_PPC601, ! 107: MASK_POWER, ! 108: MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, ! 109: {"rios2", PROCESSOR_RIOS2, ! 110: MASK_POWER | MASK_POWER2, ! 111: POWERPC_MASKS | MASK_NEW_MNEMONICS}, 1.1.1.2 root 112: {"601", PROCESSOR_PPC601, 113: MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS, 1.1.1.3 ! root 114: MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64}, 1.1.1.2 root 115: {"mpc601", PROCESSOR_PPC601, 116: MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS, 1.1.1.3 ! root 117: MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64}, 1.1.1.2 root 118: {"ppc601", PROCESSOR_PPC601, 119: MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS, 1.1.1.3 ! root 120: MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64}, 1.1.1.2 root 121: {"603", PROCESSOR_PPC603, 1.1.1.3 ! root 122: MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, ! 123: POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, 1.1.1.2 root 124: {"mpc603", PROCESSOR_PPC603, 1.1.1.3 ! root 125: MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, ! 126: POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, 1.1.1.2 root 127: {"ppc603", PROCESSOR_PPC603, 1.1.1.3 ! root 128: MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, ! 129: POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, 1.1.1.2 root 130: {"604", PROCESSOR_PPC604, 1.1.1.3 ! root 131: MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, ! 132: POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, 1.1.1.2 root 133: {"mpc604", PROCESSOR_PPC604, 1.1.1.3 ! root 134: MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, ! 135: POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, 1.1.1.2 root 136: {"ppc604", PROCESSOR_PPC604, 1.1.1.3 ! root 137: MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, ! 138: POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}}; 1.1.1.2 root 139: 140: int ptt_size = sizeof (processor_target_table) / sizeof (struct ptt); 141: 142: profile_block_flag = 0; 143: 144: /* Identify the processor type */ 145: if (rs6000_cpu_string == 0) 146: rs6000_cpu = PROCESSOR_DEFAULT; 147: else 148: { 149: for (i = 0; i < ptt_size; i++) 150: if (! strcmp (rs6000_cpu_string, processor_target_table[i].name)) 151: { 152: rs6000_cpu = processor_target_table[i].processor; 153: target_flags |= processor_target_table[i].target_enable; 154: target_flags &= ~processor_target_table[i].target_disable; 155: break; 156: } 157: 158: if (i == ptt_size) 159: { 160: error ("bad value (%s) for -mcpu= switch", rs6000_cpu_string); 161: rs6000_cpu_string = "default"; 162: rs6000_cpu = PROCESSOR_DEFAULT; 163: } 164: } 165: } 166: 1.1 root 167: /* Return non-zero if this function is known to have a null epilogue. */ 168: 169: int 170: direct_return () 171: { 172: return (reload_completed 173: && first_reg_to_save () == 32 174: && first_fp_reg_to_save () == 64 175: && ! regs_ever_live[65] 176: && ! rs6000_pushes_stack ()); 177: } 178: 179: /* Returns 1 always. */ 180: 181: int 182: any_operand (op, mode) 183: register rtx op; 184: enum machine_mode mode; 185: { 186: return 1; 187: } 188: 189: /* Return 1 if OP is a constant that can fit in a D field. */ 190: 191: int 192: short_cint_operand (op, mode) 193: register rtx op; 194: enum machine_mode mode; 195: { 196: return (GET_CODE (op) == CONST_INT 197: && (unsigned) (INTVAL (op) + 0x8000) < 0x10000); 198: } 199: 200: /* Similar for a unsigned D field. */ 201: 202: int 203: u_short_cint_operand (op, mode) 204: register rtx op; 205: enum machine_mode mode; 206: { 207: return (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff0000) == 0); 208: } 209: 210: /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */ 211: 212: int 213: non_short_cint_operand (op, mode) 214: register rtx op; 215: enum machine_mode mode; 216: { 217: return (GET_CODE (op) == CONST_INT 218: && (unsigned) (INTVAL (op) + 0x8000) >= 0x10000); 219: } 220: 221: /* Returns 1 if OP is a register that is not special (i.e., not MQ, 222: ctr, or lr). */ 223: 224: int 225: gpc_reg_operand (op, mode) 226: register rtx op; 227: enum machine_mode mode; 228: { 229: return (register_operand (op, mode) 230: && (GET_CODE (op) != REG || REGNO (op) >= 67 || REGNO (op) < 64)); 231: } 232: 233: /* Returns 1 if OP is either a pseudo-register or a register denoting a 234: CR field. */ 235: 236: int 237: cc_reg_operand (op, mode) 238: register rtx op; 239: enum machine_mode mode; 240: { 241: return (register_operand (op, mode) 242: && (GET_CODE (op) != REG 243: || REGNO (op) >= FIRST_PSEUDO_REGISTER 244: || CR_REGNO_P (REGNO (op)))); 245: } 246: 247: /* Returns 1 if OP is either a constant integer valid for a D-field or a 248: non-special register. If a register, it must be in the proper mode unless 249: MODE is VOIDmode. */ 250: 251: int 252: reg_or_short_operand (op, mode) 253: register rtx op; 254: enum machine_mode mode; 255: { 1.1.1.2 root 256: return short_cint_operand (op, mode) || gpc_reg_operand (op, mode); 1.1 root 257: } 258: 259: /* Similar, except check if the negation of the constant would be valid for 260: a D-field. */ 261: 262: int 263: reg_or_neg_short_operand (op, mode) 264: register rtx op; 265: enum machine_mode mode; 266: { 267: if (GET_CODE (op) == CONST_INT) 268: return CONST_OK_FOR_LETTER_P (INTVAL (op), 'P'); 269: 270: return gpc_reg_operand (op, mode); 271: } 272: 273: /* Return 1 if the operand is either a register or an integer whose high-order 274: 16 bits are zero. */ 275: 276: int 277: reg_or_u_short_operand (op, mode) 278: register rtx op; 279: enum machine_mode mode; 280: { 281: if (GET_CODE (op) == CONST_INT 282: && (INTVAL (op) & 0xffff0000) == 0) 283: return 1; 284: 285: return gpc_reg_operand (op, mode); 286: } 287: 288: /* Return 1 is the operand is either a non-special register or ANY 289: constant integer. */ 290: 291: int 292: reg_or_cint_operand (op, mode) 293: register rtx op; 294: enum machine_mode mode; 295: { 296: return GET_CODE (op) == CONST_INT || gpc_reg_operand (op, mode); 297: } 298: 1.1.1.2 root 299: /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register 300: with one instruction per word. We only do this if we can safely read 301: CONST_DOUBLE_{LOW,HIGH}. */ 1.1 root 302: 303: int 304: easy_fp_constant (op, mode) 305: register rtx op; 306: register enum machine_mode mode; 307: { 308: rtx low, high; 309: 310: if (GET_CODE (op) != CONST_DOUBLE 311: || GET_MODE (op) != mode 312: || GET_MODE_CLASS (mode) != MODE_FLOAT) 313: return 0; 314: 315: high = operand_subword (op, 0, 0, mode); 316: low = operand_subword (op, 1, 0, mode); 317: 1.1.1.2 root 318: if (high == 0 || ! input_operand (high, word_mode)) 1.1 root 319: return 0; 320: 321: return (mode == SFmode 1.1.1.2 root 322: || (low != 0 && input_operand (low, word_mode))); 1.1 root 323: } 324: 325: /* Return 1 if the operand is either a floating-point register, a pseudo 326: register, or memory. */ 327: 328: int 329: fp_reg_or_mem_operand (op, mode) 330: register rtx op; 331: enum machine_mode mode; 332: { 333: return (memory_operand (op, mode) 334: || (register_operand (op, mode) 335: && (GET_CODE (op) != REG 336: || REGNO (op) >= FIRST_PSEUDO_REGISTER 337: || FP_REGNO_P (REGNO (op))))); 338: } 339: 340: /* Return 1 if the operand is either an easy FP constant (see above) or 341: memory. */ 342: 343: int 344: mem_or_easy_const_operand (op, mode) 345: register rtx op; 346: enum machine_mode mode; 347: { 348: return memory_operand (op, mode) || easy_fp_constant (op, mode); 349: } 350: 351: /* Return 1 if the operand is either a non-special register or an item 352: that can be used as the operand of an SI add insn. */ 353: 354: int 355: add_operand (op, mode) 356: register rtx op; 357: enum machine_mode mode; 358: { 359: return (reg_or_short_operand (op, mode) 360: || (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff) == 0)); 361: } 362: 363: /* Return 1 if OP is a constant but not a valid add_operand. */ 364: 365: int 366: non_add_cint_operand (op, mode) 367: register rtx op; 368: enum machine_mode mode; 369: { 370: return (GET_CODE (op) == CONST_INT 371: && (unsigned) (INTVAL (op) + 0x8000) >= 0x10000 372: && (INTVAL (op) & 0xffff) != 0); 373: } 374: 375: /* Return 1 if the operand is a non-special register or a constant that 376: can be used as the operand of an OR or XOR insn on the RS/6000. */ 377: 378: int 379: logical_operand (op, mode) 380: register rtx op; 381: enum machine_mode mode; 382: { 383: return (gpc_reg_operand (op, mode) 384: || (GET_CODE (op) == CONST_INT 385: && ((INTVAL (op) & 0xffff0000) == 0 386: || (INTVAL (op) & 0xffff) == 0))); 387: } 388: 389: /* Return 1 if C is a constant that is not a logical operand (as 390: above). */ 391: 392: int 393: non_logical_cint_operand (op, mode) 394: register rtx op; 395: enum machine_mode mode; 396: { 397: return (GET_CODE (op) == CONST_INT 398: && (INTVAL (op) & 0xffff0000) != 0 399: && (INTVAL (op) & 0xffff) != 0); 400: } 401: 402: /* Return 1 if C is a constant that can be encoded in a mask on the 403: RS/6000. It is if there are no more than two 1->0 or 0->1 transitions. 404: Reject all ones and all zeros, since these should have been optimized 405: away and confuse the making of MB and ME. */ 406: 407: int 408: mask_constant (c) 409: register int c; 410: { 411: int i; 412: int last_bit_value; 413: int transitions = 0; 414: 415: if (c == 0 || c == ~0) 416: return 0; 417: 418: last_bit_value = c & 1; 419: 420: for (i = 1; i < 32; i++) 421: if (((c >>= 1) & 1) != last_bit_value) 422: last_bit_value ^= 1, transitions++; 423: 424: return transitions <= 2; 425: } 426: 427: /* Return 1 if the operand is a constant that is a mask on the RS/6000. */ 428: 429: int 430: mask_operand (op, mode) 431: register rtx op; 432: enum machine_mode mode; 433: { 434: return GET_CODE (op) == CONST_INT && mask_constant (INTVAL (op)); 435: } 436: 437: /* Return 1 if the operand is either a non-special register or a 438: constant that can be used as the operand of an RS/6000 logical AND insn. */ 439: 440: int 441: and_operand (op, mode) 442: register rtx op; 443: enum machine_mode mode; 444: { 445: return (reg_or_short_operand (op, mode) 446: || logical_operand (op, mode) 447: || mask_operand (op, mode)); 448: } 449: 450: /* Return 1 if the operand is a constant but not a valid operand for an AND 451: insn. */ 452: 453: int 454: non_and_cint_operand (op, mode) 455: register rtx op; 456: enum machine_mode mode; 457: { 458: return GET_CODE (op) == CONST_INT && ! and_operand (op, mode); 459: } 460: 461: /* Return 1 if the operand is a general register or memory operand. */ 462: 463: int 464: reg_or_mem_operand (op, mode) 465: register rtx op; 466: register enum machine_mode mode; 467: { 468: return gpc_reg_operand (op, mode) || memory_operand (op, mode); 469: } 470: 471: /* Return 1 if the operand, used inside a MEM, is a valid first argument 472: to CALL. This is a SYMBOL_REF or a pseudo-register, which will be 473: forced to lr. */ 474: 475: int 476: call_operand (op, mode) 477: register rtx op; 478: enum machine_mode mode; 479: { 480: if (mode != VOIDmode && GET_MODE (op) != mode) 481: return 0; 482: 483: return (GET_CODE (op) == SYMBOL_REF 484: || (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER)); 485: } 486: 1.1.1.2 root 487: 488: /* Return 1 if the operand is a SYMBOL_REF for a function known to be in 489: this file. */ 490: 491: int 492: current_file_function_operand (op, mode) 493: register rtx op; 494: enum machine_mode mode; 495: { 496: return (GET_CODE (op) == SYMBOL_REF 497: && (SYMBOL_REF_FLAG (op) 498: || op == XEXP (DECL_RTL (current_function_decl), 0))); 499: } 500: 501: 1.1 root 502: /* Return 1 if this operand is a valid input for a move insn. */ 503: 504: int 505: input_operand (op, mode) 506: register rtx op; 507: enum machine_mode mode; 508: { 1.1.1.2 root 509: /* Memory is always valid. */ 1.1 root 510: if (memory_operand (op, mode)) 511: return 1; 512: 1.1.1.2 root 513: /* For floating-point, easy constants are valid. */ 514: if (GET_MODE_CLASS (mode) == MODE_FLOAT 515: && CONSTANT_P (op) 516: && easy_fp_constant (op, mode)) 517: return 1; 518: 519: /* For floating-point or multi-word mode, the only remaining valid type 520: is a register. */ 1.1 root 521: if (GET_MODE_CLASS (mode) == MODE_FLOAT 522: || GET_MODE_SIZE (mode) > UNITS_PER_WORD) 1.1.1.2 root 523: return register_operand (op, mode); 1.1 root 524: 525: /* The only cases left are integral modes one word or smaller (we 526: do not get called for MODE_CC values). These can be in any 527: register. */ 528: if (register_operand (op, mode)) 1.1.1.2 root 529: return 1; 1.1 root 530: 531: /* For HImode and QImode, any constant is valid. */ 532: if ((mode == HImode || mode == QImode) 533: && GET_CODE (op) == CONST_INT) 534: return 1; 535: 1.1.1.3 ! root 536: /* A SYMBOL_REF referring to the TOC is valid. */ ! 537: if (GET_CODE (op) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (op)) ! 538: return 1; ! 539: 1.1 root 540: /* Otherwise, we will be doing this SET with an add, so anything valid 541: for an add will be valid. */ 542: return add_operand (op, mode); 543: } 544: 545: /* Return 1 if OP is a load multiple operation. It is known to be a 546: PARALLEL and the first section will be tested. */ 547: 548: int 549: load_multiple_operation (op, mode) 550: rtx op; 551: enum machine_mode mode; 552: { 553: int count = XVECLEN (op, 0); 554: int dest_regno; 555: rtx src_addr; 556: int i; 557: 558: /* Perform a quick check so we don't blow up below. */ 559: if (count <= 1 560: || GET_CODE (XVECEXP (op, 0, 0)) != SET 561: || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG 562: || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM) 563: return 0; 564: 565: dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0))); 566: src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0); 567: 568: for (i = 1; i < count; i++) 569: { 570: rtx elt = XVECEXP (op, 0, i); 571: 572: if (GET_CODE (elt) != SET 573: || GET_CODE (SET_DEST (elt)) != REG 574: || GET_MODE (SET_DEST (elt)) != SImode 575: || REGNO (SET_DEST (elt)) != dest_regno + i 576: || GET_CODE (SET_SRC (elt)) != MEM 577: || GET_MODE (SET_SRC (elt)) != SImode 578: || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS 579: || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr) 580: || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT 581: || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != i * 4) 582: return 0; 583: } 584: 585: return 1; 586: } 587: 588: /* Similar, but tests for store multiple. Here, the second vector element 589: is a CLOBBER. It will be tested later. */ 590: 591: int 592: store_multiple_operation (op, mode) 593: rtx op; 594: enum machine_mode mode; 595: { 596: int count = XVECLEN (op, 0) - 1; 597: int src_regno; 598: rtx dest_addr; 599: int i; 600: 601: /* Perform a quick check so we don't blow up below. */ 602: if (count <= 1 603: || GET_CODE (XVECEXP (op, 0, 0)) != SET 604: || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM 605: || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG) 606: return 0; 607: 608: src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0))); 609: dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0); 610: 611: for (i = 1; i < count; i++) 612: { 613: rtx elt = XVECEXP (op, 0, i + 1); 614: 615: if (GET_CODE (elt) != SET 616: || GET_CODE (SET_SRC (elt)) != REG 617: || GET_MODE (SET_SRC (elt)) != SImode 618: || REGNO (SET_SRC (elt)) != src_regno + i 619: || GET_CODE (SET_DEST (elt)) != MEM 620: || GET_MODE (SET_DEST (elt)) != SImode 621: || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS 622: || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr) 623: || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT 624: || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != i * 4) 625: return 0; 626: } 627: 628: return 1; 629: } 630: 631: /* Return 1 if OP is a comparison operation that is valid for a branch insn. 632: We only check the opcode against the mode of the CC value here. */ 633: 634: int 635: branch_comparison_operator (op, mode) 636: register rtx op; 637: enum machine_mode mode; 638: { 639: enum rtx_code code = GET_CODE (op); 640: enum machine_mode cc_mode; 641: 642: if (GET_RTX_CLASS (code) != '<') 643: return 0; 644: 645: cc_mode = GET_MODE (XEXP (op, 0)); 646: if (GET_MODE_CLASS (cc_mode) != MODE_CC) 647: return 0; 648: 649: if ((code == GT || code == LT || code == GE || code == LE) 650: && cc_mode == CCUNSmode) 651: return 0; 652: 653: if ((code == GTU || code == LTU || code == GEU || code == LEU) 654: && (cc_mode != CCUNSmode)) 655: return 0; 656: 657: return 1; 658: } 659: 660: /* Return 1 if OP is a comparison operation that is valid for an scc insn. 661: We check the opcode against the mode of the CC value and disallow EQ or 662: NE comparisons for integers. */ 663: 664: int 665: scc_comparison_operator (op, mode) 666: register rtx op; 667: enum machine_mode mode; 668: { 669: enum rtx_code code = GET_CODE (op); 670: enum machine_mode cc_mode; 671: 672: if (GET_MODE (op) != mode && mode != VOIDmode) 673: return 0; 674: 675: if (GET_RTX_CLASS (code) != '<') 676: return 0; 677: 678: cc_mode = GET_MODE (XEXP (op, 0)); 679: if (GET_MODE_CLASS (cc_mode) != MODE_CC) 680: return 0; 681: 682: if (code == NE && cc_mode != CCFPmode) 683: return 0; 684: 685: if ((code == GT || code == LT || code == GE || code == LE) 686: && cc_mode == CCUNSmode) 687: return 0; 688: 689: if ((code == GTU || code == LTU || code == GEU || code == LEU) 690: && (cc_mode != CCUNSmode)) 691: return 0; 692: 693: if (cc_mode == CCEQmode && code != EQ && code != NE) 694: return 0; 695: 696: return 1; 697: } 698: 699: /* Return 1 if ANDOP is a mask that has no bits on that are not in the 700: mask required to convert the result of a rotate insn into a shift 701: left insn of SHIFTOP bits. Both are known to be CONST_INT. */ 702: 703: int 704: includes_lshift_p (shiftop, andop) 705: register rtx shiftop; 706: register rtx andop; 707: { 708: int shift_mask = (~0 << INTVAL (shiftop)); 709: 710: return (INTVAL (andop) & ~shift_mask) == 0; 711: } 712: 713: /* Similar, but for right shift. */ 714: 715: int 716: includes_rshift_p (shiftop, andop) 717: register rtx shiftop; 718: register rtx andop; 719: { 720: unsigned shift_mask = ~0; 721: 722: shift_mask >>= INTVAL (shiftop); 723: 724: return (INTVAL (andop) & ~ shift_mask) == 0; 725: } 726: 727: /* Return the register class of a scratch register needed to copy IN into 728: or out of a register in CLASS in MODE. If it can be done directly, 729: NO_REGS is returned. */ 730: 731: enum reg_class 732: secondary_reload_class (class, mode, in) 733: enum reg_class class; 734: enum machine_mode mode; 735: rtx in; 736: { 737: int regno = true_regnum (in); 738: 739: if (regno >= FIRST_PSEUDO_REGISTER) 740: regno = -1; 741: 742: /* We can place anything into GENERAL_REGS and can put GENERAL_REGS 743: into anything. */ 744: if (class == GENERAL_REGS || class == BASE_REGS 745: || (regno >= 0 && INT_REGNO_P (regno))) 746: return NO_REGS; 747: 748: /* Constants, memory, and FP registers can go into FP registers. */ 749: if ((regno == -1 || FP_REGNO_P (regno)) 750: && (class == FLOAT_REGS || class == NON_SPECIAL_REGS)) 751: return NO_REGS; 752: 753: /* We can copy among the CR registers. */ 754: if ((class == CR_REGS || class == CR0_REGS) 755: && regno >= 0 && CR_REGNO_P (regno)) 756: return NO_REGS; 757: 758: /* Otherwise, we need GENERAL_REGS. */ 759: return GENERAL_REGS; 760: } 761: 762: /* Given a comparison operation, return the bit number in CCR to test. We 763: know this is a valid comparison. 764: 765: SCC_P is 1 if this is for an scc. That means that %D will have been 766: used instead of %C, so the bits will be in different places. 767: 768: Return -1 if OP isn't a valid comparison for some reason. */ 769: 770: int 771: ccr_bit (op, scc_p) 772: register rtx op; 773: int scc_p; 774: { 775: enum rtx_code code = GET_CODE (op); 776: enum machine_mode cc_mode; 777: int cc_regnum; 778: int base_bit; 779: 780: if (GET_RTX_CLASS (code) != '<') 781: return -1; 782: 783: cc_mode = GET_MODE (XEXP (op, 0)); 784: cc_regnum = REGNO (XEXP (op, 0)); 785: base_bit = 4 * (cc_regnum - 68); 786: 787: /* In CCEQmode cases we have made sure that the result is always in the 788: third bit of the CR field. */ 789: 790: if (cc_mode == CCEQmode) 791: return base_bit + 3; 792: 793: switch (code) 794: { 795: case NE: 796: return scc_p ? base_bit + 3 : base_bit + 2; 797: case EQ: 798: return base_bit + 2; 799: case GT: case GTU: 800: return base_bit + 1; 801: case LT: case LTU: 802: return base_bit; 803: 804: case GE: case GEU: 805: /* If floating-point, we will have done a cror to put the bit in the 806: unordered position. So test that bit. For integer, this is ! LT 807: unless this is an scc insn. */ 808: return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit; 809: 810: case LE: case LEU: 811: return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit + 1; 812: 813: default: 814: abort (); 815: } 816: } 817: 818: /* Print an operand. Recognize special options, documented below. */ 819: 820: void 821: print_operand (file, x, code) 822: FILE *file; 823: rtx x; 824: char code; 825: { 826: int i; 827: int val; 828: 829: /* These macros test for integers and extract the low-order bits. */ 830: #define INT_P(X) \ 831: ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \ 832: && GET_MODE (X) == VOIDmode) 833: 834: #define INT_LOWPART(X) \ 835: (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X)) 836: 837: switch (code) 838: { 1.1.1.2 root 839: case '.': 840: /* Write out an instruction after the call which may be replaced 841: with glue code by the loader. This depends on the AIX version. */ 842: asm_fprintf (file, RS6000_CALL_GLUE); 843: return; 844: 1.1.1.3 ! root 845: case '*': ! 846: /* Write the register number of the TOC register. */ ! 847: fputs (TARGET_MINIMAL_TOC ? "30" : "2", file); ! 848: return; ! 849: 1.1 root 850: case 'A': 851: /* If X is a constant integer whose low-order 5 bits are zero, 852: write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug 1.1.1.2 root 853: in the AIX assembler where "sri" with a zero shift count 1.1 root 854: write a trash instruction. */ 855: if (GET_CODE (x) == CONST_INT && (INTVAL (x) & 31) == 0) 1.1.1.2 root 856: putc ('l', file); 1.1 root 857: else 1.1.1.2 root 858: putc ('r', file); 1.1 root 859: return; 860: 861: case 'b': 862: /* Low-order 16 bits of constant, unsigned. */ 863: if (! INT_P (x)) 864: output_operand_lossage ("invalid %%b value"); 865: 866: fprintf (file, "%d", INT_LOWPART (x) & 0xffff); 867: return; 868: 869: case 'C': 870: /* This is an optional cror needed for LE or GE floating-point 871: comparisons. Otherwise write nothing. */ 872: if ((GET_CODE (x) == LE || GET_CODE (x) == GE) 873: && GET_MODE (XEXP (x, 0)) == CCFPmode) 874: { 875: int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); 876: 877: fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3, 878: base_bit + 2, base_bit + (GET_CODE (x) == GE)); 879: } 880: return; 881: 882: case 'D': 883: /* Similar, except that this is for an scc, so we must be able to 884: encode the test in a single bit that is one. We do the above 885: for any LE, GE, GEU, or LEU and invert the bit for NE. */ 886: if (GET_CODE (x) == LE || GET_CODE (x) == GE 887: || GET_CODE (x) == LEU || GET_CODE (x) == GEU) 888: { 889: int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); 890: 891: fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3, 892: base_bit + 2, 893: base_bit + (GET_CODE (x) == GE || GET_CODE (x) == GEU)); 894: } 895: 896: else if (GET_CODE (x) == NE) 897: { 898: int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); 899: 900: fprintf (file, "crnor %d,%d,%d\n\t", base_bit + 3, 901: base_bit + 2, base_bit + 2); 902: } 903: return; 904: 905: case 'E': 906: /* X is a CR register. Print the number of the third bit of the CR */ 907: if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) 908: output_operand_lossage ("invalid %%E value"); 909: 910: fprintf(file, "%d", 4 * (REGNO (x) - 68) + 3); 1.1.1.2 root 911: return; 1.1 root 912: 913: case 'f': 914: /* X is a CR register. Print the shift count needed to move it 915: to the high-order four bits. */ 916: if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) 917: output_operand_lossage ("invalid %%f value"); 918: else 919: fprintf (file, "%d", 4 * (REGNO (x) - 68)); 920: return; 921: 922: case 'F': 923: /* Similar, but print the count for the rotate in the opposite 924: direction. */ 925: if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) 926: output_operand_lossage ("invalid %%F value"); 927: else 928: fprintf (file, "%d", 32 - 4 * (REGNO (x) - 68)); 929: return; 930: 931: case 'G': 932: /* X is a constant integer. If it is negative, print "m", 933: otherwise print "z". This is to make a aze or ame insn. */ 934: if (GET_CODE (x) != CONST_INT) 935: output_operand_lossage ("invalid %%G value"); 936: else if (INTVAL (x) >= 0) 1.1.1.2 root 937: putc ('z', file); 1.1 root 938: else 1.1.1.2 root 939: putc ('m', file); 1.1 root 940: return; 941: 942: case 'h': 943: /* If constant, output low-order five bits. Otherwise, 944: write normally. */ 945: if (INT_P (x)) 946: fprintf (file, "%d", INT_LOWPART (x) & 31); 947: else 948: print_operand (file, x, 0); 949: return; 950: 951: case 'H': 952: /* X must be a constant. Output the low order 5 bits plus 24. */ 953: if (! INT_P (x)) 954: output_operand_lossage ("invalid %%H value"); 955: 956: fprintf (file, "%d", (INT_LOWPART (x) + 24) & 31); 957: return; 958: 959: case 'I': 960: /* Print `i' if this is a constant, else nothing. */ 961: if (INT_P (x)) 1.1.1.2 root 962: putc ('i', file); 1.1 root 963: return; 964: 965: case 'j': 966: /* Write the bit number in CCR for jump. */ 967: i = ccr_bit (x, 0); 968: if (i == -1) 969: output_operand_lossage ("invalid %%j code"); 970: else 971: fprintf (file, "%d", i); 972: return; 973: 974: case 'J': 975: /* Similar, but add one for shift count in rlinm for scc and pass 976: scc flag to `ccr_bit'. */ 977: i = ccr_bit (x, 1); 978: if (i == -1) 979: output_operand_lossage ("invalid %%J code"); 980: else 1.1.1.2 root 981: /* If we want bit 31, write a shift count of zero, not 32. */ 982: fprintf (file, "%d", i == 31 ? 0 : i + 1); 1.1 root 983: return; 984: 985: case 'k': 986: /* X must be a constant. Write the 1's complement of the 987: constant. */ 988: if (! INT_P (x)) 989: output_operand_lossage ("invalid %%k value"); 990: 991: fprintf (file, "%d", ~ INT_LOWPART (x)); 992: return; 993: 994: case 'L': 995: /* Write second word of DImode or DFmode reference. Works on register 996: or non-indexed memory only. */ 997: if (GET_CODE (x) == REG) 998: fprintf (file, "%d", REGNO (x) + 1); 999: else if (GET_CODE (x) == MEM) 1000: { 1001: /* Handle possible auto-increment. Since it is pre-increment and 1002: we have already done it, we can just use an offset of four. */ 1003: if (GET_CODE (XEXP (x, 0)) == PRE_INC 1004: || GET_CODE (XEXP (x, 0)) == PRE_DEC) 1005: output_address (plus_constant (XEXP (XEXP (x, 0), 0), 4)); 1006: else 1007: output_address (plus_constant (XEXP (x, 0), 4)); 1008: } 1009: return; 1010: 1011: case 'm': 1012: /* MB value for a mask operand. */ 1013: if (! mask_operand (x, VOIDmode)) 1014: output_operand_lossage ("invalid %%m value"); 1015: 1016: val = INT_LOWPART (x); 1017: 1018: /* If the high bit is set and the low bit is not, the value is zero. 1019: If the high bit is zero, the value is the first 1 bit we find from 1020: the left. */ 1021: if (val < 0 && (val & 1) == 0) 1022: { 1023: fprintf (file, "0"); 1024: return; 1025: } 1026: else if (val >= 0) 1027: { 1028: for (i = 1; i < 32; i++) 1029: if ((val <<= 1) < 0) 1030: break; 1031: fprintf (file, "%d", i); 1032: return; 1033: } 1034: 1035: /* Otherwise, look for the first 0 bit from the right. The result is its 1036: number plus 1. We know the low-order bit is one. */ 1037: for (i = 0; i < 32; i++) 1038: if (((val >>= 1) & 1) == 0) 1039: break; 1040: 1041: /* If we ended in ...01, I would be 0. The correct value is 31, so 1042: we want 31 - i. */ 1043: fprintf (file, "%d", 31 - i); 1044: return; 1045: 1046: case 'M': 1047: /* ME value for a mask operand. */ 1048: if (! mask_operand (x, VOIDmode)) 1049: output_operand_lossage ("invalid %%m value"); 1050: 1051: val = INT_LOWPART (x); 1052: 1053: /* If the low bit is set and the high bit is not, the value is 31. 1054: If the low bit is zero, the value is the first 1 bit we find from 1055: the right. */ 1056: if ((val & 1) && val >= 0) 1057: { 1.1.1.2 root 1058: fputs ("31", file); 1.1 root 1059: return; 1060: } 1061: else if ((val & 1) == 0) 1062: { 1063: for (i = 0; i < 32; i++) 1064: if ((val >>= 1) & 1) 1065: break; 1066: 1067: /* If we had ....10, I would be 0. The result should be 1068: 30, so we need 30 - i. */ 1069: fprintf (file, "%d", 30 - i); 1070: return; 1071: } 1072: 1073: /* Otherwise, look for the first 0 bit from the left. The result is its 1074: number minus 1. We know the high-order bit is one. */ 1075: for (i = 0; i < 32; i++) 1076: if ((val <<= 1) >= 0) 1077: break; 1078: 1079: fprintf (file, "%d", i); 1080: return; 1081: 1082: case 'N': 1083: /* Write the number of elements in the vector times 4. */ 1084: if (GET_CODE (x) != PARALLEL) 1085: output_operand_lossage ("invalid %%N value"); 1086: 1087: fprintf (file, "%d", XVECLEN (x, 0) * 4); 1088: return; 1089: 1090: case 'O': 1091: /* Similar, but subtract 1 first. */ 1092: if (GET_CODE (x) != PARALLEL) 1093: output_operand_lossage ("invalid %%N value"); 1094: 1095: fprintf (file, "%d", (XVECLEN (x, 0) - 1) * 4); 1096: return; 1097: 1098: case 'p': 1099: /* X is a CONST_INT that is a power of two. Output the logarithm. */ 1100: if (! INT_P (x) 1101: || (i = exact_log2 (INT_LOWPART (x))) < 0) 1102: output_operand_lossage ("invalid %%p value"); 1103: 1104: fprintf (file, "%d", i); 1105: return; 1106: 1107: case 'P': 1108: /* The operand must be an indirect memory reference. The result 1109: is the register number. */ 1110: if (GET_CODE (x) != MEM || GET_CODE (XEXP (x, 0)) != REG 1111: || REGNO (XEXP (x, 0)) >= 32) 1112: output_operand_lossage ("invalid %%P value"); 1113: 1114: fprintf (file, "%d", REGNO (XEXP (x, 0))); 1115: return; 1116: 1117: case 'R': 1118: /* X is a CR register. Print the mask for `mtcrf'. */ 1119: if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) 1120: output_operand_lossage ("invalid %%R value"); 1121: else 1122: fprintf (file, "%d", 128 >> (REGNO (x) - 68)); 1123: return; 1124: 1125: case 's': 1126: /* Low 5 bits of 32 - value */ 1127: if (! INT_P (x)) 1128: output_operand_lossage ("invalid %%s value"); 1129: 1130: fprintf (file, "%d", (32 - INT_LOWPART (x)) & 31); 1131: return; 1132: 1133: case 'S': 1134: /* Low 5 bits of 31 - value */ 1135: if (! INT_P (x)) 1136: output_operand_lossage ("invalid %%S value"); 1137: 1138: fprintf (file, "%d", (31 - INT_LOWPART (x)) & 31); 1139: return; 1140: 1141: case 't': 1142: /* Write 12 if this jump operation will branch if true, 4 otherwise. 1143: All floating-point operations except NE branch true and integer 1144: EQ, LT, GT, LTU and GTU also branch true. */ 1145: if (GET_RTX_CLASS (GET_CODE (x)) != '<') 1146: output_operand_lossage ("invalid %%t value"); 1147: 1148: else if ((GET_MODE (XEXP (x, 0)) == CCFPmode 1149: && GET_CODE (x) != NE) 1150: || GET_CODE (x) == EQ 1151: || GET_CODE (x) == LT || GET_CODE (x) == GT 1152: || GET_CODE (x) == LTU || GET_CODE (x) == GTU) 1.1.1.2 root 1153: fputs ("12", file); 1.1 root 1154: else 1.1.1.2 root 1155: putc ('4', file); 1.1 root 1156: return; 1157: 1158: case 'T': 1159: /* Opposite of 't': write 4 if this jump operation will branch if true, 1160: 12 otherwise. */ 1161: if (GET_RTX_CLASS (GET_CODE (x)) != '<') 1162: output_operand_lossage ("invalid %%t value"); 1163: 1164: else if ((GET_MODE (XEXP (x, 0)) == CCFPmode 1165: && GET_CODE (x) != NE) 1166: || GET_CODE (x) == EQ 1167: || GET_CODE (x) == LT || GET_CODE (x) == GT 1168: || GET_CODE (x) == LTU || GET_CODE (x) == GTU) 1.1.1.2 root 1169: putc ('4', file); 1.1 root 1170: else 1.1.1.2 root 1171: fputs ("12", file); 1.1 root 1172: return; 1173: 1174: case 'u': 1175: /* High-order 16 bits of constant. */ 1176: if (! INT_P (x)) 1177: output_operand_lossage ("invalid %%u value"); 1178: 1.1.1.2 root 1179: fprintf (file, "0x%x", (INT_LOWPART (x) >> 16) & 0xffff); 1.1 root 1180: return; 1181: 1182: case 'U': 1183: /* Print `u' if this has an auto-increment or auto-decrement. */ 1184: if (GET_CODE (x) == MEM 1185: && (GET_CODE (XEXP (x, 0)) == PRE_INC 1186: || GET_CODE (XEXP (x, 0)) == PRE_DEC)) 1.1.1.2 root 1187: putc ('u', file); 1.1 root 1188: return; 1189: 1190: case 'w': 1191: /* If constant, low-order 16 bits of constant, signed. Otherwise, write 1192: normally. */ 1193: if (INT_P (x)) 1194: fprintf (file, "%d", 1195: (INT_LOWPART (x) & 0xffff) - 2 * (INT_LOWPART (x) & 0x8000)); 1196: else 1197: print_operand (file, x, 0); 1198: return; 1199: 1200: case 'W': 1201: /* If constant, low-order 16 bits of constant, unsigned. 1202: Otherwise, write normally. */ 1203: if (INT_P (x)) 1204: fprintf (file, "%d", INT_LOWPART (x) & 0xffff); 1205: else 1206: print_operand (file, x, 0); 1207: return; 1208: 1209: case 'X': 1210: if (GET_CODE (x) == MEM 1211: && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x, 0))) 1.1.1.2 root 1212: putc ('x', file); 1.1 root 1213: return; 1214: 1215: case 'Y': 1216: /* Like 'L', for third word of TImode */ 1217: if (GET_CODE (x) == REG) 1218: fprintf (file, "%d", REGNO (x) + 2); 1219: else if (GET_CODE (x) == MEM) 1220: { 1221: if (GET_CODE (XEXP (x, 0)) == PRE_INC 1222: || GET_CODE (XEXP (x, 0)) == PRE_DEC) 1223: output_address (plus_constant (XEXP (XEXP (x, 0), 0), 8)); 1224: else 1225: output_address (plus_constant (XEXP (x, 0), 8)); 1226: } 1227: return; 1228: 1229: case 'z': 1230: /* X is a SYMBOL_REF. Write out the name preceded by a 1231: period and without any trailing data in brackets. Used for function 1232: names. */ 1233: if (GET_CODE (x) != SYMBOL_REF) 1234: abort (); 1235: 1.1.1.2 root 1236: putc ('.', file); 1.1 root 1237: RS6000_OUTPUT_BASENAME (file, XSTR (x, 0)); 1238: return; 1239: 1240: case 'Z': 1241: /* Like 'L', for last word of TImode. */ 1242: if (GET_CODE (x) == REG) 1243: fprintf (file, "%d", REGNO (x) + 3); 1244: else if (GET_CODE (x) == MEM) 1245: { 1246: if (GET_CODE (XEXP (x, 0)) == PRE_INC 1247: || GET_CODE (XEXP (x, 0)) == PRE_DEC) 1248: output_address (plus_constant (XEXP (XEXP (x, 0), 0), 12)); 1249: else 1250: output_address (plus_constant (XEXP (x, 0), 12)); 1251: } 1252: return; 1253: 1254: case 0: 1255: if (GET_CODE (x) == REG) 1256: fprintf (file, "%s", reg_names[REGNO (x)]); 1257: else if (GET_CODE (x) == MEM) 1258: { 1259: /* We need to handle PRE_INC and PRE_DEC here, since we need to 1260: know the width from the mode. */ 1261: if (GET_CODE (XEXP (x, 0)) == PRE_INC) 1262: fprintf (file, "%d(%d)", GET_MODE_SIZE (GET_MODE (x)), 1263: REGNO (XEXP (XEXP (x, 0), 0))); 1264: else if (GET_CODE (XEXP (x, 0)) == PRE_DEC) 1265: fprintf (file, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x)), 1266: REGNO (XEXP (XEXP (x, 0), 0))); 1267: else 1268: output_address (XEXP (x, 0)); 1269: } 1270: else 1271: output_addr_const (file, x); 1.1.1.2 root 1272: return; 1.1 root 1273: 1274: default: 1275: output_operand_lossage ("invalid %%xn code"); 1276: } 1277: } 1278: 1279: /* Print the address of an operand. */ 1280: 1281: void 1282: print_operand_address (file, x) 1283: FILE *file; 1284: register rtx x; 1285: { 1286: if (GET_CODE (x) == REG) 1287: fprintf (file, "0(%d)", REGNO (x)); 1288: else if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == CONST) 1289: { 1290: output_addr_const (file, x); 1.1.1.2 root 1291: /* When TARGET_MINIMAL_TOC, use the indirected toc table pointer instead 1292: of the toc pointer. */ 1293: if (TARGET_MINIMAL_TOC) 1294: fprintf (file, "(30)"); 1295: else 1296: fprintf (file, "(2)"); 1.1 root 1297: } 1298: else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == REG) 1299: { 1300: if (REGNO (XEXP (x, 0)) == 0) 1301: fprintf (file, "%d,%d", REGNO (XEXP (x, 1)), REGNO (XEXP (x, 0))); 1302: else 1303: fprintf (file, "%d,%d", REGNO (XEXP (x, 0)), REGNO (XEXP (x, 1))); 1304: } 1305: else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT) 1306: fprintf (file, "%d(%d)", INTVAL (XEXP (x, 1)), REGNO (XEXP (x, 0))); 1307: else 1308: abort (); 1309: } 1310: 1311: /* This page contains routines that are used to determine what the function 1312: prologue and epilogue code will do and write them out. */ 1313: 1314: /* Return the first fixed-point register that is required to be saved. 32 if 1315: none. */ 1316: 1317: int 1318: first_reg_to_save () 1319: { 1320: int first_reg; 1321: 1322: /* Find lowest numbered live register. */ 1323: for (first_reg = 13; first_reg <= 31; first_reg++) 1324: if (regs_ever_live[first_reg]) 1325: break; 1326: 1327: /* If profiling, then we must save/restore every register that contains 1328: a parameter before/after the .mcount call. Use registers from 30 down 1329: to 23 to do this. Don't use the frame pointer in reg 31. 1330: 1331: For now, save enough room for all of the parameter registers. */ 1332: if (profile_flag) 1333: if (first_reg > 23) 1334: first_reg = 23; 1335: 1336: return first_reg; 1337: } 1338: 1339: /* Similar, for FP regs. */ 1340: 1341: int 1342: first_fp_reg_to_save () 1343: { 1344: int first_reg; 1345: 1346: /* Find lowest numbered live register. */ 1347: for (first_reg = 14 + 32; first_reg <= 63; first_reg++) 1348: if (regs_ever_live[first_reg]) 1349: break; 1350: 1351: return first_reg; 1352: } 1353: 1354: /* Return 1 if we need to save CR. */ 1355: 1356: int 1357: must_save_cr () 1358: { 1359: return regs_ever_live[70] || regs_ever_live[71] || regs_ever_live[72]; 1360: } 1361: 1362: /* Compute the size of the save area in the stack, including the space for 1363: the fixed area. */ 1364: 1365: int 1366: rs6000_sa_size () 1367: { 1368: int size; 1369: 1370: /* We have the six fixed words, plus the size of the register save 1371: areas, rounded to a double-word. */ 1372: size = 6 + (32 - first_reg_to_save ()) + (64 - first_fp_reg_to_save ()) * 2; 1373: if (size & 1) 1374: size++; 1375: 1376: return size * 4; 1377: } 1378: 1379: /* Return non-zero if this function makes calls. */ 1380: 1381: int 1382: rs6000_makes_calls () 1383: { 1384: rtx insn; 1385: 1386: /* If we are profiling, we will be making a call to mcount. */ 1387: if (profile_flag) 1388: return 1; 1389: 1390: for (insn = get_insns (); insn; insn = next_insn (insn)) 1391: if (GET_CODE (insn) == CALL_INSN) 1392: return 1; 1393: 1394: return 0; 1395: } 1396: 1397: /* Return non-zero if this function needs to push space on the stack. */ 1398: 1399: int 1400: rs6000_pushes_stack () 1401: { 1402: int total_size = (rs6000_sa_size () + get_frame_size () 1403: + current_function_outgoing_args_size); 1404: 1405: /* We need to push the stack if a frame pointer is needed (because the 1406: stack might be dynamically adjusted), if we are debugging, if the 1407: total stack size is more than 220 bytes, or if we make calls. */ 1408: 1409: return (frame_pointer_needed || write_symbols != NO_DEBUG 1410: || total_size > 220 1411: || rs6000_makes_calls ()); 1412: } 1413: 1414: /* Write function prologue. */ 1415: 1416: void 1417: output_prolog (file, size) 1418: FILE *file; 1419: int size; 1420: { 1421: int first_reg = first_reg_to_save (); 1422: int must_push = rs6000_pushes_stack (); 1423: int first_fp_reg = first_fp_reg_to_save (); 1424: int basic_size = rs6000_sa_size (); 1425: int total_size = (basic_size + size + current_function_outgoing_args_size); 1426: 1427: /* Round size to multiple of 8 bytes. */ 1428: total_size = (total_size + 7) & ~7; 1429: 1430: /* Write .extern for any function we will call to save and restore fp 1431: values. */ 1432: if (first_fp_reg < 62) 1433: fprintf (file, "\t.extern ._savef%d\n\t.extern ._restf%d\n", 1434: first_fp_reg - 32, first_fp_reg - 32); 1435: 1436: /* Write .extern for truncation routines, if needed. */ 1437: if (rs6000_trunc_used && ! trunc_defined) 1438: { 1.1.1.3 ! root 1439: fprintf (file, "\t.extern .%s\n\t.extern .%s\n", ! 1440: RS6000_ITRUNC, RS6000_UITRUNC); 1.1 root 1441: trunc_defined = 1; 1442: } 1.1.1.3 ! root 1443: /* Write .extern for AIX common mode routines, if needed. */ ! 1444: if (! TARGET_POWER && ! TARGET_POWERPC && ! common_mode_defined) ! 1445: { ! 1446: fputs ("\t.extern __mulh\n", file); ! 1447: fputs ("\t.extern __mull\n", file); ! 1448: fputs ("\t.extern __divss\n", file); ! 1449: fputs ("\t.extern __divus\n", file); ! 1450: fputs ("\t.extern __quoss\n", file); ! 1451: fputs ("\t.extern __quous\n", file); ! 1452: common_mode_defined = 1; ! 1453: } 1.1 root 1454: 1455: /* If we have to call a function to save fpr's, or if we are doing profiling, 1456: then we will be using LR. */ 1457: if (first_fp_reg < 62 || profile_flag) 1458: regs_ever_live[65] = 1; 1459: 1460: /* If we use the link register, get it into r0. */ 1461: if (regs_ever_live[65]) 1.1.1.2 root 1462: asm_fprintf (file, "\tmflr 0\n"); 1.1 root 1463: 1464: /* If we need to save CR, put it into r12. */ 1465: if (must_save_cr ()) 1.1.1.2 root 1466: asm_fprintf (file, "\tmfcr 12\n"); 1.1 root 1467: 1468: /* Do any required saving of fpr's. If only one or two to save, do it 1.1.1.2 root 1469: ourself. Otherwise, call function. Note that since they are statically 1470: linked, we do not need a nop following them. */ 1.1 root 1471: if (first_fp_reg == 62) 1.1.1.2 root 1472: asm_fprintf (file, "\tstfd 30,-16(1)\n\tstfd 31,-8(1)\n"); 1.1 root 1473: else if (first_fp_reg == 63) 1.1.1.2 root 1474: asm_fprintf (file, "\tstfd 31,-8(1)\n"); 1.1 root 1475: else if (first_fp_reg != 64) 1.1.1.2 root 1476: asm_fprintf (file, "\tbl ._savef%d\n", first_fp_reg - 32); 1.1 root 1477: 1478: /* Now save gpr's. */ 1.1.1.2 root 1479: if (! TARGET_POWER || first_reg == 31) 1480: { 1481: int regno, loc; 1482: 1483: for (regno = first_reg, 1484: loc = - (32 - first_reg) * 4 - (64 - first_fp_reg) * 8; 1485: regno < 32; 1486: regno++, loc += 4) 1487: asm_fprintf (file, "\t{st|stw} %d,%d(1)\n", regno, loc); 1488: } 1489: 1.1 root 1490: else if (first_reg != 32) 1.1.1.2 root 1491: asm_fprintf (file, "\t{stm|stmw} %d,%d(1)\n", first_reg, 1.1 root 1492: - (32 - first_reg) * 4 - (64 - first_fp_reg) * 8); 1493: 1494: /* Save lr if we used it. */ 1495: if (regs_ever_live[65]) 1.1.1.2 root 1496: asm_fprintf (file, "\t{st|stw} 0,8(1)\n"); 1.1 root 1497: 1498: /* Save CR if we use any that must be preserved. */ 1499: if (must_save_cr ()) 1.1.1.2 root 1500: asm_fprintf (file, "\t{st|stw} 12,4(1)\n"); 1.1 root 1501: 1502: /* Update stack and set back pointer. */ 1503: if (must_push) 1504: { 1505: if (total_size < 32767) 1.1.1.2 root 1506: asm_fprintf (file, "\t{stu|stwu} 1,%d(1)\n", - total_size); 1.1 root 1507: else 1508: { 1.1.1.3 ! root 1509: asm_fprintf (file, "\t{cau 0,0,%d|lis 0,%d}\n\t{oril|ori} 0,0,%d\n", 1.1 root 1510: (total_size >> 16) & 0xffff, total_size & 0xffff); 1.1.1.3 ! root 1511: if (TARGET_POWERPC) ! 1512: asm_fprintf (file, "\tsubf 12,0,1\n"); ! 1513: else ! 1514: asm_fprintf (file, "\t{sf|subfc} 12,0,1\n"); ! 1515: asm_fprintf (file, "\t{st|stw} 1,0(12)\n\tmr 1,12\n"); 1.1 root 1516: } 1517: } 1518: 1519: /* Set frame pointer, if needed. */ 1520: if (frame_pointer_needed) 1.1.1.3 ! root 1521: asm_fprintf (file, "\tmr 31,1\n"); 1.1.1.2 root 1522: 1523: /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the 1524: TOC_TABLE address into register 30. */ 1525: if (TARGET_MINIMAL_TOC && get_pool_size () != 0) 1.1.1.3 ! root 1526: { ! 1527: char buf[100]; ! 1528: ! 1529: ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 0); ! 1530: asm_fprintf (file, "\t{l|lwz} 30,"); ! 1531: assemble_name (file, buf); ! 1532: asm_fprintf (file, "(2)\n"); ! 1533: } 1.1 root 1534: } 1535: 1536: /* Write function epilogue. */ 1537: 1538: void 1539: output_epilog (file, size) 1540: FILE *file; 1541: int size; 1542: { 1543: int first_reg = first_reg_to_save (); 1544: int must_push = rs6000_pushes_stack (); 1545: int first_fp_reg = first_fp_reg_to_save (); 1546: int basic_size = rs6000_sa_size (); 1547: int total_size = (basic_size + size + current_function_outgoing_args_size); 1548: rtx insn = get_last_insn (); 1549: 1550: /* Round size to multiple of 8 bytes. */ 1551: total_size = (total_size + 7) & ~7; 1552: 1553: /* If the last insn was a BARRIER, we don't have to write anything except 1554: the trace table. */ 1555: if (GET_CODE (insn) == NOTE) 1556: insn = prev_nonnote_insn (insn); 1557: if (insn == 0 || GET_CODE (insn) != BARRIER) 1558: { 1559: /* If we have a frame pointer, a call to alloca, or a large stack 1560: frame, restore the old stack pointer using the backchain. Otherwise, 1561: we know what size to update it with. */ 1562: if (frame_pointer_needed || current_function_calls_alloca 1563: || total_size > 32767) 1.1.1.2 root 1564: asm_fprintf (file, "\t{l|lwz} 1,0(1)\n"); 1.1 root 1565: else if (must_push) 1.1.1.3 ! root 1566: asm_fprintf (file, "\t{cal 1,%d(1)|addi 1,1,%d}\n", total_size); 1.1 root 1567: 1568: /* Get the old lr if we saved it. */ 1569: if (regs_ever_live[65]) 1.1.1.2 root 1570: asm_fprintf (file, "\t{l|lwz} 0,8(1)\n"); 1.1 root 1571: 1572: /* Get the old cr if we saved it. */ 1573: if (must_save_cr ()) 1.1.1.2 root 1574: asm_fprintf (file, "\t{l|lwz} 12,4(1)\n"); 1.1 root 1575: 1576: /* Set LR here to try to overlap restores below. */ 1577: if (regs_ever_live[65]) 1.1.1.2 root 1578: asm_fprintf (file, "\tmtlr 0\n"); 1.1 root 1579: 1580: /* Restore gpr's. */ 1.1.1.2 root 1581: if (! TARGET_POWER || first_reg == 31) 1582: { 1583: int regno, loc; 1584: 1585: for (regno = first_reg, 1586: loc = - (32 - first_reg) * 4 - (64 - first_fp_reg) * 8; 1587: regno < 32; 1588: regno++, loc += 4) 1589: asm_fprintf (file, "\t{l|lwz} %d,%d(1)\n", regno, loc); 1590: } 1591: 1.1 root 1592: else if (first_reg != 32) 1.1.1.2 root 1593: asm_fprintf (file, "\t{lm|lmw} %d,%d(1)\n", first_reg, 1594: - (32 - first_reg) * 4 - (64 - first_fp_reg) * 8); 1.1 root 1595: 1596: /* Restore fpr's if we can do it without calling a function. */ 1597: if (first_fp_reg == 62) 1.1.1.2 root 1598: asm_fprintf (file, "\tlfd 30,-16(1)\n\tlfd 31,-8(1)\n"); 1.1 root 1599: else if (first_fp_reg == 63) 1.1.1.2 root 1600: asm_fprintf (file, "\tlfd 31,-8(1)\n"); 1.1 root 1601: 1602: /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4 1603: that were used. */ 1604: if (must_save_cr ()) 1.1.1.2 root 1605: asm_fprintf (file, "\tmtcrf %d,12\n", 1606: (regs_ever_live[70] != 0) * 0x20 1607: + (regs_ever_live[71] != 0) * 0x10 1608: + (regs_ever_live[72] != 0) * 0x8); 1.1 root 1609: 1610: /* If we have to restore more than two FP registers, branch to the 1611: restore function. It will return to our caller. */ 1612: if (first_fp_reg < 62) 1.1.1.2 root 1613: asm_fprintf (file, "\tb ._restf%d\n", first_fp_reg - 32); 1.1 root 1614: else 1.1.1.2 root 1615: asm_fprintf (file, "\t{br|blr}\n"); 1.1 root 1616: } 1617: 1618: /* Output a traceback table here. See /usr/include/sys/debug.h for info 1.1.1.3 ! root 1619: on its format. 1.1 root 1620: 1.1.1.3 ! root 1621: We don't output a traceback table if -finhibit-size-directive was ! 1622: used. The documentation for -finhibit-size-directive reads ! 1623: ``don't output a @code{.size} assembler directive, or anything ! 1624: else that would cause trouble if the function is split in the ! 1625: middle, and the two halves are placed at locations far apart in ! 1626: memory.'' The traceback table has this property, since it ! 1627: includes the offset from the start of the function to the ! 1628: traceback table itself. */ ! 1629: if (! flag_inhibit_size_directive) ! 1630: { ! 1631: char *fname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0); ! 1632: int fixed_parms, float_parms, parm_info; ! 1633: int i; ! 1634: ! 1635: /* Need label immediately before tbtab, so we can compute its offset ! 1636: from the function start. */ ! 1637: if (*fname == '*') ! 1638: ++fname; ! 1639: ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT"); ! 1640: ASM_OUTPUT_LABEL (file, fname); ! 1641: ! 1642: /* The .tbtab pseudo-op can only be used for the first eight ! 1643: expressions, since it can't handle the possibly variable ! 1644: length fields that follow. However, if you omit the optional ! 1645: fields, the assembler outputs zeros for all optional fields ! 1646: anyways, giving each variable length field is minimum length ! 1647: (as defined in sys/debug.h). Thus we can not use the .tbtab ! 1648: pseudo-op at all. */ ! 1649: ! 1650: /* An all-zero word flags the start of the tbtab, for debuggers ! 1651: that have to find it by searching forward from the entry ! 1652: point or from the current pc. */ ! 1653: fprintf (file, "\t.long 0\n"); ! 1654: ! 1655: /* Tbtab format type. Use format type 0. */ ! 1656: fprintf (file, "\t.byte 0,"); ! 1657: ! 1658: /* Language type. Unfortunately, there doesn't seem to be any ! 1659: official way to get this info, so we use language_string. C ! 1660: is 0. C++ is 9. No number defined for Obj-C, so use the ! 1661: value for C for now. */ ! 1662: if (! strcmp (language_string, "GNU C") ! 1663: || ! strcmp (language_string, "GNU Obj-C")) ! 1664: i = 0; ! 1665: else if (! strcmp (language_string, "GNU F77")) ! 1666: i = 1; ! 1667: else if (! strcmp (language_string, "GNU Ada")) ! 1668: i = 3; ! 1669: else if (! strcmp (language_string, "GNU PASCAL")) ! 1670: i = 2; ! 1671: else if (! strcmp (language_string, "GNU C++")) ! 1672: i = 9; ! 1673: else ! 1674: abort (); ! 1675: fprintf (file, "%d,", i); 1.1 root 1676: 1.1.1.3 ! root 1677: /* 8 single bit fields: global linkage (not set for C extern linkage, ! 1678: apparently a PL/I convention?), out-of-line epilogue/prologue, offset ! 1679: from start of procedure stored in tbtab, internal function, function ! 1680: has controlled storage, function has no toc, function uses fp, ! 1681: function logs/aborts fp operations. */ ! 1682: /* Assume that fp operations are used if any fp reg must be saved. */ ! 1683: fprintf (file, "%d,", (1 << 5) | ((first_fp_reg != 64) << 1)); ! 1684: ! 1685: /* 6 bitfields: function is interrupt handler, name present in ! 1686: proc table, function calls alloca, on condition directives ! 1687: (controls stack walks, 3 bits), saves condition reg, saves ! 1688: link reg. */ ! 1689: /* The `function calls alloca' bit seems to be set whenever reg 31 is ! 1690: set up as a frame pointer, even when there is no alloca call. */ ! 1691: fprintf (file, "%d,", ! 1692: ((1 << 6) | (frame_pointer_needed << 5) ! 1693: | (must_save_cr () << 1) | (regs_ever_live[65]))); ! 1694: ! 1695: /* 3 bitfields: saves backchain, spare bit, number of fpr saved ! 1696: (6 bits). */ ! 1697: fprintf (file, "%d,", ! 1698: (must_push << 7) | (64 - first_fp_reg_to_save ())); ! 1699: ! 1700: /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */ ! 1701: fprintf (file, "%d,", (32 - first_reg_to_save ())); ! 1702: ! 1703: { ! 1704: /* Compute the parameter info from the function decl argument ! 1705: list. */ ! 1706: tree decl; ! 1707: int next_parm_info_bit; ! 1708: ! 1709: next_parm_info_bit = 31; ! 1710: parm_info = 0; ! 1711: fixed_parms = 0; ! 1712: float_parms = 0; 1.1 root 1713: 1.1.1.3 ! root 1714: for (decl = DECL_ARGUMENTS (current_function_decl); ! 1715: decl; decl = TREE_CHAIN (decl)) ! 1716: { ! 1717: rtx parameter = DECL_INCOMING_RTL (decl); ! 1718: enum machine_mode mode = GET_MODE (parameter); ! 1719: ! 1720: if (GET_CODE (parameter) == REG) ! 1721: { ! 1722: if (GET_MODE_CLASS (mode) == MODE_FLOAT) ! 1723: { ! 1724: int bits; ! 1725: ! 1726: float_parms++; ! 1727: ! 1728: if (mode == SFmode) ! 1729: bits = 0x2; ! 1730: else if (mode == DFmode) ! 1731: bits = 0x3; ! 1732: else ! 1733: abort (); ! 1734: ! 1735: /* If only one bit will fit, don't or in this entry. */ ! 1736: if (next_parm_info_bit > 0) ! 1737: parm_info |= (bits << (next_parm_info_bit - 1)); ! 1738: next_parm_info_bit -= 2; ! 1739: } ! 1740: else ! 1741: { ! 1742: fixed_parms += ((GET_MODE_SIZE (mode) ! 1743: + (UNITS_PER_WORD - 1)) ! 1744: / UNITS_PER_WORD); ! 1745: next_parm_info_bit -= 1; ! 1746: } ! 1747: } ! 1748: } ! 1749: } 1.1 root 1750: 1.1.1.3 ! root 1751: /* Number of fixed point parameters. */ ! 1752: /* This is actually the number of words of fixed point parameters; thus ! 1753: an 8 byte struct counts as 2; and thus the maximum value is 8. */ ! 1754: fprintf (file, "%d,", fixed_parms); ! 1755: ! 1756: /* 2 bitfields: number of floating point parameters (7 bits), parameters ! 1757: all on stack. */ ! 1758: /* This is actually the number of fp registers that hold parameters; ! 1759: and thus the maximum value is 13. */ ! 1760: /* Set parameters on stack bit if parameters are not in their original ! 1761: registers, regardless of whether they are on the stack? Xlc ! 1762: seems to set the bit when not optimizing. */ ! 1763: fprintf (file, "%d\n", ((float_parms << 1) | (! optimize))); ! 1764: ! 1765: /* Optional fields follow. Some are variable length. */ ! 1766: ! 1767: /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float, ! 1768: 11 double float. */ ! 1769: /* There is an entry for each parameter in a register, in the order that ! 1770: they occur in the parameter list. Any intervening arguments on the ! 1771: stack are ignored. If the list overflows a long (max possible length ! 1772: 34 bits) then completely leave off all elements that don't fit. */ ! 1773: /* Only emit this long if there was at least one parameter. */ ! 1774: if (fixed_parms || float_parms) ! 1775: fprintf (file, "\t.long %d\n", parm_info); ! 1776: ! 1777: /* Offset from start of code to tb table. */ ! 1778: fprintf (file, "\t.long "); ! 1779: ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT"); ! 1780: RS6000_OUTPUT_BASENAME (file, fname); ! 1781: fprintf (file, "-."); ! 1782: RS6000_OUTPUT_BASENAME (file, fname); ! 1783: fprintf (file, "\n"); ! 1784: ! 1785: /* Interrupt handler mask. */ ! 1786: /* Omit this long, since we never set the interrupt handler bit ! 1787: above. */ ! 1788: ! 1789: /* Number of CTL (controlled storage) anchors. */ ! 1790: /* Omit this long, since the has_ctl bit is never set above. */ ! 1791: ! 1792: /* Displacement into stack of each CTL anchor. */ ! 1793: /* Omit this list of longs, because there are no CTL anchors. */ ! 1794: ! 1795: /* Length of function name. */ ! 1796: fprintf (file, "\t.short %d\n", strlen (fname)); ! 1797: ! 1798: /* Function name. */ ! 1799: assemble_string (fname, strlen (fname)); ! 1800: ! 1801: /* Register for alloca automatic storage; this is always reg 31. ! 1802: Only emit this if the alloca bit was set above. */ ! 1803: if (frame_pointer_needed) ! 1804: fprintf (file, "\t.byte 31\n"); ! 1805: } 1.1 root 1806: } 1807: 1808: /* Output a TOC entry. We derive the entry name from what is 1809: being written. */ 1810: 1811: void 1812: output_toc (file, x, labelno) 1813: FILE *file; 1814: rtx x; 1815: int labelno; 1816: { 1817: char buf[256]; 1818: char *name = buf; 1819: rtx base = x; 1820: int offset = 0; 1821: 1822: ASM_OUTPUT_INTERNAL_LABEL (file, "LC", labelno); 1823: 1.1.1.2 root 1824: /* Handle FP constants specially. Note that if we have a minimal 1825: TOC, things we put here aren't actually in the TOC, so we can allow 1826: FP constants. */ 1.1 root 1827: if (GET_CODE (x) == CONST_DOUBLE 1828: && GET_MODE (x) == DFmode 1829: && TARGET_FLOAT_FORMAT == HOST_FLOAT_FORMAT 1830: && BITS_PER_WORD == HOST_BITS_PER_INT 1.1.1.2 root 1831: && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) 1.1 root 1832: { 1.1.1.2 root 1833: if (TARGET_MINIMAL_TOC) 1834: fprintf (file, "\t.long %d\n\t.long %d\n", 1835: CONST_DOUBLE_LOW (x), CONST_DOUBLE_HIGH (x)); 1836: else 1837: fprintf (file, "\t.tc FD_%x_%x[TC],%d,%d\n", 1838: CONST_DOUBLE_LOW (x), CONST_DOUBLE_HIGH (x), 1839: CONST_DOUBLE_LOW (x), CONST_DOUBLE_HIGH (x)); 1.1 root 1840: return; 1841: } 1842: else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode 1.1.1.2 root 1843: && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) 1.1 root 1844: { 1845: rtx val = operand_subword (x, 0, 0, SFmode); 1846: 1847: if (val == 0 || GET_CODE (val) != CONST_INT) 1848: abort (); 1849: 1.1.1.2 root 1850: if (TARGET_MINIMAL_TOC) 1851: fprintf (file, "\t.long %d\n", INTVAL (val)); 1852: else 1853: fprintf (file, "\t.tc FS_%x[TC],%d\n", INTVAL (val), INTVAL (val)); 1.1 root 1854: return; 1855: } 1856: 1857: if (GET_CODE (x) == CONST) 1858: { 1859: base = XEXP (XEXP (x, 0), 0); 1860: offset = INTVAL (XEXP (XEXP (x, 0), 1)); 1861: } 1862: 1863: if (GET_CODE (base) == SYMBOL_REF) 1864: name = XSTR (base, 0); 1865: else if (GET_CODE (base) == LABEL_REF) 1866: ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (base, 0))); 1867: else if (GET_CODE (base) == CODE_LABEL) 1868: ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (base)); 1869: else 1870: abort (); 1871: 1.1.1.2 root 1872: if (TARGET_MINIMAL_TOC) 1873: fprintf (file, "\t.long "); 1874: else 1875: { 1876: fprintf (file, "\t.tc "); 1877: RS6000_OUTPUT_BASENAME (file, name); 1.1 root 1878: 1.1.1.2 root 1879: if (offset < 0) 1880: fprintf (file, ".N%d", - offset); 1881: else if (offset) 1882: fprintf (file, ".P%d", offset); 1.1 root 1883: 1.1.1.2 root 1884: fprintf (file, "[TC],"); 1885: } 1.1 root 1886: output_addr_const (file, x); 1887: fprintf (file, "\n"); 1888: } 1889: 1890: /* Output an assembler pseudo-op to write an ASCII string of N characters 1891: starting at P to FILE. 1892: 1893: On the RS/6000, we have to do this using the .byte operation and 1894: write out special characters outside the quoted string. 1895: Also, the assembler is broken; very long strings are truncated, 1896: so we must artificially break them up early. */ 1897: 1898: void 1899: output_ascii (file, p, n) 1900: FILE *file; 1901: char *p; 1902: int n; 1903: { 1904: char c; 1905: int i, count_string; 1906: char *for_string = "\t.byte \""; 1907: char *for_decimal = "\t.byte "; 1908: char *to_close = NULL; 1909: 1910: count_string = 0; 1911: for (i = 0; i < n; i++) 1912: { 1913: c = *p++; 1914: if (c >= ' ' && c < 0177) 1915: { 1916: if (for_string) 1917: fputs (for_string, file); 1918: putc (c, file); 1919: 1920: /* Write two quotes to get one. */ 1921: if (c == '"') 1922: { 1923: putc (c, file); 1924: ++count_string; 1925: } 1926: 1927: for_string = NULL; 1928: for_decimal = "\"\n\t.byte "; 1929: to_close = "\"\n"; 1930: ++count_string; 1931: 1932: if (count_string >= 512) 1933: { 1934: fputs (to_close, file); 1935: 1936: for_string = "\t.byte \""; 1937: for_decimal = "\t.byte "; 1938: to_close = NULL; 1939: count_string = 0; 1940: } 1941: } 1942: else 1943: { 1944: if (for_decimal) 1945: fputs (for_decimal, file); 1946: fprintf (file, "%d", c); 1947: 1948: for_string = "\n\t.byte \""; 1949: for_decimal = ", "; 1950: to_close = "\n"; 1951: count_string = 0; 1952: } 1953: } 1954: 1955: /* Now close the string if we have written one. Then end the line. */ 1956: if (to_close) 1957: fprintf (file, to_close); 1958: } 1959: 1960: /* Generate a unique section name for FILENAME for a section type 1961: represented by SECTION_DESC. Output goes into BUF. 1962: 1963: SECTION_DESC can be any string, as long as it is different for each 1964: possible section type. 1965: 1966: We name the section in the same manner as xlc. The name begins with an 1967: underscore followed by the filename (after stripping any leading directory 1968: names) with the last period replaced by the string SECTION_DESC. If 1969: FILENAME does not contain a period, SECTION_DESC is appended to the end of 1970: the name. */ 1971: 1972: void 1973: rs6000_gen_section_name (buf, filename, section_desc) 1974: char **buf; 1975: char *filename; 1976: char *section_desc; 1977: { 1978: char *q, *after_last_slash, *last_period; 1979: char *p; 1980: int len; 1981: 1982: after_last_slash = filename; 1983: for (q = filename; *q; q++) 1984: { 1985: if (*q == '/') 1986: after_last_slash = q + 1; 1987: else if (*q == '.') 1988: last_period = q; 1989: } 1990: 1991: len = strlen (after_last_slash) + strlen (section_desc) + 2; 1992: *buf = (char *) permalloc (len); 1993: 1994: p = *buf; 1995: *p++ = '_'; 1996: 1997: for (q = after_last_slash; *q; q++) 1998: { 1999: if (q == last_period) 2000: { 2001: strcpy (p, section_desc); 2002: p += strlen (section_desc); 2003: } 2004: 2005: else if (isalnum (*q)) 2006: *p++ = *q; 2007: } 2008: 2009: if (last_period == 0) 2010: strcpy (p, section_desc); 2011: else 2012: *p = '\0'; 2013: } 2014: 2015: /* Write function profiler code. */ 2016: 2017: void 2018: output_function_profiler (file, labelno) 2019: FILE *file; 2020: int labelno; 2021: { 2022: /* The last used parameter register. */ 2023: int last_parm_reg; 2024: int i, j; 1.1.1.3 ! root 2025: char buf[100]; 1.1 root 2026: 2027: /* Set up a TOC entry for the profiler label. */ 2028: toc_section (); 1.1.1.3 ! root 2029: ASM_OUTPUT_INTERNAL_LABEL (file, "LPC", labelno); ! 2030: ASM_GENERATE_INTERNAL_LABEL (buf, "LP", labelno); 1.1.1.2 root 2031: if (TARGET_MINIMAL_TOC) 1.1.1.3 ! root 2032: { ! 2033: fprintf (file, "\t.long "); ! 2034: assemble_name (file, buf); ! 2035: fprintf (file, "\n"); ! 2036: } 1.1.1.2 root 2037: else 1.1.1.3 ! root 2038: { ! 2039: fprintf (file, "\t.tc\t"); ! 2040: assemble_name (file, buf); ! 2041: fprintf (file, "[TC],"); ! 2042: assemble_name (file, buf); ! 2043: fprintf (file, "\n"); ! 2044: } 1.1 root 2045: text_section (); 2046: 2047: /* Figure out last used parameter register. The proper thing to do is 2048: to walk incoming args of the function. A function might have live 2049: parameter registers even if it has no incoming args. */ 2050: 2051: for (last_parm_reg = 10; 2052: last_parm_reg > 2 && ! regs_ever_live [last_parm_reg]; 2053: last_parm_reg--) 2054: ; 2055: 2056: /* Save parameter registers in regs 23-30. Don't overwrite reg 31, since 2057: it might be set up as the frame pointer. */ 2058: 2059: for (i = 3, j = 30; i <= last_parm_reg; i++, j--) 2060: fprintf (file, "\tai %d,%d,0\n", j, i); 2061: 2062: /* Load location address into r3, and call mcount. */ 2063: 1.1.1.3 ! root 2064: ASM_GENERATE_INTERNAL_LABEL (buf, "LPC", labelno); ! 2065: fprintf (file, "\tl 3,"); ! 2066: assemble_name (file, buf); ! 2067: fprintf (file, "(2)\n\tbl .mcount\n"); 1.1 root 2068: 2069: /* Restore parameter registers. */ 2070: 2071: for (i = 3, j = 30; i <= last_parm_reg; i++, j--) 2072: fprintf (file, "\tai %d,%d,0\n", i, j); 2073: } 1.1.1.3 ! root 2074: ! 2075: /* Adjust the cost of a scheduling dependency. Return the new cost of ! 2076: a dependency LINK or INSN on DEP_INSN. COST is the current cost. */ ! 2077: ! 2078: int ! 2079: rs6000_adjust_cost (insn, link, dep_insn, cost) ! 2080: rtx insn; ! 2081: rtx link; ! 2082: rtx dep_insn; ! 2083: int cost; ! 2084: { ! 2085: if (! recog_memoized (insn)) ! 2086: return 0; ! 2087: ! 2088: if (REG_NOTE_KIND (link) != 0) ! 2089: return 0; ! 2090: ! 2091: if (REG_NOTE_KIND (link) == 0) ! 2092: { ! 2093: /* Data dependency; DEP_INSN writes a register that INSN reads some ! 2094: cycles later. */ ! 2095: ! 2096: /* Tell the first scheduling pass about the latency between a mtctr ! 2097: and bctr (and mtlr and br/blr). The first scheduling pass will not ! 2098: know about this latency since the mtctr instruction, which has the ! 2099: latency associated to it, will be generated by reload. */ ! 2100: if (get_attr_type (insn) == TYPE_JMPREG) ! 2101: return TARGET_POWER ? 5 : 4; ! 2102: ! 2103: /* Fall out to return default cost. */ ! 2104: } ! 2105: ! 2106: return cost; ! 2107: }
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