![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to rs6000.h CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [GCC 2.x] / gcc / config / rs6000|
Return to rs6000.h CVS log | Up to [GCC 2.x] / gcc / config / rs6000 |
1.1 root 1: /* Definitions of target machine for GNU compiler, for IBM RS/6000. 1.1.1.3 ! root 2: Copyright (C) 1992, 1993, 1994 Free Software Foundation, Inc. ! 3: Contributed by Richard Kenner ([email protected]) 1.1 root 4: 5: This file is part of GNU CC. 6: 7: GNU CC is free software; you can redistribute it and/or modify 8: it under the terms of the GNU General Public License as published by 9: the Free Software Foundation; either version 2, or (at your option) 10: any later version. 11: 12: GNU CC is distributed in the hope that it will be useful, 13: but WITHOUT ANY WARRANTY; without even the implied warranty of 14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15: GNU General Public License for more details. 16: 17: You should have received a copy of the GNU General Public License 18: along with GNU CC; see the file COPYING. If not, write to 19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ 20: 21: 22: /* Note that some other tm.h files include this one and then override 23: many of the definitions that relate to assembler syntax. */ 24: 25: 26: /* Names to predefine in the preprocessor for this target machine. */ 27: 1.1.1.3 ! root 28: #define CPP_PREDEFINES "-D_IBMR2 -D_POWER -D_AIX -D_AIX32 \ ! 29: -Asystem(unix) -Asystem(aix) -Acpu(rs6000) -Amachine(rs6000)" 1.1 root 30: 31: /* Print subsidiary information on the compiler version in use. */ 32: #define TARGET_VERSION ; 33: 34: /* Tell the assembler to assume that all undefined names are external. 35: 36: Don't do this until the fixed IBM assembler is more generally available. 37: When this becomes permanently defined, the ASM_OUTPUT_EXTERNAL, 38: ASM_OUTPUT_EXTERNAL_LIBCALL, and RS6000_OUTPUT_BASENAME macros will no 39: longer be needed. Also, the extern declaration of mcount in ASM_FILE_START 40: will no longer be needed. */ 41: 42: /* #define ASM_SPEC "-u" */ 43: 1.1.1.3 ! root 44: /* Define appropriate architecture macros for preprocessor depending on ! 45: target switches. */ ! 46: ! 47: #define CPP_SPEC "\ ! 48: %{!mcpu*: \ ! 49: %{mpower: %{!mpower2: -D_ARCH_PWR}} \ ! 50: %{mpower2: -D_ARCH_PWR2} \ ! 51: %{mpowerpc*: -D_ARCH_PPC} \ ! 52: %{mno-power: %{!mpowerpc*: -D_ARCH_COM}} \ ! 53: %{!mno-power: %{!mpower2: -D_ARCH_PWR}}} \ ! 54: %{mcpu=common: -D_ARCH_COM} \ ! 55: %{mcpu=power: -D_ARCH_PWR} \ ! 56: %{mcpu=powerpc: -D_ARCH_PPC} \ ! 57: %{mcpu=rios: -D_ARCH_PWR} \ ! 58: %{mcpu=rios1: -D_ARCH_PWR} \ ! 59: %{mcpu=rios2: -D_ARCH_PWR2} \ ! 60: %{mcpu=rsc: -D_ARCH_PWR} \ ! 61: %{mcpu=rsc1: -D_ARCH_PWR} \ ! 62: %{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \ ! 63: %{mcpu=mpc601: -D_ARCH_PPC -D_ARCH_PWR} \ ! 64: %{mcpu=ppc601: -D_ARCH_PPC -D_ARCH_PWR} \ ! 65: %{mcpu=603: -D_ARCH_PPC} \ ! 66: %{mcpu=mpc603: -D_ARCH_PPC} \ ! 67: %{mcpu=ppc603: -D_ARCH_PPC} \ ! 68: %{mcpu=604: -D_ARCH_PPC} \ ! 69: %{mcpu=mpc604: -D_ARCH_PPC} \ ! 70: %{mcpu=ppc604: -D_ARCH_PPC}" ! 71: 1.1 root 72: /* Define the options for the binder: Start text at 512, align all segments 73: to 512 bytes, and warn if there is text relocation. 74: 75: The -bhalt:4 option supposedly changes the level at which ld will abort, 76: but it also suppresses warnings about multiply defined symbols and is 77: used by the AIX cc command. So we use it here. 78: 79: -bnodelcsect undoes a poor choice of default relating to multiply-defined 80: csects. See AIX documentation for more information about this. */ 81: 1.1.1.2 root 82: #define LINK_SPEC "-T512 -H512 %{!r:-btextro} -bhalt:4 -bnodelcsect\ 83: %{static:-bnso -bI:/lib/syscalls.exp} %{g*:-bexport:/usr/lib/libg.exp}" 1.1 root 84: 85: /* Profiled library versions are used by linking with special directories. */ 86: #define LIB_SPEC "%{pg:-L/lib/profiled -L/usr/lib/profiled}\ 87: %{p:-L/lib/profiled -L/usr/lib/profiled} %{g*:-lg} -lc" 88: 89: /* gcc must do the search itself to find libgcc.a, not use -l. */ 90: #define LINK_LIBGCC_SPECIAL_1 91: 92: /* Don't turn -B into -L if the argument specifies a relative file name. */ 93: #define RELATIVE_PREFIX_NOT_LINKDIR 94: 1.1.1.2 root 95: /* Architecture type. */ 1.1 root 96: 1.1.1.2 root 97: extern int target_flags; 1.1 root 98: 1.1.1.2 root 99: /* Use POWER architecture instructions and MQ register. */ 100: #define MASK_POWER 0x01 1.1 root 101: 1.1.1.2 root 102: /* Use POWER2 extensions to POWER architecture. */ 103: #define MASK_POWER2 0x02 104: 105: /* Use PowerPC architecture instructions. */ 106: #define MASK_POWERPC 0x04 107: 1.1.1.3 ! root 108: /* Use PowerPC General Purpose group optional instructions, e.g. fsqrt. */ ! 109: #define MASK_PPC_GPOPT 0x08 ! 110: ! 111: /* Use PowerPC Graphics group optional instructions, e.g. fsel. */ ! 112: #define MASK_PPC_GFXOPT 0x10 1.1.1.2 root 113: 114: /* Use PowerPC-64 architecture instructions. */ 1.1.1.3 ! root 115: #define MASK_POWERPC64 0x20 1.1.1.2 root 116: 117: /* Use revised mnemonic names defined for PowerPC architecture. */ 1.1.1.3 ! root 118: #define MASK_NEW_MNEMONICS 0x40 1.1.1.2 root 119: 120: /* Disable placing fp constants in the TOC; can be turned on when the 121: TOC overflows. */ 1.1.1.3 ! root 122: #define MASK_NO_FP_IN_TOC 0x80 ! 123: ! 124: /* Disable placing symbol+offset constants in the TOC; can be turned on when ! 125: the TOC overflows. */ ! 126: #define MASK_NO_SUM_IN_TOC 0x100 1.1.1.2 root 127: 128: /* Output only one TOC entry per module. Normally linking fails if 129: there are more than 16K unique variables/constants in an executable. With 130: this option, linking fails only if there are more than 16K modules, or 131: if there are more than 16K unique variables/constant in a single module. 1.1 root 132: 1.1.1.2 root 133: This is at the cost of having 2 extra loads and one extra store per 134: function, and one less allocatable register. */ 1.1.1.3 ! root 135: #define MASK_MINIMAL_TOC 0x200 1.1.1.2 root 136: 137: #define TARGET_POWER (target_flags & MASK_POWER) 138: #define TARGET_POWER2 (target_flags & MASK_POWER2) 139: #define TARGET_POWERPC (target_flags & MASK_POWERPC) 1.1.1.3 ! root 140: #define TARGET_PPC_GPOPT (target_flags & MASK_PPC_GPOPT) ! 141: #define TARGET_PPC_GFXOPT (target_flags & MASK_PPC_GFXOPT) 1.1.1.2 root 142: #define TARGET_POWERPC64 (target_flags & MASK_POWERPC64) 143: #define TARGET_NEW_MNEMONICS (target_flags & MASK_NEW_MNEMONICS) 144: #define TARGET_NO_FP_IN_TOC (target_flags & MASK_NO_FP_IN_TOC) 1.1.1.3 ! root 145: #define TARGET_NO_SUM_IN_TOC (target_flags & MASK_NO_SUM_IN_TOC) 1.1.1.2 root 146: #define TARGET_MINIMAL_TOC (target_flags & MASK_MINIMAL_TOC) 147: 148: /* Run-time compilation parameters selecting different hardware subsets. 149: 150: Macro to define tables used to set the flags. 1.1 root 151: This is a list in braces of pairs in braces, 152: each pair being { "NAME", VALUE } 153: where VALUE is the bits to set or minus the bits to clear. 154: An empty string NAME is used to identify the default VALUE. */ 155: 1.1.1.2 root 156: #define TARGET_SWITCHES \ 157: {{"power", MASK_POWER}, \ 158: {"power2", MASK_POWER | MASK_POWER2}, \ 159: {"no-power2", - MASK_POWER2}, \ 160: {"no-power", - (MASK_POWER | MASK_POWER2)}, \ 161: {"powerpc", MASK_POWERPC}, \ 1.1.1.3 ! root 162: {"no-powerpc", - (MASK_POWERPC | MASK_PPC_GPOPT \ ! 163: | MASK_PPC_GFXOPT | MASK_POWERPC64)}, \ ! 164: {"powerpc-gpopt", MASK_POWERPC | MASK_PPC_GPOPT}, \ ! 165: {"no-powerpc-gpopt", - MASK_PPC_GPOPT}, \ ! 166: {"powerpc-gfxopt", MASK_POWERPC | MASK_PPC_GFXOPT}, \ ! 167: {"no-powerpc-gfxopt", - MASK_PPC_GFXOPT}, \ 1.1.1.2 root 168: {"new-mnemonics", MASK_NEW_MNEMONICS}, \ 169: {"old-mnemonics", -MASK_NEW_MNEMONICS}, \ 1.1.1.3 ! root 170: {"full-toc", - (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC \ ! 171: | MASK_MINIMAL_TOC)}, \ 1.1.1.2 root 172: {"fp-in-toc", - MASK_NO_FP_IN_TOC}, \ 173: {"no-fp-in-toc", MASK_NO_FP_IN_TOC}, \ 1.1.1.3 ! root 174: {"sum-in-toc", - MASK_NO_SUM_IN_TOC}, \ ! 175: {"no-sum-in-toc", MASK_NO_SUM_IN_TOC}, \ 1.1.1.2 root 176: {"minimal-toc", MASK_MINIMAL_TOC}, \ 1.1.1.3 ! root 177: {"minimal-toc", - (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC)}, \ 1.1.1.2 root 178: {"no-minimal-toc", - MASK_MINIMAL_TOC}, \ 179: {"", TARGET_DEFAULT}} 180: 181: #define TARGET_DEFAULT MASK_POWER 182: 183: /* Processor type. */ 184: enum processor_type 185: {PROCESSOR_RIOS1, 186: PROCESSOR_RIOS2, 187: PROCESSOR_PPC601, 188: PROCESSOR_PPC603, 189: PROCESSOR_PPC604, 190: PROCESSOR_PPC620}; 191: 192: extern enum processor_type rs6000_cpu; 193: 194: /* Recast the processor type to the cpu attribute. */ 195: #define rs6000_cpu_attr ((enum attr_cpu)rs6000_cpu) 196: 1.1.1.3 ! root 197: /* Define generic processor types based upon current deployment. */ ! 198: #define PROCESSOR_COMMON PROCESSOR_PPC601 ! 199: #define PROCESSOR_POWER PROCESSOR_RIOS1 ! 200: #define PROCESSOR_POWERPC PROCESSOR_PPC601 ! 201: 1.1.1.2 root 202: /* Define the default processor. This is overridden by other tm.h files. */ 203: #define PROCESSOR_DEFAULT PROCESSOR_RIOS1 204: 205: /* Specify the dialect of assembler to use. New mnemonics is dialect one 206: and the old mnemonics are dialect zero. */ 207: #define ASSEMBLER_DIALECT TARGET_NEW_MNEMONICS ? 1 : 0 208: 209: /* This macro is similar to `TARGET_SWITCHES' but defines names of 210: command options that have values. Its definition is an 211: initializer with a subgrouping for each command option. 212: 213: Each subgrouping contains a string constant, that defines the 214: fixed part of the option name, and the address of a variable. 215: The variable, type `char *', is set to the variable part of the 216: given option if the fixed part matches. The actual option name 217: is made by appending `-m' to the specified name. 218: 219: Here is an example which defines `-mshort-data-NUMBER'. If the 220: given option is `-mshort-data-512', the variable `m88k_short_data' 221: will be set to the string `"512"'. 222: 223: extern char *m88k_short_data; 224: #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */ 225: 226: #define TARGET_OPTIONS \ 227: { {"cpu=", &rs6000_cpu_string}} 228: 229: extern char *rs6000_cpu_string; 230: 231: /* Sometimes certain combinations of command options do not make sense 232: on a particular target machine. You can define a macro 233: `OVERRIDE_OPTIONS' to take account of this. This macro, if 234: defined, is executed once just after all the command options have 235: been parsed. 1.1 root 236: 1.1.1.2 root 237: On the RS/6000 this is used to define the target cpu type. */ 1.1 root 238: 1.1.1.2 root 239: #define OVERRIDE_OPTIONS rs6000_override_options () 1.1 root 240: 1.1.1.3 ! root 241: /* Show we can debug even without a frame pointer. */ ! 242: #define CAN_DEBUG_WITHOUT_FP 1.1 root 243: 244: /* target machine storage layout */ 245: 246: /* Define this macro if it is advisable to hold scalars in registers 247: in a wider mode than that declared by the program. In such cases, 248: the value is constrained to be within the bounds of the declared 249: type, but kept valid in the wider mode. The signedness of the 250: extension may differ from that of the type. */ 251: 252: #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ 253: if (GET_MODE_CLASS (MODE) == MODE_INT \ 254: && GET_MODE_SIZE (MODE) < 4) \ 255: (MODE) = SImode; 256: 257: /* Define this if most significant bit is lowest numbered 258: in instructions that operate on numbered bit-fields. */ 259: /* That is true on RS/6000. */ 260: #define BITS_BIG_ENDIAN 1 261: 262: /* Define this if most significant byte of a word is the lowest numbered. */ 263: /* That is true on RS/6000. */ 264: #define BYTES_BIG_ENDIAN 1 265: 266: /* Define this if most significant word of a multiword number is lowest 267: numbered. 268: 269: For RS/6000 we can decide arbitrarily since there are no machine 270: instructions for them. Might as well be consistent with bits and bytes. */ 271: #define WORDS_BIG_ENDIAN 1 272: 273: /* number of bits in an addressable storage unit */ 274: #define BITS_PER_UNIT 8 275: 276: /* Width in bits of a "word", which is the contents of a machine register. 277: Note that this is not necessarily the width of data type `int'; 278: if using 16-bit ints on a 68000, this would still be 32. 279: But on a machine with 16-bit registers, this would be 16. */ 280: #define BITS_PER_WORD 32 281: 282: /* Width of a word, in units (bytes). */ 283: #define UNITS_PER_WORD 4 284: 285: /* Type used for ptrdiff_t, as a string used in a declaration. */ 286: #define PTRDIFF_TYPE "int" 287: 288: /* Type used for wchar_t, as a string used in a declaration. */ 289: #define WCHAR_TYPE "short unsigned int" 290: 291: /* Width of wchar_t in bits. */ 292: #define WCHAR_TYPE_SIZE 16 293: 294: /* Width in bits of a pointer. 295: See also the macro `Pmode' defined below. */ 296: #define POINTER_SIZE 32 297: 298: /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 299: #define PARM_BOUNDARY 32 300: 301: /* Boundary (in *bits*) on which stack pointer should be aligned. */ 302: #define STACK_BOUNDARY 64 303: 304: /* Allocation boundary (in *bits*) for the code of a function. */ 305: #define FUNCTION_BOUNDARY 32 306: 307: /* No data type wants to be aligned rounder than this. */ 308: #define BIGGEST_ALIGNMENT 32 309: 310: /* Alignment of field after `int : 0' in a structure. */ 311: #define EMPTY_FIELD_BOUNDARY 32 312: 313: /* Every structure's size must be a multiple of this. */ 314: #define STRUCTURE_SIZE_BOUNDARY 8 315: 316: /* A bitfield declared as `int' forces `int' alignment for the struct. */ 317: #define PCC_BITFIELD_TYPE_MATTERS 1 318: 319: /* Make strings word-aligned so strcpy from constants will be faster. */ 320: #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ 321: (TREE_CODE (EXP) == STRING_CST \ 322: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) 323: 324: /* Make arrays of chars word-aligned for the same reasons. */ 325: #define DATA_ALIGNMENT(TYPE, ALIGN) \ 326: (TREE_CODE (TYPE) == ARRAY_TYPE \ 327: && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ 328: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) 329: 330: /* Non-zero if move instructions will actually fail to work 331: when given unaligned data. */ 332: #define STRICT_ALIGNMENT 0 333: 334: /* Standard register usage. */ 335: 336: /* Number of actual hardware registers. 337: The hardware registers are assigned numbers for the compiler 338: from 0 to just below FIRST_PSEUDO_REGISTER. 339: All registers that the compiler knows about must be given numbers, 340: even those that are not normally considered general registers. 341: 342: RS/6000 has 32 fixed-point registers, 32 floating-point registers, 343: an MQ register, a count register, a link register, and 8 condition 344: register fields, which we view here as separate registers. 345: 346: In addition, the difference between the frame and argument pointers is 347: a function of the number of registers saved, so we need to have a 348: register for AP that will later be eliminated in favor of SP or FP. 349: This is a normal register, but it is fixed. */ 350: 351: #define FIRST_PSEUDO_REGISTER 76 352: 353: /* 1 for registers that have pervasive standard uses 354: and are not available for the register allocator. 355: 356: On RS/6000, r1 is used for the stack and r2 is used as the TOC pointer. 357: 358: cr5 is not supposed to be used. */ 359: 360: #define FIXED_REGISTERS \ 361: {0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 362: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 363: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 364: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 365: 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0} 366: 367: /* 1 for registers not available across function calls. 368: These must include the FIXED_REGISTERS and also any 369: registers that can be used without being saved. 370: The latter must include the registers where values are returned 371: and the register where structure-value addresses are passed. 372: Aside from that, you can include as many other registers as you like. */ 373: 374: #define CALL_USED_REGISTERS \ 375: {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, \ 376: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 377: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \ 378: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 379: 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1} 380: 381: /* List the order in which to allocate registers. Each register must be 382: listed once, even those in FIXED_REGISTERS. 383: 384: We allocate in the following order: 385: fp0 (not saved or used for anything) 386: fp13 - fp2 (not saved; incoming fp arg registers) 387: fp1 (not saved; return value) 388: fp31 - fp14 (saved; order given to save least number) 389: cr1, cr6, cr7 (not saved or special) 390: cr0 (not saved, but used for arithmetic operations) 391: cr2, cr3, cr4 (saved) 392: r0 (not saved; cannot be base reg) 393: r9 (not saved; best for TImode) 394: r11, r10, r8-r4 (not saved; highest used first to make less conflict) 395: r3 (not saved; return value register) 396: r31 - r13 (saved; order given to save least number) 397: r12 (not saved; if used for DImode or DFmode would use r13) 398: mq (not saved; best to use it if we can) 399: ctr (not saved; when we have the choice ctr is better) 400: lr (saved) 401: cr5, r1, r2, ap (fixed) */ 402: 403: #define REG_ALLOC_ORDER \ 404: {32, \ 405: 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, \ 406: 33, \ 407: 63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \ 408: 50, 49, 48, 47, 46, \ 409: 69, 74, 75, 68, 70, 71, 72, \ 410: 0, \ 411: 9, 11, 10, 8, 7, 6, 5, 4, \ 412: 3, \ 413: 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, \ 414: 18, 17, 16, 15, 14, 13, 12, \ 415: 64, 66, 65, \ 416: 73, 1, 2, 67} 417: 418: /* True if register is floating-point. */ 419: #define FP_REGNO_P(N) ((N) >= 32 && (N) <= 63) 420: 421: /* True if register is a condition register. */ 422: #define CR_REGNO_P(N) ((N) >= 68 && (N) <= 75) 423: 424: /* True if register is an integer register. */ 425: #define INT_REGNO_P(N) ((N) <= 31 || (N) == 67) 426: 427: /* Return number of consecutive hard regs needed starting at reg REGNO 428: to hold something of mode MODE. 429: This is ordinarily the length in words of a value of mode MODE 430: but can be less for certain modes in special long registers. 431: 432: On RS/6000, ordinary registers hold 32 bits worth; 433: a single floating point register holds 64 bits worth. */ 434: 435: #define HARD_REGNO_NREGS(REGNO, MODE) \ 436: (FP_REGNO_P (REGNO) \ 437: ? ((GET_MODE_SIZE (MODE) + 2 * UNITS_PER_WORD - 1) / (2 * UNITS_PER_WORD)) \ 438: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) 439: 440: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. 1.1.1.3 ! root 441: For POWER and PowerPC, the GPRs can hold any mode, but the float ! 442: registers only can hold floating modes and DImode, and CR register only ! 443: can hold CC modes. We cannot put TImode anywhere except general ! 444: register and it must be able to fit within the register set. */ 1.1 root 445: 446: #define HARD_REGNO_MODE_OK(REGNO, MODE) \ 1.1.1.3 ! root 447: (FP_REGNO_P (REGNO) ? \ ! 448: (GET_MODE_CLASS (MODE) == MODE_FLOAT \ ! 449: || (GET_MODE_CLASS (MODE) == MODE_INT \ ! 450: && GET_MODE_SIZE (MODE) == 2 * UNITS_PER_WORD)) \ 1.1 root 451: : CR_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_CC \ 1.1.1.3 ! root 452: : ! INT_REGNO_P (REGNO) ? (GET_MODE_CLASS (MODE) == MODE_INT \ ! 453: && GET_MODE_SIZE (MODE) <= UNITS_PER_WORD) \ 1.1 root 454: : 1) 455: 456: /* Value is 1 if it is a good idea to tie two pseudo registers 457: when one has mode MODE1 and one has mode MODE2. 458: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 459: for any hard reg, then this must be 0 for correct output. */ 460: #define MODES_TIEABLE_P(MODE1, MODE2) \ 461: (GET_MODE_CLASS (MODE1) == MODE_FLOAT \ 462: ? GET_MODE_CLASS (MODE2) == MODE_FLOAT \ 463: : GET_MODE_CLASS (MODE2) == MODE_FLOAT \ 464: ? GET_MODE_CLASS (MODE1) == MODE_FLOAT \ 465: : GET_MODE_CLASS (MODE1) == MODE_CC \ 466: ? GET_MODE_CLASS (MODE2) == MODE_CC \ 467: : GET_MODE_CLASS (MODE2) == MODE_CC \ 468: ? GET_MODE_CLASS (MODE1) == MODE_CC \ 469: : 1) 470: 471: /* A C expression returning the cost of moving data from a register of class 472: CLASS1 to one of CLASS2. 473: 474: On the RS/6000, copying between floating-point and fixed-point 475: registers is expensive. */ 476: 477: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ 478: ((CLASS1) == FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 2 \ 479: : (CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS ? 10 \ 480: : (CLASS1) != FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 10 \ 1.1.1.3 ! root 481: : (((CLASS1) == SPECIAL_REGS || (CLASS1) == MQ_REGS \ ! 482: || (CLASS1) == LINK_REGS || (CLASS1) == CTR_REGS) \ ! 483: && ((CLASS2) == SPECIAL_REGS || (CLASS2) == MQ_REGS \ ! 484: || (CLASS2) == LINK_REGS || (CLASS2) == CTR_REGS)) ? 10 \ 1.1 root 485: : 2) 486: 487: /* A C expressions returning the cost of moving data of MODE from a register to 488: or from memory. 489: 490: On the RS/6000, bump this up a bit. */ 491: 1.1.1.3 ! root 492: #define MEMORY_MOVE_COST(MODE) \ ! 493: ((GET_MODE_CLASS (MODE) == MODE_FLOAT \ ! 494: && (rs6000_cpu == PROCESSOR_RIOS1 || rs6000_cpu == PROCESSOR_PPC601) \ ! 495: ? 3 : 2) \ ! 496: + 4) 1.1 root 497: 498: /* Specify the cost of a branch insn; roughly the number of extra insns that 499: should be added to avoid a branch. 500: 501: Set this to 3 on the RS/6000 since that is roughly the average cost of an 502: unscheduled conditional branch. */ 503: 504: #define BRANCH_COST 3 505: 506: /* A C statement (sans semicolon) to update the integer variable COST 507: based on the relationship between INSN that is dependent on 508: DEP_INSN through the dependence LINK. The default is to make no 509: adjustment to COST. On the RS/6000, ignore the cost of anti- and 510: output-dependencies. In fact, output dependencies on the CR do have 511: a cost, but it is probably not worthwhile to track it. */ 512: 513: #define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \ 1.1.1.3 ! root 514: (COST) = rs6000_adjust_cost (INSN,LINK,DEP_INSN,COST) 1.1 root 515: 1.1.1.2 root 516: /* Define this macro to change register usage conditional on target flags. 517: Set MQ register fixed (already call_used) if not POWER architecture 1.1.1.3 ! root 518: (RIOS1, RIOS2, RSC, and PPC601) so that it will not be allocated. */ 1.1.1.2 root 519: 520: #define CONDITIONAL_REGISTER_USAGE \ 521: if (!TARGET_POWER) \ 522: fixed_regs[64] = 1; 523: 1.1 root 524: /* Specify the registers used for certain standard purposes. 525: The values of these macros are register numbers. */ 526: 527: /* RS/6000 pc isn't overloaded on a register that the compiler knows about. */ 528: /* #define PC_REGNUM */ 529: 530: /* Register to use for pushing function arguments. */ 531: #define STACK_POINTER_REGNUM 1 532: 533: /* Base register for access to local variables of the function. */ 534: #define FRAME_POINTER_REGNUM 31 535: 536: /* Value should be nonzero if functions must have frame pointers. 537: Zero means the frame pointer need not be set up (and parms 538: may be accessed via the stack pointer) in functions that seem suitable. 539: This is computed in `reload', in reload1.c. */ 540: #define FRAME_POINTER_REQUIRED 0 541: 542: /* Base register for access to arguments of the function. */ 543: #define ARG_POINTER_REGNUM 67 544: 545: /* Place to put static chain when calling a function that requires it. */ 546: #define STATIC_CHAIN_REGNUM 11 547: 548: /* Place that structure value return address is placed. 549: 550: On the RS/6000, it is passed as an extra parameter. */ 551: #define STRUCT_VALUE 0 552: 553: /* Define the classes of registers for register constraints in the 554: machine description. Also define ranges of constants. 555: 556: One of the classes must always be named ALL_REGS and include all hard regs. 557: If there is more than one class, another class must be named NO_REGS 558: and contain no registers. 559: 560: The name GENERAL_REGS must be the name of a class (or an alias for 561: another name such as ALL_REGS). This is the class of registers 562: that is allowed by "g" or "r" in a register constraint. 563: Also, registers outside this class are allocated only when 564: instructions express preferences for them. 565: 566: The classes must be numbered in nondecreasing order; that is, 567: a larger-numbered class must never be contained completely 568: in a smaller-numbered class. 569: 570: For any two classes, it is very desirable that there be another 571: class that represents their union. */ 572: 573: /* The RS/6000 has three types of registers, fixed-point, floating-point, 574: and condition registers, plus three special registers, MQ, CTR, and the 575: link register. 576: 577: However, r0 is special in that it cannot be used as a base register. 578: So make a class for registers valid as base registers. 579: 580: Also, cr0 is the only condition code register that can be used in 581: arithmetic insns, so make a separate class for it. */ 582: 583: enum reg_class { NO_REGS, BASE_REGS, GENERAL_REGS, FLOAT_REGS, 584: NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS, LINK_OR_CTR_REGS, 585: SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS, CR_REGS, NON_FLOAT_REGS, 586: ALL_REGS, LIM_REG_CLASSES }; 587: 588: #define N_REG_CLASSES (int) LIM_REG_CLASSES 589: 590: /* Give names of register classes as strings for dump file. */ 591: 592: #define REG_CLASS_NAMES \ 593: { "NO_REGS", "BASE_REGS", "GENERAL_REGS", "FLOAT_REGS", \ 594: "NON_SPECIAL_REGS", "MQ_REGS", "LINK_REGS", "CTR_REGS", \ 595: "LINK_OR_CTR_REGS", "SPECIAL_REGS", "SPEC_OR_GEN_REGS", \ 596: "CR0_REGS", "CR_REGS", "NON_FLOAT_REGS", "ALL_REGS" } 597: 598: /* Define which registers fit in which classes. 599: This is an initializer for a vector of HARD_REG_SET 600: of length N_REG_CLASSES. */ 601: 602: #define REG_CLASS_CONTENTS \ 603: { {0, 0, 0}, {0xfffffffe, 0, 8}, {~0, 0, 8}, \ 604: {0, ~0, 0}, {~0, ~0, 8}, {0, 0, 1}, {0, 0, 2}, \ 605: {0, 0, 4}, {0, 0, 6}, {0, 0, 7}, {~0, 0, 15}, \ 606: {0, 0, 16}, {0, 0, 0xff0}, {~0, 0, 0xffff}, \ 607: {~0, ~0, 0xffff} } 608: 609: /* The same information, inverted: 610: Return the class number of the smallest class containing 611: reg number REGNO. This could be a conditional expression 612: or could index an array. */ 613: 614: #define REGNO_REG_CLASS(REGNO) \ 615: ((REGNO) == 0 ? GENERAL_REGS \ 616: : (REGNO) < 32 ? BASE_REGS \ 617: : FP_REGNO_P (REGNO) ? FLOAT_REGS \ 618: : (REGNO) == 68 ? CR0_REGS \ 619: : CR_REGNO_P (REGNO) ? CR_REGS \ 620: : (REGNO) == 64 ? MQ_REGS \ 621: : (REGNO) == 65 ? LINK_REGS \ 622: : (REGNO) == 66 ? CTR_REGS \ 623: : (REGNO) == 67 ? BASE_REGS \ 624: : NO_REGS) 625: 626: /* The class value for index registers, and the one for base regs. */ 627: #define INDEX_REG_CLASS GENERAL_REGS 628: #define BASE_REG_CLASS BASE_REGS 629: 630: /* Get reg_class from a letter such as appears in the machine description. */ 631: 632: #define REG_CLASS_FROM_LETTER(C) \ 633: ((C) == 'f' ? FLOAT_REGS \ 634: : (C) == 'b' ? BASE_REGS \ 635: : (C) == 'h' ? SPECIAL_REGS \ 636: : (C) == 'q' ? MQ_REGS \ 637: : (C) == 'c' ? CTR_REGS \ 638: : (C) == 'l' ? LINK_REGS \ 639: : (C) == 'x' ? CR0_REGS \ 640: : (C) == 'y' ? CR_REGS \ 641: : NO_REGS) 642: 643: /* The letters I, J, K, L, M, N, and P in a register constraint string 644: can be used to stand for particular ranges of immediate operands. 645: This macro defines what the ranges are. 646: C is the letter, and VALUE is a constant value. 647: Return 1 if VALUE is in the range specified by C. 648: 649: `I' is signed 16-bit constants 650: `J' is a constant with only the high-order 16 bits non-zero 651: `K' is a constant with only the low-order 16 bits non-zero 652: `L' is a constant that can be placed into a mask operand 653: `M' is a constant that is greater than 31 654: `N' is a constant that is an exact power of two 655: `O' is the constant zero 656: `P' is a constant whose negation is a signed 16-bit constant */ 657: 658: #define CONST_OK_FOR_LETTER_P(VALUE, C) \ 659: ( (C) == 'I' ? (unsigned) ((VALUE) + 0x8000) < 0x10000 \ 660: : (C) == 'J' ? ((VALUE) & 0xffff) == 0 \ 661: : (C) == 'K' ? ((VALUE) & 0xffff0000) == 0 \ 662: : (C) == 'L' ? mask_constant (VALUE) \ 663: : (C) == 'M' ? (VALUE) > 31 \ 664: : (C) == 'N' ? exact_log2 (VALUE) >= 0 \ 665: : (C) == 'O' ? (VALUE) == 0 \ 666: : (C) == 'P' ? (unsigned) ((- (VALUE)) + 0x8000) < 0x1000 \ 667: : 0) 668: 669: /* Similar, but for floating constants, and defining letters G and H. 670: Here VALUE is the CONST_DOUBLE rtx itself. 671: 672: We flag for special constants when we can copy the constant into 673: a general register in two insns for DF and one insn for SF. */ 674: 675: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 676: ((C) == 'G' ? easy_fp_constant (VALUE, GET_MODE (VALUE)) : 0) 677: 678: /* Optional extra constraints for this machine. 679: 680: For the RS/6000, `Q' means that this is a memory operand that is just 681: an offset from a register. */ 682: 683: #define EXTRA_CONSTRAINT(OP, C) \ 684: ((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \ 1.1.1.3 ! root 685: : (C) == 'R' ? GET_CODE (OP) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (OP)\ 1.1 root 686: : 0) 687: 688: /* Given an rtx X being reloaded into a reg required to be 689: in class CLASS, return the class of reg to actually use. 690: In general this is just CLASS; but on some machines 691: in some cases it is preferable to use a more restrictive class. 692: 693: On the RS/6000, we have to return NO_REGS when we want to reload a 694: floating-point CONST_DOUBLE to force it to be copied to memory. */ 695: 696: #define PREFERRED_RELOAD_CLASS(X,CLASS) \ 697: ((GET_CODE (X) == CONST_DOUBLE \ 698: && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ 699: ? NO_REGS : (CLASS)) 700: 701: /* Return the register class of a scratch register needed to copy IN into 702: or out of a register in CLASS in MODE. If it can be done directly, 703: NO_REGS is returned. */ 704: 705: #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \ 706: secondary_reload_class (CLASS, MODE, IN) 707: 1.1.1.2 root 708: /* If we are copying between FP registers and anything else, we need a memory 709: location. */ 710: 711: #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \ 712: ((CLASS1) != (CLASS2) && ((CLASS1) == FLOAT_REGS || (CLASS2) == FLOAT_REGS)) 713: 1.1 root 714: /* Return the maximum number of consecutive registers 715: needed to represent mode MODE in a register of class CLASS. 716: 717: On RS/6000, this is the size of MODE in words, 718: except in the FP regs, where a single reg is enough for two words. */ 719: #define CLASS_MAX_NREGS(CLASS, MODE) \ 720: ((CLASS) == FLOAT_REGS \ 721: ? ((GET_MODE_SIZE (MODE) + 2 * UNITS_PER_WORD - 1) / (2 * UNITS_PER_WORD)) \ 722: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) 1.1.1.3 ! root 723: ! 724: /* If defined, gives a class of registers that cannot be used as the ! 725: operand of a SUBREG that changes the size of the object. */ ! 726: ! 727: #define CLASS_CANNOT_CHANGE_SIZE FLOAT_REGS 1.1 root 728: 729: /* Stack layout; function entry, exit and calling. */ 730: 731: /* Define this if pushing a word on the stack 732: makes the stack pointer a smaller address. */ 733: #define STACK_GROWS_DOWNWARD 734: 735: /* Define this if the nominal address of the stack frame 736: is at the high-address end of the local variables; 737: that is, each additional local variable allocated 738: goes at a more negative offset in the frame. 739: 740: On the RS/6000, we grow upwards, from the area after the outgoing 741: arguments. */ 742: /* #define FRAME_GROWS_DOWNWARD */ 743: 744: /* Offset within stack frame to start allocating local variables at. 745: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 746: first local allocated. Otherwise, it is the offset to the BEGINNING 747: of the first local allocated. 748: 749: On the RS/6000, the frame pointer is the same as the stack pointer, 750: except for dynamic allocations. So we start after the fixed area and 751: outgoing parameter area. */ 752: 753: #define STARTING_FRAME_OFFSET (current_function_outgoing_args_size + 24) 754: 755: /* If we generate an insn to push BYTES bytes, 756: this says how many the stack pointer really advances by. 757: On RS/6000, don't define this because there are no push insns. */ 758: /* #define PUSH_ROUNDING(BYTES) */ 759: 760: /* Offset of first parameter from the argument pointer register value. 761: On the RS/6000, we define the argument pointer to the start of the fixed 762: area. */ 763: #define FIRST_PARM_OFFSET(FNDECL) 24 764: 765: /* Define this if stack space is still allocated for a parameter passed 766: in a register. The value is the number of bytes allocated to this 767: area. */ 768: #define REG_PARM_STACK_SPACE(FNDECL) 32 769: 770: /* Define this if the above stack space is to be considered part of the 771: space allocated by the caller. */ 772: #define OUTGOING_REG_PARM_STACK_SPACE 773: 774: /* This is the difference between the logical top of stack and the actual sp. 775: 776: For the RS/6000, sp points past the fixed area. */ 777: #define STACK_POINTER_OFFSET 24 778: 779: /* Define this if the maximum size of all the outgoing args is to be 780: accumulated and pushed during the prologue. The amount can be 781: found in the variable current_function_outgoing_args_size. */ 782: #define ACCUMULATE_OUTGOING_ARGS 783: 784: /* Value is the number of bytes of arguments automatically 785: popped when returning from a subroutine call. 786: FUNTYPE is the data type of the function (as a tree), 787: or for a library call it is an identifier node for the subroutine name. 788: SIZE is the number of bytes of arguments passed on the stack. */ 789: 790: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0 791: 792: /* Define how to find the value returned by a function. 793: VALTYPE is the data type of the value (as a tree). 794: If the precise function being called is known, FUNC is its FUNCTION_DECL; 795: otherwise, FUNC is 0. 796: 797: On RS/6000 an integer value is in r3 and a floating-point value is in 798: fp1. */ 799: 800: #define FUNCTION_VALUE(VALTYPE, FUNC) \ 801: gen_rtx (REG, TYPE_MODE (VALTYPE), \ 802: TREE_CODE (VALTYPE) == REAL_TYPE ? 33 : 3) 803: 804: /* Define how to find the value returned by a library function 805: assuming the value has mode MODE. */ 806: 807: #define LIBCALL_VALUE(MODE) \ 808: gen_rtx (REG, MODE, GET_MODE_CLASS (MODE) == MODE_FLOAT ? 33 : 3) 809: 810: /* The definition of this macro implies that there are cases where 811: a scalar value cannot be returned in registers. 812: 813: For the RS/6000, any structure or union type is returned in memory. */ 814: 815: #define RETURN_IN_MEMORY(TYPE) \ 816: (TYPE_MODE (TYPE) == BLKmode) 817: 818: /* 1 if N is a possible register number for a function value 819: as seen by the caller. 820: 821: On RS/6000, this is r3 and fp1. */ 822: 823: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 3 || ((N) == 33)) 824: 825: /* 1 if N is a possible register number for function argument passing. 826: On RS/6000, these are r3-r10 and fp1-fp13. */ 827: 828: #define FUNCTION_ARG_REGNO_P(N) \ 829: (((N) <= 10 && (N) >= 3) || ((N) >= 33 && (N) <= 45)) 830: 831: /* Define a data type for recording info about an argument list 832: during the scan of that argument list. This data type should 833: hold all necessary information about the function itself 834: and about the args processed so far, enough to enable macros 835: such as FUNCTION_ARG to determine where the next arg should go. 836: 837: On the RS/6000, this is a structure. The first element is the number of 838: total argument words, the second is used to store the next 839: floating-point register number, and the third says how many more args we 840: have prototype types for. */ 841: 842: struct rs6000_args {int words, fregno, nargs_prototype; }; 843: #define CUMULATIVE_ARGS struct rs6000_args 844: 845: /* Define intermediate macro to compute the size (in registers) of an argument 846: for the RS/6000. */ 847: 848: #define RS6000_ARG_SIZE(MODE, TYPE, NAMED) \ 849: (! (NAMED) ? 0 \ 850: : (MODE) != BLKmode \ 851: ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \ 852: : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) 853: 854: /* Initialize a variable CUM of type CUMULATIVE_ARGS 855: for a call to a function whose data type is FNTYPE. 856: For a library call, FNTYPE is 0. */ 857: 858: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \ 859: (CUM).words = 0, \ 860: (CUM).fregno = 33, \ 861: (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \ 862: ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \ 863: + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \ 864: || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \ 865: : 0) 866: 867: /* Similar, but when scanning the definition of a procedure. We always 868: set NARGS_PROTOTYPE large so we never return an EXPR_LIST. */ 869: 870: #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \ 871: (CUM).words = 0, \ 872: (CUM).fregno = 33, \ 873: (CUM).nargs_prototype = 1000 874: 875: /* Update the data in CUM to advance over an argument 876: of mode MODE and data type TYPE. 877: (TYPE is null for libcalls where that information may not be available.) */ 878: 879: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 880: { (CUM).nargs_prototype--; \ 881: if (NAMED) \ 882: { \ 883: (CUM).words += RS6000_ARG_SIZE (MODE, TYPE, NAMED); \ 884: if (GET_MODE_CLASS (MODE) == MODE_FLOAT) \ 885: (CUM).fregno++; \ 886: } \ 887: } 888: 889: /* Non-zero if we can use a floating-point register to pass this arg. */ 890: #define USE_FP_FOR_ARG_P(CUM,MODE,TYPE) \ 891: (GET_MODE_CLASS (MODE) == MODE_FLOAT && (CUM).fregno < 46) 892: 893: /* Determine where to put an argument to a function. 894: Value is zero to push the argument on the stack, 895: or a hard register in which to store the argument. 896: 897: MODE is the argument's machine mode. 898: TYPE is the data type of the argument (as a tree). 899: This is null for libcalls where that information may 900: not be available. 901: CUM is a variable of type CUMULATIVE_ARGS which gives info about 902: the preceding args and about the function being called. 903: NAMED is nonzero if this argument is a named parameter 904: (otherwise it is an extra parameter matching an ellipsis). 905: 906: On RS/6000 the first eight words of non-FP are normally in registers 907: and the rest are pushed. The first 13 FP args are in registers. 908: 909: If this is floating-point and no prototype is specified, we use 910: both an FP and integer register (or possibly FP reg and stack). Library 911: functions (when TYPE is zero) always have the proper types for args, 912: so we can pass the FP value just in one register. emit_library_function 913: doesn't support EXPR_LIST anyway. */ 914: 915: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 916: (! (NAMED) ? 0 \ 917: : ((TYPE) != 0 && TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST) ? 0 \ 918: : USE_FP_FOR_ARG_P (CUM, MODE, TYPE) \ 919: ? ((CUM).nargs_prototype > 0 || (TYPE) == 0 \ 920: ? gen_rtx (REG, MODE, (CUM).fregno) \ 921: : ((CUM).words < 8 \ 922: ? gen_rtx (EXPR_LIST, VOIDmode, \ 923: gen_rtx (REG, (MODE), 3 + (CUM).words), \ 924: gen_rtx (REG, (MODE), (CUM).fregno)) \ 925: : gen_rtx (EXPR_LIST, VOIDmode, 0, \ 926: gen_rtx (REG, (MODE), (CUM).fregno)))) \ 927: : (CUM).words < 8 ? gen_rtx(REG, (MODE), 3 + (CUM).words) : 0) 928: 929: /* For an arg passed partly in registers and partly in memory, 930: this is the number of registers used. 931: For args passed entirely in registers or entirely in memory, zero. */ 932: 933: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ 934: (! (NAMED) ? 0 \ 935: : USE_FP_FOR_ARG_P (CUM, MODE, TYPE) && (CUM).nargs_prototype >= 0 ? 0 \ 936: : (((CUM).words < 8 \ 937: && 8 < ((CUM).words + RS6000_ARG_SIZE (MODE, TYPE, NAMED))) \ 938: ? 8 - (CUM).words : 0)) 939: 940: /* Perform any needed actions needed for a function that is receiving a 941: variable number of arguments. 942: 943: CUM is as above. 944: 945: MODE and TYPE are the mode and type of the current parameter. 946: 947: PRETEND_SIZE is a variable that should be set to the amount of stack 948: that must be pushed by the prolog to pretend that our caller pushed 949: it. 950: 951: Normally, this macro will push all remaining incoming registers on the 952: stack and set PRETEND_SIZE to the length of the registers pushed. */ 953: 954: #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \ 955: { if ((CUM).words < 8) \ 956: { \ 957: int first_reg_offset = (CUM).words; \ 958: \ 959: if (MUST_PASS_IN_STACK (MODE, TYPE)) \ 960: first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (TYPE), TYPE, 1); \ 961: \ 962: if (first_reg_offset > 8) \ 963: first_reg_offset = 8; \ 964: \ 965: if (! (NO_RTL) && first_reg_offset != 8) \ 966: move_block_from_reg \ 967: (3 + first_reg_offset, \ 968: gen_rtx (MEM, BLKmode, \ 969: plus_constant (virtual_incoming_args_rtx, \ 970: first_reg_offset * 4)), \ 1.1.1.2 root 971: 8 - first_reg_offset, (8 - first_reg_offset) * UNITS_PER_WORD); \ 1.1 root 972: PRETEND_SIZE = (8 - first_reg_offset) * UNITS_PER_WORD; \ 973: } \ 974: } 975: 976: /* This macro generates the assembly code for function entry. 977: FILE is a stdio stream to output the code to. 978: SIZE is an int: how many units of temporary storage to allocate. 979: Refer to the array `regs_ever_live' to determine which registers 980: to save; `regs_ever_live[I]' is nonzero if register number I 981: is ever used in the function. This macro is responsible for 982: knowing which registers should not be saved even if used. */ 983: 984: #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE) 985: 986: /* Output assembler code to FILE to increment profiler label # LABELNO 987: for profiling a function entry. */ 988: 989: #define FUNCTION_PROFILER(FILE, LABELNO) \ 990: output_function_profiler ((FILE), (LABELNO)); 991: 992: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 993: the stack pointer does not matter. No definition is equivalent to 994: always zero. 995: 996: On the RS/6000, this is non-zero because we can restore the stack from 997: its backpointer, which we maintain. */ 998: #define EXIT_IGNORE_STACK 1 999: 1000: /* This macro generates the assembly code for function exit, 1001: on machines that need it. If FUNCTION_EPILOGUE is not defined 1002: then individual return instructions are generated for each 1003: return statement. Args are same as for FUNCTION_PROLOGUE. 1004: 1005: The function epilogue should not depend on the current stack pointer! 1006: It should use the frame pointer only. This is mandatory because 1007: of alloca; we also take advantage of it to omit stack adjustments 1008: before returning. */ 1009: 1010: #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE) 1011: 1012: /* Output assembler code for a block containing the constant parts 1013: of a trampoline, leaving space for the variable parts. 1014: 1015: The trampoline should set the static chain pointer to value placed 1016: into the trampoline and should branch to the specified routine. 1017: 1018: On the RS/6000, this is not code at all, but merely a data area, 1019: since that is the way all functions are called. The first word is 1020: the address of the function, the second word is the TOC pointer (r2), 1021: and the third word is the static chain value. */ 1022: 1023: #define TRAMPOLINE_TEMPLATE(FILE) { fprintf (FILE, "\t.long 0, 0, 0\n"); } 1024: 1025: /* Length in units of the trampoline for entering a nested function. */ 1026: 1027: #define TRAMPOLINE_SIZE 12 1028: 1029: /* Emit RTL insns to initialize the variable parts of a trampoline. 1030: FNADDR is an RTX for the address of the function's pure code. 1031: CXT is an RTX for the static chain value for the function. */ 1032: 1033: #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \ 1034: { \ 1035: emit_move_insn (gen_rtx (MEM, SImode, \ 1036: memory_address (SImode, (ADDR))), \ 1037: gen_rtx (MEM, SImode, \ 1038: memory_address (SImode, (FNADDR)))); \ 1039: emit_move_insn (gen_rtx (MEM, SImode, \ 1040: memory_address (SImode, \ 1041: plus_constant ((ADDR), 4))), \ 1042: gen_rtx (MEM, SImode, \ 1043: memory_address (SImode, \ 1044: plus_constant ((FNADDR), 4)))); \ 1045: emit_move_insn (gen_rtx (MEM, SImode, \ 1046: memory_address (SImode, \ 1047: plus_constant ((ADDR), 8))), \ 1048: force_reg (SImode, (CXT))); \ 1049: } 1050: 1051: /* Definitions for register eliminations. 1052: 1053: We have two registers that can be eliminated on the RS/6000. First, the 1054: frame pointer register can often be eliminated in favor of the stack 1055: pointer register. Secondly, the argument pointer register can always be 1.1.1.2 root 1056: eliminated; it is replaced with either the stack or frame pointer. 1057: 1058: In addition, we use the elimination mechanism to see if r30 is needed 1059: Initially we assume that it isn't. If it is, we spill it. This is done 1060: by making it an eliminable register. We replace it with itself so that 1061: if it isn't needed, then existing uses won't be modified. */ 1.1 root 1062: 1063: /* This is an array of structures. Each structure initializes one pair 1064: of eliminable registers. The "from" register number is given first, 1065: followed by "to". Eliminations of the same "from" register are listed 1066: in order of preference. */ 1067: #define ELIMINABLE_REGS \ 1068: {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 1069: { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 1.1.1.2 root 1070: { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ 1071: { 30, 30} } 1.1 root 1072: 1073: /* Given FROM and TO register numbers, say whether this elimination is allowed. 1074: Frame pointer elimination is automatically handled. 1075: 1076: For the RS/6000, if frame pointer elimination is being done, we would like 1.1.1.2 root 1077: to convert ap into fp, not sp. 1078: 1079: We need r30 if -mmininal-toc was specified, and there are constant pool 1080: references. */ 1.1 root 1081: 1082: #define CAN_ELIMINATE(FROM, TO) \ 1083: ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \ 1084: ? ! frame_pointer_needed \ 1.1.1.2 root 1085: : (FROM) == 30 ? ! TARGET_MINIMAL_TOC || get_pool_size () == 0 \ 1.1 root 1086: : 1) 1087: 1088: /* Define the offset between two registers, one to be eliminated, and the other 1089: its replacement, at the start of a routine. */ 1090: #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 1091: { \ 1092: int total_stack_size = (rs6000_sa_size () + get_frame_size () \ 1093: + current_function_outgoing_args_size); \ 1094: \ 1095: total_stack_size = (total_stack_size + 7) & ~7; \ 1096: \ 1097: if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ 1098: { \ 1099: if (rs6000_pushes_stack ()) \ 1100: (OFFSET) = 0; \ 1101: else \ 1102: (OFFSET) = - total_stack_size; \ 1103: } \ 1104: else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \ 1105: (OFFSET) = total_stack_size; \ 1106: else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ 1107: { \ 1108: if (rs6000_pushes_stack ()) \ 1109: (OFFSET) = total_stack_size; \ 1110: else \ 1111: (OFFSET) = 0; \ 1112: } \ 1.1.1.2 root 1113: else if ((FROM) == 30) \ 1114: (OFFSET) = 0; \ 1.1 root 1115: else \ 1116: abort (); \ 1117: } 1118: 1119: /* Addressing modes, and classification of registers for them. */ 1120: 1121: /* #define HAVE_POST_INCREMENT */ 1122: /* #define HAVE_POST_DECREMENT */ 1123: 1124: #define HAVE_PRE_DECREMENT 1125: #define HAVE_PRE_INCREMENT 1126: 1127: /* Macros to check register numbers against specific register classes. */ 1128: 1129: /* These assume that REGNO is a hard or pseudo reg number. 1130: They give nonzero only if REGNO is a hard reg of the suitable class 1131: or a pseudo reg currently allocated to a suitable hard reg. 1132: Since they use reg_renumber, they are safe only once reg_renumber 1133: has been allocated, which happens in local-alloc.c. */ 1134: 1135: #define REGNO_OK_FOR_INDEX_P(REGNO) \ 1136: ((REGNO) < FIRST_PSEUDO_REGISTER \ 1137: ? (REGNO) <= 31 || (REGNO) == 67 \ 1138: : (reg_renumber[REGNO] >= 0 \ 1139: && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67))) 1140: 1141: #define REGNO_OK_FOR_BASE_P(REGNO) \ 1142: ((REGNO) < FIRST_PSEUDO_REGISTER \ 1143: ? ((REGNO) > 0 && (REGNO) <= 31) || (REGNO) == 67 \ 1144: : (reg_renumber[REGNO] > 0 \ 1145: && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67))) 1146: 1147: /* Maximum number of registers that can appear in a valid memory address. */ 1148: 1149: #define MAX_REGS_PER_ADDRESS 2 1150: 1151: /* Recognize any constant value that is a valid address. */ 1152: 1153: #define CONSTANT_ADDRESS_P(X) \ 1154: (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ 1155: || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ 1156: || GET_CODE (X) == HIGH) 1157: 1158: /* Nonzero if the constant value X is a legitimate general operand. 1159: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. 1160: 1161: On the RS/6000, all integer constants are acceptable, most won't be valid 1162: for particular insns, though. Only easy FP constants are 1163: acceptable. */ 1164: 1165: #define LEGITIMATE_CONSTANT_P(X) \ 1166: (GET_CODE (X) != CONST_DOUBLE || GET_MODE (X) == VOIDmode \ 1167: || easy_fp_constant (X, GET_MODE (X))) 1168: 1169: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 1170: and check its validity for a certain class. 1171: We have two alternate definitions for each of them. 1172: The usual definition accepts all pseudo regs; the other rejects 1173: them unless they have been allocated suitable hard regs. 1174: The symbol REG_OK_STRICT causes the latter definition to be used. 1175: 1176: Most source files want to accept pseudo regs in the hope that 1177: they will get allocated to the class that the insn wants them to be in. 1178: Source files for reload pass need to be strict. 1179: After reload, it makes no difference, since pseudo regs have 1180: been eliminated by then. */ 1181: 1182: #ifndef REG_OK_STRICT 1183: 1184: /* Nonzero if X is a hard reg that can be used as an index 1185: or if it is a pseudo reg. */ 1186: #define REG_OK_FOR_INDEX_P(X) \ 1187: (REGNO (X) <= 31 || REGNO (X) == 67 || REGNO (X) >= FIRST_PSEUDO_REGISTER) 1188: 1189: /* Nonzero if X is a hard reg that can be used as a base reg 1190: or if it is a pseudo reg. */ 1191: #define REG_OK_FOR_BASE_P(X) \ 1192: (REGNO (X) > 0 && REG_OK_FOR_INDEX_P (X)) 1193: 1194: #else 1195: 1196: /* Nonzero if X is a hard reg that can be used as an index. */ 1197: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 1198: /* Nonzero if X is a hard reg that can be used as a base reg. */ 1199: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 1200: 1201: #endif 1202: 1203: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 1204: that is a valid memory address for an instruction. 1205: The MODE argument is the machine mode for the MEM expression 1206: that wants to use this address. 1207: 1208: On the RS/6000, there are four valid address: a SYMBOL_REF that 1209: refers to a constant pool entry of an address (or the sum of it 1210: plus a constant), a short (16-bit signed) constant plus a register, 1211: the sum of two registers, or a register indirect, possibly with an 1212: auto-increment. For DFmode and DImode with an constant plus register, 1213: we must ensure that both words are addressable. */ 1214: 1215: #define LEGITIMATE_CONSTANT_POOL_BASE_P(X) \ 1216: (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X) \ 1217: && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (X))) 1218: 1219: #define LEGITIMATE_CONSTANT_POOL_ADDRESS_P(X) \ 1220: (LEGITIMATE_CONSTANT_POOL_BASE_P (X) \ 1221: || (GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \ 1222: && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \ 1223: && LEGITIMATE_CONSTANT_POOL_BASE_P (XEXP (XEXP (X, 0), 0)))) 1224: 1225: #define LEGITIMATE_ADDRESS_INTEGER_P(X,OFFSET) \ 1226: (GET_CODE (X) == CONST_INT \ 1227: && (unsigned) (INTVAL (X) + (OFFSET) + 0x8000) < 0x10000) 1228: 1229: #define LEGITIMATE_OFFSET_ADDRESS_P(MODE,X) \ 1230: (GET_CODE (X) == PLUS \ 1231: && GET_CODE (XEXP (X, 0)) == REG \ 1232: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ 1233: && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 0) \ 1234: && (((MODE) != DFmode && (MODE) != DImode) \ 1235: || LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 4))) 1236: 1237: #define LEGITIMATE_INDEXED_ADDRESS_P(X) \ 1238: (GET_CODE (X) == PLUS \ 1239: && GET_CODE (XEXP (X, 0)) == REG \ 1240: && GET_CODE (XEXP (X, 1)) == REG \ 1241: && ((REG_OK_FOR_BASE_P (XEXP (X, 0)) \ 1242: && REG_OK_FOR_INDEX_P (XEXP (X, 1))) \ 1243: || (REG_OK_FOR_BASE_P (XEXP (X, 1)) \ 1244: && REG_OK_FOR_INDEX_P (XEXP (X, 0))))) 1245: 1246: #define LEGITIMATE_INDIRECT_ADDRESS_P(X) \ 1247: (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) 1248: 1249: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 1250: { if (LEGITIMATE_INDIRECT_ADDRESS_P (X)) \ 1251: goto ADDR; \ 1252: if (GET_CODE (X) == PRE_INC \ 1253: && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (X, 0))) \ 1254: goto ADDR; \ 1255: if (GET_CODE (X) == PRE_DEC \ 1256: && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (X, 0))) \ 1257: goto ADDR; \ 1258: if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (X)) \ 1259: goto ADDR; \ 1260: if (LEGITIMATE_OFFSET_ADDRESS_P (MODE, X)) \ 1261: goto ADDR; \ 1262: if ((MODE) != DImode && (MODE) != TImode \ 1263: && LEGITIMATE_INDEXED_ADDRESS_P (X)) \ 1264: goto ADDR; \ 1265: } 1266: 1267: /* Try machine-dependent ways of modifying an illegitimate address 1268: to be legitimate. If we find one, return the new, valid address. 1269: This macro is used in only one place: `memory_address' in explow.c. 1270: 1271: OLDX is the address as it was before break_out_memory_refs was called. 1272: In some cases it is useful to look at this to decide what needs to be done. 1273: 1274: MODE and WIN are passed so that this macro can use 1275: GO_IF_LEGITIMATE_ADDRESS. 1276: 1277: It is always safe for this macro to do nothing. It exists to recognize 1278: opportunities to optimize the output. 1279: 1280: On RS/6000, first check for the sum of a register with a constant 1281: integer that is out of range. If so, generate code to add the 1282: constant with the low-order 16 bits masked to the register and force 1283: this result into another register (this can be done with `cau'). 1284: Then generate an address of REG+(CONST&0xffff), allowing for the 1285: possibility of bit 16 being a one. 1286: 1287: Then check for the sum of a register and something not constant, try to 1288: load the other things into a register and return the sum. */ 1289: 1290: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ 1291: { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \ 1292: && GET_CODE (XEXP (X, 1)) == CONST_INT \ 1293: && (unsigned) (INTVAL (XEXP (X, 1)) + 0x8000) >= 0x10000) \ 1294: { int high_int, low_int; \ 1295: high_int = INTVAL (XEXP (X, 1)) >> 16; \ 1296: low_int = INTVAL (XEXP (X, 1)) & 0xffff; \ 1297: if (low_int & 0x8000) \ 1298: high_int += 1, low_int |= 0xffff0000; \ 1299: (X) = gen_rtx (PLUS, SImode, \ 1300: force_operand \ 1301: (gen_rtx (PLUS, SImode, XEXP (X, 0), \ 1302: gen_rtx (CONST_INT, VOIDmode, \ 1303: high_int << 16)), 0),\ 1304: gen_rtx (CONST_INT, VOIDmode, low_int)); \ 1305: goto WIN; \ 1306: } \ 1307: else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \ 1308: && GET_CODE (XEXP (X, 1)) != CONST_INT \ 1309: && (MODE) != DImode && (MODE) != TImode) \ 1310: { \ 1311: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ 1312: force_reg (SImode, force_operand (XEXP (X, 1), 0))); \ 1313: goto WIN; \ 1314: } \ 1315: } 1316: 1317: /* Go to LABEL if ADDR (a legitimate address expression) 1318: has an effect that depends on the machine mode it is used for. 1319: 1320: On the RS/6000 this is true if the address is valid with a zero offset 1321: but not with an offset of four (this means it cannot be used as an 1322: address for DImode or DFmode) or is a pre-increment or decrement. Since 1323: we know it is valid, we just check for an address that is not valid with 1324: an offset of four. */ 1325: 1326: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ 1327: { if (GET_CODE (ADDR) == PLUS \ 1328: && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 0) \ 1329: && ! LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 4)) \ 1330: goto LABEL; \ 1331: if (GET_CODE (ADDR) == PRE_INC) \ 1332: goto LABEL; \ 1333: if (GET_CODE (ADDR) == PRE_DEC) \ 1334: goto LABEL; \ 1335: } 1336: 1337: /* Define this if some processing needs to be done immediately before 1.1.1.3 ! root 1338: emitting code for an insn. */ 1.1 root 1339: 1340: /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */ 1341: 1342: /* Specify the machine mode that this machine uses 1343: for the index in the tablejump instruction. */ 1344: #define CASE_VECTOR_MODE SImode 1345: 1346: /* Define this if the tablejump instruction expects the table 1347: to contain offsets from the address of the table. 1348: Do not define this if the table should contain absolute addresses. */ 1349: #define CASE_VECTOR_PC_RELATIVE 1350: 1351: /* Specify the tree operation to be used to convert reals to integers. */ 1352: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR 1353: 1354: /* This is the kind of divide that is easiest to do in the general case. */ 1355: #define EASY_DIV_EXPR TRUNC_DIV_EXPR 1356: 1357: /* Define this as 1 if `char' should by default be signed; else as 0. */ 1358: #define DEFAULT_SIGNED_CHAR 0 1359: 1360: /* This flag, if defined, says the same insns that convert to a signed fixnum 1361: also convert validly to an unsigned one. */ 1362: 1363: /* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */ 1364: 1365: /* Max number of bytes we can move from memory to memory 1366: in one reasonably fast instruction. */ 1367: #define MOVE_MAX 16 1368: 1369: /* Nonzero if access to memory by bytes is no faster than for words. 1370: Also non-zero if doing byte operations (specifically shifts) in registers 1371: is undesirable. */ 1372: #define SLOW_BYTE_ACCESS 1 1373: 1.1.1.2 root 1374: /* Define if operations between registers always perform the operation 1375: on the full register even if a narrower mode is specified. */ 1376: #define WORD_REGISTER_OPERATIONS 1377: 1378: /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD 1379: will either zero-extend or sign-extend. The value of this macro should 1380: be the code that says which one of the two operations is implicitly 1381: done, NIL if none. */ 1382: #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND 1.1 root 1383: 1384: /* Define if loading short immediate values into registers sign extends. */ 1385: #define SHORT_IMMEDIATES_SIGN_EXTEND 1386: 1387: /* The RS/6000 uses the XCOFF format. */ 1388: 1389: #define XCOFF_DEBUGGING_INFO 1390: 1391: /* Define if the object format being used is COFF or a superset. */ 1392: #define OBJECT_FORMAT_COFF 1393: 1394: /* Define the magic numbers that we recognize as COFF. */ 1395: 1396: #define MY_ISCOFF(magic) \ 1397: ((magic) == U802WRMAGIC || (magic) == U802ROMAGIC || (magic) == U802TOCMAGIC) 1398: 1399: /* This is the only version of nm that collect2 can work with. */ 1400: #define REAL_NM_FILE_NAME "/usr/ucb/nm" 1401: 1402: /* We don't have GAS for the RS/6000 yet, so don't write out special 1403: .stabs in cc1plus. */ 1404: 1405: #define FASCIST_ASSEMBLER 1406: 1407: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 1408: is done just by pretending it is already truncated. */ 1409: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 1410: 1411: /* Specify the machine mode that pointers have. 1412: After generation of rtl, the compiler makes no further distinction 1413: between pointers and any other objects of this machine mode. */ 1414: #define Pmode SImode 1415: 1416: /* Mode of a function address in a call instruction (for indexing purposes). 1417: 1418: Doesn't matter on RS/6000. */ 1419: #define FUNCTION_MODE SImode 1420: 1421: /* Define this if addresses of constant functions 1422: shouldn't be put through pseudo regs where they can be cse'd. 1423: Desirable on machines where ordinary constants are expensive 1424: but a CALL with constant address is cheap. */ 1425: #define NO_FUNCTION_CSE 1426: 1.1.1.2 root 1427: /* Define this to be nonzero if shift instructions ignore all but the low-order 1428: few bits. 1429: 1430: The sle and sre instructions which allow SHIFT_COUNT_TRUNCATED 1431: have been dropped from the PowerPC architecture. */ 1432: 1433: #define SHIFT_COUNT_TRUNCATED TARGET_POWER ? 1 : 0 1.1 root 1434: 1435: /* Use atexit for static constructors/destructors, instead of defining 1436: our own exit function. */ 1437: #define HAVE_ATEXIT 1438: 1439: /* Compute the cost of computing a constant rtl expression RTX 1440: whose rtx-code is CODE. The body of this macro is a portion 1441: of a switch statement. If the code is computed here, 1442: return it with a return statement. Otherwise, break from the switch. 1443: 1444: On the RS/6000, if it is legal in the insn, it is free. So this 1445: always returns 0. */ 1446: 1447: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ 1448: case CONST_INT: \ 1449: case CONST: \ 1450: case LABEL_REF: \ 1451: case SYMBOL_REF: \ 1452: case CONST_DOUBLE: \ 1453: return 0; 1454: 1455: /* Provide the costs of a rtl expression. This is in the body of a 1456: switch on CODE. */ 1457: 1458: #define RTX_COSTS(X,CODE,OUTER_CODE) \ 1459: case MULT: \ 1.1.1.3 ! root 1460: switch (rs6000_cpu) \ ! 1461: { \ ! 1462: case PROCESSOR_RIOS1: \ ! 1463: return (GET_CODE (XEXP (X, 1)) != CONST_INT \ ! 1464: ? COSTS_N_INSNS (5) \ ! 1465: : INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \ ! 1466: ? COSTS_N_INSNS (3) : COSTS_N_INSNS (4)); \ ! 1467: case PROCESSOR_RIOS2: \ ! 1468: return COSTS_N_INSNS (2); \ ! 1469: case PROCESSOR_PPC601: \ ! 1470: case PROCESSOR_PPC603: \ ! 1471: return COSTS_N_INSNS (5); \ ! 1472: case PROCESSOR_PPC604: \ ! 1473: case PROCESSOR_PPC620: \ ! 1474: return COSTS_N_INSNS (4); \ ! 1475: } \ 1.1 root 1476: case DIV: \ 1477: case MOD: \ 1478: if (GET_CODE (XEXP (X, 1)) == CONST_INT \ 1479: && exact_log2 (INTVAL (XEXP (X, 1))) >= 0) \ 1480: return COSTS_N_INSNS (2); \ 1481: /* otherwise fall through to normal divide. */ \ 1482: case UDIV: \ 1483: case UMOD: \ 1.1.1.3 ! root 1484: switch (rs6000_cpu) \ ! 1485: { \ ! 1486: case PROCESSOR_RIOS1: \ ! 1487: return COSTS_N_INSNS (19); \ ! 1488: case PROCESSOR_RIOS2: \ ! 1489: return COSTS_N_INSNS (13); \ ! 1490: case PROCESSOR_PPC601: \ ! 1491: return COSTS_N_INSNS (36); \ ! 1492: case PROCESSOR_PPC603: \ ! 1493: return COSTS_N_INSNS (37); \ ! 1494: case PROCESSOR_PPC604: \ ! 1495: case PROCESSOR_PPC620: \ ! 1496: return COSTS_N_INSNS (20); \ ! 1497: } \ 1.1 root 1498: case MEM: \ 1499: /* MEM should be slightly more expensive than (plus (reg) (const)) */ \ 1500: return 5; 1501: 1502: /* Compute the cost of an address. This is meant to approximate the size 1503: and/or execution delay of an insn using that address. If the cost is 1504: approximated by the RTL complexity, including CONST_COSTS above, as 1505: is usually the case for CISC machines, this macro should not be defined. 1506: For aggressively RISCy machines, only one insn format is allowed, so 1507: this macro should be a constant. The value of this macro only matters 1508: for valid addresses. 1509: 1510: For the RS/6000, everything is cost 0. */ 1511: 1512: #define ADDRESS_COST(RTX) 0 1513: 1514: /* Adjust the length of an INSN. LENGTH is the currently-computed length and 1515: should be adjusted to reflect any required changes. This macro is used when 1516: there is some systematic length adjustment required that would be difficult 1517: to express in the length attribute. */ 1518: 1519: /* #define ADJUST_INSN_LENGTH(X,LENGTH) */ 1520: 1521: /* Add any extra modes needed to represent the condition code. 1522: 1523: For the RS/6000, we need separate modes when unsigned (logical) comparisons 1524: are being done and we need a separate mode for floating-point. We also 1525: use a mode for the case when we are comparing the results of two 1526: comparisons. */ 1527: 1528: #define EXTRA_CC_MODES CCUNSmode, CCFPmode, CCEQmode 1529: 1530: /* Define the names for the modes specified above. */ 1531: #define EXTRA_CC_NAMES "CCUNS", "CCFP", "CCEQ" 1532: 1533: /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, 1534: return the mode to be used for the comparison. For floating-point, CCFPmode 1535: should be used. CCUNSmode should be used for unsigned comparisons. 1536: CCEQmode should be used when we are doing an inequality comparison on 1537: the result of a comparison. CCmode should be used in all other cases. */ 1538: 1539: #define SELECT_CC_MODE(OP,X,Y) \ 1540: (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode \ 1541: : (OP) == GTU || (OP) == LTU || (OP) == GEU || (OP) == LEU ? CCUNSmode \ 1542: : (((OP) == EQ || (OP) == NE) && GET_RTX_CLASS (GET_CODE (X)) == '<' \ 1543: ? CCEQmode : CCmode)) 1544: 1545: /* Define the information needed to generate branch and scc insns. This is 1546: stored from the compare operation. Note that we can't use "rtx" here 1547: since it hasn't been defined! */ 1548: 1549: extern struct rtx_def *rs6000_compare_op0, *rs6000_compare_op1; 1550: extern int rs6000_compare_fp_p; 1551: 1552: /* Set to non-zero by "fix" operation to indicate that itrunc and 1553: uitrunc must be defined. */ 1554: 1555: extern int rs6000_trunc_used; 1.1.1.3 ! root 1556: ! 1557: /* Function names to call to do floating point truncation. */ ! 1558: ! 1559: #define RS6000_ITRUNC "itrunc" ! 1560: #define RS6000_UITRUNC "uitrunc" 1.1 root 1561: 1562: /* Control the assembler format that we output. */ 1563: 1564: /* Output at beginning of assembler file. 1565: 1566: Initialize the section names for the RS/6000 at this point. 1567: 1.1.1.2 root 1568: Specify filename to assembler. 1569: 1.1 root 1570: We want to go into the TOC section so at least one .toc will be emitted. 1571: Also, in order to output proper .bs/.es pairs, we need at least one static 1572: [RW] section emitted. 1573: 1574: We then switch back to text to force the gcc2_compiled. label and the space 1575: allocated after it (when profiling) into the text section. 1576: 1577: Finally, declare mcount when profiling to make the assembler happy. */ 1578: 1579: #define ASM_FILE_START(FILE) \ 1580: { \ 1581: rs6000_gen_section_name (&xcoff_bss_section_name, \ 1582: main_input_filename, ".bss_"); \ 1583: rs6000_gen_section_name (&xcoff_private_data_section_name, \ 1584: main_input_filename, ".rw_"); \ 1585: rs6000_gen_section_name (&xcoff_read_only_section_name, \ 1586: main_input_filename, ".ro_"); \ 1587: \ 1.1.1.2 root 1588: output_file_directive (FILE, main_input_filename); \ 1.1 root 1589: toc_section (); \ 1590: if (write_symbols != NO_DEBUG) \ 1591: private_data_section (); \ 1592: text_section (); \ 1593: if (profile_flag) \ 1594: fprintf (FILE, "\t.extern .mcount\n"); \ 1595: } 1596: 1597: /* Output at end of assembler file. 1598: 1599: On the RS/6000, referencing data should automatically pull in text. */ 1600: 1601: #define ASM_FILE_END(FILE) \ 1602: { \ 1603: text_section (); \ 1604: fprintf (FILE, "_section_.text:\n"); \ 1605: data_section (); \ 1606: fprintf (FILE, "\t.long _section_.text\n"); \ 1607: } 1608: 1609: /* We define this to prevent the name mangler from putting dollar signs into 1610: function names. */ 1611: 1612: #define NO_DOLLAR_IN_LABEL 1613: 1614: /* We define this to 0 so that gcc will never accept a dollar sign in a 1615: variable name. This is needed because the AIX assembler will not accept 1616: dollar signs. */ 1617: 1618: #define DOLLARS_IN_IDENTIFIERS 0 1619: 1620: /* Implicit library calls should use memcpy, not bcopy, etc. */ 1621: 1622: #define TARGET_MEM_FUNCTIONS 1623: 1624: /* Define the extra sections we need. We define three: one is the read-only 1625: data section which is used for constants. This is a csect whose name is 1626: derived from the name of the input file. The second is for initialized 1627: global variables. This is a csect whose name is that of the variable. 1628: The third is the TOC. */ 1629: 1630: #define EXTRA_SECTIONS \ 1631: read_only_data, private_data, read_only_private_data, toc, bss 1632: 1633: /* Define the name of our readonly data section. */ 1634: 1635: #define READONLY_DATA_SECTION read_only_data_section 1636: 1.1.1.2 root 1637: /* If we are referencing a function that is static or is known to be 1638: in this file, make the SYMBOL_REF special. We can use this to indicate 1639: that we can branch to this function without emitting a no-op after the 1640: call. */ 1641: 1642: #define ENCODE_SECTION_INFO(DECL) \ 1643: if (TREE_CODE (DECL) == FUNCTION_DECL \ 1644: && (TREE_ASM_WRITTEN (DECL) || ! TREE_PUBLIC (DECL))) \ 1645: SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; 1646: 1.1 root 1647: /* Indicate that jump tables go in the text section. */ 1648: 1649: #define JUMP_TABLES_IN_TEXT_SECTION 1650: 1651: /* Define the routines to implement these extra sections. */ 1652: 1653: #define EXTRA_SECTION_FUNCTIONS \ 1654: \ 1655: void \ 1656: read_only_data_section () \ 1657: { \ 1658: if (in_section != read_only_data) \ 1659: { \ 1660: fprintf (asm_out_file, ".csect %s[RO]\n", \ 1661: xcoff_read_only_section_name); \ 1662: in_section = read_only_data; \ 1663: } \ 1664: } \ 1665: \ 1666: void \ 1667: private_data_section () \ 1668: { \ 1669: if (in_section != private_data) \ 1670: { \ 1671: fprintf (asm_out_file, ".csect %s[RW]\n", \ 1672: xcoff_private_data_section_name); \ 1673: \ 1674: in_section = private_data; \ 1675: } \ 1676: } \ 1677: \ 1678: void \ 1679: read_only_private_data_section () \ 1680: { \ 1681: if (in_section != read_only_private_data) \ 1682: { \ 1683: fprintf (asm_out_file, ".csect %s[RO]\n", \ 1684: xcoff_private_data_section_name); \ 1685: in_section = read_only_private_data; \ 1686: } \ 1687: } \ 1688: \ 1689: void \ 1690: toc_section () \ 1691: { \ 1.1.1.2 root 1692: if (TARGET_MINIMAL_TOC) \ 1693: { \ 1694: static int toc_initialized = 0; \ 1695: \ 1696: /* toc_section is always called at least once from ASM_FILE_START, \ 1697: so this is guaranteed to always be defined once and only once \ 1698: in each file. */ \ 1699: if (! toc_initialized) \ 1700: { \ 1701: fprintf (asm_out_file, ".toc\nLCTOC..0:\n"); \ 1702: fprintf (asm_out_file, "\t.tc toc_table[TC],toc_table[RW]\n"); \ 1703: toc_initialized = 1; \ 1704: } \ 1.1 root 1705: \ 1.1.1.2 root 1706: if (in_section != toc) \ 1707: fprintf (asm_out_file, ".csect toc_table[RW]\n"); \ 1708: } \ 1709: else \ 1710: { \ 1711: if (in_section != toc) \ 1712: fprintf (asm_out_file, ".toc\n"); \ 1713: } \ 1.1 root 1714: in_section = toc; \ 1715: } 1716: 1717: /* This macro produces the initial definition of a function name. 1718: On the RS/6000, we need to place an extra '.' in the function name and 1719: output the function descriptor. 1720: 1721: The csect for the function will have already been created by the 1722: `text_section' call previously done. We do have to go back to that 1723: csect, however. */ 1724: 1725: /* ??? What do the 16 and 044 in the .function line really mean? */ 1726: 1727: #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \ 1728: { if (TREE_PUBLIC (DECL)) \ 1729: { \ 1730: fprintf (FILE, "\t.globl ."); \ 1731: RS6000_OUTPUT_BASENAME (FILE, NAME); \ 1732: fprintf (FILE, "\n"); \ 1733: } \ 1.1.1.3 ! root 1734: else \ 1.1 root 1735: { \ 1736: fprintf (FILE, "\t.lglobl ."); \ 1737: RS6000_OUTPUT_BASENAME (FILE, NAME); \ 1738: fprintf (FILE, "\n"); \ 1739: } \ 1740: fprintf (FILE, ".csect "); \ 1741: RS6000_OUTPUT_BASENAME (FILE, NAME); \ 1742: fprintf (FILE, "[DS]\n"); \ 1743: RS6000_OUTPUT_BASENAME (FILE, NAME); \ 1744: fprintf (FILE, ":\n"); \ 1745: fprintf (FILE, "\t.long ."); \ 1746: RS6000_OUTPUT_BASENAME (FILE, NAME); \ 1747: fprintf (FILE, ", TOC[tc0], 0\n"); \ 1.1.1.2 root 1748: fprintf (FILE, ".csect .text[PR]\n."); \ 1.1 root 1749: RS6000_OUTPUT_BASENAME (FILE, NAME); \ 1750: fprintf (FILE, ":\n"); \ 1751: if (write_symbols == XCOFF_DEBUG) \ 1752: xcoffout_declare_function (FILE, DECL, NAME); \ 1753: } 1754: 1755: /* Return non-zero if this entry is to be written into the constant pool 1756: in a special way. We do so if this is a SYMBOL_REF, LABEL_REF or a CONST 1757: containing one of them. If -mfp-in-toc (the default), we also do 1758: this for floating-point constants. We actually can only do this 1759: if the FP formats of the target and host machines are the same, but 1760: we can't check that since not every file that uses 1761: GO_IF_LEGITIMATE_ADDRESS_P includes real.h. */ 1762: 1763: #define ASM_OUTPUT_SPECIAL_POOL_ENTRY_P(X) \ 1764: (GET_CODE (X) == SYMBOL_REF \ 1765: || (GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \ 1766: && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF) \ 1767: || GET_CODE (X) == LABEL_REF \ 1.1.1.2 root 1768: || (! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC) \ 1769: && GET_CODE (X) == CONST_DOUBLE \ 1.1 root 1770: && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \ 1771: && BITS_PER_WORD == HOST_BITS_PER_INT)) 1772: 1773: /* Select section for constant in constant pool. 1774: 1775: On RS/6000, all constants are in the private read-only data area. 1776: However, if this is being placed in the TOC it must be output as a 1777: toc entry. */ 1778: 1779: #define SELECT_RTX_SECTION(MODE, X) \ 1780: { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \ 1781: toc_section (); \ 1782: else \ 1783: read_only_private_data_section (); \ 1784: } 1785: 1786: /* Macro to output a special constant pool entry. Go to WIN if we output 1787: it. Otherwise, it is written the usual way. 1788: 1789: On the RS/6000, toc entries are handled this way. */ 1790: 1791: #define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, X, MODE, ALIGN, LABELNO, WIN) \ 1792: { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \ 1793: { \ 1794: output_toc (FILE, X, LABELNO); \ 1795: goto WIN; \ 1796: } \ 1797: } 1798: 1799: /* Select the section for an initialized data object. 1800: 1801: On the RS/6000, we have a special section for all variables except those 1802: that are static. */ 1803: 1804: #define SELECT_SECTION(EXP,RELOC) \ 1805: { \ 1.1.1.3 ! root 1806: if ((TREE_CODE (EXP) == STRING_CST \ ! 1807: && !flag_writable_strings) \ ! 1808: || (TREE_READONLY (EXP) && ! TREE_THIS_VOLATILE (EXP) \ ! 1809: && DECL_INITIAL (EXP) \ ! 1810: && (DECL_INITIAL (EXP) == error_mark_node \ ! 1811: || TREE_CONSTANT (DECL_INITIAL (EXP))) \ ! 1812: && ! (RELOC))) \ 1.1 root 1813: { \ 1814: if (TREE_PUBLIC (EXP)) \ 1815: read_only_data_section (); \ 1816: else \ 1817: read_only_private_data_section (); \ 1818: } \ 1819: else \ 1820: { \ 1821: if (TREE_PUBLIC (EXP)) \ 1822: data_section (); \ 1823: else \ 1824: private_data_section (); \ 1825: } \ 1826: } 1827: 1828: /* This outputs NAME to FILE up to the first null or '['. */ 1829: 1830: #define RS6000_OUTPUT_BASENAME(FILE, NAME) \ 1.1.1.3 ! root 1831: if ((NAME)[0] == '*' || (NAME)[strlen (NAME) - 1] != ']') \ 1.1 root 1832: assemble_name (FILE, NAME); \ 1833: else \ 1834: { \ 1.1.1.3 ! root 1835: int _len = strlen (NAME); \ ! 1836: char *_p = alloca (_len + 1); \ ! 1837: \ ! 1838: strcpy (_p, NAME); \ ! 1839: _p[_len - 4] = '\0'; \ ! 1840: assemble_name (FILE, _p); \ 1.1 root 1841: } 1842: 1843: /* Output something to declare an external symbol to the assembler. Most 1844: assemblers don't need this. 1845: 1846: If we haven't already, add "[RW]" (or "[DS]" for a function) to the 1847: name. Normally we write this out along with the name. In the few cases 1848: where we can't, it gets stripped off. */ 1849: 1850: #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \ 1851: { rtx _symref = XEXP (DECL_RTL (DECL), 0); \ 1852: if ((TREE_CODE (DECL) == VAR_DECL \ 1853: || TREE_CODE (DECL) == FUNCTION_DECL) \ 1854: && (NAME)[0] != '*' \ 1855: && (NAME)[strlen (NAME) - 1] != ']') \ 1856: { \ 1857: char *_name = (char *) permalloc (strlen (XSTR (_symref, 0)) + 5); \ 1858: strcpy (_name, XSTR (_symref, 0)); \ 1859: strcat (_name, TREE_CODE (DECL) == FUNCTION_DECL ? "[DS]" : "[RW]"); \ 1860: XSTR (_symref, 0) = _name; \ 1861: } \ 1862: fprintf (FILE, "\t.extern "); \ 1863: assemble_name (FILE, XSTR (_symref, 0)); \ 1864: if (TREE_CODE (DECL) == FUNCTION_DECL) \ 1865: { \ 1866: fprintf (FILE, "\n\t.extern ."); \ 1867: RS6000_OUTPUT_BASENAME (FILE, XSTR (_symref, 0)); \ 1868: } \ 1869: fprintf (FILE, "\n"); \ 1870: } 1871: 1872: /* Similar, but for libcall. We only have to worry about the function name, 1873: not that of the descriptor. */ 1874: 1875: #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \ 1876: { fprintf (FILE, "\t.extern ."); \ 1877: assemble_name (FILE, XSTR (FUN, 0)); \ 1878: fprintf (FILE, "\n"); \ 1879: } 1880: 1881: /* Output to assembler file text saying following lines 1882: may contain character constants, extra white space, comments, etc. */ 1883: 1884: #define ASM_APP_ON "" 1885: 1886: /* Output to assembler file text saying following lines 1887: no longer contain unusual constructs. */ 1888: 1889: #define ASM_APP_OFF "" 1890: 1891: /* Output before instructions. */ 1892: 1.1.1.2 root 1893: #define TEXT_SECTION_ASM_OP ".csect .text[PR]" 1.1 root 1894: 1895: /* Output before writable data. */ 1896: 1897: #define DATA_SECTION_ASM_OP ".csect .data[RW]" 1898: 1899: /* How to refer to registers in assembler output. 1900: This sequence is indexed by compiler's hard-register-number (see above). */ 1901: 1902: #define REGISTER_NAMES \ 1903: {"0", "1", "2", "3", "4", "5", "6", "7", \ 1904: "8", "9", "10", "11", "12", "13", "14", "15", \ 1905: "16", "17", "18", "19", "20", "21", "22", "23", \ 1906: "24", "25", "26", "27", "28", "29", "30", "31", \ 1907: "0", "1", "2", "3", "4", "5", "6", "7", \ 1908: "8", "9", "10", "11", "12", "13", "14", "15", \ 1909: "16", "17", "18", "19", "20", "21", "22", "23", \ 1910: "24", "25", "26", "27", "28", "29", "30", "31", \ 1911: "mq", "lr", "ctr", "ap", \ 1912: "0", "1", "2", "3", "4", "5", "6", "7" } 1913: 1914: /* Table of additional register names to use in user input. */ 1915: 1916: #define ADDITIONAL_REGISTER_NAMES \ 1917: {"r0", 0, "r1", 1, "r2", 2, "r3", 3, \ 1918: "r4", 4, "r5", 5, "r6", 6, "r7", 7, \ 1919: "r8", 8, "r9", 9, "r10", 10, "r11", 11, \ 1920: "r12", 12, "r13", 13, "r14", 14, "r15", 15, \ 1921: "r16", 16, "r17", 17, "r18", 18, "r19", 19, \ 1922: "r20", 20, "r21", 21, "r22", 22, "r23", 23, \ 1923: "r24", 24, "r25", 25, "r26", 26, "r27", 27, \ 1924: "r28", 28, "r29", 29, "r30", 30, "r31", 31, \ 1925: "fr0", 32, "fr1", 33, "fr2", 34, "fr3", 35, \ 1926: "fr4", 36, "fr5", 37, "fr6", 38, "fr7", 39, \ 1927: "fr8", 40, "fr9", 41, "fr10", 42, "fr11", 43, \ 1928: "fr12", 44, "fr13", 45, "fr14", 46, "fr15", 47, \ 1929: "fr16", 48, "fr17", 49, "fr18", 50, "fr19", 51, \ 1930: "fr20", 52, "fr21", 53, "fr22", 54, "fr23", 55, \ 1931: "fr24", 56, "fr25", 57, "fr26", 58, "fr27", 59, \ 1932: "fr28", 60, "fr29", 61, "fr30", 62, "fr31", 63, \ 1933: /* no additional names for: mq, lr, ctr, ap */ \ 1934: "cr0", 68, "cr1", 69, "cr2", 70, "cr3", 71, \ 1935: "cr4", 72, "cr5", 73, "cr6", 74, "cr7", 75, \ 1936: "cc", 68 } 1937: 1938: /* How to renumber registers for dbx and gdb. */ 1939: 1940: #define DBX_REGISTER_NUMBER(REGNO) (REGNO) 1941: 1.1.1.2 root 1942: /* Text to write out after a CALL that may be replaced by glue code by 1943: the loader. This depends on the AIX version. */ 1944: #define RS6000_CALL_GLUE "cror 31,31,31" 1945: 1.1 root 1946: /* This is how to output the definition of a user-level label named NAME, 1947: such as the label on a static function or variable NAME. */ 1948: 1949: #define ASM_OUTPUT_LABEL(FILE,NAME) \ 1950: do { RS6000_OUTPUT_BASENAME (FILE, NAME); fputs (":\n", FILE); } while (0) 1951: 1952: /* This is how to output a command to make the user-level label named NAME 1953: defined for reference from other files. */ 1954: 1955: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ 1956: do { fputs ("\t.globl ", FILE); \ 1957: RS6000_OUTPUT_BASENAME (FILE, NAME); fputs ("\n", FILE);} while (0) 1958: 1959: /* This is how to output a reference to a user-level label named NAME. 1960: `assemble_name' uses this. */ 1961: 1962: #define ASM_OUTPUT_LABELREF(FILE,NAME) \ 1963: fprintf (FILE, NAME) 1964: 1965: /* This is how to output an internal numbered label where 1966: PREFIX is the class of label and NUM is the number within the class. */ 1967: 1968: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ 1969: fprintf (FILE, "%s..%d:\n", PREFIX, NUM) 1970: 1.1.1.3 ! root 1971: /* This is how to output an internal label prefix. rs6000.c uses this ! 1972: when generating traceback tables. */ ! 1973: ! 1974: #define ASM_OUTPUT_INTERNAL_LABEL_PREFIX(FILE,PREFIX) \ ! 1975: fprintf (FILE, "%s..", PREFIX) ! 1976: 1.1 root 1977: /* This is how to output a label for a jump table. Arguments are the same as 1978: for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is 1979: passed. */ 1980: 1981: #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ 1982: { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); } 1983: 1984: /* This is how to store into the string LABEL 1985: the symbol_ref name of an internal numbered label where 1986: PREFIX is the class of label and NUM is the number within the class. 1987: This is suitable for output with `assemble_name'. */ 1988: 1989: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ 1990: sprintf (LABEL, "%s..%d", PREFIX, NUM) 1991: 1992: /* This is how to output an assembler line defining a `double' constant. */ 1993: 1.1.1.2 root 1994: #define ASM_OUTPUT_DOUBLE(FILE, VALUE) \ 1995: { \ 1996: if (REAL_VALUE_ISINF (VALUE) \ 1997: || REAL_VALUE_ISNAN (VALUE) \ 1998: || REAL_VALUE_MINUS_ZERO (VALUE)) \ 1999: { \ 2000: long t[2]; \ 2001: REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t); \ 2002: fprintf (FILE, "\t.long 0x%lx\n\t.long 0x%lx\n", \ 2003: t[0] & 0xffffffff, t[1] & 0xffffffff); \ 2004: } \ 2005: else \ 2006: { \ 2007: char str[30]; \ 2008: REAL_VALUE_TO_DECIMAL (VALUE, "%.20e", str); \ 2009: fprintf (FILE, "\t.double 0d%s\n", str); \ 2010: } \ 2011: } 1.1 root 2012: 2013: /* This is how to output an assembler line defining a `float' constant. */ 2014: 1.1.1.2 root 2015: #define ASM_OUTPUT_FLOAT(FILE, VALUE) \ 2016: { \ 2017: if (REAL_VALUE_ISINF (VALUE) \ 2018: || REAL_VALUE_ISNAN (VALUE) \ 2019: || REAL_VALUE_MINUS_ZERO (VALUE)) \ 2020: { \ 2021: long t; \ 2022: REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t); \ 2023: fprintf (FILE, "\t.long 0x%lx\n", t & 0xffffffff); \ 2024: } \ 2025: else \ 2026: { \ 2027: char str[30]; \ 2028: REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", str); \ 2029: fprintf (FILE, "\t.float 0d%s\n", str); \ 2030: } \ 2031: } 1.1 root 2032: 2033: /* This is how to output an assembler line defining an `int' constant. */ 2034: 2035: #define ASM_OUTPUT_INT(FILE,VALUE) \ 2036: ( fprintf (FILE, "\t.long "), \ 2037: output_addr_const (FILE, (VALUE)), \ 2038: fprintf (FILE, "\n")) 2039: 2040: /* Likewise for `char' and `short' constants. */ 2041: 2042: #define ASM_OUTPUT_SHORT(FILE,VALUE) \ 2043: ( fprintf (FILE, "\t.short "), \ 2044: output_addr_const (FILE, (VALUE)), \ 2045: fprintf (FILE, "\n")) 2046: 2047: #define ASM_OUTPUT_CHAR(FILE,VALUE) \ 2048: ( fprintf (FILE, "\t.byte "), \ 2049: output_addr_const (FILE, (VALUE)), \ 2050: fprintf (FILE, "\n")) 2051: 2052: /* This is how to output an assembler line for a numeric constant byte. */ 2053: 2054: #define ASM_OUTPUT_BYTE(FILE,VALUE) \ 2055: fprintf (FILE, "\t.byte 0x%x\n", (VALUE)) 2056: 2057: /* This is how to output an assembler line to define N characters starting 2058: at P to FILE. */ 2059: 2060: #define ASM_OUTPUT_ASCII(FILE, P, N) output_ascii ((FILE), (P), (N)) 2061: 2062: /* This is how to output code to push a register on the stack. 2063: It need not be very fast code. */ 2064: 2065: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ 1.1.1.2 root 2066: asm_fprintf (FILE, "\{tstu|stwu} %s,-4(r1)\n", reg_names[REGNO]); 1.1 root 2067: 2068: /* This is how to output an insn to pop a register from the stack. 2069: It need not be very fast code. */ 2070: 2071: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ 1.1.1.2 root 2072: asm_fprintf (FILE, "\t{l|lwz} %s,0(r1)\n\t{ai|addic} r1,r1,4\n", \ 2073: reg_names[REGNO]) 1.1 root 2074: 2075: /* This is how to output an element of a case-vector that is absolute. 2076: (RS/6000 does not use such vectors, but we must define this macro 2077: anyway.) */ 2078: 1.1.1.3 ! root 2079: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ ! 2080: do { char buf[100]; \ ! 2081: fprintf (FILE, "\t.long "); \ ! 2082: ASM_GENERATE_INTERNAL_LABEL (buf, "L", VALUE); \ ! 2083: assemble_name (FILE, buf); \ ! 2084: fprintf (FILE, "\n"); \ ! 2085: } while (0) 1.1 root 2086: 2087: /* This is how to output an element of a case-vector that is relative. */ 2088: 2089: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \ 1.1.1.3 ! root 2090: do { char buf[100]; \ ! 2091: fprintf (FILE, "\t.long "); \ ! 2092: ASM_GENERATE_INTERNAL_LABEL (buf, "L", VALUE); \ ! 2093: assemble_name (FILE, buf); \ ! 2094: fprintf (FILE, "-"); \ ! 2095: ASM_GENERATE_INTERNAL_LABEL (buf, "L", REL); \ ! 2096: assemble_name (FILE, buf); \ ! 2097: fprintf (FILE, "\n"); \ ! 2098: } while (0) 1.1 root 2099: 2100: /* This is how to output an assembler line 2101: that says to advance the location counter 2102: to a multiple of 2**LOG bytes. */ 2103: 2104: #define ASM_OUTPUT_ALIGN(FILE,LOG) \ 2105: if ((LOG) != 0) \ 2106: fprintf (FILE, "\t.align %d\n", (LOG)) 2107: 2108: #define ASM_OUTPUT_SKIP(FILE,SIZE) \ 2109: fprintf (FILE, "\t.space %d\n", (SIZE)) 2110: 2111: /* This says how to output an assembler line 2112: to define a global common symbol. */ 2113: 2114: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ 2115: do { fputs (".comm ", (FILE)); \ 2116: RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \ 2117: fprintf ((FILE), ",%d\n", (SIZE)); } while (0) 2118: 2119: /* This says how to output an assembler line 2120: to define a local common symbol. */ 2121: 2122: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \ 2123: do { fputs (".lcomm ", (FILE)); \ 2124: RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \ 2125: fprintf ((FILE), ",%d,%s\n", (SIZE), xcoff_bss_section_name); \ 2126: } while (0) 2127: 2128: /* Store in OUTPUT a string (made with alloca) containing 2129: an assembler-name for a local static variable named NAME. 2130: LABELNO is an integer which is different for each call. */ 2131: 2132: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ 2133: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ 2134: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) 2135: 2136: /* Define the parentheses used to group arithmetic operations 2137: in assembler code. */ 2138: 2139: #define ASM_OPEN_PAREN "(" 2140: #define ASM_CLOSE_PAREN ")" 2141: 2142: /* Define results of standard character escape sequences. */ 2143: #define TARGET_BELL 007 2144: #define TARGET_BS 010 2145: #define TARGET_TAB 011 2146: #define TARGET_NEWLINE 012 2147: #define TARGET_VT 013 2148: #define TARGET_FF 014 2149: #define TARGET_CR 015 2150: 2151: /* Print operand X (an rtx) in assembler syntax to file FILE. 2152: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. 2153: For `%' followed by punctuation, CODE is the punctuation and X is null. */ 2154: 2155: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) 2156: 2157: /* Define which CODE values are valid. */ 2158: 1.1.1.3 ! root 2159: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '.' || (CODE) == '*') 1.1 root 2160: 2161: /* Print a memory address as an operand to reference that memory location. */ 2162: 2163: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) 2164: 2165: /* Define the codes that are matched by predicates in rs6000.c. */ 2166: 2167: #define PREDICATE_CODES \ 2168: {"short_cint_operand", {CONST_INT}}, \ 2169: {"u_short_cint_operand", {CONST_INT}}, \ 2170: {"non_short_cint_operand", {CONST_INT}}, \ 2171: {"gpc_reg_operand", {SUBREG, REG}}, \ 2172: {"cc_reg_operand", {SUBREG, REG}}, \ 2173: {"reg_or_short_operand", {SUBREG, REG, CONST_INT}}, \ 2174: {"reg_or_neg_short_operand", {SUBREG, REG, CONST_INT}}, \ 2175: {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \ 2176: {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \ 2177: {"easy_fp_constant", {CONST_DOUBLE}}, \ 2178: {"reg_or_mem_operand", {SUBREG, MEM, REG}}, \ 2179: {"fp_reg_or_mem_operand", {SUBREG, MEM, REG}}, \ 2180: {"mem_or_easy_const_operand", {SUBREG, MEM, CONST_DOUBLE}}, \ 2181: {"add_operand", {SUBREG, REG, CONST_INT}}, \ 2182: {"non_add_cint_operand", {CONST_INT}}, \ 2183: {"and_operand", {SUBREG, REG, CONST_INT}}, \ 2184: {"non_and_cint_operand", {CONST_INT}}, \ 2185: {"logical_operand", {SUBREG, REG, CONST_INT}}, \ 2186: {"non_logical_cint_operand", {CONST_INT}}, \ 2187: {"mask_operand", {CONST_INT}}, \ 2188: {"call_operand", {SYMBOL_REF, REG}}, \ 1.1.1.2 root 2189: {"current_file_function_operand", {SYMBOL_REF}}, \ 1.1.1.3 ! root 2190: {"input_operand", {SUBREG, MEM, REG, CONST_INT, SYMBOL_REF}}, \ 1.1.1.2 root 2191: {"load_multiple_operation", {PARALLEL}}, \ 2192: {"store_multiple_operation", {PARALLEL}}, \ 2193: {"branch_comparison_operator", {EQ, NE, LE, LT, GE, \ 2194: GT, LEU, LTU, GEU, GTU}}, \ 2195: {"scc_comparison_operator", {EQ, NE, LE, LT, GE, \ 2196: GT, LEU, LTU, GEU, GTU}},
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.