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1.1 root 1: /* Definitions of target machine for GNU compiler, for Hitachi Super-H.
2: Copyright (C) 1993 Free Software Foundation, Inc.
3:
4: Contributed by Steve Chamberlain ([email protected])
5:
6: This file is part of GNU CC.
7:
8: GNU CC is free software; you can redistribute it and/or modify
9: it under the terms of the GNU General Public License as published by
10: the Free Software Foundation; either version 2, or (at your option)
11: any later version.
12:
13: GNU CC is distributed in the hope that it will be useful,
14: but WITHOUT ANY WARRANTY; without even the implied warranty of
15: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16: GNU General Public License for more details.
17:
18: You should have received a copy of the GNU General Public License
19: along with GNU CC; see the file COPYING. If not, write to
20: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21:
22:
23: /* Run-time Target Specification. */
24: #define TARGET_SH
25:
26: #define TARGET_VERSION \
27: fputs (" (Hitachi SH)", stderr);
28:
29: /* Generate SDB debugging information. */
30:
31: #define SDB_DEBUGGING_INFO 1
32:
33: #define SDB_DELIM ";"
34:
35: #define CPP_PREDEFINES "-D__sh__"
36:
37:
38: /* Omitting the frame pointer is a very good idea on the SH */
39:
40: #define OPTIMIZATION_OPTIONS(OPTIMIZE) \
41: { \
42: if (OPTIMIZE) \
43: flag_omit_frame_pointer = 1; \
44: if (OPTIMIZE==0)OPTIMIZE=1; \
45: }
46:
47: /* Run-time compilation parameters selecting different hardware subsets. */
48:
49: extern int target_flags;
50: #define ISIZE_BIT 1
51: #define FAST_BIT 2
52: #define MULSI3_BIT 4
53: #define MAC_BIT 8
54: #define RTL_BIT 16
55: #define DT_BIT 32
56: #define DALIGN_BIT 64
57:
58: /* Nonzero if we should generate code using muls.l insn */
59: #define TARGET_HAS_MULSI3 (target_flags & MULSI3_BIT)
60:
61: /* Nonzero if we should generate faster code rather than smaller code */
62: #define TARGET_FASTCODE (target_flags & FAST_BIT)
63:
64: /* Nonzero if we should dump out instruction size info */
65: #define TARGET_DUMPISIZE (target_flags & ISIZE_BIT)
66:
67: /* Nonzero if we should try to generate mac instructions */
68: #define TARGET_MAC (target_flags & MAC_BIT)
69:
70: /* Nonzero if we should dump the rtl in the assembly file. */
71: #define TARGET_DUMP_RTL (target_flags & RTL_BIT)
72:
73: /* Nonzero if the target has a decrement and test instruction .*/
74: #define TARGET_HAS_DT (target_flags & DT_BIT)
75:
76: /* Nonzero to align doubles on 64 bit boundaries */
77: #define TARGET_ALIGN_DOUBLE (target_flags & DALIGN_BIT)
78:
79: #define TARGET_SWITCHES \
80: { {"isize", ( ISIZE_BIT) },\
81: {"space", (-FAST_BIT) },\
82: {"hasmulsi", ( MULSI3_BIT) },\
83: {"hasdt", ( DT_BIT) },\
84: {"ac", ( MAC_BIT) },\
85: {"dalign", ( DALIGN_BIT) },\
86: {"", TARGET_DEFAULT} \
87: }
88:
89: #define TARGET_DEFAULT FAST_BIT
90:
91:
92: /* Target machine storage Layout. */
93:
94: /* Define this if most significant bit is lowest numbered
95: in instructions that operate on numbered bit-fields. */
96: #define BITS_BIG_ENDIAN 0
97:
98: /* Define this if most significant byte of a word is the lowest numbered. */
99: #define BYTES_BIG_ENDIAN 1
100:
101: /* Define this if most significant word of a multiword number is the lowest
102: numbered. */
103: #define WORDS_BIG_ENDIAN 1
104:
105: /* Number of bits in an addressable storage unit */
106: #define BITS_PER_UNIT 8
107:
108: /* Width in bits of a "word", which is the contents of a machine register.
109: Note that this is not necessarily the width of data type `int';
110: if using 16-bit ints on a 68000, this would still be 32.
111: But on a machine with 16-bit registers, this would be 16. */
112: #define BITS_PER_WORD 32
113: #define MAX_BITS_PER_WORD 32
114:
115: /* Width of a word, in units (bytes). */
116: #define UNITS_PER_WORD 4
117:
118: /* Width in bits of a pointer.
119: See also the macro `Pmode' defined below. */
120: #define POINTER_SIZE 32
121:
122: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
123: #define PARM_BOUNDARY 32
124:
125: /* Boundary (in *bits*) on which stack pointer should be aligned. */
126: #define STACK_BOUNDARY 32
127:
128: /* Allocation boundary (in *bits*) for the code of a function. */
129: #define FUNCTION_BOUNDARY 16
130:
131: /* Alignment of field after `int : 0' in a structure. */
132: #define EMPTY_FIELD_BOUNDARY 32
133:
134: /* No data type wants to be aligned rounder than this. */
135: #define BIGGEST_ALIGNMENT (TARGET_ALIGN_DOUBLE ? 64 : 32)
136:
137: /* The best alignment to use in cases where we have a choice. */
138: #define FASTEST_ALIGNMENT 32
139:
140: /* Every structures size must be a multiple of 32 bits. */
141: #define STRUCTURE_SIZE_BOUNDARY 32
142:
143: /* Make strings word-aligned so strcpy from constants will be faster. */
144: #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
145: ((TREE_CODE (EXP) == STRING_CST \
146: && (ALIGN) < FASTEST_ALIGNMENT) \
147: ? FASTEST_ALIGNMENT : (ALIGN))
148:
149: /* Make arrays of chars word-aligned for the same reasons. */
150: #define DATA_ALIGNMENT(TYPE, ALIGN) \
151: (TREE_CODE (TYPE) == ARRAY_TYPE \
152: && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
153: && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))
154:
155: /* Set this nonzero if move instructions will actually fail to work
156: when given unaligned data. */
157: #define STRICT_ALIGNMENT 1
158:
159:
160: /* Standard register usage. */
161:
162: /* Register allocation for our first guess
163:
164: r0-r3 scratch
165: r4-r7 args in and out
166: r8-r11 call saved
167: r12
168: r13 assembler temp
169: r14 frame pointer
170: r15 stack pointer
171: ap arg pointer (doesn't really exist, always eliminated)
172: pr subroutine return address
173: t t bit
174: mach multiply/accumulate result
175: macl
176: */
177:
178: /* Number of actual hardware registers.
179: The hardware registers are assigned numbers for the compiler
180: from 0 to just below FIRST_PSEUDO_REGISTER.
181: All registers that the compiler knows about must be given numbers,
182: even those that are not normally considered general registers.
183:
184: SH has 16 integer registers and 4 control registers + the arg
185: pointer */
186:
187: #define FIRST_PSEUDO_REGISTER 22
188:
189: #define PR_REG 17
190: #define T_REG 18
191: #define GBR_REG 19
192: #define MACH_REG 20
193: #define MACL_REG 21
194:
195:
196: /* 1 for registers that have pervasive standard uses
197: and are not available for the register allocator. */
198: /* r0 r1 r2 r3 r4 r5 r6 r7 r8
199: r9 r10 r11 r12 r13 r14 r15 ap pr t gbr mh ml */
200: #define FIXED_REGISTERS \
201: { 0, 0, 0, 0, 0, 0, 0, 0, 0, \
202: 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 1}
203:
204: /* 1 for registers not available across function calls.
205: These must include the FIXED_REGISTERS and also any
206: registers that can be used without being saved.
207: The latter must include the registers where values are returned
208: and the register where structure-value addresses are passed.
209: Aside from that, you can include as many other registers as you like. */
210:
211: /* r0 r1 r2 r3 r4 r5 r6 r7 r8
212: r9 r10 r11 r12 r13 r14 r15 ap pr t gbr mh ml */
213: #define CALL_USED_REGISTERS \
214: { 1, 1, 1, 1, 1, 1, 1, 1, 0, \
215: 0, 0, 0, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1}
216:
217: /* Return number of consecutive hard regs needed starting at reg REGNO
218: to hold something of mode MODE.
219: This is ordinarily the length in words of a value of mode MODE
220: but can be less for certain modes in special long registers.
221:
222: On the SH regs are UNITS_PER_WORD bits wide; */
223: #define HARD_REGNO_NREGS(REGNO, MODE) \
224: (((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
225:
226: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
227: We may keep double values in even registers */
228:
229: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
230: ((TARGET_ALIGN_DOUBLE && GET_MODE_SIZE(MODE) > 4) ? (((REGNO)&1)==0) : 1)
231:
232: /* Value is 1 if it is a good idea to tie two pseudo registers
233: when one has mode MODE1 and one has mode MODE2.
234: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
235: for any hard reg, then this must be 0 for correct output. */
236:
237: #define MODES_TIEABLE_P(MODE1, MODE2) \
238: ((MODE1) == (MODE2) || GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
239:
240: /* Specify the registers used for certain standard purposes.
241: The values of these macros are register numbers. */
242:
243: /* Define this if the program counter is overloaded on a register. */
244: /* #define PC_REGNUM 15*/
245:
246: /* Register to use for pushing function arguments. */
247: #define STACK_POINTER_REGNUM 15
248:
249: /* Base register for access to local variables of the function. */
250: #define FRAME_POINTER_REGNUM 14
251:
252: /* Value should be nonzero if functions must have frame pointers.
253: Zero means the frame pointer need not be set up (and parms may be accessed
254: via the stack pointer) in functions that seem suitable. */
255: #define FRAME_POINTER_REQUIRED 0
256:
257: /* Definitions for register eliminations.
258:
259: We have two registers that can be eliminated on the m88k. First, the
260: frame pointer register can often be eliminated in favor of the stack
261: pointer register. Secondly, the argument pointer register can always be
262: eliminated; it is replaced with either the stack or frame pointer. */
263:
264: /* This is an array of structures. Each structure initializes one pair
265: of eliminable registers. The "from" register number is given first,
266: followed by "to". Eliminations of the same "from" register are listed
267: in order of preference. */
268:
269: #define ELIMINABLE_REGS \
270: {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
271: { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
272: { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM},}
273:
274: /* Given FROM and TO register numbers, say whether this elimination
275: is allowed. */
276: #define CAN_ELIMINATE(FROM, TO) \
277: (!((FROM) == FRAME_POINTER_REGNUM && FRAME_POINTER_REQUIRED))
278:
279: /* Define the offset between two registers, one to be eliminated, and the other
280: its replacement, at the start of a routine. */
281:
282: #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
283: OFFSET = initial_elimination_offset (FROM, TO)
284:
285: /* Base register for access to arguments of the function. */
286: #define ARG_POINTER_REGNUM 16
287:
288: /* Register in which the static-chain is passed to a function. */
289: #define STATIC_CHAIN_REGNUM 13
290:
291: /* If the structure value address is not passed in a register, define
292: this as an expression returning an RTX for the place
293: where the address is passed. If it returns 0, the address is
294: passed as an "invisible" first argument. */
295:
296: #define STRUCT_VALUE 0
297:
298:
299: /* Define the classes of registers for register constraints in the
300: machine description. Also define ranges of constants.
301:
302: One of the classes must always be named ALL_REGS and include all hard regs.
303: If there is more than one class, another class must be named NO_REGS
304: and contain no registers.
305:
306: The name GENERAL_REGS must be the name of a class (or an alias for
307: another name such as ALL_REGS). This is the class of registers
308: that is allowed by "g" or "r" in a register constraint.
309: Also, registers outside this class are allocated only when
310: instructions express preferences for them.
311:
312: The classes must be numbered in nondecreasing order; that is,
313: a larger-numbered class must never be contained completely
314: in a smaller-numbered class.
315:
316: For any two classes, it is very desirable that there be another
317: class that represents their union. */
318:
319: /* The SH has two sorts of general registers, R0 and the rest. R0 can
320: be used as the destination of some of the arithmetic ops. There are
321: also some special purpose registers; the T bit register, the
322: Procedure Return Register and the Multipy Accumulate Registers */
323:
324: enum reg_class
325: {
326: NO_REGS,
327: R0_REGS,
328: GENERAL_REGS,
329: PR_REGS,
330: T_REGS,
331: MAC_REGS,
332: ALL_REGS,
333: LIM_REG_CLASSES
334: };
335:
336: #define N_REG_CLASSES (int) LIM_REG_CLASSES
337:
338: /* Give names of register classes as strings for dump file. */
339: #define REG_CLASS_NAMES \
340: { \
341: "NO_REGS", \
342: "R0_REGS", \
343: "GENERAL_REGS", \
344: "PR_REGS", \
345: "T_REGS", \
346: "MAC_REGS", \
347: "ALL_REGS", \
348: }
349:
350: /* Define which registers fit in which classes.
351: This is an initializer for a vector of HARD_REG_SET
352: of length N_REG_CLASSES. */
353:
354: #define REG_CLASS_CONTENTS \
355: { \
356: 0x000000, /* NO_REGS */ \
357: 0x000001, /* R0_REGS */ \
358: 0x01FFFF, /* GENERAL_REGS */ \
359: 0x020000, /* PR_REGS */ \
360: 0x040000, /* T_REGS */ \
361: 0x300000, /* MAC_REGS */ \
362: 0x37FFFF /* ALL_REGS */ \
363: }
364:
365: /* The same information, inverted:
366: Return the class number of the smallest class containing
367: reg number REGNO. This could be a conditional expression
368: or could index an array. */
369:
370: extern int regno_reg_class[];
371: #define REGNO_REG_CLASS(REGNO) regno_reg_class[REGNO]
372:
373: /* The order in which register should be allocated. */
374: #define REG_ALLOC_ORDER \
375: { 1,2,3,0,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21}
376:
377: /* The class value for index registers, and the one for base regs. */
378: #define INDEX_REG_CLASS R0_REGS
379: #define BASE_REG_CLASS GENERAL_REGS
380:
381: /* Get reg_class from a letter such as appears in the machine
382: description. */
383: extern enum reg_class reg_class_from_letter[];
384:
385: #define REG_CLASS_FROM_LETTER(C) \
386: ( (C) >= 'a' && (C) <= 'z' ? reg_class_from_letter[(C)-'a'] : NO_REGS )
387:
388:
389: /* The letters I, J, K, L and M in a register constraint string
390: can be used to stand for particular ranges of immediate operands.
391: This macro defines what the ranges are.
392: C is the letter, and VALUE is a constant value.
393: Return 1 if VALUE is in the range specified by C.
394: I: arithmetic operand -127..128, as used in add, sub, etc
395: L: logical operand 0..255, as used in add, or, etc.
396: M: constant 1
397: K: shift operand 1,2,8 or 16 */
398:
399:
400: #define CONST_OK_FOR_I(VALUE) ((VALUE)>= -128 && (VALUE) <= 127)
401: #define CONST_OK_FOR_L(VALUE) ((VALUE)>= 0 && (VALUE) <= 255)
402: #define CONST_OK_FOR_M(VALUE) ((VALUE)==1)
403: #define CONST_OK_FOR_K(VALUE) ((VALUE)==1||(VALUE)==2||(VALUE)==8||(VALUE)==16)
404:
405: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
406: ((C) == 'I' ? CONST_OK_FOR_I (VALUE) \
407: : (C) == 'L' ? CONST_OK_FOR_L (VALUE) \
408: : (C) == 'M' ? CONST_OK_FOR_M (VALUE) \
409: : (C) == 'K' ? CONST_OK_FOR_K (VALUE) \
410: : 0)
411:
412: /* Similar, but for floating constants, and defining letters G and H.
413: Here VALUE is the CONST_DOUBLE rtx itself. */
414:
415: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
416: ((C) == 'G' ? CONST_OK_FOR_I (CONST_DOUBLE_HIGH (VALUE)) \
417: && CONST_OK_FOR_I (CONST_DOUBLE_LOW (VALUE)) \
418: : 0)
419:
420: /* Given an rtx X being reloaded into a reg required to be
421: in class CLASS, return the class of reg to actually use.
422: In general this is just CLASS; but on some machines
423: in some cases it is preferable to use a more restrictive class. */
424:
425: #define PREFERRED_RELOAD_CLASS(X, CLASS) (CLASS)
426:
427: /* Return the register class of a scratch register needed to copy IN into
428: or out of a register in CLASS in MODE. If it can be done directly,
429: NO_REGS is returned. */
430:
431: #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) NO_REGS
432:
433: /* Return the maximum number of consecutive registers
434: needed to represent mode MODE in a register of class CLASS.
435:
436: On SH this is the size of MODE in words */
437: #define CLASS_MAX_NREGS(CLASS, MODE) \
438: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
439:
440:
441: /* Stack layout; function entry, exit and calling. */
442:
443: /* Define the number of register that can hold parameters.
444: These two macros are used only in other macro definitions below. */
445: #define NPARM_REGS 4
446: #define FIRST_PARM_REG 4
447: #define FIRST_RET_REG 4
448:
449: /* Define this if pushing a word on the stack
450: makes the stack pointer a smaller address. */
451: #define STACK_GROWS_DOWNWARD
452:
453: /* Define this if the nominal address of the stack frame
454: is at the high-address end of the local variables;
455: that is, each additional local variable allocated
456: goes at a more negative offset in the frame. */
457: #define FRAME_GROWS_DOWNWARD
458:
459: /* Offset within stack frame to start allocating local variables at.
460: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
461: first local allocated. Otherwise, it is the offset to the BEGINNING
462: of the first local allocated. */
463: #define STARTING_FRAME_OFFSET 0
464:
465: /* If we generate an insn to push BYTES bytes,
466: this says how many the stack pointer really advances by. */
467: #define PUSH_ROUNDING(NPUSHED) (((NPUSHED) + 3) & ~3)
468:
469: /* Offset of first parameter from the argument pointer register value. */
470: #define FIRST_PARM_OFFSET(FNDECL) 0
471:
472: /* Value is the number of byte of arguments automatically
473: popped when returning from a subroutine call.
474: FUNTYPE is the data type of the function (as a tree),
475: or for a library call it is an identifier node for the subroutine name.
476: SIZE is the number of bytes of arguments passed on the stack.
477:
478: On the SH, the caller does not pop any of its arguments that were passed
479: on the stack. */
480: #define RETURN_POPS_ARGS(FUNTYPE, SIZE) 0
481:
482: /* Define how to find the value returned by a function.
483: VALTYPE is the data type of the value (as a tree).
484: If the precise function being called is known, FUNC is its FUNCTION_DECL;
485: otherwise, FUNC is 0. */
486: #define FUNCTION_VALUE(VALTYPE, FUNC) \
487: gen_rtx (REG, TYPE_MODE (VALTYPE), FIRST_RET_REG)
488:
489: /* Define how to find the value returned by a library function
490: assuming the value has mode MODE. */
491: #define LIBCALL_VALUE(MODE) \
492: gen_rtx (REG, MODE, FIRST_RET_REG)
493:
494: /* 1 if N is a possible register number for a function value.
495: On the SH, only r4 can return results. */
496: #define FUNCTION_VALUE_REGNO_P(REGNO) \
497: ((REGNO) == FIRST_RET_REG)
498:
499: /* 1 if N is a possible register number for function argument passing.*/
500:
501: #define FUNCTION_ARG_REGNO_P(REGNO) \
502: ((REGNO) >= FIRST_PARM_REG && (REGNO) < (NPARM_REGS + FIRST_PARM_REG))
503:
504:
505:
506: /* Define a data type for recording info about an argument list
507: during the scan of that argument list. This data type should
508: hold all necessary information about the function itself
509: and about the args processed so far, enough to enable macros
510: such as FUNCTION_ARG to determine where the next arg should go.
511:
512: On SH, this is a single integer, which is a number of words
513: of arguments scanned so far (including the invisible argument,
514: if any, which holds the structure-value-address).
515: Thus NARGREGS or more means all following args should go on the stack. */
516:
517: #define CUMULATIVE_ARGS int
518:
519: #define ROUND_ADVANCE(SIZE) \
520: ((SIZE + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
521:
522: /* Round a register number up to a proper boundary for an arg of mode
523: MODE.
524:
525: We round to an even reg for things larger than a word */
526:
527: #define ROUND_REG(X, MODE) \
528: ((TARGET_ALIGN_DOUBLE \
529: && GET_MODE_UNIT_SIZE ((MODE)) > UNITS_PER_WORD) \
530: ? ((X) + ((X) & 1)) : (X))
531:
532:
533: /* Initialize a variable CUM of type CUMULATIVE_ARGS
534: for a call to a function whose data type is FNTYPE.
535: For a library call, FNTYPE is 0.
536:
537: On SH, the offset always starts at 0: the first parm reg is always
538: the same reg. */
539:
540: #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME) \
541: ((CUM) = 0)
542:
543: /* Update the data in CUM to advance over an argument
544: of mode MODE and data type TYPE.
545: (TYPE is null for libcalls where that information may not be
546: available.) */
547:
548: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
549: ((CUM) = (ROUND_REG ((CUM), (MODE)) \
550: + ((MODE) != BLKmode \
551: ? ROUND_ADVANCE (GET_MODE_SIZE (MODE)) \
552: : ROUND_ADVANCE (int_size_in_bytes (TYPE)))))
553:
554: /* Define where to put the arguments to a function.
555: Value is zero to push the argument on the stack,
556: or a hard register in which to store the argument.
557:
558: MODE is the argument's machine mode.
559: TYPE is the data type of the argument (as a tree).
560: This is null for libcalls where that information may
561: not be available.
562: CUM is a variable of type CUMULATIVE_ARGS which gives info about
563: the preceding args and about the function being called.
564: NAMED is nonzero if this argument is a named parameter
565: (otherwise it is an extra parameter matching an ellipsis).
566:
567: On SH the first args are normally in registers
568: and the rest are pushed. Any arg that starts within the first
569: NPARM_REGS words is at least partially passed in a register unless
570: its data type forbids. */
571:
572: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
573: (NAMED && ROUND_REG ((CUM), (MODE)) < NPARM_REGS \
574: && ((TYPE)==0 || ! TREE_ADDRESSABLE ((tree)(TYPE))) \
575: && ((TYPE)==0 || (MODE) != BLKmode \
576: || (TYPE_ALIGN ((TYPE)) % PARM_BOUNDARY == 0)) \
577: ? gen_rtx (REG, (MODE), \
578: (FIRST_PARM_REG + ROUND_REG ((CUM), (MODE)))) \
579: : 0)
580:
581: /* For an arg passed partly in registers and partly in memory,
582: this is the number of registers used.
583: For args passed entirely in registers or entirely in memory, zero.
584: Any arg that starts in the first NPARM_REGS regs but won't entirely
585: fit in them needs partial registers on the SH. */
586:
587: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
588: ((ROUND_REG ((CUM), (MODE)) < NPARM_REGS \
589: && ((TYPE)==0 || ! TREE_ADDRESSABLE ((tree)(TYPE))) \
590: && ((TYPE)==0 || (MODE) != BLKmode \
591: || (TYPE_ALIGN ((TYPE)) % PARM_BOUNDARY == 0)) \
592: && (ROUND_REG ((CUM), (MODE)) \
593: + ((MODE) == BLKmode \
594: ? ROUND_ADVANCE (int_size_in_bytes (TYPE)) \
595: : ROUND_ADVANCE (GET_MODE_SIZE (MODE)))) - NPARM_REGS > 0) \
596: ? (NPARM_REGS - ROUND_REG ((CUM), (MODE))) \
597: : 0)
598:
599: extern int current_function_anonymous_args;
600:
601: /* Perform any needed actions needed for a function that is receiving a
602: variable number of arguments. */
603:
604: #define SETUP_INCOMING_VARARGS(ASF, MODE, TYPE, PAS, ST) \
605: current_function_anonymous_args = 1;
606:
607:
608: /* Generate assembly output for the start of a function. */
609:
610: #define FUNCTION_PROLOGUE(STREAM, SIZE) \
611: output_prologue ((STREAM), (SIZE))
612:
613: /* Call the function profiler with a given profile label. */
614:
615: #define FUNCTION_PROFILER(STREAM,LABELNO) \
616: { \
617: fprintf(STREAM, "\tsts.l pr,@-r15\n"); \
618: fprintf(STREAM, "\tjsr\tmcount\n"); \
619: fprintf(STREAM, "\tor r0,r0\n"); \
620: fprintf(STREAM, "\t.long\tLP%d\n", (LABELNO)); \
621: }
622:
623:
624: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
625: the stack pointer does not matter. The value is tested only in
626: functions that have frame pointers.
627: No definition is equivalent to always zero. */
628:
629: #define EXIT_IGNORE_STACK 0
630:
631: /* Generate the assembly code for function exit. */
632:
633: #define FUNCTION_EPILOGUE(STREAM, SIZE) \
634: output_epilogue ((STREAM), (SIZE))
635:
636: #define ELIGIBLE_FOR_EPILOGUE_DELAY(INSN,N) \
637: (get_attr_in_delay_slot(INSN) == IN_DELAY_SLOT_YES)
638:
639: #define DELAY_SLOTS_FOR_EPILOGUE \
640: delay_slots_for_epilogue();
641:
642: /* Output assembler code for a block containing the constant parts
643: of a trampoline, leaving space for the variable parts.
644:
645: On the SH, the trapoline looks like
646: 1 0000 D301 mov.l l1,r3
647: 2 0002 DD02 mov.l l2,r13
648: 3 0004 4D2B jmp @r13
649: 4 0006 200B or r0,r0
650: 5 0008 00000000 l1: .long function
651: 6 000c 00000000 l2: .long area
652: */
653: #define TRAMPOLINE_TEMPLATE(FILE) \
654: { \
655: fprintf ((FILE), " .word 0xd301\n"); \
656: fprintf ((FILE), " .word 0xdd02\n"); \
657: fprintf ((FILE), " .word 0x4d2b\n"); \
658: fprintf ((FILE), " .word 0x200b\n"); \
659: fprintf ((FILE), " .long 0\n"); \
660: fprintf ((FILE), " .long 0\n"); \
661: }
662:
663: /* Length in units of the trampoline for entering a nested function. */
664: #define TRAMPOLINE_SIZE 16
665:
666: /* Alignment required for a trampoline in units. */
667: #define TRAMPOLINE_ALIGN 4
668:
669: /* Emit RTL insns to initialize the variable parts of a trampoline.
670: FNADDR is an RTX for the address of the function's pure code.
671: CXT is an RTX for the static chain value for the function. */
672:
673: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
674: { \
675: emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 8)), \
676: (CXT)); \
677: emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 12)), \
678: (FNADDR)); \
679: }
680:
681:
682: /* Addressing modes, and classification of registers for them. */
683:
684: /*#define HAVE_POST_INCREMENT 1*/
685: /*#define HAVE_PRE_INCREMENT 1*/
686: /*#define HAVE_POST_DECREMENT 1*/
687: /*#define HAVE_PRE_DECREMENT 1*/
688:
689: /* Macros to check register numbers against specific register classes. */
690:
691: /* These assume that REGNO is a hard or pseudo reg number.
692: They give nonzero only if REGNO is a hard reg of the suitable class
693: or a pseudo reg currently allocated to a suitable hard reg.
694: Since they use reg_renumber, they are safe only once reg_renumber
695: has been allocated, which happens in local-alloc.c.
696:
697: */
698: #define REGNO_OK_FOR_BASE_P(REGNO) \
699: ((REGNO) < PR_REG || (unsigned) reg_renumber[(REGNO)] < PR_REG)
700:
701: #define REGNO_OK_FOR_INDEX_P(REGNO) ((REGNO)==0)
702:
703: /* Maximum number of registers that can appear in a valid memory
704: address. */
705:
706: #define MAX_REGS_PER_ADDRESS 1
707:
708: /* Recognize any constant value that is a valid address. */
709:
710: #define CONSTANT_ADDRESS_P(X) \
711: (GET_CODE (X) == LABEL_REF)
712: #if 0
713:
714: || GET_CODE (X) == SYMBOL_REF \
715: || GET_CODE (X) == CONST_INT \
716: || GET_CODE (X) == CONST)
717:
718: #endif
719:
720: /* Nonzero if the constant value X is a legitimate general operand.
721: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
722:
723: On the SH, allow any thing but a double */
724:
725: #define LEGITIMATE_CONSTANT_P(X) \
726: (GET_CODE (X) != CONST_DOUBLE || GET_MODE (X) == VOIDmode)
727:
728: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
729: and check its validity for a certain class.
730: We have two alternate definitions for each of them.
731: The usual definition accepts all pseudo regs; the other rejects
732: them unless they have been allocated suitable hard regs.
733: The symbol REG_OK_STRICT causes the latter definition to be used. */
734:
735: #ifndef REG_OK_STRICT
736: /* Nonzero if X is a hard reg that can be used as a base reg
737: or if it is a pseudo reg. */
738: #define REG_OK_FOR_BASE_P(X) \
739: (REGNO(X) <= 16 || REGNO(X) >= FIRST_PSEUDO_REGISTER)
740:
741: /* Nonzero if X is a hard reg that can be used as an index
742: or if it is a pseudo reg. */
743: #define REG_OK_FOR_INDEX_P(X) \
744: (REGNO(X)==0||REGNO(X)>=FIRST_PSEUDO_REGISTER)
745: #define REG_OK_FOR_PRE_POST_P(X) (REGNO(X) <= 16)
746: #else
747:
748: /* Nonzero if X is a hard reg that can be used as a base reg. */
749: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
750: /* Nonzero if X is a hard reg that can be used as an index. */
751: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
752: #define REG_OK_FOR_PRE_POST_P(X) \
753: (REGNO (X) <= 16 || (unsigned) reg_renumber[REGNO (X)] <=16)
754: #endif
755:
756: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
757: that is a valid memory address for an instruction.
758: The MODE argument is the machine mode for the MEM expression
759: that wants to use this address.
760:
761: The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. */
762: #define BASE_REGISTER_RTX_P(X) \
763: (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X))
764:
765: #define INDEX_REGISTER_RTX_P(X) \
766: (GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X))
767:
768:
769: /* Jump to LABEL if X is a valid address RTX. This must also take
770: REG_OK_STRICT into account when deciding about valid registers, but it uses
771: the above macros so we are in luck.
772:
773: Allow REG
774: REG+disp
775: REG+r0
776: REG++
777: --REG
778: */
779:
780: /* A legitimate index for a QI or HI is 0, SI and above can be any
781: number 0..64 */
782:
783: #define GO_IF_LEGITIMATE_INDEX(MODE, REGNO, OP, LABEL) \
784: do { \
785: if (GET_CODE (OP) == CONST_INT) \
786: { \
787: if (GET_MODE_SIZE (MODE) < 4 && INTVAL(OP) == 0)\
788: goto LABEL; \
789: if (GET_MODE_SIZE (MODE) >=4 \
790: && ((unsigned)INTVAL(OP)) < 64) \
791: goto LABEL; \
792: } \
793: } while(0)
794:
795:
796:
797: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \
798: { \
799: if (BASE_REGISTER_RTX_P (X)) \
800: goto LABEL; \
801: else if ((GET_CODE (X) == POST_INC || GET_CODE (X) == PRE_DEC) \
802: && GET_CODE (XEXP (X, 0)) == REG \
803: && REG_OK_FOR_PRE_POST_P (XEXP (X, 0))) \
804: goto LABEL; \
805: else if (GET_CODE (X) == PLUS) \
806: { \
807: rtx xop0 = XEXP(X,0); \
808: rtx xop1 = XEXP(X,1); \
809: if (BASE_REGISTER_RTX_P (xop0)) \
810: GO_IF_LEGITIMATE_INDEX (MODE, REGNO (xop0), xop1, LABEL); \
811: else if (BASE_REGISTER_RTX_P (xop1)) \
812: GO_IF_LEGITIMATE_INDEX (MODE, REGNO (xop1), xop0, LABEL); \
813: } \
814: else if ((GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_DEC) \
815: && GET_CODE (XEXP (X, 0)) == REG \
816: && REG_OK_FOR_PRE_POST_P (XEXP (X, 0))) \
817: goto LABEL; \
818: }
819:
820:
821: /* Try machine-dependent ways of modifying an illegitimate address
822: to be legitimate. If we find one, return the new, valid address.
823: This macro is used in only one place: `memory_address' in explow.c.
824:
825: OLDX is the address as it was before break_out_memory_refs was called.
826: In some cases it is useful to look at this to decide what needs to be done.
827:
828: MODE and WIN are passed so that this macro can use
829: GO_IF_LEGITIMATE_ADDRESS.
830:
831: It is always safe for this macro to do nothing. It exists to recognize
832: opportunities to optimize the output.
833:
834: On the SH we don't try anything */
835:
836: #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) ;
837:
838: /* Go to LABEL if ADDR (a legitimate address expression)
839: has an effect that depends on the machine mode it is used for. */
840: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
841: { \
842: if (GET_CODE(ADDR) == PRE_DEC || GET_CODE(ADDR) == POST_DEC \
843: || GET_CODE(ADDR) == PRE_INC || GET_CODE(ADDR) == POST_INC) \
844: goto LABEL; \
845: }
846:
847: /* Specify the machine mode that this machine uses
848: for the index in the tablejump instruction. */
849: #define CASE_VECTOR_MODE SImode
850:
851: /* Define this if the tablejump instruction expects the table
852: to contain offsets from the address of the table.
853: Do not define this if the table should contain absolute addresses. */
854: /* #define CASE_VECTOR_PC_RELATIVE */
855:
856: /* Specify the tree operation to be used to convert reals to integers. */
857: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
858:
859: /* This is the kind of divide that is easiest to do in the general case. */
860: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
861:
862: /* 'char' is signed by default */
863: #define DEFAULT_SIGNED_CHAR 1
864:
865: /* The type of size_t unsigned int. */
866: #define SIZE_TYPE "unsigned int"
867:
868: /* Don't cse the address of the function being compiled. */
869: #define NO_RECURSIVE_FUNCTION_CSE 1
870:
871: /* Max number of bytes we can move from memory to memory
872: in one reasonably fast instruction. */
873: #define MOVE_MAX 4
874:
875: /* Define if normal loads of shorter-than-word items from sign extends
876: the rest of the bigs in the register. */
877: #define BYTE_LOADS_SIGN_EXTEND 1
878:
879: /* Define this if zero-extension is slow (more than one real instruction).
880: On the SH, it's only one instruction */
881: /* #define SLOW_ZERO_EXTEND */
882:
883: /* Nonzero if access to memory by bytes is slow and undesirable. */
884: #define SLOW_BYTE_ACCESS 0
885:
886: /* We assume that the store-condition-codes instructions store 0 for false
887: and some other value for true. This is the value stored for true. */
888:
889: #define STORE_FLAG_VALUE 1
890:
891: /* Immediate shift counts are truncated by the output routines (or was it
892: the assembler?). Shift counts in a register are truncated by ARM. Note
893: that the native compiler puts too large (> 32) immediate shift counts
894: into a register and shifts by the register, letting the ARM decide what
895: to do instead of doing that itself. */
896: #define SHIFT_COUNT_TRUNCATED 1
897:
898: /* We have the vprintf function. */
899: #define HAVE_VPRINTF 1
900:
901: /* All integers have the same format so truncation is easy. */
902: #define TRULY_NOOP_TRUNCATION(OUTPREC,INPREC) 1
903:
904: /* Define this if addresses of constant functions
905: shouldn't be put through pseudo regs where they can be cse'd.
906: Desirable on machines where ordinary constants are expensive
907: but a CALL with constant address is cheap. */
908: /*#define NO_FUNCTION_CSE 1*/
909:
910: /* Chars and shorts should be passed as ints. */
911: #define PROMOTE_PROTOTYPES 1
912:
913: /* The machine modes of pointers and functions */
914: #define Pmode SImode
915: #define FUNCTION_MODE Pmode
916:
917: /* The structure type of the machine dependent info field of insns
918: No uses for this yet. */
919: /* #define INSN_MACHINE_INFO struct machine_info */
920:
921: /* The relative costs of various types of constants. Note that cse.c defines
922: REG = 1, SUBREG = 2, any node = (2 + sum of subnodes). */
923:
924: #define CONST_COSTS(RTX, CODE, OUTER_CODE) \
925: case CONST_INT: \
926: if (CONST_OK_FOR_I (INTVAL(RTX))) \
927: return 1; \
928: else \
929: return 5; \
930: case CONST: \
931: case LABEL_REF: \
932: case SYMBOL_REF: \
933: return 6; \
934: case CONST_DOUBLE: \
935: return 10;
936:
937: #define RTX_COSTS(X, CODE, OUTER_CODE) \
938: case MULT: \
939: return COSTS_N_INSNS (TARGET_HAS_MULSI3 ? 2 : 20); \
940: case DIV: \
941: case UDIV: \
942: case MOD: \
943: case UMOD: \
944: return COSTS_N_INSNS (100); \
945: case FLOAT: \
946: case FIX: \
947: return 100;
948:
949: /* Compute extra cost of moving data between one register class
950: and another.
951:
952: On the SH it is hard to move into the T reg, but simple to load
953: from it.
954: */
955:
956: #define REGISTER_MOVE_COST(SRCCLASS, DSTCLASS) \
957: ((DSTCLASS ==T_REGS) ? 10 : 2)
958:
959: /* Assembler output control */
960:
961: /* The text to go at the start of the assembler file */
962: #define ASM_FILE_START(STREAM) \
963: fprintf (STREAM,"! GCC for the Hitachi Super-H\n"); \
964: output_file_directive (STREAM, main_input_filename);
965:
966: #define ASM_APP_ON ""
967: #define ASM_APP_OFF ""
968:
969: #define FILE_ASM_OP "\t.file\n"
970: #define IDENT_ASM_OP "\t.ident\n"
971:
972:
973: /* Switch to the text or data segment. */
974: #define TEXT_SECTION_ASM_OP ".text"
975: #define DATA_SECTION_ASM_OP ".data"
976:
977: /* The assembler's names for the registers. RFP need not always be used as
978: the Real framepointer; it can also be used as a normal general register.
979: Note that the name `fp' is horribly misleading since `fp' is in fact only
980: the argument-and-return-context pointer. */
981: #define REGISTER_NAMES \
982: { \
983: "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
984: "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
985: "ap", "pr", "t", "gbr", "mach","macl" \
986: }
987:
988: /* DBX register number for a given compiler register number */
989: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
990:
991: /* Output a label definition. */
992: #define ASM_OUTPUT_LABEL(FILE,NAME) \
993: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
994:
995:
996: /* This is how to output an assembler line
997: that says to advance the location counter
998: to a multiple of 2**LOG bytes. */
999:
1000: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1001: if ((LOG) != 0) \
1002: fprintf (FILE, "\t.align %d\n", LOG)
1003:
1004: /* Output a function label definition. */
1005: #define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL) \
1006: ASM_OUTPUT_LABEL(STREAM, NAME)
1007:
1008: /* Output a globalising directive for a label. */
1009: #define ASM_GLOBALIZE_LABEL(STREAM,NAME) \
1010: (fprintf (STREAM, "\t.global\t"), \
1011: assemble_name (STREAM, NAME), \
1012: fputc ('\n',STREAM)) \
1013:
1014: /* Output a reference to a label. */
1015: #define ASM_OUTPUT_LABELREF(STREAM,NAME) \
1016: fprintf (STREAM, "_%s", NAME)
1017:
1018: /* Make an internal label into a string. */
1019: #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
1020: sprintf (STRING, "*%s%d", PREFIX, NUM)
1021:
1022: /* Output an internal label definition. */
1023: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1024: fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1025:
1026: /* #define ASM_OUTPUT_CASE_END(STREAM,NUM,TABLE) */
1027:
1028: /* Construct a private name. */
1029: #define ASM_FORMAT_PRIVATE_NAME(OUTVAR,NAME,NUMBER) \
1030: ((OUTVAR) = (char *) alloca (strlen (NAME) + 10), \
1031: sprintf ((OUTVAR), "%s.%d", (NAME), (NUMBER)))
1032:
1033: /* Jump tables must be 32 bit aligned. */
1034: #define ASM_OUTPUT_CASE_LABEL(STREAM,PREFIX,NUM,TABLE) \
1035: fprintf (STREAM, "\t.align 2\n%s%d:\n", PREFIX, NUM);
1036:
1037: /* Output a relative address. Not needed since jump tables are absolute
1038: but we must define it anyway. */
1039: #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM,VALUE,REL) \
1040: fputs ("- - - ASM_OUTPUT_ADDR_DIFF_ELT called!\n", STREAM)
1041:
1042: /* Output an element of a dispatch table. */
1043: #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM,VALUE) \
1044: fprintf (STREAM, "\t.long\tL%d\n", VALUE)
1045:
1046: /* Output various types of constants. */
1047:
1048:
1049: /* This is how to output an assembler line defining a `double' */
1050:
1051: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1052: { \
1053: long t[2]; \
1054: REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t); \
1055: fprintf (FILE, "\t.long\t0x%lx\n\t.long\t0x%lx\n", \
1056: t[0], t[1]); \
1057: } \
1058:
1059: /* This is how to output an assembler line defining a `float' constant. */
1060:
1061: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1062: { \
1063: long t; \
1064: REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t); \
1065: fprintf (FILE, "\t.long\t0x%lx\n", t); \
1066: } \
1067:
1068: #define ASM_OUTPUT_INT(STREAM, EXP) \
1069: (fprintf (STREAM, "\t.long\t"), \
1070: output_addr_const (STREAM, (EXP)), \
1071: fputc ('\n', STREAM))
1072:
1073: #define ASM_OUTPUT_SHORT(STREAM, EXP) \
1074: (fprintf (STREAM, "\t.short\t"), \
1075: output_addr_const (STREAM, (EXP)), \
1076: fputc ('\n', STREAM))
1077:
1078: #define ASM_OUTPUT_CHAR(STREAM, EXP) \
1079: (fprintf (STREAM, "\t.byte\t"), \
1080: output_addr_const (STREAM, (EXP)), \
1081: fputc ('\n', STREAM))
1082:
1083: #define ASM_OUTPUT_BYTE(STREAM, VALUE) \
1084: fprintf (STREAM, "\t.byte\t%d\n", VALUE) \
1085:
1086: /* This is how to output an assembler line
1087: that says to advance the location counter by SIZE bytes. */
1088:
1089: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1090: fprintf (FILE, "\t.space %d\n", (SIZE))
1091:
1092: /* This says how to output an assembler line
1093: to define a global common symbol. */
1094:
1095: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1096: ( fputs ("\t.comm ", (FILE)), \
1097: assemble_name ((FILE), (NAME)), \
1098: fprintf ((FILE), ",%d\n", (SIZE)))
1099:
1100: /* This says how to output an assembler line
1101: to define a local common symbol. */
1102:
1103: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1104: ( fputs ("\t.lcomm ", (FILE)), \
1105: assemble_name ((FILE), (NAME)), \
1106: fprintf ((FILE), ",%d\n", (SIZE)))
1107:
1108:
1109: /* The assembler's parentheses characters. */
1110: #define ASM_OPEN_PAREN "("
1111: #define ASM_CLOSE_PAREN ")"
1112:
1113: /* Target characters. */
1114: #define TARGET_BELL 007
1115: #define TARGET_BS 010
1116: #define TARGET_TAB 011
1117: #define TARGET_NEWLINE 012
1118: #define TARGET_VT 013
1119: #define TARGET_FF 014
1120: #define TARGET_CR 015
1121:
1122:
1123: /* Only perform branch elimination (by making instructions conditional) if
1124: we're optimising. Otherwise it's of no use anyway. */
1125: #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \
1126: final_prescan_insn (INSN, OPVEC, NOPERANDS)
1127:
1128: /* Print operand X (an rtx) in assembler syntax to file FILE.
1129: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1130: For `%' followed by punctuation, CODE is the punctuation and X is null. */
1131:
1132: #define PRINT_OPERAND(STREAM, X, CODE) print_operand (STREAM, X, CODE)
1133:
1134: /* Print a memory address as an operand to reference that memory location. */
1135:
1136: #define PRINT_OPERAND_ADDRESS(STREAM,X) print_operand_address (STREAM, X)
1137:
1138: #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1139: ((CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^' || (CHAR) == '!')
1140:
1141:
1142: /* Define the information needed to generate branch insns. This is stored
1143: from the compare operation. Note that we can't use "rtx" here since it
1144: hasn't been defined! */
1145:
1146: extern struct rtx_def *sh_compare_op0;
1147: extern struct rtx_def *sh_compare_op1;
1148: extern struct rtx_def *prepare_scc_operands();
1149:
1150:
1151:
1152: /* Declare functions defined in sh.c and used in templates. */
1153:
1154: extern char *output_branch();
1155: extern char *output_shift();
1156: extern char *output_movedouble();
1157: extern char *output_movepcrel();
1158:
1159:
1160: #define ADJUST_INSN_LENGTH(insn, length) \
1161: adjust_insn_length (insn, insn_lengths)
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