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1.1.1.4 ! root 1: /* Definitions of target machine for GNU compiler for Hitachi Super-H. ! 2: Copyright (C) 1993, 1994, 1995 Free Software Foundation, Inc. ! 3: Contributed by Steve Chamberlain ([email protected]). ! 4: Improved by Jim Wilson ([email protected]). 1.1 root 5: 6: This file is part of GNU CC. 7: 8: GNU CC is free software; you can redistribute it and/or modify 9: it under the terms of the GNU General Public License as published by 10: the Free Software Foundation; either version 2, or (at your option) 11: any later version. 12: 13: GNU CC is distributed in the hope that it will be useful, 14: but WITHOUT ANY WARRANTY; without even the implied warranty of 15: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16: GNU General Public License for more details. 17: 18: You should have received a copy of the GNU General Public License 19: along with GNU CC; see the file COPYING. If not, write to 1.1.1.4 ! root 20: the Free Software Foundation, 59 Temple Place - Suite 330, ! 21: Boston, MA 02111-1307, USA. */ 1.1 root 22: 23: 1.1.1.4 ! root 24: #define TARGET_VERSION \ 1.1 root 25: fputs (" (Hitachi SH)", stderr); 26: 27: /* Generate SDB debugging information. */ 28: 1.1.1.4 ! root 29: #define SDB_DEBUGGING_INFO 1.1 root 30: 1.1.1.3 root 31: /* Output DBX (stabs) debugging information if doing -gstabs. */ 32: 33: #define DBX_DEBUGGING_INFO 34: 1.1.1.4 ! root 35: /* Generate SDB debugging information by default. */ 1.1.1.3 root 36: 37: #define PREFERRED_DEBUGGING_TYPE SDB_DEBUG 38: 1.1 root 39: #define SDB_DELIM ";" 40: 1.1.1.4 ! root 41: #define CPP_SPEC "%{ml:-D__LITTLE_ENDIAN__}" ! 42: 1.1.1.2 root 43: #define CPP_PREDEFINES "-D__sh__ -Acpu(sh) -Amachine(sh)" 1.1 root 44: 1.1.1.4 ! root 45: #define ASM_SPEC "%{ml:-little}" ! 46: ! 47: #define LINK_SPEC "%{ml:-m shl}" 1.1 root 48: 1.1.1.4 ! root 49: /* We can not debug without a frame pointer. */ ! 50: /* #define CAN_DEBUG_WITHOUT_FP */ 1.1 root 51: 1.1.1.3 root 52: #define CONDITIONAL_REGISTER_USAGE \ 1.1.1.4 ! root 53: /* Hitachi saves and restores mac registers on call. */ \ 1.1.1.3 root 54: if (TARGET_HITACHI) \ 55: { \ 56: call_used_regs[MACH_REG] = 0; \ 57: call_used_regs[MACL_REG] = 0; \ 1.1.1.4 ! root 58: } 1.1 root 59: 1.1.1.4 ! root 60: /* ??? Need to write documentation for all SH options and add it to the ! 61: invoke.texi file. */ ! 62: ! 63: /* Run-time compilation parameters selecting different hardware subsets. */ 1.1 root 64: 65: extern int target_flags; 1.1.1.3 root 66: #define ISIZE_BIT (1<<1) 67: #define DALIGN_BIT (1<<6) 68: #define SH0_BIT (1<<7) 69: #define SH1_BIT (1<<8) 70: #define SH2_BIT (1<<9) 71: #define SH3_BIT (1<<10) 72: #define SPACE_BIT (1<<13) 73: #define BIGTABLE_BIT (1<<14) 74: #define HITACHI_BIT (1<<22) 1.1.1.4 ! root 75: #define PADSTRUCT_BIT (1<<28) ! 76: #define LITTLE_ENDIAN_BIT (1<<29) ! 77: ! 78: /* Nonzero if we should dump out instruction size info. */ ! 79: #define TARGET_DUMPISIZE (target_flags & ISIZE_BIT) ! 80: ! 81: /* Nonzero to align doubles on 64 bit boundaries. */ ! 82: #define TARGET_ALIGN_DOUBLE (target_flags & DALIGN_BIT) 1.1.1.2 root 83: 1.1.1.4 ! root 84: /* Nonzero if we should generate code using type 0 insns. */ ! 85: /* ??? Is there such a thing as SH0? If not, we should delete all ! 86: references to it. */ 1.1.1.2 root 87: #define TARGET_SH0 (target_flags & SH0_BIT) 88: 1.1.1.4 ! root 89: /* Nonzero if we should generate code using type 1 insns. */ 1.1.1.2 root 90: #define TARGET_SH1 (target_flags & SH1_BIT) 1.1 root 91: 1.1.1.4 ! root 92: /* Nonzero if we should generate code using type 2 insns. */ 1.1.1.2 root 93: #define TARGET_SH2 (target_flags & SH2_BIT) 94: 1.1.1.4 ! root 95: /* Nonzero if we should generate code using type 3 insns. */ 1.1.1.2 root 96: #define TARGET_SH3 (target_flags & SH3_BIT) 1.1 root 97: 1.1.1.4 ! root 98: /* Nonzero if we should generate smaller code rather than faster code. */ 1.1.1.2 root 99: #define TARGET_SMALLCODE (target_flags & SPACE_BIT) 100: 1.1.1.4 ! root 101: /* Nonzero to use long jump tables. */ 1.1.1.3 root 102: #define TARGET_BIGTABLE (target_flags & BIGTABLE_BIT) 1.1.1.2 root 103: 1.1.1.4 ! root 104: /* Nonzero if using Hitachi's calling convention. */ 1.1.1.3 root 105: #define TARGET_HITACHI (target_flags & HITACHI_BIT) 106: 1.1.1.4 ! root 107: /* Nonzero if padding structures to a multiple of 4 bytes. This is ! 108: incompatible with Hitachi's compiler, and gives unusual structure layouts ! 109: which confuse programmers. ! 110: ??? This option is not useful, but is retained in case there are people ! 111: who are still relying on it. It may be deleted in the future. */ ! 112: #define TARGET_PADSTRUCT (target_flags & PADSTRUCT_BIT) ! 113: ! 114: /* Nonzero if generating code for a little endian SH. */ ! 115: #define TARGET_LITTLE_ENDIAN (target_flags & LITTLE_ENDIAN_BIT) ! 116: ! 117: #define TARGET_SWITCHES \ ! 118: { {"0", SH0_BIT}, \ ! 119: {"1", SH1_BIT}, \ ! 120: {"2", SH2_BIT}, \ ! 121: {"3", SH3_BIT|SH2_BIT}, \ ! 122: {"3l", SH3_BIT|SH2_BIT|LITTLE_ENDIAN_BIT}, \ ! 123: {"b", -LITTLE_ENDIAN_BIT}, \ ! 124: {"bigtable", BIGTABLE_BIT}, \ ! 125: {"dalign", DALIGN_BIT}, \ ! 126: {"hitachi", HITACHI_BIT}, \ ! 127: {"isize", ISIZE_BIT}, \ ! 128: {"l", LITTLE_ENDIAN_BIT}, \ ! 129: {"padstruct", PADSTRUCT_BIT}, \ ! 130: {"space", SPACE_BIT}, \ ! 131: {"", TARGET_DEFAULT} \ 1.1 root 132: } 133: 1.1.1.4 ! root 134: #define TARGET_DEFAULT (0) 1.1.1.3 root 135: 136: #define OVERRIDE_OPTIONS \ 137: do { \ 138: sh_cpu = CPU_SH0; \ 139: if (TARGET_SH1) \ 140: sh_cpu = CPU_SH1; \ 141: if (TARGET_SH2) \ 142: sh_cpu = CPU_SH2; \ 143: if (TARGET_SH3) \ 144: sh_cpu = CPU_SH3; \ 145: \ 1.1.1.4 ! root 146: /* We *MUST* always define optimize since we *HAVE* to run \ ! 147: shorten branches to get correct code. */ \ ! 148: /* ??? This is obsolete, since now shorten branches is no \ ! 149: longer required by the SH, and is always run once even \ ! 150: when not optimizing. Changing this now might be \ ! 151: confusing though. */ \ ! 152: optimize = 1; \ 1.1.1.3 root 153: flag_delayed_branch = 1; \ 1.1.1.4 ! root 154: \ ! 155: /* But never run scheduling before reload, since that can \ ! 156: break global alloc, and generates slower code anyway due \ ! 157: to the pressure on R0. */ \ ! 158: flag_schedule_insns = 0; \ 1.1.1.3 root 159: } while (0) 1.1 root 160: 1.1.1.4 ! root 161: /* Target machine storage layout. */ 1.1 root 162: 1.1.1.2 root 163: /* Define to use software floating point emulator for REAL_ARITHMETIC and 1.1.1.4 ! root 164: decimal <-> binary conversion. */ 1.1.1.2 root 165: #define REAL_ARITHMETIC 166: 1.1 root 167: /* Define this if most significant bit is lowest numbered 168: in instructions that operate on numbered bit-fields. */ 1.1.1.4 ! root 169: 1.1 root 170: #define BITS_BIG_ENDIAN 0 171: 172: /* Define this if most significant byte of a word is the lowest numbered. */ 1.1.1.4 ! root 173: #define BYTES_BIG_ENDIAN (TARGET_LITTLE_ENDIAN == 0) 1.1 root 174: 175: /* Define this if most significant word of a multiword number is the lowest 176: numbered. */ 1.1.1.4 ! root 177: #define WORDS_BIG_ENDIAN (TARGET_LITTLE_ENDIAN == 0) 1.1 root 178: 1.1.1.4 ! root 179: /* Define this to set the endianness to use in libgcc2.c, which can ! 180: not depend on target_flags. */ ! 181: #if defined(__LITTLE_ENDIAN__) ! 182: #define LIBGCC2_WORDS_BIG_ENDIAN 0 ! 183: #else ! 184: #define LIBGCC2_WORDS_BIG_ENDIAN 1 ! 185: #endif ! 186: ! 187: /* Number of bits in an addressable storage unit. */ 1.1 root 188: #define BITS_PER_UNIT 8 189: 190: /* Width in bits of a "word", which is the contents of a machine register. 191: Note that this is not necessarily the width of data type `int'; 192: if using 16-bit ints on a 68000, this would still be 32. 193: But on a machine with 16-bit registers, this would be 16. */ 194: #define BITS_PER_WORD 32 195: #define MAX_BITS_PER_WORD 32 196: 197: /* Width of a word, in units (bytes). */ 198: #define UNITS_PER_WORD 4 199: 200: /* Width in bits of a pointer. 201: See also the macro `Pmode' defined below. */ 202: #define POINTER_SIZE 32 203: 204: /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 205: #define PARM_BOUNDARY 32 206: 207: /* Boundary (in *bits*) on which stack pointer should be aligned. */ 208: #define STACK_BOUNDARY 32 209: 1.1.1.4 ! root 210: /* Allocation boundary (in *bits*) for the code of a function. ! 211: 32 bit alignment is faster, because instructions are always fetched as a ! 212: pair from a longword boundary. */ ! 213: /* ??? Perhaps also define ASM_OUTPUT_ALIGN_CODE and/or ASM_OUTPUT_LOOP_ALIGN ! 214: so as to align jump targets and/or loops to 4 byte boundaries when not ! 215: optimizing for space? */ ! 216: #define FUNCTION_BOUNDARY (TARGET_SMALLCODE ? 16 : 32) 1.1 root 217: 218: /* Alignment of field after `int : 0' in a structure. */ 219: #define EMPTY_FIELD_BOUNDARY 32 220: 221: /* No data type wants to be aligned rounder than this. */ 222: #define BIGGEST_ALIGNMENT (TARGET_ALIGN_DOUBLE ? 64 : 32) 223: 224: /* The best alignment to use in cases where we have a choice. */ 225: #define FASTEST_ALIGNMENT 32 226: 227: /* Make strings word-aligned so strcpy from constants will be faster. */ 1.1.1.4 ! root 228: #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ 1.1 root 229: ((TREE_CODE (EXP) == STRING_CST \ 230: && (ALIGN) < FASTEST_ALIGNMENT) \ 1.1.1.3 root 231: ? FASTEST_ALIGNMENT : (ALIGN)) 1.1 root 232: 233: /* Make arrays of chars word-aligned for the same reasons. */ 234: #define DATA_ALIGNMENT(TYPE, ALIGN) \ 235: (TREE_CODE (TYPE) == ARRAY_TYPE \ 236: && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ 237: && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN)) 238: 1.1.1.3 root 239: /* Number of bits which any structure or union's size must be a 240: multiple of. Each structure or union's size is rounded up to a 1.1.1.4 ! root 241: multiple of this. */ ! 242: #define STRUCTURE_SIZE_BOUNDARY (TARGET_PADSTRUCT ? 32 : 8) 1.1.1.3 root 243: 1.1 root 244: /* Set this nonzero if move instructions will actually fail to work 245: when given unaligned data. */ 246: #define STRICT_ALIGNMENT 1 247: 248: /* Standard register usage. */ 249: 1.1.1.3 root 250: /* Register allocation for the Hitachi calling convention: 1.1 root 251: 1.1.1.3 root 252: r0 arg return 253: r1..r3 scratch 1.1.1.4 ! root 254: r4..r7 args in 1.1.1.3 root 255: r8..r13 call saved 256: r14 frame pointer/call saved 1.1 root 257: r15 stack pointer 258: ap arg pointer (doesn't really exist, always eliminated) 259: pr subroutine return address 260: t t bit 1.1.1.4 ! root 261: mach multiply/accumulate result, high part ! 262: macl multiply/accumulate result, low part. */ 1.1 root 263: 264: /* Number of actual hardware registers. 265: The hardware registers are assigned numbers for the compiler 266: from 0 to just below FIRST_PSEUDO_REGISTER. 267: All registers that the compiler knows about must be given numbers, 1.1.1.4 ! root 268: even those that are not normally considered general registers. */ 1.1 root 269: 1.1.1.4 ! root 270: #define AP_REG 16 1.1 root 271: #define PR_REG 17 272: #define T_REG 18 273: #define GBR_REG 19 274: #define MACH_REG 20 275: #define MACL_REG 21 1.1.1.4 ! root 276: #define SPECIAL_REG(REGNO) ((REGNO) >= 18 && (REGNO) <= 21) 1.1 root 277: 1.1.1.3 root 278: #define FIRST_PSEUDO_REGISTER 22 1.1 root 279: 280: /* 1 for registers that have pervasive standard uses 1.1.1.4 ! root 281: and are not available for the register allocator. 1.1.1.3 root 282: 1.1.1.4 ! root 283: Mach register is fixed 'cause it's only 10 bits wide for SH1. ! 284: It is 32 bits wide for SH2. */ 1.1.1.3 root 285: 286: #define FIXED_REGISTERS \ 287: { 0, 0, 0, 0, \ 288: 0, 0, 0, 0, \ 289: 0, 0, 0, 0, \ 290: 0, 0, 0, 1, \ 291: 1, 1, 1, 1, \ 292: 1, 1} 293: 1.1 root 294: /* 1 for registers not available across function calls. 295: These must include the FIXED_REGISTERS and also any 296: registers that can be used without being saved. 297: The latter must include the registers where values are returned 298: and the register where structure-value addresses are passed. 299: Aside from that, you can include as many other registers as you like. */ 300: 1.1.1.3 root 301: #define CALL_USED_REGISTERS \ 302: { 1, 1, 1, 1, \ 303: 1, 1, 1, 1, \ 304: 0, 0, 0, 0, \ 305: 0, 0, 0, 1, \ 306: 1, 0, 1, 1, \ 1.1.1.4 ! root 307: 1, 1} 1.1 root 308: 309: /* Return number of consecutive hard regs needed starting at reg REGNO 310: to hold something of mode MODE. 311: This is ordinarily the length in words of a value of mode MODE 312: but can be less for certain modes in special long registers. 313: 1.1.1.4 ! root 314: On the SH regs are UNITS_PER_WORD bits wide. */ 1.1.1.3 root 315: 1.1.1.4 ! root 316: #define HARD_REGNO_NREGS(REGNO, MODE) \ 1.1 root 317: (((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) 318: 319: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. 1.1.1.4 ! root 320: We can allow any mode in any general register. The special registers ! 321: only allow SImode. Don't allow any mode in the PR. */ 1.1 root 322: 1.1.1.4 ! root 323: #define HARD_REGNO_MODE_OK(REGNO, MODE) \ ! 324: (SPECIAL_REG (REGNO) ? (MODE) == SImode \ ! 325: : (REGNO) == PR_REG ? 0 \ ! 326: : 1) 1.1 root 327: 328: /* Value is 1 if it is a good idea to tie two pseudo registers 329: when one has mode MODE1 and one has mode MODE2. 330: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 331: for any hard reg, then this must be 0 for correct output. */ 332: 333: #define MODES_TIEABLE_P(MODE1, MODE2) \ 334: ((MODE1) == (MODE2) || GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2)) 335: 336: /* Specify the registers used for certain standard purposes. 337: The values of these macros are register numbers. */ 338: 339: /* Define this if the program counter is overloaded on a register. */ 340: /* #define PC_REGNUM 15*/ 341: 342: /* Register to use for pushing function arguments. */ 343: #define STACK_POINTER_REGNUM 15 344: 345: /* Base register for access to local variables of the function. */ 346: #define FRAME_POINTER_REGNUM 14 347: 348: /* Value should be nonzero if functions must have frame pointers. 349: Zero means the frame pointer need not be set up (and parms may be accessed 350: via the stack pointer) in functions that seem suitable. */ 1.1.1.2 root 351: 1.1.1.3 root 352: #define FRAME_POINTER_REQUIRED 0 1.1 root 353: 354: /* Definitions for register eliminations. 355: 1.1.1.4 ! root 356: We have two registers that can be eliminated on the SH. First, the 1.1 root 357: frame pointer register can often be eliminated in favor of the stack 358: pointer register. Secondly, the argument pointer register can always be 359: eliminated; it is replaced with either the stack or frame pointer. */ 360: 361: /* This is an array of structures. Each structure initializes one pair 362: of eliminable registers. The "from" register number is given first, 363: followed by "to". Eliminations of the same "from" register are listed 364: in order of preference. */ 365: 366: #define ELIMINABLE_REGS \ 367: {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 368: { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 369: { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM},} 370: 371: /* Given FROM and TO register numbers, say whether this elimination 372: is allowed. */ 373: #define CAN_ELIMINATE(FROM, TO) \ 374: (!((FROM) == FRAME_POINTER_REGNUM && FRAME_POINTER_REQUIRED)) 375: 376: /* Define the offset between two registers, one to be eliminated, and the other 377: its replacement, at the start of a routine. */ 378: 379: #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 380: OFFSET = initial_elimination_offset (FROM, TO) 381: 382: /* Base register for access to arguments of the function. */ 383: #define ARG_POINTER_REGNUM 16 384: 385: /* Register in which the static-chain is passed to a function. */ 386: #define STATIC_CHAIN_REGNUM 13 387: 1.1.1.4 ! root 388: /* The register in which a struct value address is passed. */ 1.1.1.2 root 389: 1.1.1.3 root 390: #define STRUCT_VALUE_REGNUM 2 391: 392: /* If the structure value address is not passed in a register, define 393: `STRUCT_VALUE' as an expression returning an RTX for the place 394: where the address is passed. If it returns 0, the address is 395: passed as an "invisible" first argument. */ 1.1 root 396: 1.1.1.3 root 397: /*#define STRUCT_VALUE ((rtx)0)*/ 398: 399: /* Don't default to pcc-struct-return, because we have already specified 400: exactly how to return structures in the RETURN_IN_MEMORY macro. */ 401: 402: #define DEFAULT_PCC_STRUCT_RETURN 0 1.1 root 403: 404: /* Define the classes of registers for register constraints in the 405: machine description. Also define ranges of constants. 406: 407: One of the classes must always be named ALL_REGS and include all hard regs. 408: If there is more than one class, another class must be named NO_REGS 409: and contain no registers. 410: 411: The name GENERAL_REGS must be the name of a class (or an alias for 412: another name such as ALL_REGS). This is the class of registers 413: that is allowed by "g" or "r" in a register constraint. 414: Also, registers outside this class are allocated only when 415: instructions express preferences for them. 416: 417: The classes must be numbered in nondecreasing order; that is, 418: a larger-numbered class must never be contained completely 419: in a smaller-numbered class. 420: 421: For any two classes, it is very desirable that there be another 422: class that represents their union. */ 423: 1.1.1.4 ! root 424: /* The SH has two sorts of general registers, R0 and the rest. R0 can 1.1 root 425: be used as the destination of some of the arithmetic ops. There are 426: also some special purpose registers; the T bit register, the 1.1.1.4 ! root 427: Procedure Return Register and the Multiply Accumulate Registers. */ 1.1 root 428: 429: enum reg_class 430: { 431: NO_REGS, 432: R0_REGS, 433: PR_REGS, 434: T_REGS, 435: MAC_REGS, 1.1.1.3 root 436: GENERAL_REGS, 1.1 root 437: ALL_REGS, 438: LIM_REG_CLASSES 439: }; 440: 441: #define N_REG_CLASSES (int) LIM_REG_CLASSES 442: 1.1.1.4 ! root 443: /* Give names of register classes as strings for dump file. */ ! 444: #define REG_CLASS_NAMES \ 1.1 root 445: { \ 446: "NO_REGS", \ 447: "R0_REGS", \ 448: "PR_REGS", \ 449: "T_REGS", \ 450: "MAC_REGS", \ 1.1.1.3 root 451: "GENERAL_REGS", \ 1.1 root 452: "ALL_REGS", \ 453: } 454: 455: /* Define which registers fit in which classes. 456: This is an initializer for a vector of HARD_REG_SET 457: of length N_REG_CLASSES. */ 458: 1.1.1.4 ! root 459: #define REG_CLASS_CONTENTS \ 1.1 root 460: { \ 461: 0x000000, /* NO_REGS */ \ 462: 0x000001, /* R0_REGS */ \ 463: 0x020000, /* PR_REGS */ \ 464: 0x040000, /* T_REGS */ \ 465: 0x300000, /* MAC_REGS */ \ 1.1.1.3 root 466: 0x01FFFF, /* GENERAL_REGS */ \ 1.1 root 467: 0x37FFFF /* ALL_REGS */ \ 468: } 469: 470: /* The same information, inverted: 471: Return the class number of the smallest class containing 472: reg number REGNO. This could be a conditional expression 473: or could index an array. */ 474: 475: extern int regno_reg_class[]; 476: #define REGNO_REG_CLASS(REGNO) regno_reg_class[REGNO] 477: 1.1.1.3 root 478: /* When defined, the compiler allows registers explicitly used in the 479: rtl to be used as spill registers but prevents the compiler from 1.1.1.4 ! root 480: extending the lifetime of these registers. */ 1.1.1.3 root 481: 482: #define SMALL_REGISTER_CLASSES 483: 1.1 root 484: /* The order in which register should be allocated. */ 1.1.1.4 ! root 485: #define REG_ALLOC_ORDER \ 1.1.1.3 root 486: { 1,2,3,7,6,5,4,0,8,9,10,11,12,13,14,15,16,17,18,19,20,21 } 1.1 root 487: 488: /* The class value for index registers, and the one for base regs. */ 489: #define INDEX_REG_CLASS R0_REGS 490: #define BASE_REG_CLASS GENERAL_REGS 491: 1.1.1.4 ! root 492: /* Get reg_class from a letter such as appears in the machine ! 493: description. */ 1.1 root 494: extern enum reg_class reg_class_from_letter[]; 495: 496: #define REG_CLASS_FROM_LETTER(C) \ 497: ( (C) >= 'a' && (C) <= 'z' ? reg_class_from_letter[(C)-'a'] : NO_REGS ) 1.1.1.4 ! root 498: 1.1 root 499: /* The letters I, J, K, L and M in a register constraint string 500: can be used to stand for particular ranges of immediate operands. 501: This macro defines what the ranges are. 502: C is the letter, and VALUE is a constant value. 503: Return 1 if VALUE is in the range specified by C. 504: I: arithmetic operand -127..128, as used in add, sub, etc 1.1.1.4 ! root 505: K: shift operand 1,2,8 or 16 1.1.1.2 root 506: L: logical operand 0..255, as used in and, or, etc. 1.1 root 507: M: constant 1 1.1.1.4 ! root 508: N: constant 0 */ 1.1 root 509: 1.1.1.2 root 510: #define CONST_OK_FOR_I(VALUE) (((int)(VALUE))>= -128 && ((int)(VALUE)) <= 127) 1.1.1.4 ! root 511: #define CONST_OK_FOR_K(VALUE) ((VALUE)==1||(VALUE)==2||(VALUE)==8||(VALUE)==16) 1.1.1.2 root 512: #define CONST_OK_FOR_L(VALUE) (((int)(VALUE))>= 0 && ((int)(VALUE)) <= 255) 1.1 root 513: #define CONST_OK_FOR_M(VALUE) ((VALUE)==1) 1.1.1.3 root 514: #define CONST_OK_FOR_N(VALUE) ((VALUE)==0) 1.1.1.4 ! root 515: #define CONST_OK_FOR_LETTER_P(VALUE, C) \ ! 516: ((C) == 'I' ? CONST_OK_FOR_I (VALUE) \ ! 517: : (C) == 'K' ? CONST_OK_FOR_K (VALUE) \ ! 518: : (C) == 'L' ? CONST_OK_FOR_L (VALUE) \ ! 519: : (C) == 'M' ? CONST_OK_FOR_M (VALUE) \ ! 520: : (C) == 'N' ? CONST_OK_FOR_N (VALUE) \ 1.1 root 521: : 0) 522: 523: /* Similar, but for floating constants, and defining letters G and H. 524: Here VALUE is the CONST_DOUBLE rtx itself. */ 525: 1.1.1.4 ! root 526: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 0 1.1 root 527: 528: /* Given an rtx X being reloaded into a reg required to be 529: in class CLASS, return the class of reg to actually use. 530: In general this is just CLASS; but on some machines 531: in some cases it is preferable to use a more restrictive class. */ 532: 1.1.1.3 root 533: #define PREFERRED_RELOAD_CLASS(X, CLASS) CLASS 1.1 root 534: 535: /* Return the maximum number of consecutive registers 1.1.1.4 ! root 536: needed to represent mode MODE in a register of class CLASS. 1.1 root 537: 1.1.1.4 ! root 538: On SH this is the size of MODE in words. */ ! 539: #define CLASS_MAX_NREGS(CLASS, MODE) \ 1.1 root 540: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 541: 542: /* Stack layout; function entry, exit and calling. */ 543: 1.1.1.4 ! root 544: /* Define the number of registers that can hold parameters. ! 545: These three macros are used only in other macro definitions below. */ 1.1 root 546: #define NPARM_REGS 4 547: #define FIRST_PARM_REG 4 1.1.1.4 ! root 548: #define FIRST_RET_REG 0 1.1 root 549: 550: /* Define this if pushing a word on the stack 551: makes the stack pointer a smaller address. */ 1.1.1.4 ! root 552: #define STACK_GROWS_DOWNWARD 1.1 root 553: 1.1.1.3 root 554: /* Define this macro if the addresses of local variable slots are at 555: negative offsets from the frame pointer. 556: 1.1.1.4 ! root 557: The SH only has positive indexes, so grow the frame up. */ 1.1.1.3 root 558: /* #define FRAME_GROWS_DOWNWARD */ 559: 560: /* Offset from the frame pointer to the first local variable slot to 1.1.1.4 ! root 561: be allocated. */ 1.1 root 562: #define STARTING_FRAME_OFFSET 0 563: 564: /* If we generate an insn to push BYTES bytes, 565: this says how many the stack pointer really advances by. */ 566: #define PUSH_ROUNDING(NPUSHED) (((NPUSHED) + 3) & ~3) 567: 568: /* Offset of first parameter from the argument pointer register value. */ 569: #define FIRST_PARM_OFFSET(FNDECL) 0 570: 571: /* Value is the number of byte of arguments automatically 572: popped when returning from a subroutine call. 1.1.1.4 ! root 573: FUNDECL is the declaration node of the function (as a tree), 1.1 root 574: FUNTYPE is the data type of the function (as a tree), 575: or for a library call it is an identifier node for the subroutine name. 576: SIZE is the number of bytes of arguments passed on the stack. 577: 578: On the SH, the caller does not pop any of its arguments that were passed 579: on the stack. */ 1.1.1.4 ! root 580: #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 1.1 root 581: 582: /* Define how to find the value returned by a function. 583: VALTYPE is the data type of the value (as a tree). 584: If the precise function being called is known, FUNC is its FUNCTION_DECL; 585: otherwise, FUNC is 0. */ 1.1.1.3 root 586: 587: #define FUNCTION_VALUE(VALTYPE, FUNC) \ 1.1.1.4 ! root 588: gen_rtx (REG, TYPE_MODE (VALTYPE), FIRST_RET_REG) 1.1 root 589: 590: /* Define how to find the value returned by a library function 591: assuming the value has mode MODE. */ 1.1.1.4 ! root 592: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, FIRST_RET_REG) 1.1 root 593: 594: /* 1 if N is a possible register number for a function value. 1.1.1.3 root 595: On the SH, only r0 can return results. */ 1.1.1.4 ! root 596: #define FUNCTION_VALUE_REGNO_P(REGNO) ((REGNO) == FIRST_RET_REG) 1.1 root 597: 1.1.1.4 ! root 598: /* 1 if N is a possible register number for function argument passing. */ 1.1 root 599: 1.1.1.4 ! root 600: #define FUNCTION_ARG_REGNO_P(REGNO) \ 1.1 root 601: ((REGNO) >= FIRST_PARM_REG && (REGNO) < (NPARM_REGS + FIRST_PARM_REG)) 602: 603: /* Define a data type for recording info about an argument list 604: during the scan of that argument list. This data type should 605: hold all necessary information about the function itself 606: and about the args processed so far, enough to enable macros 607: such as FUNCTION_ARG to determine where the next arg should go. 608: 609: On SH, this is a single integer, which is a number of words 610: of arguments scanned so far (including the invisible argument, 611: if any, which holds the structure-value-address). 612: Thus NARGREGS or more means all following args should go on the stack. */ 613: 614: #define CUMULATIVE_ARGS int 615: 1.1.1.4 ! root 616: #define ROUND_ADVANCE(SIZE) \ 1.1 root 617: ((SIZE + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 618: 1.1.1.4 ! root 619: /* Round a register number up to a proper boundary for an arg of mode ! 620: MODE. ! 621: 1.1.1.3 root 622: The SH doesn't care about double alignment, so we only 1.1.1.4 ! root 623: round doubles to even regs when asked to explicitly. */ 1.1 root 624: 625: #define ROUND_REG(X, MODE) \ 626: ((TARGET_ALIGN_DOUBLE \ 627: && GET_MODE_UNIT_SIZE ((MODE)) > UNITS_PER_WORD) \ 628: ? ((X) + ((X) & 1)) : (X)) 629: 630: /* Initialize a variable CUM of type CUMULATIVE_ARGS 631: for a call to a function whose data type is FNTYPE. 632: For a library call, FNTYPE is 0. 633: 634: On SH, the offset always starts at 0: the first parm reg is always 635: the same reg. */ 636: 1.1.1.4 ! root 637: #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME) \ 1.1 root 638: ((CUM) = 0) 639: 640: /* Update the data in CUM to advance over an argument 641: of mode MODE and data type TYPE. 642: (TYPE is null for libcalls where that information may not be 643: available.) */ 644: 645: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 646: ((CUM) = (ROUND_REG ((CUM), (MODE)) \ 647: + ((MODE) != BLKmode \ 648: ? ROUND_ADVANCE (GET_MODE_SIZE (MODE)) \ 649: : ROUND_ADVANCE (int_size_in_bytes (TYPE))))) 650: 651: /* Define where to put the arguments to a function. 652: Value is zero to push the argument on the stack, 653: or a hard register in which to store the argument. 654: 655: MODE is the argument's machine mode. 656: TYPE is the data type of the argument (as a tree). 657: This is null for libcalls where that information may 658: not be available. 659: CUM is a variable of type CUMULATIVE_ARGS which gives info about 660: the preceding args and about the function being called. 661: NAMED is nonzero if this argument is a named parameter 662: (otherwise it is an extra parameter matching an ellipsis). 663: 664: On SH the first args are normally in registers 665: and the rest are pushed. Any arg that starts within the first 666: NPARM_REGS words is at least partially passed in a register unless 667: its data type forbids. */ 668: 1.1.1.3 root 669: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 1.1.1.4 ! root 670: sh_function_arg (CUM, MODE, TYPE, NAMED) 1.1.1.3 root 671: 672: extern struct rtx_def *sh_function_arg(); 1.1 root 673: 674: /* For an arg passed partly in registers and partly in memory, 675: this is the number of registers used. 676: For args passed entirely in registers or entirely in memory, zero. 1.1.1.4 ! root 677: ! 678: We sometimes split args. */ 1.1 root 679: 1.1.1.3 root 680: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ 681: sh_function_arg_partial_nregs (CUM, MODE, TYPE, NAMED) 1.1 root 682: 683: extern int current_function_anonymous_args; 684: 685: /* Perform any needed actions needed for a function that is receiving a 1.1.1.4 ! root 686: variable number of arguments. */ 1.1 root 687: 688: #define SETUP_INCOMING_VARARGS(ASF, MODE, TYPE, PAS, ST) \ 689: current_function_anonymous_args = 1; 690: 1.1.1.4 ! root 691: /* Call the function profiler with a given profile label. */ 1.1 root 692: 1.1.1.2 root 693: #define FUNCTION_PROFILER(STREAM,LABELNO) \ 694: { \ 695: fprintf(STREAM, " trapa #5\n"); \ 696: fprintf(STREAM, " .align 2\n"); \ 697: fprintf(STREAM, " .long LP%d\n", (LABELNO)); \ 1.1 root 698: } 699: 700: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 701: the stack pointer does not matter. The value is tested only in 702: functions that have frame pointers. 703: No definition is equivalent to always zero. */ 704: 1.1.1.3 root 705: #define EXIT_IGNORE_STACK 1 1.1 root 706: 1.1.1.4 ! root 707: /* Generate the assembly code for function exit ! 708: Just dump out any accumulated constant table. */ 1.1 root 709: 1.1.1.3 root 710: #define FUNCTION_EPILOGUE(STREAM, SIZE) function_epilogue (STREAM, SIZE) 711: 1.1 root 712: /* Output assembler code for a block containing the constant parts 713: of a trampoline, leaving space for the variable parts. 714: 1.1.1.4 ! root 715: On the SH, the trampoline looks like 1.1 root 716: 1 0000 D301 mov.l l1,r3 717: 2 0002 DD02 mov.l l2,r13 718: 3 0004 4D2B jmp @r13 719: 4 0006 200B or r0,r0 720: 5 0008 00000000 l1: .long function 1.1.1.4 ! root 721: 6 000c 00000000 l2: .long area */ 1.1 root 722: #define TRAMPOLINE_TEMPLATE(FILE) \ 723: { \ 724: fprintf ((FILE), " .word 0xd301\n"); \ 725: fprintf ((FILE), " .word 0xdd02\n"); \ 1.1.1.4 ! root 726: fprintf ((FILE), " .word 0x4d2b\n"); \ 1.1 root 727: fprintf ((FILE), " .word 0x200b\n"); \ 728: fprintf ((FILE), " .long 0\n"); \ 729: fprintf ((FILE), " .long 0\n"); \ 730: } 731: 732: /* Length in units of the trampoline for entering a nested function. */ 733: #define TRAMPOLINE_SIZE 16 734: 735: /* Alignment required for a trampoline in units. */ 736: #define TRAMPOLINE_ALIGN 4 737: 738: /* Emit RTL insns to initialize the variable parts of a trampoline. 739: FNADDR is an RTX for the address of the function's pure code. 740: CXT is an RTX for the static chain value for the function. */ 741: 1.1.1.4 ! root 742: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 1.1 root 743: { \ 744: emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 8)), \ 745: (CXT)); \ 746: emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 12)), \ 747: (FNADDR)); \ 748: } 749: 750: /* Addressing modes, and classification of registers for them. */ 1.1.1.3 root 751: #define HAVE_POST_INCREMENT 1 1.1 root 752: /*#define HAVE_PRE_INCREMENT 1*/ 753: /*#define HAVE_POST_DECREMENT 1*/ 1.1.1.3 root 754: #define HAVE_PRE_DECREMENT 1 1.1 root 755: 756: /* Macros to check register numbers against specific register classes. */ 757: 758: /* These assume that REGNO is a hard or pseudo reg number. 759: They give nonzero only if REGNO is a hard reg of the suitable class 760: or a pseudo reg currently allocated to a suitable hard reg. 761: Since they use reg_renumber, they are safe only once reg_renumber 1.1.1.4 ! root 762: has been allocated, which happens in local-alloc.c. */ 1.1 root 763: 1.1.1.4 ! root 764: #define REGNO_OK_FOR_BASE_P(REGNO) \ 1.1 root 765: ((REGNO) < PR_REG || (unsigned) reg_renumber[(REGNO)] < PR_REG) 1.1.1.4 ! root 766: #define REGNO_OK_FOR_INDEX_P(REGNO) \ 1.1.1.3 root 767: ((REGNO) == 0 || (unsigned) reg_renumber[(REGNO)] == 0) 1.1 root 768: 1.1.1.4 ! root 769: /* Maximum number of registers that can appear in a valid memory ! 770: address. */ 1.1 root 771: 1.1.1.3 root 772: #define MAX_REGS_PER_ADDRESS 2 1.1 root 773: 774: /* Recognize any constant value that is a valid address. */ 775: 1.1.1.4 ! root 776: #define CONSTANT_ADDRESS_P(X) (GET_CODE (X) == LABEL_REF) 1.1 root 777: 1.1.1.4 ! root 778: /* Nonzero if the constant value X is a legitimate general operand. */ 1.1 root 779: 1.1.1.4 ! root 780: /* ??? Should modify this to accept CONST_DOUBLE, and then modify the ! 781: constant pool table code to fix loads of CONST_DOUBLEs. If that doesn't ! 782: work well, then we can at least handle simple CONST_DOUBLEs here ! 783: such as 0.0. */ ! 784: #define LEGITIMATE_CONSTANT_P(X) (GET_CODE(X) != CONST_DOUBLE) 1.1 root 785: 786: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 787: and check its validity for a certain class. 788: We have two alternate definitions for each of them. 789: The usual definition accepts all pseudo regs; the other rejects 790: them unless they have been allocated suitable hard regs. 791: The symbol REG_OK_STRICT causes the latter definition to be used. */ 792: 1.1.1.3 root 793: #define MODE_DISP_OK_4(X,MODE) ((GET_MODE_SIZE(MODE)==4) && ((unsigned)INTVAL(X)<64) && (!(INTVAL(X) &3))) 794: #define MODE_DISP_OK_8(X,MODE) ((GET_MODE_SIZE(MODE)==8) && ((unsigned)INTVAL(X)<60) && (!(INTVAL(X) &3))) 795: 1.1 root 796: #ifndef REG_OK_STRICT 1.1.1.2 root 797: 1.1 root 798: /* Nonzero if X is a hard reg that can be used as a base reg 799: or if it is a pseudo reg. */ 800: #define REG_OK_FOR_BASE_P(X) \ 1.1.1.4 ! root 801: (REGNO (X) <= 16 || REGNO (X) >= FIRST_PSEUDO_REGISTER) ! 802: 1.1 root 803: /* Nonzero if X is a hard reg that can be used as an index 804: or if it is a pseudo reg. */ 805: #define REG_OK_FOR_INDEX_P(X) \ 1.1.1.4 ! root 806: (REGNO (X) == 0 || REGNO (X) >= FIRST_PSEUDO_REGISTER) 1.1.1.2 root 807: 1.1.1.4 ! root 808: /* Nonzero if X/OFFSET is a hard reg that can be used as an index ! 809: or if X is a pseudo reg. */ ! 810: #define SUBREG_OK_FOR_INDEX_P(X, OFFSET) \ ! 811: ((REGNO (X) == 0 && OFFSET == 0) || REGNO (X) >= FIRST_PSEUDO_REGISTER) 1.1.1.2 root 812: 1.1 root 813: #else 1.1.1.4 ! root 814: 1.1 root 815: /* Nonzero if X is a hard reg that can be used as a base reg. */ 1.1.1.4 ! root 816: #define REG_OK_FOR_BASE_P(X) \ ! 817: REGNO_OK_FOR_BASE_P (REGNO (X)) 1.1.1.2 root 818: 1.1 root 819: /* Nonzero if X is a hard reg that can be used as an index. */ 1.1.1.4 ! root 820: #define REG_OK_FOR_INDEX_P(X) \ ! 821: REGNO_OK_FOR_INDEX_P (REGNO (X)) ! 822: ! 823: /* Nonzero if X/OFFSET is a hard reg that can be used as an index. */ ! 824: #define SUBREG_OK_FOR_INDEX_P(X, OFFSET) \ ! 825: (REGNO_OK_FOR_INDEX_P (REGNO (X)) && OFFSET == 0) 1.1.1.2 root 826: 1.1 root 827: #endif 1.1.1.3 root 828: 1.1.1.4 ! root 829: /* The 'Q' constraint is a pc relative load operand. */ 1.1.1.3 root 830: #define EXTRA_CONSTRAINT_Q(OP) \ 831: (GET_CODE (OP) == MEM && \ 832: ((GET_CODE (XEXP (OP, 0)) == LABEL_REF) \ 833: || (GET_CODE (XEXP (OP, 0)) == CONST \ 834: && GET_CODE (XEXP (XEXP (OP, 0), 0)) == PLUS \ 835: && GET_CODE (XEXP (XEXP (XEXP (OP, 0), 0), 0)) == LABEL_REF \ 836: && GET_CODE (XEXP (XEXP (XEXP (OP, 0), 0), 1)) == CONST_INT))) 837: 1.1.1.4 ! root 838: #define EXTRA_CONSTRAINT(OP, C) \ ! 839: ((C) == 'Q' ? EXTRA_CONSTRAINT_Q (OP) \ ! 840: : 0) 1.1 root 841: 842: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 843: that is a valid memory address for an instruction. 844: The MODE argument is the machine mode for the MEM expression 845: that wants to use this address. 846: 847: The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. */ 1.1.1.2 root 848: 1.1.1.4 ! root 849: #define BASE_REGISTER_RTX_P(X) \ ! 850: ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \ ! 851: || (GET_CODE (X) == SUBREG \ ! 852: && GET_CODE (SUBREG_REG (X)) == REG \ ! 853: && REG_OK_FOR_BASE_P (SUBREG_REG (X)))) ! 854: ! 855: /* Since this must be r0, which is a single register class, we must check ! 856: SUBREGs more carefully, to be sure that we don't accept one that extends ! 857: outside the class. */ ! 858: #define INDEX_REGISTER_RTX_P(X) \ ! 859: ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \ ! 860: || (GET_CODE (X) == SUBREG \ ! 861: && GET_CODE (SUBREG_REG (X)) == REG \ ! 862: && SUBREG_OK_FOR_INDEX_P (SUBREG_REG (X), SUBREG_WORD (X)))) 1.1 root 863: 864: /* Jump to LABEL if X is a valid address RTX. This must also take 865: REG_OK_STRICT into account when deciding about valid registers, but it uses 1.1.1.4 ! root 866: the above macros so we are in luck. ! 867: 1.1 root 868: Allow REG 869: REG+disp 870: REG+r0 871: REG++ 1.1.1.4 ! root 872: --REG */ 1.1 root 873: 1.1.1.4 ! root 874: /* The SH allows a displacement in a QI or HI amode, but only when the 1.1.1.2 root 875: other operand is R0. GCC doesn't handle this very well, so we forgo 876: all of that. 877: 1.1.1.4 ! root 878: A legitimate index for a QI or HI is 0, SI can be any number 0..63, ! 879: DI can be any number 0..60. */ 1.1 root 880: 1.1.1.4 ! root 881: #define GO_IF_LEGITIMATE_INDEX(MODE, OP, LABEL) \ 1.1.1.3 root 882: do { \ 883: if (GET_CODE (OP) == CONST_INT) \ 884: { \ 885: if (MODE_DISP_OK_4 (OP, MODE)) goto LABEL; \ 886: if (MODE_DISP_OK_8 (OP, MODE)) goto LABEL; \ 887: } \ 1.1 root 888: } while(0) 889: 1.1.1.4 ! root 890: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \ ! 891: { \ ! 892: if (BASE_REGISTER_RTX_P (X)) \ ! 893: goto LABEL; \ ! 894: else if ((GET_CODE (X) == POST_INC || GET_CODE (X) == PRE_DEC) \ ! 895: && BASE_REGISTER_RTX_P (XEXP (X, 0))) \ ! 896: goto LABEL; \ ! 897: else if (GET_CODE (X) == PLUS) \ ! 898: { \ ! 899: rtx xop0 = XEXP (X, 0); \ ! 900: rtx xop1 = XEXP (X, 1); \ ! 901: if (GET_MODE_SIZE (MODE) <= 8 && BASE_REGISTER_RTX_P (xop0)) \ ! 902: GO_IF_LEGITIMATE_INDEX (MODE, xop1, LABEL); \ ! 903: if (GET_MODE_SIZE (MODE) <= 4) \ ! 904: { \ ! 905: if (BASE_REGISTER_RTX_P (xop1) && INDEX_REGISTER_RTX_P (xop0))\ ! 906: goto LABEL; \ ! 907: if (INDEX_REGISTER_RTX_P (xop1) && BASE_REGISTER_RTX_P (xop0))\ ! 908: goto LABEL; \ ! 909: } \ ! 910: } \ ! 911: } ! 912: ! 913: /* Try machine-dependent ways of modifying an illegitimate address 1.1 root 914: to be legitimate. If we find one, return the new, valid address. 915: This macro is used in only one place: `memory_address' in explow.c. 916: 917: OLDX is the address as it was before break_out_memory_refs was called. 918: In some cases it is useful to look at this to decide what needs to be done. 919: 920: MODE and WIN are passed so that this macro can use 921: GO_IF_LEGITIMATE_ADDRESS. 922: 923: It is always safe for this macro to do nothing. It exists to recognize 1.1.1.4 ! root 924: opportunities to optimize the output. */ 1.1 root 925: 1.1.1.3 root 926: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) ; 1.1 root 927: 928: /* Go to LABEL if ADDR (a legitimate address expression) 929: has an effect that depends on the machine mode it is used for. */ 1.1.1.4 ! root 930: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ 1.1 root 931: { \ 1.1.1.4 ! root 932: if (GET_CODE(ADDR) == PRE_DEC || GET_CODE(ADDR) == POST_INC) \ 1.1 root 933: goto LABEL; \ 934: } 935: 936: /* Specify the machine mode that this machine uses 937: for the index in the tablejump instruction. */ 1.1.1.3 root 938: #define CASE_VECTOR_MODE (TARGET_BIGTABLE ? SImode : HImode) 1.1 root 939: 940: /* Define this if the tablejump instruction expects the table 941: to contain offsets from the address of the table. 942: Do not define this if the table should contain absolute addresses. */ 1.1.1.4 ! root 943: #define CASE_VECTOR_PC_RELATIVE 1.1 root 944: 945: /* Specify the tree operation to be used to convert reals to integers. */ 946: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR 947: 948: /* This is the kind of divide that is easiest to do in the general case. */ 949: #define EASY_DIV_EXPR TRUNC_DIV_EXPR 950: 1.1.1.4 ! root 951: /* 'char' is signed by default. */ 1.1 root 952: #define DEFAULT_SIGNED_CHAR 1 953: 954: /* The type of size_t unsigned int. */ 955: #define SIZE_TYPE "unsigned int" 956: 1.1.1.3 root 957: #define WCHAR_TYPE "short unsigned int" 958: #define WCHAR_TYPE_SIZE 16 959: 1.1 root 960: /* Don't cse the address of the function being compiled. */ 1.1.1.3 root 961: /*#define NO_RECURSIVE_FUNCTION_CSE 1*/ 1.1 root 962: 963: /* Max number of bytes we can move from memory to memory 964: in one reasonably fast instruction. */ 965: #define MOVE_MAX 4 966: 1.1.1.2 root 967: /* Define if operations between registers always perform the operation 968: on the full register even if a narrower mode is specified. */ 969: #define WORD_REGISTER_OPERATIONS 970: 971: /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD 972: will either zero-extend or sign-extend. The value of this macro should 973: be the code that says which one of the two operations is implicitly 974: done, NIL if none. */ 975: #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND 1.1 root 976: 977: /* Define this if zero-extension is slow (more than one real instruction). 1.1.1.4 ! root 978: On the SH, it's only one instruction. */ 1.1 root 979: /* #define SLOW_ZERO_EXTEND */ 980: 981: /* Nonzero if access to memory by bytes is slow and undesirable. */ 982: #define SLOW_BYTE_ACCESS 0 983: 984: /* We assume that the store-condition-codes instructions store 0 for false 985: and some other value for true. This is the value stored for true. */ 986: 987: #define STORE_FLAG_VALUE 1 988: 989: /* Immediate shift counts are truncated by the output routines (or was it 1.1.1.4 ! root 990: the assembler?). Shift counts in a register are truncated by SH. Note 1.1 root 991: that the native compiler puts too large (> 32) immediate shift counts 1.1.1.4 ! root 992: into a register and shifts by the register, letting the SH decide what 1.1 root 993: to do instead of doing that itself. */ 1.1.1.4 ! root 994: /* ??? This is defined, but the library routines in lib1funcs.asm do not ! 995: truncate the shift count. This may result in incorrect results for ! 996: unusual cases. Truncating the shift counts in the library routines would ! 997: make them faster. However, the SH3 has hardware shifts that do not ! 998: truncate, so it appears that we need to leave this undefined for correct ! 999: SH3 code. We can still using truncation in the library routines though to ! 1000: make them faster. */ 1.1 root 1001: #define SHIFT_COUNT_TRUNCATED 1 1002: 1003: /* All integers have the same format so truncation is easy. */ 1004: #define TRULY_NOOP_TRUNCATION(OUTPREC,INPREC) 1 1005: 1006: /* Define this if addresses of constant functions 1007: shouldn't be put through pseudo regs where they can be cse'd. 1008: Desirable on machines where ordinary constants are expensive 1009: but a CALL with constant address is cheap. */ 1010: /*#define NO_FUNCTION_CSE 1*/ 1011: 1012: /* Chars and shorts should be passed as ints. */ 1013: #define PROMOTE_PROTOTYPES 1 1014: 1.1.1.4 ! root 1015: /* The machine modes of pointers and functions. */ 1.1 root 1016: #define Pmode SImode 1017: #define FUNCTION_MODE Pmode 1018: 1019: /* The relative costs of various types of constants. Note that cse.c defines 1020: REG = 1, SUBREG = 2, any node = (2 + sum of subnodes). */ 1021: 1.1.1.4 ! root 1022: #define CONST_COSTS(RTX, CODE, OUTER_CODE) \ 1.1 root 1023: case CONST_INT: \ 1.1.1.4 ! root 1024: if (INTVAL (RTX) == 0) \ ! 1025: return 0; \ ! 1026: else if (CONST_OK_FOR_I (INTVAL (RTX))) \ ! 1027: return 1; \ ! 1028: else if ((OUTER_CODE == AND || OUTER_CODE == IOR || OUTER_CODE == XOR) \ ! 1029: && CONST_OK_FOR_L (INTVAL (RTX))) \ 1.1 root 1030: return 1; \ 1031: else \ 1.1.1.2 root 1032: return 8; \ 1.1 root 1033: case CONST: \ 1034: case LABEL_REF: \ 1035: case SYMBOL_REF: \ 1.1.1.2 root 1036: return 5; \ 1.1 root 1037: case CONST_DOUBLE: \ 1038: return 10; 1039: 1040: #define RTX_COSTS(X, CODE, OUTER_CODE) \ 1.1.1.3 root 1041: case AND: \ 1.1.1.4 ! root 1042: return COSTS_N_INSNS (andcosts (X)); \ 1.1 root 1043: case MULT: \ 1.1.1.2 root 1044: return COSTS_N_INSNS (multcosts (X)); \ 1045: case ASHIFT: \ 1046: case ASHIFTRT: \ 1.1.1.4 ! root 1047: case LSHIFTRT: \ 1.1.1.2 root 1048: return COSTS_N_INSNS (shiftcosts (X)) ; \ 1.1 root 1049: case DIV: \ 1050: case UDIV: \ 1051: case MOD: \ 1052: case UMOD: \ 1.1.1.4 ! root 1053: return COSTS_N_INSNS (20); \ 1.1 root 1054: case FLOAT: \ 1055: case FIX: \ 1056: return 100; 1057: 1.1.1.4 ! root 1058: /* The multiply insn on the SH1 and the divide insns on the SH1 and SH2 ! 1059: are actually function calls with some special constraints on arguments ! 1060: and register usage. 1.1.1.3 root 1061: 1.1.1.4 ! root 1062: These macros tell reorg that the references to arguments and ! 1063: register clobbers for insns of type sfunc do not appear to happen 1.1.1.3 root 1064: until after the millicode call. This allows reorg to put insns 1065: which set the argument registers into the delay slot of the millicode 1066: call -- thus they act more like traditional CALL_INSNs. 1067: 1068: get_attr_type will try to recognize the given insn, so make sure to 1069: filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns 1070: in particular. */ 1071: 1072: #define INSN_SETS_ARE_DELAYED(X) \ 1073: ((GET_CODE (X) == INSN \ 1074: && GET_CODE (PATTERN (X)) != SEQUENCE \ 1075: && GET_CODE (PATTERN (X)) != USE \ 1076: && GET_CODE (PATTERN (X)) != CLOBBER \ 1077: && get_attr_type (X) == TYPE_SFUNC)) 1078: 1079: #define INSN_REFERENCES_ARE_DELAYED(X) \ 1080: ((GET_CODE (X) == INSN \ 1081: && GET_CODE (PATTERN (X)) != SEQUENCE \ 1082: && GET_CODE (PATTERN (X)) != USE \ 1083: && GET_CODE (PATTERN (X)) != CLOBBER \ 1.1.1.4 ! root 1084: && get_attr_type (X) == TYPE_SFUNC)) 1.1.1.3 root 1085: 1.1 root 1086: /* Compute extra cost of moving data between one register class 1.1.1.4 ! root 1087: and another. 1.1 root 1088: 1089: On the SH it is hard to move into the T reg, but simple to load 1.1.1.4 ! root 1090: from it. */ 1.1 root 1091: 1.1.1.4 ! root 1092: #define REGISTER_MOVE_COST(SRCCLASS, DSTCLASS) \ 1.1.1.3 root 1093: (((DSTCLASS == T_REGS) || (DSTCLASS == PR_REG)) ? 10 : 1) 1.1.1.2 root 1094: 1.1.1.4 ! root 1095: /* ??? Perhaps make MEMORY_MOVE_COST depend on compiler option? This ! 1096: would be so that people would slow memory systems could generate ! 1097: different code that does fewer memory accesses. */ ! 1098: ! 1099: /* Assembler output control. */ 1.1.1.2 root 1100: 1.1.1.4 ! root 1101: /* The text to go at the start of the assembler file. */ ! 1102: #define ASM_FILE_START(STREAM) \ ! 1103: output_file_start (STREAM, f_options, \ ! 1104: sizeof f_options / sizeof f_options[0], \ ! 1105: W_options, sizeof W_options / sizeof W_options[0]); 1.1 root 1106: 1.1.1.4 ! root 1107: #define ASM_FILE_END(STREAM) 1.1.1.2 root 1108: 1.1.1.3 root 1109: #define ASM_APP_ON "" 1110: #define ASM_APP_OFF "" 1111: #define FILE_ASM_OP "\t.file\n" 1112: #define IDENT_ASM_OP "\t.ident\n" 1113: 1.1.1.4 ! root 1114: /* How to change between sections. */ 1.1.1.3 root 1115: 1116: #define TEXT_SECTION_ASM_OP "\t.text" 1117: #define DATA_SECTION_ASM_OP "\t.data" 1118: #define CTORS_SECTION_ASM_OP "\t.section\t.ctors\n" 1119: #define DTORS_SECTION_ASM_OP "\t.section\t.dtors\n" 1120: #define EXTRA_SECTIONS in_ctors, in_dtors 1.1.1.4 ! root 1121: #define EXTRA_SECTION_FUNCTIONS \ ! 1122: void \ ! 1123: ctors_section() \ ! 1124: { \ ! 1125: if (in_section != in_ctors) \ ! 1126: { \ ! 1127: fprintf (asm_out_file, "%s\n", CTORS_SECTION_ASM_OP); \ ! 1128: in_section = in_ctors; \ ! 1129: } \ ! 1130: } \ ! 1131: void \ ! 1132: dtors_section() \ ! 1133: { \ ! 1134: if (in_section != in_dtors) \ ! 1135: { \ ! 1136: fprintf (asm_out_file, "%s\n", DTORS_SECTION_ASM_OP); \ ! 1137: in_section = in_dtors; \ ! 1138: } \ ! 1139: } 1.1.1.2 root 1140: 1.1.1.4 ! root 1141: /* A C statement to output something to the assembler file to switch to section ! 1142: NAME for object DECL which is either a FUNCTION_DECL, a VAR_DECL or ! 1143: NULL_TREE. Some target formats do not support arbitrary sections. Do not ! 1144: define this macro in such cases. */ 1.1.1.3 root 1145: 1.1.1.4 ! root 1146: #define ASM_OUTPUT_SECTION_NAME(FILE, DECL, NAME) \ 1.1.1.3 root 1147: do { fprintf (FILE, ".section\t%s\n", NAME); } while (0) 1.1.1.2 root 1148: 1.1.1.4 ! root 1149: #define ASM_OUTPUT_CONSTRUCTOR(FILE,NAME) \ 1.1.1.2 root 1150: do { ctors_section(); fprintf(FILE,"\t.long\t_%s\n", NAME); } while (0) 1151: 1.1.1.4 ! root 1152: #define ASM_OUTPUT_DESTRUCTOR(FILE,NAME) \ 1.1.1.2 root 1153: do { dtors_section(); fprintf(FILE,"\t.long\t_%s\n", NAME); } while (0) 1154: 1.1.1.4 ! root 1155: #undef DO_GLOBAL_CTORS_BODY 1.1.1.3 root 1156: 1.1.1.2 root 1157: #define DO_GLOBAL_CTORS_BODY \ 1158: { \ 1159: typedef (*pfunc)(); \ 1160: extern pfunc __ctors[]; \ 1161: extern pfunc __ctors_end[]; \ 1162: pfunc *p; \ 1.1.1.4 ! root 1163: for (p = __ctors_end; p > __ctors; ) \ 1.1.1.2 root 1164: { \ 1.1.1.4 ! root 1165: (*--p)(); \ 1.1.1.2 root 1166: } \ 1.1.1.4 ! root 1167: } 1.1 root 1168: 1.1.1.4 ! root 1169: #undef DO_GLOBAL_DTORS_BODY ! 1170: #define DO_GLOBAL_DTORS_BODY \ 1.1.1.2 root 1171: { \ 1172: typedef (*pfunc)(); \ 1173: extern pfunc __dtors[]; \ 1174: extern pfunc __dtors_end[]; \ 1175: pfunc *p; \ 1176: for (p = __dtors; p < __dtors_end; p++) \ 1177: { \ 1178: (*p)(); \ 1179: } \ 1.1.1.4 ! root 1180: } 1.1.1.2 root 1181: 1182: #define ASM_OUTPUT_REG_PUSH(file, v) \ 1183: fprintf (file, "\tmov.l r%s,-@r15\n", v); 1184: 1185: #define ASM_OUTPUT_REG_POP(file, v) \ 1186: fprintf (file, "\tmov.l @r15+,r%s\n", v); 1187: 1.1 root 1188: /* The assembler's names for the registers. RFP need not always be used as 1189: the Real framepointer; it can also be used as a normal general register. 1190: Note that the name `fp' is horribly misleading since `fp' is in fact only 1191: the argument-and-return-context pointer. */ 1192: #define REGISTER_NAMES \ 1193: { \ 1194: "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ 1195: "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \ 1196: "ap", "pr", "t", "gbr", "mach","macl" \ 1197: } 1198: 1.1.1.4 ! root 1199: /* DBX register number for a given compiler register number. */ 1.1 root 1200: #define DBX_REGISTER_NUMBER(REGNO) (REGNO) 1201: 1202: /* Output a label definition. */ 1.1.1.4 ! root 1203: #define ASM_OUTPUT_LABEL(FILE,NAME) \ 1.1 root 1204: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) 1205: 1206: /* This is how to output an assembler line 1207: that says to advance the location counter 1208: to a multiple of 2**LOG bytes. */ 1209: 1210: #define ASM_OUTPUT_ALIGN(FILE,LOG) \ 1211: if ((LOG) != 0) \ 1212: fprintf (FILE, "\t.align %d\n", LOG) 1213: 1214: /* Output a function label definition. */ 1215: #define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL) \ 1216: ASM_OUTPUT_LABEL(STREAM, NAME) 1217: 1218: /* Output a globalising directive for a label. */ 1.1.1.4 ! root 1219: #define ASM_GLOBALIZE_LABEL(STREAM,NAME) \ ! 1220: (fprintf (STREAM, "\t.global\t"), \ ! 1221: assemble_name (STREAM, NAME), \ ! 1222: fputc ('\n',STREAM)) 1.1 root 1223: 1224: /* Output a reference to a label. */ 1.1.1.4 ! root 1225: #define ASM_OUTPUT_LABELREF(STREAM,NAME) \ 1.1 root 1226: fprintf (STREAM, "_%s", NAME) 1227: 1228: /* Make an internal label into a string. */ 1.1.1.4 ! root 1229: #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \ 1.1 root 1230: sprintf (STRING, "*%s%d", PREFIX, NUM) 1231: 1232: /* Output an internal label definition. */ 1.1.1.4 ! root 1233: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ 1.1 root 1234: fprintf (FILE, "%s%d:\n", PREFIX, NUM) 1235: 1236: /* #define ASM_OUTPUT_CASE_END(STREAM,NUM,TABLE) */ 1237: 1238: /* Construct a private name. */ 1.1.1.4 ! root 1239: #define ASM_FORMAT_PRIVATE_NAME(OUTVAR,NAME,NUMBER) \ ! 1240: ((OUTVAR) = (char *) alloca (strlen (NAME) + 10), \ 1.1 root 1241: sprintf ((OUTVAR), "%s.%d", (NAME), (NUMBER))) 1242: 1.1.1.4 ! root 1243: /* Jump tables must be 32 bit aligned, no matter the size of the element. */ 1.1 root 1244: #define ASM_OUTPUT_CASE_LABEL(STREAM,PREFIX,NUM,TABLE) \ 1.1.1.4 ! root 1245: fprintf (STREAM, "\t.align 2\n%s%d:\n", PREFIX, NUM); 1.1 root 1246: 1.1.1.4 ! root 1247: /* Output a relative address table. */ 1.1.1.3 root 1248: 1249: #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM,VALUE,REL) \ 1250: if (TARGET_BIGTABLE) \ 1.1.1.4 ! root 1251: fprintf (STREAM, "\t.long L%d-L%d\n", VALUE,REL); \ 1.1.1.3 root 1252: else \ 1.1.1.4 ! root 1253: fprintf (STREAM, "\t.word L%d-L%d\n", VALUE,REL); \ 1.1.1.3 root 1254: 1.1.1.4 ! root 1255: /* Output an absolute table element. */ 1.1.1.3 root 1256: 1257: #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM,VALUE) \ 1258: if (TARGET_BIGTABLE) \ 1.1.1.4 ! root 1259: fprintf (STREAM, "\t.long L%d\n", VALUE); \ 1.1.1.3 root 1260: else \ 1.1.1.4 ! root 1261: fprintf (STREAM, "\t.word L%d\n", VALUE); \ 1.1 root 1262: 1263: /* Output various types of constants. */ 1264: 1.1.1.4 ! root 1265: /* This is how to output an assembler line defining a `double'. */ 1.1 root 1266: 1.1.1.2 root 1267: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ 1268: do { char dstr[30]; \ 1269: REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", dstr); \ 1270: fprintf (FILE, "\t.double %s\n", dstr); \ 1271: } while (0) 1272: 1.1 root 1273: /* This is how to output an assembler line defining a `float' constant. */ 1.1.1.4 ! root 1274: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ 1.1.1.2 root 1275: do { char dstr[30]; \ 1276: REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", dstr); \ 1277: fprintf (FILE, "\t.float %s\n", dstr); \ 1278: } while (0) 1.1 root 1279: 1280: #define ASM_OUTPUT_INT(STREAM, EXP) \ 1281: (fprintf (STREAM, "\t.long\t"), \ 1282: output_addr_const (STREAM, (EXP)), \ 1.1.1.4 ! root 1283: fputc ('\n', STREAM)) 1.1 root 1284: 1.1.1.4 ! root 1285: #define ASM_OUTPUT_SHORT(STREAM, EXP) \ ! 1286: (fprintf (STREAM, "\t.short\t"), \ ! 1287: output_addr_const (STREAM, (EXP)), \ ! 1288: fputc ('\n', STREAM)) 1.1 root 1289: 1290: #define ASM_OUTPUT_CHAR(STREAM, EXP) \ 1291: (fprintf (STREAM, "\t.byte\t"), \ 1292: output_addr_const (STREAM, (EXP)), \ 1293: fputc ('\n', STREAM)) 1294: 1295: #define ASM_OUTPUT_BYTE(STREAM, VALUE) \ 1296: fprintf (STREAM, "\t.byte\t%d\n", VALUE) \ 1297: 1298: /* This is how to output an assembler line 1299: that says to advance the location counter by SIZE bytes. */ 1300: 1.1.1.4 ! root 1301: #define ASM_OUTPUT_SKIP(FILE,SIZE) \ 1.1 root 1302: fprintf (FILE, "\t.space %d\n", (SIZE)) 1303: 1304: /* This says how to output an assembler line 1305: to define a global common symbol. */ 1306: 1.1.1.4 ! root 1307: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ 1.1 root 1308: ( fputs ("\t.comm ", (FILE)), \ 1309: assemble_name ((FILE), (NAME)), \ 1310: fprintf ((FILE), ",%d\n", (SIZE))) 1311: 1312: /* This says how to output an assembler line 1313: to define a local common symbol. */ 1314: 1315: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \ 1316: ( fputs ("\t.lcomm ", (FILE)), \ 1317: assemble_name ((FILE), (NAME)), \ 1318: fprintf ((FILE), ",%d\n", (SIZE))) 1319: 1320: /* The assembler's parentheses characters. */ 1321: #define ASM_OPEN_PAREN "(" 1322: #define ASM_CLOSE_PAREN ")" 1323: 1324: /* Target characters. */ 1325: #define TARGET_BELL 007 1326: #define TARGET_BS 010 1327: #define TARGET_TAB 011 1328: #define TARGET_NEWLINE 012 1329: #define TARGET_VT 013 1330: #define TARGET_FF 014 1331: #define TARGET_CR 015 1332: 1333: /* Only perform branch elimination (by making instructions conditional) if 1.1.1.4 ! root 1334: we're optimizing. Otherwise it's of no use anyway. */ ! 1335: #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \ ! 1336: final_prescan_insn (INSN, OPVEC, NOPERANDS) 1.1 root 1337: 1338: /* Print operand X (an rtx) in assembler syntax to file FILE. 1339: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. 1340: For `%' followed by punctuation, CODE is the punctuation and X is null. */ 1341: 1342: #define PRINT_OPERAND(STREAM, X, CODE) print_operand (STREAM, X, CODE) 1343: 1344: /* Print a memory address as an operand to reference that memory location. */ 1345: 1346: #define PRINT_OPERAND_ADDRESS(STREAM,X) print_operand_address (STREAM, X) 1347: 1348: #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \ 1.1.1.4 ! root 1349: ((CHAR)=='.' || (CHAR) == '#' || (CHAR)=='@') 1.1 root 1350: 1351: extern struct rtx_def *sh_compare_op0; 1352: extern struct rtx_def *sh_compare_op1; 1353: extern struct rtx_def *prepare_scc_operands(); 1.1.1.3 root 1354: 1.1.1.4 ! root 1355: /* Which processor to schedule for. The elements of the enumeration must ! 1356: match exactly the cpu attribute in the sh.md file. */ ! 1357: ! 1358: enum processor_type { ! 1359: PROCESSOR_SH0, ! 1360: PROCESSOR_SH1, ! 1361: PROCESSOR_SH2, ! 1362: PROCESSOR_SH3 ! 1363: }; 1.1 root 1364: 1.1.1.4 ! root 1365: #define sh_cpu_attr ((enum attr_cpu)sh_cpu) ! 1366: extern enum processor_type sh_cpu; 1.1 root 1367: 1.1.1.4 ! root 1368: /* Declare functions defined in sh.c and used in templates. */ 1.1 root 1369: 1370: extern char *output_branch(); 1371: extern char *output_shift(); 1372: extern char *output_movedouble(); 1373: extern char *output_movepcrel(); 1.1.1.3 root 1374: extern char *output_jump_label_table(); 1375: extern char *output_far_jump(); 1376: 1377: #define MACHINE_DEPENDENT_REORG(X) machine_dependent_reorg(X) 1.1 root 1378: 1.1.1.3 root 1379: /* Generate calls to memcpy, memcmp and memset. */ 1.1.1.2 root 1380: 1.1.1.3 root 1381: #define TARGET_MEM_FUNCTIONS 1.1.1.2 root 1382: 1.1.1.3 root 1383: #define HANDLE_PRAGMA(finput) return handle_pragma (finput) 1.1.1.2 root 1384: 1.1.1.4 ! root 1385: /* Set when processing a function with pragma interrupt turned on. */ 1.1.1.2 root 1386: 1.1.1.3 root 1387: extern int pragma_interrupt; 1.1.1.2 root 1388: 1.1.1.4 ! root 1389: #define MOVE_RATIO (TARGET_SMALLCODE ? 2 : 16) ! 1390: ! 1391: /* Instructions with unfilled delay slots take up an extra two bytes for ! 1392: the nop in the delay slot. */ ! 1393: ! 1394: #define ADJUST_INSN_LENGTH(X, LENGTH) \ ! 1395: if (((GET_CODE (X) == INSN \ ! 1396: && GET_CODE (PATTERN (X)) != SEQUENCE \ ! 1397: && GET_CODE (PATTERN (X)) != USE \ ! 1398: && GET_CODE (PATTERN (X)) != CLOBBER) \ ! 1399: || GET_CODE (X) == CALL_INSN \ ! 1400: || (GET_CODE (X) == JUMP_INSN \ ! 1401: && GET_CODE (PATTERN (X)) != ADDR_DIFF_VEC \ ! 1402: && GET_CODE (PATTERN (X)) != ADDR_VEC)) \ ! 1403: && get_attr_needs_delay_slot (X) == NEEDS_DELAY_SLOT_YES) \ ! 1404: LENGTH += 2; ! 1405: ! 1406: /* Enable a bug fix for the shorten_branches pass. */ ! 1407: #define SHORTEN_WITH_ADJUST_INSN_LENGTH ! 1408: ! 1409: /* Define the codes that are matched by predicates in sh.c. */ ! 1410: #define PREDICATE_CODES \ ! 1411: {"arith_reg_operand", {SUBREG, REG}}, \ ! 1412: {"arith_operand", {SUBREG, REG, CONST_INT}}, \ ! 1413: {"arith_reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \ ! 1414: {"logical_operand", {SUBREG, REG, CONST_INT}}, \ ! 1415: {"general_movsrc_operand", {SUBREG, REG, CONST_INT, MEM}}, \ ! 1416: {"general_movdst_operand", {SUBREG, REG, CONST_INT, MEM}}, ! 1417: ! 1418: /* Define this macro if it is advisable to hold scalars in registers ! 1419: in a wider mode than that declared by the program. In such cases, ! 1420: the value is constrained to be within the bounds of the declared ! 1421: type, but kept valid in the wider mode. The signedness of the ! 1422: extension may differ from that of the type. ! 1423: ! 1424: Leaving the unsignedp unchanged gives better code than always setting it ! 1425: to 0. This is despite the fact that we have only signed char and short ! 1426: load instructions. */ ! 1427: #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ ! 1428: if (GET_MODE_CLASS (MODE) == MODE_INT \ ! 1429: && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ ! 1430: MODE = SImode; ! 1431: ! 1432: /* Defining PROMOTE_FUNCTION_ARGS eliminates some unnecessary zero/sign ! 1433: extensions applied to char/short functions arguments. Defining ! 1434: PROMOTE_FUNCTION_RETURN does the same for function returns. */ ! 1435: ! 1436: #define PROMOTE_FUNCTION_ARGS ! 1437: #define PROMOTE_FUNCTION_RETURN ! 1438: ! 1439: /* ??? Define ACCUMULATE_OUTGOING_ARGS? This is more efficient than pushing ! 1440: and poping arguments. However, we do have push/pop instructions, and ! 1441: rather limited offsets (4 bits) in load/store instructions, so it isn't ! 1442: clear if this would give better code. If implemented, should check for ! 1443: compatibility problems. */ ! 1444: ! 1445: /* ??? Define ADJUST_COSTS? */ ! 1446: ! 1447: /* For the sake of libgcc2.c, indicate target supports atexit. */ ! 1448: #define HAVE_ATEXIT
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