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1.1 root 1: /* Definitions of target machine for GNU compiler. Convex version.
2: Copyright (C) 1989 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
6: GNU CC is free software; you can redistribute it and/or modify
7: it under the terms of the GNU General Public License as published by
8: the Free Software Foundation; either version 1, or (at your option)
9: any later version.
10:
11: GNU CC is distributed in the hope that it will be useful,
12: but WITHOUT ANY WARRANTY; without even the implied warranty of
13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14: GNU General Public License for more details.
15:
16: You should have received a copy of the GNU General Public License
17: along with GNU CC; see the file COPYING. If not, write to
18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19:
20:
21: /* Names to predefine in the preprocessor for this target machine. */
22:
23: #define CPP_PREDEFINES "-Dconvex -Dparsec -Dunix"
24:
25: /* Print subsidiary information on the compiler version in use. */
26:
27: #define TARGET_VERSION fprintf (stderr, " (convex)");
28:
29: /* Run-time compilation parameters selecting different hardware subsets. */
30:
31: extern int target_flags;
32:
33: /* Macros used in the machine description to test the flags. */
34:
35: /*
36: -mc1 avoid C2-only instructions; default on C1 host
37: -mc2 use C2-only instructions; default on C2 host
38: -margcount use standard calling sequence, with arg count word
39: -mnoargcount don't push arg count (it's in the symbol table) (usually)
40: */
41:
42: #define TARGET_C1 (target_flags & 1)
43: #define TARGET_C2 (target_flags & 2)
44: #define TARGET_ARGCOUNT (target_flags & 4)
45:
46: /* Macro to define tables used to set the flags.
47: This is a list in braces of pairs in braces,
48: each pair being { "NAME", VALUE }
49: where VALUE is the bits to set or minus the bits to clear.
50: An empty string NAME is used to identify the default VALUE. */
51:
52: #define TARGET_SWITCHES \
53: { { "c1", 1 }, \
54: { "c2", 2 }, \
55: { "noc1", -1 }, \
56: { "noc2", -2 }, \
57: { "argcount", 4 }, \
58: { "noargcount", -4 }, \
59: { "", TARGET_DEFAULT }}
60:
61: /* Default target_flags if no switches specified. */
62:
63: #ifndef TARGET_DEFAULT
64: #define TARGET_DEFAULT 0
65: #endif
66:
67: /* Pick a target if none was specified */
68:
69: #define OVERRIDE_OPTIONS override_options ();
70:
71: /* Allow $ in identifiers */
72:
73: #define DOLLARS_IN_IDENTIFIERS 1
74:
75: /* Target machine storage layout */
76:
77: /* Define this if most significant bit is lowest numbered
78: in instructions that operate on numbered bit-fields. */
79: #define BITS_BIG_ENDIAN
80:
81: /* Define this if most significant byte of a word is the lowest numbered. */
82: #define BYTES_BIG_ENDIAN
83:
84: /* Define this if most significant word of a multiword number is numbered. */
85: /* Lie, so that gcc will take the low part of double reg N in reg N. */
86: /* #define WORDS_BIG_ENDIAN */
87:
88: /* Number of bits in an addressible storage unit */
89: #define BITS_PER_UNIT 8
90:
91: /* Width in bits of a "word", which is the contents of a machine register.
92: Note that this is not necessarily the width of data type `int';
93: if using 16-bit ints on a 68000, this would still be 32.
94: But on a machine with 16-bit registers, this would be 16. */
95: #define BITS_PER_WORD 32
96:
97: /* Width of a word, in units (bytes). */
98: #define UNITS_PER_WORD 4
99:
100: /* Width in bits of a pointer.
101: See also the macro `Pmode' defined below. */
102: #define POINTER_SIZE 32
103:
104: /* Allocation boundary (in *bits*) for storing pointers in memory. */
105: #define POINTER_BOUNDARY 32
106:
107: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
108: #define PARM_BOUNDARY 32
109:
110: /* Boundary (in *bits*) on which stack pointer should be aligned. */
111: #define STACK_BOUNDARY 32
112:
113: /* Allocation boundary (in *bits*) for the code of a function. */
114: #define FUNCTION_BOUNDARY 16
115:
116: /* Alignment of field after `int : 0' in a structure. */
117: #define EMPTY_FIELD_BOUNDARY 32
118:
119: /* Every structure's size must be a multiple of this. */
120: #define STRUCTURE_SIZE_BOUNDARY 8
121:
122: /* A bitfield declared as `int' forces `int' alignment for the struct. */
123: #define PCC_BITFIELD_TYPE_MATTERS
124:
125: /* No data type wants to be aligned rounder than this. */
126: /* beware of doubles in structs -- 64 is incompatible with pcc */
127: #define BIGGEST_ALIGNMENT 32
128:
129: /* Define this if move instructions will actually fail to work
130: when given unaligned data. */
131: /* #define STRICT_ALIGNMENT */
132:
133: /* Standard register usage. */
134:
135: /* Number of actual hardware registers.
136: The hardware registers are assigned numbers for the compiler
137: from 0 to just below FIRST_PSEUDO_REGISTER.
138: All registers that the compiler knows about must be given numbers,
139: even those that are not normally considered general registers. */
140: #define FIRST_PSEUDO_REGISTER 16
141:
142: /* 1 for registers that have pervasive standard uses
143: and are not available for the register allocator.
144: For Convex, these are AP, FP, and SP. */
145: #define FIXED_REGISTERS {0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1}
146:
147: /* 1 for registers not available across function calls.
148: These must include the FIXED_REGISTERS and also any
149: registers that can be used without being saved.
150: The latter must include the registers where values are returned
151: and the register where structure-value addresses are passed.
152: Aside from that, you can include as many other registers as you like. */
153: #define CALL_USED_REGISTERS {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}
154:
155: /* Return number of consecutive hard regs needed starting at reg REGNO
156: to hold something of mode MODE.
157: This is ordinarily the length in words of a value of mode MODE
158: but can be less for certain modes in special long registers.
159: On Convex, all values fit in one register. */
160: #define HARD_REGNO_NREGS(REGNO, MODE) 1
161:
162: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
163: On Convex, S registers can hold any type, A registers can any nonfloat */
164: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
165: ((REGNO) < 8 || ((MODE) != SFmode && (MODE) != DFmode && (MODE) != DImode))
166:
167: /* Value is 1 if it is a good idea to tie two pseudo registers
168: when one has mode MODE1 and one has mode MODE2.
169: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
170: for any hard reg, then this must be 0 for correct output. */
171: #define MODES_TIEABLE_P(MODE1, MODE2) \
172: (((MODE1) == SFmode || (MODE1) == DFmode || (MODE1) == DImode) \
173: == ((MODE2) == SFmode || (MODE2) == DFmode || (MODE2) == DImode))
174:
175: /* Specify the registers used for certain standard purposes.
176: The values of these macros are register numbers. */
177:
178: /* Register to use for pushing function arguments. */
179: #define STACK_POINTER_REGNUM 8
180:
181: /* Base register for access to local variables of the function. */
182: #define FRAME_POINTER_REGNUM 15
183:
184: /* Value should be nonzero if functions must have frame pointers.
185: Zero means the frame pointer need not be set up (and parms
186: may be accessed via the stack pointer) in functions that seem suitable.
187: This is computed in `reload', in reload1.c. */
188: #define FRAME_POINTER_REQUIRED 1
189:
190: /* Base register for access to arguments of the function. */
191: #define ARG_POINTER_REGNUM 14
192:
193: /* Register in which static-chain is passed to a function. */
194: #define STATIC_CHAIN_REGNUM 0
195:
196: /* Register in which address to store a structure value
197: is passed to a function. */
198: #define STRUCT_VALUE_REGNUM 9
199:
200: /* Define the classes of registers for register constraints in the
201: machine description. Also define ranges of constants.
202:
203: One of the classes must always be named ALL_REGS and include all hard regs.
204: If there is more than one class, another class must be named NO_REGS
205: and contain no registers.
206:
207: The name GENERAL_REGS must be the name of a class (or an alias for
208: another name such as ALL_REGS). This is the class of registers
209: that is allowed by "g" or "r" in a register constraint.
210: Also, registers outside this class are allocated only when
211: instructions express preferences for them.
212:
213: The classes must be numbered in nondecreasing order; that is,
214: a larger-numbered class must never be contained completely
215: in a smaller-numbered class.
216:
217: For any two classes, it is very desirable that there be another
218: class that represents their union. */
219:
220: /* Convex has classes A (address) and S (scalar). Seems to work
221: better to put S first, here and in the md. */
222:
223: enum reg_class { NO_REGS, S_REGS, A_REGS, ALL_REGS, LIM_REG_CLASSES };
224:
225: #define N_REG_CLASSES (int) LIM_REG_CLASSES
226:
227: /* Since GENERAL_REGS is the same class as ALL_REGS,
228: don't give it a different class number; just make it an alias. */
229:
230: #define GENERAL_REGS ALL_REGS
231:
232: /* Give names of register classes as strings for dump file. */
233:
234: #define REG_CLASS_NAMES \
235: {"NO_REGS", "S_REGS", "A_REGS", "ALL_REGS" }
236:
237: /* Define which registers fit in which classes.
238: This is an initializer for a vector of HARD_REG_SET
239: of length N_REG_CLASSES. */
240:
241: #define REG_CLASS_CONTENTS {0, 0x00ff, 0xff00, 0xffff}
242:
243: /* The same information, inverted:
244: Return the class number of the smallest class containing
245: reg number REGNO. This could be a conditional expression
246: or could index an array. */
247:
248: #define REGNO_REG_CLASS(REGNO) \
249: (S_REGNO_P (REGNO) ? S_REGS : A_REGS)
250:
251: #define S_REGNO_P(REGNO) ((REGNO) < 8)
252: #define A_REGNO_P(REGNO) ((REGNO) >= 8)
253:
254: #define S_REG_P(X) (REG_P (X) && S_REGNO_P (REGNO (X)))
255: #define A_REG_P(X) (REG_P (X) && A_REGNO_P (REGNO (X)))
256:
257: /* The class value for index registers, and the one for base regs. */
258:
259: #define INDEX_REG_CLASS A_REGS
260: #define BASE_REG_CLASS A_REGS
261:
262: /* Get reg_class from a letter such as appears in the machine description. */
263: /* S regs use the letter 'd' because 's' is taken. */
264:
265: #define REG_CLASS_FROM_LETTER(C) \
266: ((C) == 'a' ? A_REGS : (C) == 'd' ? S_REGS : NO_REGS)
267:
268: /* The letters I, J, K, L and M in a register constraint string
269: can be used to stand for particular ranges of immediate operands.
270: This macro defines what the ranges are.
271: C is the letter, and VALUE is a constant value.
272: Return 1 if VALUE is in the range specified by C. */
273:
274: /* Convex uses only I:
275: 32-bit value with sign bit off, usable as immediate in DImode logical
276: instructions and, or, xor */
277:
278: #define CONST_OK_FOR_LETTER_P(VALUE, C) ((VALUE) >= 0)
279:
280: /* Similar, but for floating constants, and defining letters G and H.
281: Here VALUE is the CONST_DOUBLE rtx itself. */
282: /* Convex uses only G:
283: value usable in ld.d (low word 0) or ld.l (high word all sign) */
284:
285: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
286: (LD_D_P (VALUE) || LD_L_P (VALUE))
287:
288: #define LD_D_P(X) (const_double_low_int (X) == 0)
289:
290: #define LD_L_P(X) (const_double_low_int (X) >= 0 \
291: ? const_double_high_int (X) == 0 \
292: : const_double_high_int (X) == -1)
293:
294: extern int const_double_low_int ();
295: extern int const_double_high_int ();
296: extern int const_double_float_int ();
297:
298: /* Given an rtx X being reloaded into a reg required to be
299: in class CLASS, return the class of reg to actually use.
300: In general this is just CLASS; but on some machines
301: in some cases it is preferable to use a more restrictive class. */
302:
303: #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
304:
305: /* Return the maximum number of consecutive registers
306: needed to represent mode MODE in a register of class CLASS. */
307: #define CLASS_MAX_NREGS(CLASS, MODE) 1
308:
309: /* Stack layout; function entry, exit and calling. */
310:
311: /* Define this if pushing a word on the stack
312: makes the stack pointer a smaller address. */
313: #define STACK_GROWS_DOWNWARD
314:
315: /* Define this if the nominal address of the stack frame
316: is at the high-address end of the local variables;
317: that is, each additional local variable allocated
318: goes at a more negative offset in the frame. */
319: #define FRAME_GROWS_DOWNWARD
320:
321: /* Define this if should default to -fcaller-saves. */
322:
323: #define DEFAULT_CALLER_SAVES
324:
325: /* Offset within stack frame to start allocating local variables at.
326: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
327: first local allocated. Otherwise, it is the offset to the BEGINNING
328: of the first local allocated. */
329: #define STARTING_FRAME_OFFSET 0
330:
331: /* If we generate an insn to push BYTES bytes,
332: this says how many the stack pointer really advances by. */
333: #define PUSH_ROUNDING(BYTES) (((BYTES) + 3) & ~3)
334:
335: /* Offset of first parameter from the argument pointer register value. */
336: #define FIRST_PARM_OFFSET(FNDECL) 0
337:
338: /* Value is 1 if returning from a function call automatically
339: pops the arguments described by the number-of-args field in the call.
340: FUNTYPE is the data type of the function (as a tree),
341: or for a library call it is an identifier node for the subroutine name. */
342: /* The standard Convex call, with arg count word, includes popping the
343: args as part of the call template. We optionally omit the arg count
344: word and let gcc combine the arg pops. */
345: #define RETURN_POPS_ARGS(FUNTYPE) TARGET_ARGCOUNT
346:
347: /* Define how to find the value returned by a function.
348: VALTYPE is the data type of the value (as a tree).
349: If the precise function being called is known, FUNC is its FUNCTION_DECL;
350: otherwise, FUNC is 0. */
351:
352: /* On Convex the return value is in S0 regardless. */
353:
354: #define FUNCTION_VALUE(VALTYPE, FUNC) \
355: gen_rtx (REG, TYPE_MODE (VALTYPE), 0)
356:
357: /* Define how to find the value returned by a library function
358: assuming the value has mode MODE. */
359:
360: /* On Convex the return value is in S0 regardless. */
361:
362: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0)
363:
364: /* Define this if PCC uses the nonreentrant convention for returning
365: structure and union values. */
366:
367: #define PCC_STATIC_STRUCT_RETURN
368:
369: /* 1 if N is a possible register number for a function value.
370: On the Convex, S0 is the only register thus used. */
371:
372: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
373:
374: /* 1 if N is a possible register number for function argument passing. */
375:
376: #define FUNCTION_ARG_REGNO_P(N) 0
377:
378: /* Define a data type for recording info about an argument list
379: during the scan of that argument list. This data type should
380: hold all necessary information about the function itself
381: and about the args processed so far, enough to enable macros
382: such as FUNCTION_ARG to determine where the next arg should go.
383:
384: On the vax, this is a single integer, which is a number of bytes
385: of arguments scanned so far. */
386:
387: #define CUMULATIVE_ARGS int
388:
389: /* Initialize a variable CUM of type CUMULATIVE_ARGS
390: for a call to a function whose data type is FNTYPE.
391: For a library call, FNTYPE is 0.
392:
393: On Convex, the offset starts at 0. */
394:
395: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE) \
396: ((CUM) = 0)
397:
398: /* Update the data in CUM to advance over an argument
399: of mode MODE and data type TYPE.
400: (TYPE is null for libcalls where that information may not be available.) */
401:
402: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
403: ((CUM) += ((MODE) != BLKmode \
404: ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
405: : (int_size_in_bytes (TYPE) + 3) & ~3))
406:
407: /* Define where to put the arguments to a function.
408: Value is zero to push the argument on the stack,
409: or a hard register in which to store the argument.
410:
411: MODE is the argument's machine mode.
412: TYPE is the data type of the argument (as a tree).
413: This is null for libcalls where that information may
414: not be available.
415: CUM is a variable of type CUMULATIVE_ARGS which gives info about
416: the preceding args and about the function being called.
417: NAMED is nonzero if this argument is a named parameter
418: (otherwise it is an extra parameter matching an ellipsis). */
419:
420: /* On Convex, all args are pushed. */
421:
422: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
423:
424: /* This macro generates the assembly code for function entry.
425: FILE is a stdio stream to output the code to.
426: SIZE is an int: how many units of temporary storage to allocate.
427: Refer to the array `regs_ever_live' to determine which registers
428: to save; `regs_ever_live[I]' is nonzero if register number I
429: is ever used in the function. This macro is responsible for
430: knowing which registers should not be saved even if used. */
431:
432: #define FUNCTION_PROLOGUE(FILE, SIZE) \
433: { if ((SIZE) != 0) fprintf (FILE, "\tsub.w #%d,sp\n", ((SIZE) + 3) & -4);}
434:
435: /* Output assembler code to FILE to increment profiler label # LABELNO
436: for profiling a function entry. */
437:
438: #define FUNCTION_PROFILER(FILE, LABELNO) \
439: fprintf (FILE, "\tldea LP%d,a1\n\tcallq mcount\n", (LABELNO));
440:
441: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
442: the stack pointer does not matter. The value is tested only in
443: functions that have frame pointers.
444: No definition is equivalent to always zero. */
445:
446: #define EXIT_IGNORE_STACK 1
447:
448: /* This macro generates the assembly code for function exit,
449: on machines that need it. If FUNCTION_EPILOGUE is not defined
450: then individual return instructions are generated for each
451: return statement. Args are same as for FUNCTION_PROLOGUE. */
452:
453: /* #define FUNCTION_EPILOGUE(FILE, SIZE) */
454:
455: /* If the memory address ADDR is relative to the frame pointer,
456: correct it to be relative to the stack pointer instead.
457: This is for when we don't use a frame pointer.
458: ADDR should be a variable name. */
459:
460: #define FIX_FRAME_POINTER_ADDRESS(ADDR,DEPTH) abort ();
461:
462: /* Addressing modes, and classification of registers for them. */
463:
464: /* #define HAVE_POST_INCREMENT */
465: /* #define HAVE_POST_DECREMENT */
466:
467: /* #define HAVE_PRE_DECREMENT */
468: /* #define HAVE_PRE_INCREMENT */
469:
470: /* Macros to check register numbers against specific register classes. */
471:
472: /* These assume that REGNO is a hard or pseudo reg number.
473: They give nonzero only if REGNO is a hard reg of the suitable class
474: or a pseudo reg currently allocated to a suitable hard reg.
475: Since they use reg_renumber, they are safe only once reg_renumber
476: has been allocated, which happens in local-alloc.c. */
477:
478: #define REGNO_OK_FOR_INDEX_P(regno) \
479: ((((regno) ^ 010) < 8 || ((reg_renumber[regno] ^ 010) & -8) == 0) \
480: && regno != 8)
481:
482: #define REGNO_OK_FOR_BASE_P(regno) REGNO_OK_FOR_INDEX_P (regno)
483:
484: /* Maximum number of registers that can appear in a valid memory address. */
485:
486: #define MAX_REGS_PER_ADDRESS 1
487:
488: /* 1 if X is an rtx for a constant that is a valid address. */
489:
490: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
491:
492: /* Nonzero if the constant value X is a legitimate general operand.
493: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
494:
495: /* For convex, any single-word constant is ok; the only contexts
496: allowing general_operand of mode DI or DF are movdi and movdf. */
497:
498: #define LEGITIMATE_CONSTANT_P(X) \
499: (GET_CODE (X) != CONST_DOUBLE ? 1 : (LD_D_P (X) || LD_L_P (X)))
500:
501: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
502: and check its validity for a certain class.
503: We have two alternate definitions for each of them.
504: The usual definition accepts all pseudo regs; the other rejects
505: them unless they have been allocated suitable hard regs.
506: The symbol REG_OK_STRICT causes the latter definition to be used.
507:
508: Most source files want to accept pseudo regs in the hope that
509: they will get allocated to the class that the insn wants them to be in.
510: Source files for reload pass need to be strict.
511: After reload, it makes no difference, since pseudo regs have
512: been eliminated by then. */
513:
514: #ifndef REG_OK_STRICT
515:
516: /* Nonzero if X is a hard reg that can be used as an index
517: or if it is a pseudo reg. */
518: #define REG_OK_FOR_INDEX_P(X) (REGNO (X) > 8)
519: /* Nonzero if X is a hard reg that can be used as a base reg
520: or if it is a pseudo reg. */
521: #define REG_OK_FOR_BASE_P(X) (REGNO (X) > 8)
522:
523: #else
524:
525: /* Nonzero if X is a hard reg that can be used as an index. */
526: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
527: /* Nonzero if X is a hard reg that can be used as a base reg. */
528: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
529:
530: #endif
531:
532: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
533: that is a valid memory address for an instruction.
534: The MODE argument is the machine mode for the MEM expression
535: that wants to use this address.
536:
537: For Convex, valid addresses are
538: indirectable or (MEM indirectable)
539: where indirectable is
540: const, reg, (PLUS reg const) */
541:
542: /* 1 if X is an address that we could indirect through. */
543: #define INDIRECTABLE_ADDRESS_P(X) \
544: (CONSTANT_ADDRESS_P (X) \
545: || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
546: || (GET_CODE (X) == PLUS \
547: && GET_CODE (XEXP (X, 0)) == REG \
548: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
549: && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
550: || (GET_CODE (X) == PLUS \
551: && GET_CODE (XEXP (X, 1)) == REG \
552: && REG_OK_FOR_BASE_P (XEXP (X, 1)) \
553: && CONSTANT_ADDRESS_P (XEXP (X, 0))))
554:
555: /* Go to ADDR if X is a valid address. */
556: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
557: { register rtx xfoob = (X); \
558: if (GET_CODE (xfoob) == REG) goto ADDR; \
559: if (INDIRECTABLE_ADDRESS_P (xfoob)) goto ADDR; \
560: xfoob = XEXP (X, 0); \
561: if (GET_CODE (X) == MEM && INDIRECTABLE_ADDRESS_P (xfoob)) \
562: goto ADDR; \
563: if (GET_CODE (X) == PRE_DEC && REG_P (xfoob) \
564: && REGNO (xfoob) == STACK_POINTER_REGNUM) \
565: goto ADDR; }
566:
567: /* Try machine-dependent ways of modifying an illegitimate address
568: to be legitimate. If we find one, return the new, valid address.
569: This macro is used in only one place: `memory_address' in explow.c.
570:
571: OLDX is the address as it was before break_out_memory_refs was called.
572: In some cases it is useful to look at this to decide what needs to be done.
573:
574: MODE and WIN are passed so that this macro can use
575: GO_IF_LEGITIMATE_ADDRESS.
576:
577: It is always safe for this macro to do nothing. It exists to recognize
578: opportunities to optimize the output.
579:
580: For Convex, nothing needs to be done. */
581:
582: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}
583:
584: /* Go to LABEL if ADDR (a legitimate address expression)
585: has an effect that depends on the machine mode it is used for. */
586:
587: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {}
588:
589: /* Specify the machine mode that this machine uses
590: for the index in the tablejump instruction. */
591: #define CASE_VECTOR_MODE SImode
592:
593: /* Define this if the case instruction expects the table
594: to contain offsets from the address of the table.
595: Do not define this if the table should contain absolute addresses. */
596: /* #define CASE_VECTOR_PC_RELATIVE */
597:
598: /* Define this if the case instruction drops through after the table
599: when the index is out of range. Don't define it if the case insn
600: jumps to the default label instead. */
601: /* #define CASE_DROPS_THROUGH */
602:
603: /* Specify the tree operation to be used to convert reals to integers. */
604: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
605:
606: /* This is the kind of divide that is easiest to do in the general case. */
607: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
608:
609: /* Define this as 1 if `char' should by default be signed; else as 0. */
610: #define DEFAULT_SIGNED_CHAR 1
611:
612: /* This flag, if defined, says the same insns that convert to a signed fixnum
613: also convert validly to an unsigned one. */
614: #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
615:
616: /* Max number of bytes we can move from memory to memory
617: in one reasonably fast instruction. */
618: #define MOVE_MAX 8
619:
620: /* Define this if zero-extension is slow (more than one real instruction). */
621: /* #define SLOW_ZERO_EXTEND */
622:
623: /* Nonzero if access to memory by bytes is slow and undesirable. */
624: #define SLOW_BYTE_ACCESS 0
625:
626: /* Define if shifts truncate the shift count
627: which implies one can omit a sign-extension or zero-extension
628: of a shift count. */
629: #define SHIFT_COUNT_TRUNCATED
630:
631: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
632: is done just by pretending it is already truncated. */
633: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
634:
635: /* On Convex, it is as good to call a constant function address as to
636: call an address kept in a register. */
637: #define NO_FUNCTION_CSE
638:
639: /* When a prototype says `char' or `short', really pass an `int'. */
640: #define PROMOTE_PROTOTYPES
641:
642: /* Specify the machine mode that pointers have.
643: After generation of rtl, the compiler makes no further distinction
644: between pointers and any other objects of this machine mode. */
645: #define Pmode SImode
646:
647: /* A function address in a call instruction
648: is a byte address (for indexing purposes)
649: so give the MEM rtx a byte's mode. */
650: #define FUNCTION_MODE QImode
651:
652: /* Compute the cost of computing a constant rtl expression RTX
653: whose rtx-code is CODE. The body of this macro is a portion
654: of a switch statement. If the code is computed here,
655: return it with a return statement. Otherwise, break from the switch. */
656:
657: #define CONST_COSTS(RTX,CODE) \
658: case CONST: \
659: case LABEL_REF: \
660: case SYMBOL_REF: \
661: case CONST_INT: \
662: return 0; \
663: case CONST_DOUBLE: \
664: return 2;
665:
666: /* Check a `double' value for validity for a particular machine mode. */
667:
668: #define CHECK_FLOAT_VALUE(mode, d) \
669: if ((mode) == SFmode) \
670: { \
671: if ((d) > 1.7014117331926443e+38) \
672: { error ("magnitude of constant too large for `float'"); \
673: (d) = 1.7014117331926443e+38; } \
674: else if ((d) < -1.7014117331926443e+38) \
675: { error ("magnitude of constant too large for `float'"); \
676: (d) = -1.7014117331926443e+38; } \
677: else if (((d) > 0) && ((d) < 2.9387358770557188e-39)) \
678: { warning ("`float' constant truncated to zero"); \
679: (d) = 0.0; } \
680: else if (((d) < 0) && ((d) > -2.9387358770557188e-39)) \
681: { warning ("`float' constant truncated to zero"); \
682: (d) = 0.0; } \
683: }
684:
685: /* Tell final.c how to eliminate redundant test instructions. */
686:
687: /* Here we define machine-dependent flags and fields in cc_status
688: (see `conditions.h'). No extra ones are needed for convex. */
689:
690: /* Store in cc_status the expressions
691: that the condition codes will describe
692: after execution of an instruction whose pattern is EXP.
693: Do not alter them if the instruction would not alter the cc's. */
694:
695: #define NOTICE_UPDATE_CC(EXP,INSN) {CC_STATUS_INIT;}
696:
697: /* Control the assembler format that we output. */
698:
699: /* Output at beginning of assembler file. */
700:
701: #define ASM_FILE_START(FILE) fprintf (FILE, ";NO_APP\n")
702:
703: /* Output to assembler file text saying following lines
704: may contain character constants, extra white space, comments, etc. */
705:
706: #define ASM_APP_ON ";APP\n"
707:
708: /* Output to assembler file text saying following lines
709: no longer contain unusual constructs. */
710:
711: #define ASM_APP_OFF ";NO_APP\n"
712:
713: /* Alignment with Convex's assembler goes like this:
714: .text can be .aligned up to a halfword.
715: .data and .bss can be .aligned up to a longword.
716: .lcomm is not supported, explicit declarations in .bss must be used instead.
717: We get alignment for word and longword .text data by conventionally
718: using .text 2 for word-aligned data and .text 3 for longword-aligned
719: data. This requires that this data's size be a multiple of its alignment,
720: which seems to be always true. */
721:
722: /* Boolean to keep track of whether the current section is .text or not. */
723:
724: int current_section_is_text;
725:
726: /* Output before read-only data. */
727:
728: #define TEXT_SECTION_ASM_OP (current_section_is_text = 1, ".text")
729:
730: /* Output before writable data. */
731:
732: #define DATA_SECTION_ASM_OP (current_section_is_text = 0, ".data")
733:
734: /* Output before uninitialized data. */
735:
736: #define BSS_SECTION_ASM_OP (current_section_is_text = 0, ".bss")
737:
738: #define EXTRA_SECTIONS in_bss
739:
740: #define EXTRA_SECTION_FUNCTIONS \
741: void \
742: bss_section () \
743: { \
744: if (in_section != in_bss) \
745: { \
746: fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \
747: in_section = in_bss; \
748: } \
749: }
750:
751: /* This is how to output an assembler line
752: that says to advance the location counter
753: to a multiple of 2**LOG bytes. */
754:
755: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
756: if (current_section_is_text && (LOG) > 1) \
757: fprintf (FILE, ".text %d\n", LOG); \
758: else if (current_section_is_text) \
759: fprintf (FILE, ".text\n.align %d\n", 1 << (LOG)); \
760: else \
761: fprintf (FILE, ".align %d\n", 1 << (LOG))
762:
763: /* How to refer to registers in assembler output.
764: This sequence is indexed by compiler's hard-register-number (see above). */
765:
766: #define REGISTER_NAMES \
767: {"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
768: "sp", "a1", "a2", "a3", "a4", "a5", "ap", "fp"}
769:
770: /* This is BSD, so it wants DBX format. */
771:
772: #define DBX_DEBUGGING_INFO
773:
774: /* How to renumber registers for dbx and gdb. */
775:
776: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
777:
778: /* Do not break .stabs pseudos into continuations. */
779:
780: #define DBX_CONTIN_LENGTH 0
781:
782: /* This is the char to use for continuation (in case we need to turn
783: continuation back on). */
784:
785: #define DBX_CONTIN_CHAR '?'
786:
787: /* Don't use the `xsfoo;' construct in DBX output; this system
788: doesn't support it. */
789:
790: #define DBX_NO_XREFS
791:
792: /* This is how to output the definition of a user-level label named NAME,
793: such as the label on a static function or variable NAME. */
794:
795: #define ASM_OUTPUT_LABEL(FILE,NAME) \
796: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
797:
798: /* This is how to output a command to make the user-level label named NAME
799: defined for reference from other files. */
800:
801: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
802: do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
803:
804: /* This is how to output a reference to a user-level label named NAME. */
805:
806: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
807: fprintf (FILE, "_%s", NAME)
808:
809: /* This is how to output an internal numbered label where
810: PREFIX is the class of label and NUM is the number within the class. */
811:
812: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
813: fprintf (FILE, "%s%d:\n", PREFIX, NUM)
814:
815: /* Put case tables in .text 2, where they will be word-aligned */
816:
817: #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \
818: ASM_OUTPUT_ALIGN (FILE, 2); \
819: ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM)
820:
821: #define ASM_OUTPUT_CASE_END(FILE,NUM,TABLE) \
822: ASM_OUTPUT_ALIGN (FILE, 1)
823:
824: /* This is how to store into the string LABEL
825: the symbol_ref name of an internal numbered label where
826: PREFIX is the class of label and NUM is the number within the class.
827: This is suitable for output with `assemble_name'. */
828:
829: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
830: sprintf (LABEL, "*%s%d", PREFIX, NUM)
831:
832: /* This is how to output an assembler line defining a `double' constant. */
833:
834: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
835: fprintf (FILE, "\tds.d %.17#g\n", (VALUE))
836:
837: /* This is how to output an assembler line defining a `float' constant. */
838:
839: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
840: fprintf (FILE, "\tds.s %.9#g\n", (VALUE))
841:
842: /* This is how to output an assembler line defining an `int' constant. */
843:
844: #define ASM_OUTPUT_INT(FILE,VALUE) \
845: ( fprintf (FILE, "\tds.w "), \
846: output_addr_const (FILE, (VALUE)), \
847: fprintf (FILE, "\n"))
848:
849: /* Likewise for `char' and `short' constants. */
850:
851: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
852: ( fprintf (FILE, "\tds.h "), \
853: output_addr_const (FILE, (VALUE)), \
854: fprintf (FILE, "\n"))
855:
856: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
857: ( fprintf (FILE, "\tds.b "), \
858: output_addr_const (FILE, (VALUE)), \
859: fprintf (FILE, "\n"))
860:
861: /* This is how to output an assembler line for a numeric constant byte. */
862:
863: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
864: fprintf (FILE, "\tds.b %#x\n", (VALUE))
865:
866: /* This is how to output a string */
867:
868: #define ASM_OUTPUT_ASCII(FILE,STR,SIZE) do { \
869: int i; \
870: fprintf (FILE, "\tds.b \""); \
871: for (i = 0; i < (SIZE); i++) { \
872: register int c = (STR)[i] & 0377; \
873: if (c >= ' ' && c < 0177 && c != '\\' && c != '"') \
874: putc (c, FILE); \
875: else \
876: fprintf (FILE, "\\%03o", c);} \
877: fprintf (FILE, "\"\n");} while (0)
878:
879: /* This is how to output an insn to push a register on the stack.
880: It need not be very fast code. */
881:
882: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
883: fprintf (FILE, "\tpsh.%c %s\n", \
884: S_REGNO_P (REGNO) ? 'l' : 'w', \
885: reg_names[REGNO])
886:
887: /* This is how to output an insn to pop a register from the stack.
888: It need not be very fast code. */
889:
890: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
891: fprintf (FILE, "\tpop.%c %s\n", \
892: S_REGNO_P (REGNO) ? 'l' : 'w', \
893: reg_names[REGNO])
894:
895: /* This is how to output an element of a case-vector that is absolute. */
896:
897: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
898: fprintf (FILE, "\tds.w L%d\n", VALUE)
899:
900: /* This is how to output an element of a case-vector that is relative.
901: (not used on Convex) */
902:
903: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
904: fprintf (FILE, "\tds.w L%d-L%d\n", VALUE, REL)
905:
906: /* This is how to output an assembler line
907: that says to advance the location counter by SIZE bytes. */
908:
909: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
910: fprintf (FILE, "\tds.b %d(0)\n", (SIZE))
911:
912: /* This says how to output an assembler line
913: to define a global common symbol. */
914:
915: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
916: ( fputs (".comm ", (FILE)), \
917: assemble_name ((FILE), (NAME)), \
918: fprintf ((FILE), ",%d\n", (ROUNDED)))
919:
920: /* This says how to output an assembler line
921: to define a local common symbol. */
922:
923: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
924: ( bss_section (), \
925: assemble_name ((FILE), (NAME)), \
926: fprintf ((FILE), ":\tbs.b %d\n", (ROUNDED)))
927:
928: /* Store in OUTPUT a string (made with alloca) containing
929: an assembler-name for a local static variable named NAME.
930: LABELNO is an integer which is different for each call. */
931:
932: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
933: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
934: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
935:
936: /* Define the parentheses used to group arithmetic operations
937: in assembler code. */
938:
939: #define ASM_OPEN_PAREN "("
940: #define ASM_CLOSE_PAREN ")"
941:
942: /* Define results of standard character escape sequences. */
943: #define TARGET_BELL 007
944: #define TARGET_BS 010
945: #define TARGET_TAB 011
946: #define TARGET_NEWLINE 012
947: #define TARGET_VT 013
948: #define TARGET_FF 014
949: #define TARGET_CR 015
950:
951: /* Print an instruction operand X on file FILE.
952: CODE is the code from the %-spec that requested printing this operand;
953: if `%z3' was used to print operand 3, then CODE is 'z'. */
954:
955: #define PRINT_OPERAND(FILE, X, CODE) \
956: { if (GET_CODE (X) == REG) \
957: fprintf (FILE, "%s", reg_names[REGNO (X)]); \
958: else if (GET_CODE (X) == MEM) \
959: output_address (XEXP (X, 0)); \
960: else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != DImode) \
961: { union { double d; int i[2]; } u; \
962: u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X); \
963: fprintf (FILE, "#%.9#g", u.d); } \
964: else { putc ('#', FILE); output_addr_const (FILE, X); }}
965:
966: /* Print a memory operand whose address is X, on file FILE. */
967:
968: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
969: { \
970: register rtx addr = ADDR; \
971: register rtx index = 0; \
972: register rtx offset = 0; \
973: \
974: if (GET_CODE (addr) == MEM) \
975: { \
976: fprintf (FILE, "@"); \
977: addr = XEXP (addr, 0); \
978: } \
979: \
980: switch (GET_CODE (addr)) \
981: { \
982: case REG: \
983: index = addr; \
984: break; \
985: \
986: case PLUS: \
987: index = XEXP (addr, 0); \
988: if (REG_P (index)) \
989: offset = XEXP (addr, 1); \
990: else \
991: { \
992: offset = XEXP (addr, 0); \
993: index = XEXP (addr, 1); \
994: if (! REG_P (index)) abort (); \
995: } \
996: break; \
997: \
998: default: \
999: offset = addr; \
1000: break; \
1001: } \
1002: \
1003: if (offset) \
1004: output_addr_const (FILE, offset); \
1005: \
1006: if (index) \
1007: fprintf (FILE, "(%s)", reg_names[REGNO (index)]); \
1008: }
1009:
1010:
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