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1.1 root 1: /* Definitions of target machine for GNU compiler. Convex version.
2: Copyright (C) 1989 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
6: GNU CC is free software; you can redistribute it and/or modify
7: it under the terms of the GNU General Public License as published by
8: the Free Software Foundation; either version 1, or (at your option)
9: any later version.
10:
11: GNU CC is distributed in the hope that it will be useful,
12: but WITHOUT ANY WARRANTY; without even the implied warranty of
13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14: GNU General Public License for more details.
15:
16: You should have received a copy of the GNU General Public License
17: along with GNU CC; see the file COPYING. If not, write to
18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19:
20:
21: /* Names to predefine in the preprocessor for this target machine. */
22:
23: #define CPP_PREDEFINES "-Dconvex -Dparsec -Dunix"
24:
25: /* Print subsidiary information on the compiler version in use. */
26:
27: #define TARGET_VERSION fprintf (stderr, " (convex)");
28:
29: /* Run-time compilation parameters selecting different hardware subsets. */
30:
31: extern int target_flags;
32:
33: /* Macros used in the machine description to test the flags. */
34:
35: /*
36: -mc1 avoid C2-only instructions; default on C1 host
37: -mc2 use C2-only instructions; default on C2 host
38: -margcount use standard calling sequence, with arg count word
39: -mnoargcount don't push arg count (it's in the symbol table) (usually)
40: */
41:
42: #define TARGET_C1 (target_flags & 1)
43: #define TARGET_C2 (target_flags & 2)
44: #define TARGET_ARGCOUNT (target_flags & 4)
45:
46: /* Macro to define tables used to set the flags.
47: This is a list in braces of pairs in braces,
48: each pair being { "NAME", VALUE }
49: where VALUE is the bits to set or minus the bits to clear.
50: An empty string NAME is used to identify the default VALUE. */
51:
52: #define TARGET_SWITCHES \
53: { { "c1", 1 }, \
54: { "c2", 2 }, \
55: { "noc1", -1 }, \
56: { "noc2", -2 }, \
57: { "argcount", 4 }, \
58: { "noargcount", -4 }, \
59: { "", TARGET_DEFAULT }}
60:
61: /* Default target_flags if no switches specified. */
62:
63: #ifndef TARGET_DEFAULT
64: #define TARGET_DEFAULT 0
65: #endif
66:
67: /* Pick a target if none was specified */
68:
69: #define OVERRIDE_OPTIONS override_options ();
70:
71: /* Allow $ in identifiers */
72:
73: #define DOLLARS_IN_IDENTIFIERS 1
1.1.1.2 ! root 74:
! 75: /* Definitions for g++. */
! 76:
! 77: /* Do not put out GNU stabs for constructors and destructors.
! 78: ld does not like them. */
! 79:
! 80: #define FASCIST_ASSEMBLER
! 81:
! 82: /* Convex has negative addresses, so use positive numbers
! 83: to mean `vtable index'. */
! 84:
! 85: #define VTABLE_USES_MASK
! 86: #define VINDEX_MAX ((unsigned) 0x80000000)
1.1 root 87:
88: /* Target machine storage layout */
89:
90: /* Define this if most significant bit is lowest numbered
91: in instructions that operate on numbered bit-fields. */
92: #define BITS_BIG_ENDIAN
93:
94: /* Define this if most significant byte of a word is the lowest numbered. */
95: #define BYTES_BIG_ENDIAN
96:
97: /* Define this if most significant word of a multiword number is numbered. */
98: /* Lie, so that gcc will take the low part of double reg N in reg N. */
99: /* #define WORDS_BIG_ENDIAN */
100:
101: /* Number of bits in an addressible storage unit */
102: #define BITS_PER_UNIT 8
103:
104: /* Width in bits of a "word", which is the contents of a machine register.
105: Note that this is not necessarily the width of data type `int';
106: if using 16-bit ints on a 68000, this would still be 32.
107: But on a machine with 16-bit registers, this would be 16. */
108: #define BITS_PER_WORD 32
109:
110: /* Width of a word, in units (bytes). */
111: #define UNITS_PER_WORD 4
112:
113: /* Width in bits of a pointer.
114: See also the macro `Pmode' defined below. */
115: #define POINTER_SIZE 32
116:
117: /* Allocation boundary (in *bits*) for storing pointers in memory. */
118: #define POINTER_BOUNDARY 32
119:
120: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
121: #define PARM_BOUNDARY 32
122:
123: /* Boundary (in *bits*) on which stack pointer should be aligned. */
124: #define STACK_BOUNDARY 32
125:
126: /* Allocation boundary (in *bits*) for the code of a function. */
127: #define FUNCTION_BOUNDARY 16
128:
129: /* Alignment of field after `int : 0' in a structure. */
130: #define EMPTY_FIELD_BOUNDARY 32
131:
132: /* Every structure's size must be a multiple of this. */
133: #define STRUCTURE_SIZE_BOUNDARY 8
134:
135: /* A bitfield declared as `int' forces `int' alignment for the struct. */
136: #define PCC_BITFIELD_TYPE_MATTERS
137:
138: /* No data type wants to be aligned rounder than this. */
139: /* beware of doubles in structs -- 64 is incompatible with pcc */
140: #define BIGGEST_ALIGNMENT 32
141:
142: /* Define this if move instructions will actually fail to work
143: when given unaligned data. */
144: /* #define STRICT_ALIGNMENT */
145:
146: /* Standard register usage. */
147:
148: /* Number of actual hardware registers.
149: The hardware registers are assigned numbers for the compiler
150: from 0 to just below FIRST_PSEUDO_REGISTER.
151: All registers that the compiler knows about must be given numbers,
152: even those that are not normally considered general registers. */
153: #define FIRST_PSEUDO_REGISTER 16
154:
155: /* 1 for registers that have pervasive standard uses
156: and are not available for the register allocator.
157: For Convex, these are AP, FP, and SP. */
158: #define FIXED_REGISTERS {0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1}
159:
160: /* 1 for registers not available across function calls.
161: These must include the FIXED_REGISTERS and also any
162: registers that can be used without being saved.
163: The latter must include the registers where values are returned
164: and the register where structure-value addresses are passed.
165: Aside from that, you can include as many other registers as you like. */
166: #define CALL_USED_REGISTERS {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}
167:
168: /* Return number of consecutive hard regs needed starting at reg REGNO
169: to hold something of mode MODE.
170: This is ordinarily the length in words of a value of mode MODE
171: but can be less for certain modes in special long registers.
172: On Convex, all values fit in one register. */
173: #define HARD_REGNO_NREGS(REGNO, MODE) 1
174:
175: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
176: On Convex, S registers can hold any type, A registers can any nonfloat */
177: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
178: ((REGNO) < 8 || ((MODE) != SFmode && (MODE) != DFmode && (MODE) != DImode))
179:
180: /* Value is 1 if it is a good idea to tie two pseudo registers
181: when one has mode MODE1 and one has mode MODE2.
182: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
183: for any hard reg, then this must be 0 for correct output. */
184: #define MODES_TIEABLE_P(MODE1, MODE2) \
185: (((MODE1) == SFmode || (MODE1) == DFmode || (MODE1) == DImode) \
186: == ((MODE2) == SFmode || (MODE2) == DFmode || (MODE2) == DImode))
187:
188: /* Specify the registers used for certain standard purposes.
189: The values of these macros are register numbers. */
190:
191: /* Register to use for pushing function arguments. */
192: #define STACK_POINTER_REGNUM 8
193:
194: /* Base register for access to local variables of the function. */
195: #define FRAME_POINTER_REGNUM 15
196:
197: /* Value should be nonzero if functions must have frame pointers.
198: Zero means the frame pointer need not be set up (and parms
199: may be accessed via the stack pointer) in functions that seem suitable.
200: This is computed in `reload', in reload1.c. */
201: #define FRAME_POINTER_REQUIRED 1
202:
203: /* Base register for access to arguments of the function. */
204: #define ARG_POINTER_REGNUM 14
205:
206: /* Register in which static-chain is passed to a function. */
207: #define STATIC_CHAIN_REGNUM 0
208:
209: /* Register in which address to store a structure value
210: is passed to a function. */
211: #define STRUCT_VALUE_REGNUM 9
212:
213: /* Define the classes of registers for register constraints in the
214: machine description. Also define ranges of constants.
215:
216: One of the classes must always be named ALL_REGS and include all hard regs.
217: If there is more than one class, another class must be named NO_REGS
218: and contain no registers.
219:
220: The name GENERAL_REGS must be the name of a class (or an alias for
221: another name such as ALL_REGS). This is the class of registers
222: that is allowed by "g" or "r" in a register constraint.
223: Also, registers outside this class are allocated only when
224: instructions express preferences for them.
225:
226: The classes must be numbered in nondecreasing order; that is,
227: a larger-numbered class must never be contained completely
228: in a smaller-numbered class.
229:
230: For any two classes, it is very desirable that there be another
231: class that represents their union. */
232:
233: /* Convex has classes A (address) and S (scalar). Seems to work
234: better to put S first, here and in the md. */
235:
236: enum reg_class { NO_REGS, S_REGS, A_REGS, ALL_REGS, LIM_REG_CLASSES };
237:
238: #define N_REG_CLASSES (int) LIM_REG_CLASSES
239:
240: /* Since GENERAL_REGS is the same class as ALL_REGS,
241: don't give it a different class number; just make it an alias. */
242:
243: #define GENERAL_REGS ALL_REGS
244:
245: /* Give names of register classes as strings for dump file. */
246:
247: #define REG_CLASS_NAMES \
248: {"NO_REGS", "S_REGS", "A_REGS", "ALL_REGS" }
249:
250: /* Define which registers fit in which classes.
251: This is an initializer for a vector of HARD_REG_SET
252: of length N_REG_CLASSES. */
253:
254: #define REG_CLASS_CONTENTS {0, 0x00ff, 0xff00, 0xffff}
255:
256: /* The same information, inverted:
257: Return the class number of the smallest class containing
258: reg number REGNO. This could be a conditional expression
259: or could index an array. */
260:
261: #define REGNO_REG_CLASS(REGNO) \
262: (S_REGNO_P (REGNO) ? S_REGS : A_REGS)
263:
264: #define S_REGNO_P(REGNO) ((REGNO) < 8)
265: #define A_REGNO_P(REGNO) ((REGNO) >= 8)
266:
267: #define S_REG_P(X) (REG_P (X) && S_REGNO_P (REGNO (X)))
268: #define A_REG_P(X) (REG_P (X) && A_REGNO_P (REGNO (X)))
269:
270: /* The class value for index registers, and the one for base regs. */
271:
272: #define INDEX_REG_CLASS A_REGS
273: #define BASE_REG_CLASS A_REGS
274:
275: /* Get reg_class from a letter such as appears in the machine description. */
276: /* S regs use the letter 'd' because 's' is taken. */
277:
278: #define REG_CLASS_FROM_LETTER(C) \
279: ((C) == 'a' ? A_REGS : (C) == 'd' ? S_REGS : NO_REGS)
280:
281: /* The letters I, J, K, L and M in a register constraint string
282: can be used to stand for particular ranges of immediate operands.
283: This macro defines what the ranges are.
284: C is the letter, and VALUE is a constant value.
285: Return 1 if VALUE is in the range specified by C. */
286:
287: /* Convex uses only I:
288: 32-bit value with sign bit off, usable as immediate in DImode logical
289: instructions and, or, xor */
290:
291: #define CONST_OK_FOR_LETTER_P(VALUE, C) ((VALUE) >= 0)
292:
293: /* Similar, but for floating constants, and defining letters G and H.
294: Here VALUE is the CONST_DOUBLE rtx itself. */
295: /* Convex uses only G:
296: value usable in ld.d (low word 0) or ld.l (high word all sign) */
297:
298: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
299: (LD_D_P (VALUE) || LD_L_P (VALUE))
300:
301: #define LD_D_P(X) (const_double_low_int (X) == 0)
302:
303: #define LD_L_P(X) (const_double_low_int (X) >= 0 \
304: ? const_double_high_int (X) == 0 \
305: : const_double_high_int (X) == -1)
306:
307: extern int const_double_low_int ();
308: extern int const_double_high_int ();
309: extern int const_double_float_int ();
310:
311: /* Given an rtx X being reloaded into a reg required to be
312: in class CLASS, return the class of reg to actually use.
313: In general this is just CLASS; but on some machines
314: in some cases it is preferable to use a more restrictive class. */
315:
316: #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
317:
318: /* Return the maximum number of consecutive registers
319: needed to represent mode MODE in a register of class CLASS. */
320: #define CLASS_MAX_NREGS(CLASS, MODE) 1
321:
322: /* Stack layout; function entry, exit and calling. */
323:
324: /* Define this if pushing a word on the stack
325: makes the stack pointer a smaller address. */
326: #define STACK_GROWS_DOWNWARD
327:
328: /* Define this if the nominal address of the stack frame
329: is at the high-address end of the local variables;
330: that is, each additional local variable allocated
331: goes at a more negative offset in the frame. */
332: #define FRAME_GROWS_DOWNWARD
333:
334: /* Define this if should default to -fcaller-saves. */
335:
336: #define DEFAULT_CALLER_SAVES
337:
338: /* Offset within stack frame to start allocating local variables at.
339: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
340: first local allocated. Otherwise, it is the offset to the BEGINNING
341: of the first local allocated. */
342: #define STARTING_FRAME_OFFSET 0
343:
344: /* If we generate an insn to push BYTES bytes,
345: this says how many the stack pointer really advances by. */
346: #define PUSH_ROUNDING(BYTES) (((BYTES) + 3) & ~3)
347:
348: /* Offset of first parameter from the argument pointer register value. */
349: #define FIRST_PARM_OFFSET(FNDECL) 0
350:
351: /* Value is 1 if returning from a function call automatically
352: pops the arguments described by the number-of-args field in the call.
353: FUNTYPE is the data type of the function (as a tree),
354: or for a library call it is an identifier node for the subroutine name. */
355: /* The standard Convex call, with arg count word, includes popping the
356: args as part of the call template. We optionally omit the arg count
357: word and let gcc combine the arg pops. */
358: #define RETURN_POPS_ARGS(FUNTYPE) TARGET_ARGCOUNT
359:
360: /* Define how to find the value returned by a function.
361: VALTYPE is the data type of the value (as a tree).
362: If the precise function being called is known, FUNC is its FUNCTION_DECL;
363: otherwise, FUNC is 0. */
364:
365: /* On Convex the return value is in S0 regardless. */
366:
367: #define FUNCTION_VALUE(VALTYPE, FUNC) \
368: gen_rtx (REG, TYPE_MODE (VALTYPE), 0)
369:
370: /* Define how to find the value returned by a library function
371: assuming the value has mode MODE. */
372:
373: /* On Convex the return value is in S0 regardless. */
374:
375: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0)
376:
377: /* Define this if PCC uses the nonreentrant convention for returning
378: structure and union values. */
379:
380: #define PCC_STATIC_STRUCT_RETURN
381:
382: /* 1 if N is a possible register number for a function value.
383: On the Convex, S0 is the only register thus used. */
384:
385: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
386:
387: /* 1 if N is a possible register number for function argument passing. */
388:
389: #define FUNCTION_ARG_REGNO_P(N) 0
390:
391: /* Define a data type for recording info about an argument list
392: during the scan of that argument list. This data type should
393: hold all necessary information about the function itself
394: and about the args processed so far, enough to enable macros
395: such as FUNCTION_ARG to determine where the next arg should go.
396:
397: On the vax, this is a single integer, which is a number of bytes
398: of arguments scanned so far. */
399:
400: #define CUMULATIVE_ARGS int
401:
402: /* Initialize a variable CUM of type CUMULATIVE_ARGS
403: for a call to a function whose data type is FNTYPE.
404: For a library call, FNTYPE is 0.
405:
406: On Convex, the offset starts at 0. */
407:
408: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE) \
409: ((CUM) = 0)
410:
411: /* Update the data in CUM to advance over an argument
412: of mode MODE and data type TYPE.
413: (TYPE is null for libcalls where that information may not be available.) */
414:
415: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
416: ((CUM) += ((MODE) != BLKmode \
417: ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
418: : (int_size_in_bytes (TYPE) + 3) & ~3))
419:
420: /* Define where to put the arguments to a function.
421: Value is zero to push the argument on the stack,
422: or a hard register in which to store the argument.
423:
424: MODE is the argument's machine mode.
425: TYPE is the data type of the argument (as a tree).
426: This is null for libcalls where that information may
427: not be available.
428: CUM is a variable of type CUMULATIVE_ARGS which gives info about
429: the preceding args and about the function being called.
430: NAMED is nonzero if this argument is a named parameter
431: (otherwise it is an extra parameter matching an ellipsis). */
432:
433: /* On Convex, all args are pushed. */
434:
435: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
436:
437: /* This macro generates the assembly code for function entry.
438: FILE is a stdio stream to output the code to.
439: SIZE is an int: how many units of temporary storage to allocate.
440: Refer to the array `regs_ever_live' to determine which registers
441: to save; `regs_ever_live[I]' is nonzero if register number I
442: is ever used in the function. This macro is responsible for
443: knowing which registers should not be saved even if used. */
444:
445: #define FUNCTION_PROLOGUE(FILE, SIZE) \
446: { if ((SIZE) != 0) fprintf (FILE, "\tsub.w #%d,sp\n", ((SIZE) + 3) & -4);}
447:
448: /* Output assembler code to FILE to increment profiler label # LABELNO
449: for profiling a function entry. */
450:
451: #define FUNCTION_PROFILER(FILE, LABELNO) \
452: fprintf (FILE, "\tldea LP%d,a1\n\tcallq mcount\n", (LABELNO));
453:
454: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
455: the stack pointer does not matter. The value is tested only in
456: functions that have frame pointers.
457: No definition is equivalent to always zero. */
458:
459: #define EXIT_IGNORE_STACK 1
460:
461: /* This macro generates the assembly code for function exit,
462: on machines that need it. If FUNCTION_EPILOGUE is not defined
463: then individual return instructions are generated for each
464: return statement. Args are same as for FUNCTION_PROLOGUE. */
465:
466: /* #define FUNCTION_EPILOGUE(FILE, SIZE) */
467:
468: /* If the memory address ADDR is relative to the frame pointer,
469: correct it to be relative to the stack pointer instead.
470: This is for when we don't use a frame pointer.
471: ADDR should be a variable name. */
472:
473: #define FIX_FRAME_POINTER_ADDRESS(ADDR,DEPTH) abort ();
474:
475: /* Addressing modes, and classification of registers for them. */
476:
477: /* #define HAVE_POST_INCREMENT */
478: /* #define HAVE_POST_DECREMENT */
479:
480: /* #define HAVE_PRE_DECREMENT */
481: /* #define HAVE_PRE_INCREMENT */
482:
483: /* Macros to check register numbers against specific register classes. */
484:
485: /* These assume that REGNO is a hard or pseudo reg number.
486: They give nonzero only if REGNO is a hard reg of the suitable class
487: or a pseudo reg currently allocated to a suitable hard reg.
488: Since they use reg_renumber, they are safe only once reg_renumber
489: has been allocated, which happens in local-alloc.c. */
490:
491: #define REGNO_OK_FOR_INDEX_P(regno) \
492: ((((regno) ^ 010) < 8 || ((reg_renumber[regno] ^ 010) & -8) == 0) \
493: && regno != 8)
494:
495: #define REGNO_OK_FOR_BASE_P(regno) REGNO_OK_FOR_INDEX_P (regno)
496:
497: /* Maximum number of registers that can appear in a valid memory address. */
498:
499: #define MAX_REGS_PER_ADDRESS 1
500:
501: /* 1 if X is an rtx for a constant that is a valid address. */
502:
503: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
504:
505: /* Nonzero if the constant value X is a legitimate general operand.
506: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
507:
508: /* For convex, any single-word constant is ok; the only contexts
509: allowing general_operand of mode DI or DF are movdi and movdf. */
510:
511: #define LEGITIMATE_CONSTANT_P(X) \
512: (GET_CODE (X) != CONST_DOUBLE ? 1 : (LD_D_P (X) || LD_L_P (X)))
513:
514: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
515: and check its validity for a certain class.
516: We have two alternate definitions for each of them.
517: The usual definition accepts all pseudo regs; the other rejects
518: them unless they have been allocated suitable hard regs.
519: The symbol REG_OK_STRICT causes the latter definition to be used.
520:
521: Most source files want to accept pseudo regs in the hope that
522: they will get allocated to the class that the insn wants them to be in.
523: Source files for reload pass need to be strict.
524: After reload, it makes no difference, since pseudo regs have
525: been eliminated by then. */
526:
527: #ifndef REG_OK_STRICT
528:
529: /* Nonzero if X is a hard reg that can be used as an index
530: or if it is a pseudo reg. */
531: #define REG_OK_FOR_INDEX_P(X) (REGNO (X) > 8)
532: /* Nonzero if X is a hard reg that can be used as a base reg
533: or if it is a pseudo reg. */
534: #define REG_OK_FOR_BASE_P(X) (REGNO (X) > 8)
535:
536: #else
537:
538: /* Nonzero if X is a hard reg that can be used as an index. */
539: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
540: /* Nonzero if X is a hard reg that can be used as a base reg. */
541: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
542:
543: #endif
544:
545: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
546: that is a valid memory address for an instruction.
547: The MODE argument is the machine mode for the MEM expression
548: that wants to use this address.
549:
550: For Convex, valid addresses are
551: indirectable or (MEM indirectable)
552: where indirectable is
553: const, reg, (PLUS reg const) */
554:
555: /* 1 if X is an address that we could indirect through. */
556: #define INDIRECTABLE_ADDRESS_P(X) \
557: (CONSTANT_ADDRESS_P (X) \
558: || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
559: || (GET_CODE (X) == PLUS \
560: && GET_CODE (XEXP (X, 0)) == REG \
561: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
562: && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
563: || (GET_CODE (X) == PLUS \
564: && GET_CODE (XEXP (X, 1)) == REG \
565: && REG_OK_FOR_BASE_P (XEXP (X, 1)) \
566: && CONSTANT_ADDRESS_P (XEXP (X, 0))))
567:
568: /* Go to ADDR if X is a valid address. */
569: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
570: { register rtx xfoob = (X); \
571: if (GET_CODE (xfoob) == REG) goto ADDR; \
572: if (INDIRECTABLE_ADDRESS_P (xfoob)) goto ADDR; \
573: xfoob = XEXP (X, 0); \
574: if (GET_CODE (X) == MEM && INDIRECTABLE_ADDRESS_P (xfoob)) \
575: goto ADDR; \
576: if (GET_CODE (X) == PRE_DEC && REG_P (xfoob) \
577: && REGNO (xfoob) == STACK_POINTER_REGNUM) \
578: goto ADDR; }
579:
580: /* Try machine-dependent ways of modifying an illegitimate address
581: to be legitimate. If we find one, return the new, valid address.
582: This macro is used in only one place: `memory_address' in explow.c.
583:
584: OLDX is the address as it was before break_out_memory_refs was called.
585: In some cases it is useful to look at this to decide what needs to be done.
586:
587: MODE and WIN are passed so that this macro can use
588: GO_IF_LEGITIMATE_ADDRESS.
589:
590: It is always safe for this macro to do nothing. It exists to recognize
591: opportunities to optimize the output.
592:
593: For Convex, nothing needs to be done. */
594:
595: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}
596:
597: /* Go to LABEL if ADDR (a legitimate address expression)
598: has an effect that depends on the machine mode it is used for. */
599:
600: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {}
601:
602: /* Specify the machine mode that this machine uses
603: for the index in the tablejump instruction. */
604: #define CASE_VECTOR_MODE SImode
605:
606: /* Define this if the case instruction expects the table
607: to contain offsets from the address of the table.
608: Do not define this if the table should contain absolute addresses. */
609: /* #define CASE_VECTOR_PC_RELATIVE */
610:
611: /* Define this if the case instruction drops through after the table
612: when the index is out of range. Don't define it if the case insn
613: jumps to the default label instead. */
614: /* #define CASE_DROPS_THROUGH */
615:
616: /* Specify the tree operation to be used to convert reals to integers. */
617: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
618:
619: /* This is the kind of divide that is easiest to do in the general case. */
620: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
621:
622: /* Define this as 1 if `char' should by default be signed; else as 0. */
623: #define DEFAULT_SIGNED_CHAR 1
624:
625: /* This flag, if defined, says the same insns that convert to a signed fixnum
626: also convert validly to an unsigned one. */
627: #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
628:
629: /* Max number of bytes we can move from memory to memory
630: in one reasonably fast instruction. */
631: #define MOVE_MAX 8
632:
633: /* Define this if zero-extension is slow (more than one real instruction). */
634: /* #define SLOW_ZERO_EXTEND */
635:
636: /* Nonzero if access to memory by bytes is slow and undesirable. */
637: #define SLOW_BYTE_ACCESS 0
638:
639: /* Define if shifts truncate the shift count
640: which implies one can omit a sign-extension or zero-extension
641: of a shift count. */
642: #define SHIFT_COUNT_TRUNCATED
643:
644: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
645: is done just by pretending it is already truncated. */
646: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
647:
648: /* On Convex, it is as good to call a constant function address as to
649: call an address kept in a register. */
650: #define NO_FUNCTION_CSE
651:
652: /* When a prototype says `char' or `short', really pass an `int'. */
653: #define PROMOTE_PROTOTYPES
654:
655: /* Specify the machine mode that pointers have.
656: After generation of rtl, the compiler makes no further distinction
657: between pointers and any other objects of this machine mode. */
658: #define Pmode SImode
659:
660: /* A function address in a call instruction
661: is a byte address (for indexing purposes)
662: so give the MEM rtx a byte's mode. */
663: #define FUNCTION_MODE QImode
664:
665: /* Compute the cost of computing a constant rtl expression RTX
666: whose rtx-code is CODE. The body of this macro is a portion
667: of a switch statement. If the code is computed here,
668: return it with a return statement. Otherwise, break from the switch. */
669:
670: #define CONST_COSTS(RTX,CODE) \
671: case CONST: \
672: case LABEL_REF: \
673: case SYMBOL_REF: \
674: case CONST_INT: \
675: return 0; \
676: case CONST_DOUBLE: \
677: return 2;
678:
679: /* Check a `double' value for validity for a particular machine mode. */
680:
681: #define CHECK_FLOAT_VALUE(mode, d) \
682: if ((mode) == SFmode) \
683: { \
684: if ((d) > 1.7014117331926443e+38) \
685: { error ("magnitude of constant too large for `float'"); \
686: (d) = 1.7014117331926443e+38; } \
687: else if ((d) < -1.7014117331926443e+38) \
688: { error ("magnitude of constant too large for `float'"); \
689: (d) = -1.7014117331926443e+38; } \
690: else if (((d) > 0) && ((d) < 2.9387358770557188e-39)) \
691: { warning ("`float' constant truncated to zero"); \
692: (d) = 0.0; } \
693: else if (((d) < 0) && ((d) > -2.9387358770557188e-39)) \
694: { warning ("`float' constant truncated to zero"); \
695: (d) = 0.0; } \
696: }
697:
698: /* Tell final.c how to eliminate redundant test instructions. */
699:
700: /* Here we define machine-dependent flags and fields in cc_status
701: (see `conditions.h'). No extra ones are needed for convex. */
702:
703: /* Store in cc_status the expressions
704: that the condition codes will describe
705: after execution of an instruction whose pattern is EXP.
706: Do not alter them if the instruction would not alter the cc's. */
707:
708: #define NOTICE_UPDATE_CC(EXP,INSN) {CC_STATUS_INIT;}
709:
710: /* Control the assembler format that we output. */
711:
712: /* Output at beginning of assembler file. */
713:
714: #define ASM_FILE_START(FILE) fprintf (FILE, ";NO_APP\n")
715:
716: /* Output to assembler file text saying following lines
717: may contain character constants, extra white space, comments, etc. */
718:
719: #define ASM_APP_ON ";APP\n"
720:
721: /* Output to assembler file text saying following lines
722: no longer contain unusual constructs. */
723:
724: #define ASM_APP_OFF ";NO_APP\n"
725:
726: /* Alignment with Convex's assembler goes like this:
727: .text can be .aligned up to a halfword.
728: .data and .bss can be .aligned up to a longword.
729: .lcomm is not supported, explicit declarations in .bss must be used instead.
730: We get alignment for word and longword .text data by conventionally
731: using .text 2 for word-aligned data and .text 3 for longword-aligned
732: data. This requires that this data's size be a multiple of its alignment,
733: which seems to be always true. */
734:
735: /* Boolean to keep track of whether the current section is .text or not. */
736:
737: int current_section_is_text;
738:
739: /* Output before read-only data. */
740:
741: #define TEXT_SECTION_ASM_OP (current_section_is_text = 1, ".text")
742:
743: /* Output before writable data. */
744:
745: #define DATA_SECTION_ASM_OP (current_section_is_text = 0, ".data")
746:
747: /* Output before uninitialized data. */
748:
749: #define BSS_SECTION_ASM_OP (current_section_is_text = 0, ".bss")
750:
751: #define EXTRA_SECTIONS in_bss
752:
753: #define EXTRA_SECTION_FUNCTIONS \
754: void \
755: bss_section () \
756: { \
757: if (in_section != in_bss) \
758: { \
759: fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \
760: in_section = in_bss; \
761: } \
762: }
763:
764: /* This is how to output an assembler line
765: that says to advance the location counter
766: to a multiple of 2**LOG bytes. */
767:
768: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
769: if (current_section_is_text && (LOG) > 1) \
770: fprintf (FILE, ".text %d\n", LOG); \
771: else if (current_section_is_text) \
772: fprintf (FILE, ".text\n.align %d\n", 1 << (LOG)); \
773: else \
774: fprintf (FILE, ".align %d\n", 1 << (LOG))
775:
776: /* How to refer to registers in assembler output.
777: This sequence is indexed by compiler's hard-register-number (see above). */
778:
779: #define REGISTER_NAMES \
780: {"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
781: "sp", "a1", "a2", "a3", "a4", "a5", "ap", "fp"}
782:
783: /* This is BSD, so it wants DBX format. */
784:
785: #define DBX_DEBUGGING_INFO
786:
787: /* How to renumber registers for dbx and gdb. */
788:
789: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
790:
791: /* Do not break .stabs pseudos into continuations. */
792:
793: #define DBX_CONTIN_LENGTH 0
794:
795: /* This is the char to use for continuation (in case we need to turn
796: continuation back on). */
797:
798: #define DBX_CONTIN_CHAR '?'
799:
800: /* Don't use the `xsfoo;' construct in DBX output; this system
801: doesn't support it. */
802:
803: #define DBX_NO_XREFS
804:
805: /* This is how to output the definition of a user-level label named NAME,
806: such as the label on a static function or variable NAME. */
807:
808: #define ASM_OUTPUT_LABEL(FILE,NAME) \
809: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
810:
811: /* This is how to output a command to make the user-level label named NAME
812: defined for reference from other files. */
813:
814: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
815: do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
816:
817: /* This is how to output a reference to a user-level label named NAME. */
818:
819: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
820: fprintf (FILE, "_%s", NAME)
821:
822: /* This is how to output an internal numbered label where
823: PREFIX is the class of label and NUM is the number within the class. */
824:
825: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
826: fprintf (FILE, "%s%d:\n", PREFIX, NUM)
827:
828: /* Put case tables in .text 2, where they will be word-aligned */
829:
830: #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \
831: ASM_OUTPUT_ALIGN (FILE, 2); \
832: ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM)
833:
834: #define ASM_OUTPUT_CASE_END(FILE,NUM,TABLE) \
835: ASM_OUTPUT_ALIGN (FILE, 1)
836:
837: /* This is how to store into the string LABEL
838: the symbol_ref name of an internal numbered label where
839: PREFIX is the class of label and NUM is the number within the class.
840: This is suitable for output with `assemble_name'. */
841:
842: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
843: sprintf (LABEL, "*%s%d", PREFIX, NUM)
844:
845: /* This is how to output an assembler line defining a `double' constant. */
846:
847: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
848: fprintf (FILE, "\tds.d %.17#g\n", (VALUE))
849:
850: /* This is how to output an assembler line defining a `float' constant. */
851:
852: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
853: fprintf (FILE, "\tds.s %.9#g\n", (VALUE))
854:
855: /* This is how to output an assembler line defining an `int' constant. */
856:
857: #define ASM_OUTPUT_INT(FILE,VALUE) \
858: ( fprintf (FILE, "\tds.w "), \
859: output_addr_const (FILE, (VALUE)), \
860: fprintf (FILE, "\n"))
861:
862: /* Likewise for `char' and `short' constants. */
863:
864: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
865: ( fprintf (FILE, "\tds.h "), \
866: output_addr_const (FILE, (VALUE)), \
867: fprintf (FILE, "\n"))
868:
869: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
870: ( fprintf (FILE, "\tds.b "), \
871: output_addr_const (FILE, (VALUE)), \
872: fprintf (FILE, "\n"))
873:
874: /* This is how to output an assembler line for a numeric constant byte. */
875:
876: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
877: fprintf (FILE, "\tds.b %#x\n", (VALUE))
878:
879: /* This is how to output a string */
880:
881: #define ASM_OUTPUT_ASCII(FILE,STR,SIZE) do { \
882: int i; \
883: fprintf (FILE, "\tds.b \""); \
884: for (i = 0; i < (SIZE); i++) { \
885: register int c = (STR)[i] & 0377; \
886: if (c >= ' ' && c < 0177 && c != '\\' && c != '"') \
887: putc (c, FILE); \
888: else \
889: fprintf (FILE, "\\%03o", c);} \
890: fprintf (FILE, "\"\n");} while (0)
891:
892: /* This is how to output an insn to push a register on the stack.
893: It need not be very fast code. */
894:
895: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
896: fprintf (FILE, "\tpsh.%c %s\n", \
897: S_REGNO_P (REGNO) ? 'l' : 'w', \
898: reg_names[REGNO])
899:
900: /* This is how to output an insn to pop a register from the stack.
901: It need not be very fast code. */
902:
903: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
904: fprintf (FILE, "\tpop.%c %s\n", \
905: S_REGNO_P (REGNO) ? 'l' : 'w', \
906: reg_names[REGNO])
907:
908: /* This is how to output an element of a case-vector that is absolute. */
909:
910: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
911: fprintf (FILE, "\tds.w L%d\n", VALUE)
912:
913: /* This is how to output an element of a case-vector that is relative.
914: (not used on Convex) */
915:
916: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
917: fprintf (FILE, "\tds.w L%d-L%d\n", VALUE, REL)
918:
919: /* This is how to output an assembler line
920: that says to advance the location counter by SIZE bytes. */
921:
922: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
923: fprintf (FILE, "\tds.b %d(0)\n", (SIZE))
924:
925: /* This says how to output an assembler line
926: to define a global common symbol. */
927:
928: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
929: ( fputs (".comm ", (FILE)), \
930: assemble_name ((FILE), (NAME)), \
931: fprintf ((FILE), ",%d\n", (ROUNDED)))
932:
933: /* This says how to output an assembler line
934: to define a local common symbol. */
935:
936: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
937: ( bss_section (), \
938: assemble_name ((FILE), (NAME)), \
939: fprintf ((FILE), ":\tbs.b %d\n", (ROUNDED)))
940:
941: /* Store in OUTPUT a string (made with alloca) containing
942: an assembler-name for a local static variable named NAME.
943: LABELNO is an integer which is different for each call. */
944:
945: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
946: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
947: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
948:
949: /* Define the parentheses used to group arithmetic operations
950: in assembler code. */
951:
952: #define ASM_OPEN_PAREN "("
953: #define ASM_CLOSE_PAREN ")"
954:
955: /* Define results of standard character escape sequences. */
956: #define TARGET_BELL 007
957: #define TARGET_BS 010
958: #define TARGET_TAB 011
959: #define TARGET_NEWLINE 012
960: #define TARGET_VT 013
961: #define TARGET_FF 014
962: #define TARGET_CR 015
963:
964: /* Print an instruction operand X on file FILE.
965: CODE is the code from the %-spec that requested printing this operand;
966: if `%z3' was used to print operand 3, then CODE is 'z'. */
967:
968: #define PRINT_OPERAND(FILE, X, CODE) \
969: { if (GET_CODE (X) == REG) \
970: fprintf (FILE, "%s", reg_names[REGNO (X)]); \
971: else if (GET_CODE (X) == MEM) \
972: output_address (XEXP (X, 0)); \
973: else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != DImode) \
974: { union { double d; int i[2]; } u; \
975: u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X); \
976: fprintf (FILE, "#%.9#g", u.d); } \
977: else { putc ('#', FILE); output_addr_const (FILE, X); }}
978:
979: /* Print a memory operand whose address is X, on file FILE. */
980:
981: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
982: { \
983: register rtx addr = ADDR; \
984: register rtx index = 0; \
985: register rtx offset = 0; \
986: \
987: if (GET_CODE (addr) == MEM) \
988: { \
989: fprintf (FILE, "@"); \
990: addr = XEXP (addr, 0); \
991: } \
992: \
993: switch (GET_CODE (addr)) \
994: { \
995: case REG: \
996: index = addr; \
997: break; \
998: \
999: case PLUS: \
1000: index = XEXP (addr, 0); \
1001: if (REG_P (index)) \
1002: offset = XEXP (addr, 1); \
1003: else \
1004: { \
1005: offset = XEXP (addr, 0); \
1006: index = XEXP (addr, 1); \
1007: if (! REG_P (index)) abort (); \
1008: } \
1009: break; \
1010: \
1011: default: \
1012: offset = addr; \
1013: break; \
1014: } \
1015: \
1016: if (offset) \
1017: output_addr_const (FILE, offset); \
1018: \
1019: if (index) \
1020: fprintf (FILE, "(%s)", reg_names[REGNO (index)]); \
1021: }
1022:
1023:
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