![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to tm-convex.h CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [GCC 1.x] / gcc / config|
Return to tm-convex.h CVS log | Up to [GCC 1.x] / gcc / config |
1.1 root 1: /* Definitions of target machine for GNU compiler. Convex version. 1.1.1.3 ! root 2: Copyright (C) 1989, 1990 Free Software Foundation, Inc. 1.1 root 3: 4: This file is part of GNU CC. 5: 6: GNU CC is free software; you can redistribute it and/or modify 7: it under the terms of the GNU General Public License as published by 8: the Free Software Foundation; either version 1, or (at your option) 9: any later version. 10: 11: GNU CC is distributed in the hope that it will be useful, 12: but WITHOUT ANY WARRANTY; without even the implied warranty of 13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14: GNU General Public License for more details. 15: 16: You should have received a copy of the GNU General Public License 17: along with GNU CC; see the file COPYING. If not, write to 18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ 19: 20: 1.1.1.3 ! root 21: /* Use the proper incantation to search Posix-compliant libraries. */ ! 22: ! 23: #define LINK_SPEC \ ! 24: "%{!traditional:-Eposix}%{traditional:-Enoposix}\ ! 25: -A__iob=___ap$iob\ ! 26: -A_use_libc_sema=___ap$use_libc_sema\ ! 27: -L /usr/lib" ! 28: ! 29: /* Use the matching startup files. */ ! 30: ! 31: #define STARTFILE_SPEC \ ! 32: "%{pg:/usr/lib/crt/gcrt0.o}\ ! 33: %{!pg:%{p:/usr/lib/crt/mcrt0.o}\ ! 34: %{!p:/usr/lib/crt/crt0.o}}" ! 35: 1.1 root 36: /* Names to predefine in the preprocessor for this target machine. */ 37: 1.1.1.3 ! root 38: #define CPP_PREDEFINES "-Dconvex -Dunix" 1.1 root 39: 40: /* Print subsidiary information on the compiler version in use. */ 41: 42: #define TARGET_VERSION fprintf (stderr, " (convex)"); 43: 44: /* Run-time compilation parameters selecting different hardware subsets. */ 45: 46: extern int target_flags; 47: 48: /* Macros used in the machine description to test the flags. */ 49: 50: /* 51: -mc1 avoid C2-only instructions; default on C1 host 52: -mc2 use C2-only instructions; default on C2 host 53: -margcount use standard calling sequence, with arg count word 54: -mnoargcount don't push arg count (it's in the symbol table) (usually) 55: */ 56: 57: #define TARGET_C1 (target_flags & 1) 58: #define TARGET_C2 (target_flags & 2) 59: #define TARGET_ARGCOUNT (target_flags & 4) 60: 61: /* Macro to define tables used to set the flags. 62: This is a list in braces of pairs in braces, 63: each pair being { "NAME", VALUE } 64: where VALUE is the bits to set or minus the bits to clear. 65: An empty string NAME is used to identify the default VALUE. */ 66: 67: #define TARGET_SWITCHES \ 68: { { "c1", 1 }, \ 69: { "c2", 2 }, \ 70: { "noc1", -1 }, \ 71: { "noc2", -2 }, \ 72: { "argcount", 4 }, \ 73: { "noargcount", -4 }, \ 74: { "", TARGET_DEFAULT }} 75: 76: /* Default target_flags if no switches specified. */ 77: 78: #ifndef TARGET_DEFAULT 79: #define TARGET_DEFAULT 0 80: #endif 81: 82: /* Allow $ in identifiers */ 83: 84: #define DOLLARS_IN_IDENTIFIERS 1 1.1.1.2 root 85: 86: /* Definitions for g++. */ 87: 88: /* Do not put out GNU stabs for constructors and destructors. 89: ld does not like them. */ 90: 91: #define FASCIST_ASSEMBLER 92: 93: /* Convex has negative addresses, so use positive numbers 94: to mean `vtable index'. */ 95: 96: #define VTABLE_USES_MASK 97: #define VINDEX_MAX ((unsigned) 0x80000000) 1.1 root 98: 99: /* Target machine storage layout */ 100: 101: /* Define this if most significant bit is lowest numbered 102: in instructions that operate on numbered bit-fields. */ 103: #define BITS_BIG_ENDIAN 104: 105: /* Define this if most significant byte of a word is the lowest numbered. */ 106: #define BYTES_BIG_ENDIAN 107: 108: /* Define this if most significant word of a multiword number is numbered. */ 109: /* Lie, so that gcc will take the low part of double reg N in reg N. */ 110: /* #define WORDS_BIG_ENDIAN */ 111: 112: /* Number of bits in an addressible storage unit */ 113: #define BITS_PER_UNIT 8 114: 115: /* Width in bits of a "word", which is the contents of a machine register. 116: Note that this is not necessarily the width of data type `int'; 117: if using 16-bit ints on a 68000, this would still be 32. 118: But on a machine with 16-bit registers, this would be 16. */ 119: #define BITS_PER_WORD 32 120: 121: /* Width of a word, in units (bytes). */ 122: #define UNITS_PER_WORD 4 123: 124: /* Width in bits of a pointer. 125: See also the macro `Pmode' defined below. */ 126: #define POINTER_SIZE 32 127: 128: /* Allocation boundary (in *bits*) for storing pointers in memory. */ 129: #define POINTER_BOUNDARY 32 130: 131: /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 132: #define PARM_BOUNDARY 32 133: 134: /* Boundary (in *bits*) on which stack pointer should be aligned. */ 135: #define STACK_BOUNDARY 32 136: 137: /* Allocation boundary (in *bits*) for the code of a function. */ 138: #define FUNCTION_BOUNDARY 16 139: 140: /* Alignment of field after `int : 0' in a structure. */ 141: #define EMPTY_FIELD_BOUNDARY 32 142: 143: /* Every structure's size must be a multiple of this. */ 144: #define STRUCTURE_SIZE_BOUNDARY 8 145: 146: /* A bitfield declared as `int' forces `int' alignment for the struct. */ 1.1.1.3 ! root 147: #define PCC_BITFIELD_TYPE_MATTERS 1 1.1 root 148: 149: /* No data type wants to be aligned rounder than this. */ 150: /* beware of doubles in structs -- 64 is incompatible with pcc */ 151: #define BIGGEST_ALIGNMENT 32 152: 153: /* Define this if move instructions will actually fail to work 154: when given unaligned data. */ 155: /* #define STRICT_ALIGNMENT */ 156: 157: /* Standard register usage. */ 158: 159: /* Number of actual hardware registers. 160: The hardware registers are assigned numbers for the compiler 161: from 0 to just below FIRST_PSEUDO_REGISTER. 162: All registers that the compiler knows about must be given numbers, 163: even those that are not normally considered general registers. */ 164: #define FIRST_PSEUDO_REGISTER 16 165: 166: /* 1 for registers that have pervasive standard uses 167: and are not available for the register allocator. 168: For Convex, these are AP, FP, and SP. */ 169: #define FIXED_REGISTERS {0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1} 170: 171: /* 1 for registers not available across function calls. 172: These must include the FIXED_REGISTERS and also any 173: registers that can be used without being saved. 174: The latter must include the registers where values are returned 175: and the register where structure-value addresses are passed. 176: Aside from that, you can include as many other registers as you like. */ 177: #define CALL_USED_REGISTERS {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1} 178: 179: /* Return number of consecutive hard regs needed starting at reg REGNO 180: to hold something of mode MODE. 181: This is ordinarily the length in words of a value of mode MODE 182: but can be less for certain modes in special long registers. 183: On Convex, all values fit in one register. */ 184: #define HARD_REGNO_NREGS(REGNO, MODE) 1 185: 186: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. 187: On Convex, S registers can hold any type, A registers can any nonfloat */ 188: #define HARD_REGNO_MODE_OK(REGNO, MODE) \ 189: ((REGNO) < 8 || ((MODE) != SFmode && (MODE) != DFmode && (MODE) != DImode)) 190: 191: /* Value is 1 if it is a good idea to tie two pseudo registers 192: when one has mode MODE1 and one has mode MODE2. 193: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 194: for any hard reg, then this must be 0 for correct output. */ 195: #define MODES_TIEABLE_P(MODE1, MODE2) \ 196: (((MODE1) == SFmode || (MODE1) == DFmode || (MODE1) == DImode) \ 197: == ((MODE2) == SFmode || (MODE2) == DFmode || (MODE2) == DImode)) 198: 199: /* Specify the registers used for certain standard purposes. 200: The values of these macros are register numbers. */ 201: 202: /* Register to use for pushing function arguments. */ 203: #define STACK_POINTER_REGNUM 8 204: 205: /* Base register for access to local variables of the function. */ 206: #define FRAME_POINTER_REGNUM 15 207: 208: /* Value should be nonzero if functions must have frame pointers. 209: Zero means the frame pointer need not be set up (and parms 210: may be accessed via the stack pointer) in functions that seem suitable. 211: This is computed in `reload', in reload1.c. */ 212: #define FRAME_POINTER_REQUIRED 1 213: 214: /* Base register for access to arguments of the function. */ 215: #define ARG_POINTER_REGNUM 14 216: 217: /* Register in which static-chain is passed to a function. */ 218: #define STATIC_CHAIN_REGNUM 0 219: 220: /* Register in which address to store a structure value 221: is passed to a function. */ 222: #define STRUCT_VALUE_REGNUM 9 223: 224: /* Define the classes of registers for register constraints in the 225: machine description. Also define ranges of constants. 226: 227: One of the classes must always be named ALL_REGS and include all hard regs. 228: If there is more than one class, another class must be named NO_REGS 229: and contain no registers. 230: 231: The name GENERAL_REGS must be the name of a class (or an alias for 232: another name such as ALL_REGS). This is the class of registers 233: that is allowed by "g" or "r" in a register constraint. 234: Also, registers outside this class are allocated only when 235: instructions express preferences for them. 236: 237: The classes must be numbered in nondecreasing order; that is, 238: a larger-numbered class must never be contained completely 239: in a smaller-numbered class. 240: 241: For any two classes, it is very desirable that there be another 242: class that represents their union. */ 243: 244: /* Convex has classes A (address) and S (scalar). Seems to work 245: better to put S first, here and in the md. */ 246: 247: enum reg_class { NO_REGS, S_REGS, A_REGS, ALL_REGS, LIM_REG_CLASSES }; 248: 249: #define N_REG_CLASSES (int) LIM_REG_CLASSES 250: 251: /* Since GENERAL_REGS is the same class as ALL_REGS, 252: don't give it a different class number; just make it an alias. */ 253: 254: #define GENERAL_REGS ALL_REGS 255: 256: /* Give names of register classes as strings for dump file. */ 257: 258: #define REG_CLASS_NAMES \ 259: {"NO_REGS", "S_REGS", "A_REGS", "ALL_REGS" } 260: 261: /* Define which registers fit in which classes. 262: This is an initializer for a vector of HARD_REG_SET 263: of length N_REG_CLASSES. */ 264: 265: #define REG_CLASS_CONTENTS {0, 0x00ff, 0xff00, 0xffff} 266: 267: /* The same information, inverted: 268: Return the class number of the smallest class containing 269: reg number REGNO. This could be a conditional expression 270: or could index an array. */ 271: 272: #define REGNO_REG_CLASS(REGNO) \ 273: (S_REGNO_P (REGNO) ? S_REGS : A_REGS) 274: 275: #define S_REGNO_P(REGNO) ((REGNO) < 8) 276: #define A_REGNO_P(REGNO) ((REGNO) >= 8) 277: 278: #define S_REG_P(X) (REG_P (X) && S_REGNO_P (REGNO (X))) 279: #define A_REG_P(X) (REG_P (X) && A_REGNO_P (REGNO (X))) 280: 281: /* The class value for index registers, and the one for base regs. */ 282: 283: #define INDEX_REG_CLASS A_REGS 284: #define BASE_REG_CLASS A_REGS 285: 286: /* Get reg_class from a letter such as appears in the machine description. */ 287: /* S regs use the letter 'd' because 's' is taken. */ 288: 289: #define REG_CLASS_FROM_LETTER(C) \ 290: ((C) == 'a' ? A_REGS : (C) == 'd' ? S_REGS : NO_REGS) 291: 292: /* The letters I, J, K, L and M in a register constraint string 293: can be used to stand for particular ranges of immediate operands. 294: This macro defines what the ranges are. 295: C is the letter, and VALUE is a constant value. 296: Return 1 if VALUE is in the range specified by C. */ 297: 298: /* Convex uses only I: 299: 32-bit value with sign bit off, usable as immediate in DImode logical 300: instructions and, or, xor */ 301: 302: #define CONST_OK_FOR_LETTER_P(VALUE, C) ((VALUE) >= 0) 303: 304: /* Similar, but for floating constants, and defining letters G and H. 305: Here VALUE is the CONST_DOUBLE rtx itself. */ 306: /* Convex uses only G: 307: value usable in ld.d (low word 0) or ld.l (high word all sign) */ 308: 309: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 310: (LD_D_P (VALUE) || LD_L_P (VALUE)) 311: 312: #define LD_D_P(X) (const_double_low_int (X) == 0) 313: 314: #define LD_L_P(X) (const_double_low_int (X) >= 0 \ 315: ? const_double_high_int (X) == 0 \ 316: : const_double_high_int (X) == -1) 317: 318: extern int const_double_low_int (); 319: extern int const_double_high_int (); 320: extern int const_double_float_int (); 321: 322: /* Given an rtx X being reloaded into a reg required to be 323: in class CLASS, return the class of reg to actually use. 324: In general this is just CLASS; but on some machines 325: in some cases it is preferable to use a more restrictive class. */ 326: 327: #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS) 328: 329: /* Return the maximum number of consecutive registers 330: needed to represent mode MODE in a register of class CLASS. */ 331: #define CLASS_MAX_NREGS(CLASS, MODE) 1 332: 333: /* Stack layout; function entry, exit and calling. */ 334: 335: /* Define this if pushing a word on the stack 336: makes the stack pointer a smaller address. */ 337: #define STACK_GROWS_DOWNWARD 338: 339: /* Define this if the nominal address of the stack frame 340: is at the high-address end of the local variables; 341: that is, each additional local variable allocated 342: goes at a more negative offset in the frame. */ 343: #define FRAME_GROWS_DOWNWARD 344: 345: /* Define this if should default to -fcaller-saves. */ 346: 347: #define DEFAULT_CALLER_SAVES 348: 349: /* Offset within stack frame to start allocating local variables at. 350: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 351: first local allocated. Otherwise, it is the offset to the BEGINNING 352: of the first local allocated. */ 353: #define STARTING_FRAME_OFFSET 0 354: 355: /* If we generate an insn to push BYTES bytes, 356: this says how many the stack pointer really advances by. */ 357: #define PUSH_ROUNDING(BYTES) (((BYTES) + 3) & ~3) 358: 359: /* Offset of first parameter from the argument pointer register value. */ 360: #define FIRST_PARM_OFFSET(FNDECL) 0 361: 362: /* Value is 1 if returning from a function call automatically 363: pops the arguments described by the number-of-args field in the call. 364: FUNTYPE is the data type of the function (as a tree), 365: or for a library call it is an identifier node for the subroutine name. */ 366: /* The standard Convex call, with arg count word, includes popping the 367: args as part of the call template. We optionally omit the arg count 368: word and let gcc combine the arg pops. */ 369: #define RETURN_POPS_ARGS(FUNTYPE) TARGET_ARGCOUNT 370: 371: /* Define how to find the value returned by a function. 372: VALTYPE is the data type of the value (as a tree). 373: If the precise function being called is known, FUNC is its FUNCTION_DECL; 374: otherwise, FUNC is 0. */ 375: 376: /* On Convex the return value is in S0 regardless. */ 377: 378: #define FUNCTION_VALUE(VALTYPE, FUNC) \ 379: gen_rtx (REG, TYPE_MODE (VALTYPE), 0) 380: 381: /* Define how to find the value returned by a library function 382: assuming the value has mode MODE. */ 383: 384: /* On Convex the return value is in S0 regardless. */ 385: 386: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0) 387: 388: /* Define this if PCC uses the nonreentrant convention for returning 389: structure and union values. */ 390: 391: #define PCC_STATIC_STRUCT_RETURN 392: 393: /* 1 if N is a possible register number for a function value. 394: On the Convex, S0 is the only register thus used. */ 395: 396: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0) 397: 398: /* 1 if N is a possible register number for function argument passing. */ 399: 400: #define FUNCTION_ARG_REGNO_P(N) 0 401: 402: /* Define a data type for recording info about an argument list 403: during the scan of that argument list. This data type should 404: hold all necessary information about the function itself 405: and about the args processed so far, enough to enable macros 406: such as FUNCTION_ARG to determine where the next arg should go. 407: 408: On the vax, this is a single integer, which is a number of bytes 409: of arguments scanned so far. */ 410: 411: #define CUMULATIVE_ARGS int 412: 413: /* Initialize a variable CUM of type CUMULATIVE_ARGS 414: for a call to a function whose data type is FNTYPE. 415: For a library call, FNTYPE is 0. 416: 417: On Convex, the offset starts at 0. */ 418: 419: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE) \ 420: ((CUM) = 0) 421: 422: /* Update the data in CUM to advance over an argument 423: of mode MODE and data type TYPE. 424: (TYPE is null for libcalls where that information may not be available.) */ 425: 426: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 427: ((CUM) += ((MODE) != BLKmode \ 428: ? (GET_MODE_SIZE (MODE) + 3) & ~3 \ 429: : (int_size_in_bytes (TYPE) + 3) & ~3)) 430: 431: /* Define where to put the arguments to a function. 432: Value is zero to push the argument on the stack, 433: or a hard register in which to store the argument. 434: 435: MODE is the argument's machine mode. 436: TYPE is the data type of the argument (as a tree). 437: This is null for libcalls where that information may 438: not be available. 439: CUM is a variable of type CUMULATIVE_ARGS which gives info about 440: the preceding args and about the function being called. 441: NAMED is nonzero if this argument is a named parameter 442: (otherwise it is an extra parameter matching an ellipsis). */ 443: 444: /* On Convex, all args are pushed. */ 445: 446: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0 447: 448: /* This macro generates the assembly code for function entry. 449: FILE is a stdio stream to output the code to. 450: SIZE is an int: how many units of temporary storage to allocate. 451: Refer to the array `regs_ever_live' to determine which registers 452: to save; `regs_ever_live[I]' is nonzero if register number I 453: is ever used in the function. This macro is responsible for 454: knowing which registers should not be saved even if used. */ 455: 456: #define FUNCTION_PROLOGUE(FILE, SIZE) \ 457: { if ((SIZE) != 0) fprintf (FILE, "\tsub.w #%d,sp\n", ((SIZE) + 3) & -4);} 458: 459: /* Output assembler code to FILE to increment profiler label # LABELNO 460: for profiling a function entry. */ 461: 462: #define FUNCTION_PROFILER(FILE, LABELNO) \ 463: fprintf (FILE, "\tldea LP%d,a1\n\tcallq mcount\n", (LABELNO)); 464: 465: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 466: the stack pointer does not matter. The value is tested only in 467: functions that have frame pointers. 468: No definition is equivalent to always zero. */ 469: 470: #define EXIT_IGNORE_STACK 1 471: 472: /* This macro generates the assembly code for function exit, 473: on machines that need it. If FUNCTION_EPILOGUE is not defined 474: then individual return instructions are generated for each 475: return statement. Args are same as for FUNCTION_PROLOGUE. */ 476: 477: /* #define FUNCTION_EPILOGUE(FILE, SIZE) */ 478: 479: /* If the memory address ADDR is relative to the frame pointer, 480: correct it to be relative to the stack pointer instead. 481: This is for when we don't use a frame pointer. 482: ADDR should be a variable name. */ 483: 484: #define FIX_FRAME_POINTER_ADDRESS(ADDR,DEPTH) abort (); 485: 486: /* Addressing modes, and classification of registers for them. */ 487: 488: /* #define HAVE_POST_INCREMENT */ 489: /* #define HAVE_POST_DECREMENT */ 490: 491: /* #define HAVE_PRE_DECREMENT */ 492: /* #define HAVE_PRE_INCREMENT */ 493: 494: /* Macros to check register numbers against specific register classes. */ 495: 496: /* These assume that REGNO is a hard or pseudo reg number. 497: They give nonzero only if REGNO is a hard reg of the suitable class 498: or a pseudo reg currently allocated to a suitable hard reg. 499: Since they use reg_renumber, they are safe only once reg_renumber 500: has been allocated, which happens in local-alloc.c. */ 501: 502: #define REGNO_OK_FOR_INDEX_P(regno) \ 503: ((((regno) ^ 010) < 8 || ((reg_renumber[regno] ^ 010) & -8) == 0) \ 504: && regno != 8) 505: 506: #define REGNO_OK_FOR_BASE_P(regno) REGNO_OK_FOR_INDEX_P (regno) 507: 508: /* Maximum number of registers that can appear in a valid memory address. */ 509: 510: #define MAX_REGS_PER_ADDRESS 1 511: 512: /* 1 if X is an rtx for a constant that is a valid address. */ 513: 514: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X) 515: 516: /* Nonzero if the constant value X is a legitimate general operand. 517: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 518: 519: /* For convex, any single-word constant is ok; the only contexts 520: allowing general_operand of mode DI or DF are movdi and movdf. */ 521: 522: #define LEGITIMATE_CONSTANT_P(X) \ 523: (GET_CODE (X) != CONST_DOUBLE ? 1 : (LD_D_P (X) || LD_L_P (X))) 524: 525: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 526: and check its validity for a certain class. 527: We have two alternate definitions for each of them. 528: The usual definition accepts all pseudo regs; the other rejects 529: them unless they have been allocated suitable hard regs. 530: The symbol REG_OK_STRICT causes the latter definition to be used. 531: 532: Most source files want to accept pseudo regs in the hope that 533: they will get allocated to the class that the insn wants them to be in. 534: Source files for reload pass need to be strict. 535: After reload, it makes no difference, since pseudo regs have 536: been eliminated by then. */ 537: 538: #ifndef REG_OK_STRICT 539: 540: /* Nonzero if X is a hard reg that can be used as an index 541: or if it is a pseudo reg. */ 542: #define REG_OK_FOR_INDEX_P(X) (REGNO (X) > 8) 543: /* Nonzero if X is a hard reg that can be used as a base reg 544: or if it is a pseudo reg. */ 545: #define REG_OK_FOR_BASE_P(X) (REGNO (X) > 8) 546: 547: #else 548: 549: /* Nonzero if X is a hard reg that can be used as an index. */ 550: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 551: /* Nonzero if X is a hard reg that can be used as a base reg. */ 552: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 553: 554: #endif 555: 556: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 557: that is a valid memory address for an instruction. 558: The MODE argument is the machine mode for the MEM expression 559: that wants to use this address. 560: 561: For Convex, valid addresses are 562: indirectable or (MEM indirectable) 563: where indirectable is 564: const, reg, (PLUS reg const) */ 565: 566: /* 1 if X is an address that we could indirect through. */ 567: #define INDIRECTABLE_ADDRESS_P(X) \ 568: (CONSTANT_ADDRESS_P (X) \ 569: || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \ 570: || (GET_CODE (X) == PLUS \ 571: && GET_CODE (XEXP (X, 0)) == REG \ 572: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ 573: && CONSTANT_ADDRESS_P (XEXP (X, 1))) \ 574: || (GET_CODE (X) == PLUS \ 575: && GET_CODE (XEXP (X, 1)) == REG \ 576: && REG_OK_FOR_BASE_P (XEXP (X, 1)) \ 577: && CONSTANT_ADDRESS_P (XEXP (X, 0)))) 578: 579: /* Go to ADDR if X is a valid address. */ 580: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 581: { register rtx xfoob = (X); \ 582: if (GET_CODE (xfoob) == REG) goto ADDR; \ 583: if (INDIRECTABLE_ADDRESS_P (xfoob)) goto ADDR; \ 584: xfoob = XEXP (X, 0); \ 585: if (GET_CODE (X) == MEM && INDIRECTABLE_ADDRESS_P (xfoob)) \ 586: goto ADDR; \ 587: if (GET_CODE (X) == PRE_DEC && REG_P (xfoob) \ 588: && REGNO (xfoob) == STACK_POINTER_REGNUM) \ 589: goto ADDR; } 590: 591: /* Try machine-dependent ways of modifying an illegitimate address 592: to be legitimate. If we find one, return the new, valid address. 593: This macro is used in only one place: `memory_address' in explow.c. 594: 595: OLDX is the address as it was before break_out_memory_refs was called. 596: In some cases it is useful to look at this to decide what needs to be done. 597: 598: MODE and WIN are passed so that this macro can use 599: GO_IF_LEGITIMATE_ADDRESS. 600: 601: It is always safe for this macro to do nothing. It exists to recognize 602: opportunities to optimize the output. 603: 604: For Convex, nothing needs to be done. */ 605: 606: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {} 607: 608: /* Go to LABEL if ADDR (a legitimate address expression) 609: has an effect that depends on the machine mode it is used for. */ 610: 611: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {} 612: 613: /* Specify the machine mode that this machine uses 614: for the index in the tablejump instruction. */ 615: #define CASE_VECTOR_MODE SImode 616: 617: /* Define this if the case instruction expects the table 618: to contain offsets from the address of the table. 619: Do not define this if the table should contain absolute addresses. */ 620: /* #define CASE_VECTOR_PC_RELATIVE */ 621: 622: /* Define this if the case instruction drops through after the table 623: when the index is out of range. Don't define it if the case insn 624: jumps to the default label instead. */ 625: /* #define CASE_DROPS_THROUGH */ 626: 627: /* Specify the tree operation to be used to convert reals to integers. */ 628: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR 629: 630: /* This is the kind of divide that is easiest to do in the general case. */ 631: #define EASY_DIV_EXPR TRUNC_DIV_EXPR 632: 633: /* Define this as 1 if `char' should by default be signed; else as 0. */ 634: #define DEFAULT_SIGNED_CHAR 1 635: 636: /* This flag, if defined, says the same insns that convert to a signed fixnum 637: also convert validly to an unsigned one. */ 638: #define FIXUNS_TRUNC_LIKE_FIX_TRUNC 639: 640: /* Max number of bytes we can move from memory to memory 641: in one reasonably fast instruction. */ 642: #define MOVE_MAX 8 643: 644: /* Define this if zero-extension is slow (more than one real instruction). */ 645: /* #define SLOW_ZERO_EXTEND */ 646: 647: /* Nonzero if access to memory by bytes is slow and undesirable. */ 648: #define SLOW_BYTE_ACCESS 0 649: 650: /* Define if shifts truncate the shift count 651: which implies one can omit a sign-extension or zero-extension 652: of a shift count. */ 653: #define SHIFT_COUNT_TRUNCATED 654: 655: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 656: is done just by pretending it is already truncated. */ 657: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 658: 659: /* On Convex, it is as good to call a constant function address as to 660: call an address kept in a register. */ 661: #define NO_FUNCTION_CSE 662: 663: /* When a prototype says `char' or `short', really pass an `int'. */ 664: #define PROMOTE_PROTOTYPES 665: 666: /* Specify the machine mode that pointers have. 667: After generation of rtl, the compiler makes no further distinction 668: between pointers and any other objects of this machine mode. */ 669: #define Pmode SImode 670: 671: /* A function address in a call instruction 672: is a byte address (for indexing purposes) 673: so give the MEM rtx a byte's mode. */ 674: #define FUNCTION_MODE QImode 675: 676: /* Compute the cost of computing a constant rtl expression RTX 677: whose rtx-code is CODE. The body of this macro is a portion 678: of a switch statement. If the code is computed here, 679: return it with a return statement. Otherwise, break from the switch. */ 680: 681: #define CONST_COSTS(RTX,CODE) \ 682: case CONST: \ 683: case LABEL_REF: \ 684: case SYMBOL_REF: \ 685: case CONST_INT: \ 686: return 0; \ 687: case CONST_DOUBLE: \ 688: return 2; 689: 690: /* Check a `double' value for validity for a particular machine mode. */ 691: 692: #define CHECK_FLOAT_VALUE(mode, d) \ 693: if ((mode) == SFmode) \ 694: { \ 695: if ((d) > 1.7014117331926443e+38) \ 696: { error ("magnitude of constant too large for `float'"); \ 697: (d) = 1.7014117331926443e+38; } \ 698: else if ((d) < -1.7014117331926443e+38) \ 699: { error ("magnitude of constant too large for `float'"); \ 700: (d) = -1.7014117331926443e+38; } \ 701: else if (((d) > 0) && ((d) < 2.9387358770557188e-39)) \ 702: { warning ("`float' constant truncated to zero"); \ 703: (d) = 0.0; } \ 704: else if (((d) < 0) && ((d) > -2.9387358770557188e-39)) \ 705: { warning ("`float' constant truncated to zero"); \ 706: (d) = 0.0; } \ 707: } 708: 709: /* Tell final.c how to eliminate redundant test instructions. */ 710: 711: /* Here we define machine-dependent flags and fields in cc_status 712: (see `conditions.h'). No extra ones are needed for convex. */ 713: 714: /* Store in cc_status the expressions 715: that the condition codes will describe 716: after execution of an instruction whose pattern is EXP. 717: Do not alter them if the instruction would not alter the cc's. */ 718: 719: #define NOTICE_UPDATE_CC(EXP,INSN) {CC_STATUS_INIT;} 720: 721: /* Control the assembler format that we output. */ 722: 723: /* Output at beginning of assembler file. */ 724: 725: #define ASM_FILE_START(FILE) fprintf (FILE, ";NO_APP\n") 726: 727: /* Output to assembler file text saying following lines 728: may contain character constants, extra white space, comments, etc. */ 729: 730: #define ASM_APP_ON ";APP\n" 731: 732: /* Output to assembler file text saying following lines 733: no longer contain unusual constructs. */ 734: 735: #define ASM_APP_OFF ";NO_APP\n" 736: 737: /* Alignment with Convex's assembler goes like this: 738: .text can be .aligned up to a halfword. 739: .data and .bss can be .aligned up to a longword. 740: .lcomm is not supported, explicit declarations in .bss must be used instead. 741: We get alignment for word and longword .text data by conventionally 742: using .text 2 for word-aligned data and .text 3 for longword-aligned 743: data. This requires that this data's size be a multiple of its alignment, 744: which seems to be always true. */ 745: 746: /* Boolean to keep track of whether the current section is .text or not. */ 747: 1.1.1.3 ! root 748: extern int current_section_is_text; 1.1 root 749: 750: /* Output before read-only data. */ 751: 752: #define TEXT_SECTION_ASM_OP (current_section_is_text = 1, ".text") 753: 754: /* Output before writable data. */ 755: 756: #define DATA_SECTION_ASM_OP (current_section_is_text = 0, ".data") 757: 758: /* Output before uninitialized data. */ 759: 760: #define BSS_SECTION_ASM_OP (current_section_is_text = 0, ".bss") 761: 762: #define EXTRA_SECTIONS in_bss 763: 764: #define EXTRA_SECTION_FUNCTIONS \ 765: void \ 766: bss_section () \ 767: { \ 768: if (in_section != in_bss) \ 769: { \ 770: fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \ 771: in_section = in_bss; \ 772: } \ 773: } 774: 775: /* This is how to output an assembler line 776: that says to advance the location counter 777: to a multiple of 2**LOG bytes. */ 778: 779: #define ASM_OUTPUT_ALIGN(FILE,LOG) \ 780: if (current_section_is_text && (LOG) > 1) \ 781: fprintf (FILE, ".text %d\n", LOG); \ 782: else if (current_section_is_text) \ 783: fprintf (FILE, ".text\n.align %d\n", 1 << (LOG)); \ 784: else \ 785: fprintf (FILE, ".align %d\n", 1 << (LOG)) 786: 787: /* How to refer to registers in assembler output. 788: This sequence is indexed by compiler's hard-register-number (see above). */ 789: 790: #define REGISTER_NAMES \ 791: {"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \ 792: "sp", "a1", "a2", "a3", "a4", "a5", "ap", "fp"} 793: 794: /* This is BSD, so it wants DBX format. */ 795: 796: #define DBX_DEBUGGING_INFO 797: 798: /* How to renumber registers for dbx and gdb. */ 799: 800: #define DBX_REGISTER_NUMBER(REGNO) (REGNO) 801: 802: /* Do not break .stabs pseudos into continuations. */ 803: 804: #define DBX_CONTIN_LENGTH 0 805: 806: /* This is the char to use for continuation (in case we need to turn 807: continuation back on). */ 808: 809: #define DBX_CONTIN_CHAR '?' 810: 811: /* Don't use the `xsfoo;' construct in DBX output; this system 812: doesn't support it. */ 813: 814: #define DBX_NO_XREFS 815: 816: /* This is how to output the definition of a user-level label named NAME, 817: such as the label on a static function or variable NAME. */ 818: 819: #define ASM_OUTPUT_LABEL(FILE,NAME) \ 820: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) 821: 822: /* This is how to output a command to make the user-level label named NAME 823: defined for reference from other files. */ 824: 825: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ 826: do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0) 827: 828: /* This is how to output a reference to a user-level label named NAME. */ 829: 830: #define ASM_OUTPUT_LABELREF(FILE,NAME) \ 831: fprintf (FILE, "_%s", NAME) 832: 833: /* This is how to output an internal numbered label where 834: PREFIX is the class of label and NUM is the number within the class. */ 835: 836: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ 837: fprintf (FILE, "%s%d:\n", PREFIX, NUM) 838: 839: /* Put case tables in .text 2, where they will be word-aligned */ 840: 841: #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \ 842: ASM_OUTPUT_ALIGN (FILE, 2); \ 843: ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM) 844: 845: #define ASM_OUTPUT_CASE_END(FILE,NUM,TABLE) \ 846: ASM_OUTPUT_ALIGN (FILE, 1) 847: 848: /* This is how to store into the string LABEL 849: the symbol_ref name of an internal numbered label where 850: PREFIX is the class of label and NUM is the number within the class. 851: This is suitable for output with `assemble_name'. */ 852: 853: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ 854: sprintf (LABEL, "*%s%d", PREFIX, NUM) 855: 856: /* This is how to output an assembler line defining a `double' constant. */ 857: 858: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ 1.1.1.3 ! root 859: fprintf (FILE, "\tds.d %.17e\n", (VALUE)) 1.1 root 860: 861: /* This is how to output an assembler line defining a `float' constant. */ 862: 863: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ 1.1.1.3 ! root 864: fprintf (FILE, "\tds.s %.9e\n", (VALUE)) 1.1 root 865: 866: /* This is how to output an assembler line defining an `int' constant. */ 867: 868: #define ASM_OUTPUT_INT(FILE,VALUE) \ 869: ( fprintf (FILE, "\tds.w "), \ 870: output_addr_const (FILE, (VALUE)), \ 871: fprintf (FILE, "\n")) 872: 873: /* Likewise for `char' and `short' constants. */ 874: 875: #define ASM_OUTPUT_SHORT(FILE,VALUE) \ 876: ( fprintf (FILE, "\tds.h "), \ 877: output_addr_const (FILE, (VALUE)), \ 878: fprintf (FILE, "\n")) 879: 880: #define ASM_OUTPUT_CHAR(FILE,VALUE) \ 881: ( fprintf (FILE, "\tds.b "), \ 882: output_addr_const (FILE, (VALUE)), \ 883: fprintf (FILE, "\n")) 884: 885: /* This is how to output an assembler line for a numeric constant byte. */ 886: 887: #define ASM_OUTPUT_BYTE(FILE,VALUE) \ 888: fprintf (FILE, "\tds.b %#x\n", (VALUE)) 889: 890: /* This is how to output a string */ 891: 892: #define ASM_OUTPUT_ASCII(FILE,STR,SIZE) do { \ 893: int i; \ 894: fprintf (FILE, "\tds.b \""); \ 895: for (i = 0; i < (SIZE); i++) { \ 896: register int c = (STR)[i] & 0377; \ 897: if (c >= ' ' && c < 0177 && c != '\\' && c != '"') \ 898: putc (c, FILE); \ 899: else \ 900: fprintf (FILE, "\\%03o", c);} \ 901: fprintf (FILE, "\"\n");} while (0) 902: 903: /* This is how to output an insn to push a register on the stack. 904: It need not be very fast code. */ 905: 906: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ 907: fprintf (FILE, "\tpsh.%c %s\n", \ 908: S_REGNO_P (REGNO) ? 'l' : 'w', \ 909: reg_names[REGNO]) 910: 911: /* This is how to output an insn to pop a register from the stack. 912: It need not be very fast code. */ 913: 914: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ 915: fprintf (FILE, "\tpop.%c %s\n", \ 916: S_REGNO_P (REGNO) ? 'l' : 'w', \ 917: reg_names[REGNO]) 918: 919: /* This is how to output an element of a case-vector that is absolute. */ 920: 921: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 922: fprintf (FILE, "\tds.w L%d\n", VALUE) 923: 924: /* This is how to output an element of a case-vector that is relative. 925: (not used on Convex) */ 926: 927: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \ 928: fprintf (FILE, "\tds.w L%d-L%d\n", VALUE, REL) 929: 930: /* This is how to output an assembler line 931: that says to advance the location counter by SIZE bytes. */ 932: 933: #define ASM_OUTPUT_SKIP(FILE,SIZE) \ 1.1.1.3 ! root 934: fprintf (FILE, "\tds.b %u(0)\n", (SIZE)) 1.1 root 935: 936: /* This says how to output an assembler line 937: to define a global common symbol. */ 938: 939: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ 940: ( fputs (".comm ", (FILE)), \ 941: assemble_name ((FILE), (NAME)), \ 1.1.1.3 ! root 942: fprintf ((FILE), ",%u\n", (ROUNDED))) 1.1 root 943: 944: /* This says how to output an assembler line 945: to define a local common symbol. */ 946: 947: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ 948: ( bss_section (), \ 949: assemble_name ((FILE), (NAME)), \ 1.1.1.3 ! root 950: fprintf ((FILE), ":\tbs.b %u\n", (ROUNDED))) 1.1 root 951: 952: /* Store in OUTPUT a string (made with alloca) containing 953: an assembler-name for a local static variable named NAME. 954: LABELNO is an integer which is different for each call. */ 955: 956: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ 957: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ 958: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) 959: 960: /* Define the parentheses used to group arithmetic operations 961: in assembler code. */ 962: 963: #define ASM_OPEN_PAREN "(" 964: #define ASM_CLOSE_PAREN ")" 965: 966: /* Define results of standard character escape sequences. */ 967: #define TARGET_BELL 007 968: #define TARGET_BS 010 969: #define TARGET_TAB 011 970: #define TARGET_NEWLINE 012 971: #define TARGET_VT 013 972: #define TARGET_FF 014 973: #define TARGET_CR 015 974: 975: /* Print an instruction operand X on file FILE. 976: CODE is the code from the %-spec that requested printing this operand; 977: if `%z3' was used to print operand 3, then CODE is 'z'. */ 978: 979: #define PRINT_OPERAND(FILE, X, CODE) \ 980: { if (GET_CODE (X) == REG) \ 981: fprintf (FILE, "%s", reg_names[REGNO (X)]); \ 982: else if (GET_CODE (X) == MEM) \ 983: output_address (XEXP (X, 0)); \ 984: else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != DImode) \ 985: { union { double d; int i[2]; } u; \ 986: u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X); \ 1.1.1.3 ! root 987: fprintf (FILE, "#%.9e", u.d); } \ 1.1 root 988: else { putc ('#', FILE); output_addr_const (FILE, X); }} 989: 990: /* Print a memory operand whose address is X, on file FILE. */ 991: 992: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ 993: { \ 994: register rtx addr = ADDR; \ 995: register rtx index = 0; \ 996: register rtx offset = 0; \ 997: \ 998: if (GET_CODE (addr) == MEM) \ 999: { \ 1000: fprintf (FILE, "@"); \ 1001: addr = XEXP (addr, 0); \ 1002: } \ 1003: \ 1004: switch (GET_CODE (addr)) \ 1005: { \ 1006: case REG: \ 1007: index = addr; \ 1008: break; \ 1009: \ 1010: case PLUS: \ 1011: index = XEXP (addr, 0); \ 1012: if (REG_P (index)) \ 1013: offset = XEXP (addr, 1); \ 1014: else \ 1015: { \ 1016: offset = XEXP (addr, 0); \ 1017: index = XEXP (addr, 1); \ 1018: if (! REG_P (index)) abort (); \ 1019: } \ 1020: break; \ 1021: \ 1022: default: \ 1023: offset = addr; \ 1024: break; \ 1025: } \ 1026: \ 1027: if (offset) \ 1028: output_addr_const (FILE, offset); \ 1029: \ 1030: if (index) \ 1031: fprintf (FILE, "(%s)", reg_names[REGNO (index)]); \ 1032: } 1033: 1034:
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.