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1.1 root 1: /* Definitions of target machine for GNU compiler for Intel 80386.
2: Copyright (C) 1988 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
6: GNU CC is free software; you can redistribute it and/or modify
7: it under the terms of the GNU General Public License as published by
8: the Free Software Foundation; either version 1, or (at your option)
9: any later version.
10:
11: GNU CC is distributed in the hope that it will be useful,
12: but WITHOUT ANY WARRANTY; without even the implied warranty of
13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14: GNU General Public License for more details.
15:
16: You should have received a copy of the GNU General Public License
17: along with GNU CC; see the file COPYING. If not, write to
18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19:
20:
21: /* Note that some other tm- files include this one and then override
22: many of the definitions that relate to assembler syntax. */
23:
24: /* Names to predefine in the preprocessor for this target machine. */
25:
26: /* the file tm-compaq.h includes this file */
27:
28:
29: #define I386 1
30:
31: /* Run-time compilation parameters selecting different hardware subsets. */
32:
33: extern int target_flags;
34:
35: /* Macros used in the machine description to test the flags. */
36:
37: /* Compile 80387 insns for floating point (not library calls). */
38: #define TARGET_80387 (target_flags & 1)
39: /* Compile using ret insn that pops args.
40: This will not work unless you use prototypes at least
41: for all functions that can take varying numbers of args. */
42: #define TARGET_RTD (target_flags & 8)
43: /* Compile passing first two args in regs 0 and 1.
44: This exists only to test compiler features that will
45: be needed for RISC chips. It is not usable
46: and is not intended to be usable on this cpu. */
47: #define TARGET_REGPARM (target_flags & 020)
48:
49: /* Macro to define tables used to set the flags.
50: This is a list in braces of pairs in braces,
51: each pair being { "NAME", VALUE }
52: where VALUE is the bits to set or minus the bits to clear.
53: An empty string NAME is used to identify the default VALUE. */
54:
55: #define TARGET_SWITCHES \
56: { { "80387", 1}, \
57: { "soft-float", -1}, \
58: { "rtd", 8}, \
59: { "nortd", -8}, \
60: { "regparm", 020}, \
61: { "noregparm", -020}, \
62: { "", TARGET_DEFAULT}}
63:
64: /* TARGET_DEFAULT is defined in tm-compaq.h, etc. */
65:
66: /* target machine storage layout */
67:
68: /* Define this if most significant byte of a word is the lowest numbered. */
69: /* That is true on the 80386. */
70:
71: /* #define BITS_BIG_ENDIAN */
72:
73: /* Define this if most significant byte of a word is the lowest numbered. */
74: /* That is not true on the 80386. */
75: /* #define BYTES_BIG_ENDIAN */
76:
77: /* Define this if most significant word of a multiword number is numbered. */
78: /* Not true for 80386 */
79: /* #define WORDS_BIG_ENDIAN */
80:
81: /* number of bits in an addressible storage unit */
82: #define BITS_PER_UNIT 8
83:
84: /* Width in bits of a "word", which is the contents of a machine register.
85: Note that this is not necessarily the width of data type `int';
86: if using 16-bit ints on a 80386, this would still be 32.
87: But on a machine with 16-bit registers, this would be 16. */
88: #define BITS_PER_WORD 32
89:
90: /* Width of a word, in units (bytes). */
91: #define UNITS_PER_WORD 4
92:
93: /* Width in bits of a pointer.
94: See also the macro `Pmode' defined below. */
95: #define POINTER_SIZE 32
96:
97: /* Allocation boundary (in *bits*) for storing pointers in memory. */
98: #define POINTER_BOUNDARY 32
99:
100: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
101: #define PARM_BOUNDARY 32
102:
103: /* Allocation boundary (in *bits*) for the code of a function. */
104: #define FUNCTION_BOUNDARY 32
105:
106: /* Alignment of field after `int : 0' in a structure. */
107:
108: #define EMPTY_FIELD_BOUNDARY 32
109:
110: /* There is no point aligning anything to a rounder boundary than this. */
111: /* Some structures in the ATT libraries are assumed to round up from 16 to 18
112: bytes, for example the _io_buf */
113: #define BIGGEST_ALIGNMENT 32
114:
115: /* Define this if move instructions will actually fail to work
116: when given unaligned data. */
117: /* #define STRICT_ALIGNMENT */
118:
119: /* Standard register usage. */
120:
121: /* Number of actual hardware registers.
122: The hardware registers are assigned numbers for the compiler
123: from 0 to just below FIRST_PSEUDO_REGISTER.
124: All registers that the compiler knows about must be given numbers,
125: even those that are not normally considered general registers.
126: In the 80387 we give the 8 general purpose registers the numbers 0-7,
127: we assign 6 numbers for floating point registers 8-13,
128: Note that registers 0-7 can be accessed as a short or int,
129: while only 0-3 may be used with mov byte instructions.
130: */
131: #define FIRST_PSEUDO_REGISTER 10
132:
133: /* 1 for registers that have pervasive standard uses
134: and are not available for the register allocator.
135: On the 80386, only the stack pointer is such. */
136: #define FIXED_REGISTERS \
137: /*ax,ad,ac,ab,si,di,bp,sp,fval,fp0*/ \
138: { 0, 0, 0, 0, 0, 0, 0, 1, 1, 0}
139:
140: /* ;;change-wfs */
141:
142: /* 1 for registers not available across function calls.
143: These must include the FIXED_REGISTERS and also any
144: registers that can be used without being saved.
145: The latter must include the registers where values are returned
146: and the register where structure-value addresses are passed.
147: Aside from that, you can include as many other registers as you like. */
148:
149: #define CALL_USED_REGISTERS \
150: /*ax,ad,ac,ab,si,di,bp,sp,*/ \
151: { 1, 1, 1, 0, 0, 0, 0, 1, \
152: 1, 1}
153:
154: /* Return number of consecutive hard regs needed starting at reg REGNO
155: to hold something of mode MODE.
156: This is ordinarily the length in words of a value of mode MODE
157: but can be less for certain modes in special long registers.
158:
159: Actually there are no two word move instructions for consecutive
160: registers. And only registers 0-3 may have mov byte instructions
161: applied to them.
162: */
163:
164: #define HARD_REGNO_NREGS(REGNO, MODE) \
165: ((REGNO) >= 8 ? 1 \
166: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
167:
168: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
169: On the 80386, the first 4 cpu registers can hold any mode.
170: While the floating point registers may hold SFmode or DFmode only.
171: */
172:
173: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
174: hard_regno_mode_ok(REGNO,MODE)
175:
176: /* Value is 1 if it is a good idea to tie two pseudo registers
177: when one has mode MODE1 and one has mode MODE2.
178: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
179: for any hard reg, then this must be 0 for correct output. */
180:
181: #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
182:
183: /* Specify the registers used for certain standard purposes.
184: The values of these macros are register numbers. */
185:
186: /* on the 386 the pc register is %eip, and is not usable as a general
187: register. The ordinary mov instructions won't work */
188: /* #define PC_REGNUM */
189:
190: /* Register to use for pushing function arguments. */
191: #define STACK_POINTER_REGNUM 7
192:
193: /* Base register for access to local variables of the function. */
194: #define FRAME_POINTER_REGNUM 6
195:
196: /* First floating point reg */
197: #define FIRST_FLOAT_REG 8
198: /* Value should be nonzero if functions must have frame pointers.
199: Zero means the frame pointer need not be set up (and parms
200: may be accessed via the stack pointer) in functions that seem suitable.
201: This is computed in `reload', in reload1.c. */
202: #define FRAME_POINTER_REQUIRED 0
203:
204: /* Base register for access to arguments of the function. */
205: #define ARG_POINTER_REGNUM 6
206:
207: /* Register in which static-chain is passed to a function. */
208: #define STATIC_CHAIN_REGNUM 2
209:
210: /* Register in which address to store a structure value
211: arrives in the function. On the 386, the prologue
212: copies this from the stack to register %eax. */
213: #define STRUCT_VALUE_INCOMING \
214: gen_rtx (MEM, Pmode, gen_rtx (PLUS, Pmode, frame_pointer_rtx, \
215: gen_rtx (CONST_INT, VOIDmode, 8)))
216:
217: /* Place in which caller passes the structure value address.
218: Actually, all that matters about this value is it its rtx_code:
219: MEM means push the value on the stack like an argument. */
220: #define STRUCT_VALUE \
221: gen_rtx (MEM, Pmode, gen_rtx (PRE_DEC, Pmode, stack_pointer_rtx))
222:
223: /* Define the classes of registers for register constraints in the
224: machine description. Also define ranges of constants.
225:
226: One of the classes must always be named ALL_REGS and include all hard regs.
227: If there is more than one class, another class must be named NO_REGS
228: and contain no registers.
229:
230: The name GENERAL_REGS must be the name of a class (or an alias for
231: another name such as ALL_REGS). This is the class of registers
232: that is allowed by "g" or "r" in a register constraint.
233: Also, registers outside this class are allocated only when
234: instructions express preferences for them.
235:
236: The classes must be numbered in nondecreasing order; that is,
237: a larger-numbered class must never be contained completely
238: in a smaller-numbered class.
239:
240: For any two classes, it is very desirable that there be another
241: class that represents their union. */
242:
243:
244: enum reg_class {
245: NO_REGS, AREG, DREG, ADREG, CREG, BREG, Q_REGS, SIREG, DIREG,
246: INDEX_REGS, GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES };
247:
248: #define N_REG_CLASSES (int) LIM_REG_CLASSES
249:
250: /* Give names of register classes as strings for dump file. */
251:
252: #define REG_CLASS_NAMES \
253: { "NO_REGS", "AREG", "DREG", "ADREG", "CREG", "BREG","Q_REGS", \
254: "SIREG", "DIREG", \
255: "INDEX_REGS", "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS"}
256: /* Define which registers fit in which classes.
257: This is an initializer for a vector of HARD_REG_SET
258: of length N_REG_CLASSES. */
259:
260:
261:
262: #define REG_CLASS_CONTENTS {0, 0x1, 0x2, 0x3, 0x4, 0x8, 0xf,\
263: 0x10, 0x20, 0x7f, 0xff, 0x300, 0x3ff}
264:
265: /* The same information, inverted:
266: Return the class number of the smallest class containing
267: reg number REGNO. This could be a conditional expression
268: or could index an array. */
269:
270: #define REGNO_REG_CLASS(REGNO) \
271: ((REGNO) == 0 ? AREG : \
272: (REGNO) == 1 ? DREG : \
273: (REGNO) == 2 ? CREG : \
274: (REGNO) == 3 ? BREG : \
275: (REGNO) == 4 ? SIREG : \
276: (REGNO) == 5 ? DIREG : \
277: (REGNO) == 7 ? GENERAL_REGS : \
278: (REGNO) < 8 ? INDEX_REGS : \
279: FLOAT_REGS)
280:
281: #define NON_QI_REG_P(X) \
282: (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
283:
284: #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
285: #define FP_REGNO_P(n) ((n) >= FIRST_FLOAT_REG && (n) < FIRST_PSEUDO_REGISTER)
286:
287: /* Try to maintain the accuracy of the death notes for regs satisfying the
288: following. Important for stack like regs, to know when to pop. */
289:
290: #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x)
291:
292: /* 1 if register REGNO can magically overlap other regs.
293: Note that nonzero values work only in very special circumstances.
294: We return 1 for an FP reg because "both" our FP regs
295: are really the same reg. */
296:
297: #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO)
298:
299: /* The class value for index registers, and the one for base regs. */
300:
301: #define INDEX_REG_CLASS INDEX_REGS
302: #define BASE_REG_CLASS GENERAL_REGS
303:
304: /* Get reg_class from a letter such as appears in the machine description. */
305:
306: #define REG_CLASS_FROM_LETTER(C) \
307: ((C) == 'r' ? GENERAL_REGS : \
308: (C) == 'q' ? Q_REGS : \
309: (C) == 'f' ? FLOAT_REGS : \
310: (C) == 'a' ? AREG : (C) == 'b' ? BREG : \
311: (C) == 'c' ? CREG : (C) == 'd' ? DREG : \
312: (C) == 'A' ? ADREG : \
313: (C) == 'S' ? SIREG : \
314: (C) == 'D' ? DIREG : NO_REGS)
315:
316: /* The letters I, J, K, L and M in a register constraint string
317: can be used to stand for particular ranges of immediate operands.
318: This macro defines what the ranges are.
319: C is the letter, and VALUE is a constant value.
320: Return 1 if VALUE is in the range specified by C.
321:
322: I is for the maximum shifts.
323: */
324:
325: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
326: ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 :0)
327:
328: /* Similar, but for floating constants, and defining letters G and H.
329: Here VALUE is the CONST_DOUBLE rtx itself. */
330:
331: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
332: ((C) == 'G' ? ! (TARGET_80387 && standard_80387_constant_p (VALUE)) : 1)
333:
334: /* Given an rtx X being reloaded into a reg required to be
335: in class CLASS, return the class of reg to actually use.
336: In general this is just CLASS; but on some machines
337: in some cases it is preferable to use a more restrictive class.
338: On the 80386 series, we prevent floating constants from being
339: reloaded into floating registers (since no move-insn can do that)
340: and we ensure that QImodes aren't reloaded into the esi or edi reg. */
341:
342: #define PREFERRED_RELOAD_CLASS(X,CLASS) \
343: (GET_CODE (X) == CONST_DOUBLE \
344: ? ((CLASS) == GENERAL_REGS || (CLASS) == ALL_REGS \
345: ? GENERAL_REGS : NO_REGS) \
346: : GET_MODE (X) == QImode \
347: ? ((CLASS) == GENERAL_REGS || (CLASS) == ALL_REGS \
348: ? Q_REGS \
349: : (CLASS) == INDEX_REGS ? (abort (), INDEX_REGS) \
350: : (CLASS)) \
351: : (CLASS))
352:
353: /* Return the maximum number of consecutive registers
354: needed to represent mode MODE in a register of class CLASS. */
355: /* On the 80386, this is the size of MODE in words,
356: except in the FP regs, where a single reg is always enough. */
357: #define CLASS_MAX_NREGS(CLASS, MODE) \
358: ((CLASS) == FLOAT_REGS ? 1 : \
359: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
360:
361: /* Stack layout; function entry, exit and calling. */
362:
363: /* Define this if pushing a word on the stack
364: makes the stack pointer a smaller address. */
365: #define STACK_GROWS_DOWNWARD
366:
367: /* Define this if the nominal address of the stack frame
368: is at the high-address end of the local variables;
369: that is, each additional local variable allocated
370: goes at a more negative offset in the frame. */
371: #define FRAME_GROWS_DOWNWARD
372:
373: /* Offset within stack frame to start allocating local variables at.
374: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
375: first local allocated. Otherwise, it is the offset to the BEGINNING
376: of the first local allocated. */
377: #define STARTING_FRAME_OFFSET 0
378:
379: /* If we generate an insn to push BYTES bytes,
380: this says how many the stack pointer really advances by.
381: On 386 pushw decrements by exactly 2 no matter what the position was.
382: On the 386 there is no pushb; we use pushw instead, and this
383: has the effect of rounding up to 2. */
384:
385: #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2))
386:
387: /* Offset of first parameter from the argument pointer register value. */
388: #define FIRST_PARM_OFFSET(FNDECL) 8
389:
390: /* Value is 1 if returning from a function call automatically
391: pops the arguments described by the number-of-args field in the call.
392: FUNTYPE is the data type of the function (as a tree),
393: or for a library call it is an identifier node for the subroutine name.
394:
395: On the 80386, the RTD insn may be used to pop them if the number
396: of args is fixed, but if the number is variable then the caller
397: must pop them all. RTD can't be used for library calls now
398: because the library is compiled with the Unix compiler.
399: Use of RTD is a selectable option, since it is incompatible with
400: standard Unix calling sequences. If the option is not selected,
401: the caller must always pop the args. */
402:
403: #define RETURN_POPS_ARGS(FUNTYPE) \
404: (TARGET_RTD && TREE_CODE (FUNTYPE) != IDENTIFIER_NODE \
405: && (TYPE_ARG_TYPES (FUNTYPE) == 0 \
406: || TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) == void_type_node))
407:
408: #define FUNCTION_VALUE(VALTYPE, FUNC) \
409: gen_rtx (REG, TYPE_MODE (VALTYPE), \
410: VALUE_REGNO(TYPE_MODE(VALTYPE)))
411:
412: /* Define how to find the value returned by a library function
413: assuming the value has mode MODE. */
414:
415: #define LIBCALL_VALUE(MODE) \
416: gen_rtx (REG, MODE, VALUE_REGNO(MODE))
417:
418: /* 1 if N is a possible register number for function argument passing.
419: On the 80386, no registers are used in this way.
420: *NOTE* -mregparm does not work.
421: It exists only to test register calling conventions. */
422:
423: #define FUNCTION_ARG_REGNO_P(N) 0
424: /* Define a data type for recording info about an argument list
425: during the scan of that argument list. This data type should
426: hold all necessary information about the function itself
427: and about the args processed so far, enough to enable macros
428: such as FUNCTION_ARG to determine where the next arg should go.
429:
430: On the 80386, this is a single integer, which is a number of bytes
431: of arguments scanned so far. */
432:
433: #define CUMULATIVE_ARGS int
434:
435: /* Initialize a variable CUM of type CUMULATIVE_ARGS
436: for a call to a function whose data type is FNTYPE.
437: For a library call, FNTYPE is 0.
438:
439: On the 80386, the offset starts at 0. */
440:
441: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE) \
442: ((CUM) = 0)
443:
444: /* Update the data in CUM to advance over an argument
445: of mode MODE and data type TYPE.
446: (TYPE is null for libcalls where that information may not be available.) */
447:
448: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
449: ((CUM) += ((MODE) != BLKmode \
450: ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
451: : (int_size_in_bytes (TYPE) + 3) & ~3))
452:
453: /* Define where to put the arguments to a function.
454: Value is zero to push the argument on the stack,
455: or a hard register in which to store the argument.
456:
457: MODE is the argument's machine mode.
458: TYPE is the data type of the argument (as a tree).
459: This is null for libcalls where that information may
460: not be available.
461: CUM is a variable of type CUMULATIVE_ARGS which gives info about
462: the preceding args and about the function being called.
463: NAMED is nonzero if this argument is a named parameter
464: (otherwise it is an extra parameter matching an ellipsis). */
465:
466:
467: /* On the 80386 all args are pushed, except if -mregparm is specified
468: then the first two words of arguments are passed in EAX, EDX.
469: *NOTE* -mregparm does not work.
470: It exists only to test register calling conventions. */
471:
472: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
473: ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
474:
475: /* For an arg passed partly in registers and partly in memory,
476: this is the number of registers used.
477: For args passed entirely in registers or entirely in memory, zero. */
478:
479:
480: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
481: ((TARGET_REGPARM && (CUM) < 8 \
482: && 8 < ((CUM) + ((MODE) == BLKmode \
483: ? int_size_in_bytes (TYPE) \
484: : GET_MODE_SIZE (MODE)))) \
485: ? 2 - (CUM) / 4 : 0)
486:
487: /* This macro generates the assembly code for function entry.
488: FILE is a stdio stream to output the code to.
489: SIZE is an int: how many units of temporary storage to allocate.
490: Refer to the array `regs_ever_live' to determine which registers
491: to save; `regs_ever_live[I]' is nonzero if register number I
492: is ever used in the function. This macro is responsible for
493: knowing which registers should not be saved even if used. */
494:
495: #define FUNCTION_PROLOGUE(FILE, SIZE) \
496: function_prologue (FILE, SIZE)
497:
498: /* Output assembler code to FILE to increment profiler label # LABELNO
499: for profiling a function entry. */
500:
501: #define FUNCTION_PROFILER(FILE, LABELNO) \
502: fprintf (FILE, "\tmovl $%sP%d,%%edx\n\tcall _mcount\n", LPREFIX, (LABELNO));
503:
504: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
505: the stack pointer does not matter. The value is tested only in
506: functions that have frame pointers.
507: No definition is equivalent to always zero. */
508: /* Note on the 386 it might be more efficient not to define this since
509: we have to restore it ourselves from the frame pointer, in order to
510: use pop */
511:
512: #define EXIT_IGNORE_STACK 1
513:
514: /* This macro generates the assembly code for function exit,
515: on machines that need it. If FUNCTION_EPILOGUE is not defined
516: then individual return instructions are generated for each
517: return statement. Args are same as for FUNCTION_PROLOGUE.
518:
519: The function epilogue should not depend on the current stack pointer!
520: It should use the frame pointer only. This is mandatory because
521: of alloca; we also take advantage of it to omit stack adjustments
522: before returning. */
523:
524: #define FUNCTION_EPILOGUE(FILE, SIZE) \
525: function_epilogue (FILE, SIZE)
526:
527: /* If the memory address ADDR is relative to the frame pointer,
528: correct it to be relative to the stack pointer instead.
529: This is for when we don't use a frame pointer.
530: ADDR should be a variable name. */
531:
532:
533: #define FIX_FRAME_POINTER_ADDRESS(ADDR,DEPTH) \
534: { int offset = -1; \
535: rtx regs = stack_pointer_rtx; \
536: if (ADDR == frame_pointer_rtx) \
537: offset = 0; \
538: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx \
539: && GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \
540: offset = INTVAL (XEXP (ADDR, 1)); \
541: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx) \
542: { rtx other_reg = XEXP (ADDR, 1); \
543: offset = 0; \
544: regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
545: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 1) == frame_pointer_rtx) \
546: { rtx other_reg = XEXP (ADDR, 0); \
547: offset = 0; \
548: regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
549: else if (GET_CODE (ADDR) == PLUS \
550: && GET_CODE (XEXP (ADDR, 0)) == PLUS \
551: && XEXP (XEXP (ADDR, 0), 0) == frame_pointer_rtx \
552: && GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \
553: { rtx other_reg = XEXP (XEXP (ADDR, 0), 1); \
554: offset = INTVAL (XEXP (ADDR, 1)); \
555: regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
556: else if (GET_CODE (ADDR) == PLUS \
557: && GET_CODE (XEXP (ADDR, 0)) == PLUS \
558: && XEXP (XEXP (ADDR, 0), 1) == frame_pointer_rtx \
559: && GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \
560: { rtx other_reg = XEXP (XEXP (ADDR, 0), 0); \
561: offset = INTVAL (XEXP (ADDR, 1)); \
562: regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
563: if (offset >= 0) \
564: { int regno; \
565: extern char call_used_regs[]; \
566: for (regno = FIRST_FLOAT_REG; regno < FIRST_PSEUDO_REGISTER; regno++)\
567: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
568: offset += 8; \
569: for (regno=0 ; regno <FIRST_FLOAT_REG ; regno++) \
570: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
571: offset += 4; \
572: offset -= 4; \
573: ADDR = plus_constant (regs, offset + (DEPTH)); } } \
574:
575: /* Addressing modes, and classification of registers for them. */
576:
577: /* #define HAVE_POST_INCREMENT */
578: /* #define HAVE_POST_DECREMENT */
579:
580: /* #define HAVE_PRE_DECREMENT */
581: /* #define HAVE_PRE_INCREMENT */
582:
583: /* Macros to check register numbers against specific register classes. */
584:
585: /* These assume that REGNO is a hard or pseudo reg number.
586: They give nonzero only if REGNO is a hard reg of the suitable class
587: or a pseudo reg currently allocated to a suitable hard reg.
588: Since they use reg_renumber, they are safe only once reg_renumber
589: has been allocated, which happens in local-alloc.c. */
590:
591: #define REGNO_OK_FOR_INDEX_P(REGNO) \
592: ((REGNO) < STACK_POINTER_REGNUM || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
593: #define REGNO_OK_FOR_BASE_P(REGNO) \
594: ((REGNO) <= STACK_POINTER_REGNUM || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
595:
596: #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
597: #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
598:
599: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
600: and check its validity for a certain class.
601: We have two alternate definitions for each of them.
602: The usual definition accepts all pseudo regs; the other rejects
603: them unless they have been allocated suitable hard regs.
604: The symbol REG_OK_STRICT causes the latter definition to be used.
605:
606: Most source files want to accept pseudo regs in the hope that
607: they will get allocated to the class that the insn wants them to be in.
608: Source files for reload pass need to be strict.
609: After reload, it makes no difference, since pseudo regs have
610: been eliminated by then. */
611:
612: #ifndef REG_OK_STRICT
613:
614: /* Nonzero if X is a hard reg that can be used as an index or if
615: it is a pseudo reg. */
616: #define REG_OK_FOR_INDEX_P(X) (REGNO (X) < STACK_POINTER_REGNUM || REGNO (X) >= FIRST_PSEUDO_REGISTER)
617: /* Nonzero if X is a hard reg that can be used as a base reg
618: of if it is a pseudo reg. */
619: /* ?wfs */
620: #define REG_OK_FOR_BASE_P(X) (REGNO (X) <= STACK_POINTER_REGNUM || REGNO(X) >= FIRST_PSEUDO_REGISTER)
621: #define REG_OK_FOR_STRREG_P(X) \
622: (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
623:
624: #else
625:
626: /* Nonzero if X is a hard reg that can be used as an index. */
627: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
628: /* Nonzero if X is a hard reg that can be used as a base reg. */
629: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
630: #define REG_OK_FOR_STRREG_P(X) \
631: (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))
632:
633: #endif
634:
635: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
636: that is a valid memory address for an instruction.
637: The MODE argument is the machine mode for the MEM expression
638: that wants to use this address.
639:
640: The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
641: except for CONSTANT_ADDRESS_P which is usually machine-independent. */
642:
643: #define MAX_REGS_PER_ADDRESS 2
644:
645: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
646:
647: /* Nonzero if the constant value X is a legitimate general operand.
648: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
649:
650: #define LEGITIMATE_CONSTANT_P(X) 1
651:
652: #define GO_IF_INDEXABLE_BASE(X, ADDR) \
653: if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR
654:
655: #define LEGITIMATE_INDEX_REG_P(X) \
656: (GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X))
657:
658: /* Return 1 if X is an index or an index times a scale. */
659:
660: #define LEGITIMATE_INDEX_P(X) \
661: (LEGITIMATE_INDEX_REG_P (X) \
662: || (GET_CODE (X) == MULT \
663: && LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \
664: && GET_CODE (XEXP (X, 1)) == CONST_INT \
665: && (INTVAL (XEXP (X, 1)) == 2 \
666: || INTVAL (XEXP (X, 1)) == 4 \
667: || INTVAL (XEXP (X, 1)) == 8)))
668:
669: /* Go to ADDR if X is an index term, a base reg, or a sum of those. */
670:
671: #define GO_IF_INDEXING(X, ADDR) \
672: { if (LEGITIMATE_INDEX_P (X)) goto ADDR; \
673: GO_IF_INDEXABLE_BASE (X, ADDR); \
674: if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \
675: { GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \
676: if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \
677: { GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } }
678:
679: /* We used to allow this, but it isn't ever used.
680: || ((GET_CODE (X) == POST_DEC || GET_CODE (X) == POST_INC) \
681: && REG_P (XEXP (X, 0)) \
682: && REG_OK_FOR_STRREG_P (XEXP (X, 0))) \
683: */
684:
685: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
686: { if (CONSTANT_ADDRESS_P (X)) goto ADDR; \
687: GO_IF_INDEXING (X, ADDR); \
688: if (GET_CODE (X) == PLUS) \
689: { if (CONSTANT_ADDRESS_P (XEXP (X, 1))) \
690: GO_IF_INDEXING (XEXP (X, 0), ADDR); \
691: if (CONSTANT_ADDRESS_P (XEXP (X, 0))) \
692: GO_IF_INDEXING (XEXP (X, 1), ADDR); } }
693:
694: /* Try machine-dependent ways of modifying an illegitimate address
695: to be legitimate. If we find one, return the new, valid address.
696: This macro is used in only one place: `memory_address' in explow.c.
697:
698: OLDX is the address as it was before break_out_memory_refs was called.
699: In some cases it is useful to look at this to decide what needs to be done.
700:
701: MODE and WIN are passed so that this macro can use
702: GO_IF_LEGITIMATE_ADDRESS.
703:
704: It is always safe for this macro to do nothing. It exists to recognize
705: opportunities to optimize the output.
706:
707: For the 80386, we handle X+REG by loading X into a register R and
708: using R+REG. R will go in a general reg and indexing will be used.
709: However, if REG is a broken-out memory address or multiplication,
710: nothing needs to be done because REG can certainly go in a general reg. */
711:
712: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
713: { register int ch = (X) != (OLDX); \
714: if (GET_CODE (X) == PLUS) \
715: { if (GET_CODE (XEXP (X, 0)) == MULT) \
716: ch = 1, XEXP (X, 0) = force_operand (XEXP (X, 0), 0); \
717: if (GET_CODE (XEXP (X, 1)) == MULT) \
718: ch = 1, XEXP (X, 1) = force_operand (XEXP (X, 1), 0); \
719: if (ch && GET_CODE (XEXP (X, 1)) == REG \
720: && GET_CODE (XEXP (X, 0)) == REG) \
721: return X; \
722: if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \
723: if (GET_CODE (XEXP (X, 0)) == REG \
724: || (GET_CODE (XEXP (X, 0)) == SIGN_EXTEND \
725: && GET_CODE (XEXP (XEXP (X, 0), 0)) == REG \
726: && GET_MODE (XEXP (XEXP (X, 0), 0)) == HImode)) \
727: { register rtx temp = gen_reg_rtx (Pmode); \
728: register rtx val = force_operand (XEXP (X, 1), temp); \
729: if (val != temp) emit_move_insn (temp, val, 0); \
730: XEXP (X, 1) = temp; \
731: return X; } \
732: else if (GET_CODE (XEXP (X, 1)) == REG \
733: || (GET_CODE (XEXP (X, 1)) == SIGN_EXTEND \
734: && GET_CODE (XEXP (XEXP (X, 1), 0)) == REG \
735: && GET_MODE (XEXP (XEXP (X, 1), 0)) == HImode)) \
736: { register rtx temp = gen_reg_rtx (Pmode); \
737: register rtx val = force_operand (XEXP (X, 0), temp); \
738: if (val != temp) emit_move_insn (temp, val, 0); \
739: XEXP (X, 0) = temp; \
740: return X; }}}
741:
742: /* Go to LABEL if ADDR (a legitimate address expression)
743: has an effect that depends on the machine mode it is used for.
744: On the 80386, only postdecrement and postincrement address depend thus
745: (the amount of decrement or increment being the length of the operand). */
746: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
747: if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
748:
749: /* Specify the machine mode that this machine uses
750: for the index in the tablejump instruction. */
751: #define CASE_VECTOR_MODE Pmode
752:
753: /* Define this if the tablejump instruction expects the table
754: to contain offsets from the address of the table.
755: Do not define this if the table should contain absolute addresses. */
756: /* #define CASE_VECTOR_PC_RELATIVE */
757:
758: /* Specify the tree operation to be used to convert reals to integers.
759: This should be changed to take advantage of fist --wfs ??
760: */
761: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
762:
763: /* This is the kind of divide that is easiest to do in the general case. */
764: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
765:
766: /* Define this as 1 if `char' should by default be signed; else as 0. */
767: #define DEFAULT_SIGNED_CHAR 1
768:
769: /* Max number of bytes we can move from memory to memory
770: in one reasonably fast instruction. */
771: #define MOVE_MAX 4
772:
773: /* Define this if zero-extension is slow (more than one real instruction). */
774: /* #define SLOW_ZERO_EXTEND */
775:
776: /* Nonzero if access to memory by bytes is slow and undesirable. */
777: #define SLOW_BYTE_ACCESS 0
778:
779: /* Define if shifts truncate the shift count
780: which implies one can omit a sign-extension or zero-extension
781: of a shift count. */
782: #define SHIFT_COUNT_TRUNCATED
783:
784: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
785: is done just by pretending it is already truncated. */
786: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
787:
788: /* We assume that the store-condition-codes instructions store 0 for false
789: and some other value for true. This is the value stored for true. */
790:
791: #define STORE_FLAG_VALUE 1
792:
793: /* When a prototype says `char' or `short', really pass an `int'.
794: (The 386 can't easily push less than an int.) */
795:
796: #define PROMOTE_PROTOTYPES
797:
798: /* Specify the machine mode that pointers have.
799: After generation of rtl, the compiler makes no further distinction
800: between pointers and any other objects of this machine mode. */
801: #define Pmode SImode
802:
803: /* A function address in a call instruction
804: is a byte address (for indexing purposes)
805: so give the MEM rtx a byte's mode. */
806: #define FUNCTION_MODE QImode
807:
808: /* Define this if addresses of constant functions
809: shouldn't be put through pseudo regs where they can be cse'd.
810: Desirable on the 386 because a CALL with a constant address is
811: not much slower than one with a register address. */
812: #define NO_FUNCTION_CSE
813:
814: /* Compute the cost of computing a constant rtl expression RTX
815: whose rtx-code is CODE. The body of this macro is a portion
816: of a switch statement. If the code is computed here,
817: return it with a return statement. Otherwise, break from the switch. */
818:
819: #define CONST_COSTS(RTX,CODE) \
820: case CONST_INT: \
821: if (RTX == const0_rtx) return 0; \
822: if ((unsigned) INTVAL (RTX) < 077) return 1; \
823: case CONST: \
824: case LABEL_REF: \
825: case SYMBOL_REF: \
826: return 3; \
827: case CONST_DOUBLE: \
828: return 5; \
829: case PLUS: \
830: if (GET_CODE (XEXP (RTX, 0)) == REG \
831: && GET_CODE (XEXP (RTX, 1)) == CONST_INT) \
832: return 2;
833:
834: /* Tell final.c how to eliminate redundant test instructions. */
835:
836: /* ??? Find a better place to put this. */
837: #if 0
838: #define FINAL_PRESCAN_INSN(INSN, OPERANDS, NOPERANDS) \
839: fp_hook (INSN, OPERANDS, NOPERANDS)
840: #endif
841:
842: /* Here we define machine-dependent flags and fields in cc_status
843: (see `conditions.h'). */
844:
845: /* Set if the cc value is actually in the 80387, so a floating point
846: conditional branch must be output. */
847: #define CC_IN_80387 04000
848:
849: /* Store in cc_status the expressions
850: that the condition codes will describe
851: after execution of an instruction whose pattern is EXP.
852: Do not alter them if the instruction would not alter the cc's. */
853:
854: #define NOTICE_UPDATE_CC(EXP, INSN) \
855: notice_update_cc((EXP))
856:
857: /* Output a signed jump insn. Use template NORMAL ordinarily, or
858: FLOAT following a floating point comparison.
859: Use NO_OV following an arithmetic insn that set the cc's
860: before a test insn that was deleted.
861: NO_OV may be zero, meaning final should reinsert the test insn
862: because the jump cannot be handled properly without it. */
863:
864: #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
865: { \
866: if (cc_status.flags & CC_IN_80387) \
867: return FLOAT; \
868: if (cc_status.flags & CC_NO_OVERFLOW) \
869: return NO_OV; \
870: return NORMAL; \
871: }
872:
873: /* Control the assembler format that we output. */
874:
875: #ifdef ATT
876: #include <syms.h>
877: #else
878: #define FILNMLEN 14
879: #endif
880:
881: /* How to refer to registers in assembler output.
882: This sequence is indexed by compiler's hard-register-number (see above). */
883:
884: /* In order to refer to the first 8 regs as 32 bit regs prefix an "e"
885: For non floating point regs, the following are the HImode names.
886: */
887:
888:
889: #define HI_REGISTER_NAMES \
890: {"ax","dx","cx","bx","si","di","bp","sp", \
891: "st","st(1)"}
892: /* ,"st(2)","st(3)","st(4)","st(5)" } */
893: #define REGISTER_NAMES HI_REGISTER_NAMES
894:
895: /* Note we are omitting these since currently I don't know how
896: to get gcc to use these, since they want the same but different
897: number as al, and ax.
898: */
899:
900: /* note the last four are not really qi_registsers, but
901: the md will have to never output movb into one of them
902: only a movw . There is no movb into the hardware reg
903: esi that I can find */
904:
905: #define QI_REGISTER_NAMES \
906: {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",}
907:
908: /*
909: Don't know how to use these, yet. They overlap with ax,dx,cx,bx
910: and so would clobber al,dl,cl,bl
911: #define QI_REGISTER_NAMES_TOP \
912: {"ah", \
913: "dh", \
914: "ch", \
915: "bh", }
916: */
917:
918: /* How to renumber registers for dbxand gdb. */
919:
920: /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */
921: #define DBX_REGISTER_NUMBER(n) \
922: ((n)==0?0 :(n)==1?2 :(n)==2?1 :(n)==3?3 :(n)==4?6 :(n)==5?7 :(n)==6?4 :(n)==7?5 :(n)==8?12 :(n)==9?12 :(n))
923:
924: /* This is how to output the definition of a user-level label named NAME,
925: such as the label on a static function or variable NAME. */
926:
927: #define ASM_OUTPUT_LABEL(FILE,NAME) \
928: (assemble_name (FILE, NAME), fputs (":\n", FILE))
929:
930: /* This is how to output an assembler line defining a `double' constant. */
931:
932: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
933: fprintf (FILE, "%s%.22e\n",ASM_DOUBLE, (VALUE))
934:
935:
936: /* This is how to output an assembler line defining a `float' constant. */
937:
938: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
939: do { union { float f; long l;} tem; \
940: tem.f = (VALUE); \
941: fputs(ASM_LONG,FILE); \
942: fprintf((FILE), "0x%x\n", tem.l); \
943: } while (0)
944:
945:
946: /* Store in OUTPUT a string (made with alloca) containing
947: an assembler-name for a local static variable named NAME.
948: LABELNO is an integer which is different for each call. */
949:
950: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
951: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
952: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
953:
954:
955:
956: /* This is how to output an assembler line defining an `int' constant. */
957:
958: #define ASM_OUTPUT_INT(FILE,VALUE) \
959: ( fprintf (FILE,ASM_LONG), \
960: output_addr_const (FILE,(VALUE)), \
961: putc('\n',FILE))
962:
963: /* Likewise for `char' and `short' constants. */
964: /* is this supposed to do align too?? */
965:
966: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
967: ( fprintf (FILE,ASM_SHORT), \
968: output_addr_const (FILE,(VALUE)), \
969: putc('\n',FILE))
970:
971: /*
972: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
973: ( fputs (ASM_BYTE,FILE), \
974: output_addr_const (FILE,(VALUE)), \
975: fputs ( ",",FILE), \
976: output_addr_const (FILE,(VALUE)), \
977: fputs (" >> 8\n",FILE))
978: */
979:
980:
981: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
982: ( fprintf (FILE, ASM_BYTE), \
983: output_addr_const (FILE,(VALUE)), \
984: putc('\n',FILE))
985:
986: /* This is how to output an assembler line for a numeric constant byte. */
987:
988: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
989: fprintf ((FILE), "%s0x%x\n", ASM_BYTE, (VALUE))
990:
991: /* This is how to output an insn to push a register on the stack.
992: It need not be very fast code. */
993:
994: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
995: fprintf (FILE, "\tpushl e%s\n", reg_names[REGNO])
996:
997: /* This is how to output an insn to pop a register from the stack.
998: It need not be very fast code. */
999:
1000: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1001: fprintf (FILE, "\tpopl e%s\n", reg_names[REGNO])
1002:
1003: /* This is how to output an element of a case-vector that is absolute.
1004: */
1005:
1006: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1007: fprintf (FILE, "%s%s%d\n",ASM_LONG,LPREFIX, VALUE)
1008:
1009: /* This is how to output an element of a case-vector that is relative.
1010: We don't use these on the 386 yet, because the ATT assembler can't do
1011: forward reference the differences.
1012: */
1013:
1014: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) abort(); \
1015: fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
1016:
1017: /* Define the parentheses used to group arithmetic operations
1018: in assembler code. */
1019:
1020: #define ASM_OPEN_PAREN ""
1021: #define ASM_CLOSE_PAREN ""
1022:
1023: /* Define results of standard character escape sequences. */
1024: #define TARGET_BELL 007
1025: #define TARGET_BS 010
1026: #define TARGET_TAB 011
1027: #define TARGET_NEWLINE 012
1028: #define TARGET_VT 013
1029: #define TARGET_FF 014
1030: #define TARGET_CR 015
1031:
1032: /* Print operand X (an rtx) in assembler syntax to file FILE.
1033: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1034: The CODE z takes the size of operand from the following digit, and
1035: outputs b,w,or l respectively.
1036:
1037: On the 80386, we use several such letters:
1038: f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
1039: L,W,B,Q,S -- print the opcode suffix for specified size of operand.
1040: R -- print the prefix for register names.
1041: z -- print the opcode suffix for the size of the current operand.
1042: * -- print a star (in certain assembler syntax)
1043: w -- print the operand as if it's a "word" (HImode) even if it isn't.
1044: c -- don't print special prefixes before constant operands. */
1045:
1046: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1047: ((CODE) == '*')
1048:
1049: #define PRINT_OPERAND(FILE, X, CODE) \
1050: print_operand (FILE, X, CODE)
1051:
1052:
1053: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1054: print_operand_address (FILE, ADDR)
1055:
1056: /* Routines in gnulib that return floats must return them in an fp reg,
1057: just as other functions do which return such values.
1058: These macros make that happen. */
1059:
1060: #define SFVALUE float
1061: #define INTIFY(FLOATVAL) FLOATVAL
1062:
1063: /* Nonzero if INSN magically clobbers register REGNO. */
1064:
1065: #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \
1066: (FP_REGNO_P (REGNO) \
1067: && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
1068:
1069: /* a letter which is not needed by the normal asm syntax, which
1070: we can use for operand syntax in the extended asm */
1071:
1072: #define ASM_OPERAND_LETTER '#'
1073:
1074:
1075: /*
1076: Local variables:
1077: version-control: t
1078: End:
1079: */
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