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1.1 root 1: /* Definitions of target machine for GNU compiler for Intel 80386.
2: Copyright (C) 1988 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
6: GNU CC is free software; you can redistribute it and/or modify
7: it under the terms of the GNU General Public License as published by
8: the Free Software Foundation; either version 1, or (at your option)
9: any later version.
10:
11: GNU CC is distributed in the hope that it will be useful,
12: but WITHOUT ANY WARRANTY; without even the implied warranty of
13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14: GNU General Public License for more details.
15:
16: You should have received a copy of the GNU General Public License
17: along with GNU CC; see the file COPYING. If not, write to
18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19:
20:
21: /* Note that some other tm- files include this one and then override
22: many of the definitions that relate to assembler syntax. */
23:
24: /* Names to predefine in the preprocessor for this target machine. */
25:
26: /* the file tm-compaq.h includes this file */
27:
28:
29: #define I386 1
30:
31: /* Run-time compilation parameters selecting different hardware subsets. */
32:
33: extern int target_flags;
34:
35: /* Macros used in the machine description to test the flags. */
36:
37: /* Compile 80387 insns for floating point (not library calls). */
38: #define TARGET_80387 (target_flags & 1)
39: /* Compile using ret insn that pops args.
40: This will not work unless you use prototypes at least
41: for all functions that can take varying numbers of args. */
42: #define TARGET_RTD (target_flags & 8)
43: /* Compile passing first two args in regs 0 and 1.
44: This exists only to test compiler features that will
45: be needed for RISC chips. It is not usable
46: and is not intended to be usable on this cpu. */
47: #define TARGET_REGPARM (target_flags & 020)
48:
49: /* Macro to define tables used to set the flags.
50: This is a list in braces of pairs in braces,
51: each pair being { "NAME", VALUE }
52: where VALUE is the bits to set or minus the bits to clear.
53: An empty string NAME is used to identify the default VALUE. */
54:
55: #define TARGET_SWITCHES \
56: { { "80387", 1}, \
57: { "soft-float", -1}, \
58: { "rtd", 8}, \
59: { "nortd", -8}, \
60: { "regparm", 020}, \
61: { "noregparm", -020}, \
62: { "", TARGET_DEFAULT}}
63:
64: /* TARGET_DEFAULT is defined in tm-compaq.h, etc. */
65:
66: /* target machine storage layout */
67:
68: /* Define this if most significant byte of a word is the lowest numbered. */
69: /* That is true on the 80386. */
70:
71: /* #define BITS_BIG_ENDIAN */
72:
73: /* Define this if most significant byte of a word is the lowest numbered. */
74: /* That is not true on the 80386. */
75: /* #define BYTES_BIG_ENDIAN */
76:
77: /* Define this if most significant word of a multiword number is numbered. */
78: /* Not true for 80386 */
79: /* #define WORDS_BIG_ENDIAN */
80:
81: /* number of bits in an addressible storage unit */
82: #define BITS_PER_UNIT 8
83:
84: /* Width in bits of a "word", which is the contents of a machine register.
85: Note that this is not necessarily the width of data type `int';
86: if using 16-bit ints on a 80386, this would still be 32.
87: But on a machine with 16-bit registers, this would be 16. */
88: #define BITS_PER_WORD 32
89:
90: /* Width of a word, in units (bytes). */
91: #define UNITS_PER_WORD 4
92:
93: /* Width in bits of a pointer.
94: See also the macro `Pmode' defined below. */
95: #define POINTER_SIZE 32
96:
97: /* Allocation boundary (in *bits*) for storing pointers in memory. */
98: #define POINTER_BOUNDARY 32
99:
100: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
101: #define PARM_BOUNDARY 32
102:
1.1.1.2 root 103: /* Boundary (in *bits*) on which stack pointer should be aligned. */
104: #define STACK_BOUNDARY 32
105:
1.1 root 106: /* Allocation boundary (in *bits*) for the code of a function. */
107: #define FUNCTION_BOUNDARY 32
108:
109: /* Alignment of field after `int : 0' in a structure. */
110:
111: #define EMPTY_FIELD_BOUNDARY 32
112:
113: /* There is no point aligning anything to a rounder boundary than this. */
114: /* Some structures in the ATT libraries are assumed to round up from 16 to 18
115: bytes, for example the _io_buf */
116: #define BIGGEST_ALIGNMENT 32
117:
118: /* Define this if move instructions will actually fail to work
119: when given unaligned data. */
120: /* #define STRICT_ALIGNMENT */
121:
122: /* Standard register usage. */
123:
124: /* Number of actual hardware registers.
125: The hardware registers are assigned numbers for the compiler
126: from 0 to just below FIRST_PSEUDO_REGISTER.
127: All registers that the compiler knows about must be given numbers,
128: even those that are not normally considered general registers.
129: In the 80387 we give the 8 general purpose registers the numbers 0-7,
130: we assign 6 numbers for floating point registers 8-13,
131: Note that registers 0-7 can be accessed as a short or int,
132: while only 0-3 may be used with mov byte instructions.
133: */
134: #define FIRST_PSEUDO_REGISTER 10
135:
136: /* 1 for registers that have pervasive standard uses
137: and are not available for the register allocator.
138: On the 80386, only the stack pointer is such. */
139: #define FIXED_REGISTERS \
140: /*ax,ad,ac,ab,si,di,bp,sp,fval,fp0*/ \
141: { 0, 0, 0, 0, 0, 0, 0, 1, 1, 0}
142:
143: /* ;;change-wfs */
144:
145: /* 1 for registers not available across function calls.
146: These must include the FIXED_REGISTERS and also any
147: registers that can be used without being saved.
148: The latter must include the registers where values are returned
149: and the register where structure-value addresses are passed.
150: Aside from that, you can include as many other registers as you like. */
151:
152: #define CALL_USED_REGISTERS \
153: /*ax,ad,ac,ab,si,di,bp,sp,*/ \
154: { 1, 1, 1, 0, 0, 0, 0, 1, \
155: 1, 1}
156:
157: /* Return number of consecutive hard regs needed starting at reg REGNO
158: to hold something of mode MODE.
159: This is ordinarily the length in words of a value of mode MODE
160: but can be less for certain modes in special long registers.
161:
162: Actually there are no two word move instructions for consecutive
163: registers. And only registers 0-3 may have mov byte instructions
164: applied to them.
165: */
166:
167: #define HARD_REGNO_NREGS(REGNO, MODE) \
168: ((REGNO) >= 8 ? 1 \
169: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
170:
171: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
172: On the 80386, the first 4 cpu registers can hold any mode.
173: While the floating point registers may hold SFmode or DFmode only.
174: */
175:
176: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
177: hard_regno_mode_ok(REGNO,MODE)
178:
179: /* Value is 1 if it is a good idea to tie two pseudo registers
180: when one has mode MODE1 and one has mode MODE2.
181: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
182: for any hard reg, then this must be 0 for correct output. */
183:
184: #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
185:
186: /* Specify the registers used for certain standard purposes.
187: The values of these macros are register numbers. */
188:
189: /* on the 386 the pc register is %eip, and is not usable as a general
190: register. The ordinary mov instructions won't work */
191: /* #define PC_REGNUM */
192:
193: /* Register to use for pushing function arguments. */
194: #define STACK_POINTER_REGNUM 7
195:
196: /* Base register for access to local variables of the function. */
197: #define FRAME_POINTER_REGNUM 6
198:
199: /* First floating point reg */
200: #define FIRST_FLOAT_REG 8
201: /* Value should be nonzero if functions must have frame pointers.
202: Zero means the frame pointer need not be set up (and parms
203: may be accessed via the stack pointer) in functions that seem suitable.
204: This is computed in `reload', in reload1.c. */
205: #define FRAME_POINTER_REQUIRED 0
206:
207: /* Base register for access to arguments of the function. */
208: #define ARG_POINTER_REGNUM 6
209:
210: /* Register in which static-chain is passed to a function. */
211: #define STATIC_CHAIN_REGNUM 2
212:
213: /* Register in which address to store a structure value
214: arrives in the function. On the 386, the prologue
215: copies this from the stack to register %eax. */
216: #define STRUCT_VALUE_INCOMING \
217: gen_rtx (MEM, Pmode, gen_rtx (PLUS, Pmode, frame_pointer_rtx, \
218: gen_rtx (CONST_INT, VOIDmode, 8)))
219:
220: /* Place in which caller passes the structure value address.
221: Actually, all that matters about this value is it its rtx_code:
222: MEM means push the value on the stack like an argument. */
223: #define STRUCT_VALUE \
224: gen_rtx (MEM, Pmode, gen_rtx (PRE_DEC, Pmode, stack_pointer_rtx))
225:
226: /* Define the classes of registers for register constraints in the
227: machine description. Also define ranges of constants.
228:
229: One of the classes must always be named ALL_REGS and include all hard regs.
230: If there is more than one class, another class must be named NO_REGS
231: and contain no registers.
232:
233: The name GENERAL_REGS must be the name of a class (or an alias for
234: another name such as ALL_REGS). This is the class of registers
235: that is allowed by "g" or "r" in a register constraint.
236: Also, registers outside this class are allocated only when
237: instructions express preferences for them.
238:
239: The classes must be numbered in nondecreasing order; that is,
240: a larger-numbered class must never be contained completely
241: in a smaller-numbered class.
242:
243: For any two classes, it is very desirable that there be another
244: class that represents their union. */
245:
246:
247: enum reg_class {
248: NO_REGS, AREG, DREG, ADREG, CREG, BREG, Q_REGS, SIREG, DIREG,
249: INDEX_REGS, GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES };
250:
251: #define N_REG_CLASSES (int) LIM_REG_CLASSES
252:
253: /* Give names of register classes as strings for dump file. */
254:
255: #define REG_CLASS_NAMES \
256: { "NO_REGS", "AREG", "DREG", "ADREG", "CREG", "BREG","Q_REGS", \
257: "SIREG", "DIREG", \
258: "INDEX_REGS", "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS"}
259: /* Define which registers fit in which classes.
260: This is an initializer for a vector of HARD_REG_SET
261: of length N_REG_CLASSES. */
262:
263:
264:
265: #define REG_CLASS_CONTENTS {0, 0x1, 0x2, 0x3, 0x4, 0x8, 0xf,\
266: 0x10, 0x20, 0x7f, 0xff, 0x300, 0x3ff}
267:
268: /* The same information, inverted:
269: Return the class number of the smallest class containing
270: reg number REGNO. This could be a conditional expression
271: or could index an array. */
272:
273: #define REGNO_REG_CLASS(REGNO) \
274: ((REGNO) == 0 ? AREG : \
275: (REGNO) == 1 ? DREG : \
276: (REGNO) == 2 ? CREG : \
277: (REGNO) == 3 ? BREG : \
278: (REGNO) == 4 ? SIREG : \
279: (REGNO) == 5 ? DIREG : \
280: (REGNO) == 7 ? GENERAL_REGS : \
281: (REGNO) < 8 ? INDEX_REGS : \
282: FLOAT_REGS)
283:
284: #define NON_QI_REG_P(X) \
285: (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
286:
287: #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
288: #define FP_REGNO_P(n) ((n) >= FIRST_FLOAT_REG && (n) < FIRST_PSEUDO_REGISTER)
1.1.1.3 root 289:
290: /* This definition indicates that some register classes are very small,
291: which requires extra care in certain optimizations. */
292:
293: #define SMALL_REGISTER_CLASSES
294:
1.1 root 295: /* Try to maintain the accuracy of the death notes for regs satisfying the
296: following. Important for stack like regs, to know when to pop. */
297:
298: #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x)
299:
300: /* 1 if register REGNO can magically overlap other regs.
301: Note that nonzero values work only in very special circumstances.
302: We return 1 for an FP reg because "both" our FP regs
303: are really the same reg. */
304:
305: #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO)
306:
307: /* The class value for index registers, and the one for base regs. */
308:
309: #define INDEX_REG_CLASS INDEX_REGS
310: #define BASE_REG_CLASS GENERAL_REGS
311:
312: /* Get reg_class from a letter such as appears in the machine description. */
313:
314: #define REG_CLASS_FROM_LETTER(C) \
315: ((C) == 'r' ? GENERAL_REGS : \
316: (C) == 'q' ? Q_REGS : \
317: (C) == 'f' ? FLOAT_REGS : \
318: (C) == 'a' ? AREG : (C) == 'b' ? BREG : \
319: (C) == 'c' ? CREG : (C) == 'd' ? DREG : \
320: (C) == 'A' ? ADREG : \
321: (C) == 'S' ? SIREG : \
322: (C) == 'D' ? DIREG : NO_REGS)
323:
324: /* The letters I, J, K, L and M in a register constraint string
325: can be used to stand for particular ranges of immediate operands.
326: This macro defines what the ranges are.
327: C is the letter, and VALUE is a constant value.
328: Return 1 if VALUE is in the range specified by C.
329:
330: I is for the maximum shifts.
331: */
332:
333: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
334: ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 :0)
335:
336: /* Similar, but for floating constants, and defining letters G and H.
337: Here VALUE is the CONST_DOUBLE rtx itself. */
338:
339: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
340: ((C) == 'G' ? ! (TARGET_80387 && standard_80387_constant_p (VALUE)) : 1)
341:
342: /* Given an rtx X being reloaded into a reg required to be
343: in class CLASS, return the class of reg to actually use.
344: In general this is just CLASS; but on some machines
345: in some cases it is preferable to use a more restrictive class.
346: On the 80386 series, we prevent floating constants from being
347: reloaded into floating registers (since no move-insn can do that)
348: and we ensure that QImodes aren't reloaded into the esi or edi reg. */
349:
350: #define PREFERRED_RELOAD_CLASS(X,CLASS) \
351: (GET_CODE (X) == CONST_DOUBLE \
352: ? ((CLASS) == GENERAL_REGS || (CLASS) == ALL_REGS \
353: ? GENERAL_REGS : NO_REGS) \
354: : GET_MODE (X) == QImode \
355: ? ((CLASS) == GENERAL_REGS || (CLASS) == ALL_REGS \
356: ? Q_REGS \
357: : (CLASS) == INDEX_REGS ? (abort (), INDEX_REGS) \
358: : (CLASS)) \
359: : (CLASS))
360:
361: /* Return the maximum number of consecutive registers
362: needed to represent mode MODE in a register of class CLASS. */
363: /* On the 80386, this is the size of MODE in words,
364: except in the FP regs, where a single reg is always enough. */
365: #define CLASS_MAX_NREGS(CLASS, MODE) \
366: ((CLASS) == FLOAT_REGS ? 1 : \
367: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
368:
369: /* Stack layout; function entry, exit and calling. */
370:
371: /* Define this if pushing a word on the stack
372: makes the stack pointer a smaller address. */
373: #define STACK_GROWS_DOWNWARD
374:
375: /* Define this if the nominal address of the stack frame
376: is at the high-address end of the local variables;
377: that is, each additional local variable allocated
378: goes at a more negative offset in the frame. */
379: #define FRAME_GROWS_DOWNWARD
380:
381: /* Offset within stack frame to start allocating local variables at.
382: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
383: first local allocated. Otherwise, it is the offset to the BEGINNING
384: of the first local allocated. */
385: #define STARTING_FRAME_OFFSET 0
386:
387: /* If we generate an insn to push BYTES bytes,
388: this says how many the stack pointer really advances by.
389: On 386 pushw decrements by exactly 2 no matter what the position was.
390: On the 386 there is no pushb; we use pushw instead, and this
391: has the effect of rounding up to 2. */
392:
393: #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2))
394:
395: /* Offset of first parameter from the argument pointer register value. */
396: #define FIRST_PARM_OFFSET(FNDECL) 8
397:
398: /* Value is 1 if returning from a function call automatically
399: pops the arguments described by the number-of-args field in the call.
400: FUNTYPE is the data type of the function (as a tree),
401: or for a library call it is an identifier node for the subroutine name.
402:
403: On the 80386, the RTD insn may be used to pop them if the number
404: of args is fixed, but if the number is variable then the caller
405: must pop them all. RTD can't be used for library calls now
406: because the library is compiled with the Unix compiler.
407: Use of RTD is a selectable option, since it is incompatible with
408: standard Unix calling sequences. If the option is not selected,
409: the caller must always pop the args. */
410:
411: #define RETURN_POPS_ARGS(FUNTYPE) \
412: (TARGET_RTD && TREE_CODE (FUNTYPE) != IDENTIFIER_NODE \
413: && (TYPE_ARG_TYPES (FUNTYPE) == 0 \
414: || TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) == void_type_node))
415:
416: #define FUNCTION_VALUE(VALTYPE, FUNC) \
417: gen_rtx (REG, TYPE_MODE (VALTYPE), \
418: VALUE_REGNO(TYPE_MODE(VALTYPE)))
419:
420: /* Define how to find the value returned by a library function
421: assuming the value has mode MODE. */
422:
423: #define LIBCALL_VALUE(MODE) \
424: gen_rtx (REG, MODE, VALUE_REGNO(MODE))
425:
426: /* 1 if N is a possible register number for function argument passing.
427: On the 80386, no registers are used in this way.
428: *NOTE* -mregparm does not work.
429: It exists only to test register calling conventions. */
430:
431: #define FUNCTION_ARG_REGNO_P(N) 0
432: /* Define a data type for recording info about an argument list
433: during the scan of that argument list. This data type should
434: hold all necessary information about the function itself
435: and about the args processed so far, enough to enable macros
436: such as FUNCTION_ARG to determine where the next arg should go.
437:
438: On the 80386, this is a single integer, which is a number of bytes
439: of arguments scanned so far. */
440:
441: #define CUMULATIVE_ARGS int
442:
443: /* Initialize a variable CUM of type CUMULATIVE_ARGS
444: for a call to a function whose data type is FNTYPE.
445: For a library call, FNTYPE is 0.
446:
447: On the 80386, the offset starts at 0. */
448:
449: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE) \
450: ((CUM) = 0)
451:
452: /* Update the data in CUM to advance over an argument
453: of mode MODE and data type TYPE.
454: (TYPE is null for libcalls where that information may not be available.) */
455:
456: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
457: ((CUM) += ((MODE) != BLKmode \
458: ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
459: : (int_size_in_bytes (TYPE) + 3) & ~3))
460:
461: /* Define where to put the arguments to a function.
462: Value is zero to push the argument on the stack,
463: or a hard register in which to store the argument.
464:
465: MODE is the argument's machine mode.
466: TYPE is the data type of the argument (as a tree).
467: This is null for libcalls where that information may
468: not be available.
469: CUM is a variable of type CUMULATIVE_ARGS which gives info about
470: the preceding args and about the function being called.
471: NAMED is nonzero if this argument is a named parameter
472: (otherwise it is an extra parameter matching an ellipsis). */
473:
474:
475: /* On the 80386 all args are pushed, except if -mregparm is specified
476: then the first two words of arguments are passed in EAX, EDX.
477: *NOTE* -mregparm does not work.
478: It exists only to test register calling conventions. */
479:
480: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
481: ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
482:
483: /* For an arg passed partly in registers and partly in memory,
484: this is the number of registers used.
485: For args passed entirely in registers or entirely in memory, zero. */
486:
487:
488: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
489: ((TARGET_REGPARM && (CUM) < 8 \
490: && 8 < ((CUM) + ((MODE) == BLKmode \
491: ? int_size_in_bytes (TYPE) \
492: : GET_MODE_SIZE (MODE)))) \
493: ? 2 - (CUM) / 4 : 0)
494:
495: /* This macro generates the assembly code for function entry.
496: FILE is a stdio stream to output the code to.
497: SIZE is an int: how many units of temporary storage to allocate.
498: Refer to the array `regs_ever_live' to determine which registers
499: to save; `regs_ever_live[I]' is nonzero if register number I
500: is ever used in the function. This macro is responsible for
501: knowing which registers should not be saved even if used. */
502:
503: #define FUNCTION_PROLOGUE(FILE, SIZE) \
504: function_prologue (FILE, SIZE)
505:
506: /* Output assembler code to FILE to increment profiler label # LABELNO
507: for profiling a function entry. */
508:
509: #define FUNCTION_PROFILER(FILE, LABELNO) \
510: fprintf (FILE, "\tmovl $%sP%d,%%edx\n\tcall _mcount\n", LPREFIX, (LABELNO));
511:
512: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
513: the stack pointer does not matter. The value is tested only in
514: functions that have frame pointers.
515: No definition is equivalent to always zero. */
516: /* Note on the 386 it might be more efficient not to define this since
517: we have to restore it ourselves from the frame pointer, in order to
518: use pop */
519:
520: #define EXIT_IGNORE_STACK 1
521:
522: /* This macro generates the assembly code for function exit,
523: on machines that need it. If FUNCTION_EPILOGUE is not defined
524: then individual return instructions are generated for each
525: return statement. Args are same as for FUNCTION_PROLOGUE.
526:
527: The function epilogue should not depend on the current stack pointer!
528: It should use the frame pointer only. This is mandatory because
529: of alloca; we also take advantage of it to omit stack adjustments
530: before returning. */
531:
532: #define FUNCTION_EPILOGUE(FILE, SIZE) \
533: function_epilogue (FILE, SIZE)
534:
535: /* If the memory address ADDR is relative to the frame pointer,
536: correct it to be relative to the stack pointer instead.
537: This is for when we don't use a frame pointer.
538: ADDR should be a variable name. */
539:
540:
541: #define FIX_FRAME_POINTER_ADDRESS(ADDR,DEPTH) \
542: { int offset = -1; \
543: rtx regs = stack_pointer_rtx; \
544: if (ADDR == frame_pointer_rtx) \
545: offset = 0; \
546: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx \
547: && GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \
548: offset = INTVAL (XEXP (ADDR, 1)); \
549: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx) \
550: { rtx other_reg = XEXP (ADDR, 1); \
551: offset = 0; \
552: regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
553: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 1) == frame_pointer_rtx) \
554: { rtx other_reg = XEXP (ADDR, 0); \
555: offset = 0; \
556: regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
557: else if (GET_CODE (ADDR) == PLUS \
558: && GET_CODE (XEXP (ADDR, 0)) == PLUS \
559: && XEXP (XEXP (ADDR, 0), 0) == frame_pointer_rtx \
560: && GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \
561: { rtx other_reg = XEXP (XEXP (ADDR, 0), 1); \
562: offset = INTVAL (XEXP (ADDR, 1)); \
563: regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
564: else if (GET_CODE (ADDR) == PLUS \
565: && GET_CODE (XEXP (ADDR, 0)) == PLUS \
566: && XEXP (XEXP (ADDR, 0), 1) == frame_pointer_rtx \
567: && GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \
568: { rtx other_reg = XEXP (XEXP (ADDR, 0), 0); \
569: offset = INTVAL (XEXP (ADDR, 1)); \
570: regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
571: if (offset >= 0) \
572: { int regno; \
573: extern char call_used_regs[]; \
574: for (regno = FIRST_FLOAT_REG; regno < FIRST_PSEUDO_REGISTER; regno++)\
575: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
576: offset += 8; \
577: for (regno=0 ; regno <FIRST_FLOAT_REG ; regno++) \
578: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
579: offset += 4; \
580: offset -= 4; \
1.1.1.4 ! root 581: ADDR = plus_constant (regs, offset + (DEPTH)); } }
1.1 root 582:
583: /* Addressing modes, and classification of registers for them. */
584:
585: /* #define HAVE_POST_INCREMENT */
586: /* #define HAVE_POST_DECREMENT */
587:
588: /* #define HAVE_PRE_DECREMENT */
589: /* #define HAVE_PRE_INCREMENT */
590:
591: /* Macros to check register numbers against specific register classes. */
592:
593: /* These assume that REGNO is a hard or pseudo reg number.
594: They give nonzero only if REGNO is a hard reg of the suitable class
595: or a pseudo reg currently allocated to a suitable hard reg.
596: Since they use reg_renumber, they are safe only once reg_renumber
597: has been allocated, which happens in local-alloc.c. */
598:
599: #define REGNO_OK_FOR_INDEX_P(REGNO) \
600: ((REGNO) < STACK_POINTER_REGNUM || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
601: #define REGNO_OK_FOR_BASE_P(REGNO) \
602: ((REGNO) <= STACK_POINTER_REGNUM || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
603:
604: #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
605: #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
606:
607: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
608: and check its validity for a certain class.
609: We have two alternate definitions for each of them.
610: The usual definition accepts all pseudo regs; the other rejects
611: them unless they have been allocated suitable hard regs.
612: The symbol REG_OK_STRICT causes the latter definition to be used.
613:
614: Most source files want to accept pseudo regs in the hope that
615: they will get allocated to the class that the insn wants them to be in.
616: Source files for reload pass need to be strict.
617: After reload, it makes no difference, since pseudo regs have
618: been eliminated by then. */
619:
620: #ifndef REG_OK_STRICT
621:
622: /* Nonzero if X is a hard reg that can be used as an index or if
623: it is a pseudo reg. */
624: #define REG_OK_FOR_INDEX_P(X) (REGNO (X) < STACK_POINTER_REGNUM || REGNO (X) >= FIRST_PSEUDO_REGISTER)
625: /* Nonzero if X is a hard reg that can be used as a base reg
626: of if it is a pseudo reg. */
627: /* ?wfs */
628: #define REG_OK_FOR_BASE_P(X) (REGNO (X) <= STACK_POINTER_REGNUM || REGNO(X) >= FIRST_PSEUDO_REGISTER)
629: #define REG_OK_FOR_STRREG_P(X) \
630: (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
631:
632: #else
633:
634: /* Nonzero if X is a hard reg that can be used as an index. */
635: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
636: /* Nonzero if X is a hard reg that can be used as a base reg. */
637: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
638: #define REG_OK_FOR_STRREG_P(X) \
639: (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))
640:
641: #endif
642:
643: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
644: that is a valid memory address for an instruction.
645: The MODE argument is the machine mode for the MEM expression
646: that wants to use this address.
647:
648: The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
649: except for CONSTANT_ADDRESS_P which is usually machine-independent. */
650:
651: #define MAX_REGS_PER_ADDRESS 2
652:
653: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
654:
655: /* Nonzero if the constant value X is a legitimate general operand.
656: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
657:
658: #define LEGITIMATE_CONSTANT_P(X) 1
659:
660: #define GO_IF_INDEXABLE_BASE(X, ADDR) \
661: if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR
662:
663: #define LEGITIMATE_INDEX_REG_P(X) \
664: (GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X))
665:
666: /* Return 1 if X is an index or an index times a scale. */
667:
668: #define LEGITIMATE_INDEX_P(X) \
669: (LEGITIMATE_INDEX_REG_P (X) \
670: || (GET_CODE (X) == MULT \
671: && LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \
672: && GET_CODE (XEXP (X, 1)) == CONST_INT \
673: && (INTVAL (XEXP (X, 1)) == 2 \
674: || INTVAL (XEXP (X, 1)) == 4 \
675: || INTVAL (XEXP (X, 1)) == 8)))
676:
677: /* Go to ADDR if X is an index term, a base reg, or a sum of those. */
678:
679: #define GO_IF_INDEXING(X, ADDR) \
680: { if (LEGITIMATE_INDEX_P (X)) goto ADDR; \
681: GO_IF_INDEXABLE_BASE (X, ADDR); \
682: if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \
683: { GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \
684: if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \
685: { GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } }
686:
687: /* We used to allow this, but it isn't ever used.
688: || ((GET_CODE (X) == POST_DEC || GET_CODE (X) == POST_INC) \
689: && REG_P (XEXP (X, 0)) \
690: && REG_OK_FOR_STRREG_P (XEXP (X, 0))) \
691: */
692:
693: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
694: { if (CONSTANT_ADDRESS_P (X)) goto ADDR; \
695: GO_IF_INDEXING (X, ADDR); \
696: if (GET_CODE (X) == PLUS) \
697: { if (CONSTANT_ADDRESS_P (XEXP (X, 1))) \
698: GO_IF_INDEXING (XEXP (X, 0), ADDR); \
699: if (CONSTANT_ADDRESS_P (XEXP (X, 0))) \
700: GO_IF_INDEXING (XEXP (X, 1), ADDR); } }
701:
702: /* Try machine-dependent ways of modifying an illegitimate address
703: to be legitimate. If we find one, return the new, valid address.
704: This macro is used in only one place: `memory_address' in explow.c.
705:
706: OLDX is the address as it was before break_out_memory_refs was called.
707: In some cases it is useful to look at this to decide what needs to be done.
708:
709: MODE and WIN are passed so that this macro can use
710: GO_IF_LEGITIMATE_ADDRESS.
711:
712: It is always safe for this macro to do nothing. It exists to recognize
713: opportunities to optimize the output.
714:
715: For the 80386, we handle X+REG by loading X into a register R and
716: using R+REG. R will go in a general reg and indexing will be used.
717: However, if REG is a broken-out memory address or multiplication,
718: nothing needs to be done because REG can certainly go in a general reg. */
719:
720: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
721: { register int ch = (X) != (OLDX); \
722: if (GET_CODE (X) == PLUS) \
723: { if (GET_CODE (XEXP (X, 0)) == MULT) \
724: ch = 1, XEXP (X, 0) = force_operand (XEXP (X, 0), 0); \
725: if (GET_CODE (XEXP (X, 1)) == MULT) \
726: ch = 1, XEXP (X, 1) = force_operand (XEXP (X, 1), 0); \
727: if (ch && GET_CODE (XEXP (X, 1)) == REG \
728: && GET_CODE (XEXP (X, 0)) == REG) \
729: return X; \
730: if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \
731: if (GET_CODE (XEXP (X, 0)) == REG \
732: || (GET_CODE (XEXP (X, 0)) == SIGN_EXTEND \
733: && GET_CODE (XEXP (XEXP (X, 0), 0)) == REG \
734: && GET_MODE (XEXP (XEXP (X, 0), 0)) == HImode)) \
735: { register rtx temp = gen_reg_rtx (Pmode); \
736: register rtx val = force_operand (XEXP (X, 1), temp); \
737: if (val != temp) emit_move_insn (temp, val, 0); \
738: XEXP (X, 1) = temp; \
739: return X; } \
740: else if (GET_CODE (XEXP (X, 1)) == REG \
741: || (GET_CODE (XEXP (X, 1)) == SIGN_EXTEND \
742: && GET_CODE (XEXP (XEXP (X, 1), 0)) == REG \
743: && GET_MODE (XEXP (XEXP (X, 1), 0)) == HImode)) \
744: { register rtx temp = gen_reg_rtx (Pmode); \
745: register rtx val = force_operand (XEXP (X, 0), temp); \
746: if (val != temp) emit_move_insn (temp, val, 0); \
747: XEXP (X, 0) = temp; \
748: return X; }}}
749:
750: /* Go to LABEL if ADDR (a legitimate address expression)
751: has an effect that depends on the machine mode it is used for.
752: On the 80386, only postdecrement and postincrement address depend thus
753: (the amount of decrement or increment being the length of the operand). */
754: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
755: if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
756:
757: /* Specify the machine mode that this machine uses
758: for the index in the tablejump instruction. */
759: #define CASE_VECTOR_MODE Pmode
760:
761: /* Define this if the tablejump instruction expects the table
762: to contain offsets from the address of the table.
763: Do not define this if the table should contain absolute addresses. */
764: /* #define CASE_VECTOR_PC_RELATIVE */
765:
766: /* Specify the tree operation to be used to convert reals to integers.
767: This should be changed to take advantage of fist --wfs ??
768: */
769: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
770:
771: /* This is the kind of divide that is easiest to do in the general case. */
772: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
773:
774: /* Define this as 1 if `char' should by default be signed; else as 0. */
775: #define DEFAULT_SIGNED_CHAR 1
776:
777: /* Max number of bytes we can move from memory to memory
778: in one reasonably fast instruction. */
779: #define MOVE_MAX 4
780:
781: /* Define this if zero-extension is slow (more than one real instruction). */
782: /* #define SLOW_ZERO_EXTEND */
783:
784: /* Nonzero if access to memory by bytes is slow and undesirable. */
785: #define SLOW_BYTE_ACCESS 0
786:
787: /* Define if shifts truncate the shift count
788: which implies one can omit a sign-extension or zero-extension
789: of a shift count. */
790: #define SHIFT_COUNT_TRUNCATED
791:
792: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
793: is done just by pretending it is already truncated. */
794: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
795:
796: /* We assume that the store-condition-codes instructions store 0 for false
797: and some other value for true. This is the value stored for true. */
798:
799: #define STORE_FLAG_VALUE 1
800:
801: /* When a prototype says `char' or `short', really pass an `int'.
802: (The 386 can't easily push less than an int.) */
803:
804: #define PROMOTE_PROTOTYPES
805:
806: /* Specify the machine mode that pointers have.
807: After generation of rtl, the compiler makes no further distinction
808: between pointers and any other objects of this machine mode. */
809: #define Pmode SImode
810:
811: /* A function address in a call instruction
812: is a byte address (for indexing purposes)
813: so give the MEM rtx a byte's mode. */
814: #define FUNCTION_MODE QImode
815:
816: /* Define this if addresses of constant functions
817: shouldn't be put through pseudo regs where they can be cse'd.
818: Desirable on the 386 because a CALL with a constant address is
819: not much slower than one with a register address. */
820: #define NO_FUNCTION_CSE
821:
822: /* Compute the cost of computing a constant rtl expression RTX
823: whose rtx-code is CODE. The body of this macro is a portion
824: of a switch statement. If the code is computed here,
825: return it with a return statement. Otherwise, break from the switch. */
826:
827: #define CONST_COSTS(RTX,CODE) \
828: case CONST_INT: \
829: if (RTX == const0_rtx) return 0; \
830: if ((unsigned) INTVAL (RTX) < 077) return 1; \
831: case CONST: \
832: case LABEL_REF: \
833: case SYMBOL_REF: \
834: return 3; \
835: case CONST_DOUBLE: \
836: return 5; \
837: case PLUS: \
838: if (GET_CODE (XEXP (RTX, 0)) == REG \
839: && GET_CODE (XEXP (RTX, 1)) == CONST_INT) \
840: return 2;
841:
842: /* Tell final.c how to eliminate redundant test instructions. */
843:
844: /* ??? Find a better place to put this. */
845: #if 0
846: #define FINAL_PRESCAN_INSN(INSN, OPERANDS, NOPERANDS) \
847: fp_hook (INSN, OPERANDS, NOPERANDS)
848: #endif
849:
850: /* Here we define machine-dependent flags and fields in cc_status
851: (see `conditions.h'). */
852:
853: /* Set if the cc value is actually in the 80387, so a floating point
854: conditional branch must be output. */
855: #define CC_IN_80387 04000
856:
857: /* Store in cc_status the expressions
858: that the condition codes will describe
859: after execution of an instruction whose pattern is EXP.
860: Do not alter them if the instruction would not alter the cc's. */
861:
862: #define NOTICE_UPDATE_CC(EXP, INSN) \
863: notice_update_cc((EXP))
864:
865: /* Output a signed jump insn. Use template NORMAL ordinarily, or
866: FLOAT following a floating point comparison.
867: Use NO_OV following an arithmetic insn that set the cc's
868: before a test insn that was deleted.
869: NO_OV may be zero, meaning final should reinsert the test insn
870: because the jump cannot be handled properly without it. */
871:
872: #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
873: { \
1.1.1.4 ! root 874: if (cc_prev_status.flags & CC_IN_80387) \
1.1 root 875: return FLOAT; \
1.1.1.4 ! root 876: if (cc_prev_status.flags & CC_NO_OVERFLOW) \
1.1 root 877: return NO_OV; \
878: return NORMAL; \
879: }
880:
881: /* Control the assembler format that we output. */
882:
883: #ifdef ATT
884: #include <syms.h>
885: #else
886: #define FILNMLEN 14
887: #endif
888:
889: /* How to refer to registers in assembler output.
890: This sequence is indexed by compiler's hard-register-number (see above). */
891:
892: /* In order to refer to the first 8 regs as 32 bit regs prefix an "e"
893: For non floating point regs, the following are the HImode names.
894: */
895:
896:
897: #define HI_REGISTER_NAMES \
898: {"ax","dx","cx","bx","si","di","bp","sp", \
899: "st","st(1)"}
900: /* ,"st(2)","st(3)","st(4)","st(5)" } */
901: #define REGISTER_NAMES HI_REGISTER_NAMES
902:
903: /* Note we are omitting these since currently I don't know how
904: to get gcc to use these, since they want the same but different
905: number as al, and ax.
906: */
907:
908: /* note the last four are not really qi_registsers, but
909: the md will have to never output movb into one of them
910: only a movw . There is no movb into the hardware reg
911: esi that I can find */
912:
913: #define QI_REGISTER_NAMES \
914: {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",}
915:
916: /*
917: Don't know how to use these, yet. They overlap with ax,dx,cx,bx
918: and so would clobber al,dl,cl,bl
919: #define QI_REGISTER_NAMES_TOP \
920: {"ah", \
921: "dh", \
922: "ch", \
923: "bh", }
924: */
925:
926: /* How to renumber registers for dbxand gdb. */
927:
928: /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */
929: #define DBX_REGISTER_NUMBER(n) \
930: ((n)==0?0 :(n)==1?2 :(n)==2?1 :(n)==3?3 :(n)==4?6 :(n)==5?7 :(n)==6?4 :(n)==7?5 :(n)==8?12 :(n)==9?12 :(n))
931:
932: /* This is how to output the definition of a user-level label named NAME,
933: such as the label on a static function or variable NAME. */
934:
935: #define ASM_OUTPUT_LABEL(FILE,NAME) \
936: (assemble_name (FILE, NAME), fputs (":\n", FILE))
937:
938: /* This is how to output an assembler line defining a `double' constant. */
939:
940: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
941: fprintf (FILE, "%s%.22e\n",ASM_DOUBLE, (VALUE))
942:
943:
944: /* This is how to output an assembler line defining a `float' constant. */
945:
946: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
947: do { union { float f; long l;} tem; \
948: tem.f = (VALUE); \
949: fputs(ASM_LONG,FILE); \
950: fprintf((FILE), "0x%x\n", tem.l); \
951: } while (0)
952:
953:
954: /* Store in OUTPUT a string (made with alloca) containing
955: an assembler-name for a local static variable named NAME.
956: LABELNO is an integer which is different for each call. */
957:
958: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
959: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
960: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
961:
962:
963:
964: /* This is how to output an assembler line defining an `int' constant. */
965:
966: #define ASM_OUTPUT_INT(FILE,VALUE) \
967: ( fprintf (FILE,ASM_LONG), \
968: output_addr_const (FILE,(VALUE)), \
969: putc('\n',FILE))
970:
971: /* Likewise for `char' and `short' constants. */
972: /* is this supposed to do align too?? */
973:
974: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
975: ( fprintf (FILE,ASM_SHORT), \
976: output_addr_const (FILE,(VALUE)), \
977: putc('\n',FILE))
978:
979: /*
980: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
981: ( fputs (ASM_BYTE,FILE), \
982: output_addr_const (FILE,(VALUE)), \
983: fputs ( ",",FILE), \
984: output_addr_const (FILE,(VALUE)), \
985: fputs (" >> 8\n",FILE))
986: */
987:
988:
989: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
990: ( fprintf (FILE, ASM_BYTE), \
991: output_addr_const (FILE,(VALUE)), \
992: putc('\n',FILE))
993:
994: /* This is how to output an assembler line for a numeric constant byte. */
995:
996: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
997: fprintf ((FILE), "%s0x%x\n", ASM_BYTE, (VALUE))
998:
999: /* This is how to output an insn to push a register on the stack.
1000: It need not be very fast code. */
1001:
1002: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1003: fprintf (FILE, "\tpushl e%s\n", reg_names[REGNO])
1004:
1005: /* This is how to output an insn to pop a register from the stack.
1006: It need not be very fast code. */
1007:
1008: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1009: fprintf (FILE, "\tpopl e%s\n", reg_names[REGNO])
1010:
1011: /* This is how to output an element of a case-vector that is absolute.
1012: */
1013:
1014: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1015: fprintf (FILE, "%s%s%d\n",ASM_LONG,LPREFIX, VALUE)
1016:
1017: /* This is how to output an element of a case-vector that is relative.
1018: We don't use these on the 386 yet, because the ATT assembler can't do
1019: forward reference the differences.
1020: */
1021:
1022: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) abort(); \
1023: fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
1024:
1025: /* Define the parentheses used to group arithmetic operations
1026: in assembler code. */
1027:
1028: #define ASM_OPEN_PAREN ""
1029: #define ASM_CLOSE_PAREN ""
1030:
1031: /* Define results of standard character escape sequences. */
1032: #define TARGET_BELL 007
1033: #define TARGET_BS 010
1034: #define TARGET_TAB 011
1035: #define TARGET_NEWLINE 012
1036: #define TARGET_VT 013
1037: #define TARGET_FF 014
1038: #define TARGET_CR 015
1039:
1040: /* Print operand X (an rtx) in assembler syntax to file FILE.
1041: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1042: The CODE z takes the size of operand from the following digit, and
1043: outputs b,w,or l respectively.
1044:
1045: On the 80386, we use several such letters:
1046: f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
1047: L,W,B,Q,S -- print the opcode suffix for specified size of operand.
1048: R -- print the prefix for register names.
1049: z -- print the opcode suffix for the size of the current operand.
1050: * -- print a star (in certain assembler syntax)
1051: w -- print the operand as if it's a "word" (HImode) even if it isn't.
1.1.1.2 root 1052: w -- print the operand as if it's a byte (QImode) even if it isn't.
1.1 root 1053: c -- don't print special prefixes before constant operands. */
1054:
1055: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1056: ((CODE) == '*')
1057:
1058: #define PRINT_OPERAND(FILE, X, CODE) \
1059: print_operand (FILE, X, CODE)
1060:
1061:
1062: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1063: print_operand_address (FILE, ADDR)
1064:
1065: /* Routines in gnulib that return floats must return them in an fp reg,
1066: just as other functions do which return such values.
1067: These macros make that happen. */
1068:
1069: #define SFVALUE float
1070: #define INTIFY(FLOATVAL) FLOATVAL
1071:
1072: /* Nonzero if INSN magically clobbers register REGNO. */
1073:
1074: #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \
1075: (FP_REGNO_P (REGNO) \
1076: && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
1077:
1078: /* a letter which is not needed by the normal asm syntax, which
1079: we can use for operand syntax in the extended asm */
1080:
1081: #define ASM_OPERAND_LETTER '#'
1082:
1083:
1084: /*
1085: Local variables:
1086: version-control: t
1087: End:
1088: */
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