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1.1 root 1: /* Definitions of target machine for GNU compiler, for Intel 860.
2: Copyright (C) 1989 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
6: GNU CC is free software; you can redistribute it and/or modify
7: it under the terms of the GNU General Public License as published by
8: the Free Software Foundation; either version 1, or (at your option)
9: any later version.
10:
11: GNU CC is distributed in the hope that it will be useful,
12: but WITHOUT ANY WARRANTY; without even the implied warranty of
13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14: GNU General Public License for more details.
15:
16: You should have received a copy of the GNU General Public License
17: along with GNU CC; see the file COPYING. If not, write to
18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19:
20:
21: /* Note that some other tm- files include this one and then override
22: many of the definitions that relate to assembler syntax. */
23:
24:
25: /* Names to predefine in the preprocessor for this target machine. */
26:
27: #define CPP_PREDEFINES "-Di860 -Dunix"
28:
29: /* Print subsidiary information on the compiler version in use. */
30: #define TARGET_VERSION fprintf (stderr, " (i860)");
31:
32: /* Run-time compilation parameters selecting different hardware subsets.
33:
34: On the i860, we have one: TARGET_FPU. */
35:
36: extern int target_flags;
37:
38: /* Nonzero if we should generate code to use the fpu. */
39: #define TARGET_FPU (target_flags & 1)
40:
41: /* Macro to define tables used to set the flags.
42: This is a list in braces of pairs in braces,
43: each pair being { "NAME", VALUE }
44: where VALUE is the bits to set or minus the bits to clear.
45: An empty string NAME is used to identify the default VALUE. */
46:
47: #define TARGET_SWITCHES \
48: { {"fpu", 1}, \
49: {"soft-float", -1}, \
50: { "", TARGET_DEFAULT}}
51:
52: #define TARGET_DEFAULT 1
53:
54: /* target machine storage layout */
55:
56: /* Define this if most significant bit is lowest numbered
57: in instructions that operate on numbered bit-fields.
58: This is a moot question on the i860 due to the lack of bit-field insns. */
59: /* #define BITS_BIG_ENDIAN */
60:
61: /* Define this if most significant byte of a word is the lowest numbered. */
62: /* That is not true on i860 in the mode we will use. */
63: /* #define BYTES_BIG_ENDIAN */
64:
65: /* Define this if most significant word of a multiword number is numbered. */
66: /* For the i860 this goes with BYTES_BIG_ENDIAN. */
67: /* #define WORDS_BIG_ENDIAN */
68:
69: /* number of bits in an addressible storage unit */
70: #define BITS_PER_UNIT 8
71:
72: /* Width in bits of a "word", which is the contents of a machine register.
73: Note that this is not necessarily the width of data type `int';
74: if using 16-bit ints on a 68000, this would still be 32.
75: But on a machine with 16-bit registers, this would be 16. */
76: #define BITS_PER_WORD 32
77:
78: /* Width of a word, in units (bytes). */
79: #define UNITS_PER_WORD 4
80:
81: /* Width in bits of a pointer.
82: See also the macro `Pmode' defined below. */
83: #define POINTER_SIZE 32
84:
85: /* Allocation boundary (in *bits*) for storing pointers in memory. */
86: #define POINTER_BOUNDARY 32
87:
88: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
89: #define PARM_BOUNDARY 32
90:
91: /* Boundary (in *bits*) on which stack pointer should be aligned. */
92: #define STACK_BOUNDARY 128
93:
94: /* Allocation boundary (in *bits*) for the code of a function. */
95: #define FUNCTION_BOUNDARY 32
96:
97: /* Alignment of field after `int : 0' in a structure. */
98: #define EMPTY_FIELD_BOUNDARY 32
99:
100: /* Every structure's size must be a multiple of this. */
101: #define STRUCTURE_SIZE_BOUNDARY 8
102:
103: /* No data type wants to be aligned rounder than this. */
104: #define BIGGEST_ALIGNMENT 64
105:
106: /* Define this if move instructions will actually fail to work
107: when given unaligned data. */
108: #define STRICT_ALIGNMENT
109:
110: /* If bit field type is int, dont let it cross an int,
111: and give entire struct the alignment of an int. */
112: #define PCC_BITFIELD_TYPE_MATTERS
113:
114: /* Standard register usage. */
115:
116: /* Number of actual hardware registers.
117: The hardware registers are assigned numbers for the compiler
118: from 0 to just below FIRST_PSEUDO_REGISTER.
119: All registers that the compiler knows about must be given numbers,
120: even those that are not normally considered general registers.
121:
122: i860 has 32 fullword registers and 32 floating point registers. */
123:
124: #define FIRST_PSEUDO_REGISTER 64
125:
126: /* 1 for registers that have pervasive standard uses
127: and are not available for the register allocator.
128: On the i860, this includes the always-0 registers
129: and fp, sp, and the return address.
130: Also r31, used for special purposes for constant addresses. */
131: #define FIXED_REGISTERS \
132: {1, 1, 1, 1, 0, 0, 0, 0, \
133: 0, 0, 0, 0, 0, 0, 0, 0, \
134: 0, 0, 0, 0, 0, 0, 0, 0, \
135: 0, 0, 0, 0, 0, 0, 0, 1, \
136: 1, 1, 0, 0, 0, 0, 0, 0, \
137: 0, 0, 0, 0, 0, 0, 0, 0, \
138: 0, 0, 0, 0, 0, 0, 0, 0, \
139: 0, 0, 0, 0, 0, 0, 0, 0}
140:
141: /* 1 for registers not available across function calls.
142: These must include the FIXED_REGISTERS and also any
143: registers that can be used without being saved.
144: On the i860, these are r0-r3, r16-r31, f0, f1, and f16-f31. */
145: #define CALL_USED_REGISTERS \
146: {1, 1, 1, 1, 0, 0, 0, 0, \
147: 0, 0, 0, 0, 0, 0, 0, 0, \
148: 1, 1, 1, 1, 1, 1, 1, 1, \
149: 1, 1, 1, 1, 1, 1, 1, 1, \
150: 1, 1, 0, 0, 0, 0, 0, 0, \
151: 1, 1, 1, 1, 1, 1, 1, 1, \
152: 1, 1, 1, 1, 1, 1, 1, 1, \
153: 1, 1, 1, 1, 1, 1, 1, 1}
154:
155: #define REG_ALLOC_ORDER \
156: {16, 17, 18, 19, 20, 21, 22, 23, \
157: 24, 25, 26, 27, 28, 29, 30, 31, \
158: 0, 1, 2, 3, 4, 5, 6, 7, \
159: 8, 9, 10, 11, 12, 13, 14, 15, \
160: 40, 41, 42, 43, 44, 45, 46, 47, \
161: 48, 49, 50, 51, 52, 53, 54, 55, \
162: 56, 57, 58, 59, 60, 61, 62, 63, \
163: 32, 33, 34, 35, 36, 37, 38, 39}
164:
165: /* Return number of consecutive hard regs needed starting at reg REGNO
166: to hold something of mode MODE.
167: This is ordinarily the length in words of a value of mode MODE
168: but can be less for certain modes in special long registers.
169:
170: On the i860, all registers hold 32 bits worth. */
171: #define HARD_REGNO_NREGS(REGNO, MODE) \
172: (((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
173:
174: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
175: On the i860, any register can hold anything, provided it is properly
176: aligned. */
177: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
178: (((GET_MODE_SIZE ((MODE)) <= 4) || ((REGNO) & 1) == 0) \
179: && ((REGNO) < 32 || TARGET_FPU))
180:
181: /* Value is 1 if it is a good idea to tie two pseudo registers
182: when one has mode MODE1 and one has mode MODE2.
183: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
184: for any hard reg, then this must be 0 for correct output. */
185: /* I think that is not always true; alignment restrictions for doubles
186: should not prevent tying them with singles. So try allowing that.
187: On the other hand, don't let fixed and floating be tied;
188: this restriction is not necessary, but may make better code. */
189: #define MODES_TIEABLE_P(MODE1, MODE2) \
190: ((GET_MODE_CLASS ((MODE1)) == MODE_FLOAT) \
191: == (GET_MODE_CLASS ((MODE2)) == MODE_FLOAT))
192:
193: /* Specify the registers used for certain standard purposes.
194: The values of these macros are register numbers. */
195:
196: /* i860 pc isn't overloaded on a register that the compiler knows about. */
197: /* #define PC_REGNUM */
198:
199: /* Register to use for pushing function arguments. */
200: #define STACK_POINTER_REGNUM 2
201:
202: /* Base register for access to local variables of the function. */
203: #define FRAME_POINTER_REGNUM 3
204:
205: /* Value should be nonzero if functions must have frame pointers.
206: Zero means the frame pointer need not be set up (and parms
207: may be accessed via the stack pointer) in functions that seem suitable.
208: This is computed in `reload', in reload1.c. */
209: #define FRAME_POINTER_REQUIRED 1
210:
211: /* Base register for access to arguments of the function. */
212: #define ARG_POINTER_REGNUM 28
213:
214: /* Register in which static-chain is passed to a function. */
215: #define STATIC_CHAIN_REGNUM 29
216:
217: /* Register in which address to store a structure value
218: is passed to a function. */
219: #define STRUCT_VALUE_REGNUM 16
220:
221: /* Define the classes of registers for register constraints in the
222: machine description. Also define ranges of constants.
223:
224: One of the classes must always be named ALL_REGS and include all hard regs.
225: If there is more than one class, another class must be named NO_REGS
226: and contain no registers.
227:
228: The name GENERAL_REGS must be the name of a class (or an alias for
229: another name such as ALL_REGS). This is the class of registers
230: that is allowed by "g" or "r" in a register constraint.
231: Also, registers outside this class are allocated only when
232: instructions express preferences for them.
233:
234: The classes must be numbered in nondecreasing order; that is,
235: a larger-numbered class must never be contained completely
236: in a smaller-numbered class.
237:
238: For any two classes, it is very desirable that there be another
239: class that represents their union. */
240:
241: /* The i860 has two kinds of registers, hence four classes. */
242:
243: enum reg_class { NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES };
244:
245: #define N_REG_CLASSES (int) LIM_REG_CLASSES
246:
247: /* Give names of register classes as strings for dump file. */
248:
249: #define REG_CLASS_NAMES \
250: {"NO_REGS", "GENERAL_REGS", "FP_REGS", "ALL_REGS" }
251:
252: /* Define which registers fit in which classes.
253: This is an initializer for a vector of HARD_REG_SET
254: of length N_REG_CLASSES. */
255:
256: #define REG_CLASS_CONTENTS \
257: {{0, 0}, {0xffffffff, 0}, \
258: {0, 0xffffffff}, {0xffffffff, 0xffffffff}}
259:
260: /* The same information, inverted:
261: Return the class number of the smallest class containing
262: reg number REGNO. This could be a conditional expression
263: or could index an array. */
264:
265: #define REGNO_REG_CLASS(REGNO) \
266: ((REGNO) >= 32 ? FP_REGS : GENERAL_REGS)
267:
268: /* The class value for index registers, and the one for base regs. */
269: #define INDEX_REG_CLASS GENERAL_REGS
270: #define BASE_REG_CLASS GENERAL_REGS
271:
272: /* Get reg_class from a letter such as appears in the machine description. */
273:
274: #define REG_CLASS_FROM_LETTER(C) \
275: ((C) == 'f' ? FP_REGS : NO_REGS)
276:
277: /* The letters I, J, K, L and M in a register constraint string
278: can be used to stand for particular ranges of immediate operands.
279: This macro defines what the ranges are.
280: C is the letter, and VALUE is a constant value.
281: Return 1 if VALUE is in the range specified by C.
282:
283: For the i860, `I' is used for the range of constants
284: an add/subtract insn can actually contain.
285: But not including -0x8000, since we need
286: to negate the constant sometimes.
287: `J' is used for the range which is just zero (since that is R0).
288: `K' is used for the range allowed in bte.
289: `L' is used for the range allowed in logical insns. */
290:
291: #define SMALL_INT(X) ((unsigned) (INTVAL (X) + 0x7fff) < 0xffff)
292:
293: #define LOGIC_INT(X) ((unsigned) INTVAL (X) < 0x10000)
294:
295: #define SMALL_INTVAL(X) ((unsigned) ((X) + 0x7fff) < 0xffff)
296:
297: #define LOGIC_INTVAL(X) ((unsigned) (X) < 0x10000)
298:
299: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
300: ((C) == 'I' ? ((unsigned) (VALUE) + 0x7fff) < 0xffff \
301: : (C) == 'J' ? (VALUE) == 0 \
302: : (C) == 'K' ? (unsigned) (VALUE) < 0x20 \
303: : (C) == 'L' ? (unsigned) (VALUE) < 0x10000 \
304: : 0)
305:
306: /* Similar, but for floating constants, and defining letters G and H.
307: Here VALUE is the CONST_DOUBLE rtx itself. */
308:
309: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
310: ((C) == 'G' && CONST_DOUBLE_LOW ((VALUE)) == 0 \
311: && CONST_DOUBLE_HIGH ((VALUE)) == 0)
312:
313: /* Given an rtx X being reloaded into a reg required to be
314: in class CLASS, return the class of reg to actually use.
315: In general this is just CLASS; but on some machines
316: in some cases it is preferable to use a more restrictive class. */
317: #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
318:
319: /* Return the maximum number of consecutive registers
320: needed to represent mode MODE in a register of class CLASS. */
321: /* On the i860, this is the size of MODE in words. */
322: #define CLASS_MAX_NREGS(CLASS, MODE) \
323: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
324:
325: /* Stack layout; function entry, exit and calling. */
326:
327: /* Define this if pushing a word on the stack
328: makes the stack pointer a smaller address. */
329: #define STACK_GROWS_DOWNWARD
330:
331: /* Define this if the nominal address of the stack frame
332: is at the high-address end of the local variables;
333: that is, each additional local variable allocated
334: goes at a more negative offset in the frame. */
335: #define FRAME_GROWS_DOWNWARD
336:
337: /* Offset within stack frame to start allocating local variables at.
338: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
339: first local allocated. Otherwise, it is the offset to the BEGINNING
340: of the first local allocated. */
341: #define STARTING_FRAME_OFFSET 0
342:
343: /* If we generate an insn to push BYTES bytes,
344: this says how many the stack pointer really advances by.
345: On the i860, don't define this because there are no push insns. */
346: /* #define PUSH_ROUNDING(BYTES) */
347:
348: /* Offset of first parameter from the argument pointer register value. */
349: #define FIRST_PARM_OFFSET(FNDECL) 0
350:
351: /* Value is 1 if returning from a function call automatically
352: pops the arguments described by the number-of-args field in the call.
353: FUNTYPE is the data type of the function (as a tree),
354: or for a library call it is an identifier node for the subroutine name. */
355:
356: #define RETURN_POPS_ARGS(FUNTYPE) 0
357:
358: /* Define how to find the value returned by a function.
359: VALTYPE is the data type of the value (as a tree).
360: If the precise function being called is known, FUNC is its FUNCTION_DECL;
361: otherwise, FUNC is 0. */
362:
363: /* On the i860, the value register depends on the mode. */
364:
365: #define FUNCTION_VALUE(VALTYPE, FUNC) \
366: gen_rtx (REG, TYPE_MODE (VALTYPE), \
367: (GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_FLOAT \
368: ? 40 : 16))
369:
370: /* Define how to find the value returned by a library function
371: assuming the value has mode MODE. */
372:
373: #define LIBCALL_VALUE(MODE) \
374: gen_rtx (REG, MODE, \
375: (GET_MODE_CLASS ((MODE)) == MODE_FLOAT \
376: ? 40 : 16))
377:
378: /* 1 if N is a possible register number for a function value
379: as seen by the caller. */
380:
381: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 40 || (N) == 16)
382:
383: /* 1 if N is a possible register number for function argument passing.
384: On the i860, these are r16-r27 and f8-f15. */
385:
386: #define FUNCTION_ARG_REGNO_P(N) \
387: (((N) < 28 && (N) > 15) || ((N) < 48 && (N) >= 40))
388:
389: /* Define a data type for recording info about an argument list
390: during the scan of that argument list. This data type should
391: hold all necessary information about the function itself
392: and about the args processed so far, enough to enable macros
393: such as FUNCTION_ARG to determine where the next arg should go.
394:
395: On the i860, we must count separately the number of general registers used
396: and the number of float registers used. */
397:
398: #define CUMULATIVE_ARGS struct { int ints, floats; }
399:
400: /* Initialize a variable CUM of type CUMULATIVE_ARGS
401: for a call to a function whose data type is FNTYPE.
402: For a library call, FNTYPE is 0.
403:
404: On the i860, the general-reg offset normally starts at 0,
405: but starts at 4 bytes
406: when the function gets a structure-value-address as an
407: invisible first argument. */
408:
409: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE) \
410: ((CUM).ints = ((FNTYPE) != 0 && TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
411: ? 4 : 0), \
412: (CUM).floats = 0)
413:
414: /* Machine-specific subroutines of the following macros. */
415: #define CEILING(X,Y) (((X) + (Y) - 1) / (Y))
416: #define ROUNDUP(X,Y) (CEILING ((X), (Y)) * (Y))
417:
418: /* Update the data in CUM to advance over an argument
419: of mode MODE and data type TYPE.
420: (TYPE is null for libcalls where that information may not be available.)
421: Floats, and doubleword ints, are returned in f regs;
422: other ints, in r regs.
423: Aggregates, even short ones, are passed in memory. */
424:
425: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
426: ((TYPE) != 0 && (TREE_CODE ((TYPE)) == RECORD_TYPE \
427: || TREE_CODE ((TYPE)) == UNION_TYPE) \
428: ? 0 \
429: : GET_MODE_CLASS ((MODE)) == MODE_FLOAT || (MODE) == DImode \
430: ? ((CUM).floats = (ROUNDUP ((CUM).floats, GET_MODE_SIZE ((MODE))) \
431: + ROUNDUP (GET_MODE_SIZE (MODE), 4))) \
432: : GET_MODE_CLASS ((MODE)) == MODE_INT \
433: ? ((CUM).ints = (ROUNDUP ((CUM).ints, GET_MODE_SIZE ((MODE))) \
434: + ROUNDUP (GET_MODE_SIZE (MODE), 4))) \
435: : 0)
436:
437: /* Determine where to put an argument to a function.
438: Value is zero to push the argument on the stack,
439: or a hard register in which to store the argument.
440:
441: MODE is the argument's machine mode.
442: TYPE is the data type of the argument (as a tree).
443: This is null for libcalls where that information may
444: not be available.
445: CUM is a variable of type CUMULATIVE_ARGS which gives info about
446: the preceding args and about the function being called.
447: NAMED is nonzero if this argument is a named parameter
448: (otherwise it is an extra parameter matching an ellipsis). */
449:
450: /* On the i860, the first 12 words of integer arguments go in r16-r27,
451: and the first 8 words of floating arguments go in f8-f15.
452: DImode values are treated as floats. */
453:
454: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
455: ((TYPE) != 0 && (TREE_CODE ((TYPE)) == RECORD_TYPE \
456: || TREE_CODE ((TYPE)) == UNION_TYPE) \
457: ? 0 \
458: : GET_MODE_CLASS ((MODE)) == MODE_FLOAT || (MODE) == DImode \
459: ? (ROUNDUP ((CUM).floats, GET_MODE_SIZE ((MODE))) < 32 \
460: ? gen_rtx (REG, (MODE), \
461: 40+(ROUNDUP ((CUM).floats, \
462: GET_MODE_SIZE ((MODE))) \
463: / 4)) \
464: : 0) \
465: : GET_MODE_CLASS ((MODE)) == MODE_INT \
466: ? (ROUNDUP ((CUM).ints, GET_MODE_SIZE ((MODE))) < 48 \
467: ? gen_rtx (REG, (MODE), \
468: 16+(ROUNDUP ((CUM).ints, \
469: GET_MODE_SIZE ((MODE))) \
470: / 4)) \
471: : 0) \
472: : 0)
473:
474: /* For an arg passed partly in registers and partly in memory,
475: this is the number of registers used.
476: For args passed entirely in registers or entirely in memory, zero. */
477:
478: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
479:
480: /* This macro generates the assembly code for function entry.
481: FILE is a stdio stream to output the code to.
482: SIZE is an int: how many units of temporary storage to allocate.
483: Refer to the array `regs_ever_live' to determine which registers
484: to save; `regs_ever_live[I]' is nonzero if register number I
485: is ever used in the function. This macro is responsible for
486: knowing which registers should not be saved even if used. */
487:
488: #define FUNCTION_PROLOGUE(FILE, SIZE) \
489: { \
490: extern char call_used_regs[]; \
491: int fsize = (SIZE); \
492: int nregs, i; \
493: for (i = 0, nregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
494: { \
495: if (regs_ever_live[i] && ! call_used_regs[i]) \
496: nregs++; \
497: } \
498: fsize += nregs * 4 + 8; \
499: fsize = (fsize + 15) & -16; \
500: if (fsize > 0x7fff) \
501: { \
502: fprintf (FILE, "\tadds -16,sp,sp\n"); \
503: fprintf (FILE, "\tst.l fp,8(sp)\n"); \
504: fprintf (FILE, "\tst.l r1,12(sp)\n"); \
505: fprintf (FILE, "\tadds 8,sp,fp\n"); \
506: fprintf (FILE, "\torh %d,r0,r31\n", (fsize - 16) >> 16); \
507: fprintf (FILE, "\tor %d,r31,r31\n", (fsize - 16) & 0xffff); \
508: fprintf (FILE, "\tsubs sp,r31,sp\n"); \
509: } \
510: else \
511: { \
512: fprintf (FILE, "\tadds -%d,sp,sp\n", fsize); \
513: fprintf (FILE, "\tst.l fp,%d(sp)\n", fsize - 8); \
514: fprintf (FILE, "\tst.l r1,%d(sp)\n", fsize - 4); \
515: fprintf (FILE, "\tadds %d,sp,fp\n", fsize - 8); \
516: } \
517: for (i = 0, nregs = 0; i < 32; i++) \
518: if (regs_ever_live[i] && ! call_used_regs[i]) \
519: fprintf (FILE, "\tst.l %s,%d(sp)\n", \
520: reg_names[i], 4 * nregs++); \
521: for (i = 32; i < 64; i++) \
522: if (regs_ever_live[i] && ! call_used_regs[i]) \
523: fprintf (FILE, "\tfst.l %s,%d(sp)\n", \
524: reg_names[i], 4 * nregs++); \
525: }
526: /* ??? maybe save pairs or quads of fp registers. */
527:
528: /* Output assembler code to FILE to increment profiler label # LABELNO
529: for profiling a function entry. */
530:
531: #define FUNCTION_PROFILER(FILE, LABELNO) \
532: abort ();
533:
534: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
535: the stack pointer does not matter. The value is tested only in
536: functions that have frame pointers.
537: No definition is equivalent to always zero. */
538:
539: /* #define EXIT_IGNORE_STACK 0 */
540:
541: /* This macro generates the assembly code for function exit,
542: on machines that need it. If FUNCTION_EPILOGUE is not defined
543: then individual return instructions are generated for each
544: return statement. Args are same as for FUNCTION_PROLOGUE.
545:
546: The function epilogue should not depend on the current stack pointer!
547: It should use the frame pointer only. This is mandatory because
548: of alloca; we also take advantage of it to omit stack adjustments
549: before returning. */
550:
551: #define FUNCTION_EPILOGUE(FILE, SIZE) \
552: { \
553: extern char call_used_regs[]; \
554: int fsize = (SIZE); \
555: int nregs, i; \
556: for (i = 0, nregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
557: { \
558: if (regs_ever_live[i] && ! call_used_regs[i]) \
559: nregs++; \
560: } \
561: fsize += nregs * 4 + 8; \
562: fsize = (fsize + 15) & -16; \
563: if (fsize < 0x7fff) \
564: { \
565: for (i = 0, nregs = 0; i < 32; i++) \
566: if (regs_ever_live[i] && ! call_used_regs[i]) \
567: fprintf (FILE, "\tld.l %d(fp),%s\n", \
568: 4 * nregs++ - (fsize - 8), reg_names[i]); \
569: for (i = 32; i < 64; i++) \
570: if (regs_ever_live[i] && ! call_used_regs[i]) \
571: fprintf (FILE, "\tfld.l %d(fp),%s\n", \
572: 4 * nregs++ - (fsize - 8), reg_names[i]); \
573: } \
574: else \
575: { \
576: fprintf (FILE, "\torh %d,r0,r31\n", (fsize - 8) >> 16); \
577: fprintf (FILE, "\tor %d,r31,r31\n", (fsize - 8) & 0xffff); \
578: fprintf (FILE, "\tsubs fp,r31,sp\n"); \
579: for (i = 0, nregs = 0; i < 32; i++) \
580: if (regs_ever_live[i] && ! call_used_regs[i]) \
581: fprintf (FILE, "\tld.l %d(sp),%s\n", \
582: 4 * nregs++, reg_names[i]); \
583: for (i = 32; i < 64; i++) \
584: if (regs_ever_live[i] && ! call_used_regs[i]) \
585: fprintf (FILE, "\tfld.l %d(sp),%s\n", \
586: 4 * nregs++, reg_names[i]); \
587: } \
588: if (fsize < 0x7fff) \
589: { \
590: fprintf (FILE, "\tld.l 4(fp),r1\n"); \
591: fprintf (FILE, "\tld.l 0(fp),fp\n"); \
592: fprintf (FILE, "\tbri r1\n\taddu %d,sp,sp\n", fsize); \
593: } \
594: else \
595: { \
596: fprintf (FILE, "\tld.l 4(fp),r1\n"); \
597: fprintf (FILE, "\tadds 8,fp,r31\n"); \
598: fprintf (FILE, "\tld.l 0(fp),fp\n"); \
599: fprintf (FILE, "\tbri r1\n\tmov r31,sp\n"); \
600: } \
601: }
602:
603: /* If the memory address ADDR is relative to the frame pointer,
604: correct it to be relative to the stack pointer instead.
605: This is for when we don't use a frame pointer.
606: ADDR should be a variable name. */
607:
608: #define FIX_FRAME_POINTER_ADDRESS(ADDR,DEPTH) abort ();
609:
610: /* Addressing modes, and classification of registers for them. */
611:
612: /* #define HAVE_POST_INCREMENT */
613: /* #define HAVE_POST_DECREMENT */
614:
615: /* #define HAVE_PRE_DECREMENT */
616: #define HAVE_PRE_INCREMENT
617:
618: /* Macros to check register numbers against specific register classes. */
619:
620: /* These assume that REGNO is a hard or pseudo reg number.
621: They give nonzero only if REGNO is a hard reg of the suitable class
622: or a pseudo reg currently allocated to a suitable hard reg.
623: Since they use reg_renumber, they are safe only once reg_renumber
624: has been allocated, which happens in local-alloc.c. */
625:
626: #define REGNO_OK_FOR_INDEX_P(REGNO) \
627: ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
628: #define REGNO_OK_FOR_BASE_P(REGNO) \
629: ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
630: #define REGNO_OK_FOR_FP_P(REGNO) \
631: (((REGNO) ^ 0x20) < 32 || (unsigned) (reg_renumber[REGNO] ^ 0x20) < 32)
632:
633: /* Now macros that check whether X is a register and also,
634: strictly, whether it is in a specified class.
635:
636: These macros are specific to the i860, and may be used only
637: in code for printing assembler insns and in conditions for
638: define_optimization. */
639:
640: /* 1 if X is an fp register. */
641:
642: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
643:
644: /* Maximum number of registers that can appear in a valid memory address. */
645:
646: #define MAX_REGS_PER_ADDRESS 2
647:
648: /* Recognize any constant value that is a valid address. */
649:
650: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
651:
652: /* Nonzero if the constant value X is a legitimate general operand.
653: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
654:
655: On the Sparc, this is anything but a CONST_DOUBLE.
656: Let's try permitting CONST_DOUBLEs and see what happens. */
657:
658: #define LEGITIMATE_CONSTANT_P(X) 1
659:
660: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
661: and check its validity for a certain class.
662: We have two alternate definitions for each of them.
663: The usual definition accepts all pseudo regs; the other rejects
664: them unless they have been allocated suitable hard regs.
665: The symbol REG_OK_STRICT causes the latter definition to be used.
666:
667: Most source files want to accept pseudo regs in the hope that
668: they will get allocated to the class that the insn wants them to be in.
669: Source files for reload pass need to be strict.
670: After reload, it makes no difference, since pseudo regs have
671: been eliminated by then. */
672:
673: #ifndef REG_OK_STRICT
674:
675: /* Nonzero if X is a hard reg that can be used as an index
676: or if it is a pseudo reg. */
677: #define REG_OK_FOR_INDEX_P(X) (((unsigned) REGNO (X)) - 32 >= 14)
678: /* Nonzero if X is a hard reg that can be used as a base reg
679: or if it is a pseudo reg. */
680: #define REG_OK_FOR_BASE_P(X) (((unsigned) REGNO (X)) - 32 >= 14)
681:
682: #else
683:
684: /* Nonzero if X is a hard reg that can be used as an index. */
685: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
686: /* Nonzero if X is a hard reg that can be used as a base reg. */
687: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
688:
689: #endif
690:
691: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
692: that is a valid memory address for an instruction.
693: The MODE argument is the machine mode for the MEM expression
694: that wants to use this address.
695:
696: On SPARC, the actual legitimate addresses must be REG+REG or REG+SMALLINT.
697: But we can treat a SYMBOL_REF as legitimate if it is part of this
698: function's constant-pool, because such addresses can actually
699: be output as REG+SMALLINT.
700:
701: Try making SYMBOL_REF (and other things which are CONSTANT_ADDRESS_P)
702: a legitimate address, regardless. Because the only insns which can use
703: memory are load or store insns, the added hair in the machine description
704: is not that bad. It should also speed up the compiler by halving the number
705: of insns it must manage for each (MEM (SYMBOL_REF ...)) involved. */
706:
707: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
708: { if (GET_CODE (X) == REG) \
709: { if (REG_OK_FOR_BASE_P (X)) goto ADDR; } \
710: else if (GET_CODE (X) == PLUS) \
711: { \
712: if (GET_CODE (XEXP (X, 0)) == REG \
713: && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
714: { \
715: if (GET_CODE (XEXP (X, 1)) == CONST_INT \
716: && INTVAL (XEXP (X, 1)) >= -0x8000 \
717: && INTVAL (XEXP (X, 1)) < 0x8000) \
718: goto ADDR; \
719: } \
720: else if (GET_CODE (XEXP (X, 1)) == REG \
721: && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
722: { \
723: if (GET_CODE (XEXP (X, 0)) == CONST_INT \
724: && INTVAL (XEXP (X, 0)) >= -0x8000 \
725: && INTVAL (XEXP (X, 0)) < 0x8000) \
726: goto ADDR; \
727: } \
728: } \
729: else if (CONSTANT_ADDRESS_P (X)) \
730: goto ADDR; \
731: }
732:
733: /* Try machine-dependent ways of modifying an illegitimate address
734: to be legitimate. If we find one, return the new, valid address.
735: This macro is used in only one place: `memory_address' in explow.c.
736:
737: OLDX is the address as it was before break_out_memory_refs was called.
738: In some cases it is useful to look at this to decide what needs to be done.
739:
740: MODE and WIN are passed so that this macro can use
741: GO_IF_LEGITIMATE_ADDRESS.
742:
743: It is always safe for this macro to do nothing. It exists to recognize
744: opportunities to optimize the output. */
745:
746: /* On the i860, change COMPLICATED + CONSTANT to REG+CONSTANT.
747: Also change a symbolic constant to a REG,
748: though that may not be necessary. */
749:
750: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
751: { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
752: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
753: force_operand (XEXP (X, 0), 0)); \
754: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
755: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
756: force_operand (XEXP (X, 1), 0)); \
757: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == PLUS) \
758: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
759: force_operand (XEXP (X, 0), 0)); \
760: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == PLUS) \
761: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
762: force_operand (XEXP (X, 1), 0)); \
763: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) != REG \
764: && GET_CODE (XEXP (X, 0)) != CONST_INT) \
765: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
766: copy_to_mode_reg (SImode, XEXP (X, 0))); \
767: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) != REG \
768: && GET_CODE (XEXP (X, 1)) != CONST_INT) \
769: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
770: copy_to_mode_reg (SImode, XEXP (X, 1))); \
771: if (GET_CODE (x) == SYMBOL_REF) \
772: (X) = copy_to_reg (X); \
773: if (GET_CODE (x) == CONST) \
774: (X) = copy_to_reg (X); \
775: if (memory_address_p (MODE, X)) \
776: goto WIN; }
777:
778: /* Go to LABEL if ADDR (a legitimate address expression)
779: has an effect that depends on the machine mode it is used for.
780: On the SPUR this is never true. */
781:
782: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
783:
784: /* Specify the machine mode that this machine uses
785: for the index in the tablejump instruction. */
786: #define CASE_VECTOR_MODE SImode
787:
788: /* Define this if the tablejump instruction expects the table
789: to contain offsets from the address of the table.
790: Do not define this if the table should contain absolute addresses. */
791: /* #define CASE_VECTOR_PC_RELATIVE */
792:
793: /* Specify the tree operation to be used to convert reals to integers. */
794: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
795:
796: /* This is the kind of divide that is easiest to do in the general case. */
797: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
798:
799: #define DIVSI3_LIBCALL "*.div"
800: #define UDIVSI3_LIBCALL "*.udiv"
801: #define REMSI3_LIBCALL "*.rem"
802: #define UREMSI3_LIBCALL "*.urem"
803:
804: /* Define this as 1 if `char' should by default be signed; else as 0. */
805: #define DEFAULT_SIGNED_CHAR 1
806:
807: /* Max number of bytes we can move from memory to memory
808: in one reasonably fast instruction. */
809: #define MOVE_MAX 16
810:
811: /* Nonzero if access to memory by bytes is slow and undesirable. */
812: #define SLOW_BYTE_ACCESS 0
813:
814: /* This is System V, so it wants sdb format. */
815: #define DBX_DEBUGGING_INFO
816:
817: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
818: is done just by pretending it is already truncated. */
819: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
820:
821: /* Specify the machine mode that pointers have.
822: After generation of rtl, the compiler makes no further distinction
823: between pointers and any other objects of this machine mode. */
824: #define Pmode SImode
825:
826: /* A function address in a call instruction
827: is a byte address (for indexing purposes)
828: so give the MEM rtx a byte's mode. */
829: #define FUNCTION_MODE SImode
830:
831: /* Define this if addresses of constant functions
832: shouldn't be put through pseudo regs where they can be cse'd.
833: Desirable on machines where ordinary constants are expensive
834: but a CALL with constant address is cheap. */
835: #define NO_FUNCTION_CSE
836:
837: /* Compute the cost of computing a constant rtl expression RTX
838: whose rtx-code is CODE. The body of this macro is a portion
839: of a switch statement. If the code is computed here,
840: return it with a return statement. Otherwise, break from the switch. */
841:
842: #define CONST_COSTS(RTX,CODE) \
843: case CONST_INT: \
844: if (INTVAL (RTX) == 0) \
845: return 0; \
846: if (INTVAL (RTX) < 0x2000 && INTVAL (RTX) >= -0x2000) return 1; \
847: case CONST: \
848: case LABEL_REF: \
849: case SYMBOL_REF: \
850: return 2; \
851: case CONST_DOUBLE: \
852: return 4;
853:
854: /* Tell final.c how to eliminate redundant test instructions. */
855:
856: /* Here we define machine-dependent flags and fields in cc_status
857: (see `conditions.h'). */
858:
859: /* This holds the value sourcing h%r31. We keep this info
860: around so that mem/mem ops, such as increment and decrement,
861: etc, can be performed reasonably. */
862: #define CC_STATUS_MDEP rtx
863:
864: #define CC_STATUS_MDEP_INIT (cc_status.mdep = 0)
865:
866: /* On the i860, each comparison tests just one condition,
867: so only that condition can be remembered.
868: We don't need GT, GE, GTU and GEU because CC_REVERSED can handle them. */
869: #define CC_ONLY_EQ 0100
870: #define CC_ONLY_LE 0200
871: #define CC_ONLY_LT 0400
872: #define CC_ONLY_LEU 02000
873: #define CC_ONLY_LTU 04000
874: #define CC_CONDITION_MASK 07700
875:
876: /* Non-zero to invert the sense of the condition code. */
877: #define CC_NEGATED 010000
878:
879: /* Nonzero if we know the value of h%r31. */
880: #define CC_KNOW_HI_R31 0100000
881:
882: /* Nonzero if h%r31 is actually ha%something, rather than h%something. */
883: #define CC_HI_R31_ADJ 0200000
884:
885: /* Store in cc_status the expressions
886: that the condition codes will describe
887: after execution of an instruction whose pattern is EXP.
888: Do not alter them if the instruction would not alter the cc's. */
889:
890: /* On the i860, only compare insns set a useful condition code. */
891:
892: #define NOTICE_UPDATE_CC(EXP, INSN) \
893: { cc_status.flags &= (CC_KNOW_HI_R31 | CC_HI_R31_ADJ); \
894: cc_status.value1 = 0; cc_status.value2 = 0; }
895:
896: /* Control the assembler format that we output. */
897:
898: /* Output at beginning of assembler file. */
899: /* The .file command should always begin the output. */
900:
901: #define ASM_FILE_START(FILE)
902: #if 0
903: #define ASM_FILE_START(FILE) \
904: do { sdbout_filename ((FILE), main_input_filename); \
905: if (optimize) ASM_FILE_START_1 (FILE); \
906: } while (0)
907: #endif
908:
909: #define ASM_FILE_START_1(FILE)
910:
911: /* Output to assembler file text saying following lines
912: may contain character constants, extra white space, comments, etc. */
913:
914: #define ASM_APP_ON ""
915:
916: /* Output to assembler file text saying following lines
917: no longer contain unusual constructs. */
918:
919: #define ASM_APP_OFF ""
920:
921: /* Output before read-only data. */
922:
923: #define TEXT_SECTION_ASM_OP ".text"
924:
925: /* Output before writable data. */
926:
927: #define DATA_SECTION_ASM_OP ".data"
928:
929: /* How to refer to registers in assembler output.
930: This sequence is indexed by compiler's hard-register-number (see above). */
931:
932: #define REGISTER_NAMES \
933: {"r0", "r1", "sp", "fp", "r4", "r5", "r6", "r7", "r8", "r9", \
934: "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", \
935: "r20", "r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", \
936: "r30", "r31", \
937: "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9", \
938: "f10", "f11", "f12", "f13", "f14", "f15", "f16", "f17", "f18", "f19", \
939: "f20", "f21", "f22", "f23", "f24", "f25", "f26", "f27", "f28", "f29", \
940: "f30", "f31" }
941:
942: /* How to renumber registers for dbx and gdb. */
943:
944: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
945:
946: /* This is how to output the definition of a user-level label named NAME,
947: such as the label on a static function or variable NAME. */
948:
949: #define ASM_OUTPUT_LABEL(FILE,NAME) \
950: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
951:
952: /* This is how to output a command to make the user-level label named NAME
953: defined for reference from other files. */
954:
955: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
956: do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
957:
958: /* This is how to output a reference to a user-level label named NAME.
959: `assemble_name' uses this. */
960:
961: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
962: fprintf (FILE, "_%s", NAME)
963:
964: /* This is how to output an internal numbered label where
965: PREFIX is the class of label and NUM is the number within the class. */
966:
967: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
968: fprintf (FILE, ".%s%d:\n", PREFIX, NUM)
969:
970: /* This is how to output an internal numbered label which
971: labels a jump table. */
972:
973: #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,JUMPTABLE) \
974: fprintf (FILE, "\t.data\n.%s%d:\n", PREFIX, NUM)
975:
976: /* Output at the end of a jump table. */
977:
978: #define ASM_OUTPUT_CASE_END(FILE,NUM,INSN) \
979: fprintf (FILE, "\t.text\n")
980:
981: /* This is how to store into the string LABEL
982: the symbol_ref name of an internal numbered label where
983: PREFIX is the class of label and NUM is the number within the class.
984: This is suitable for output with `assemble_name'. */
985:
986: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
987: sprintf (LABEL, "*.%s%d", PREFIX, NUM)
988:
989: #define ASCII_DATA_ASM_OP ".byte"
990: #define ASM_OUTPUT_ASCII(f, p, size) \
991: { register int i; \
992: int inside; \
993: inside = FALSE; \
994: for (i = 0; i < size; i++) { \
995: if (i % 64 == 0) { \
996: if (i != 0) { \
997: if (inside) \
998: putc('"', f); \
999: putc('\n', f); \
1000: inside = FALSE; \
1001: } \
1002: fprintf(f, "%s ", ASCII_DATA_ASM_OP); \
1003: } \
1004: if (p[i] < 32 || p[i] == '\\' || p[i] == '"' || p[i] == 127) { \
1005: if (inside) { \
1006: putc('"', f); \
1007: inside = FALSE; \
1008: } \
1009: if (i % 64 != 0) \
1010: putc(',', f); \
1011: fprintf(f, "%d", p[i]); \
1012: } else { \
1013: if (!inside) { \
1014: if (i % 64 != 0) \
1015: putc(',', f); \
1016: putc('"', f); \
1017: inside = TRUE; \
1018: } \
1019: putc(p[i], f); \
1020: } \
1021: } \
1022: if (inside) \
1023: putc('"', f); \
1024: putc('\n', f); \
1025: }
1026:
1027: /* This is how to output an assembler line defining a `double' constant. */
1028:
1029: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1030: fprintf (FILE, "\t.double %.20e\n", (VALUE))
1031:
1032: /* This is how to output an assembler line defining a `float' constant. */
1033:
1034: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1035: fprintf (FILE, "\t.float %.12e\n", (VALUE))
1036:
1037: /* This is how to output an assembler line defining an `int' constant. */
1038:
1039: #define ASM_OUTPUT_INT(FILE,VALUE) \
1040: ( fprintf (FILE, "\t.long "), \
1041: output_addr_const (FILE, (VALUE)), \
1042: fprintf (FILE, "\n"))
1043:
1044: /* Likewise for `char' and `short' constants. */
1045:
1046: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1047: ( fprintf (FILE, "\t.short "), \
1048: output_addr_const (FILE, (VALUE)), \
1049: fprintf (FILE, "\n"))
1050:
1051: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1052: ( fprintf (FILE, "\t.byte "), \
1053: output_addr_const (FILE, (VALUE)), \
1054: fprintf (FILE, "\n"))
1055:
1056: /* This is how to output an assembler line for a numeric constant byte. */
1057:
1058: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1059: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1060:
1061: /* This is how to output code to push a register on the stack.
1062: It need not be very fast code. */
1063:
1064: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1065: fprintf (FILE, "\taddu -16,r3,r3\n\t%sst.l %s,0(r3)\n", \
1066: ((REGNO) < 32 ? "" : "f"), reg_names[REGNO])
1067:
1068: /* This is how to output an insn to pop a register from the stack.
1069: It need not be very fast code. */
1070:
1071: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1072: fprintf (FILE, "\t%sld.l 0(r3),%s\n\taddu 16,r3,r3\n", \
1073: ((REGNO) < 32 ? "" : "f"), reg_names[REGNO])
1074:
1075: /* This is how to output an element of a case-vector that is absolute. */
1076:
1077: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1078: fprintf (FILE, "\t.long .L%d\n", VALUE)
1079:
1080: /* This is how to output an element of a case-vector that is relative.
1081: (The i860 does not use such vectors,
1082: but we must define this macro anyway.) */
1083:
1084: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1085: fprintf (FILE, "\t.word .L%d-.L%d\n", VALUE, REL)
1086:
1087: /* This is how to output an assembler line
1088: that says to advance the location counter
1089: to a multiple of 2**LOG bytes. */
1090:
1091: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1092: if ((LOG) != 0) \
1093: fprintf (FILE, "\t.align %d\n", 1 << (LOG))
1094:
1095: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1096: fprintf (FILE, "\t.blkb %d\n", (SIZE))
1097:
1098: /* This says how to output an assembler line
1099: to define a global common symbol. */
1100:
1101: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1102: ( fputs (".comm ", (FILE)), \
1103: assemble_name ((FILE), (NAME)), \
1104: fprintf ((FILE), ",%d\n", (ROUNDED)))
1105:
1106: /* This says how to output an assembler line
1107: to define a local common symbol. */
1108:
1109: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1110: ( fputs (".lcomm ", (FILE)), \
1111: assemble_name ((FILE), (NAME)), \
1112: fprintf ((FILE), ",%d\n", (ROUNDED)))
1113:
1114: /* Store in OUTPUT a string (made with alloca) containing
1115: an assembler-name for a local static variable named NAME.
1116: LABELNO is an integer which is different for each call. */
1117:
1118: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1119: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1120: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1121:
1122: /* Define the parentheses used to group arithmetic operations
1123: in assembler code. */
1124:
1125: #define ASM_OPEN_PAREN "("
1126: #define ASM_CLOSE_PAREN ")"
1127:
1128: /* Define results of standard character escape sequences. */
1129: #define TARGET_BELL 007
1130: #define TARGET_BS 010
1131: #define TARGET_TAB 011
1132: #define TARGET_NEWLINE 012
1133: #define TARGET_VT 013
1134: #define TARGET_FF 014
1135: #define TARGET_CR 015
1136:
1137: /* Print operand X (an rtx) in assembler syntax to file FILE.
1138: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1139: For `%' followed by punctuation, CODE is the punctuation and X is null.
1140:
1141: On the i860, the CODE can be `r', meaning this is a register-only operand
1142: and an immediate zero should be represented as `r0'.
1143: It can also be `m', meaning this is a memory ref,
1144: but print its address as a constant. */
1145:
1146: #define PRINT_OPERAND(FILE, X, CODE) \
1147: { if (GET_CODE (X) == REG) \
1148: fprintf (FILE, "%s", reg_names[REGNO (X)]); \
1149: else if ((CODE) == 'm') \
1150: output_address (XEXP (X, 0)); \
1151: else if (GET_CODE (X) == MEM) \
1152: output_address (XEXP (X, 0)); \
1153: else if ((CODE) == 'r' && (X) == const0_rtx) \
1154: fprintf (FILE, "r0"); \
1155: else if ((CODE) == 'r' && (X) == CONST0_RTX (GET_MODE (X))) \
1156: fprintf (FILE, "f0"); \
1157: else if (GET_CODE (X) == CONST_DOUBLE) \
1158: abort (); \
1159: else \
1160: output_addr_const (FILE, X); }
1161:
1162: /* Print a memory address as an operand to reference that memory location. */
1163:
1164: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1165: { register rtx base, index = 0; \
1166: int offset = 0; \
1167: register rtx addr = ADDR; \
1168: if (GET_CODE (addr) == REG) \
1169: { \
1170: fprintf (FILE, "0(%s)", reg_names[REGNO (addr)]); \
1171: } \
1172: else if (GET_CODE (addr) == PLUS) \
1173: { \
1174: if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1175: offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1);\
1176: else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1177: offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0);\
1178: else \
1179: base = XEXP (addr, 0), index = XEXP (addr, 1); \
1180: if (index != 0) \
1181: fprintf (FILE, "%s", reg_names[REGNO (index)]); \
1182: else \
1183: fprintf (FILE, "%d", offset); \
1184: fprintf (FILE, "(%s)", reg_names[REGNO (base)]); \
1185: } \
1186: else \
1187: { \
1188: /* ??? this may be wrong. */ \
1189: output_addr_const (FILE, addr); \
1190: } \
1191: }
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