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1.1 root 1: /* Definitions of target machine for GNU compiler, for Intel 860.
2: Copyright (C) 1989 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
6: GNU CC is free software; you can redistribute it and/or modify
7: it under the terms of the GNU General Public License as published by
8: the Free Software Foundation; either version 1, or (at your option)
9: any later version.
10:
11: GNU CC is distributed in the hope that it will be useful,
12: but WITHOUT ANY WARRANTY; without even the implied warranty of
13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14: GNU General Public License for more details.
15:
16: You should have received a copy of the GNU General Public License
17: along with GNU CC; see the file COPYING. If not, write to
18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19:
20:
21: /* Note that some other tm- files include this one and then override
22: many of the definitions that relate to assembler syntax. */
23:
24:
25: /* Names to predefine in the preprocessor for this target machine. */
26:
1.1.1.5 ! root 27: #define CPP_PREDEFINES "-Di860 -DI860 -Dunix"
1.1 root 28:
29: /* Print subsidiary information on the compiler version in use. */
30: #define TARGET_VERSION fprintf (stderr, " (i860)");
31:
32: /* Run-time compilation parameters selecting different hardware subsets.
33:
34: On the i860, we have one: TARGET_FPU. */
35:
36: extern int target_flags;
37:
38: /* Nonzero if we should generate code to use the fpu. */
39: #define TARGET_FPU (target_flags & 1)
40:
41: /* Macro to define tables used to set the flags.
42: This is a list in braces of pairs in braces,
43: each pair being { "NAME", VALUE }
44: where VALUE is the bits to set or minus the bits to clear.
45: An empty string NAME is used to identify the default VALUE. */
46:
47: #define TARGET_SWITCHES \
48: { {"fpu", 1}, \
49: {"soft-float", -1}, \
50: { "", TARGET_DEFAULT}}
51:
52: #define TARGET_DEFAULT 1
53:
54: /* target machine storage layout */
55:
56: /* Define this if most significant bit is lowest numbered
57: in instructions that operate on numbered bit-fields.
58: This is a moot question on the i860 due to the lack of bit-field insns. */
59: /* #define BITS_BIG_ENDIAN */
60:
61: /* Define this if most significant byte of a word is the lowest numbered. */
62: /* That is not true on i860 in the mode we will use. */
63: /* #define BYTES_BIG_ENDIAN */
64:
65: /* Define this if most significant word of a multiword number is numbered. */
66: /* For the i860 this goes with BYTES_BIG_ENDIAN. */
67: /* #define WORDS_BIG_ENDIAN */
68:
69: /* number of bits in an addressible storage unit */
70: #define BITS_PER_UNIT 8
71:
72: /* Width in bits of a "word", which is the contents of a machine register.
73: Note that this is not necessarily the width of data type `int';
74: if using 16-bit ints on a 68000, this would still be 32.
75: But on a machine with 16-bit registers, this would be 16. */
76: #define BITS_PER_WORD 32
77:
78: /* Width of a word, in units (bytes). */
79: #define UNITS_PER_WORD 4
80:
81: /* Width in bits of a pointer.
82: See also the macro `Pmode' defined below. */
83: #define POINTER_SIZE 32
84:
85: /* Allocation boundary (in *bits*) for storing pointers in memory. */
86: #define POINTER_BOUNDARY 32
87:
88: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
89: #define PARM_BOUNDARY 32
90:
1.1.1.5 ! root 91: /* Give parms extra alignment, up to this much, if their types want it. */
! 92: #define MAX_PARM_BOUNDARY 64
! 93:
1.1 root 94: /* Boundary (in *bits*) on which stack pointer should be aligned. */
95: #define STACK_BOUNDARY 128
96:
97: /* Allocation boundary (in *bits*) for the code of a function. */
98: #define FUNCTION_BOUNDARY 32
99:
100: /* Alignment of field after `int : 0' in a structure. */
101: #define EMPTY_FIELD_BOUNDARY 32
102:
103: /* Every structure's size must be a multiple of this. */
104: #define STRUCTURE_SIZE_BOUNDARY 8
105:
106: /* No data type wants to be aligned rounder than this. */
107: #define BIGGEST_ALIGNMENT 64
108:
109: /* Define this if move instructions will actually fail to work
110: when given unaligned data. */
111: #define STRICT_ALIGNMENT
112:
113: /* If bit field type is int, dont let it cross an int,
114: and give entire struct the alignment of an int. */
1.1.1.3 root 115: #define PCC_BITFIELD_TYPE_MATTERS 1
1.1 root 116:
117: /* Standard register usage. */
118:
119: /* Number of actual hardware registers.
120: The hardware registers are assigned numbers for the compiler
121: from 0 to just below FIRST_PSEUDO_REGISTER.
122: All registers that the compiler knows about must be given numbers,
123: even those that are not normally considered general registers.
124:
125: i860 has 32 fullword registers and 32 floating point registers. */
126:
127: #define FIRST_PSEUDO_REGISTER 64
128:
129: /* 1 for registers that have pervasive standard uses
130: and are not available for the register allocator.
131: On the i860, this includes the always-0 registers
132: and fp, sp, and the return address.
133: Also r31, used for special purposes for constant addresses. */
134: #define FIXED_REGISTERS \
135: {1, 1, 1, 1, 0, 0, 0, 0, \
136: 0, 0, 0, 0, 0, 0, 0, 0, \
137: 0, 0, 0, 0, 0, 0, 0, 0, \
138: 0, 0, 0, 0, 0, 0, 0, 1, \
139: 1, 1, 0, 0, 0, 0, 0, 0, \
140: 0, 0, 0, 0, 0, 0, 0, 0, \
141: 0, 0, 0, 0, 0, 0, 0, 0, \
142: 0, 0, 0, 0, 0, 0, 0, 0}
143:
144: /* 1 for registers not available across function calls.
145: These must include the FIXED_REGISTERS and also any
146: registers that can be used without being saved.
147: On the i860, these are r0-r3, r16-r31, f0, f1, and f16-f31. */
148: #define CALL_USED_REGISTERS \
149: {1, 1, 1, 1, 0, 0, 0, 0, \
150: 0, 0, 0, 0, 0, 0, 0, 0, \
151: 1, 1, 1, 1, 1, 1, 1, 1, \
152: 1, 1, 1, 1, 1, 1, 1, 1, \
153: 1, 1, 0, 0, 0, 0, 0, 0, \
154: 1, 1, 1, 1, 1, 1, 1, 1, \
155: 1, 1, 1, 1, 1, 1, 1, 1, \
156: 1, 1, 1, 1, 1, 1, 1, 1}
157:
158: #define REG_ALLOC_ORDER \
159: {16, 17, 18, 19, 20, 21, 22, 23, \
160: 24, 25, 26, 27, 28, 29, 30, 31, \
161: 0, 1, 2, 3, 4, 5, 6, 7, \
162: 8, 9, 10, 11, 12, 13, 14, 15, \
163: 40, 41, 42, 43, 44, 45, 46, 47, \
164: 48, 49, 50, 51, 52, 53, 54, 55, \
165: 56, 57, 58, 59, 60, 61, 62, 63, \
166: 32, 33, 34, 35, 36, 37, 38, 39}
167:
168: /* Return number of consecutive hard regs needed starting at reg REGNO
169: to hold something of mode MODE.
170: This is ordinarily the length in words of a value of mode MODE
171: but can be less for certain modes in special long registers.
172:
173: On the i860, all registers hold 32 bits worth. */
174: #define HARD_REGNO_NREGS(REGNO, MODE) \
175: (((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
176:
177: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
178: On the i860, any register can hold anything, provided it is properly
179: aligned. */
180: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
181: (((GET_MODE_SIZE ((MODE)) <= 4) || ((REGNO) & 1) == 0) \
182: && ((REGNO) < 32 || TARGET_FPU))
183:
184: /* Value is 1 if it is a good idea to tie two pseudo registers
185: when one has mode MODE1 and one has mode MODE2.
186: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
187: for any hard reg, then this must be 0 for correct output. */
188: /* I think that is not always true; alignment restrictions for doubles
189: should not prevent tying them with singles. So try allowing that.
190: On the other hand, don't let fixed and floating be tied;
191: this restriction is not necessary, but may make better code. */
192: #define MODES_TIEABLE_P(MODE1, MODE2) \
193: ((GET_MODE_CLASS ((MODE1)) == MODE_FLOAT) \
194: == (GET_MODE_CLASS ((MODE2)) == MODE_FLOAT))
195:
196: /* Specify the registers used for certain standard purposes.
197: The values of these macros are register numbers. */
198:
199: /* i860 pc isn't overloaded on a register that the compiler knows about. */
200: /* #define PC_REGNUM */
201:
202: /* Register to use for pushing function arguments. */
203: #define STACK_POINTER_REGNUM 2
204:
205: /* Base register for access to local variables of the function. */
206: #define FRAME_POINTER_REGNUM 3
207:
208: /* Value should be nonzero if functions must have frame pointers.
209: Zero means the frame pointer need not be set up (and parms
210: may be accessed via the stack pointer) in functions that seem suitable.
211: This is computed in `reload', in reload1.c. */
212: #define FRAME_POINTER_REQUIRED 1
213:
214: /* Base register for access to arguments of the function. */
215: #define ARG_POINTER_REGNUM 28
216:
217: /* Register in which static-chain is passed to a function. */
218: #define STATIC_CHAIN_REGNUM 29
219:
220: /* Register in which address to store a structure value
221: is passed to a function. */
222: #define STRUCT_VALUE_REGNUM 16
223:
224: /* Define the classes of registers for register constraints in the
225: machine description. Also define ranges of constants.
226:
227: One of the classes must always be named ALL_REGS and include all hard regs.
228: If there is more than one class, another class must be named NO_REGS
229: and contain no registers.
230:
231: The name GENERAL_REGS must be the name of a class (or an alias for
232: another name such as ALL_REGS). This is the class of registers
233: that is allowed by "g" or "r" in a register constraint.
234: Also, registers outside this class are allocated only when
235: instructions express preferences for them.
236:
237: The classes must be numbered in nondecreasing order; that is,
238: a larger-numbered class must never be contained completely
239: in a smaller-numbered class.
240:
241: For any two classes, it is very desirable that there be another
242: class that represents their union. */
1.1.1.5 ! root 243:
1.1 root 244: /* The i860 has two kinds of registers, hence four classes. */
245:
246: enum reg_class { NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES };
247:
248: #define N_REG_CLASSES (int) LIM_REG_CLASSES
249:
250: /* Give names of register classes as strings for dump file. */
251:
252: #define REG_CLASS_NAMES \
253: {"NO_REGS", "GENERAL_REGS", "FP_REGS", "ALL_REGS" }
254:
255: /* Define which registers fit in which classes.
256: This is an initializer for a vector of HARD_REG_SET
257: of length N_REG_CLASSES. */
258:
259: #define REG_CLASS_CONTENTS \
260: {{0, 0}, {0xffffffff, 0}, \
261: {0, 0xffffffff}, {0xffffffff, 0xffffffff}}
262:
263: /* The same information, inverted:
264: Return the class number of the smallest class containing
265: reg number REGNO. This could be a conditional expression
266: or could index an array. */
267:
268: #define REGNO_REG_CLASS(REGNO) \
269: ((REGNO) >= 32 ? FP_REGS : GENERAL_REGS)
270:
271: /* The class value for index registers, and the one for base regs. */
272: #define INDEX_REG_CLASS GENERAL_REGS
273: #define BASE_REG_CLASS GENERAL_REGS
274:
275: /* Get reg_class from a letter such as appears in the machine description. */
276:
277: #define REG_CLASS_FROM_LETTER(C) \
278: ((C) == 'f' ? FP_REGS : NO_REGS)
279:
280: /* The letters I, J, K, L and M in a register constraint string
281: can be used to stand for particular ranges of immediate operands.
282: This macro defines what the ranges are.
283: C is the letter, and VALUE is a constant value.
284: Return 1 if VALUE is in the range specified by C.
285:
286: For the i860, `I' is used for the range of constants
287: an add/subtract insn can actually contain.
288: But not including -0x8000, since we need
289: to negate the constant sometimes.
290: `J' is used for the range which is just zero (since that is R0).
291: `K' is used for the range allowed in bte.
292: `L' is used for the range allowed in logical insns. */
293:
294: #define SMALL_INT(X) ((unsigned) (INTVAL (X) + 0x7fff) < 0xffff)
295:
296: #define LOGIC_INT(X) ((unsigned) INTVAL (X) < 0x10000)
297:
298: #define SMALL_INTVAL(X) ((unsigned) ((X) + 0x7fff) < 0xffff)
299:
300: #define LOGIC_INTVAL(X) ((unsigned) (X) < 0x10000)
301:
302: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
303: ((C) == 'I' ? ((unsigned) (VALUE) + 0x7fff) < 0xffff \
304: : (C) == 'J' ? (VALUE) == 0 \
305: : (C) == 'K' ? (unsigned) (VALUE) < 0x20 \
306: : (C) == 'L' ? (unsigned) (VALUE) < 0x10000 \
307: : 0)
308:
309: /* Similar, but for floating constants, and defining letters G and H.
310: Here VALUE is the CONST_DOUBLE rtx itself. */
311:
312: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
313: ((C) == 'G' && CONST_DOUBLE_LOW ((VALUE)) == 0 \
314: && CONST_DOUBLE_HIGH ((VALUE)) == 0)
315:
316: /* Given an rtx X being reloaded into a reg required to be
317: in class CLASS, return the class of reg to actually use.
318: In general this is just CLASS; but on some machines
319: in some cases it is preferable to use a more restrictive class. */
320: #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
321:
322: /* Return the maximum number of consecutive registers
323: needed to represent mode MODE in a register of class CLASS. */
324: /* On the i860, this is the size of MODE in words. */
325: #define CLASS_MAX_NREGS(CLASS, MODE) \
326: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
327:
328: /* Stack layout; function entry, exit and calling. */
329:
330: /* Define this if pushing a word on the stack
331: makes the stack pointer a smaller address. */
332: #define STACK_GROWS_DOWNWARD
333:
334: /* Define this if the nominal address of the stack frame
335: is at the high-address end of the local variables;
336: that is, each additional local variable allocated
337: goes at a more negative offset in the frame. */
338: #define FRAME_GROWS_DOWNWARD
339:
340: /* Offset within stack frame to start allocating local variables at.
341: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
342: first local allocated. Otherwise, it is the offset to the BEGINNING
343: of the first local allocated. */
344: #define STARTING_FRAME_OFFSET 0
345:
346: /* If we generate an insn to push BYTES bytes,
347: this says how many the stack pointer really advances by.
348: On the i860, don't define this because there are no push insns. */
349: /* #define PUSH_ROUNDING(BYTES) */
350:
351: /* Offset of first parameter from the argument pointer register value. */
352: #define FIRST_PARM_OFFSET(FNDECL) 0
353:
354: /* Value is 1 if returning from a function call automatically
355: pops the arguments described by the number-of-args field in the call.
356: FUNTYPE is the data type of the function (as a tree),
357: or for a library call it is an identifier node for the subroutine name. */
358:
359: #define RETURN_POPS_ARGS(FUNTYPE) 0
360:
361: /* Define how to find the value returned by a function.
362: VALTYPE is the data type of the value (as a tree).
363: If the precise function being called is known, FUNC is its FUNCTION_DECL;
364: otherwise, FUNC is 0. */
365:
366: /* On the i860, the value register depends on the mode. */
367:
368: #define FUNCTION_VALUE(VALTYPE, FUNC) \
369: gen_rtx (REG, TYPE_MODE (VALTYPE), \
370: (GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_FLOAT \
371: ? 40 : 16))
372:
373: /* Define how to find the value returned by a library function
374: assuming the value has mode MODE. */
375:
376: #define LIBCALL_VALUE(MODE) \
377: gen_rtx (REG, MODE, \
378: (GET_MODE_CLASS ((MODE)) == MODE_FLOAT \
379: ? 40 : 16))
380:
381: /* 1 if N is a possible register number for a function value
382: as seen by the caller. */
383:
384: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 40 || (N) == 16)
385:
386: /* 1 if N is a possible register number for function argument passing.
387: On the i860, these are r16-r27 and f8-f15. */
388:
389: #define FUNCTION_ARG_REGNO_P(N) \
390: (((N) < 28 && (N) > 15) || ((N) < 48 && (N) >= 40))
391:
392: /* Define a data type for recording info about an argument list
393: during the scan of that argument list. This data type should
394: hold all necessary information about the function itself
395: and about the args processed so far, enough to enable macros
396: such as FUNCTION_ARG to determine where the next arg should go.
397:
398: On the i860, we must count separately the number of general registers used
399: and the number of float registers used. */
400:
401: #define CUMULATIVE_ARGS struct { int ints, floats; }
402:
403: /* Initialize a variable CUM of type CUMULATIVE_ARGS
404: for a call to a function whose data type is FNTYPE.
405: For a library call, FNTYPE is 0.
406:
407: On the i860, the general-reg offset normally starts at 0,
408: but starts at 4 bytes
409: when the function gets a structure-value-address as an
410: invisible first argument. */
411:
412: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE) \
1.1.1.2 root 413: ((CUM).ints = ((FNTYPE) != 0 && aggregate_value_p ((FNTYPE)) \
1.1 root 414: ? 4 : 0), \
415: (CUM).floats = 0)
416:
417: /* Machine-specific subroutines of the following macros. */
418: #define CEILING(X,Y) (((X) + (Y) - 1) / (Y))
419: #define ROUNDUP(X,Y) (CEILING ((X), (Y)) * (Y))
420:
421: /* Update the data in CUM to advance over an argument
422: of mode MODE and data type TYPE.
423: (TYPE is null for libcalls where that information may not be available.)
424: Floats, and doubleword ints, are returned in f regs;
425: other ints, in r regs.
426: Aggregates, even short ones, are passed in memory. */
427:
428: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
429: ((TYPE) != 0 && (TREE_CODE ((TYPE)) == RECORD_TYPE \
430: || TREE_CODE ((TYPE)) == UNION_TYPE) \
431: ? 0 \
432: : GET_MODE_CLASS ((MODE)) == MODE_FLOAT || (MODE) == DImode \
433: ? ((CUM).floats = (ROUNDUP ((CUM).floats, GET_MODE_SIZE ((MODE))) \
434: + ROUNDUP (GET_MODE_SIZE (MODE), 4))) \
435: : GET_MODE_CLASS ((MODE)) == MODE_INT \
436: ? ((CUM).ints = (ROUNDUP ((CUM).ints, GET_MODE_SIZE ((MODE))) \
437: + ROUNDUP (GET_MODE_SIZE (MODE), 4))) \
438: : 0)
439:
440: /* Determine where to put an argument to a function.
441: Value is zero to push the argument on the stack,
442: or a hard register in which to store the argument.
443:
444: MODE is the argument's machine mode.
445: TYPE is the data type of the argument (as a tree).
446: This is null for libcalls where that information may
447: not be available.
448: CUM is a variable of type CUMULATIVE_ARGS which gives info about
449: the preceding args and about the function being called.
450: NAMED is nonzero if this argument is a named parameter
451: (otherwise it is an extra parameter matching an ellipsis). */
452:
453: /* On the i860, the first 12 words of integer arguments go in r16-r27,
454: and the first 8 words of floating arguments go in f8-f15.
455: DImode values are treated as floats. */
456:
457: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
458: ((TYPE) != 0 && (TREE_CODE ((TYPE)) == RECORD_TYPE \
459: || TREE_CODE ((TYPE)) == UNION_TYPE) \
460: ? 0 \
461: : GET_MODE_CLASS ((MODE)) == MODE_FLOAT || (MODE) == DImode \
462: ? (ROUNDUP ((CUM).floats, GET_MODE_SIZE ((MODE))) < 32 \
463: ? gen_rtx (REG, (MODE), \
464: 40+(ROUNDUP ((CUM).floats, \
465: GET_MODE_SIZE ((MODE))) \
466: / 4)) \
467: : 0) \
468: : GET_MODE_CLASS ((MODE)) == MODE_INT \
469: ? (ROUNDUP ((CUM).ints, GET_MODE_SIZE ((MODE))) < 48 \
470: ? gen_rtx (REG, (MODE), \
471: 16+(ROUNDUP ((CUM).ints, \
472: GET_MODE_SIZE ((MODE))) \
473: / 4)) \
474: : 0) \
475: : 0)
476:
477: /* For an arg passed partly in registers and partly in memory,
478: this is the number of registers used.
479: For args passed entirely in registers or entirely in memory, zero. */
480:
481: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
482:
483: /* This macro generates the assembly code for function entry.
484: FILE is a stdio stream to output the code to.
485: SIZE is an int: how many units of temporary storage to allocate.
486: Refer to the array `regs_ever_live' to determine which registers
487: to save; `regs_ever_live[I]' is nonzero if register number I
488: is ever used in the function. This macro is responsible for
489: knowing which registers should not be saved even if used. */
490:
491: #define FUNCTION_PROLOGUE(FILE, SIZE) \
492: { \
493: extern char call_used_regs[]; \
494: int fsize = (SIZE); \
495: int nregs, i; \
496: for (i = 0, nregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
497: { \
498: if (regs_ever_live[i] && ! call_used_regs[i]) \
499: nregs++; \
500: } \
501: fsize += nregs * 4 + 8; \
502: fsize = (fsize + 15) & -16; \
503: if (fsize > 0x7fff) \
504: { \
505: fprintf (FILE, "\tadds -16,sp,sp\n"); \
506: fprintf (FILE, "\tst.l fp,8(sp)\n"); \
507: fprintf (FILE, "\tst.l r1,12(sp)\n"); \
508: fprintf (FILE, "\tadds 8,sp,fp\n"); \
509: fprintf (FILE, "\torh %d,r0,r31\n", (fsize - 16) >> 16); \
510: fprintf (FILE, "\tor %d,r31,r31\n", (fsize - 16) & 0xffff); \
511: fprintf (FILE, "\tsubs sp,r31,sp\n"); \
512: } \
513: else \
514: { \
515: fprintf (FILE, "\tadds -%d,sp,sp\n", fsize); \
516: fprintf (FILE, "\tst.l fp,%d(sp)\n", fsize - 8); \
517: fprintf (FILE, "\tst.l r1,%d(sp)\n", fsize - 4); \
518: fprintf (FILE, "\tadds %d,sp,fp\n", fsize - 8); \
519: } \
520: for (i = 0, nregs = 0; i < 32; i++) \
521: if (regs_ever_live[i] && ! call_used_regs[i]) \
522: fprintf (FILE, "\tst.l %s,%d(sp)\n", \
523: reg_names[i], 4 * nregs++); \
524: for (i = 32; i < 64; i++) \
525: if (regs_ever_live[i] && ! call_used_regs[i]) \
526: fprintf (FILE, "\tfst.l %s,%d(sp)\n", \
527: reg_names[i], 4 * nregs++); \
528: }
529: /* ??? maybe save pairs or quads of fp registers. */
530:
531: /* Output assembler code to FILE to increment profiler label # LABELNO
532: for profiling a function entry. */
533:
534: #define FUNCTION_PROFILER(FILE, LABELNO) \
535: abort ();
536:
537: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
538: the stack pointer does not matter. The value is tested only in
539: functions that have frame pointers.
540: No definition is equivalent to always zero. */
541:
542: /* #define EXIT_IGNORE_STACK 0 */
543:
544: /* This macro generates the assembly code for function exit,
545: on machines that need it. If FUNCTION_EPILOGUE is not defined
546: then individual return instructions are generated for each
547: return statement. Args are same as for FUNCTION_PROLOGUE.
548:
549: The function epilogue should not depend on the current stack pointer!
550: It should use the frame pointer only. This is mandatory because
551: of alloca; we also take advantage of it to omit stack adjustments
552: before returning. */
553:
554: #define FUNCTION_EPILOGUE(FILE, SIZE) \
555: { \
556: extern char call_used_regs[]; \
557: int fsize = (SIZE); \
558: int nregs, i; \
559: for (i = 0, nregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
560: { \
561: if (regs_ever_live[i] && ! call_used_regs[i]) \
562: nregs++; \
563: } \
564: fsize += nregs * 4 + 8; \
565: fsize = (fsize + 15) & -16; \
566: if (fsize < 0x7fff) \
567: { \
568: for (i = 0, nregs = 0; i < 32; i++) \
569: if (regs_ever_live[i] && ! call_used_regs[i]) \
570: fprintf (FILE, "\tld.l %d(fp),%s\n", \
571: 4 * nregs++ - (fsize - 8), reg_names[i]); \
572: for (i = 32; i < 64; i++) \
573: if (regs_ever_live[i] && ! call_used_regs[i]) \
574: fprintf (FILE, "\tfld.l %d(fp),%s\n", \
575: 4 * nregs++ - (fsize - 8), reg_names[i]); \
576: } \
577: else \
578: { \
579: fprintf (FILE, "\torh %d,r0,r31\n", (fsize - 8) >> 16); \
580: fprintf (FILE, "\tor %d,r31,r31\n", (fsize - 8) & 0xffff); \
581: fprintf (FILE, "\tsubs fp,r31,sp\n"); \
582: for (i = 0, nregs = 0; i < 32; i++) \
583: if (regs_ever_live[i] && ! call_used_regs[i]) \
584: fprintf (FILE, "\tld.l %d(sp),%s\n", \
585: 4 * nregs++, reg_names[i]); \
586: for (i = 32; i < 64; i++) \
587: if (regs_ever_live[i] && ! call_used_regs[i]) \
588: fprintf (FILE, "\tfld.l %d(sp),%s\n", \
589: 4 * nregs++, reg_names[i]); \
590: } \
591: if (fsize < 0x7fff) \
592: { \
593: fprintf (FILE, "\tld.l 4(fp),r1\n"); \
594: fprintf (FILE, "\tld.l 0(fp),fp\n"); \
595: fprintf (FILE, "\tbri r1\n\taddu %d,sp,sp\n", fsize); \
596: } \
597: else \
598: { \
599: fprintf (FILE, "\tld.l 4(fp),r1\n"); \
600: fprintf (FILE, "\tadds 8,fp,r31\n"); \
601: fprintf (FILE, "\tld.l 0(fp),fp\n"); \
602: fprintf (FILE, "\tbri r1\n\tmov r31,sp\n"); \
603: } \
604: }
605:
606: /* If the memory address ADDR is relative to the frame pointer,
607: correct it to be relative to the stack pointer instead.
608: This is for when we don't use a frame pointer.
609: ADDR should be a variable name. */
610:
611: #define FIX_FRAME_POINTER_ADDRESS(ADDR,DEPTH) abort ();
612:
613: /* Addressing modes, and classification of registers for them. */
614:
615: /* #define HAVE_POST_INCREMENT */
616: /* #define HAVE_POST_DECREMENT */
617:
618: /* #define HAVE_PRE_DECREMENT */
1.1.1.2 root 619: /* #define HAVE_PRE_INCREMENT */
1.1 root 620:
621: /* Macros to check register numbers against specific register classes. */
622:
623: /* These assume that REGNO is a hard or pseudo reg number.
624: They give nonzero only if REGNO is a hard reg of the suitable class
625: or a pseudo reg currently allocated to a suitable hard reg.
626: Since they use reg_renumber, they are safe only once reg_renumber
627: has been allocated, which happens in local-alloc.c. */
628:
629: #define REGNO_OK_FOR_INDEX_P(REGNO) \
630: ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
631: #define REGNO_OK_FOR_BASE_P(REGNO) \
632: ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
633: #define REGNO_OK_FOR_FP_P(REGNO) \
634: (((REGNO) ^ 0x20) < 32 || (unsigned) (reg_renumber[REGNO] ^ 0x20) < 32)
635:
636: /* Now macros that check whether X is a register and also,
637: strictly, whether it is in a specified class.
638:
639: These macros are specific to the i860, and may be used only
640: in code for printing assembler insns and in conditions for
641: define_optimization. */
642:
643: /* 1 if X is an fp register. */
644:
645: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
646:
647: /* Maximum number of registers that can appear in a valid memory address. */
648:
649: #define MAX_REGS_PER_ADDRESS 2
650:
651: /* Recognize any constant value that is a valid address. */
652:
653: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
654:
655: /* Nonzero if the constant value X is a legitimate general operand.
656: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
657:
658: On the Sparc, this is anything but a CONST_DOUBLE.
659: Let's try permitting CONST_DOUBLEs and see what happens. */
660:
661: #define LEGITIMATE_CONSTANT_P(X) 1
662:
663: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
664: and check its validity for a certain class.
665: We have two alternate definitions for each of them.
666: The usual definition accepts all pseudo regs; the other rejects
667: them unless they have been allocated suitable hard regs.
668: The symbol REG_OK_STRICT causes the latter definition to be used.
669:
670: Most source files want to accept pseudo regs in the hope that
671: they will get allocated to the class that the insn wants them to be in.
672: Source files for reload pass need to be strict.
673: After reload, it makes no difference, since pseudo regs have
674: been eliminated by then. */
675:
676: #ifndef REG_OK_STRICT
677:
678: /* Nonzero if X is a hard reg that can be used as an index
679: or if it is a pseudo reg. */
680: #define REG_OK_FOR_INDEX_P(X) (((unsigned) REGNO (X)) - 32 >= 14)
681: /* Nonzero if X is a hard reg that can be used as a base reg
682: or if it is a pseudo reg. */
683: #define REG_OK_FOR_BASE_P(X) (((unsigned) REGNO (X)) - 32 >= 14)
684:
685: #else
686:
687: /* Nonzero if X is a hard reg that can be used as an index. */
688: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
689: /* Nonzero if X is a hard reg that can be used as a base reg. */
690: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
691:
692: #endif
693:
694: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
695: that is a valid memory address for an instruction.
696: The MODE argument is the machine mode for the MEM expression
697: that wants to use this address.
698:
1.1.1.3 root 699: On the i860, the actual addresses must be REG+REG or REG+SMALLINT.
1.1 root 700: But we can treat a SYMBOL_REF as legitimate if it is part of this
701: function's constant-pool, because such addresses can actually
702: be output as REG+SMALLINT.
703:
1.1.1.3 root 704: The displacement in an address must be a multiple of the alignment.
705:
1.1 root 706: Try making SYMBOL_REF (and other things which are CONSTANT_ADDRESS_P)
707: a legitimate address, regardless. Because the only insns which can use
708: memory are load or store insns, the added hair in the machine description
709: is not that bad. It should also speed up the compiler by halving the number
710: of insns it must manage for each (MEM (SYMBOL_REF ...)) involved. */
711:
712: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
713: { if (GET_CODE (X) == REG) \
714: { if (REG_OK_FOR_BASE_P (X)) goto ADDR; } \
715: else if (GET_CODE (X) == PLUS) \
716: { \
717: if (GET_CODE (XEXP (X, 0)) == REG \
718: && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
719: { \
720: if (GET_CODE (XEXP (X, 1)) == CONST_INT \
721: && INTVAL (XEXP (X, 1)) >= -0x8000 \
1.1.1.3 root 722: && INTVAL (XEXP (X, 1)) < 0x8000 \
1.1.1.5 ! root 723: && (INTVAL (XEXP (X, 1)) & (GET_MODE_SIZE (MODE) - 1)) == 0) \
1.1 root 724: goto ADDR; \
725: } \
726: else if (GET_CODE (XEXP (X, 1)) == REG \
727: && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
728: { \
729: if (GET_CODE (XEXP (X, 0)) == CONST_INT \
730: && INTVAL (XEXP (X, 0)) >= -0x8000 \
1.1.1.3 root 731: && INTVAL (XEXP (X, 0)) < 0x8000 \
1.1.1.5 ! root 732: && (INTVAL (XEXP (X, 0)) & (GET_MODE_SIZE (MODE) - 1)) == 0) \
1.1 root 733: goto ADDR; \
734: } \
735: } \
736: else if (CONSTANT_ADDRESS_P (X)) \
737: goto ADDR; \
738: }
739:
740: /* Try machine-dependent ways of modifying an illegitimate address
741: to be legitimate. If we find one, return the new, valid address.
742: This macro is used in only one place: `memory_address' in explow.c.
743:
744: OLDX is the address as it was before break_out_memory_refs was called.
745: In some cases it is useful to look at this to decide what needs to be done.
746:
747: MODE and WIN are passed so that this macro can use
748: GO_IF_LEGITIMATE_ADDRESS.
749:
750: It is always safe for this macro to do nothing. It exists to recognize
751: opportunities to optimize the output. */
752:
753: /* On the i860, change COMPLICATED + CONSTANT to REG+CONSTANT.
754: Also change a symbolic constant to a REG,
755: though that may not be necessary. */
756:
757: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
758: { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
759: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
760: force_operand (XEXP (X, 0), 0)); \
761: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
762: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
763: force_operand (XEXP (X, 1), 0)); \
764: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == PLUS) \
765: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
766: force_operand (XEXP (X, 0), 0)); \
767: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == PLUS) \
768: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
769: force_operand (XEXP (X, 1), 0)); \
770: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) != REG \
771: && GET_CODE (XEXP (X, 0)) != CONST_INT) \
772: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
773: copy_to_mode_reg (SImode, XEXP (X, 0))); \
774: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) != REG \
775: && GET_CODE (XEXP (X, 1)) != CONST_INT) \
776: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
777: copy_to_mode_reg (SImode, XEXP (X, 1))); \
778: if (GET_CODE (x) == SYMBOL_REF) \
779: (X) = copy_to_reg (X); \
780: if (GET_CODE (x) == CONST) \
781: (X) = copy_to_reg (X); \
782: if (memory_address_p (MODE, X)) \
783: goto WIN; }
784:
785: /* Go to LABEL if ADDR (a legitimate address expression)
786: has an effect that depends on the machine mode it is used for.
1.1.1.3 root 787: On the i860 this is never true.
788: There are some addresses that are invalid in wide modes
789: but valid for narrower modes, but they shouldn't cause trouble. */
1.1 root 790:
791: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
1.1.1.3 root 792:
793: /* On the 860, every legit address is offsettable,
794: but GCC would have trouble figuring this out. */
795:
796: #define OFFSETTABLE_ADDRESS_P(MODE, ADDR) (memory_address_p ((MODE), (ADDR)))
1.1 root 797:
798: /* Specify the machine mode that this machine uses
799: for the index in the tablejump instruction. */
800: #define CASE_VECTOR_MODE SImode
801:
802: /* Define this if the tablejump instruction expects the table
803: to contain offsets from the address of the table.
804: Do not define this if the table should contain absolute addresses. */
805: /* #define CASE_VECTOR_PC_RELATIVE */
806:
807: /* Specify the tree operation to be used to convert reals to integers. */
808: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
809:
810: /* This is the kind of divide that is easiest to do in the general case. */
811: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
812:
1.1.1.4 root 813: /* Must pass floats to gnulib functions as doubles. */
814: #define GNULIB_NEEDS_DOUBLE 1
815:
1.1 root 816: #define DIVSI3_LIBCALL "*.div"
817: #define UDIVSI3_LIBCALL "*.udiv"
818: #define REMSI3_LIBCALL "*.rem"
819: #define UREMSI3_LIBCALL "*.urem"
820:
821: /* Define this as 1 if `char' should by default be signed; else as 0. */
822: #define DEFAULT_SIGNED_CHAR 1
823:
824: /* Max number of bytes we can move from memory to memory
825: in one reasonably fast instruction. */
826: #define MOVE_MAX 16
827:
828: /* Nonzero if access to memory by bytes is slow and undesirable. */
829: #define SLOW_BYTE_ACCESS 0
830:
831: /* This is System V, so it wants sdb format. */
832: #define DBX_DEBUGGING_INFO
833:
834: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
835: is done just by pretending it is already truncated. */
836: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
837:
838: /* Specify the machine mode that pointers have.
839: After generation of rtl, the compiler makes no further distinction
840: between pointers and any other objects of this machine mode. */
841: #define Pmode SImode
842:
843: /* A function address in a call instruction
844: is a byte address (for indexing purposes)
845: so give the MEM rtx a byte's mode. */
846: #define FUNCTION_MODE SImode
847:
848: /* Define this if addresses of constant functions
849: shouldn't be put through pseudo regs where they can be cse'd.
850: Desirable on machines where ordinary constants are expensive
851: but a CALL with constant address is cheap. */
852: #define NO_FUNCTION_CSE
853:
854: /* Compute the cost of computing a constant rtl expression RTX
855: whose rtx-code is CODE. The body of this macro is a portion
856: of a switch statement. If the code is computed here,
857: return it with a return statement. Otherwise, break from the switch. */
858:
859: #define CONST_COSTS(RTX,CODE) \
860: case CONST_INT: \
861: if (INTVAL (RTX) == 0) \
862: return 0; \
863: if (INTVAL (RTX) < 0x2000 && INTVAL (RTX) >= -0x2000) return 1; \
864: case CONST: \
865: case LABEL_REF: \
866: case SYMBOL_REF: \
867: return 2; \
868: case CONST_DOUBLE: \
1.1.1.3 root 869: return 2 * GET_MODE_SIZE (GET_MODE (RTX)) / UNITS_PER_WORD;
1.1 root 870:
871: /* Tell final.c how to eliminate redundant test instructions. */
872:
873: /* Here we define machine-dependent flags and fields in cc_status
874: (see `conditions.h'). */
875:
876: /* This holds the value sourcing h%r31. We keep this info
877: around so that mem/mem ops, such as increment and decrement,
878: etc, can be performed reasonably. */
879: #define CC_STATUS_MDEP rtx
880:
881: #define CC_STATUS_MDEP_INIT (cc_status.mdep = 0)
882:
883: /* On the i860, each comparison tests just one condition,
884: so only that condition can be remembered.
885: We don't need GT, GE, GTU and GEU because CC_REVERSED can handle them. */
886: #define CC_ONLY_EQ 0100
887: #define CC_ONLY_LE 0200
888: #define CC_ONLY_LT 0400
889: #define CC_ONLY_LEU 02000
890: #define CC_ONLY_LTU 04000
891: #define CC_CONDITION_MASK 07700
892:
893: /* Non-zero to invert the sense of the condition code. */
894: #define CC_NEGATED 010000
895:
896: /* Nonzero if we know the value of h%r31. */
897: #define CC_KNOW_HI_R31 0100000
898:
899: /* Nonzero if h%r31 is actually ha%something, rather than h%something. */
900: #define CC_HI_R31_ADJ 0200000
901:
902: /* Store in cc_status the expressions
903: that the condition codes will describe
904: after execution of an instruction whose pattern is EXP.
905: Do not alter them if the instruction would not alter the cc's. */
906:
907: /* On the i860, only compare insns set a useful condition code. */
908:
909: #define NOTICE_UPDATE_CC(EXP, INSN) \
910: { cc_status.flags &= (CC_KNOW_HI_R31 | CC_HI_R31_ADJ); \
911: cc_status.value1 = 0; cc_status.value2 = 0; }
912:
913: /* Control the assembler format that we output. */
914:
915: /* Output at beginning of assembler file. */
916: /* The .file command should always begin the output. */
917:
918: #define ASM_FILE_START(FILE)
919: #if 0
920: #define ASM_FILE_START(FILE) \
921: do { sdbout_filename ((FILE), main_input_filename); \
922: if (optimize) ASM_FILE_START_1 (FILE); \
923: } while (0)
924: #endif
925:
926: #define ASM_FILE_START_1(FILE)
927:
928: /* Output to assembler file text saying following lines
929: may contain character constants, extra white space, comments, etc. */
930:
931: #define ASM_APP_ON ""
932:
933: /* Output to assembler file text saying following lines
934: no longer contain unusual constructs. */
935:
936: #define ASM_APP_OFF ""
937:
938: /* Output before read-only data. */
939:
940: #define TEXT_SECTION_ASM_OP ".text"
941:
942: /* Output before writable data. */
943:
944: #define DATA_SECTION_ASM_OP ".data"
945:
946: /* How to refer to registers in assembler output.
947: This sequence is indexed by compiler's hard-register-number (see above). */
948:
949: #define REGISTER_NAMES \
950: {"r0", "r1", "sp", "fp", "r4", "r5", "r6", "r7", "r8", "r9", \
951: "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", \
952: "r20", "r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", \
953: "r30", "r31", \
954: "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9", \
955: "f10", "f11", "f12", "f13", "f14", "f15", "f16", "f17", "f18", "f19", \
956: "f20", "f21", "f22", "f23", "f24", "f25", "f26", "f27", "f28", "f29", \
957: "f30", "f31" }
958:
959: /* How to renumber registers for dbx and gdb. */
960:
961: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
962:
963: /* This is how to output the definition of a user-level label named NAME,
964: such as the label on a static function or variable NAME. */
965:
966: #define ASM_OUTPUT_LABEL(FILE,NAME) \
967: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
968:
1.1.1.2 root 969: /* Likewise, for function names. The difference is that we output a no-op
970: just before the beginning of the function, to ensure that there does not
971: appear to be a delayed branch there.
972: Such a thing would confuse interrupt recovery. */
973: #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
974: do { fprintf (FILE, "\tnop\n"); ASM_OUTPUT_LABEL (FILE,NAME); } while (0)
975:
1.1 root 976: /* This is how to output a command to make the user-level label named NAME
977: defined for reference from other files. */
978:
979: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
980: do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
981:
982: /* This is how to output a reference to a user-level label named NAME.
983: `assemble_name' uses this. */
984:
985: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
986: fprintf (FILE, "_%s", NAME)
987:
988: /* This is how to output an internal numbered label where
989: PREFIX is the class of label and NUM is the number within the class. */
990:
991: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
992: fprintf (FILE, ".%s%d:\n", PREFIX, NUM)
993:
994: /* This is how to output an internal numbered label which
995: labels a jump table. */
996:
997: #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,JUMPTABLE) \
1.1.1.3 root 998: fprintf (FILE, ".data\n\t.align 4\n.%s%d:\n", PREFIX, NUM)
1.1 root 999:
1000: /* Output at the end of a jump table. */
1001:
1002: #define ASM_OUTPUT_CASE_END(FILE,NUM,INSN) \
1.1.1.3 root 1003: fprintf (FILE, ".text\n")
1.1 root 1004:
1005: /* This is how to store into the string LABEL
1006: the symbol_ref name of an internal numbered label where
1007: PREFIX is the class of label and NUM is the number within the class.
1008: This is suitable for output with `assemble_name'. */
1009:
1010: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1011: sprintf (LABEL, "*.%s%d", PREFIX, NUM)
1012:
1013: #define ASCII_DATA_ASM_OP ".byte"
1014: #define ASM_OUTPUT_ASCII(f, p, size) \
1015: { register int i; \
1016: int inside; \
1017: inside = FALSE; \
1018: for (i = 0; i < size; i++) { \
1019: if (i % 64 == 0) { \
1020: if (i != 0) { \
1021: if (inside) \
1022: putc('"', f); \
1023: putc('\n', f); \
1024: inside = FALSE; \
1025: } \
1026: fprintf(f, "%s ", ASCII_DATA_ASM_OP); \
1027: } \
1028: if (p[i] < 32 || p[i] == '\\' || p[i] == '"' || p[i] == 127) { \
1029: if (inside) { \
1030: putc('"', f); \
1031: inside = FALSE; \
1032: } \
1033: if (i % 64 != 0) \
1034: putc(',', f); \
1035: fprintf(f, "%d", p[i]); \
1036: } else { \
1037: if (!inside) { \
1038: if (i % 64 != 0) \
1039: putc(',', f); \
1040: putc('"', f); \
1041: inside = TRUE; \
1042: } \
1043: putc(p[i], f); \
1044: } \
1045: } \
1046: if (inside) \
1047: putc('"', f); \
1048: putc('\n', f); \
1049: }
1050:
1051: /* This is how to output an assembler line defining a `double' constant. */
1052:
1053: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1054: fprintf (FILE, "\t.double %.20e\n", (VALUE))
1055:
1056: /* This is how to output an assembler line defining a `float' constant. */
1057:
1058: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1059: fprintf (FILE, "\t.float %.12e\n", (VALUE))
1060:
1061: /* This is how to output an assembler line defining an `int' constant. */
1062:
1063: #define ASM_OUTPUT_INT(FILE,VALUE) \
1064: ( fprintf (FILE, "\t.long "), \
1065: output_addr_const (FILE, (VALUE)), \
1066: fprintf (FILE, "\n"))
1067:
1068: /* Likewise for `char' and `short' constants. */
1069:
1070: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1071: ( fprintf (FILE, "\t.short "), \
1072: output_addr_const (FILE, (VALUE)), \
1073: fprintf (FILE, "\n"))
1074:
1075: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1076: ( fprintf (FILE, "\t.byte "), \
1077: output_addr_const (FILE, (VALUE)), \
1078: fprintf (FILE, "\n"))
1079:
1080: /* This is how to output an assembler line for a numeric constant byte. */
1081:
1082: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1083: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1084:
1085: /* This is how to output code to push a register on the stack.
1086: It need not be very fast code. */
1087:
1088: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1.1.1.5 ! root 1089: fprintf (FILE, "\taddu -16,sp,sp\n\t%sst.l %s,0(sp)\n", \
1.1 root 1090: ((REGNO) < 32 ? "" : "f"), reg_names[REGNO])
1091:
1092: /* This is how to output an insn to pop a register from the stack.
1093: It need not be very fast code. */
1094:
1095: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1.1.1.5 ! root 1096: fprintf (FILE, "\t%sld.l 0(sp),%s\n\taddu 16,sp,sp\n", \
1.1 root 1097: ((REGNO) < 32 ? "" : "f"), reg_names[REGNO])
1098:
1099: /* This is how to output an element of a case-vector that is absolute. */
1100:
1101: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1102: fprintf (FILE, "\t.long .L%d\n", VALUE)
1103:
1104: /* This is how to output an element of a case-vector that is relative.
1105: (The i860 does not use such vectors,
1106: but we must define this macro anyway.) */
1107:
1108: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1109: fprintf (FILE, "\t.word .L%d-.L%d\n", VALUE, REL)
1110:
1111: /* This is how to output an assembler line
1112: that says to advance the location counter
1113: to a multiple of 2**LOG bytes. */
1114:
1115: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1116: if ((LOG) != 0) \
1117: fprintf (FILE, "\t.align %d\n", 1 << (LOG))
1118:
1119: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1.1.1.3 root 1120: fprintf (FILE, "\t.blkb %u\n", (SIZE))
1.1 root 1121:
1122: /* This says how to output an assembler line
1123: to define a global common symbol. */
1124:
1125: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1126: ( fputs (".comm ", (FILE)), \
1127: assemble_name ((FILE), (NAME)), \
1.1.1.3 root 1128: fprintf ((FILE), ",%u\n", (ROUNDED)))
1.1 root 1129:
1130: /* This says how to output an assembler line
1131: to define a local common symbol. */
1132:
1133: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1134: ( fputs (".lcomm ", (FILE)), \
1135: assemble_name ((FILE), (NAME)), \
1.1.1.3 root 1136: fprintf ((FILE), ",%u\n", (ROUNDED)))
1.1 root 1137:
1138: /* Store in OUTPUT a string (made with alloca) containing
1139: an assembler-name for a local static variable named NAME.
1140: LABELNO is an integer which is different for each call. */
1141:
1142: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1143: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1144: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1145:
1146: /* Define the parentheses used to group arithmetic operations
1147: in assembler code. */
1148:
1149: #define ASM_OPEN_PAREN "("
1150: #define ASM_CLOSE_PAREN ")"
1151:
1152: /* Define results of standard character escape sequences. */
1153: #define TARGET_BELL 007
1154: #define TARGET_BS 010
1155: #define TARGET_TAB 011
1156: #define TARGET_NEWLINE 012
1157: #define TARGET_VT 013
1158: #define TARGET_FF 014
1159: #define TARGET_CR 015
1160:
1.1.1.3 root 1161: /* This assumes the compiler is running on a little-endian machine.
1162: The support for the other case is left for version 2,
1163: since there is nothing in version 1 to indicate the sex of the host. */
1164:
1165: #define PRINT_OPERAND_EXTRACT_FLOAT(X) \
1166: u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X);
1167:
1.1 root 1168: /* Print operand X (an rtx) in assembler syntax to file FILE.
1169: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1170: For `%' followed by punctuation, CODE is the punctuation and X is null.
1171:
1172: On the i860, the CODE can be `r', meaning this is a register-only operand
1173: and an immediate zero should be represented as `r0'.
1174: It can also be `m', meaning this is a memory ref,
1175: but print its address as a constant. */
1176:
1177: #define PRINT_OPERAND(FILE, X, CODE) \
1178: { if (GET_CODE (X) == REG) \
1179: fprintf (FILE, "%s", reg_names[REGNO (X)]); \
1.1.1.2 root 1180: else if ((CODE) == 'm') \
1181: output_address (XEXP (X, 0)); \
1.1 root 1182: else if (GET_CODE (X) == MEM) \
1183: output_address (XEXP (X, 0)); \
1184: else if ((CODE) == 'r' && (X) == const0_rtx) \
1185: fprintf (FILE, "r0"); \
1186: else if ((CODE) == 'r' && (X) == CONST0_RTX (GET_MODE (X))) \
1187: fprintf (FILE, "f0"); \
1188: else if (GET_CODE (X) == CONST_DOUBLE) \
1.1.1.2 root 1189: { \
1190: if (GET_MODE (X) == SFmode) \
1.1.1.3 root 1191: { union { double d; int i[2]; } u; \
1192: union { float f; int i; } u1; \
1193: PRINT_OPERAND_EXTRACT_FLOAT (X); \
1194: u1.f = u.d; \
1195: fprintf (FILE, "0x%x", u1.i); } \
1.1.1.2 root 1196: else \
1197: abort (); \
1198: } \
1.1 root 1199: else \
1200: output_addr_const (FILE, X); }
1201:
1202: /* Print a memory address as an operand to reference that memory location. */
1203:
1204: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1205: { register rtx base, index = 0; \
1206: int offset = 0; \
1207: register rtx addr = ADDR; \
1208: if (GET_CODE (addr) == REG) \
1209: { \
1210: fprintf (FILE, "0(%s)", reg_names[REGNO (addr)]); \
1211: } \
1212: else if (GET_CODE (addr) == PLUS) \
1213: { \
1214: if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1215: offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1);\
1216: else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1217: offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0);\
1218: else \
1219: base = XEXP (addr, 0), index = XEXP (addr, 1); \
1220: if (index != 0) \
1221: fprintf (FILE, "%s", reg_names[REGNO (index)]); \
1222: else \
1223: fprintf (FILE, "%d", offset); \
1224: fprintf (FILE, "(%s)", reg_names[REGNO (base)]); \
1225: } \
1226: else \
1227: { \
1228: /* ??? this may be wrong. */ \
1229: output_addr_const (FILE, addr); \
1230: } \
1231: }
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