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1.1 root 1: /* Definitions of target machine for GNU compiler. Sun 68000/68020 version.
2: Copyright (C) 1987, 1988 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
6: GNU CC is free software; you can redistribute it and/or modify
7: it under the terms of the GNU General Public License as published by
8: the Free Software Foundation; either version 1, or (at your option)
9: any later version.
10:
11: GNU CC is distributed in the hope that it will be useful,
12: but WITHOUT ANY WARRANTY; without even the implied warranty of
13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14: GNU General Public License for more details.
15:
16: You should have received a copy of the GNU General Public License
17: along with GNU CC; see the file COPYING. If not, write to
18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19:
20:
21: /* Note that some other tm- files include this one and then override
22: many of the definitions that relate to assembler syntax. */
23:
24:
25: /* Names to predefine in the preprocessor for this target machine. */
26:
27: /* See tm-sun3.h, tm-sun2.h, tm-isi68.h for different CPP_PREDEFINES. */
28:
29: /* Print subsidiary information on the compiler version in use. */
30: #ifdef MOTOROLA
31: #define TARGET_VERSION fprintf (stderr, " (68k, Motorola syntax)");
32: #else
33: #define TARGET_VERSION fprintf (stderr, " (68k, MIT syntax)");
34: #endif
35:
36: /* Run-time compilation parameters selecting different hardware subsets. */
37:
38: extern int target_flags;
39:
40: /* Macros used in the machine description to test the flags. */
41:
42: /* Compile for a 68020 (not a 68000 or 68010). */
43: #define TARGET_68020 (target_flags & 1)
44: /* Compile 68881 insns for floating point (not library calls). */
45: #define TARGET_68881 (target_flags & 2)
46: /* Compile using 68020 bitfield insns. */
47: #define TARGET_BITFIELD (target_flags & 4)
48: /* Compile using rtd insn calling sequence.
49: This will not work unless you use prototypes at least
50: for all functions that can take varying numbers of args. */
51: #define TARGET_RTD (target_flags & 8)
52: /* Compile passing first two args in regs 0 and 1.
53: This exists only to test compiler features that will
54: be needed for RISC chips. It is not usable
55: and is not intended to be usable on this cpu. */
56: #define TARGET_REGPARM (target_flags & 020)
57: /* Compile with 16-bit `int'. */
58: #define TARGET_SHORT (target_flags & 040)
59:
60: /* Compile with special insns for Sun FPA. */
61: #define TARGET_FPA (target_flags & 0100)
62:
63: /* Macro to define tables used to set the flags.
64: This is a list in braces of pairs in braces,
65: each pair being { "NAME", VALUE }
66: where VALUE is the bits to set or minus the bits to clear.
67: An empty string NAME is used to identify the default VALUE. */
68:
69: #define TARGET_SWITCHES \
70: { { "68020", 5}, \
71: { "c68020", 5}, \
72: { "68881", 2}, \
73: { "bitfield", 4}, \
74: { "68000", -5}, \
75: { "c68000", -5}, \
76: { "soft-float", -0102}, \
77: { "nobitfield", -4}, \
78: { "rtd", 8}, \
79: { "nortd", -8}, \
80: { "short", 040}, \
81: { "noshort", -040}, \
82: { "fpa", 0100}, \
83: { "nofpa", -0100}, \
84: { "", TARGET_DEFAULT}}
85: /* TARGET_DEFAULT is defined in tm-sun*.h and tm-isi68.h, etc. */
86:
87: /* Blow away 68881 flag silently on TARGET_FPA (since we can't clear
88: any bits in TARGET_SWITCHES above) */
89: #define OVERRIDE_OPTIONS \
90: { \
91: if (TARGET_FPA) target_flags &= ~2; \
92: }
93:
94: /* target machine storage layout */
95:
96: /* Define this if most significant bit is lowest numbered
97: in instructions that operate on numbered bit-fields.
98: This is true for 68020 insns such as bfins and bfexts.
99: We make it true always by avoiding using the single-bit insns
100: except in special cases with constant bit numbers. */
101: #define BITS_BIG_ENDIAN
102:
103: /* Define this if most significant byte of a word is the lowest numbered. */
104: /* That is true on the 68000. */
105: #define BYTES_BIG_ENDIAN
106:
107: /* Define this if most significant word of a multiword number is numbered. */
108: /* For 68000 we can decide arbitrarily
109: since there are no machine instructions for them. */
110: /* #define WORDS_BIG_ENDIAN */
111:
112: /* number of bits in an addressible storage unit */
113: #define BITS_PER_UNIT 8
114:
115: /* Width in bits of a "word", which is the contents of a machine register.
116: Note that this is not necessarily the width of data type `int';
117: if using 16-bit ints on a 68000, this would still be 32.
118: But on a machine with 16-bit registers, this would be 16. */
119: #define BITS_PER_WORD 32
120:
121: /* Width of a word, in units (bytes). */
122: #define UNITS_PER_WORD 4
123:
124: /* Width in bits of a pointer.
125: See also the macro `Pmode' defined below. */
126: #define POINTER_SIZE 32
127:
128: /* Allocation boundary (in *bits*) for storing pointers in memory. */
129: #define POINTER_BOUNDARY 16
130:
131: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
132: #define PARM_BOUNDARY (TARGET_SHORT ? 16 : 32)
133:
134: /* Boundary (in *bits*) on which stack pointer should be aligned. */
135: #define STACK_BOUNDARY 16
136:
137: /* Allocation boundary (in *bits*) for the code of a function. */
138: #define FUNCTION_BOUNDARY 16
139:
140: /* Alignment of field after `int : 0' in a structure. */
141: #define EMPTY_FIELD_BOUNDARY 16
142:
143: /* No data type wants to be aligned rounder than this. */
144: #define BIGGEST_ALIGNMENT 16
145:
146: /* Define this if move instructions will actually fail to work
147: when given unaligned data. */
148: #define STRICT_ALIGNMENT
149:
150: /* Define number of bits in most basic integer type.
151: (If undefined, default is BITS_PER_WORD). */
152:
153: #define INT_TYPE_SIZE (TARGET_SHORT ? 16 : 32)
154:
155: /* Standard register usage. */
156:
157: /* Number of actual hardware registers.
158: The hardware registers are assigned numbers for the compiler
159: from 0 to just below FIRST_PSEUDO_REGISTER.
160: All registers that the compiler knows about must be given numbers,
161: even those that are not normally considered general registers.
162: For the 68000, we give the data registers numbers 0-7,
163: the address registers numbers 010-017,
164: and the 68881 floating point registers numbers 020-027. */
165: #define FIRST_PSEUDO_REGISTER 56 /* 24 */
166:
167: /* 1 for registers that have pervasive standard uses
168: and are not available for the register allocator.
169: On the 68000, only the stack pointer is such. */
170: /* fpa0 is also reserved so that it can be used to move shit back and
171: forth between high fpa regs and everything else. */
172: #define FIXED_REGISTERS \
173: {0, 0, 0, 0, 0, 0, 0, 0, \
174: 0, 0, 0, 0, 0, 0, 0, 1, \
175: 0, 0, 0, 0, 0, 0, 0, 0, \
176: /* FPA registers. */ \
177: 1, 0, 0, 0, 0, 0, 0, 0, \
178: 0, 0, 0, 0, 0, 0, 0, 0, \
179: 0, 0, 0, 0, 0, 0, 0, 0, \
180: 0, 0, 0, 0, 0, 0, 0, 0, }
181:
182: /* 1 for registers not available across function calls.
183: These must include the FIXED_REGISTERS and also any
184: registers that can be used without being saved.
185: The latter must include the registers where values are returned
186: and the register where structure-value addresses are passed.
187: Aside from that, you can include as many other registers as you like. */
188: #define CALL_USED_REGISTERS \
189: {1, 1, 0, 0, 0, 0, 0, 0, \
190: 1, 1, 0, 0, 0, 0, 0, 1, \
191: 1, 1, 0, 0, 0, 0, 0, 0, \
192: /* FPA registers. */ \
193: 1, 1, 1, 1, 0, 0, 0, 0, \
194: 0, 0, 0, 0, 0, 0, 0, 0, \
195: 0, 0, 0, 0, 0, 0, 0, 0, \
196: 0, 0, 0, 0, 0, 0, 0, 0, }
197:
198: /* Make sure everything's fine if we *don't* have a given processor.
199: This assumes that putting a register in fixed_regs will keep the
200: compilers mitt's completely off it. We don't bother to zero it out
201: of register classes. If neither TARGET_FPA or TARGET_68881 is set,
202: the compiler won't touch since no instructions that use these
203: registers will be valid. */
204: #define CONDITIONAL_REGISTER_USAGE \
205: { \
206: int i; \
207: HARD_REG_SET x; \
208: if (!TARGET_FPA) \
209: { \
210: COPY_HARD_REG_SET (x, reg_class_contents[(int)FPA_REGS]); \
211: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
212: if (TEST_HARD_REG_BIT (x, i)) \
213: fixed_regs[i] = call_used_regs[i] = 1; \
214: } \
215: if (TARGET_FPA) \
216: { \
217: COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]); \
218: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
219: if (TEST_HARD_REG_BIT (x, i)) \
220: fixed_regs[i] = call_used_regs[i] = 1; \
221: } \
222: }
223:
224: /* Return number of consecutive hard regs needed starting at reg REGNO
225: to hold something of mode MODE.
226: This is ordinarily the length in words of a value of mode MODE
227: but can be less for certain modes in special long registers.
228:
229: On the 68000, ordinary registers hold 32 bits worth;
230: for the 68881 registers, a single register is always enough for
231: anything that can be stored in them at all. */
232: #define HARD_REGNO_NREGS(REGNO, MODE) \
233: ((REGNO) >= 16 ? 1 \
234: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
235:
236: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
237: On the 68000, the cpu registers can hold any mode but the 68881 registers
238: can hold only SFmode or DFmode. And the 68881 registers can't hold anything
239: if 68881 use is disabled. However, the Sun FPA register can
240: (apparently) hold whatever you feel like putting in them. */
241: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
242: (((REGNO) < 16 && \
243: (!TARGET_FPA || (MODE) != DFmode || (REGNO) != 7)) \
244: || ((REGNO) < 24 \
245: ? TARGET_68881 && ((MODE) == SFmode || (MODE) == DFmode) \
246: : ((REGNO) < 56 \
247: ? TARGET_FPA : 0)))
248:
249: /* Value is 1 if it is a good idea to tie two pseudo registers
250: when one has mode MODE1 and one has mode MODE2.
251: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
252: for any hard reg, then this must be 0 for correct output. */
253: #define MODES_TIEABLE_P(MODE1, MODE2) \
254: (! TARGET_68881 \
255: || (((MODE1) == SFmode || (MODE1) == DFmode) \
256: == ((MODE2) == SFmode || (MODE2) == DFmode)))
257:
258: /* Specify the registers used for certain standard purposes.
259: The values of these macros are register numbers. */
260:
261: /* m68000 pc isn't overloaded on a register. */
262: /* #define PC_REGNUM */
263:
264: /* Register to use for pushing function arguments. */
265: #define STACK_POINTER_REGNUM 15
266:
267: /* Base register for access to local variables of the function. */
268: #define FRAME_POINTER_REGNUM 14
269:
270: /* Value should be nonzero if functions must have frame pointers.
271: Zero means the frame pointer need not be set up (and parms
272: may be accessed via the stack pointer) in functions that seem suitable.
273: This is computed in `reload', in reload1.c. */
274: #define FRAME_POINTER_REQUIRED 0
275:
276: /* Base register for access to arguments of the function. */
277: #define ARG_POINTER_REGNUM 14
278:
279: /* Register in which static-chain is passed to a function. */
280: #define STATIC_CHAIN_REGNUM 8
281:
282: /* Register in which address to store a structure value
283: is passed to a function. */
284: #define STRUCT_VALUE_REGNUM 9
285:
286: /* Define the classes of registers for register constraints in the
287: machine description. Also define ranges of constants.
288:
289: One of the classes must always be named ALL_REGS and include all hard regs.
290: If there is more than one class, another class must be named NO_REGS
291: and contain no registers.
292:
293: The name GENERAL_REGS must be the name of a class (or an alias for
294: another name such as ALL_REGS). This is the class of registers
295: that is allowed by "g" or "r" in a register constraint.
296: Also, registers outside this class are allocated only when
297: instructions express preferences for them.
298:
299: The classes must be numbered in nondecreasing order; that is,
300: a larger-numbered class must never be contained completely
301: in a smaller-numbered class.
302:
303: For any two classes, it is very desirable that there be another
304: class that represents their union. */
305:
306: /* The 68000 has three kinds of registers, so eight classes would be
307: a complete set. One of them is not needed. */
308:
309: /*
310: * Notes on final choices:
311: *
312: * 1) Didn't feel any need to union-ize LOW_FPA_REGS with anything
313: * else.
314: * 2) Removed all unions that involve address registers with
315: * floating point registers (left in unions of address and data with
316: * floating point).
317: * 3) Defined GENERAL_REGS as ADDR_OR_DATA_REGS.
318: * 4) Defined ALL_REGS as FPA_OR_FP_OR_GENERAL_REGS.
319: * 4) Left in everything else.
320: */
321: enum reg_class { NO_REGS, LO_FPA_REGS, FPA_REGS, FP_REGS,
322: FP_OR_FPA_REGS, DATA_REGS, DATA_OR_FPA_REGS, DATA_OR_FP_REGS,
323: DATA_OR_FP_OR_FPA_REGS, ADDR_REGS, GENERAL_REGS,
324: GENERAL_OR_FPA_REGS, GENERAL_OR_FP_REGS, ALL_REGS,
325: LIM_REG_CLASSES };
326:
327: #define N_REG_CLASSES (int) LIM_REG_CLASSES
328:
329: /* Give names of register classes as strings for dump file. */
330:
331: #define REG_CLASS_NAMES \
332: { "NO_REGS", "LO_FPA_REGS", "FPA_REGS", "FP_REGS", \
333: "FP_OR_FPA_REGS", "DATA_REGS", "DATA_OR_FPA_REGS", "DATA_OR_FP_REGS", \
334: "DATA_OR_FP_OR_FPA_REGS", "ADDR_REGS", "GENERAL_REGS", \
335: "GENERAL_OR_FPA_REGS", "GENERAL_OR_FP_REGS", "ALL_REGS" }
336:
337: /* Define which registers fit in which classes.
338: This is an initializer for a vector of HARD_REG_SET
339: of length N_REG_CLASSES. */
340:
341: #define REG_CLASS_CONTENTS \
342: { \
343: {0, 0}, /* NO_REGS */ \
344: {0xff000000, 0x000000ff}, /* LO_FPA_REGS */ \
345: {0xff000000, 0x00ffffff}, /* FPA_REGS */ \
346: {0x00ff0000, 0x00000000}, /* FP_REGS */ \
347: {0xffff0000, 0x00ffffff}, /* FP_OR_FPA_REGS */ \
348: {0x000000ff, 0x00000000}, /* DATA_REGS */ \
349: {0xff0000ff, 0x00ffffff}, /* DATA_OR_FPA_REGS */ \
350: {0x00ff00ff, 0x00000000}, /* DATA_OR_FP_REGS */ \
351: {0xffff00ff, 0x00ffffff}, /* DATA_OR_FP_OR_FPA_REGS */\
352: {0x0000ff00, 0x00000000}, /* ADDR_REGS */ \
353: {0x0000ffff, 0x00000000}, /* GENERAL_REGS */ \
354: {0xff00ffff, 0x00ffffff}, /* GENERAL_OR_FPA_REGS */\
355: {0x00ffffff, 0x00000000}, /* GENERAL_OR_FP_REGS */\
356: {0xffffffff, 0x00ffffff}, /* ALL_REGS */ \
357: }
358:
359: /* The same information, inverted:
360: Return the class number of the smallest class containing
361: reg number REGNO. This could be a conditional expression
362: or could index an array. */
363:
364: extern enum reg_class regno_reg_class[];
365: #define REGNO_REG_CLASS(REGNO) (regno_reg_class[(REGNO)>>3])
366:
367: /* The class value for index registers, and the one for base regs. */
368:
369: #define INDEX_REG_CLASS GENERAL_REGS
370: #define BASE_REG_CLASS ADDR_REGS
371:
372: /* Get reg_class from a letter such as appears in the machine description.
373: We do a trick here to modify the effective constraints on the
374: machine description; we zorch the constraint letters that aren't
375: appropriate for a specific target. This allows us to guarantee
376: that a specific kind of register will not be used for a given target
377: without fiddling with the register classes above. */
378:
379: #define REG_CLASS_FROM_LETTER(C) \
380: ((C) == 'a' ? ADDR_REGS : \
381: ((C) == 'd' ? DATA_REGS : \
382: ((C) == 'f' ? (TARGET_68881 ? FP_REGS : \
383: NO_REGS) : \
384: ((C) == 'x' ? (TARGET_FPA ? FPA_REGS : \
385: NO_REGS) : \
386: ((C) == 'y' ? (TARGET_FPA ? LO_FPA_REGS : \
387: NO_REGS) : \
388: NO_REGS)))))
389:
390: /* The letters I, J, K, L and M in a register constraint string
391: can be used to stand for particular ranges of immediate operands.
392: This macro defines what the ranges are.
393: C is the letter, and VALUE is a constant value.
394: Return 1 if VALUE is in the range specified by C.
395:
396: For the 68000, `I' is used for the range 1 to 8
397: allowed as immediate shift counts and in addq.
398: `J' is used for the range of signed numbers that fit in 16 bits.
399: `K' is for numbers that moveq can't handle.
400: `L' is for range -8 to -1, range of values that can be added with subq. */
401:
402: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
403: ((C) == 'I' ? (VALUE) > 0 && (VALUE) <= 8 : \
404: (C) == 'J' ? (VALUE) >= -0x8000 && (VALUE) <= 0x7FFF : \
405: (C) == 'K' ? (VALUE) < -0x80 || (VALUE) >= 0x80 : \
406: (C) == 'L' ? (VALUE) < 0 && (VALUE) >= -8 : 0)
407:
408: /*
409: * A small bit of explanation:
410: * "G" defines all of the floating constants that are *NOT* 68881
411: * constants. this is so 68881 constants get reloaded and the
412: * fpmovecr is used. "H" defines *only* the class of constants that
413: * the fpa can use, because these can be gotten at in any fpa
414: * instruction and there is no need to force reloads.
415: */
416:
417: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
418: ((C) == 'G' ? ! (TARGET_68881 && standard_68881_constant_p (VALUE)) : \
419: (C) == 'H' ? (TARGET_FPA && standard_sun_fpa_constant_p (VALUE)) : 0)
420:
421: /* Given an rtx X being reloaded into a reg required to be
422: in class CLASS, return the class of reg to actually use.
423: In general this is just CLASS; but on some machines
424: in some cases it is preferable to use a more restrictive class.
425: On the 68000 series, use a data reg if possible when the
426: value is a constant in the range where moveq could be used
427: and we ensure that QImodes are reloaded into data regs. */
428:
429: #define PREFERRED_RELOAD_CLASS(X,CLASS) \
430: ((GET_CODE (X) == CONST_INT \
431: && (unsigned) (INTVAL (X) + 0x80) < 0x100 \
432: && (CLASS) != ADDR_REGS) \
433: ? DATA_REGS \
434: : GET_MODE (X) == QImode \
435: ? DATA_REGS \
436: : (CLASS))
437:
438: /* Return the maximum number of consecutive registers
439: needed to represent mode MODE in a register of class CLASS. */
440: /* On the 68000, this is the size of MODE in words,
441: except in the FP regs, where a single reg is always enough. */
442: #define CLASS_MAX_NREGS(CLASS, MODE) \
443: ((CLASS) == FP_REGS || (CLASS) == FPA_REGS || (CLASS) == LO_FPA_REGS ? 1 \
444: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
445:
446: /* Stack layout; function entry, exit and calling. */
447:
448: /* Define this if pushing a word on the stack
449: makes the stack pointer a smaller address. */
450: #define STACK_GROWS_DOWNWARD
451:
452: /* Define this if the nominal address of the stack frame
453: is at the high-address end of the local variables;
454: that is, each additional local variable allocated
455: goes at a more negative offset in the frame. */
456: #define FRAME_GROWS_DOWNWARD
457:
458: /* Offset within stack frame to start allocating local variables at.
459: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
460: first local allocated. Otherwise, it is the offset to the BEGINNING
461: of the first local allocated. */
462: #define STARTING_FRAME_OFFSET 0
463:
464: /* If we generate an insn to push BYTES bytes,
465: this says how many the stack pointer really advances by.
466: On the 68000, sp@- in a byte insn really pushes a word. */
467: #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & ~1)
468:
469: /* Offset of first parameter from the argument pointer register value. */
470: #define FIRST_PARM_OFFSET(FNDECL) 8
471:
472: /* Value is 1 if returning from a function call automatically
473: pops the arguments described by the number-of-args field in the call.
474: FUNTYPE is the data type of the function (as a tree),
475: or for a library call it is an identifier node for the subroutine name.
476:
477: On the 68000, the RTS insn cannot pop anything.
478: On the 68010, the RTD insn may be used to pop them if the number
479: of args is fixed, but if the number is variable then the caller
480: must pop them all. RTD can't be used for library calls now
481: because the library is compiled with the Unix compiler.
482: Use of RTD is a selectable option, since it is incompatible with
483: standard Unix calling sequences. If the option is not selected,
484: the caller must always pop the args. */
485:
486: #define RETURN_POPS_ARGS(FUNTYPE) \
487: (TARGET_RTD && TREE_CODE (FUNTYPE) != IDENTIFIER_NODE \
488: && (TYPE_ARG_TYPES (FUNTYPE) == 0 \
489: || TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) == void_type_node))
490:
491: /* Define how to find the value returned by a function.
492: VALTYPE is the data type of the value (as a tree).
493: If the precise function being called is known, FUNC is its FUNCTION_DECL;
494: otherwise, FUNC is 0. */
495:
496: /* On the 68000 the return value is in D0 regardless. */
497:
498: #define FUNCTION_VALUE(VALTYPE, FUNC) \
499: gen_rtx (REG, TYPE_MODE (VALTYPE), 0)
500:
501: /* Define how to find the value returned by a library function
502: assuming the value has mode MODE. */
503:
504: /* On the 68000 the return value is in D0 regardless. */
505:
506: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0)
507:
508: /* 1 if N is a possible register number for a function value.
509: On the 68000, d0 is the only register thus used. */
510:
511: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
512:
513: /* Define this if PCC uses the nonreentrant convention for returning
514: structure and union values. */
515:
516: #define PCC_STATIC_STRUCT_RETURN
517:
518: /* 1 if N is a possible register number for function argument passing.
519: On the 68000, no registers are used in this way. */
520:
521: #define FUNCTION_ARG_REGNO_P(N) 0
522:
523: /* Define a data type for recording info about an argument list
524: during the scan of that argument list. This data type should
525: hold all necessary information about the function itself
526: and about the args processed so far, enough to enable macros
527: such as FUNCTION_ARG to determine where the next arg should go.
528:
529: On the m68k, this is a single integer, which is a number of bytes
530: of arguments scanned so far. */
531:
532: #define CUMULATIVE_ARGS int
533:
534: /* Initialize a variable CUM of type CUMULATIVE_ARGS
535: for a call to a function whose data type is FNTYPE.
536: For a library call, FNTYPE is 0.
537:
538: On the m68k, the offset starts at 0. */
539:
540: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE) \
541: ((CUM) = 0)
542:
543: /* Update the data in CUM to advance over an argument
544: of mode MODE and data type TYPE.
545: (TYPE is null for libcalls where that information may not be available.) */
546:
547: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
548: ((CUM) += ((MODE) != BLKmode \
549: ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
550: : (int_size_in_bytes (TYPE) + 3) & ~3))
551:
552: /* Define where to put the arguments to a function.
553: Value is zero to push the argument on the stack,
554: or a hard register in which to store the argument.
555:
556: MODE is the argument's machine mode.
557: TYPE is the data type of the argument (as a tree).
558: This is null for libcalls where that information may
559: not be available.
560: CUM is a variable of type CUMULATIVE_ARGS which gives info about
561: the preceding args and about the function being called.
562: NAMED is nonzero if this argument is a named parameter
563: (otherwise it is an extra parameter matching an ellipsis). */
564:
565: /* On the 68000 all args are pushed, except if -mregparm is specified
566: then the first two words of arguments are passed in d0, d1.
567: *NOTE* -mregparm does not work.
568: It exists only to test register calling conventions. */
569:
570: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
571: ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
572:
573: /* For an arg passed partly in registers and partly in memory,
574: this is the number of registers used.
575: For args passed entirely in registers or entirely in memory, zero. */
576:
577: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
578: ((TARGET_REGPARM && (CUM) < 8 \
579: && 8 < ((CUM) + ((MODE) == BLKmode \
580: ? int_size_in_bytes (TYPE) \
581: : GET_MODE_SIZE (MODE)))) \
582: ? 2 - (CUM) / 4 : 0)
583:
584: /* This macro generates the assembly code for function entry.
585: FILE is a stdio stream to output the code to.
586: SIZE is an int: how many units of temporary storage to allocate.
587: Refer to the array `regs_ever_live' to determine which registers
588: to save; `regs_ever_live[I]' is nonzero if register number I
589: is ever used in the function. This macro is responsible for
590: knowing which registers should not be saved even if used. */
591:
592: /* Note that the order of the bit mask for fmovem is the opposite
593: of the order for movem! */
594:
595: #define FUNCTION_PROLOGUE(FILE, SIZE) \
596: { register int regno; \
597: register int mask = 0; \
598: extern char call_used_regs[]; \
599: int fsize = ((SIZE) + 3) & -4; \
600: if (frame_pointer_needed) \
601: { if (TARGET_68020 || fsize < 0x8000) \
602: fprintf (FILE, "\tlink a6,#%d\n", -fsize); \
603: else \
604: fprintf (FILE, "\tlink a6,#0\n\tsubl #%d,sp\n", fsize); } \
605: for (regno = 24; regno < 56; regno++) \
606: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
607: fprintf(FILE, "\tfpmoved %s, sp@-\n", \
608: reg_names[regno]); \
609: for (regno = 16; regno < 24; regno++) \
610: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
611: mask |= 1 << (regno - 16); \
612: if ((mask & 0xff) != 0) \
613: fprintf (FILE, "\tfmovem #0x%x,sp@-\n", mask & 0xff); \
614: mask = 0; \
615: for (regno = 0; regno < 16; regno++) \
616: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
617: mask |= 1 << (15 - regno); \
618: if (frame_pointer_needed) \
619: mask &= ~ (1 << (15-FRAME_POINTER_REGNUM)); \
620: if (exact_log2 (mask) >= 0) \
621: fprintf (FILE, "\tmovel %s,sp@-\n", reg_names[15 - exact_log2 (mask)]); \
622: else if (mask) fprintf (FILE, "\tmoveml #0x%x,sp@-\n", mask); }
623:
624: /* Output assembler code to FILE to increment profiler label # LABELNO
625: for profiling a function entry. */
626:
627: #define FUNCTION_PROFILER(FILE, LABELNO) \
628: fprintf (FILE, "\tlea LP%d,a0\n\tjsr mcount\n", (LABELNO))
629:
630: /* Output assembler code to FILE to initialize this source file's
631: basic block profiling info, if that has not already been done. */
632:
633: #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
634: fprintf (FILE, "\ttstl LPBX0\n\tbne LPI%d\n\tpea LPBX0\n\tjsr ___bb_init_func\n\taddql #4,sp\nLPI%d:\n", \
635: LABELNO, LABELNO);
636:
637: /* Output assembler code to FILE to increment the entry-count for
638: the BLOCKNO'th basic block in this source file. */
639:
640: #define BLOCK_PROFILER(FILE, BLOCKNO) \
641: fprintf (FILE, "\taddql #1,LPBX2+%d\n", 4 * BLOCKNO)
642:
643: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
644: the stack pointer does not matter. The value is tested only in
645: functions that have frame pointers.
646: No definition is equivalent to always zero. */
647:
648: #define EXIT_IGNORE_STACK 1
649:
650: /* This macro generates the assembly code for function exit,
651: on machines that need it. If FUNCTION_EPILOGUE is not defined
652: then individual return instructions are generated for each
653: return statement. Args are same as for FUNCTION_PROLOGUE.
654:
655: The function epilogue should not depend on the current stack pointer!
656: It should use the frame pointer only. This is mandatory because
657: of alloca; we also take advantage of it to omit stack adjustments
658: before returning. */
659:
660: #define FUNCTION_EPILOGUE(FILE, SIZE) \
661: { register int regno; \
662: register int mask, fmask; \
663: register int nregs; \
664: int offset, foffset, fpoffset; \
665: extern char call_used_regs[]; \
666: extern int current_function_pops_args; \
667: extern int current_function_args_size; \
668: int fsize = ((SIZE) + 3) & -4; \
669: int big = 0; \
670: FUNCTION_EXTRA_EPILOGUE (FILE, SIZE); \
671: nregs = 0; fmask = 0; fpoffset = 0; \
672: for (regno = 24 ; regno < 56 ; regno++) \
673: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
674: nregs++; \
675: fpoffset = nregs*8; \
676: nregs = 0; \
677: for (regno = 16; regno < 24; regno++) \
678: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
679: { nregs++; fmask |= 1 << (23 - regno); } \
680: foffset = fpoffset + nregs * 12; \
681: nregs = 0; mask = 0; \
682: if (frame_pointer_needed) regs_ever_live[FRAME_POINTER_REGNUM] = 0; \
683: for (regno = 0; regno < 16; regno++) \
684: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
685: { nregs++; mask |= 1 << regno; } \
686: offset = foffset + nregs * 4; \
687: if (offset + fsize >= 0x8000 \
688: && frame_pointer_needed \
689: && (mask || fmask || fpoffset)) \
690: { fprintf (FILE, "\tmovel #%d,a0\n", -fsize); \
691: fsize = 0, big = 1; } \
692: if (exact_log2 (mask) >= 0) { \
693: if (big) \
694: fprintf (FILE, "\tmovel a6@(-%d,a0:l),%s\n", \
695: offset + fsize, reg_names[exact_log2 (mask)]); \
696: else if (! frame_pointer_needed) \
697: fprintf (FILE, "\tmovel sp@+,%s\n", \
698: reg_names[exact_log2 (mask)]); \
699: else \
700: fprintf (FILE, "\tmovel a6@(-%d),%s\n", \
701: offset + fsize, reg_names[exact_log2 (mask)]); } \
702: else if (mask) { \
703: if (big) \
704: fprintf (FILE, "\tmoveml a6@(-%d,a0:l),#0x%x\n", \
705: offset + fsize, mask); \
706: else if (! frame_pointer_needed) \
707: fprintf (FILE, "\tmoveml sp@+,#0x%x\n", mask); \
708: else \
709: fprintf (FILE, "\tmoveml a6@(-%d),#0x%x\n", \
710: offset + fsize, mask); } \
711: if (fmask) { \
712: if (big) \
713: fprintf (FILE, "\tfmovem a6@(-%d,a0:l),#0x%x\n", \
714: foffset + fsize, fmask); \
715: else if (! frame_pointer_needed) \
716: fprintf (FILE, "\tfmovem sp@+,#0x%x\n", fmask); \
717: else \
718: fprintf (FILE, "\tfmovem a6@(-%d),#0x%x\n", \
719: foffset + fsize, fmask); } \
720: if (fpoffset != 0) \
721: for (regno = 55; regno >= 24; regno--) \
722: if (regs_ever_live[regno] && ! call_used_regs[regno]) { \
723: if (big) \
724: fprintf(FILE, "\tfpmoved a6@(-%d,a0:l), %s\n", \
725: fpoffset + fsize, reg_names[regno]); \
726: else if (! frame_pointer_needed) \
727: fprintf(FILE, "\tfpmoved sp@+, %s\n", \
728: reg_names[regno]); \
729: else \
730: fprintf(FILE, "\tfpmoved a6@(-%d), %s\n", \
731: fpoffset + fsize, reg_names[regno]); \
732: fpoffset -= 8; \
733: } \
734: if (frame_pointer_needed) \
735: fprintf (FILE, "\tunlk a6\n"); \
736: if (current_function_pops_args && current_function_args_size) \
737: fprintf (FILE, "\trtd #%d\n", current_function_args_size); \
738: else fprintf (FILE, "\trts\n"); }
739:
740: /* This is a hook for other tm files to change. */
741: #define FUNCTION_EXTRA_EPILOGUE(FILE, SIZE)
742:
743: /* If the memory address ADDR is relative to the frame pointer,
744: correct it to be relative to the stack pointer instead.
745: This is for when we don't use a frame pointer.
746: ADDR should be a variable name. */
747:
748: #define FIX_FRAME_POINTER_ADDRESS(ADDR,DEPTH) \
749: { int offset = -1; \
750: rtx regs = stack_pointer_rtx; \
751: if (ADDR == frame_pointer_rtx) \
752: offset = 0; \
753: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx \
754: && GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \
755: offset = INTVAL (XEXP (ADDR, 1)); \
756: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx) \
757: { rtx other_reg = XEXP (ADDR, 1); \
758: offset = 0; \
759: regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
760: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 1) == frame_pointer_rtx) \
761: { rtx other_reg = XEXP (ADDR, 0); \
762: offset = 0; \
763: regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
764: else if (GET_CODE (ADDR) == PLUS \
765: && GET_CODE (XEXP (ADDR, 0)) == PLUS \
766: && XEXP (XEXP (ADDR, 0), 0) == frame_pointer_rtx \
767: && GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \
768: { rtx other_reg = XEXP (XEXP (ADDR, 0), 1); \
769: offset = INTVAL (XEXP (ADDR, 1)); \
770: regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
771: else if (GET_CODE (ADDR) == PLUS \
772: && GET_CODE (XEXP (ADDR, 0)) == PLUS \
773: && XEXP (XEXP (ADDR, 0), 1) == frame_pointer_rtx \
774: && GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \
775: { rtx other_reg = XEXP (XEXP (ADDR, 0), 0); \
776: offset = INTVAL (XEXP (ADDR, 1)); \
777: regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
778: if (offset >= 0) \
779: { int regno; \
780: extern char call_used_regs[]; \
781: for (regno = 16; regno < FIRST_PSEUDO_REGISTER; regno++) \
782: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
783: offset += 12; \
784: for (regno = 0; regno < 16; regno++) \
785: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
786: offset += 4; \
787: offset -= 4; \
788: ADDR = plus_constant (regs, offset + (DEPTH)); } } \
789:
790: /* Addressing modes, and classification of registers for them. */
791:
792: #define HAVE_POST_INCREMENT
793: /* #define HAVE_POST_DECREMENT */
794:
795: #define HAVE_PRE_DECREMENT
796: /* #define HAVE_PRE_INCREMENT */
797:
798: /* Macros to check register numbers against specific register classes. */
799:
800: /* These assume that REGNO is a hard or pseudo reg number.
801: They give nonzero only if REGNO is a hard reg of the suitable class
802: or a pseudo reg currently allocated to a suitable hard reg.
803: Since they use reg_renumber, they are safe only once reg_renumber
804: has been allocated, which happens in local-alloc.c. */
805:
806: #define REGNO_OK_FOR_INDEX_P(REGNO) \
807: ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
808: #define REGNO_OK_FOR_BASE_P(REGNO) \
809: (((REGNO) ^ 010) < 8 || (unsigned) (reg_renumber[REGNO] ^ 010) < 8)
810: #define REGNO_OK_FOR_DATA_P(REGNO) \
811: ((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8)
812: #define REGNO_OK_FOR_FP_P(REGNO) \
813: (((REGNO) ^ 020) < 8 || (unsigned) (reg_renumber[REGNO] ^ 020) < 8)
814: #define REGNO_OK_FOR_FPA_P(REGNO) \
815: (((REGNO) >= 24 && (REGNO) < 56) || (reg_renumber[REGNO] >= 24 && reg_renumber[REGNO] < 56))
816:
817: /* Now macros that check whether X is a register and also,
818: strictly, whether it is in a specified class.
819:
820: These macros are specific to the 68000, and may be used only
821: in code for printing assembler insns and in conditions for
822: define_optimization. */
823:
824: /* 1 if X is a data register. */
825:
826: #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
827:
828: /* 1 if X is an fp register. */
829:
830: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
831:
832: /* 1 if X is an address register */
833:
834: #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
835:
836: /* 1 if X is a register in the Sun FPA. */
837: #define FPA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FPA_P (REGNO (X)))
838:
839: /* Maximum number of registers that can appear in a valid memory address. */
840:
841: #define MAX_REGS_PER_ADDRESS 2
842:
843: /* Recognize any constant value that is a valid address. */
844:
845: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
846:
847: /* Nonzero if the constant value X is a legitimate general operand.
848: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
849:
850: #define LEGITIMATE_CONSTANT_P(X) 1
851:
852: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
853: and check its validity for a certain class.
854: We have two alternate definitions for each of them.
855: The usual definition accepts all pseudo regs; the other rejects
856: them unless they have been allocated suitable hard regs.
857: The symbol REG_OK_STRICT causes the latter definition to be used.
858:
859: Most source files want to accept pseudo regs in the hope that
860: they will get allocated to the class that the insn wants them to be in.
861: Source files for reload pass need to be strict.
862: After reload, it makes no difference, since pseudo regs have
863: been eliminated by then. */
864:
865: #ifndef REG_OK_STRICT
866:
867: /* Nonzero if X is a hard reg that can be used as an index
868: or if it is a pseudo reg. */
869: #define REG_OK_FOR_INDEX_P(X) ((REGNO (X) ^ 020) >= 8)
870: /* Nonzero if X is a hard reg that can be used as a base reg
871: or if it is a pseudo reg. */
872: #define REG_OK_FOR_BASE_P(X) ((REGNO (X) & ~027) != 0)
873:
874: #else
875:
876: /* Nonzero if X is a hard reg that can be used as an index. */
877: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
878: /* Nonzero if X is a hard reg that can be used as a base reg. */
879: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
880:
881: #endif
882:
883: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
884: that is a valid memory address for an instruction.
885: The MODE argument is the machine mode for the MEM expression
886: that wants to use this address.
887:
888: The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. */
889:
890: #define INDIRECTABLE_1_ADDRESS_P(X) \
891: (CONSTANT_ADDRESS_P (X) \
892: || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
893: || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_INC) \
894: && REG_P (XEXP (X, 0)) \
895: && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
896: || (GET_CODE (X) == PLUS \
897: && REG_P (XEXP (X, 0)) && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
898: && GET_CODE (XEXP (X, 1)) == CONST_INT \
899: && ((unsigned) INTVAL (XEXP (X, 1)) + 0x8000) < 0x10000))
900:
901: #if 0
902: /* This should replace the last two lines
903: except that Sun's assembler does not seem to handle such operands. */
904: && (TARGET_68020 ? CONSTANT_ADDRESS_P (XEXP (X, 1)) \
905: : (GET_CODE (XEXP (X, 1)) == CONST_INT \
906: && ((unsigned) INTVAL (XEXP (X, 1)) + 0x8000) < 0x10000))))
907: #endif
908:
909:
910: #define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \
911: { if (INDIRECTABLE_1_ADDRESS_P (X)) goto ADDR; }
912:
913: #define GO_IF_INDEXABLE_BASE(X, ADDR) \
914: { if (GET_CODE (X) == LABEL_REF) goto ADDR; \
915: if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR; }
916:
917: #define GO_IF_INDEXING(X, ADDR) \
918: { if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \
919: { GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \
920: if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \
921: { GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } }
922:
923: #define GO_IF_INDEXED_ADDRESS(X, ADDR) \
924: { GO_IF_INDEXING (X, ADDR); \
925: if (GET_CODE (X) == PLUS) \
926: { if (GET_CODE (XEXP (X, 1)) == CONST_INT \
927: && (unsigned) INTVAL (XEXP (X, 1)) + 0x80 < 0x100) \
928: { rtx go_temp = XEXP (X, 0); GO_IF_INDEXING (go_temp, ADDR); } \
929: if (GET_CODE (XEXP (X, 0)) == CONST_INT \
930: && (unsigned) INTVAL (XEXP (X, 0)) + 0x80 < 0x100) \
931: { rtx go_temp = XEXP (X, 1); GO_IF_INDEXING (go_temp, ADDR); } } }
932:
933: #define LEGITIMATE_INDEX_REG_P(X) \
934: ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \
935: || (GET_CODE (X) == SIGN_EXTEND \
936: && GET_CODE (XEXP (X, 0)) == REG \
937: && GET_MODE (XEXP (X, 0)) == HImode \
938: && REG_OK_FOR_INDEX_P (XEXP (X, 0))))
939:
940: #define LEGITIMATE_INDEX_P(X) \
941: (LEGITIMATE_INDEX_REG_P (X) \
942: || (TARGET_68020 && GET_CODE (X) == MULT \
943: && LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \
944: && GET_CODE (XEXP (X, 1)) == CONST_INT \
945: && (INTVAL (XEXP (X, 1)) == 2 \
946: || INTVAL (XEXP (X, 1)) == 4 \
947: || INTVAL (XEXP (X, 1)) == 8)))
948:
949: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
950: { GO_IF_NONINDEXED_ADDRESS (X, ADDR); \
951: GO_IF_INDEXED_ADDRESS (X, ADDR); }
952:
953: /* Try machine-dependent ways of modifying an illegitimate address
954: to be legitimate. If we find one, return the new, valid address.
955: This macro is used in only one place: `memory_address' in explow.c.
956:
957: OLDX is the address as it was before break_out_memory_refs was called.
958: In some cases it is useful to look at this to decide what needs to be done.
959:
960: MODE and WIN are passed so that this macro can use
961: GO_IF_LEGITIMATE_ADDRESS.
962:
963: It is always safe for this macro to do nothing. It exists to recognize
964: opportunities to optimize the output.
965:
966: For the 68000, we handle X+REG by loading X into a register R and
967: using R+REG. R will go in an address reg and indexing will be used.
968: However, if REG is a broken-out memory address or multiplication,
969: nothing needs to be done because REG can certainly go in an address reg. */
970:
971: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
972: { register int ch = (X) != (OLDX); \
973: if (GET_CODE (X) == PLUS) \
974: { if (GET_CODE (XEXP (X, 0)) == MULT) \
975: ch = 1, XEXP (X, 0) = force_operand (XEXP (X, 0), 0); \
976: if (GET_CODE (XEXP (X, 1)) == MULT) \
977: ch = 1, XEXP (X, 1) = force_operand (XEXP (X, 1), 0); \
978: if (ch && GET_CODE (XEXP (X, 1)) == REG \
979: && GET_CODE (XEXP (X, 0)) == REG) \
980: return X; \
981: if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \
982: if (GET_CODE (XEXP (X, 0)) == REG \
983: || (GET_CODE (XEXP (X, 0)) == SIGN_EXTEND \
984: && GET_CODE (XEXP (XEXP (X, 0), 0)) == REG \
985: && GET_MODE (XEXP (XEXP (X, 0), 0)) == HImode)) \
986: { register rtx temp = gen_reg_rtx (Pmode); \
987: register rtx val = force_operand (XEXP (X, 1), 0); \
988: emit_move_insn (temp, val); \
989: XEXP (X, 1) = temp; \
990: return X; } \
991: else if (GET_CODE (XEXP (X, 1)) == REG \
992: || (GET_CODE (XEXP (X, 1)) == SIGN_EXTEND \
993: && GET_CODE (XEXP (XEXP (X, 1), 0)) == REG \
994: && GET_MODE (XEXP (XEXP (X, 1), 0)) == HImode)) \
995: { register rtx temp = gen_reg_rtx (Pmode); \
996: register rtx val = force_operand (XEXP (X, 0), 0); \
997: emit_move_insn (temp, val); \
998: XEXP (X, 0) = temp; \
999: return X; }}}
1000:
1001: /* Go to LABEL if ADDR (a legitimate address expression)
1002: has an effect that depends on the machine mode it is used for.
1003: On the 68000, only predecrement and postincrement address depend thus
1004: (the amount of decrement or increment being the length of the operand). */
1005:
1006: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1007: if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) goto LABEL
1008:
1009: /* Specify the machine mode that this machine uses
1010: for the index in the tablejump instruction. */
1011: #define CASE_VECTOR_MODE HImode
1012:
1013: /* Define this if the tablejump instruction expects the table
1014: to contain offsets from the address of the table.
1015: Do not define this if the table should contain absolute addresses. */
1016: #define CASE_VECTOR_PC_RELATIVE
1017:
1018: /* Specify the tree operation to be used to convert reals to integers. */
1019: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1020:
1021: /* This is the kind of divide that is easiest to do in the general case. */
1022: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1023:
1024: /* Define this as 1 if `char' should by default be signed; else as 0. */
1025: #define DEFAULT_SIGNED_CHAR 1
1026:
1027: /* Max number of bytes we can move from memory to memory
1028: in one reasonably fast instruction. */
1029: #define MOVE_MAX 4
1030:
1031: /* Define this if zero-extension is slow (more than one real instruction). */
1032: #define SLOW_ZERO_EXTEND
1033:
1034: /* Nonzero if access to memory by bytes is slow and undesirable. */
1035: #define SLOW_BYTE_ACCESS 0
1036:
1037: /* Define if shifts truncate the shift count
1038: which implies one can omit a sign-extension or zero-extension
1039: of a shift count. */
1040: #define SHIFT_COUNT_TRUNCATED
1041:
1042: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1043: is done just by pretending it is already truncated. */
1044: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1045:
1046: /* We assume that the store-condition-codes instructions store 0 for false
1047: and some other value for true. This is the value stored for true. */
1048:
1049: #define STORE_FLAG_VALUE -1
1050:
1051: /* When a prototype says `char' or `short', really pass an `int'. */
1052: #define PROMOTE_PROTOTYPES
1053:
1054: /* Specify the machine mode that pointers have.
1055: After generation of rtl, the compiler makes no further distinction
1056: between pointers and any other objects of this machine mode. */
1057: #define Pmode SImode
1058:
1059: /* A function address in a call instruction
1060: is a byte address (for indexing purposes)
1061: so give the MEM rtx a byte's mode. */
1062: #define FUNCTION_MODE QImode
1063:
1064: /* Compute the cost of computing a constant rtl expression RTX
1065: whose rtx-code is CODE. The body of this macro is a portion
1066: of a switch statement. If the code is computed here,
1067: return it with a return statement. Otherwise, break from the switch. */
1068:
1069: #define CONST_COSTS(RTX,CODE) \
1070: case CONST_INT: \
1071: /* Constant zero is super cheap due to clr instruction. */ \
1072: if (RTX == const0_rtx) return 0; \
1073: if ((unsigned) INTVAL (RTX) < 077) return 1; \
1074: case CONST: \
1075: case LABEL_REF: \
1076: case SYMBOL_REF: \
1077: return 3; \
1078: case CONST_DOUBLE: \
1079: return 5;
1080:
1081: /* Tell final.c how to eliminate redundant test instructions. */
1082:
1083: /* Here we define machine-dependent flags and fields in cc_status
1084: (see `conditions.h'). */
1085:
1086: /* Set if the cc value is actually in the 68881, so a floating point
1087: conditional branch must be output. */
1088: #define CC_IN_68881 04000
1089:
1090: /* Store in cc_status the expressions
1091: that the condition codes will describe
1092: after execution of an instruction whose pattern is EXP.
1093: Do not alter them if the instruction would not alter the cc's. */
1094:
1095: /* On the 68000, all the insns to store in an address register
1096: fail to set the cc's. However, in some cases these instructions
1097: can make it possibly invalid to use the saved cc's. In those
1098: cases we clear out some or all of the saved cc's so they won't be used. */
1099:
1.1.1.3 ! root 1100: /* It was claimed recently that addq, subq to an address register
! 1101: do update the cc's, but the 68000 and 68020 manuals say otherwise. */
! 1102:
1.1 root 1103: #define NOTICE_UPDATE_CC(EXP, INSN) \
1104: { \
1105: /* If the cc is being set from the fpa and the
1106: expression is not an explicit floating point
1107: test instruction (which has code to deal with
1108: this), reinit the CC */ \
1109: if (((cc_status.value1 && FPA_REG_P (cc_status.value1)) \
1110: || (cc_status.value2 && FPA_REG_P (cc_status.value2))) \
1111: && !(GET_CODE(EXP) == PARALLEL \
1112: && GET_CODE (XVECEXP(EXP, 0, 0)) == SET \
1113: && XEXP (XVECEXP (EXP, 0, 0), 0) == cc0_rtx)) \
1114: { CC_STATUS_INIT; } \
1115: else if (GET_CODE (EXP) == SET) \
1116: { if (ADDRESS_REG_P (SET_DEST (EXP))) \
1117: { if (cc_status.value1 \
1118: && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value1)) \
1119: cc_status.value1 = 0; \
1120: if (cc_status.value2 \
1121: && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value2)) \
1122: cc_status.value2 = 0; } \
1123: else if (!FP_REG_P (SET_DEST (EXP)) \
1124: && SET_DEST (EXP) != cc0_rtx \
1125: && (FP_REG_P (SET_SRC (EXP)) \
1126: || GET_CODE (SET_SRC (EXP)) == FIX \
1127: || GET_CODE (SET_SRC (EXP)) == FLOAT_TRUNCATE \
1128: || GET_CODE (SET_SRC (EXP)) == FLOAT_EXTEND)) \
1129: { CC_STATUS_INIT; } \
1130: /* A pair of move insns doesn't produce a useful overall cc. */ \
1131: else if (!FP_REG_P (SET_DEST (EXP)) \
1132: && !FP_REG_P (SET_SRC (EXP)) \
1133: && GET_MODE_SIZE (GET_MODE (SET_SRC (EXP))) > 4 \
1134: && (GET_CODE (SET_SRC (EXP)) == REG \
1135: || GET_CODE (SET_SRC (EXP)) == MEM \
1136: || GET_CODE (SET_SRC (EXP)) == CONST_DOUBLE))\
1137: { CC_STATUS_INIT; } \
1138: else if (GET_CODE (SET_SRC (EXP)) == CALL) \
1139: { CC_STATUS_INIT; } \
1140: else if (XEXP (EXP, 0) != pc_rtx) \
1141: { cc_status.flags = 0; \
1142: cc_status.value1 = XEXP (EXP, 0); \
1143: cc_status.value2 = XEXP (EXP, 1); } } \
1144: else if (GET_CODE (EXP) == PARALLEL \
1145: && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \
1146: { \
1147: if (ADDRESS_REG_P (XEXP (XVECEXP (EXP, 0, 0), 0))) \
1148: CC_STATUS_INIT; \
1149: else if (XEXP (XVECEXP (EXP, 0, 0), 0) != pc_rtx) \
1150: { cc_status.flags = 0; \
1151: cc_status.value1 = XEXP (XVECEXP (EXP, 0, 0), 0); \
1152: cc_status.value2 = XEXP (XVECEXP (EXP, 0, 0), 1); } } \
1153: else CC_STATUS_INIT; \
1154: if (cc_status.value2 != 0 \
1155: && ADDRESS_REG_P (cc_status.value2) \
1156: && GET_MODE (cc_status.value2) == QImode) \
1157: CC_STATUS_INIT; \
1158: if (cc_status.value2 != 0 \
1159: && !(cc_status.value1 && FPA_REG_P (cc_status.value1))) \
1160: switch (GET_CODE (cc_status.value2)) \
1161: { case PLUS: case MINUS: case MULT: case UMULT: \
1162: case DIV: case UDIV: case MOD: case UMOD: case NEG: \
1163: case ASHIFT: case LSHIFT: case ASHIFTRT: case LSHIFTRT: \
1164: case ROTATE: case ROTATERT: \
1165: if (GET_MODE (cc_status.value2) != VOIDmode) \
1166: cc_status.flags |= CC_NO_OVERFLOW; \
1167: break; \
1168: case ZERO_EXTEND: \
1.1.1.3 ! root 1169: case ZERO_EXTRACT: \
1.1 root 1170: /* (SET r1 (ZERO_EXTEND r2)) on this machine
1171: ends with a move insn moving r2 in r2's mode.
1172: Thus, the cc's are set for r2.
1173: This can set N bit spuriously. */ \
1174: cc_status.flags |= CC_NOT_NEGATIVE; } \
1175: if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \
1176: && cc_status.value2 \
1177: && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \
1178: cc_status.value2 = 0; \
1179: if (((cc_status.value1 && FP_REG_P (cc_status.value1)) \
1180: || (cc_status.value2 && FP_REG_P (cc_status.value2))) \
1181: && !((cc_status.value1 && FPA_REG_P (cc_status.value1)) \
1182: || (cc_status.value2 && FPA_REG_P (cc_status.value2)))) \
1183: cc_status.flags = CC_IN_68881; }
1184:
1185: #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1.1.1.3 ! root 1186: do { if (cc_prev_status.flags & CC_IN_68881) \
! 1187: return FLOAT; \
! 1188: if (cc_prev_status.flags & CC_NO_OVERFLOW) \
! 1189: return NO_OV; \
! 1190: return NORMAL; } while (0)
1.1 root 1191:
1192: /* Control the assembler format that we output. */
1193:
1194: /* Output at beginning of assembler file. */
1195:
1196: #define ASM_FILE_START(FILE) \
1197: fprintf (FILE, "#NO_APP\n");
1198:
1199: /* Output to assembler file text saying following lines
1200: may contain character constants, extra white space, comments, etc. */
1201:
1202: #define ASM_APP_ON "#APP\n"
1203:
1204: /* Output to assembler file text saying following lines
1205: no longer contain unusual constructs. */
1206:
1207: #define ASM_APP_OFF "#NO_APP\n"
1208:
1209: /* Output before read-only data. */
1210:
1211: #define TEXT_SECTION_ASM_OP ".text"
1212:
1213: /* Output before writable data. */
1214:
1215: #define DATA_SECTION_ASM_OP ".data"
1216:
1217: /* How to refer to registers in assembler output.
1218: This sequence is indexed by compiler's hard-register-number (see above). */
1219:
1220: #define REGISTER_NAMES \
1221: {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", \
1222: "a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp", \
1223: "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7", \
1224: "fpa0", "fpa1", "fpa2", "fpa3", "fpa4", "fpa5", "fpa6", "fpa7", \
1225: "fpa8", "fpa9", "fpa10", "fpa11", "fpa12", "fpa13", "fpa14", "fpa15", \
1226: "fpa16", "fpa17", "fpa18", "fpa19", "fpa20", "fpa21", "fpa22", "fpa23", \
1227: "fpa24", "fpa25", "fpa26", "fpa27", "fpa28", "fpa29", "fpa30", "fpa31", }
1228:
1229: /* How to renumber registers for dbx and gdb.
1230: On the Sun-3, the floating point registers have numbers
1231: 18 to 25, not 16 to 23 as they do in the compiler. */
1232:
1233: #define DBX_REGISTER_NUMBER(REGNO) ((REGNO) < 16 ? (REGNO) : (REGNO) + 2)
1234:
1235: /* This is how to output the definition of a user-level label named NAME,
1236: such as the label on a static function or variable NAME. */
1237:
1238: #define ASM_OUTPUT_LABEL(FILE,NAME) \
1239: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1240:
1241: /* This is how to output a command to make the user-level label named NAME
1242: defined for reference from other files. */
1243:
1244: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1245: do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1246:
1247: /* This is how to output a reference to a user-level label named NAME.
1248: `assemble_name' uses this. */
1249:
1250: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1251: fprintf (FILE, "_%s", NAME)
1252:
1253: /* This is how to output an internal numbered label where
1254: PREFIX is the class of label and NUM is the number within the class. */
1255:
1256: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1257: fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1258:
1259: /* This is how to store into the string LABEL
1260: the symbol_ref name of an internal numbered label where
1261: PREFIX is the class of label and NUM is the number within the class.
1262: This is suitable for output with `assemble_name'. */
1263:
1264: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1265: sprintf (LABEL, "*%s%d", PREFIX, NUM)
1266:
1267: /* This is how to output an assembler line defining a `double' constant. */
1268:
1269: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1270: fprintf (FILE, "\t.double 0r%.20g\n", (VALUE))
1271:
1272: /* This is how to output an assembler line defining a `float' constant. */
1273:
1.1.1.3 ! root 1274: /* Sun's assembler can't handle floating constants written as floating.
! 1275: However, when cross-compiling, always use that in case format differs. */
! 1276:
! 1277: #ifdef CROSS_COMPILER
! 1278:
! 1279: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
! 1280: fprintf (FILE, "\t.float 0r%.10g\n", (VALUE))
! 1281:
! 1282: #else
! 1283:
1.1 root 1284: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1285: do { union { float f; long l;} tem; \
1286: tem.f = (VALUE); \
1287: fprintf (FILE, "\t.long 0x%x\n", tem.l); \
1288: } while (0)
1289:
1.1.1.3 ! root 1290: #endif /* not CROSS_COMPILER */
! 1291:
1.1 root 1292: /* This is how to output an assembler line defining an `int' constant. */
1293:
1294: #define ASM_OUTPUT_INT(FILE,VALUE) \
1295: ( fprintf (FILE, "\t.long "), \
1296: output_addr_const (FILE, (VALUE)), \
1297: fprintf (FILE, "\n"))
1298:
1299: /* Likewise for `char' and `short' constants. */
1300:
1301: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1302: ( fprintf (FILE, "\t.word "), \
1303: output_addr_const (FILE, (VALUE)), \
1304: fprintf (FILE, "\n"))
1305:
1306: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1307: ( fprintf (FILE, "\t.byte "), \
1308: output_addr_const (FILE, (VALUE)), \
1309: fprintf (FILE, "\n"))
1310:
1311: /* This is how to output an assembler line for a numeric constant byte. */
1312:
1313: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1314: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1315:
1316: /* This is how to output an insn to push a register on the stack.
1317: It need not be very fast code. */
1318:
1319: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1320: fprintf (FILE, "\tmovel %s,sp@-\n", reg_names[REGNO])
1321:
1322: /* This is how to output an insn to pop a register from the stack.
1323: It need not be very fast code. */
1324:
1325: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1326: fprintf (FILE, "\tmovel sp@+,%s\n", reg_names[REGNO])
1327:
1328: /* This is how to output an element of a case-vector that is absolute.
1329: (The 68000 does not use such vectors,
1330: but we must define this macro anyway.) */
1331:
1332: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1333: fprintf (FILE, "\t.long L%d\n", VALUE)
1334:
1335: /* This is how to output an element of a case-vector that is relative. */
1336:
1337: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1338: fprintf (FILE, "\t.word L%d-L%d\n", VALUE, REL)
1339:
1340: /* This is how to output an assembler line
1341: that says to advance the location counter
1342: to a multiple of 2**LOG bytes. */
1343:
1344: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1345: if ((LOG) == 1) \
1346: fprintf (FILE, "\t.even\n"); \
1347: else if ((LOG) != 0) \
1348: abort ();
1349:
1350: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1.1.1.3 ! root 1351: fprintf (FILE, "\t.skip %u\n", (SIZE))
1.1 root 1352:
1353: /* This says how to output an assembler line
1354: to define a global common symbol. */
1355:
1356: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1357: ( fputs (".comm ", (FILE)), \
1358: assemble_name ((FILE), (NAME)), \
1.1.1.3 ! root 1359: fprintf ((FILE), ",%u\n", (ROUNDED)))
1.1 root 1360:
1361: /* This says how to output an assembler line
1362: to define a local common symbol. */
1363:
1364: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1365: ( fputs (".lcomm ", (FILE)), \
1366: assemble_name ((FILE), (NAME)), \
1.1.1.3 ! root 1367: fprintf ((FILE), ",%u\n", (ROUNDED)))
1.1 root 1368:
1369: /* Store in OUTPUT a string (made with alloca) containing
1370: an assembler-name for a local static variable named NAME.
1371: LABELNO is an integer which is different for each call. */
1372:
1373: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1374: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1375: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1376:
1377: /* Define the parentheses used to group arithmetic operations
1378: in assembler code. */
1379:
1380: #define ASM_OPEN_PAREN "("
1381: #define ASM_CLOSE_PAREN ")"
1382:
1383: /* Define results of standard character escape sequences. */
1384: #define TARGET_BELL 007
1385: #define TARGET_BS 010
1386: #define TARGET_TAB 011
1387: #define TARGET_NEWLINE 012
1388: #define TARGET_VT 013
1389: #define TARGET_FF 014
1390: #define TARGET_CR 015
1391:
1392: /* Output a float value (represented as a C double) as an immediate operand.
1393: This macro is a 68k-specific macro. */
1394: #define ASM_OUTPUT_FLOAT_OPERAND(FILE,VALUE) \
1395: fprintf (FILE, "#0r%.9g", (VALUE))
1396:
1397: /* Output a double value (represented as a C double) as an immediate operand.
1398: This macro is a 68k-specific macro. */
1399: #define ASM_OUTPUT_DOUBLE_OPERAND(FILE,VALUE) \
1400: fprintf (FILE, "#0r%.20g", (VALUE))
1401:
1402: /* Print operand X (an rtx) in assembler syntax to file FILE.
1403: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1404: For `%' followed by punctuation, CODE is the punctuation and X is null.
1405:
1406: On the 68000, we use several CODE characters:
1407: '.' for dot needed in Motorola-style opcode names.
1408: '-' for an operand pushing on the stack:
1409: sp@-, -(sp) or -(%sp) depending on the style of syntax.
1410: '+' for an operand pushing on the stack:
1411: sp@+, (sp)+ or (%sp)+ depending on the style of syntax.
1412: '@' for a reference to the top word on the stack:
1413: sp@, (sp) or (%sp) depending on the style of syntax.
1414: '#' for an immediate operand prefix (# in MIT and Motorola syntax
1415: but & in SGS syntax).
1416: '!' for the cc register (used in an `and to cc' insn).
1417:
1418: 'b' for byte insn (no effect, on the Sun; this is for the ISI).
1419: 'd' to force memory addressing to be absolute, not relative.
1420: 'f' for float insn (print a CONST_DOUBLE as a float rather than in hex)
1421: 'w' for FPA insn (print a CONST_DOUBLE as a SunFPA constant rather
1422: than directly). Second part of 'y' below.
1423: 'x' for float insn (print a CONST_DOUBLE as a float rather than in hex),
1424: or print pair of registers as rx:ry.
1425: 'y' for a FPA insn (print pair of registers as rx:ry). This also outputs
1426: CONST_DOUBLE's as SunFPA constant RAM registers if
1427: possible, so it should not be used except for the SunFPA. */
1428:
1429: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1430: ((CODE) == '.' || (CODE) == '#' || (CODE) == '-' \
1431: || (CODE) == '+' || (CODE) == '@' || (CODE) == '!')
1432:
1.1.1.3 ! root 1433: /* This assumes the compiler is running on a big-endian machine.
! 1434: The support for the other case is left for version 2. */
! 1435: #define PRINT_OPERAND_EXTRACT_FLOAT(X) \
! 1436: u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X);
! 1437:
! 1438: #ifdef CROSS_COMPILER
! 1439: #define PRINT_OPERAND_PRINT_FLOAT(CODE, FILE) \
! 1440: ASM_OUTPUT_FLOAT_OPERAND (FILE, u1.f);
! 1441: #else
! 1442: #define PRINT_OPERAND_PRINT_FLOAT(CODE, FILE) \
! 1443: { if (CODE == 'f') \
! 1444: ASM_OUTPUT_FLOAT_OPERAND (FILE, u1.f); \
! 1445: else \
! 1446: fprintf (FILE, "#0x%x", u1.i); }
! 1447: #endif
! 1448:
1.1 root 1449: #define PRINT_OPERAND(FILE, X, CODE) \
1450: { int i; \
1451: if (CODE == '.') ; \
1452: else if (CODE == '#') fprintf (FILE, "#"); \
1453: else if (CODE == '-') fprintf (FILE, "sp@-"); \
1454: else if (CODE == '+') fprintf (FILE, "sp@+"); \
1455: else if (CODE == '@') fprintf (FILE, "sp@"); \
1456: else if (CODE == '!') fprintf (FILE, "cc"); \
1457: else if (GET_CODE (X) == REG) \
1458: { if (REGNO (X) < 16 && (CODE == 'y' || CODE == 'x') && GET_MODE (X) == DFmode) \
1459: fprintf (FILE, "%s:%s", reg_names[REGNO (X)], reg_names[REGNO (X)+1]); \
1460: else \
1461: fprintf (FILE, "%s", reg_names[REGNO (X)]); \
1462: } \
1463: else if (GET_CODE (X) == MEM) \
1464: { \
1465: output_address (XEXP (X, 0)); \
1466: if (CODE == 'd' && ! TARGET_68020 \
1.1.1.2 root 1467: && CONSTANT_ADDRESS_P (XEXP (X, 0)) \
1468: && !(GET_CODE (XEXP (X, 0)) == CONST_INT \
1469: && INTVAL (XEXP (X, 0)) < 0x8000 \
1470: && INTVAL (XEXP (X, 0)) >= -0x8000)) \
1.1 root 1471: fprintf (FILE, ":l"); \
1472: } \
1473: else if ((CODE == 'y' || CODE == 'w') \
1474: && GET_CODE(X) == CONST_DOUBLE \
1475: && (i = standard_sun_fpa_constant_p (X))) \
1476: fprintf (FILE, "%%%d", i & 0x1ff); \
1477: else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) == SFmode) \
1478: { union { double d; int i[2]; } u; \
1479: union { float f; int i; } u1; \
1.1.1.3 ! root 1480: PRINT_OPERAND_EXTRACT_FLOAT (X); \
1.1 root 1481: u1.f = u.d; \
1.1.1.3 ! root 1482: PRINT_OPERAND_PRINT_FLOAT (CODE, FILE); } \
1.1 root 1483: else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != DImode) \
1484: { union { double d; int i[2]; } u; \
1.1.1.3 ! root 1485: PRINT_OPERAND_EXTRACT_FLOAT (X); \
1.1 root 1486: ASM_OUTPUT_DOUBLE_OPERAND (FILE, u.d); } \
1487: else { putc ('#', FILE); output_addr_const (FILE, X); }}
1488:
1489: /* Note that this contains a kludge that knows that the only reason
1490: we have an address (plus (label_ref...) (reg...))
1491: is in the insn before a tablejump, and we know that m68k.md
1492: generates a label LInnn: on such an insn. */
1493: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1494: { register rtx reg1, reg2, breg, ireg; \
1495: register rtx addr = ADDR; \
1496: rtx offset; \
1497: switch (GET_CODE (addr)) \
1498: { \
1499: case REG: \
1500: fprintf (FILE, "%s@", reg_names[REGNO (addr)]); \
1501: break; \
1502: case PRE_DEC: \
1503: fprintf (FILE, "%s@-", reg_names[REGNO (XEXP (addr, 0))]); \
1504: break; \
1505: case POST_INC: \
1506: fprintf (FILE, "%s@+", reg_names[REGNO (XEXP (addr, 0))]); \
1507: break; \
1508: case PLUS: \
1509: reg1 = 0; reg2 = 0; \
1510: ireg = 0; breg = 0; \
1511: offset = 0; \
1512: if (CONSTANT_ADDRESS_P (XEXP (addr, 0))) \
1513: { \
1514: offset = XEXP (addr, 0); \
1515: addr = XEXP (addr, 1); \
1516: } \
1517: else if (CONSTANT_ADDRESS_P (XEXP (addr, 1))) \
1518: { \
1519: offset = XEXP (addr, 1); \
1520: addr = XEXP (addr, 0); \
1521: } \
1522: if (GET_CODE (addr) != PLUS) ; \
1523: else if (GET_CODE (XEXP (addr, 0)) == SIGN_EXTEND) \
1524: { \
1525: reg1 = XEXP (addr, 0); \
1526: addr = XEXP (addr, 1); \
1527: } \
1528: else if (GET_CODE (XEXP (addr, 1)) == SIGN_EXTEND) \
1529: { \
1530: reg1 = XEXP (addr, 1); \
1531: addr = XEXP (addr, 0); \
1532: } \
1533: else if (GET_CODE (XEXP (addr, 0)) == MULT) \
1534: { \
1535: reg1 = XEXP (addr, 0); \
1536: addr = XEXP (addr, 1); \
1537: } \
1538: else if (GET_CODE (XEXP (addr, 1)) == MULT) \
1539: { \
1540: reg1 = XEXP (addr, 1); \
1541: addr = XEXP (addr, 0); \
1542: } \
1543: else if (GET_CODE (XEXP (addr, 0)) == REG) \
1544: { \
1545: reg1 = XEXP (addr, 0); \
1546: addr = XEXP (addr, 1); \
1547: } \
1548: else if (GET_CODE (XEXP (addr, 1)) == REG) \
1549: { \
1550: reg1 = XEXP (addr, 1); \
1551: addr = XEXP (addr, 0); \
1552: } \
1553: if (GET_CODE (addr) == REG || GET_CODE (addr) == MULT \
1554: || GET_CODE (addr) == SIGN_EXTEND) \
1555: { if (reg1 == 0) reg1 = addr; else reg2 = addr; addr = 0; } \
1556: /* for OLD_INDEXING \
1557: else if (GET_CODE (addr) == PLUS) \
1558: { \
1559: if (GET_CODE (XEXP (addr, 0)) == REG) \
1560: { \
1561: reg2 = XEXP (addr, 0); \
1562: addr = XEXP (addr, 1); \
1563: } \
1564: else if (GET_CODE (XEXP (addr, 1)) == REG) \
1565: { \
1566: reg2 = XEXP (addr, 1); \
1567: addr = XEXP (addr, 0); \
1568: } \
1569: } \
1570: */ \
1571: if (offset != 0) { if (addr != 0) abort (); addr = offset; } \
1572: if ((reg1 && (GET_CODE (reg1) == SIGN_EXTEND \
1573: || GET_CODE (reg1) == MULT)) \
1574: || (reg2 != 0 && REGNO_OK_FOR_BASE_P (REGNO (reg2)))) \
1575: { breg = reg2; ireg = reg1; } \
1576: else if (reg1 != 0 && REGNO_OK_FOR_BASE_P (REGNO (reg1))) \
1577: { breg = reg1; ireg = reg2; } \
1578: if (ireg != 0 && breg == 0 && GET_CODE (addr) == LABEL_REF) \
1579: { int scale = 1; \
1580: if (GET_CODE (ireg) == MULT) \
1581: { scale = INTVAL (XEXP (ireg, 1)); \
1582: ireg = XEXP (ireg, 0); } \
1583: if (GET_CODE (ireg) == SIGN_EXTEND) \
1584: fprintf (FILE, "pc@(L%d-LI%d-2:b,%s:w", \
1585: CODE_LABEL_NUMBER (XEXP (addr, 0)), \
1586: CODE_LABEL_NUMBER (XEXP (addr, 0)), \
1587: reg_names[REGNO (XEXP (ireg, 0))]); \
1588: else \
1589: fprintf (FILE, "pc@(L%d-LI%d-2:b,%s:l", \
1590: CODE_LABEL_NUMBER (XEXP (addr, 0)), \
1591: CODE_LABEL_NUMBER (XEXP (addr, 0)), \
1592: reg_names[REGNO (ireg)]); \
1593: if (scale != 1) fprintf (FILE, ":%d", scale); \
1594: putc (')', FILE); \
1595: break; } \
1596: if (breg != 0 && ireg == 0 && GET_CODE (addr) == LABEL_REF) \
1597: { fprintf (FILE, "pc@(L%d-LI%d-2:b,%s:l", \
1598: CODE_LABEL_NUMBER (XEXP (addr, 0)), \
1599: CODE_LABEL_NUMBER (XEXP (addr, 0)), \
1600: reg_names[REGNO (breg)]); \
1601: putc (')', FILE); \
1602: break; } \
1603: if (ireg != 0 || breg != 0) \
1604: { int scale = 1; \
1605: if (breg == 0) \
1606: abort (); \
1607: if (addr && GET_CODE (addr) == LABEL_REF) abort (); \
1608: fprintf (FILE, "%s@(", reg_names[REGNO (breg)]); \
1609: if (addr != 0) \
1610: output_addr_const (FILE, addr); \
1611: if (addr != 0 && ireg != 0) \
1612: putc (',', FILE); \
1613: if (ireg != 0 && GET_CODE (ireg) == MULT) \
1614: { scale = INTVAL (XEXP (ireg, 1)); \
1615: ireg = XEXP (ireg, 0); } \
1616: if (ireg != 0 && GET_CODE (ireg) == SIGN_EXTEND) \
1617: fprintf (FILE, "%s:w", reg_names[REGNO (XEXP (ireg, 0))]); \
1618: else if (ireg != 0) \
1619: fprintf (FILE, "%s:l", reg_names[REGNO (ireg)]); \
1620: if (scale != 1) fprintf (FILE, ":%d", scale); \
1621: putc (')', FILE); \
1622: break; \
1623: } \
1624: else if (reg1 != 0 && GET_CODE (addr) == LABEL_REF) \
1625: { fprintf (FILE, "pc@(L%d-LI%d-2:b,%s:l)", \
1626: CODE_LABEL_NUMBER (XEXP (addr, 0)), \
1627: CODE_LABEL_NUMBER (XEXP (addr, 0)), \
1628: reg_names[REGNO (reg1)]); \
1629: break; } \
1630: default: \
1631: if (GET_CODE (addr) == CONST_INT \
1632: && INTVAL (addr) < 0x8000 \
1633: && INTVAL (addr) >= -0x8000) \
1634: fprintf (FILE, "%d:w", INTVAL (addr)); \
1635: else \
1636: output_addr_const (FILE, addr); \
1637: }}
1638:
1639: /*
1640: Local variables:
1641: version-control: t
1642: End:
1643: */
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