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1.1 root 1: /* Definitions of target machine for GNU compiler, for the Motorola 88000 chip.
2: Copyright (C) 1988 Free Software Foundation, Inc.
3: Contributed by Michael Tiemann ([email protected])
4:
5: This file is part of GNU CC.
6:
7: GNU CC is free software; you can redistribute it and/or modify
8: it under the terms of the GNU General Public License as published by
9: the Free Software Foundation; either version 1, or (at your option)
10: any later version.
11:
12: GNU CC is distributed in the hope that it will be useful,
13: but WITHOUT ANY WARRANTY; without even the implied warranty of
14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15: GNU General Public License for more details.
16:
17: You should have received a copy of the GNU General Public License
18: along with GNU CC; see the file COPYING. If not, write to
19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20:
21:
22: /* Note that some other tm- files include this one and then override
23: many of the definitions that relate to assembler syntax. */
24:
25:
26: /* Names to predefine in the preprocessor for this target machine. */
27:
28: #define CPP_PREDEFINES "-Dm88000 -Dm88k"
29:
30: /* Print subsidiary information on the compiler version in use. */
31: #define TARGET_VERSION fprintf (stderr, " (88k)");
32:
33: /* Run-time compilation parameters selecting different hardware subsets.
34:
35: On the the m88000, we don't yet need any. */
36:
37: extern int target_flags;
38:
39: /* Macro to define tables used to set the flags.
40: This is a list in braces of pairs in braces,
41: each pair being { "NAME", VALUE }
42: where VALUE is the bits to set or minus the bits to clear.
43: An empty string NAME is used to identify the default VALUE. */
44:
45: #define TARGET_SWITCHES \
46: {{ "", TARGET_DEFAULT}}
47:
48: #define TARGET_DEFAULT 1
49:
50: /* target machine storage layout */
51:
52: /* Define this if most significant bit is lowest numbered
53: in instructions that operate on numbered bit-fields. */
54: #define BITS_BIG_ENDIAN
55:
56: /* Define this if most significant byte of a word is the lowest numbered. */
57: /* That is true on the m88000. */
58: #define BYTES_BIG_ENDIAN
59:
60: /* Define this if most significant word of a multiword number is numbered. */
61: /* For the m88000 we can decide arbitrarily
62: since there are no machine instructions for them. */
63: /* #define WORDS_BIG_ENDIAN */
64:
65: /* number of bits in an addressible storage unit */
66: #define BITS_PER_UNIT 8
67:
68: /* Width in bits of a "word", which is the contents of a machine register.
69: Note that this is not necessarily the width of data type `int';
70: if using 16-bit ints on a 68000, this would still be 32.
71: But on a machine with 16-bit registers, this would be 16. */
72: #define BITS_PER_WORD 32
73:
74: /* Width of a word, in units (bytes). */
75: #define UNITS_PER_WORD 4
76:
77: /* Width in bits of a pointer.
78: See also the macro `Pmode' defined below. */
79: #define POINTER_SIZE 32
80:
81: /* Allocation boundary (in *bits*) for storing pointers in memory. */
82: #define POINTER_BOUNDARY 32
83:
84: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
85: #define PARM_BOUNDARY 32
86:
87: /* Allocation boundary (in *bits*) for the code of a function. */
88: #define FUNCTION_BOUNDARY 32
89:
90: /* Alignment of field after `int : 0' in a structure. */
91: #define EMPTY_FIELD_BOUNDARY 32
92:
93: /* No data type wants to be aligned rounder than this. */
94: #define BIGGEST_ALIGNMENT 64
95:
96: /* Define this if move instructions will actually fail to work
97: when given unaligned data. */
98: #define STRICT_ALIGNMENT
99:
100: /* Standard register usage. */
101:
102: /* Number of actual hardware registers.
103: The hardware registers are assigned numbers for the compiler
104: from 0 to just below FIRST_PSEUDO_REGISTER.
105: All registers that the compiler knows about must be given numbers,
106: even those that are not normally considered general registers.
107:
108: the m88000 has 32 fullword registers. */
109:
110: #define FIRST_PSEUDO_REGISTER 32
111:
112: /* 1 for registers that have pervasive standard uses
113: and are not available for the register allocator.
114:
115: On the 88000, these are:
116: Reg 0 = 0 (hardware).
117: Reg 1 = Subroutine return pointer (hardware).
118: [Reg 2-9 = Parameter registers (Motorola convention).]
119: Reg 25 = condition code register (Gnu).
120: Reg 26-29 = reserved by Motorola.
121: Reg 30 = frame pointer (software).
122: Reg 31 = stack pointer (software). */
123: #define FIXED_REGISTERS \
124: {1, 1, 0, 0, 0, 0, 0, 0, \
125: 0, 0, 0, 0, 0, 0, 0, 0, \
126: 0, 0, 0, 0, 0, 0, 0, 0, \
127: 0, 1, 1, 1, 1, 1, 0, 1}
128:
129: /* 1 for registers not available across function calls.
130: These must include the FIXED_REGISTERS and also any
131: registers that can be used without being saved.
132: The latter must include the registers where values are returned
133: and the register where structure-value addresses are passed.
134: Aside from that, you can include as many other registers as you like. */
135: #define CALL_USED_REGISTERS \
136: {1, 1, 1, 1, 1, 1, 1, 1, \
137: 1, 1, 1, 1, 1, 1, 0, 0, \
138: 0, 0, 0, 0, 0, 0, 0, 0, \
139: 0, 1, 1, 1, 1, 1, 0, 1}
140:
141: /* Return number of consecutive hard regs needed starting at reg REGNO
142: to hold something of mode MODE.
143: This is ordinarily the length in words of a value of mode MODE
144: but can be less for certain modes in special long registers.
145:
146: On the m88000, ordinary registers hold 32 bits worth;
147: a single floating point register is always enough for
148: anything that can be stored in them at all. */
149: #define HARD_REGNO_NREGS(REGNO, MODE) \
150: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
151:
152: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
153: On the m88000, the cpu registers can hold any mode, but doubles
154: (and larger) must start and an even register number boundary. */
155: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
156: (GET_MODE_SIZE (MODE) <= 4 || ((REGNO) & 1) == 0)
157:
158: /* Value is 1 if it is a good idea to tie two pseudo registers
159: when one has mode MODE1 and one has mode MODE2.
160: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
161: for any hard reg, then this must be 0 for correct output. */
162: #define MODES_TIEABLE_P(MODE1, MODE2) \
163: (((MODE1) == DFmode || (MODE1) == DImode) \
164: == ((MODE2) == DFmode || (MODE2) == DImode))
165:
166: /* Specify the registers used for certain standard purposes.
167: The values of these macros are register numbers. */
168:
169: /* the m88000 pc isn't overloaded on a register that the compiler knows about. */
170: /* #define PC_REGNUM */
171:
172: /* Register to use for pushing function arguments. */
173: #define STACK_POINTER_REGNUM 31
174:
175: /* Base register for access to local variables of the function. */
176: #define FRAME_POINTER_REGNUM 30
177:
178: /* Value should be nonzero if functions must have frame pointers.
179: Zero means the frame pointer need not be set up (and parms
180: may be accessed via the stack pointer) in functions that seem suitable.
181: This is computed in `reload', in reload1.c. */
182: #define FRAME_POINTER_REQUIRED 0
183:
184: /* Base register for access to arguments of the function. */
185: #define ARG_POINTER_REGNUM 30
186:
187: /* Register in which static-chain is passed to a function. */
188: /* ??? */
189: #define STATIC_CHAIN_REGNUM 10
190:
191: /* Register in which address to store a structure value
192: is passed to a function. */
193: #define STRUCT_VALUE_REGNUM 2
194: #define STRUCT_VALUE_STACK_PROTECT_REGNUM 3
195:
196: /* Define the classes of registers for register constraints in the
197: machine description. Also define ranges of constants.
198:
199: One of the classes must always be named ALL_REGS and include all hard regs.
200: If there is more than one class, another class must be named NO_REGS
201: and contain no registers.
202:
203: The name GENERAL_REGS must be the name of a class (or an alias for
204: another name such as ALL_REGS). This is the class of registers
205: that is allowed by "g" or "r" in a register constraint.
206: Also, registers outside this class are allocated only when
207: instructions express preferences for them.
208:
209: The classes must be numbered in nondecreasing order; that is,
210: a larger-numbered class must never be contained completely
211: in a smaller-numbered class.
212:
213: For any two classes, it is very desirable that there be another
214: class that represents their union. */
215:
216: /* The 88000 has one kind of registers, hence two classes. */
217:
218: enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES };
219:
220: #define N_REG_CLASSES (int) LIM_REG_CLASSES
221:
222: /* Since GENERAL_REGS is the same class as ALL_REGS,
223: don't give it a different class number; just make it an alias. */
224:
225: #define GENERAL_REGS ALL_REGS
226:
227: /* Give names of register classes as strings for dump file. */
228:
229: #define REG_CLASS_NAMES {"NO_REGS", "ALL_REGS" }
230:
231: /* Define which registers fit in which classes.
232: This is an initializer for a vector of HARD_REG_SET
233: of length N_REG_CLASSES. */
234:
235: #define REG_CLASS_CONTENTS {0, -1}
236:
237: /* The same information, inverted:
238: Return the class number of the smallest class containing
239: reg number REGNO. This could be a conditional expression
240: or could index an array. */
241:
242: #define REGNO_REG_CLASS(REGNO) ALL_REGS
243:
244: /* The class value for index registers, and the one for base regs. */
245: #define INDEX_REG_CLASS ALL_REGS
246: #define BASE_REG_CLASS ALL_REGS
247:
248: /* Get reg_class from a letter such as appears in the machine description. */
249:
250: #define REG_CLASS_FROM_LETTER(C) NO_REGS
251:
252: /* The letters I, J, K, L and M in a register constraint string
253: can be used to stand for particular ranges of immediate operands.
254: This macro defines what the ranges are.
255: C is the letter, and VALUE is a constant value.
256: Return 1 if VALUE is in the range specified by C.
257:
258: For the m88000, `I' is used for the range of constants an insn
259: can actually contain.
260: `J' is used for the range which is just zero (since that is R0).
261: `K' is used for the 5-bit operand of a compare insns. */
262:
263: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
264: ((C) == 'I' ? (unsigned) (VALUE) < 0x10000 \
265: : (C) == 'J' ? (VALUE) == 0 \
266: : (C) == 'K' ? (unsigned) (VALUE) < 0x20 \
267: : 0)
268:
269: /* Similar, but for floating constants, and defining letters G and H.
270: Here VALUE is the CONST_DOUBLE rtx itself. */
271:
272: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
273: ((C) == 'G' && XINT (VALUE, 0) == 0 && XINT (VALUE, 1) == 0)
274:
275: /* Given an rtx X being reloaded into a reg required to be
276: in class CLASS, return the class of reg to actually use.
277: In general this is just CLASS; but on some machines
278: in some cases it is preferable to use a more restrictive class. */
279: #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
280:
281: /* Return the maximum number of consecutive registers
282: needed to represent mode MODE in a register of class CLASS. */
283: #define CLASS_MAX_NREGS(CLASS, MODE) \
284: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
285:
286: /* Stack layout; function entry, exit and calling. */
287:
288: /* Define this if pushing a word on the stack
289: makes the stack pointer a smaller address. */
290: #define STACK_GROWS_DOWNWARD
291:
292: /* Define this if the nominal address of the stack frame
293: is at the high-address end of the local variables;
294: that is, each additional local variable allocated
295: goes at a more negative offset in the frame.
296:
297: Do not define this for the Motorola 88000. There are no
298: negative literals! */
299: /* #define FRAME_GROWS_DOWNWARD */
300:
301: /* Offset within stack frame to start allocating local variables at.
302: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
303: first local allocated. Otherwise, it is the offset to the BEGINNING
304: of the first local allocated. */
305: #define STARTING_FRAME_OFFSET 0
306:
307: /* If we generate an insn to push BYTES bytes,
308: this says how many the stack pointer really advances by.
309: On the m88000, don't define this because there are no push insns. */
310: /* #define PUSH_ROUNDING(BYTES) */
311:
312: /* If BYTES is the size of arguments for a function call,
313: return the size of the argument block (which is BYTES suitably rounded).
314: Define this only on machines where the entire call block is allocated
315: before the args are stored into it. */
316:
317: #define ROUND_CALL_BLOCK_SIZE(BYTES) \
318: (((BYTES) + 7) & ~7)
319:
320: /* Offset of first parameter from the argument pointer register value. */
321: /* For the 88000, this must be non-zero so that addresses of the parms
322: can always be distinguished. */
323: #define FIRST_PARM_OFFSET(FNDECL) 0
324:
325: /* Value is 1 if returning from a function call automatically
326: pops the arguments described by the number-of-args field in the call.
327: FUNTYPE is the data type of the function (as a tree),
328: or for a library call it is an identifier node for the subroutine name. */
329:
330: #define RETURN_POPS_ARGS(FUNTYPE) 0
331:
332: /* Define how to find the value returned by a function.
333: VALTYPE is the data type of the value (as a tree).
334: If the precise function being called is known, FUNC is its FUNCTION_DECL;
335: otherwise, FUNC is 0. */
336:
337: /* ?? On the m88000 the value is found in the second "output" register. */
338:
339: #define FUNCTION_VALUE(VALTYPE, FUNC) \
340: gen_rtx (REG, TYPE_MODE (VALTYPE), 2)
341:
342: /* ?? But the called function leaves it in the second "input" register. */
343:
344: #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \
345: gen_rtx (REG, TYPE_MODE (VALTYPE), 2)
346:
347: /* Define how to find the value returned by a library function
348: assuming the value has mode MODE. */
349:
350: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 2)
351:
352: /* 1 if N is a possible register number for a function value
353: as seen by the caller.
354: On the m88000, the first "output" reg is the only register thus used. */
355:
356: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2)
357:
358: /* 1 if N is a possible register number for function argument passing.
359: On the m88000, these are the "output" registers. */
360:
361: #define FUNCTION_ARG_REGNO_P(N) ((N) <= 9 && (N) >= 2)
362:
363: /* Define a data type for recording info about an argument list
364: during the scan of that argument list. This data type should
365: hold all necessary information about the function itself
366: and about the args processed so far, enough to enable macros
367: such as FUNCTION_ARG to determine where the next arg should go.
368:
369: On the m88000, this is a single integer, which is a number of words
370: of arguments scanned so far (including the invisible argument,
371: if any, which holds the structure-value-address).
372: Thus 8 or more means all following args should go on the stack. */
373:
374: #define CUMULATIVE_ARGS int
375:
376: /* Initialize a variable CUM of type CUMULATIVE_ARGS
377: for a call to a function whose data type is FNTYPE.
378: For a library call, FNTYPE is 0.
379:
380: On the m88000, the offset normally starts at 0, but starts at 4 bytes
381: when the function gets a structure-value-address as an
382: invisible first argument. */
383:
384: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE) \
1.1.1.2 root 385: ((CUM) = ((FNTYPE) != 0 && aggregate_value_p ((FNTYPE))))
1.1 root 386:
387: /* Update the data in CUM to advance over an argument
388: of mode MODE and data type TYPE.
389: (TYPE is null for libcalls where that information may not be available.) */
390:
391: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
392: ((CUM) += ((MODE) != BLKmode \
393: ? (GET_MODE_SIZE (MODE) + 3) / 4 \
394: : (int_size_in_bytes (TYPE) + 3) / 4))
395:
396: /* Determine where to put an argument to a function.
397: Value is zero to push the argument on the stack,
398: or a hard register in which to store the argument.
399:
400: MODE is the argument's machine mode.
401: TYPE is the data type of the argument (as a tree).
402: This is null for libcalls where that information may
403: not be available.
404: CUM is a variable of type CUMULATIVE_ARGS which gives info about
405: the preceding args and about the function being called.
406: NAMED is nonzero if this argument is a named parameter
407: (otherwise it is an extra parameter matching an ellipsis). */
408:
409: /* On the m88000 the first eight words of args are normally in registers
410: and the rest are pushed. But any arg that won't entirely fit in regs
411: is pushed. */
412:
413: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
414: (8 >= ((CUM) \
415: + ((MODE) == BLKmode \
416: ? (int_size_in_bytes (TYPE) + 3) / 4 \
417: : (GET_MODE_SIZE (MODE) + 3) / 4)) \
418: ? gen_rtx (REG, (MODE), 2 + (CUM)) \
419: : 0)
420:
421: /* Define where a function finds its arguments.
422: This would be different from FUNCTION_ARG if we had register windows. */
423:
424: #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
425: FUNCTION_ARG (CUM, MODE, TYPE, NAMED)
426:
427: /* For an arg passed partly in registers and partly in memory,
428: this is the number of registers used.
429: For args passed entirely in registers or entirely in memory, zero. */
430:
431: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
432:
433: /* This macro generates the assembly code for function entry.
434: FILE is a stdio stream to output the code to.
435: SIZE is an int: how many units of temporary storage to allocate.
436: Refer to the array `regs_ever_live' to determine which registers
437: to save; `regs_ever_live[I]' is nonzero if register number I
438: is ever used in the function. This macro is responsible for
439: knowing which registers should not be saved even if used. */
440:
441: #define FUNCTION_PROLOGUE(FILE, SIZE) \
442: { \
443: extern char call_used_regs[]; \
444: extern int current_function_pretend_args_size; \
445: extern int frame_pointer_needed; \
446: int fsize = ((SIZE) + current_function_pretend_args_size + 7) & ~7; \
447: int regno, nregs, i; \
448: int offset = 0; \
449: for (regno = 2, nregs = 0; regno < FRAME_POINTER_REGNUM; regno++) \
450: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
451: nregs++; \
452: nregs = (nregs + 1) & ~1; \
453: if (regs_ever_live[1] + frame_pointer_needed + nregs) \
454: { \
455: if (fsize + 8 + nregs*4 < 0x10000) \
456: offset = fsize; \
457: fprintf (FILE, "\tsub r31,r31,%d\n", 8 + nregs*4 + offset); \
458: } \
459: if (frame_pointer_needed) \
460: fprintf (FILE, "\tst r30,r31,%d\n", offset); \
461: if (regs_ever_live[1]) \
462: fprintf (FILE, "\tst r1,r31,%d\n", 4 + offset); \
463: if (nregs) \
464: for (regno = 2, nregs = 2; regno < FRAME_POINTER_REGNUM; regno++) \
465: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
466: if (regno & 1 || !regs_ever_live[regno+1] || call_used_regs[regno+1])\
467: fprintf (FILE, "\tst r%d,r31,%d\n", regno, offset + nregs++ * 4);\
468: else \
469: { \
470: fprintf (FILE, "\tst.d r%d,r31,%d\n", regno, offset + nregs * 4);\
471: regno += 1; nregs += 2; \
472: } \
473: if (offset || fsize == 0) /* do nothing. */ ; \
474: else if ((unsigned) fsize < 0x10000) \
475: fprintf (FILE, "\tsub r31,r31,%d\n", fsize); \
476: else fprintf (FILE, "\tor.u r25,r0,hi16(%d)\n\tor r25,r0,lo16(%d)\n\tsub r31,r31,r25\n", fsize, fsize); \
477: if (frame_pointer_needed) fprintf (FILE, "\tor r30,r0,r31\n"); \
478: }
479:
480: /* Output assembler code to FILE to increment profiler label # LABELNO
481: for profiling a function entry. */
482:
483: #define FUNCTION_PROFILER(FILE, LABELNO) \
484: abort ();
485:
486: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
487: the stack pointer does not matter. The value is tested only in
488: functions that have frame pointers.
489: No definition is equivalent to always zero. */
490:
491: extern int may_call_alloca;
492: extern int current_function_pretend_args_size;
493:
494: #define EXIT_IGNORE_STACK \
495: (get_frame_size () != 0 \
496: || may_call_alloca || current_function_pretend_args_size)
497:
498: /* This macro generates the assembly code for function exit,
499: on machines that need it. If FUNCTION_EPILOGUE is not defined
500: then individual return instructions are generated for each
501: return statement. Args are same as for FUNCTION_PROLOGUE.
502:
503: The function epilogue should not depend on the current stack pointer!
504: It should use the frame pointer only. This is mandatory because
505: of alloca; we also take advantage of it to omit stack adjustments
506: before returning. */
507:
508: #define FUNCTION_EPILOGUE(FILE, SIZE) \
509: { \
510: extern char call_used_regs[]; \
511: extern int may_call_alloca; \
512: int fsize = ((SIZE) + current_function_pretend_args_size + 7) & ~7; \
513: int nregs, regno, i; \
514: for (regno = 2, nregs = 0; regno < FRAME_POINTER_REGNUM; regno++) \
515: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
516: nregs++; \
517: if (frame_pointer_needed) \
518: { \
519: if ((unsigned) fsize < 0x10000) \
520: fprintf (FILE, "\tadd r31,r30,%d\n", fsize); \
521: else fprintf (FILE, "\tor.u r25,r0,hi16(%d)\n\tor r25,r0,lo16(%d)\n\tadd r31,r30,r25\n", fsize, fsize); \
522: } \
523: else if (fsize) fprintf (FILE, "\tadd r31,r31,%d\n", fsize); \
524: if (nregs) \
525: for (regno = 2, nregs = 2; regno < FRAME_POINTER_REGNUM; regno++) \
526: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
527: if (regno & 1 || !regs_ever_live[regno+1] || call_used_regs[regno+1])\
528: fprintf (FILE, "\tld r%d,r31,%d\n", regno, nregs++ * 4);\
529: else \
530: { \
531: fprintf (FILE, "\tld.d r%d,r31,%d\n", regno, nregs * 4);\
532: regno += 1; nregs += 2; \
533: } \
534: if (regs_ever_live[1]) \
535: fprintf (FILE, "\tld r1,r31,4\n"); \
536: else \
537: fprintf (FILE, ";; r1 is set to go!\n"); \
538: if (frame_pointer_needed) \
539: fprintf (FILE, "\tld r30,r31,0\n"); \
540: nregs = (nregs + 1) & ~1; \
541: if (regs_ever_live[1] + frame_pointer_needed + (nregs > 2)) \
542: fprintf (FILE, "\tjmp.n r1\n\taddu r31,r31,%d\n", nregs * 4); \
543: else fprintf (FILE, "\tjmp r1\n"); \
544: /* let insn reorganizer know that we are at the end of a function. */ \
545: fprintf (FILE, "\tdata\n"); \
546: }
547:
548: /* If the memory address ADDR is relative to the frame pointer,
549: correct it to be relative to the stack pointer instead.
550: This is for when we don't use a frame pointer.
551: ADDR should be a variable name. */
552:
553: #define FIX_FRAME_POINTER_ADDRESS(ADDR,DEPTH) \
554: { int offset = -1; \
555: rtx regs = stack_pointer_rtx; \
556: if (ADDR == frame_pointer_rtx) \
557: offset = 0; \
558: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx \
559: && GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \
560: offset = INTVAL (XEXP (ADDR, 1)); \
561: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx) \
562: { rtx other_reg = XEXP (ADDR, 1); \
563: offset = 0; \
564: regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
565: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 1) == frame_pointer_rtx) \
566: { rtx other_reg = XEXP (ADDR, 0); \
567: offset = 0; \
568: regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
569: if (offset >= 0) \
570: { int regno; \
571: extern char call_used_regs[]; \
572: for (regno = 2; regno < FRAME_POINTER_REGNUM; regno++) \
573: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
574: offset += 4; \
575: offset -= 4; \
576: ADDR = plus_constant (regs, offset + (DEPTH)); } }
577:
578:
579: /* Addressing modes, and classification of registers for them. */
580:
581: /* #define HAVE_POST_INCREMENT */
582: /* #define HAVE_POST_DECREMENT */
583:
584: /* #define HAVE_PRE_DECREMENT */
585: /* #define HAVE_PRE_INCREMENT */
586:
587: /* Macros to check register numbers against specific register classes. */
588:
589: /* These assume that REGNO is a hard or pseudo reg number.
590: They give nonzero only if REGNO is a hard reg of the suitable class
591: or a pseudo reg currently allocated to a suitable hard reg.
592: Since they use reg_renumber, they are safe only once reg_renumber
593: has been allocated, which happens in local-alloc.c. */
594:
595: #define REGNO_OK_FOR_INDEX_P(REGNO) \
596: ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
597: #define REGNO_OK_FOR_BASE_P(REGNO) \
598: ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
599:
600: /* Now macros that check whether X is a register and also,
601: strictly, whether it is in a specified class.
602:
603: These macros are specific to the the m88000, and may be used only
604: in code for printing assembler insns and in conditions for
605: define_optimization. */
606:
607: /* Maximum number of registers that can appear in a valid memory address. */
608:
609: #define MAX_REGS_PER_ADDRESS 2
610:
611: /* Recognize any constant value that is a valid address. */
612:
613: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
614:
615: /* Nonzero if the constant value X is a legitimate general operand.
616: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
617:
618: #define LEGITIMATE_CONSTANT_P(X) (1)
619:
620: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
621: and check its validity for a certain class.
622: We have two alternate definitions for each of them.
623: The usual definition accepts all pseudo regs; the other rejects
624: them unless they have been allocated suitable hard regs.
625: The symbol REG_OK_STRICT causes the latter definition to be used.
626:
627: Most source files want to accept pseudo regs in the hope that
628: they will get allocated to the class that the insn wants them to be in.
629: Source files for reload pass need to be strict.
630: After reload, it makes no difference, since pseudo regs have
631: been eliminated by then. */
632:
633: #ifndef REG_OK_STRICT
634:
635: /* Nonzero if X is a hard reg that can be used as an index
636: or if it is a pseudo reg. */
637: #define REG_OK_FOR_INDEX_P(X) (1)
638: /* Nonzero if X is a hard reg that can be used as a base reg
639: or if it is a pseudo reg. */
640: #define REG_OK_FOR_BASE_P(X) (1)
641:
642: #else
643:
644: /* Nonzero if X is a hard reg that can be used as an index. */
645: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
646: /* Nonzero if X is a hard reg that can be used as a base reg. */
647: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
648:
649: #endif
650:
651: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
652: that is a valid memory address for an instruction.
653: The MODE argument is the machine mode for the MEM expression
654: that wants to use this address.
655:
656: On the m88000, the actual legitimate addresses must be REG+REG or REG+SMALLINT.
657: But we can treat a SYMBOL_REF as legitimate if it is part of this
658: function's constant-pool, because such addresses can actually
659: be output as REG+SMALLINT. */
660:
661: #define INT_FITS_16_BITS(I) ((unsigned) (I) < 0x10000)
662:
663: #define FITS_16_BITS(X) \
664: (GET_CODE (X) == CONST_INT && INT_FITS_16_BITS (INTVAL (X)))
665:
666: #define LEGITIMATE_INDEX_P(X, MODE) \
667: (FITS_16_BITS (X) \
668: || (REG_P (X) \
669: && REG_OK_FOR_INDEX_P (X)) \
670: || (GET_CODE (X) == MULT \
671: && REG_P (XEXP (X, 0)) \
672: && REG_OK_FOR_INDEX_P (XEXP (X, 0)) \
673: && GET_CODE (XEXP (X, 1)) == CONST_INT \
674: && (INTVAL (XEXP (X, 1)) == GET_MODE_SIZE (MODE))) \
675: || (GET_CODE (X) == MULT \
676: && REG_P (XEXP (X, 1)) \
677: && REG_OK_FOR_INDEX_P (XEXP (X, 1)) \
678: && GET_CODE (XEXP (X, 0)) == CONST_INT \
679: && (INTVAL (XEXP (X, 0)) == GET_MODE_SIZE (MODE)) \
680: && (warning ("MULT backwards"), 1)))
681:
682: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
683: { \
684: if (GET_CODE (X) == CONST_INT) \
685: { \
686: if (FITS_16_BITS (X)) \
687: goto ADDR; \
688: } \
689: else if (CONSTANT_ADDRESS_P (X)) \
690: goto ADDR; \
691: else if (REG_P (X)) \
692: { \
693: if (REG_OK_FOR_BASE_P (X)) \
694: goto ADDR; \
695: } \
696: else if (GET_CODE (X) == PLUS) \
697: if (REG_P (XEXP (X, 0)) \
698: && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
699: { \
700: if (LEGITIMATE_INDEX_P (XEXP (X, 1), MODE)) \
701: goto ADDR; \
702: } \
703: else if (REG_P (XEXP (X, 1)) \
704: && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
705: { \
706: if (LEGITIMATE_INDEX_P (XEXP (X, 0), MODE)) \
707: goto ADDR; \
708: } \
709: }
710:
711: /* Try machine-dependent ways of modifying an illegitimate address
712: to be legitimate. If we find one, return the new, valid address.
713: This macro is used in only one place: `memory_address' in explow.c.
714:
715: OLDX is the address as it was before break_out_memory_refs was called.
716: In some cases it is useful to look at this to decide what needs to be done.
717:
718: MODE and WIN are passed so that this macro can use
719: GO_IF_LEGITIMATE_ADDRESS.
720:
721: It is always safe for this macro to do nothing. It exists to recognize
722: opportunities to optimize the output. */
723:
724: /* On the m88000, change REG+N into REG+REG, and REG+(X*Y) into REG+REG. */
725:
726: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
727: { if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
728: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
729: copy_to_mode_reg (SImode, XEXP (X, 1))); \
730: if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
731: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
732: copy_to_mode_reg (SImode, XEXP (X, 0))); \
733: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
734: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
735: force_operand (XEXP (X, 0), 0)); \
736: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
737: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
738: force_operand (XEXP (X, 1), 0)); \
739: if (memory_address_p (MODE, X)) \
740: goto WIN; }
741:
742: /* Go to LABEL if ADDR (a legitimate address expression)
743: has an effect that depends on the machine mode it is used for.
744: On the the m88000 this is never true. */
745:
746: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
747:
748: /* Specify the machine mode that this machine uses
749: for the index in the tablejump instruction. */
750: #define CASE_VECTOR_MODE SImode
751:
752: /* Define this if a raw index is all that is needed for a
753: `tablejump' insn. */
754: #define CASE_TAKES_INDEX_RAW
755:
756: /* Define this if the tablejump instruction expects the table
757: to contain offsets from the address of the table.
758: Do not define this if the table should contain absolute addresses. */
759: /* #define CASE_VECTOR_PC_RELATIVE */
760:
761: /* Specify the tree operation to be used to convert reals to integers. */
762: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
763:
764: /* This is the kind of divide that is easiest to do in the general case. */
765: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
766:
767: /* Define this as 1 if `char' should by default be signed; else as 0. */
768: #define DEFAULT_SIGNED_CHAR 1
769:
770: /* Max number of bytes we can move from memory to memory
771: in one reasonably fast instruction. */
772: #define MOVE_MAX 4
773:
774: /* Nonzero if access to memory by bytes is slow and undesirable. */
775: #define SLOW_BYTE_ACCESS 0
776:
777: /* Do not break .stabs pseudos into continuations. */
778: #define DBX_CONTIN_LENGTH 0
779:
780: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
781: is done just by pretending it is already truncated. */
782: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
783:
784: /* We assume that the store-condition-codes instructions store 0 for false
785: and some other value for true. This is the value stored for true. */
786:
787: #define STORE_FLAG_VALUE 1
788:
789: /* Specify the machine mode that pointers have.
790: After generation of rtl, the compiler makes no further distinction
791: between pointers and any other objects of this machine mode. */
792: #define Pmode SImode
793:
794: /* A function address in a call instruction
795: is a byte address (for indexing purposes)
796: so give the MEM rtx a byte's mode. */
797: #define FUNCTION_MODE SImode
798:
799: /* Define this if addresses of constant functions
800: shouldn't be put through pseudo regs where they can be cse'd.
801: Desirable on machines where ordinary constants are expensive
802: but a CALL with constant address is cheap. */
803: #define NO_FUNCTION_CSE
804:
805: /* Compute the cost of computing a constant rtl expression RTX
806: whose rtx-code is CODE. The body of this macro is a portion
807: of a switch statement. If the code is computed here,
808: return it with a return statement. Otherwise, break from the switch. */
809:
810: #define CONST_COSTS(RTX,CODE) \
811: case CONST_INT: \
812: if ((unsigned) INTVAL (RTX) < 0x10000) return 1; \
813: case CONST: \
814: case LABEL_REF: \
815: case SYMBOL_REF: \
816: return 2; \
817: case CONST_DOUBLE: \
818: return 4;
819:
820: /* Tell emit-rtl.c how to initialize special values on a per-function bass. */
821: extern int optimize;
822: extern struct rtx_def *cc0_reg_rtx;
823:
824: typedef struct { struct rtx_def *ccr; } cc_status_mdep;
825: #define CC_STATUS_MDEP cc_status_mdep
826:
827: #define INIT_EMIT_MDEP \
828: { \
829: cc0_reg_rtx = gen_rtx (REG, SImode, 25); \
830: }
831:
832: /* Tell final.c how to eliminate redundant test instructions. */
833:
834: /* Here we define machine-dependent flags and fields in cc_status
835: (see `conditions.h'). */
836:
837: #define CC_IN_FCCR 04000
838:
839: /* Store in cc_status the expressions
840: that the condition codes will describe
841: after execution of an instruction whose pattern is EXP.
842: Do not alter them if the instruction would not alter the cc's. */
843:
844: #define NOTICE_UPDATE_CC(EXP, INSN) \
845: { if (GET_CODE (EXP) == SET) \
846: { if (GET_CODE (SET_DEST (EXP)) == CC0) \
847: { cc_status.flags = 0; \
848: cc_status.value1 = SET_DEST (EXP); \
849: cc_status.value2 = SET_SRC (EXP); \
850: } \
851: else if (GET_CODE (SET_DEST (EXP)) == REG) \
852: { if ((cc_status.value1 \
853: && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value1))) \
854: cc_status.value1 = 0; \
855: if ((cc_status.value2 \
856: && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value2))) \
857: cc_status.value2 = 0; \
858: } \
859: else if (GET_CODE (SET_DEST (EXP)) == MEM) \
860: { CC_STATUS_INIT; } \
861: } \
862: else if (GET_CODE (EXP) == PARALLEL \
863: && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \
864: { if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == CC0) \
865: { cc_status.flags = 0; \
866: cc_status.value1 = SET_DEST (XVECEXP (EXP, 0, 0)); \
867: cc_status.value2 = SET_SRC (XVECEXP (EXP, 0, 0)); \
868: } \
869: else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == REG) \
870: { if ((cc_status.value1 \
871: && reg_overlap_mentioned_p (SET_DEST (XVECEXP (EXP, 0, 0)), cc_status.value1))) \
872: cc_status.value1 = 0; \
873: if ((cc_status.value2 \
874: && reg_overlap_mentioned_p (SET_DEST (XVECEXP (EXP, 0, 0)), cc_status.value2))) \
875: cc_status.value2 = 0; \
876: } \
877: else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == MEM) \
878: { CC_STATUS_INIT; } \
879: } \
880: else if (GET_CODE (EXP) == CALL) \
881: { /* all bets are off */ CC_STATUS_INIT; } \
882: if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \
883: && cc_status.value2 \
884: && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \
885: printf ("here!\n", cc_status.value2 = 0); \
886: }
887:
888: /* Control the assembler format that we output. */
889:
890: /* Output at beginning of assembler file. */
891:
892: #define ASM_FILE_START(FILE)
893:
894: /* Output to assembler file text saying following lines
895: may contain character constants, extra white space, comments, etc. */
896:
897: #define ASM_APP_ON ""
898:
899: /* Output to assembler file text saying following lines
900: no longer contain unusual constructs. */
901:
902: #define ASM_APP_OFF ""
903:
904: /* Output before read-only data. */
905:
906: #define TEXT_SECTION_ASM_OP "\ttext"
907:
908: /* Output before writable data. */
909:
910: #define DATA_SECTION_ASM_OP "\tdata"
911:
912: /* How to refer to registers in assembler output.
913: This sequence is indexed by compiler's hard-register-number (see above). */
914:
915: #define REGISTER_NAMES \
916: {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \
917: "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", \
918: "r20", "r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", \
919: "r30", "r31"}
920:
921: /* How to renumber registers for dbx and gdb. */
922:
923: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
924:
925: /* This is how to output the definition of a user-level label named NAME,
926: such as the label on a static function or variable NAME. */
927:
928: #define ASM_OUTPUT_LABEL(FILE,NAME) \
929: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
930:
931: /* This is how to output a command to make the user-level label named NAME
932: defined for reference from other files. */
933:
934: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
935: do { fputs ("\tglobal\t", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
936:
937: /* This is how to output a reference to a user-level label named NAME.
938: `assemble_name' uses this. */
939:
940: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
941: fprintf (FILE, "_%s", NAME)
942:
943: /* This is how to output an internal numbered label where
944: PREFIX is the class of label and NUM is the number within the class. */
945:
946: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
947: fprintf (FILE, "@%s%d:\n", PREFIX, NUM)
948:
949: /* This is how to store into the string LABEL
950: the symbol_ref name of an internal numbered label where
951: PREFIX is the class of label and NUM is the number within the class.
952: This is suitable for output with `assemble_name'. */
953:
954: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
955: sprintf (LABEL, "*@%s%d", PREFIX, NUM)
956:
957: /* This is how to output an assembler line defining a `double' constant. */
958:
959: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
960: fprintf (FILE, "\tdouble %.20e\n", (VALUE))
961:
962: /* This is how to output an assembler line defining a `float' constant. */
963:
964: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
965: fprintf (FILE, "\tfloat %.12e\n", (VALUE))
966:
967: /* This is how to output an assembler line defining an `int' constant. */
968:
969: #define ASM_OUTPUT_INT(FILE,VALUE) \
970: ( fprintf (FILE, "\tword "), \
971: output_addr_const (FILE, (VALUE)), \
972: fprintf (FILE, "\n"))
973:
974: /* Likewise for `short' and `char' constants. */
975:
976: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
977: ( fprintf (FILE, "\thalf "), \
978: output_addr_const (FILE, (VALUE)), \
979: fprintf (FILE, "\n"))
980:
981: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
982: ( fprintf (FILE, "\tbyte "), \
983: output_addr_const (FILE, (VALUE)), \
984: fprintf (FILE, "\n"))
985:
986: /* This is how to output an assembler line for a numeric constant byte. */
987:
988: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
989: fprintf (FILE, "\tbyte 0x%x\n", (VALUE))
990:
991: #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
992: output_ascii (FILE, P, SIZE)
993:
994: #define ASM_OUTPUT_ADDR_VEC_PROLOGUE(FILE, MODE, LEN) \
995: fprintf (FILE, "\tjmp r1\n");
996:
997: /* This is how to output an element of a case-vector that is absolute. */
998:
999: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1000: fprintf (FILE, "\t@L%d\n", VALUE)
1001:
1002: /* This is how to output an element of a case-vector that is relative.
1003: (the m88000 does not use such vectors,
1004: but we must define this macro anyway.) */
1005:
1006: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1007: fprintf (FILE, "\tword @L%d-@L%d\n", VALUE, REL)
1008:
1009: /* This is how to output an assembler line
1010: that says to advance the location counter
1011: to a multiple of 2**LOG bytes. */
1012:
1013: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1014: if ((LOG) != 0) \
1015: fprintf (FILE, "\talign %d\n", 1<<(LOG))
1016:
1017: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1.1.1.3 ! root 1018: fprintf (FILE, "\tzero %u\n", (SIZE))
1.1 root 1019:
1020: /* This says how to output an assembler line
1021: to define a global common symbol. */
1022:
1023: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1024: ( fputs ("\tcomm ", (FILE)), \
1025: assemble_name ((FILE), (NAME)), \
1.1.1.3 ! root 1026: fprintf ((FILE), ",%u\n", (ROUNDED)))
1.1 root 1027:
1028: /* This says how to output an assembler line
1029: to define a local common symbol. */
1030:
1031: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1032: ( fprintf ((FILE), "\talign %d\n", (SIZE) <= 4 ? 4 : 8), \
1033: assemble_name ((FILE), (NAME)), \
1.1.1.3 ! root 1034: fprintf ((FILE), ":\n\tzero %u\n", (ROUNDED)))
1.1 root 1035:
1036: /* Store in OUTPUT a string (made with alloca) containing
1037: an assembler-name for a local static variable named NAME.
1038: LABELNO is an integer which is different for each call. */
1039:
1040: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1041: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1042: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1043:
1044: /* Define the parentheses used to group arithmetic operations
1045: in assembler code. */
1046:
1047: #define ASM_OPEN_PAREN "("
1048: #define ASM_CLOSE_PAREN ")"
1049:
1050: /* Define results of standard character escape sequences. */
1051: #define TARGET_BELL 007
1052: #define TARGET_BS 010
1053: #define TARGET_TAB 011
1054: #define TARGET_NEWLINE 012
1055: #define TARGET_VT 013
1056: #define TARGET_FF 014
1057: #define TARGET_CR 015
1058:
1059: /* Print operand X (an rtx) in assembler syntax to file FILE.
1060: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1061: For `%' followed by punctuation, CODE is the punctuation and X is null.
1062:
1063: On the m88000, the CODE can be `r', meaning this is a register-only operand
1064: and an immediate zero should be represented as `r0'. */
1065:
1066: #define PRINT_OPERAND(FILE, X, CODE) \
1067: { if (GET_CODE (X) == REG) \
1068: fprintf (FILE, "%s", reg_names[REGNO (X)]); \
1069: else if (GET_CODE (X) == MEM) \
1070: output_address (XEXP (X, 0)); \
1071: else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) == SFmode) \
1072: { union { double d; int i[2]; } u; \
1073: union { float f; int i; } u1; \
1074: u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X); \
1075: u1.f = u.d; \
1076: if (CODE == 'f') \
1077: fprintf (FILE, "0r%.9g", u1.f); \
1078: else \
1079: fprintf (FILE, "0x%x", u1.i); } \
1080: else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != DImode) \
1081: { union { double d; int i[2]; } u; \
1082: u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X); \
1083: fprintf (FILE, "0r%.20g", u.d); } \
1084: else if ((CODE) == 'r' && (X) == const0_rtx) \
1085: fprintf (FILE, "r0"); \
1086: else { output_addr_const (FILE, X); }}
1087:
1088: /* Print a memory address as an operand to reference that memory location. */
1089:
1090: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1091: { register rtx base, index = 0; \
1092: register rtx addr = ADDR; \
1093: register rtx reg0, reg1; \
1094: switch (GET_CODE (addr)) \
1095: { \
1096: case REG: \
1097: fprintf (FILE, "r0,%s", reg_names[REGNO (addr)]); \
1098: break; \
1099: case PLUS: \
1100: reg0 = XEXP (addr, 0); \
1101: reg1 = XEXP (addr, 1); \
1102: if (GET_CODE (reg0) == MULT) \
1103: { rtx tmp = reg0; reg0 = reg1; reg1 = tmp; } \
1104: if (REG_P (reg0)) \
1105: if (REG_P (reg1)) \
1106: fprintf (FILE, "%s,%s", \
1107: reg_names[REGNO (reg0)], \
1108: reg_names[REGNO (reg1)]); \
1109: else if (GET_CODE (reg1) == CONST_INT) \
1110: { \
1111: int offset = INTVAL (reg1); \
1112: fprintf (FILE, "%s,%d", reg_names[REGNO (reg0)], offset); \
1113: } \
1114: else if (GET_CODE (reg1) == MULT) \
1115: fprintf (FILE, "%s[%s]", \
1116: reg_names[REGNO (reg0)], \
1117: reg_names[REGNO (XEXP (reg1, 0))]); \
1118: else fatal ("bad XEXP (1) to PRINT_OPERAND_ADDRESS"); \
1119: else fatal ("unknown PLUS case in PRINT_OPERAND_ADDRESS"); \
1120: break; \
1121: case MULT: \
1122: fprintf (FILE, "r0[%s]", reg_names[REGNO (XEXP (addr, 0))]); \
1123: break; \
1124: default: \
1125: fprintf (FILE, "r0,"); \
1126: output_addr_const (FILE, addr); \
1127: }}
1128:
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