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1.1 root 1: /* Definitions of target machine for GNU compiler. MIPS version.
2: Contributed by A. Lichnewsky, [email protected]
3: Copyright (C) 1989 Free Software Foundation, Inc.
4:
5: This file is part of GNU CC.
6:
7: GNU CC is free software; you can redistribute it and/or modify
8: it under the terms of the GNU General Public License as published by
9: the Free Software Foundation; either version 1, or (at your option)
10: any later version.
11:
12: GNU CC is distributed in the hope that it will be useful,
13: but WITHOUT ANY WARRANTY; without even the implied warranty of
14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15: GNU General Public License for more details.
16:
17: You should have received a copy of the GNU General Public License
18: along with GNU CC; see the file COPYING. If not, write to
19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20:
21: /* ??? This file needs to be reformatted so that it looks like the
22: rest of GCC. ??? */
23:
24: /* Names to predefine in the preprocessor for this target machine. */
25:
26: #define CPP_PREDEFINES "-Dmips -Dunix"
27:
28: /*----------------------------------------------------------------------
29:
30: SWITCHES:
31:
32: -O optimization. Implies -fstrength-reduce -fomit-frame-pointer
33: -O2 optimization. Implies -O
34:
35: Tries to make use of short displacements using the
36: Sdata and Sbss sections. This uses the -G switches of as and ld.
37:
38: -G <size>
39: Pass size to as and ld. Default -G 8.
40:
41: -mG0 -mG1 -mG2
42: Construct a size to be passed to GCC for Data / Sdata selection.
43:
44: Value is ( (i=G0 + 2 G1 + 4 G2) , (i < 6) ? ( 1<<i) :(1 <<(i+3)))
45: Same value should be passed to as + ld using -G.
46:
47: Default = -mG1 -mG0 (Value = 8).
48:
49: -G32 Implies -G 32 -mG2 -mnG1 -mG0.
50:
51:
52: -bestGnum
53: Pass -bestGnum flag to ld. This helps setting best value for
54: the -G parameter.
55:
56: -SSYSV for RISC-OS: use the System V environment
57: -SBSD43 for RISC-OS: use the BSD 4.3 environment
58: ----------------------------------------------------------------------*/
59:
60:
61:
62: /***********************************************************************
63:
64: WARNING:
65:
66: No attempt to select (configure) the -B and -I parameters has been
67: made inside this version of gcc. They should be made (eg. thru a
68: shell script).
69:
70: -I should be set in such a way that the include file "va-mips.h"
71: gets included (via "varargs.h") for varargs. Otherwise gcc will not
72: bootstrap -- and produce wrong code for varargs.
73:
74:
75: ***********************************************************************/
76:
77:
78: /* Switch Recognition by gcc.c */
79:
80: #ifdef SWITCH_TAKES_ARG
81: #undef SWITCH_TAKES_ARG
82: #endif
83:
84: #define SWITCH_TAKES_ARG(CHAR) \
85: ((CHAR) == 'D' || (CHAR) == 'U' || (CHAR) == 'o' \
86: || (CHAR) == 'e' || (CHAR) == 'T' || (CHAR) == 'u' \
87: || (CHAR) == 'I' || (CHAR) == 'Y' || (CHAR) == 'm' \
88: || (CHAR) == 'L' || (CHAR) == 'i' || (CHAR) == 'A' \
89: || (CHAR) == 'G')
90:
91:
92: /* Extra switches sometimes passed to the assembler. */
93:
94: /* #define ASM_SPEC "%{O:-O2} %{O2: -O2} %{!G32: %{G*}} \
95: %{!G:%{!G32: -G 8}} %{G32: -G 32}" */
96: #define ASM_SPEC "-nocpp %{O:-O2} %{O2: -O2} %{!G32: %{G*}} \
97: %{!G:%{!G32: -G 8}} %{G32: -G 32}"
98:
99: /* Extra switches sometimes passed to the loader. */
100:
101:
102: #if defined(MIPS_SYSV) /* RISC-OS SYSTEM V */
103:
104: #define STARTFILE_SPEC \
105: "%{pg:gcrt0.o%s}%{!pg:%{p:mcrt0.o%s}%{!p:crt1.o%s crtn.o%s}}"
106:
107: #define LINK_SPEC "%{!G32:%{G*} \
108: %{!G:%{!G32:%{mG0:%eYou should include ld/as option -G} \
109: %{mG1:%eYou should include ld/as option -G} \
110: %{mG2:%eYou should include ld/as option -G} \
111: -G 8}}} \
112: %{G32: -G 32} \
113: %{bestGnum: -bestGnum} \
114: %{!ZBSD43:-systype /sysv/}%{ZBSD43:-systype /bsd43/} \
115: "
116:
117: #else
118: #if defined(MIPS_BSD43) /* RISC-OS BSD */
119:
120: #define STARTFILE_SPEC \
121: "%{pg:gcrt0.o%s}%{!pg:%{p:mcrt0.o%s}%{!p:crt1.o%s crtn.o%s}}"
122:
123: #define LINK_SPEC "%{!G32:%{G*} \
124: %{!G:%{!G32:%{mG0:%eYou should include ld/as option -G} \
125: %{mG1:%eYou should include ld/as option -G} \
126: %{mG2:%eYou should include ld/as option -G} \
127: -G 8}}} \
128: %{G32: -G 32} \
129: %{bestGnum: -bestGnum} \
130: %{!ZSYSV:-systype /bsd43/}%{ZSYSV:-systype /sysv/}"
131:
132: #else /* Default for MIPS BSD and ULTRIX */
133:
134: #define LINK_SPEC "%{!G32:%{G*} \
135: %{!G:%{!G32:%{mG0:%eYou should include ld/as option -G} \
136: %{mG1:%eYou should include ld/as option -G} \
137: %{mG2:%eYou should include ld/as option -G} \
138: -G 8}}} \
139: %{G32: -G 32} \
140: %{bestGnum: -bestGnum} "
141: #endif
142: #endif
143:
144: /* CC1 SPECS */
145:
146: #define CC1_SPEC "%{!O2:%{O:-O -fstrength-reduce -fomit-frame-pointer}}\
147: %{O2:-O -fstrength-reduce -fomit-frame-pointer -mgpOPT}\
148: %{g:%eThis port of GCC does not support -g flag} \
149: %{G32: -mG2 -mnG1 } \
150: %{G32:%{!O2:%eOption -G32 may require -O2}}"
151:
152: /* CPP SPECS */
153:
154: #ifdef DECSTATION
155: /* default DECSTATION environment */
156: #define CPP_SPEC "-DR3000 -DLANGUAGE_C -DMIPSEL -DSYSTYPE_BSD -Dultrix"
157: #else /* not DECSTATION */
158: #if defined(MIPS_SYSV) || defined(MIPS_BSD43)
159: /* MIPS RISC-OS environments */
160:
161: #ifdef MIPS_SYSV
162: #define CPP_SPEC "-DR3000 -Dhost_mips -DMIPSEB \
163: %{!ZBSD43:-DSYSTYPE_SYSV}%{ZBSD43:-DSYSTYPE_BSD43} \
164: -DLANGUAGE_C \
165: %{!ZBSD43:-I/sysv/usr/include} \
166: %{ZBSD43:-I/bsd43/usr/include}"
167: #else /* not MIPS_SYSV */
168: #define CPP_SPEC "-DR3000 -Dhost_mips -DMIPSEB \
169: %{!ZSYSV:-DSYSTYPE_BSD43}%{ZSYSV:-DSYSTYPE_SYSV} \
170: -DLANGUAGE_C \
171: %{!ZYSV:-I/bsd43/usr/include}%{ZBSD43:-I/sysv/usr/include}"
172: #endif /* not MIPS_SYSV */
173:
174: #else /* not MIPS_SYSV and not MIPS_BSD43 */
175: /* default MIPS Bsd environment */
176: #define CPP_SPEC "-DR3000 -Dhost_mips -DMIPSEB -DSYSTYPE_BSD -DLANGUAGE_C "
177:
178: #endif /* not MIPS_SYSV and not MIPS_BSD43 */
179: #endif /* not DECSTATION */
180:
181: /* Print subsidiary information on the compiler version in use. */
182:
183: #ifdef DECSTATION
184: #define TARGET_VERSION printf (" (AL-MIPS 1.11) <Decstation>\n");
185: /* Depends on MIPS ASM. */
186: #else
187: #define TARGET_VERSION printf (" (AL-MIPS 1.11) <MIPS>\n");
188: /* Depends on MIPS ASM. */
189: #endif
190: #define TARGET_VERSNUM "1 11"
191:
192: /* Do not Generate DBX debugging information. */
193:
194: /* #define DBX_DEBUGGING_INFO */
195:
196: /* Run-time compilation parameters selecting different hardware subsets. */
197:
198: extern int target_flags;
199:
200: /* Macros used in the machine description to test the flags. */
201:
202: /* Nonzero if compiling code that Unix assembler can assemble. */
203: #define TARGET_UNIX_ASM (target_flags & 1)
204: /* Debug Mode */
205: #define TARGET_DEBUG_MODE (target_flags & 2)
206: #define TARGET_DEBUGA_MODE (target_flags & 4)
207: #define TARGET_DEBUGB_MODE (target_flags & 16)
208: #define TARGET_DEBUGC_MODE (target_flags & 32)
209: #define TARGET_DEBUGD_MODE (target_flags & 64)
210: /* Register Naming in .s ($21 vs. $a0) */
211: #define TARGET_NAME_REGS (target_flags & 8)
212: /* Use addu / subbu or get FIXED_OVFL TRAPS */
213: #define TARGET_NOFIXED_OVFL (target_flags & 128)
214: /* Optimize for Sdata/Sbss */
215: #define TARGET_GP_OPT (target_flags & 4096)
216: #define TARGET_GVALUE ((target_flags >> 8 ) & 0xf)
217:
218:
219:
220: /* Macro to define tables used to set the flags.
221: This is a list in braces of pairs in braces,
222: each pair being { "NAME", VALUE }
223: where VALUE is the bits to set or minus the bits to clear.
224: An empty string NAME is used to identify the default VALUE. */
225:
226: #define TARGET_SWITCHES \
227: { {"unix", 1}, \
228: {"gnu", -1}, \
229: {"debug", 2 }, /* RELOAD and CONSTRAINTS Related DEBUG */\
230: {"nodebug", -2 }, \
231: {"debuga", 4 }, /* CALLING SEQUENCE RELATED DEBUG */ \
232: {"nodebuga", -4 }, \
233: {"debugb", 16 }, /* GLOBAL/LOCAL ALLOC DEBUG */ \
234: {"nodebugb", -16 }, \
235: {"debugc", 32 }, /* SPILL/RELOAD REGISTER ALLOCATOR DEBUG */\
236: {"nodebugc", -32 }, \
237: {"debugd", 64 }, /* CSE DEBUG */ \
238: {"nodebugd", -64 }, \
239: {"rnames", 8 }, /* Output register names like $a0 */ \
240: {"nornames", -8 }, /* Output register numbers like $21 */ \
241: {"nofixed-ovfl",128}, /* use addu and subu */ \
242: {"fixed-ovfl", -128}, /* use add and sub */ \
243: /* Following used to support the data/sdata */\
244: /* feature */ \
245: {"G0",256}, \
246: {"nG0",-256}, \
247: {"G1",512}, \
248: {"nG1",-512}, \
249: {"G2",1024}, \
250: {"nG2",-1024}, \
251: {"gpOPT", 4096}, /* DO the full GP optimization data/sdata.. */\
252: {"ngpOPT", -4096},\
253: { "", TARGET_DEFAULT}}
254:
255: /* Default target_flags if no switches specified. */
256:
257: #define TARGET_DEFAULT 897
258:
259: /* Default GVALUE (data item size threshold for selection of Sdata/data)
260: is computed : GVALUE == ( ((i=G0+2*G1+4*G2) < 6)
261: ? 1<<i
262: : 1<< (i+6))
263: */
264: #define MIPS_GVALUE_DEFAULT 8
265:
266: #ifdef DECSTATION
267: #define DOLLARS_IN_IDENTIFIERS 1
268: #endif
269: /* Target machine storage layout */
270:
271: /* Define this if most significant bit is lowest numbered
272: in instructions that operate on numbered bit-fields.
273: */
274: /* #define BITS_BIG_ENDIAN */
275:
276: /* Define this if most significant byte of a word is the lowest numbered.
277: */
278: #ifndef DECSTATION
279: #define BYTES_BIG_ENDIAN
280: #endif
281: /* Define this if most significant word of a multiword number is numbered.
282: */
283: #ifndef DECSTATION
284: #define WORDS_BIG_ENDIAN
285: #endif
286: /* Number of bits in an addressible storage unit */
287: #define BITS_PER_UNIT 8
288:
289: /* Width in bits of a "word", which is the contents of a machine register.
290: Note that this is not necessarily the width of data type `int';
291: if using 16-bit ints on a 68000, this would still be 32.
292: But on a machine with 16-bit registers, this would be 16. */
293: #define BITS_PER_WORD 32
294:
295: /* Width of a word, in units (bytes). */
296: #define UNITS_PER_WORD 4
297:
298: /* Width in bits of a pointer.
299: See also the macro `Pmode' defined below. */
300: #define POINTER_SIZE 32
301:
302: /* Allocation boundary (in *bits*) for storing pointers in memory. */
303: #define POINTER_BOUNDARY 32
304:
305: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
306: #define PARM_BOUNDARY 32
307:
308: /* Give parms extra alignment, up to this much, if their types want it. */
309: #define MAX_PARM_BOUNDARY 64
310:
311: /* Allocation boundary (in *bits*) for the code of a function. */
312: #define FUNCTION_BOUNDARY 32
313:
314: /* Alignment of field after `int : 0' in a structure. */
315: #define EMPTY_FIELD_BOUNDARY 32
316:
317: /* Every structure's size must be a multiple of this. */
318: #define STRUCTURE_SIZE_BOUNDARY 16
319:
320: /* There is no point aligning anything to a rounder boundary than this. */
321: #define BIGGEST_ALIGNMENT 64
322:
323: /* Define this if move instructions will actually fail to work
324: when given unaligned data. */
325: #define STRICT_ALIGNMENT
326:
327: /* Standard register usage. */
328:
329: /* Number of actual hardware registers.
330: The hardware registers are assigned numbers for the compiler
331: from 0 to just below FIRST_PSEUDO_REGISTER.
332: All registers that the compiler knows about must be given numbers,
333: even those that are not normally considered general registers. */
334: #define FIRST_PSEUDO_REGISTER 64
335:
336: /* 1 for registers that have pervasive standard uses
337: and are not available for the register allocator.
338:
339: On the MIPS, see conventions, page D-2
340:
341: I have chosen not to take Multiply/Divide HI,LO or PC into
342: account.
343: */
344: #define FIXED_REGISTERS {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\
345: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1,\
346: 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1,\
347: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 \
348: }
349:
350:
351: /* 1 for registers not available across function calls.
352: These must include the FIXED_REGISTERS and also any
353: registers that can be used without being saved.
354: The latter must include the registers where values are returned
355: and the register where structure-value addresses are passed.
356: Aside from that, you can include as many other registers as you like. */
357: #define CALL_USED_REGISTERS {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,\
358: 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1,\
359: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,\
360: 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0\
361: }
362:
363:
364: /* Return number of consecutive hard regs needed starting at reg REGNO
365: to hold something of mode MODE.
366: This is ordinarily the length in words of a value of mode MODE
367: but can be less for certain modes in special long registers.
368:
369: On the MIPS, all general registers are one word long. I have chosen to
370: use Floating point register pairs.
371: */
372: #define HARD_REGNO_NREGS(REGNO, MODE) \
373: (((MODE == SFmode) ||(MODE == DFmode)) ? 2 : \
374: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
375:
376: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
377: On the MIPS, all general registers can hold all modes, except
378: FLOATING POINT. */
379:
380: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
381: ((REGNO) < 32 ? (int) (((MODE) != SFmode) && ((MODE) != DFmode)) \
382: : (int) (((MODE) == SFmode || (MODE) == DFmode) \
383: && ((REGNO) & 1) == 0))
384:
385:
386: /* Value is 1 if it is a good idea to tie two pseudo registers
387: when one has mode MODE1 and one has mode MODE2.
388: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
389: for any hard reg, then this must be 0 for correct output. */
390: #define MODES_TIEABLE_P(MODE1, MODE2) \
391: ( ((MODE1) == SFmode || (MODE1) == DFmode) \
392: == ((MODE2) == SFmode || (MODE2) == DFmode))
393:
394: /* MIPS pc is apparently not overloaded on a register. */
395: /* #define PC_REGNUM 15 */
396:
397: /* Register to use for pushing function arguments. */
398: #define STACK_POINTER_REGNUM 29
399:
400: /* Base register for access to local variables of the function. */
401: #define FRAME_POINTER_REGNUM 30
402:
403: /* Value should be nonzero if functions must have frame pointers.
404: Zero means the frame pointer need not be set up (and parms
405: may be accessed via the stack pointer) in functions that seem suitable.
406: This is computed in `reload', in reload1.c. */
407:
408: /* This is now 1 because we don't know until too late
409: whether the function is a varargs function.
410: Such functions currently require extra stack slots on the mips. */
411: #define FRAME_POINTER_REQUIRED 1
412:
413: /* Base register for access to arguments of the function. */
414: #define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM
415:
416: /* Register in which static-chain is passed to a function. */
417: #define STATIC_CHAIN_REGNUM 2
418:
419: /* Register in which address to store a structure value
420: is passed to a function. */
421: #define STRUCT_VALUE_REGNUM 3
422:
423: /* Define the classes of registers for register constraints in the
424: machine description. Also define ranges of constants.
425:
426: One of the classes must always be named ALL_REGS and include all hard regs.
427: If there is more than one class, another class must be named NO_REGS
428: and contain no registers.
429:
430: The name GENERAL_REGS must be the name of a class (or an alias for
431: another name such as ALL_REGS). This is the class of registers
432: that is allowed by "g" or "r" in a register constraint.
433: Also, registers outside this class are allocated only when
434: instructions express preferences for them.
435:
436: The classes must be numbered in nondecreasing order; that is,
437: a larger-numbered class must never be contained completely
438: in a smaller-numbered class.
439:
440: For any two classes, it is very desirable that there be another
441: class that represents their union. */
442:
443: /* The MIPS has general and floating point registers,
444: */
445:
446:
447: enum reg_class { NO_REGS, GR_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES } ;
448:
449: #define N_REG_CLASSES (int) LIM_REG_CLASSES
450:
451: #define GENERAL_REGS GR_REGS
452:
453: /* Give names of register classes as strings for dump file. */
454:
455: #define REG_CLASS_NAMES \
456: {"NO_REGS", "GR_REGS", "FP_REGS", "ALL_REGS" }
457:
458: /* Define which registers fit in which classes.
459: This is an initializer for a vector of HARD_REG_SET
460: of length N_REG_CLASSES. */
461:
462: #define REG_CLASS_CONTENTS {{0x00000000, 0x00000000}, \
463: {0xffffffff, 0x00000000}, \
464: {0x00000000, 0xffffffff}, \
465: {0xffffffff, 0xffffffff}}
466:
467:
468: /* The same information, inverted:
469: Return the class number of the smallest class containing
470: reg number REGNO. This could be a conditional expression
471: or could index an array. */
472:
473: #define REGNO_REG_CLASS(REGNO) \
474: ( (REGNO >= 32) ? FP_REGS : GR_REGS)
475:
476: /* Define a table that lets us find quickly all the reg classes
477: containing a given one. This is the initializer for an
478: N_REG_CLASSES x N_REG_CLASSES array of reg class codes.
479: Row N is a sequence containing all the class codes for
480: classes that contain all the regs in class N. Each row
481: contains no duplicates, and is terminated by LIM_REG_CLASSES. */
482:
483: /* We give just a dummy for the first element, which is for NO_REGS. */
484: /* #define REG_CLASS_SUPERCLASSES {{LIM_REG_CLASSES}, \
485: {GR_REGS,ALL_REGS,LIM_REG_CLASSES}, \
486: {FP_REGS,ALL_REGS,LIM_REG_CLASSES}, \
487: {ALL_REGS,LIM_REG_CLASSES} \
488: }
489: */
490: /* We give just a dummy for the first element, which is for NO_REGS. */
491: #define REG_CLASS_SUPERCLASSES {{LIM_REG_CLASSES}, \
492: {ALL_REGS,LIM_REG_CLASSES}, \
493: {ALL_REGS,LIM_REG_CLASSES}, \
494: {LIM_REG_CLASSES} \
495: }
496:
497: /* The inverse relationship:
498: for each class, a list of all reg classes contained in it. */
499: #define REG_CLASS_SUBCLASSES \
500: {{LIM_REG_CLASSES}, \
501: {GR_REGS,LIM_REG_CLASSES}, \
502: {FP_REGS,LIM_REG_CLASSES},\
503: {GR_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES}\
504: }
505:
506: /* Define a table that lets us find quickly the class
507: for the subunion of any two classes.
508:
509: We say "subunion" because the result need not be exactly
510: the union; it may instead be a subclass of the union
511: (though the closer to the union, the better).
512: But if it contains anything beyond union of the two classes,
513: you will lose!
514:
515: This is an initializer for an N_REG_CLASSES x N_REG_CLASSES
516: array of reg class codes. The subunion of classes C1 and C2
517: is just element [C1, C2]. */
518:
519: #define REG_CLASS_SUBUNION {{NO_REGS, GR_REGS, FP_REGS, ALL_REGS}, \
520: {GR_REGS, GR_REGS, ALL_REGS, ALL_REGS}, \
521: {FP_REGS, ALL_REGS, FP_REGS, ALL_REGS}, \
522: {ALL_REGS, ALL_REGS, ALL_REGS, ALL_REGS}}
523:
524: /* The class value for index registers, and the one for base regs. */
525:
526: #define INDEX_REG_CLASS GR_REGS
527: #define BASE_REG_CLASS GR_REGS
528:
529:
530: /* REGISTER AND CONSTANT CLASSES
531: */
532:
533: /* Get reg_class from a letter such as appears in the machine
534: description. */
535: /* DEFINED REGISTER CLASSES:
536: **
537: ** 'f' : Floating point registers
538: ** 'y' : General register when used to
539: ** transfer chunks of Floating point
540: ** with mfc1 mtc1 insn
541: */
542:
543: #define REG_CLASS_FROM_LETTER(C) \
544: ((C) == 'f' ? FP_REGS: \
545: (C) == 'y' ? GR_REGS:NO_REGS)
546:
547: /* The letters I, J, K, L and M in a register constraint string
548: can be used to stand for particular ranges of immediate operands.
549: This macro defines what the ranges are.
550: C is the letter, and VALUE is a constant value.
551: Return 1 if VALUE is in the range specified by C. */
552:
553: /* For MIPS, `I' is used for the range of constants an insn
554: can actually contain (16 bits signed integers).
555: `J' is used for the range which is just zero (since that is
556: available as $R0).
557: */
558:
559: #define SMALL_INT(X) ((unsigned) (INTVAL (X) + 0x10000) < 0x20000)
560:
561: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
562: ((C) == 'I' ? (unsigned) ((VALUE) + 0x10000) < 0x20000 \
563: : (C) == 'J' ? (VALUE) == 0 \
564: : 0)
565:
566: /* Similar, but for floating constants, and defining letters G and H.
567: Here VALUE is the CONST_DOUBLE rtx itself. */
568:
569: /* DEFINED FLOATING CONSTANT CLASSES:
570: **
571: ** 'G' : Floating point 0
572: */
573: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
574: ((C) == 'G' && XINT (VALUE, 0) == 0 && XINT (VALUE, 1) == 0)
575:
576: /* Given an rtx X being reloaded into a reg required to be
577: in class CLASS, return the class of reg to actually use.
578: In general this is just CLASS; but on some machines
579: in some cases it is preferable to use a more restrictive class. */
580:
581: #define PREFERRED_RELOAD_CLASS(X,CLASS) \
582: (((GET_MODE(X) == SFmode) || (GET_MODE(X) == DFmode))? FP_REGS : \
583: ((GET_MODE(X) == VOIDmode) ? GR_REGS :(CLASS)))
584:
585: /* Same but Mode has been extracted already
586: */
587:
588: #define PREFERRED_RELOAD_CLASS_FM(X,CLASS) \
589: ((((X) == SFmode) || ((X) == DFmode))? FP_REGS : \
590: (((X) == VOIDmode) ? GR_REGS :(CLASS)))
591:
592: /* Return the maximum number of consecutive registers
593: needed to represent mode MODE in a register of class CLASS. */
594:
595: #define CLASS_MAX_NREGS(CLASS, MODE) \
596: ((((MODE) == DFmode) || ((MODE) == SFmode)) ? 2 \
597: : ((MODE) == VOIDmode)? ((CLASS) == FP_REGS ? 2 :1) \
598: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
599:
600:
601: /* Stack layout; function entry, exit and calling. */
602:
603: /* Define this if pushing a word on the stack
604: makes the stack pointer a smaller address. */
605: #define STACK_GROWS_DOWNWARD
606:
607: /* Define this if the nominal address of the stack frame
608: is at the high-address end of the local variables;
609: that is, each additional local variable allocated
610: goes at a more negative offset in the frame. */
611: #define FRAME_GROWS_DOWNWARD
612:
613: /* Offset within stack frame to start allocating local variables at.
614: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
615: first local allocated. Otherwise, it is the offset to the BEGINNING
616: of the first local allocated. */
617: #define STARTING_FRAME_OFFSET -8
618:
619: /* If we generate an insn to push BYTES bytes,
620: this says how many the stack pointer really advances by.
621: On the vax, sp@- in a byte insn really pushes a word. */
622:
623: /* #define PUSH_ROUNDING(BYTES) 0 */
624:
625:
626: /* Offset of first parameter from the argument pointer register value. */
627: #define FIRST_PARM_OFFSET(FNDECL) 0
628:
629: /* Offset from top-of-stack address to location to store the
630: function parameter if it can't go in a register.
631: Addresses for following parameters are computed relative to this one. */
632: #define FIRST_PARM_CALLER_OFFSET(FNDECL) 0
633:
634: /* When a parameter is passed in a register, stack space is still
635: allocated for it. */
636: /* For the MIPS, stack space must be allocated, cf Asm Lang Prog Guide
637: page 7-8
638:
639: BEWARE that some space is also allocated for non existing arguments
640: in register. In case an argument list is of form
641: GF used registers are a0 (a2,a3), but we should push over a1... not
642: used..
643: */
644: #define REG_PARM_STACK_SPACE
645: /* Align stack frames on 64 bits (Double Word )
646: */
647:
648: #define STACK_BOUNDARY 64
649:
650: /* For the MIPS, there seems to be a minimum to the amount of stack space
651: used... for varargs using functions.
652: evidence comes from the dis-assembled version of printf:
653:
654: cc (cc)
655: Mips Computer Systems 1.31
656: /usr/lib/cpp1.31
657:
658:
659: printf:
660: [printf.c: 14] 0x400510: 27bdffe8 addiu sp,sp,-24
661: [printf.c: 14] 0x400514: afbf0014 sw ra,20(sp)
662: [printf.c: 14] 0x400518: afa5001c sw a1,28(sp)
663: [printf.c: 14] 0x40051c: afa60020 sw a2,32(sp)
664: [printf.c: 14] 0x400520: afa70024 sw a3,36(sp)
665: [printf.c: 18] 0x400524: 27a5001c addiu a1,sp,28
666:
667: it is however OK for functions that do not take arguments to have 0 size
668: frames.
669:
670: */
671:
672: #define STACK_ARGS_ADJUST(SIZE) \
673: { \
674: SIZE.constant += 4; \
675: if (SIZE.var) \
676: { \
677: rtx size1 = ARGS_SIZE_RTX (SIZE); \
678: rtx rounded = gen_reg_rtx (SImode); \
679: rtx label = gen_label_rtx (); \
680: emit_move_insn (rounded, size1); \
681: /* Needed: insns to jump to LABEL if ROUNDED is < 16. */ \
682: abort (); \
683: emit_move_insn (rounded, gen_rtx (CONST_INT, VOIDmode, 16)); \
684: emit_label (label); \
685: SIZE.constant = 0; \
686: SIZE.var = (tree) rounded; \
687: } \
688: else if (SIZE.constant < 16) \
689: SIZE.constant = 16; \
690: }
691:
692: /* Value is 1 if returning from a function call automatically
693: pops the arguments described by the number-of-args field in the call.
694: FUNTYPE is the data type of the function (as a tree),
695: or for a library call it is an identifier node for the subroutine name. */
696:
697: #define RETURN_POPS_ARGS(FUNTYPE) 0
698:
699:
700: /* Define how to find the value returned by a function.
701: VALTYPE is the data type of the value (as a tree).
702: If the precise function being called is known, FUNC is its FUNCTION_DECL;
703: otherwise, FUNC is 0. */
704:
705: #define FUNCTION_VALUE(VALTYPE, FUNC) \
706: gen_rtx (REG, TYPE_MODE (VALTYPE), \
707: (TYPE_MODE (VALTYPE) == SFmode) ||(TYPE_MODE (VALTYPE) == DFmode)?32 : 2)
708:
709: /* Define how to find the value returned by a library function
710: assuming the value has mode MODE. */
711:
712:
713: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, \
714: ((MODE) == DFmode || ( MODE) == SFmode) ? 32 : 2)
715:
716: /* 1 if N is a possible register number for a function value.
717: On the MIPS, R2 R3 and F0 F2 are the only register thus used. */
718: /* Currently, R2 and F0 are only implemented here ( C has no complex type)
719: */
720:
721: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 32)
722:
723: /* 1 if N is a possible register number for function argument passing.
724: */
725:
726: #define FUNCTION_ARG_REGNO_P(N) (((N) < 8 && (N) > 3) \
727: ||((N) < 48 && (N) > 44 && (0 == (N) % 2)))
728:
729: /* Define a data type for recording info about an argument list
730: during the scan of that argument list. This data type should
731: hold all necessary information about the function itself
732: and about the args processed so far, enough to enable macros
733: such as FUNCTION_ARG to determine where the next arg should go.
734: */
735: /* On MIPS the following automaton decides */
736: /* where to put things. */
737: /* If you dont believe it, look at Gerry Kane*/
738: /* 's book page D-22 */
739:
740: #define CUMULATIVE_ARGS struct { enum arg_state arg_rec_state;int restype,arg_num;}
741:
742: enum arg_state { ARG_STA_INIT =0,
743: ARG_STA_F =1, /* $f12 */
744: ARG_STA_FF =2, /* $f12 $f14 */
745: ARG_STA_FG =3, /* $f12 $6 */
746: ARG_STA_FGG =4, /* $f12 $6 $7 */
747: ARG_STA_FGF =5, /* $f12 $6 STACK */
748: ARG_STA_G =6, /* $4 */
749: ARG_STA_GF =7, /* $4 ($6,$7) */
750: ARG_STA_GG =8, /* $4 $5 */
751: ARG_STA_GGF =9, /* $4 $5 ($6,$7) */
752: ARG_STA_GGG =10,/* $4 $5 $6 */
753: ARG_STA_GGGF =11,/* $4 $5 $6 STACK */
754: ARG_STA_GGGG =12 /* $4 $5 $6 $7 */
755: };
756: #define ARG_STA_AUTOMA \
757: { \
758: {ARG_STA_F,ARG_STA_G,44,4 }, /* ARG_STA_INIT */ \
759: {ARG_STA_FF,ARG_STA_FG,46,6 }, /* ARG_STA_F */ \
760: {ARG_STA_FF,ARG_STA_FF,-1,-1 }, /* ARG_STA_FF */ \
761: {ARG_STA_FGF,ARG_STA_FGG,-1,7 }, /* ARG_STA_FG */ \
762: {ARG_STA_FGG,ARG_STA_FGG,-1,-1 }, /* ARG_STA_FGG */ \
763: {ARG_STA_FGF,ARG_STA_FGF,-1,-1 }, /* ARG_STA_FGF */ \
764: {ARG_STA_GF,ARG_STA_GG,-2,5 }, /* ARG_STA_G */ \
765: {ARG_STA_GF,ARG_STA_GF,-1,-1 }, /* ARG_STA_GF */ \
766: {ARG_STA_GGF,ARG_STA_GGG,-2,6 }, /* ARG_STA_GG */ \
767: {ARG_STA_GGF,ARG_STA_GGF,-1,-1 }, /* ARG_STA_GGF */ \
768: {ARG_STA_GGGF,ARG_STA_GGGG,-1,7 }, /* ARG_STA_GGG */ \
769: {ARG_STA_GGGF,ARG_STA_GGGF,-1,-1 }, /* ARG_STA_GGGF */ \
770: {ARG_STA_GGGG,ARG_STA_GGGG,-1,-1 } /* ARG_STA_GGGG */ \
771: }
772:
773: /* Initialize a variable CUM of type CUMULATIVE_ARGS
774: for a call to a function whose data type is FNTYPE.
775: For a library call, FNTYPE is 0.
776:
777: */
778:
779: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE) ((CUM.arg_rec_state) = ARG_STA_INIT,\
780: (CUM.arg_num) = 0, (CUM.restype = (int)VOIDmode))
781:
782: /* Update the data in CUM to advance over an argument
783: of mode MODE and data type TYPE.
784: (TYPE is null for libcalls where that information may not be available.) */
785:
786: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
787: ( function_arg_advance(&CUM,MODE,TYPE));
788:
789: extern enum arg_state function_arg_advance();
790:
791: /* Determine where to put an argument to a function.
792: Value is zero to push the argument on the stack,
793: or a hard register in which to store the argument.
794:
795: MODE is the argument's machine mode.
796: TYPE is the data type of the argument (as a tree).
797: This is null for libcalls where that information may
798: not be available.
799: CUM is a variable of type CUMULATIVE_ARGS which gives info about
800: the preceding args and about the function being called.
801: NAMED is nonzero if this argument is a named parameter
802: (otherwise it is an extra parameter matching an ellipsis). */
803:
804:
805:
806: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
807: ( (rtx) function_arg(&CUM,MODE,TYPE,NAMED))
808:
809: /* For an arg passed partly in registers and partly in memory,
810: this is the number of registers used.
811: For args passed entirely in registers or entirely in memory, zero.
812: */
813:
814: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) (0)
815:
816:
817: /* This macro generates the assembly code for function entry.
818: FILE is a stdio stream to output the code to.
819: SIZE is an int: how many units of temporary storage to allocate.
820: Refer to the array `regs_ever_live' to determine which registers
821: to save; `regs_ever_live[I]' is nonzero if register number I
822: is ever used in the function. This macro is responsible for
823: knowing which registers should not be saved even if used. */
824:
825:
826: /* ALIGN FRAMES on double word boundaries */
827:
828: #define AL_ADJUST_ALIGN(LOC) (((LOC)+7) & 0xfffffff8)
829:
830:
831: /* The problem of Varargs comes from the register passing conventions
832: for Floating Point data. There is a conflict when we send registers
833: back to stack between registers $4,$5 $6,$7 and $f12, $f14.
834:
835: The current implementation:
836: a/ tries to figure out if the current routines uses varargs.(It becomes
837: ``suspect''.) This is currently done by looking for a special
838: static character string constant.
839:
840: b/when a function is suspected of using varags, a larger reg
841: save_area is allocated which will hold regs f12 and f14. The varargs
842: macros then have to find where is the argument they are looking for.
843: This is made easier by a modification in stack frame layout for
844: these functions:the stack frame-size is accessible on stack at
845: location 4($30).
846:
847: Total overhead in PROLOGUE: 2 inns to put stacksize on stack
848: 2 sw.d to save floating registers.
849: (Only when Varargs suspected)
850:
851: The only problem with ``thinking'', is that when functions are
852: thought using varargs and dont do it, they get the above entry
853: overhead.However the current method is quite precise, and is *safe*.
854:
855:
856: See va-mips.h for more information on varargs
857:
858: */
859: extern int varargs_suspect;
860: extern int this_varargs_suspect ;
861:
862: #define VARARGS_SUSPECT(COND) varargs_suspect |= (COND)
863: #define VARARGS_NOTSUSPECT varargs_suspect = 0
864: #define VARARGS_SUSPECTED (varargs_suspect)
865:
866: #define THIS_VARARGS_SUSPECT(COND) this_varargs_suspect |= (COND)
867: #define THIS_VARARGS_NOTSUSPECT this_varargs_suspect = 0
868: #define THIS_VARARGS_SUSPECTED (this_varargs_suspect)
869:
870:
871: #define FUNCTION_PROLOGUE(FILE, SIZE) \
872: { register int regno; \
873: register int mask = 0, fmask=0; \
874: static char dont_save_regs[] = CALL_USED_REGISTERS; \
875: register int push_loc = 0,tsize = SIZE+8; \
876: char *fp_str; \
877: extern char *reg_numchar[]; \
878: extern int current_function_total_framesize; \
879: this_varargs_suspect = VARARGS_SUSPECTED ; \
880: fp_str = TARGET_NAME_REGS ? reg_names[STACK_POINTER_REGNUM] \
881: : reg_numchar[STACK_POINTER_REGNUM]; \
882: for (regno = 0; regno < 32; regno++) \
883: if ( MUST_SAVE_REG_LOGUES \
884: || (regs_ever_live[regno] && !dont_save_regs[regno])) \
885: {tsize += 4; mask |= 1 << regno;} \
886: for (regno = 32; regno < FIRST_PSEUDO_REGISTER; regno += 2) \
887: if (regs_ever_live[regno] && !dont_save_regs[regno]) \
888: {tsize += 8; fmask |= 1 << (regno-32);} \
889: if (THIS_VARARGS_SUSPECTED) tsize += 16; \
890: fprintf (FILE," #PROLOGUE\n"); \
891: regno = STACK_POINTER_REGNUM; \
892: tsize = AL_ADJUST_ALIGN (tsize); \
893: \
894: if (!frame_pointer_needed) \
895: fprintf (FILE,"#define __0__gcc %d\n", \
896: (!( regs_ever_live[29] || regs_ever_live[30] \
897: || fmask || mask \
898: || (SIZE > 0))) \
899: ? 0:tsize); \
900: \
901: push_loc = 0; current_function_total_framesize = tsize; \
902: fprintf (FILE, " #\t.mask\t0x%x\n", mask); \
903: if (frame_pointer_needed || regs_ever_live[29] || regs_ever_live[30] \
904: || fmask || mask \
905: || (SIZE > 0)) \
906: fprintf (FILE,"\tsubu\t%s,%d\t#temp=%5d,saveregs=%5d, sfo=%5d\n", \
907: TARGET_NAME_REGS ? reg_names[29] \
908: :reg_numchar[29],tsize,SIZE,tsize-SIZE, \
909: STARTING_FRAME_OFFSET); \
910: else fprintf (FILE," #NO STACK PUSH:\tSP %sused, FP %sused, FP %sneeded\n",\
911: regs_ever_live[29]? "":"un", \
912: regs_ever_live[30]? "":"un", \
913: frame_pointer_needed ?"" : "not "); \
914: for (regno = 31; regno >= 30; regno--) \
915: { \
916: if (MUST_SAVE_REG_LOGUES \
917: || (regs_ever_live[regno] && !dont_save_regs[regno])) \
918: { \
919: fprintf (FILE, "\tsw\t%s,%d(%s)\n", \
920: TARGET_NAME_REGS ? reg_names[regno] : reg_numchar[regno], \
921: push_loc, fp_str); \
922: push_loc += 4; \
923: } \
924: } \
925: if (THIS_VARARGS_SUSPECTED) \
926: { int fregno; \
927: fprintf (FILE, "\taddi\t%s,$0,%d\t#Varargs suspicion\n", \
928: TARGET_NAME_REGS ? reg_names[9] : reg_numchar[9], \
929: tsize); \
930: fprintf (FILE, "\tsw\t%s,%d(%s)\t#Varargs suspicion\n", \
931: TARGET_NAME_REGS ? reg_names[9] : reg_numchar[9], \
932: tsize - 4, \
933: TARGET_NAME_REGS ? reg_names[29] : reg_numchar[29]); \
934: for (fregno = 44; fregno< 48; fregno += 2) \
935: { \
936: fprintf (FILE, "\ts.d\t%s,%d(%s)\t#Varargs Suspicion\n", \
937: ((TARGET_NAME_REGS) \
938: ? reg_names[fregno] : reg_numchar[fregno]), \
939: push_loc, fp_str); \
940: push_loc += 8; \
941: } \
942: } \
943: for (regno = 29; regno >= 0; regno--) \
944: { \
945: if (MUST_SAVE_REG_LOGUES \
946: || (regs_ever_live[regno] && !dont_save_regs[regno])) \
947: { \
948: fprintf (FILE, "\tsw\t%s,%d(%s)\n", \
949: TARGET_NAME_REGS ? reg_names[regno] : reg_numchar[regno], \
950: push_loc, fp_str); \
951: push_loc += 4; \
952: } \
953: } \
954: fprintf (FILE, " #\t.fmask\t0x%x\n", fmask); \
955: for (regno = 32; regno < FIRST_PSEUDO_REGISTER; regno += 2) \
956: if (regs_ever_live[regno] && !dont_save_regs[regno]) \
957: { \
958: fprintf (FILE, "\ts.d\t%s,%d(%s)\n", \
959: (TARGET_NAME_REGS) ? reg_names[regno] : reg_numchar[regno], \
960: push_loc, fp_str); \
961: push_loc += 8; \
962: } \
963: if (frame_pointer_needed) \
964: fprintf (FILE, "\taddiu\t%s,%s,%d\t#Establish FramePTR\n", \
965: (TARGET_NAME_REGS ? reg_names[FRAME_POINTER_REGNUM] \
966: : reg_numchar[FRAME_POINTER_REGNUM]), \
967: (TARGET_NAME_REGS ? reg_names[29] : reg_numchar[29]), \
968: tsize); \
969: fprintf (FILE," #END PROLOGUE\n"); \
970: }
971:
972: /* Output assembler code to FILE to increment profiler label # LABELNO
973: for profiling a function entry. */
974:
975: #define FUNCTION_PROFILER(FILE, LABELNO) \
976: fprintf (FILE, "ERROR\t profiler LP%d,r0\n", (LABELNO));
977:
978: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
979: the stack pointer does not matter. The value is tested only in
980: functions that have frame pointers.
981: No definition is equivalent to always zero. */
982:
983: extern int may_call_alloca;
984: extern int current_function_pretend_args_size;
985:
986: #define EXIT_IGNORE_STACK 0
987:
988:
989: /* This declaration is needed due to traditional/ANSI
990: incompatibilities which cannot be #ifdefed away
991: because they occur inside of macros. Sigh. */
992:
993:
994: extern union tree_node *current_function_decl;
995: extern char *current_function_name;
996:
997: /* Tell prologue and epilogue if Register containing return
998: address should be saved / restored
999: */
1000:
1001: #define MUST_SAVE_REG_LOGUES (( frame_pointer_needed && (regno == 30)) \
1002: ||( (regno == 31) && regs_ever_live[31]) \
1003: )
1004:
1005:
1006: /* This macro generates the assembly code for function exit,
1007: on machines that need it. If FUNCTION_EPILOGUE is not defined
1008: then individual return instructions are generated for each
1009: return statement. Args are same as for FUNCTION_PROLOGUE. */
1010:
1011:
1012: #define FUNCTION_EPILOGUE(FILE, SIZE) \
1013: { register int regno; \
1014: register int mask = 0; \
1015: register int fmask = 0; \
1016: char *fp_str; \
1017: char *sp_str; \
1018: static char dont_save_regs[] = CALL_USED_REGISTERS; \
1019: register int push_loc ; \
1020: extern char *reg_numchar[]; \
1021: extern char *current_function_name; \
1022: extern int current_function_total_framesize; \
1023: push_loc = 0; \
1024: regno = STACK_POINTER_REGNUM; \
1025: sp_str = TARGET_NAME_REGS ? reg_names[STACK_POINTER_REGNUM] \
1026: : reg_numchar[STACK_POINTER_REGNUM]; \
1027: fp_str = TARGET_NAME_REGS ? reg_names[8] \
1028: :reg_numchar[8]; \
1029: fprintf (FILE," #EPILOGUE\n"); \
1030: if (!frame_pointer_needed) \
1031: fprintf (FILE,"#undef __0__gcc\n"); \
1032: else \
1033: fprintf (FILE,"\taddu\t%s,$0,%s\t# sp not trusted here \n", \
1034: fp_str, \
1035: TARGET_NAME_REGS ? reg_names[FRAME_POINTER_REGNUM] \
1036: :reg_numchar[FRAME_POINTER_REGNUM] \
1037: ); \
1038: for (regno = 0; regno < 32; regno++) \
1039: if ( MUST_SAVE_REG_LOGUES \
1040: || (regs_ever_live[regno] && !dont_save_regs[regno])) \
1041: mask |= 1 << regno; \
1042: fprintf (FILE, " #\t.mask\t0x%x\n", mask); \
1043: for (regno = 31; regno >= 0; regno--) \
1044: { if ( MUST_SAVE_REG_LOGUES \
1045: || (regs_ever_live[regno] && !dont_save_regs[regno])) \
1046: { \
1047: fprintf (FILE,"\tlw\t%s,%d(%s)\n", \
1048: TARGET_NAME_REGS ? reg_names[regno] \
1049: : reg_numchar[regno], \
1050: (frame_pointer_needed ? \
1051: push_loc - current_function_total_framesize: \
1052: push_loc), \
1053: (frame_pointer_needed ? fp_str :sp_str)); \
1054: push_loc += 4; \
1055: } \
1056: if ( THIS_VARARGS_SUSPECTED && (regno == 30)) push_loc += 16; \
1057: } \
1058: for (regno = 32; regno < FIRST_PSEUDO_REGISTER; regno += 2) \
1059: if (regs_ever_live[regno] && !dont_save_regs[regno]) \
1060: fmask |= 1 << (regno-32); \
1061: fprintf (FILE, " #\t.fmask\t0x%x\n", fmask); \
1062: for (regno = 32; regno < FIRST_PSEUDO_REGISTER; regno += 2) \
1063: { \
1064: if (regs_ever_live[regno] && !dont_save_regs[regno]) \
1065: { \
1066: fprintf (FILE,"\tl.d\t%s,%d(%s)\n", \
1067: ( ( TARGET_NAME_REGS) ? reg_names[regno] \
1068: : reg_numchar[regno]), \
1069: (frame_pointer_needed ? \
1070: push_loc - current_function_total_framesize \
1071: : push_loc), \
1072: (frame_pointer_needed ? fp_str :sp_str)); \
1073: push_loc += 8; \
1074: } \
1075: } \
1076: if (frame_pointer_needed) \
1077: fprintf (FILE,"\taddu\t%s,$0,%s\t# sp not trusted here \n", \
1078: TARGET_NAME_REGS ? reg_names[STACK_POINTER_REGNUM] \
1079: :reg_numchar[STACK_POINTER_REGNUM], \
1080: TARGET_NAME_REGS ? reg_names[8] \
1081: :reg_numchar[8] \
1082: ); \
1083: else \
1084: if (regs_ever_live[29]|| regs_ever_live[30] \
1085: || fmask || mask \
1086: || (SIZE > 0)) \
1087: fprintf (FILE,"\taddu\t%s,%d\t\n",TARGET_NAME_REGS ? reg_names[29]\
1088: :reg_numchar[29],current_function_total_framesize); \
1089: fprintf (FILE,"\tj\t$31\n"); \
1090: fprintf (FILE," #END EPILOGUE\n"); \
1091: fprintf (FILE," \t.end\t%s\n",current_function_name); \
1092: THIS_VARARGS_NOTSUSPECT; VARARGS_NOTSUSPECT;}
1093:
1094: /* If the memory Address ADDR is relative to the frame pointer,
1095: correct it to be relative to the stack pointer. This is for
1096: when we don't use a frame pointer.
1097: ADDR should be a variable name. */
1098:
1099: #define FIX_FRAME_POINTER_ADDRESS(ADDR,DEPTH) \
1100: { rtx newaddr; \
1101: int frame_offset = -1; \
1102: /* fprintf(stderr,"FIX_FRAME depth=%d\n",DEPTH); */ \
1103: if(ADDR == frame_pointer_rtx) \
1104: frame_offset = 0; \
1105: else \
1106: if (GET_CODE(ADDR) == PLUS) \
1107: if(XEXP(ADDR,0) == frame_pointer_rtx) \
1108: if(GET_CODE(XEXP(ADDR,1)) == CONST_INT) \
1109: frame_offset = INTVAL(XEXP(ADDR,1)); \
1110: else abort_with_insn(ADDR,"Unable to FIX"); \
1111: else if (XEXP(ADDR,1) == frame_pointer_rtx) \
1112: if(GET_CODE(XEXP(ADDR,0)) == CONST_INT) \
1113: frame_offset = INTVAL(XEXP(ADDR,0)); \
1114: else abort_with_insn(ADDR,"Unable to FIX"); \
1115: else; \
1116: if (frame_offset >= 0) \
1117: { newaddr=gen_rtx(PLUS,Pmode,stack_pointer_rtx, \
1118: gen_rtx(PLUS,Pmode, \
1119: gen_rtx(CONST_INT,VOIDmode,frame_offset+(DEPTH)),\
1120: gen_rtx(SYMBOL_REF,SImode,"__0__gcc"))); \
1121: ADDR = newaddr; \
1122: } \
1123: }
1124:
1125:
1126:
1127: /* Addressing modes, and classification of registers for them. */
1128:
1129: /* #define HAVE_POST_INCREMENT */
1130: /* #define HAVE_POST_DECREMENT */
1131:
1132: /* #define HAVE_PRE_DECREMENT */
1133: /* #define HAVE_PRE_INCREMENT */
1134:
1135: /* These assume that REGNO is a hard or pseudo reg number.
1136: They give nonzero only if REGNO is a hard reg of the suitable class
1137: or a pseudo reg currently allocated to a suitable hard reg.
1138: These definitions are NOT overridden anywhere. */
1139:
1140: #define REGNO_OK_FOR_INDEX_P(regno) \
1141: ((regno) < FIRST_PSEUDO_REGISTER || reg_renumber[regno] >= 0)
1142: #define REGNO_OK_FOR_BASE_P(regno) \
1143: ((regno) < FIRST_PSEUDO_REGISTER || reg_renumber[regno] >= 0)
1144: #define REGNO_OK_FOR_FP_P(REGNO) \
1145: (((REGNO) ^ 0x20) < 32 || (unsigned) (reg_renumber[REGNO] ^ 0x20) < 32)
1146:
1147: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1148: and check its validity for a certain class.
1149: We have two alternate definitions for each of them.
1150: The usual definition accepts all pseudo regs; the other rejects them all.
1151: The symbol REG_OK_STRICT causes the latter definition to be used.
1152:
1153: Most source files want to accept pseudo regs in the hope that
1154: they will get allocated to the class that the insn wants them to be in.
1155: Some source files that are used after register allocation
1156: need to be strict. */
1157:
1158: #ifndef REG_OK_STRICT
1159:
1160: /* Nonzero if X is a hard reg that can be used as an index or if
1161: it is a pseudo reg. */
1162: #define REG_OK_FOR_INDEX_P(X) 1
1163: /* Nonzero if X is a hard reg that can be used as a base reg
1164: of if it is a pseudo reg. */
1165: #define REG_OK_FOR_BASE_P(X) 1
1166:
1167: #else
1168:
1169: /* Nonzero if X is a hard reg that can be used as an index. */
1170: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1171: /* Nonzero if X is a hard reg that can be used as a base reg. */
1172: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1173:
1174: #endif
1175:
1176: #define REG_OK_FOR_CLASS_P(X, C) 0
1177:
1178: #define REGNO_OK_FOR_CLASS_P(X, C) 0
1179:
1180: #define ADDRESS_REG_P(X) \
1181: (GET_CODE (X) == REG )
1182:
1183: /* 1 if X is an fp register. */
1184:
1185: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1186:
1187: /* Maximum number of registers that can appear in a valid memory address. */
1188:
1189: #define MAX_REGS_PER_ADDRESS 1
1190:
1191: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1192: that is a valid memory address for an instruction.
1193: The MODE argument is the machine mode for the MEM expression
1194: that wants to use this address.
1195:
1196: The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
1197: except for CONSTANT_ADDRESS_P which is actually machine-independent. */
1198:
1199: /* 1 if X is an address that we could indirect through. */
1200: #define INDIRECTABLE_ADDRESS_P(X) \
1201: (CONSTANT_ADDRESS_P (X) \
1202: || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1203: || (GET_CODE (X) == PLUS \
1204: && GET_CODE (XEXP (X, 0)) == REG \
1205: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1206: && CONSTANT_ADDRESS_P (XEXP (X, 1))))
1207:
1208:
1209:
1210: /* 1 if X is an address which is (+ (reg) (+ (const_int) (symbol_ref) )) */
1211: #define FIXED_FRAME_PTR_REL_P(X) \
1212: ( (GET_CODE(X) == PLUS) \
1213: && (GET_CODE(XEXP((X),0)) == REG) \
1214: && (GET_CODE(XEXP((X),1)) == PLUS) \
1215: && (GET_CODE(XEXP(XEXP((X),1),0)) == CONST_INT) \
1216: && (GET_CODE(XEXP(XEXP((X),1),1)) == SYMBOL_REF))
1217:
1218: /* Go to ADDR if X is a valid address not using indexing.
1219: (This much is the easy part.) */
1220: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1221: { register rtx xfoob = (X); \
1222: if (GET_CODE (xfoob) == REG) goto ADDR; \
1223: if (INDIRECTABLE_ADDRESS_P (xfoob)) goto ADDR; \
1224: if (FIXED_FRAME_PTR_REL_P (xfoob)) goto ADDR; \
1225: }
1226:
1227:
1228:
1229:
1230: #define CONSTANT_ADDRESS_P(X) \
1231: (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1232: || GET_CODE (X) == CONST_INT \
1233: || GET_CODE (X) == CONST)
1234:
1235: /* Nonzero if the constant value X is a legitimate general operand.
1236: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
1237:
1238: Anything but a CONST_DOUBLE can be made to work. */
1239:
1240: #define LEGITIMATE_CONSTANT_P(X) \
1241: (GET_CODE (X) != CONST_DOUBLE)
1242:
1243: /* Try machine-dependent ways of modifying an illegitimate address
1244: to be legitimate. If we find one, return the new, valid address.
1245: This macro is used in only one place: `memory_address' in explow.c.
1246:
1247: OLDX is the address as it was before break_out_memory_refs was called.
1248: In some cases it is useful to look at this to decide what needs to be done.
1249:
1250: MODE and WIN are passed so that this macro can use
1251: GO_IF_LEGITIMATE_ADDRESS.
1252:
1253: It is always safe for this macro to do nothing. It exists to recognize
1254: opportunities to optimize the output.
1255:
1256: For the MIPS (so far ..), nothing needs to be done.
1257:
1258: ACHTUNG this is actually used by the FLOW analysis to get rid
1259: of statements....
1260:
1261: */
1262:
1263: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}
1264:
1265: /* Go to LABEL if ADDR (a legitimate address expression)
1266: has an effect that depends on the machine mode it is used for.
1267: */
1268:
1269: /* See if this is of any use here */
1270:
1271: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1272: { }
1273:
1274:
1275: /* Specify the machine mode that this machine uses
1276: for the index in the tablejump instruction. */
1277: #define CASE_VECTOR_MODE SImode
1278:
1279: /* Define this if the tablejump instruction expects the table
1280: to contain offsets from the address of the table.
1281: Do not define this if the table should contain absolute addresses. */
1282: /* #define CASE_VECTOR_PC_RELATIVE */
1283:
1284: /* Specify the tree operation to be used to convert reals to integers. */
1285: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1286:
1287: /* This is the kind of divide that is easiest to do in the general case. */
1288: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1289:
1290: /* Define this as 1 if `char' should by default be signed; else as 0. */
1291: #define DEFAULT_SIGNED_CHAR 1
1292:
1293: /* Max number of bytes we can move from memory to memory
1294: in one reasonably fast instruction. */
1295: #define MOVE_MAX 4
1296:
1297: /* Nonzero if access to memory by bytes is slow and undesirable. */
1298: #define SLOW_BYTE_ACCESS 0
1299:
1300: /* On Sun 4, this limit is 2048. We use 1500 to be safe,
1301: since the length can run past this up to a continuation point. */
1302: #define DBX_CONTIN_LENGTH 1500
1303:
1304: /* We assume that the store-condition-codes instructions store 0 for false
1305: and some other value for true. This is the value stored for true. */
1306:
1307: #define STORE_FLAG_VALUE 1
1308:
1309: /* Define this if zero-extension is slow (more than one real instruction). */
1310: #define SLOW_ZERO_EXTEND
1311:
1312: /* Define if shifts truncate the shift count
1313: which implies one can omit a sign-extension or zero-extension
1314: of a shift count.
1315:
1316: Only 5 bits are used in SLLV and SRLV
1317: */
1318: #define SHIFT_COUNT_TRUNCATED
1319:
1320:
1321: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1322: is done just by pretending it is already truncated. */
1323: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1324:
1325: /* Specify the machine mode that pointers have.
1326: After generation of rtl, the compiler makes no further distinction
1327: between pointers and any other objects of this machine mode. */
1328: #define Pmode SImode
1329:
1330: /* A function address in a call instruction
1331: is a word address (for indexing purposes)
1332: so give the MEM rtx a words's mode. */
1333:
1334: #define FUNCTION_MODE SImode
1335:
1336: /* Compute the cost of computing a constant rtl expression RTX
1337: whose rtx-code is CODE. The body of this macro is a portion
1338: of a switch statement. If the code is computed here,
1339: return it with a return statement. Otherwise, break from the switch. */
1340:
1341: #define CONST_COSTS(RTX,CODE) \
1342: case CONST_INT: \
1343: /* Constant zero is super cheap due to register 0. */ \
1344: if (RTX == const0_rtx) return 0; \
1345: if ((INTVAL (RTX) < 0x7fff) && (- INTVAL(RTX) < 0x7fff)) return 1; \
1346: case CONST: \
1347: case LABEL_REF: \
1348: case SYMBOL_REF: \
1349: return 3; \
1350: case CONST_DOUBLE: \
1351: return 5;
1352:
1353: /* Tell final.c how to eliminate redundant test instructions. */
1354:
1355: /* Here we define machine-dependent flags and fields in cc_status
1356: (see `conditions.h'). No extra ones are needed for the vax. */
1357: /* Tell final.c how to eliminate redundant test instructions. */
1358:
1359: /* Tell final.c how to eliminate redundant test instructions. */
1360:
1361: /* Here we define machine-dependent flags and fields in cc_status
1362: (see `conditions.h'). No extra ones are needed for the vax. */
1363:
1364: /* Store in cc_status the expressions
1365: that the condition codes will describe
1366: after execution of an instruction whose pattern is EXP.
1367: Do not alter them if the instruction would not alter the cc's. */
1368:
1369: #define NOTICE_UPDATE_CC(EXP, INSN) \
1370: CC_STATUS_INIT;
1371:
1372:
1373: /* Here we define machine-dependent flags and fields in cc_status
1374: (see `conditions.h'). */
1375:
1376:
1377: /* Control the assembler format that we output. */
1378:
1379: /* Output at beginning of assembler file. */
1380:
1381: #define ASM_FILE_START(FILE) \
1382: { \
1383: if (TARGET_NAME_REGS) \
1384: fprintf (FILE, "#include <regdef.h>\n\t.verstamp\t%s\n", TARGET_VERSNUM);\
1385: else fprintf (FILE, " #\t.verstamp\t%s\n", TARGET_VERSNUM); \
1386: /* print_options(FILE); */ \
1387: if (TARGET_GP_OPT) \
1388: fprintf (FILE, "#ifdef %sRESCAN_GCC\n", "__x_"); \
1389: }
1390:
1391: /* Output to assembler file text saying following lines
1392: may contain character constants, extra white space, comments, etc. */
1393:
1394: #define ASM_APP_ON " #APP\n"
1395:
1396: /* Output to assembler file text saying following lines
1397: no longer contain unusual constructs. */
1398:
1399: #define ASM_APP_OFF " #NO_APP\n"
1400:
1401: /* Output before read-only data. */
1402:
1403: #define TEXT_SECTION_ASM_OP ".text"
1404:
1405: /* Output before writable data. */
1406:
1407: #define DATA_SECTION_ASM_OP ".data"
1408:
1409: #define ASM_OUTPUT_MIPS_SECTIONS
1410: #define OUTPUT_MIPS_SECTION_THRESHOLD ((mips_section_threshold >= 0 )?\
1411: mips_section_threshold : mips_section_get())
1412:
1413: /* Output before writable short data. */
1414:
1415: #define SDATA_SECTION_ASM_OP ".sdata"
1416:
1417: /* How to refer to registers in assembler output.
1418: This sequence is indexed by compiler's hard-register-number (see above). */
1419:
1420: #define REGISTER_NAMES \
1421: {"$0", "at", "v0", "v1", "a0", "a1", "a2", "a3", "t0", \
1422: "t1", "t2", "t3", "t4", "t5", "t6", "t7","s0", \
1423: "s1","s2","s3","s4","s5","s6","s7","t8","t9", \
1424: "k0","k1","gp","sp","fp","ra", \
1425: "$f0","$f1","$f2","$f3","$f4","$f5","$f6","$f7","$f8","$f9", \
1426: "$f10","$f11","$f12","$f13","$f14","$f15","$f16","$f17","$f18","$f19", \
1427: "$f20","$f21","$f22","$f23","$f24","$f25","$f26","$f27","$f28","$f29", \
1428: "$f30","$f31" \
1429: }
1430: #define REGISTER_NUMCHAR \
1431: { \
1432: "$0","$1","$2","$3","$4","$5","$6","$7","$8","$9", \
1433: "$10","$11","$12","$13","$14","$15","$16","$17","$18","$19", \
1434: "$20","$21","$22","$23","$24","$25","$26","$27","$28","$29", \
1435: "$30","$31", \
1436: "$f0","$f1","$f2","$f3","$f4","$f5","$f6","$f7","$f8","$f9", \
1437: "$f10","$f11","$f12","$f13","$f14","$f15","$f16","$f17","$f18","$f19", \
1438: "$f20","$f21","$f22","$f23","$f24","$f25","$f26","$f27","$f28","$f29", \
1439: "$f30","$f31" \
1440: }
1441:
1442:
1443: /* How to renumber registers for dbx and gdb.
1444: MIPS needs no change in the numeration. */
1445:
1446: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1447:
1448: /* Define results of standard character escape sequences. */
1449: #define TARGET_BELL 007
1450: #define TARGET_BS 010
1451: #define TARGET_TAB 011
1452: #define TARGET_NEWLINE 012
1453: #define TARGET_VT 013
1454: #define TARGET_FF 014
1455: #define TARGET_CR 015
1456:
1457: /* LIST OF PRINT OPERAND CODES
1458:
1459:
1460: /* 'x' X is CONST_INT, prints 16 bits in
1461: ** Hexadecimal format = "0x%4x",
1462: ** 'd' output integer constant in decimal,
1463: ** 'u' Prints an 'u' if flag -mnofixed-ovfl
1464: ** has been set, thus selecting addu
1465: ** instruction instead of add.
1466: */
1467:
1468:
1469: /* Print an instruction operand X on file FILE.
1470: CODE is the code from the %-spec that requested printing this operand;
1471: if `%z3' was used to print operand 3, then CODE is 'z'.
1472: CODE is used as follows:
1473:
1474: LIST OF PRINT OPERAND CODES
1475:
1476:
1477: 'x' X is CONST_INT, prints 16 bits in
1478: ** Hexadecimal format = "0x%4x",
1479: ** 'd' output integer constant in decimal,
1480: ** ':' Prints an 'u' if flag -mnofixed-ovfl
1481: ** has been set, thus selecting addu
1482: ** instruction instead of add.
1483: */
1484:
1485: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1486: ((CODE) == ':')
1487:
1488: #define PRINT_OPERAND(FILE, X, CODE) \
1489: { if ((CODE) == ':') \
1490: {if (TARGET_NOFIXED_OVFL)fprintf(FILE,"u");} \
1491: else if (GET_CODE (X) == REG) \
1492: { extern char *reg_numchar[]; \
1493: fprintf (FILE, "%s", TARGET_NAME_REGS ?reg_names[REGNO (X)] \
1494: :reg_numchar[REGNO (X) ]); \
1495: } \
1496: else \
1497: { \
1498: if (GET_CODE (X) == MEM) \
1499: output_address (XEXP (X, 0)); \
1500: else if (GET_CODE (X) == CONST_DOUBLE) \
1501: { union { double d; int i[2]; } u; \
1502: union { float f; int i; } u1; \
1503: u.i[0] = CONST_DOUBLE_LOW (X); \
1504: u.i[1] = CONST_DOUBLE_HIGH (X); \
1505: u1.f = u.d; \
1506: if (GET_MODE (X) == SFmode) \
1507: u.d = u1.f; \
1508: fprintf (FILE, "%.20e", u.d); } \
1509: else \
1510: { if ((CODE == 'x') && (GET_CODE(X) == CONST_INT)) \
1511: fprintf(FILE,"0x%x",0xffff & (INTVAL(X))); \
1512: else { if ((CODE == 'd') && (GET_CODE(X) == CONST_INT)) \
1513: fprintf(FILE,"%d",(INTVAL(X))); \
1514: else \
1515: { \
1516: if ((CODE) == 'd') abort(); \
1517: else output_addr_const (FILE, X);} \
1518: }}}}
1519:
1520: /* Print a memory operand whose address is X, on file FILE. */
1521:
1522: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1523: { register rtx reg1, reg2, breg, ireg; \
1524: register rtx addr = ADDR; \
1525: rtx offset; \
1526: extern char *reg_numchar[]; \
1527: /* my_print_rtx(addr);*/ \
1528: retry: \
1529: switch (GET_CODE (addr)) \
1530: { \
1531: case REG: \
1532: fprintf (FILE, "0(%s)", TARGET_NAME_REGS ? reg_names [REGNO (addr)]\
1533: : reg_numchar[REGNO(addr)]); \
1534: break; \
1535: case MEM: \
1536: case PRE_DEC: \
1537: case POST_INC: \
1538: abort(); \
1539: break; \
1540: case PLUS: \
1541: if( (GET_CODE (XEXP(addr,0)) == REG) \
1542: && (GET_CODE (XEXP(addr,1)) == PLUS) \
1543: && (GET_CODE (XEXP(XEXP(addr,1),1)) == SYMBOL_REF) \
1544: && (GET_CODE (XEXP(XEXP(addr,1),0)) == CONST_INT)) \
1545: {output_address(XEXP(XEXP(addr,1),0)); \
1546: fprintf(FILE,"+"); \
1547: output_address(XEXP(XEXP(addr,1),1)); \
1548: breg = XEXP(addr,0); \
1549: fprintf(FILE,"(%s)", TARGET_NAME_REGS ? \
1550: reg_names[REGNO (breg)]: reg_numchar[REGNO(breg)]); \
1551: break; \
1552: } \
1553: \
1554: reg1 = 0; reg2 = 0; \
1555: ireg = 0; breg = 0; \
1556: offset = 0; \
1557: /*fprintf(stderr,"PRINT_OPERAND_ADDRESS"); */ \
1558: if (CONSTANT_ADDRESS_P (XEXP (addr, 0)) \
1559: || GET_CODE (XEXP (addr, 0)) == MEM) \
1560: { \
1561: offset = XEXP (addr, 0); \
1562: addr = XEXP (addr, 1); \
1563: } \
1564: else if (CONSTANT_ADDRESS_P (XEXP (addr, 1)) \
1565: || GET_CODE (XEXP (addr, 1)) == MEM) \
1566: { \
1567: offset = XEXP (addr, 1); \
1568: addr = XEXP (addr, 0); \
1569: } \
1570: if (GET_CODE (addr) != PLUS) ; \
1571: else if (GET_CODE (XEXP (addr, 0)) == MULT) \
1572: { \
1573: reg1 = XEXP (addr, 0); \
1574: addr = XEXP (addr, 1); \
1575: } \
1576: else if (GET_CODE (XEXP (addr, 1)) == MULT) \
1577: { \
1578: reg1 = XEXP (addr, 1); \
1579: addr = XEXP (addr, 0); \
1580: } \
1581: else if (GET_CODE (XEXP (addr, 0)) == REG) \
1582: { \
1583: reg1 = XEXP (addr, 0); \
1584: addr = XEXP (addr, 1); \
1585: } \
1586: else if (GET_CODE (XEXP (addr, 1)) == REG) \
1587: { \
1588: reg1 = XEXP (addr, 1); \
1589: addr = XEXP (addr, 0); \
1590: } \
1591: if (GET_CODE (addr) == REG || GET_CODE (addr) == MULT) \
1592: { if (reg1 == 0) reg1 = addr; else reg2 = addr; addr = 0; } \
1593: if (offset != 0) { if (addr != 0) abort (); addr = offset; } \
1594: if (reg1 != 0 && GET_CODE (reg1) == MULT) \
1595: { breg = reg2; ireg = reg1; } \
1596: else if (reg2 != 0 && GET_CODE (reg2) == MULT) \
1597: { breg = reg1; ireg = reg2; } \
1598: else if (reg2 != 0 || GET_CODE (addr) == MEM) \
1599: { breg = reg2; ireg = reg1; } \
1600: else \
1601: { breg = reg1; ireg = reg2; } \
1602: if (addr != 0) \
1603: output_address (offset); \
1604: if (breg != 0) \
1605: { if (GET_CODE (breg) != REG) abort (); \
1606: fprintf (FILE, "(%s)", TARGET_NAME_REGS ? \
1607: reg_names[REGNO (breg)]: reg_numchar[REGNO(breg)]); }\
1608: if (ireg != 0) \
1609: { if (GET_CODE (ireg) == MULT) ireg = XEXP (ireg, 0); \
1610: if (GET_CODE (ireg) != REG) abort (); \
1611: fprintf (FILE, "[%s]", TARGET_NAME_REGS ? \
1612: reg_names[REGNO (ireg)]: reg_numchar[REGNO(ireg)]); }\
1613: break; \
1614: default: \
1615: output_addr_const (FILE, addr); \
1616: }}
1617:
1618:
1619: /* This is how to output a note to DBX telling it the line number
1620: to which the following sequence of instructions corresponds.
1621:
1622: This is needed for SunOS 4.0, and should not hurt for 3.2
1623: versions either. */
1624: #define ASM_OUTPUT_SOURCE_LINE(file, line) \
1625: { static int sym_lineno = 1; \
1626: fprintf (file, " #.stabn 68,0,%d,LM%d\nLM%d:\n", \
1627: line, sym_lineno, sym_lineno); \
1628: sym_lineno += 1; }
1629:
1630: /* This is how to output the definition of a user-level label named NAME,
1631: such as the label on a static function or variable NAME. */
1632:
1633: #define ASM_OUTPUT_LABEL(FILE,NAME) \
1634: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1635:
1636: /* This is how to output a command to make the user-level label named NAME
1637: defined for reference from other files. */
1638:
1639: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1640: do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); \
1641: fputs ("\n", FILE); \
1642: if(TARGET_GP_OPT) {fputs ("#define _gccx__",FILE); \
1643: assemble_name(FILE,NAME); \
1644: fputs ("\n", FILE); \
1645: } \
1646: } while (0)
1647:
1648: #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
1649: fprintf(FILE,"\t.ent\t%s\n",NAME); \
1650: current_function_name = NAME; \
1651: ASM_OUTPUT_LABEL(FILE,NAME);
1652:
1653: /* This is how to output a reference to a user-level label named NAME.
1654: `assemble_name' uses this. */
1655:
1656: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1657: fprintf (FILE, "%s", NAME)
1658:
1659: /* This is how to output an internal numbered label where
1660: PREFIX is the class of label and NUM is the number within the class. */
1661:
1662: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1663: fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1664:
1665: /* This is how to store into the string LABEL
1666: the symbol_ref name of an internal numbered label where
1667: PREFIX is the class of label and NUM is the number within the class.
1668: This is suitable for output with `assemble_name'. */
1669:
1670: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1671: sprintf (LABEL, "*%s%d", PREFIX, NUM)
1672:
1673: /* This is how to output an assembler line defining a `double' constant. */
1674:
1675: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1676: fprintf (FILE, "\t.double %.20e\n", (VALUE))
1677:
1678: /* This is how to output an assembler line defining a `float' constant. */
1679:
1680: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1681: fprintf (FILE, "\t.float %.12e\n", (VALUE))
1682:
1683: /* This is how to output an assembler line defining an `int' constant. */
1684:
1685: #define ASM_OUTPUT_INT(FILE,VALUE) \
1686: ( fprintf (FILE, "\t.word "), \
1687: output_addr_const (FILE, (VALUE)), \
1688: fprintf (FILE, "\n"))
1689:
1690: /* Likewise for `char' and `short' constants. */
1691:
1692: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1693: ( fprintf (FILE, "\t.half "), \
1694: output_addr_const (FILE, (VALUE)), \
1695: fprintf (FILE, "\n"))
1696:
1697: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1698: ( fprintf (FILE, "\t.byte "), \
1699: output_addr_const (FILE, (VALUE)), \
1700: fprintf (FILE, "\n"))
1701:
1702: /* This is how to output an assembler line for a numeric constant byte. */
1703:
1704: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1705: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1706:
1707: /* This is how to output an element of a case-vector that is absolute. */
1708:
1709: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1710: fprintf (FILE, "\t.word L%d\n", VALUE)
1711:
1712: /* This is how to output an element of a case-vector that is relative.
1713: (We do not use such vectors,
1714: but we must define this macro anyway.) */
1715:
1716: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1717: fprintf (FILE, "\t.word L%d-L%d\n", VALUE, REL)
1718:
1719: /* This is how to output an assembler line
1720: that says to advance the location counter
1721: to a multiple of 2**LOG bytes. */
1722:
1723: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1724: fprintf (FILE, "\t.align %d\n", (LOG))
1725:
1726: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1727: fprintf (FILE, "\t.space %d\n", (SIZE))
1728:
1729: /* The support of .comm and .extern below permits to take advantage
1730: of the SDATA/SBSS sections supported by the MIPS ASSEMBLER and LOADER
1731: However some problems have to be solved
1732: a/ externs should be included ONCE
1733: b/ the same external cannot appear both on an extern and .comm stmt
1734: in the same assembly
1735: c/ for the whole scheme to bring some benefit, .comm should appear
1736: in front of the source asm -- whereas GCC put them at the end
1737: */
1738:
1739:
1740: /* ALL THESE PROBLEMS ARE PRESENTLY SOLVED */
1741: /* USING CONDITIONAL ASSEMBLY + FILE RESCAN */
1742:
1743: #define EXTRA_SECTIONS in_sdata
1744:
1745: /* Define the additional functions to select our additional sections. */
1746:
1747: /* on the MIPS it is not a good idea to put constants in the
1748: text section, since this defeats the sdata/data mechanism. This
1749: is especially true when -O2 is used. In this case an effort is
1750: made to address with faster (gp) register relative addressing,
1751: which can only get at sdata and sbss items (there is no stext !!)
1752: */
1753: #define EXTRA_SECTION_FUNCTIONS \
1754: void \
1755: sdata_section () \
1756: { \
1757: if (in_section != in_sdata) \
1758: { \
1759: fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \
1760: in_section = in_sdata; \
1761: } \
1762: }
1763:
1764: /* Given a decl node or constant node, choose the section to output it in
1765: and select that section. */
1766:
1767: /* following takes care of constants emitted from
1768: the hash table entries (see above comment)
1769: */
1770: #define SELECT_SECTION_MODE(MODE,RTX) \
1771: { \
1772: extern int mips_section_threshold; \
1773: if (( GET_MODE_SIZE(MODE)/ BITS_PER_UNIT) \
1774: <= OUTPUT_MIPS_SECTION_THRESHOLD) \
1775: sdata_section(); \
1776: else \
1777: data_section (); \
1778: } \
1779:
1780: #define SELECT_SECTION(DECL) \
1781: { \
1782: extern int mips_section_threshold; \
1783: if (int_size_in_bytes (TREE_TYPE (DECL)) \
1784: <= OUTPUT_MIPS_SECTION_THRESHOLD) \
1785: sdata_section (); \
1786: else \
1787: data_section (); \
1788: }
1789:
1790: /* This says how to output an assembler line
1791: to define a global common symbol. */
1792:
1793: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1794: ( ((TARGET_GP_OPT)? \
1795: fprintf((FILE),"\n#else"),0 :0), \
1796: fputs ("\n\t.comm ", (FILE)), \
1797: assemble_name ((FILE), (NAME)), \
1798: fprintf ((FILE), ",%d\n", (ROUNDED)), \
1799: (TARGET_GP_OPT ? (fputs("\n#define _gccx__",(FILE)), \
1800: assemble_name((FILE),NAME),0):0), \
1801: ((TARGET_GP_OPT)? \
1802: fprintf((FILE),"\n#endif\n#ifdef %sRESCAN_GCC","__x_"),0 :0) \
1803: )
1804:
1805:
1806: /* This says how to output an external */
1807: /* It would be possible not to output anything and let undefined */
1808: /* symbol become external. However the assembler uses length information on*/
1809: /* externals to allocate in data/sdata bss/sbss, thereby saving exec time */
1810:
1811: #define ASM_OUTPUT_EXTERNAL(FILE,DECL,NAME) \
1812: mips_output_external(FILE,DECL,NAME)
1813:
1814:
1815: /* This says how to output an assembler line
1816: to define a local common symbol. */
1817:
1818: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1819: ( fputs ("\n\t.lcomm\t", (FILE)), \
1820: assemble_name ((FILE), (NAME)), \
1821: fprintf ((FILE), ",%d\n", (ROUNDED)))
1822:
1823: /* This says what to print at the end of the assembly file */
1824: #define ASM_FILE_END(FILE) \
1825: mips_asm_file_end(FILE)
1826:
1827: /* Store in OUTPUT a string (made with alloca) containing
1828: an assembler-name for a local static variable named NAME.
1829: LABELNO is an integer which is different for each call. */
1830:
1831: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1832: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1833: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1834:
1835: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1836: (fprintf (FILE,"ERROR: ASM_OUTPUT_REG_POP\n"))
1837: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1838: (fprintf (FILE,"ERROR: ASM_OUTPUT_REG_PUSH\n"))
1839:
1840: /* The following macro is taken from the */
1841: /* C-text of varasm.c. It has been modified */
1842: /* to handle the VARARG_SUSPECTED hack */
1843: #define ASM_OUTPUT_ASCII(FILE, P , SIZE) \
1844: { int i; \
1845: fprintf ((FILE), "\t.ascii \""); \
1846: VARARGS_SUSPECT( 0 == strncmp((P),"__%%VARARGS",11)); \
1847: for (i = 0; i < (SIZE); i++) \
1848: { \
1849: register int c = (P)[i]; \
1850: if (i != 0 && (i / 200) * 200 == i) \
1851: fprintf ((FILE), "\"\n\t.ascii \""); \
1852: if (c == '\"' || c == '\\') \
1853: putc ('\\', (FILE)); \
1854: if (c >= ' ' && c < 0177) \
1855: putc (c, (FILE)); \
1856: else \
1857: { \
1858: fprintf ((FILE), "\\%o", c); \
1859: /* After an octal-escape, if a digit follows, \
1860: terminate one string constant and start another. \
1861: The Vax assembler fails to stop reading the escape \
1862: after three digits, so this is the only way we \
1863: can get it to parse the data properly. */ \
1864: if (i < (SIZE) - 1 && (P)[i + 1] >= '0' && (P)[i + 1] <= '9')\
1865: fprintf ((FILE), "\"\n\t.ascii \""); \
1866: } \
1867: } \
1868: fprintf ((FILE), "\"\n"); \
1869: }
1870:
1871:
1872:
1873: /* Define the parentheses used to group arithmetic operations
1874: in assembler code. */
1875:
1876: #define ASM_OPEN_PAREN "("
1877: #define ASM_CLOSE_PAREN ")"
1878:
1879: /* Specify what to precede various sizes of constant with
1880: in the output file. */
1881:
1882: #define ASM_INT_OP ".word "
1883: #define ASM_SHORT_OP ".half "
1884: #define ASM_CHAR_OP ".byte "
1885:
1886:
1887: #define DEBUG_LOG_INSN(X) { \
1888: extern rtx al_log_insn_debug; \
1889: al_log_insn_debug=(X); }
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