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1.1 root 1: /* Definitions of target machine for GNU compiler. MIPS version.
2: Contributed by A. Lichnewsky, [email protected]
3: Copyright (C) 1989 Free Software Foundation, Inc.
4:
5: This file is part of GNU CC.
6:
7: GNU CC is free software; you can redistribute it and/or modify
8: it under the terms of the GNU General Public License as published by
9: the Free Software Foundation; either version 1, or (at your option)
10: any later version.
11:
12: GNU CC is distributed in the hope that it will be useful,
13: but WITHOUT ANY WARRANTY; without even the implied warranty of
14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15: GNU General Public License for more details.
16:
17: You should have received a copy of the GNU General Public License
18: along with GNU CC; see the file COPYING. If not, write to
19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20:
21: /* ??? This file needs to be reformatted so that it looks like the
22: rest of GCC. ??? */
23:
24: /* Names to predefine in the preprocessor for this target machine. */
25:
1.1.1.2 ! root 26: #define CPP_PREDEFINES "-Dmips -Dunix -Dhost_mips -DMIPSEB -DR3000 -DLANGUAGE_C"
1.1 root 27:
28: /*----------------------------------------------------------------------
29:
30: SWITCHES:
31:
32: -O optimization. Implies -fstrength-reduce -fomit-frame-pointer
33: -O2 optimization. Implies -O
34:
35: Tries to make use of short displacements using the
36: Sdata and Sbss sections. This uses the -G switches of as and ld.
37:
38: -G <size>
39: Pass size to as and ld. Default -G 8.
40:
41: -mG0 -mG1 -mG2
42: Construct a size to be passed to GCC for Data / Sdata selection.
43:
44: Value is ( (i=G0 + 2 G1 + 4 G2) , (i < 6) ? ( 1<<i) :(1 <<(i+3)))
45: Same value should be passed to as + ld using -G.
46:
47: Default = -mG1 -mG0 (Value = 8).
48:
49: -G32 Implies -G 32 -mG2 -mnG1 -mG0.
50:
51:
52: -bestGnum
53: Pass -bestGnum flag to ld. This helps setting best value for
54: the -G parameter.
55:
56: -SSYSV for RISC-OS: use the System V environment
57: -SBSD43 for RISC-OS: use the BSD 4.3 environment
58: ----------------------------------------------------------------------*/
59:
60:
61:
62: /***********************************************************************
63:
64: WARNING:
65:
66: No attempt to select (configure) the -B and -I parameters has been
67: made inside this version of gcc. They should be made (eg. thru a
68: shell script).
69:
70: -I should be set in such a way that the include file "va-mips.h"
71: gets included (via "varargs.h") for varargs. Otherwise gcc will not
72: bootstrap -- and produce wrong code for varargs.
73:
74:
75: ***********************************************************************/
76:
77:
78: /* Switch Recognition by gcc.c */
79:
80: #ifdef SWITCH_TAKES_ARG
81: #undef SWITCH_TAKES_ARG
82: #endif
83:
84: #define SWITCH_TAKES_ARG(CHAR) \
85: ((CHAR) == 'D' || (CHAR) == 'U' || (CHAR) == 'o' \
86: || (CHAR) == 'e' || (CHAR) == 'T' || (CHAR) == 'u' \
87: || (CHAR) == 'I' || (CHAR) == 'Y' || (CHAR) == 'm' \
88: || (CHAR) == 'L' || (CHAR) == 'i' || (CHAR) == 'A' \
89: || (CHAR) == 'G')
90:
91:
92: /* Extra switches sometimes passed to the assembler. */
93:
1.1.1.2 ! root 94: #define ASM_SPEC "-nocpp %{O:-O2} %{O2: -O2} %{!G32: %{G*}} \
1.1 root 95: %{!G:%{!G32: -G 8}} %{G32: -G 32}"
96:
1.1.1.2 ! root 97:
1.1 root 98: /* Extra switches sometimes passed to the loader. */
99:
100:
101: #if defined(MIPS_SYSV) /* RISC-OS SYSTEM V */
102:
103: #define STARTFILE_SPEC \
104: "%{pg:gcrt0.o%s}%{!pg:%{p:mcrt0.o%s}%{!p:crt1.o%s crtn.o%s}}"
105:
106: #define LINK_SPEC "%{!G32:%{G*} \
107: %{!G:%{!G32:%{mG0:%eYou should include ld/as option -G} \
108: %{mG1:%eYou should include ld/as option -G} \
109: %{mG2:%eYou should include ld/as option -G} \
110: -G 8}}} \
111: %{G32: -G 32} \
112: %{bestGnum: -bestGnum} \
113: %{!ZBSD43:-systype /sysv/}%{ZBSD43:-systype /bsd43/} \
114: "
115:
116: #else
117: #if defined(MIPS_BSD43) /* RISC-OS BSD */
118:
119: #define STARTFILE_SPEC \
120: "%{pg:gcrt0.o%s}%{!pg:%{p:mcrt0.o%s}%{!p:crt1.o%s crtn.o%s}}"
121:
122: #define LINK_SPEC "%{!G32:%{G*} \
123: %{!G:%{!G32:%{mG0:%eYou should include ld/as option -G} \
124: %{mG1:%eYou should include ld/as option -G} \
125: %{mG2:%eYou should include ld/as option -G} \
126: -G 8}}} \
127: %{G32: -G 32} \
128: %{bestGnum: -bestGnum} \
129: %{!ZSYSV:-systype /bsd43/}%{ZSYSV:-systype /sysv/}"
130:
131: #else /* Default for MIPS BSD and ULTRIX */
132:
133: #define LINK_SPEC "%{!G32:%{G*} \
134: %{!G:%{!G32:%{mG0:%eYou should include ld/as option -G} \
135: %{mG1:%eYou should include ld/as option -G} \
136: %{mG2:%eYou should include ld/as option -G} \
137: -G 8}}} \
138: %{G32: -G 32} \
139: %{bestGnum: -bestGnum} "
140: #endif
141: #endif
142:
143: /* CC1 SPECS */
144:
1.1.1.2 ! root 145: #define CC1_SPEC "%{O2:-O -fstrength-reduce -fomit-frame-pointer -mgpOPT}\
1.1 root 146: %{G32: -mG2 -mnG1 } \
147: %{G32:%{!O2:%eOption -G32 may require -O2}}"
148:
149: /* CPP SPECS */
150:
1.1.1.2 ! root 151: #ifndef DECSTATION
! 152:
1.1 root 153: #if defined(MIPS_SYSV) || defined(MIPS_BSD43)
154: /* MIPS RISC-OS environments */
155:
156: #ifdef MIPS_SYSV
1.1.1.2 ! root 157: #define CPP_SPEC " %{!ansi:%{!ZBSD43:-DSYSTYPE_SYSV}%{ZBSD43:-DSYSTYPE_BSD43}}\
! 158: %{!ZBSD43:-D__SYSTYPE_SYSV__}%{ZBSD43:-D__SYSTYPE_BSD43__} \
1.1 root 159: %{!ZBSD43:-I/sysv/usr/include} \
160: %{ZBSD43:-I/bsd43/usr/include}"
161: #else /* not MIPS_SYSV */
1.1.1.2 ! root 162: #define CPP_SPEC " %{!ansi:%{!ZSYSV:-DSYSTYPE_BSD43}%{ZSYSV:-DSYSTYPE_SYSV}}\
! 163: %{!ZSYSV:-D__SYSTYPE_BSD43__}%{ZSYSV:-D__SYSTYPE_SYSV__}\
! 164: %{!ZSYSV:-I/bsd43/usr/include}%{ZSYSV:-I/sysv/usr/include}"
1.1 root 165: #endif /* not MIPS_SYSV */
166:
167: #else /* not MIPS_SYSV and not MIPS_BSD43 */
168: /* default MIPS Bsd environment */
1.1.1.2 ! root 169: #define CPP_SPEC "%{!ansi:-DSYSTYPE_BSD} -D__SYSTYPE_BSD__ "
1.1 root 170:
171: #endif /* not MIPS_SYSV and not MIPS_BSD43 */
172: #endif /* not DECSTATION */
173:
174: /* Print subsidiary information on the compiler version in use. */
175:
176: #ifdef DECSTATION
177: #define TARGET_VERSION printf (" (AL-MIPS 1.11) <Decstation>\n");
178: /* Depends on MIPS ASM. */
179: #else
180: #define TARGET_VERSION printf (" (AL-MIPS 1.11) <MIPS>\n");
181: /* Depends on MIPS ASM. */
182: #endif
183: #define TARGET_VERSNUM "1 11"
184:
185: /* Do not Generate DBX debugging information. */
186:
187: /* #define DBX_DEBUGGING_INFO */
188:
189: /* Run-time compilation parameters selecting different hardware subsets. */
190:
191: extern int target_flags;
192:
193: /* Macros used in the machine description to test the flags. */
194:
195: /* Nonzero if compiling code that Unix assembler can assemble. */
196: #define TARGET_UNIX_ASM (target_flags & 1)
197: /* Debug Mode */
198: #define TARGET_DEBUG_MODE (target_flags & 2)
199: #define TARGET_DEBUGA_MODE (target_flags & 4)
200: #define TARGET_DEBUGB_MODE (target_flags & 16)
201: #define TARGET_DEBUGC_MODE (target_flags & 32)
202: #define TARGET_DEBUGD_MODE (target_flags & 64)
203: /* Register Naming in .s ($21 vs. $a0) */
204: #define TARGET_NAME_REGS (target_flags & 8)
205: /* Use addu / subbu or get FIXED_OVFL TRAPS */
206: #define TARGET_NOFIXED_OVFL (target_flags & 128)
207: /* Optimize for Sdata/Sbss */
208: #define TARGET_GP_OPT (target_flags & 4096)
209: #define TARGET_GVALUE ((target_flags >> 8 ) & 0xf)
210:
211:
212:
213: /* Macro to define tables used to set the flags.
214: This is a list in braces of pairs in braces,
215: each pair being { "NAME", VALUE }
216: where VALUE is the bits to set or minus the bits to clear.
217: An empty string NAME is used to identify the default VALUE. */
218:
219: #define TARGET_SWITCHES \
220: { {"unix", 1}, \
221: {"gnu", -1}, \
222: {"debug", 2 }, /* RELOAD and CONSTRAINTS Related DEBUG */\
223: {"nodebug", -2 }, \
224: {"debuga", 4 }, /* CALLING SEQUENCE RELATED DEBUG */ \
225: {"nodebuga", -4 }, \
226: {"debugb", 16 }, /* GLOBAL/LOCAL ALLOC DEBUG */ \
227: {"nodebugb", -16 }, \
228: {"debugc", 32 }, /* SPILL/RELOAD REGISTER ALLOCATOR DEBUG */\
229: {"nodebugc", -32 }, \
230: {"debugd", 64 }, /* CSE DEBUG */ \
231: {"nodebugd", -64 }, \
232: {"rnames", 8 }, /* Output register names like $a0 */ \
233: {"nornames", -8 }, /* Output register numbers like $21 */ \
234: {"nofixed-ovfl",128}, /* use addu and subu */ \
235: {"fixed-ovfl", -128}, /* use add and sub */ \
236: /* Following used to support the data/sdata */\
237: /* feature */ \
238: {"G0",256}, \
239: {"nG0",-256}, \
240: {"G1",512}, \
241: {"nG1",-512}, \
242: {"G2",1024}, \
243: {"nG2",-1024}, \
244: {"gpOPT", 4096}, /* DO the full GP optimization data/sdata.. */\
245: {"ngpOPT", -4096},\
246: { "", TARGET_DEFAULT}}
247:
248: /* Default target_flags if no switches specified. */
249:
250: #define TARGET_DEFAULT 897
251:
252: /* Default GVALUE (data item size threshold for selection of Sdata/data)
253: is computed : GVALUE == ( ((i=G0+2*G1+4*G2) < 6)
254: ? 1<<i
255: : 1<< (i+6))
256: */
257: #define MIPS_GVALUE_DEFAULT 8
258:
259: /* Target machine storage layout */
260:
261: /* Define this if most significant bit is lowest numbered
262: in instructions that operate on numbered bit-fields.
263: */
264: /* #define BITS_BIG_ENDIAN */
265:
266: /* Define this if most significant byte of a word is the lowest numbered.
267: */
268: #ifndef DECSTATION
269: #define BYTES_BIG_ENDIAN
270: #endif
271: /* Define this if most significant word of a multiword number is numbered.
272: */
273: #ifndef DECSTATION
274: #define WORDS_BIG_ENDIAN
275: #endif
276: /* Number of bits in an addressible storage unit */
277: #define BITS_PER_UNIT 8
278:
279: /* Width in bits of a "word", which is the contents of a machine register.
280: Note that this is not necessarily the width of data type `int';
281: if using 16-bit ints on a 68000, this would still be 32.
282: But on a machine with 16-bit registers, this would be 16. */
283: #define BITS_PER_WORD 32
284:
285: /* Width of a word, in units (bytes). */
286: #define UNITS_PER_WORD 4
287:
288: /* Width in bits of a pointer.
289: See also the macro `Pmode' defined below. */
290: #define POINTER_SIZE 32
291:
292: /* Allocation boundary (in *bits*) for storing pointers in memory. */
293: #define POINTER_BOUNDARY 32
294:
295: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
296: #define PARM_BOUNDARY 32
297:
298: /* Give parms extra alignment, up to this much, if their types want it. */
299: #define MAX_PARM_BOUNDARY 64
300:
301: /* Allocation boundary (in *bits*) for the code of a function. */
302: #define FUNCTION_BOUNDARY 32
303:
304: /* Alignment of field after `int : 0' in a structure. */
305: #define EMPTY_FIELD_BOUNDARY 32
306:
307: /* Every structure's size must be a multiple of this. */
308: #define STRUCTURE_SIZE_BOUNDARY 16
309:
310: /* There is no point aligning anything to a rounder boundary than this. */
311: #define BIGGEST_ALIGNMENT 64
312:
313: /* Define this if move instructions will actually fail to work
314: when given unaligned data. */
315: #define STRICT_ALIGNMENT
316:
317: /* Standard register usage. */
318:
319: /* Number of actual hardware registers.
320: The hardware registers are assigned numbers for the compiler
321: from 0 to just below FIRST_PSEUDO_REGISTER.
322: All registers that the compiler knows about must be given numbers,
323: even those that are not normally considered general registers. */
324: #define FIRST_PSEUDO_REGISTER 64
325:
326: /* 1 for registers that have pervasive standard uses
327: and are not available for the register allocator.
328:
329: On the MIPS, see conventions, page D-2
330:
331: I have chosen not to take Multiply/Divide HI,LO or PC into
332: account.
333: */
334: #define FIXED_REGISTERS {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\
335: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1,\
336: 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1,\
337: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 \
338: }
339:
340:
341: /* 1 for registers not available across function calls.
342: These must include the FIXED_REGISTERS and also any
343: registers that can be used without being saved.
344: The latter must include the registers where values are returned
345: and the register where structure-value addresses are passed.
346: Aside from that, you can include as many other registers as you like. */
347: #define CALL_USED_REGISTERS {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,\
348: 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1,\
349: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,\
350: 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0\
351: }
352:
353:
354: /* Return number of consecutive hard regs needed starting at reg REGNO
355: to hold something of mode MODE.
356: This is ordinarily the length in words of a value of mode MODE
357: but can be less for certain modes in special long registers.
358:
359: On the MIPS, all general registers are one word long. I have chosen to
360: use Floating point register pairs.
361: */
362: #define HARD_REGNO_NREGS(REGNO, MODE) \
363: (((MODE == SFmode) ||(MODE == DFmode)) ? 2 : \
364: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
365:
366: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
367: On the MIPS, all general registers can hold all modes, except
368: FLOATING POINT. */
369:
370: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
371: ((REGNO) < 32 ? (int) (((MODE) != SFmode) && ((MODE) != DFmode)) \
372: : (int) (((MODE) == SFmode || (MODE) == DFmode) \
373: && ((REGNO) & 1) == 0))
374:
375:
376: /* Value is 1 if it is a good idea to tie two pseudo registers
377: when one has mode MODE1 and one has mode MODE2.
378: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
379: for any hard reg, then this must be 0 for correct output. */
380: #define MODES_TIEABLE_P(MODE1, MODE2) \
381: ( ((MODE1) == SFmode || (MODE1) == DFmode) \
382: == ((MODE2) == SFmode || (MODE2) == DFmode))
383:
384: /* MIPS pc is apparently not overloaded on a register. */
385: /* #define PC_REGNUM 15 */
386:
387: /* Register to use for pushing function arguments. */
388: #define STACK_POINTER_REGNUM 29
389:
390: /* Base register for access to local variables of the function. */
391: #define FRAME_POINTER_REGNUM 30
392:
393: /* Value should be nonzero if functions must have frame pointers.
394: Zero means the frame pointer need not be set up (and parms
395: may be accessed via the stack pointer) in functions that seem suitable.
396: This is computed in `reload', in reload1.c. */
397:
398: /* This is now 1 because we don't know until too late
399: whether the function is a varargs function.
400: Such functions currently require extra stack slots on the mips. */
401: #define FRAME_POINTER_REQUIRED 1
402:
403: /* Base register for access to arguments of the function. */
404: #define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM
405:
406: /* Register in which static-chain is passed to a function. */
407: #define STATIC_CHAIN_REGNUM 2
408:
409: /* Register in which address to store a structure value
410: is passed to a function. */
411: #define STRUCT_VALUE_REGNUM 3
412:
413: /* Define the classes of registers for register constraints in the
414: machine description. Also define ranges of constants.
415:
416: One of the classes must always be named ALL_REGS and include all hard regs.
417: If there is more than one class, another class must be named NO_REGS
418: and contain no registers.
419:
420: The name GENERAL_REGS must be the name of a class (or an alias for
421: another name such as ALL_REGS). This is the class of registers
422: that is allowed by "g" or "r" in a register constraint.
423: Also, registers outside this class are allocated only when
424: instructions express preferences for them.
425:
426: The classes must be numbered in nondecreasing order; that is,
427: a larger-numbered class must never be contained completely
428: in a smaller-numbered class.
429:
430: For any two classes, it is very desirable that there be another
431: class that represents their union. */
432:
433: /* The MIPS has general and floating point registers,
434: */
435:
436:
437: enum reg_class { NO_REGS, GR_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES } ;
438:
439: #define N_REG_CLASSES (int) LIM_REG_CLASSES
440:
441: #define GENERAL_REGS GR_REGS
442:
443: /* Give names of register classes as strings for dump file. */
444:
445: #define REG_CLASS_NAMES \
446: {"NO_REGS", "GR_REGS", "FP_REGS", "ALL_REGS" }
447:
448: /* Define which registers fit in which classes.
449: This is an initializer for a vector of HARD_REG_SET
450: of length N_REG_CLASSES. */
451:
452: #define REG_CLASS_CONTENTS {{0x00000000, 0x00000000}, \
453: {0xffffffff, 0x00000000}, \
454: {0x00000000, 0xffffffff}, \
455: {0xffffffff, 0xffffffff}}
456:
457:
458: /* The same information, inverted:
459: Return the class number of the smallest class containing
460: reg number REGNO. This could be a conditional expression
461: or could index an array. */
462:
463: #define REGNO_REG_CLASS(REGNO) \
464: ( (REGNO >= 32) ? FP_REGS : GR_REGS)
465:
466: /* Define a table that lets us find quickly all the reg classes
467: containing a given one. This is the initializer for an
468: N_REG_CLASSES x N_REG_CLASSES array of reg class codes.
469: Row N is a sequence containing all the class codes for
470: classes that contain all the regs in class N. Each row
471: contains no duplicates, and is terminated by LIM_REG_CLASSES. */
472:
473: /* We give just a dummy for the first element, which is for NO_REGS. */
474: /* #define REG_CLASS_SUPERCLASSES {{LIM_REG_CLASSES}, \
475: {GR_REGS,ALL_REGS,LIM_REG_CLASSES}, \
476: {FP_REGS,ALL_REGS,LIM_REG_CLASSES}, \
477: {ALL_REGS,LIM_REG_CLASSES} \
478: }
479: */
480: /* We give just a dummy for the first element, which is for NO_REGS. */
481: #define REG_CLASS_SUPERCLASSES {{LIM_REG_CLASSES}, \
482: {ALL_REGS,LIM_REG_CLASSES}, \
483: {ALL_REGS,LIM_REG_CLASSES}, \
484: {LIM_REG_CLASSES} \
485: }
486:
487: /* The inverse relationship:
488: for each class, a list of all reg classes contained in it. */
489: #define REG_CLASS_SUBCLASSES \
490: {{LIM_REG_CLASSES}, \
491: {GR_REGS,LIM_REG_CLASSES}, \
492: {FP_REGS,LIM_REG_CLASSES},\
493: {GR_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES}\
494: }
495:
496: /* Define a table that lets us find quickly the class
497: for the subunion of any two classes.
498:
499: We say "subunion" because the result need not be exactly
500: the union; it may instead be a subclass of the union
501: (though the closer to the union, the better).
502: But if it contains anything beyond union of the two classes,
503: you will lose!
504:
505: This is an initializer for an N_REG_CLASSES x N_REG_CLASSES
506: array of reg class codes. The subunion of classes C1 and C2
507: is just element [C1, C2]. */
508:
509: #define REG_CLASS_SUBUNION {{NO_REGS, GR_REGS, FP_REGS, ALL_REGS}, \
510: {GR_REGS, GR_REGS, ALL_REGS, ALL_REGS}, \
511: {FP_REGS, ALL_REGS, FP_REGS, ALL_REGS}, \
512: {ALL_REGS, ALL_REGS, ALL_REGS, ALL_REGS}}
513:
514: /* The class value for index registers, and the one for base regs. */
515:
516: #define INDEX_REG_CLASS GR_REGS
517: #define BASE_REG_CLASS GR_REGS
518:
519:
520: /* REGISTER AND CONSTANT CLASSES
521: */
522:
523: /* Get reg_class from a letter such as appears in the machine
524: description. */
525: /* DEFINED REGISTER CLASSES:
526: **
527: ** 'f' : Floating point registers
528: ** 'y' : General register when used to
529: ** transfer chunks of Floating point
530: ** with mfc1 mtc1 insn
531: */
532:
533: #define REG_CLASS_FROM_LETTER(C) \
534: ((C) == 'f' ? FP_REGS: \
535: (C) == 'y' ? GR_REGS:NO_REGS)
536:
537: /* The letters I, J, K, L and M in a register constraint string
538: can be used to stand for particular ranges of immediate operands.
539: This macro defines what the ranges are.
540: C is the letter, and VALUE is a constant value.
541: Return 1 if VALUE is in the range specified by C. */
542:
1.1.1.2 ! root 543: /* For MIPS, `I' is used for the range of constants an arithmetic insn
1.1 root 544: can actually contain (16 bits signed integers).
545: `J' is used for the range which is just zero (since that is
546: available as $R0).
1.1.1.2 ! root 547: `K' is used for the range of constants a logical insn
! 548: can actually contain (16 bit zero-extended integers).
1.1 root 549: */
550:
1.1.1.2 ! root 551: #define SMALL_INT(X) ((unsigned) (INTVAL (X) + 0x8000) < 0x10000)
! 552: #define SMALL_INT_UNSIGNED(X) ((unsigned) (INTVAL (X)) < 0x10000)
1.1 root 553:
554: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
1.1.1.2 ! root 555: ((C) == 'I' ? (unsigned) ((VALUE) + 0x8000) < 0x10000 \
1.1 root 556: : (C) == 'J' ? (VALUE) == 0 \
1.1.1.2 ! root 557: : (C) == 'K' ? (unsigned) (VALUE) < 0x10000 \
1.1 root 558: : 0)
559:
560: /* Similar, but for floating constants, and defining letters G and H.
561: Here VALUE is the CONST_DOUBLE rtx itself. */
562:
563: /* DEFINED FLOATING CONSTANT CLASSES:
564: **
565: ** 'G' : Floating point 0
566: */
567: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
568: ((C) == 'G' && XINT (VALUE, 0) == 0 && XINT (VALUE, 1) == 0)
569:
570: /* Given an rtx X being reloaded into a reg required to be
571: in class CLASS, return the class of reg to actually use.
572: In general this is just CLASS; but on some machines
573: in some cases it is preferable to use a more restrictive class. */
574:
575: #define PREFERRED_RELOAD_CLASS(X,CLASS) \
576: (((GET_MODE(X) == SFmode) || (GET_MODE(X) == DFmode))? FP_REGS : \
577: ((GET_MODE(X) == VOIDmode) ? GR_REGS :(CLASS)))
578:
579: /* Same but Mode has been extracted already
580: */
581:
582: #define PREFERRED_RELOAD_CLASS_FM(X,CLASS) \
583: ((((X) == SFmode) || ((X) == DFmode))? FP_REGS : \
584: (((X) == VOIDmode) ? GR_REGS :(CLASS)))
585:
586: /* Return the maximum number of consecutive registers
587: needed to represent mode MODE in a register of class CLASS. */
588:
589: #define CLASS_MAX_NREGS(CLASS, MODE) \
590: ((((MODE) == DFmode) || ((MODE) == SFmode)) ? 2 \
591: : ((MODE) == VOIDmode)? ((CLASS) == FP_REGS ? 2 :1) \
592: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
593:
594:
595: /* Stack layout; function entry, exit and calling. */
596:
597: /* Define this if pushing a word on the stack
598: makes the stack pointer a smaller address. */
599: #define STACK_GROWS_DOWNWARD
600:
601: /* Define this if the nominal address of the stack frame
602: is at the high-address end of the local variables;
603: that is, each additional local variable allocated
604: goes at a more negative offset in the frame. */
605: #define FRAME_GROWS_DOWNWARD
606:
607: /* Offset within stack frame to start allocating local variables at.
608: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
609: first local allocated. Otherwise, it is the offset to the BEGINNING
610: of the first local allocated. */
611: #define STARTING_FRAME_OFFSET -8
612:
613: /* If we generate an insn to push BYTES bytes,
614: this says how many the stack pointer really advances by.
615: On the vax, sp@- in a byte insn really pushes a word. */
616:
617: /* #define PUSH_ROUNDING(BYTES) 0 */
618:
619:
620: /* Offset of first parameter from the argument pointer register value. */
621: #define FIRST_PARM_OFFSET(FNDECL) 0
622:
623: /* Offset from top-of-stack address to location to store the
624: function parameter if it can't go in a register.
625: Addresses for following parameters are computed relative to this one. */
626: #define FIRST_PARM_CALLER_OFFSET(FNDECL) 0
627:
628: /* When a parameter is passed in a register, stack space is still
629: allocated for it. */
630: /* For the MIPS, stack space must be allocated, cf Asm Lang Prog Guide
631: page 7-8
632:
633: BEWARE that some space is also allocated for non existing arguments
634: in register. In case an argument list is of form
635: GF used registers are a0 (a2,a3), but we should push over a1... not
636: used..
637: */
638: #define REG_PARM_STACK_SPACE
639: /* Align stack frames on 64 bits (Double Word )
640: */
641:
642: #define STACK_BOUNDARY 64
643:
644: /* For the MIPS, there seems to be a minimum to the amount of stack space
645: used... for varargs using functions.
646: evidence comes from the dis-assembled version of printf:
647:
648: cc (cc)
649: Mips Computer Systems 1.31
650: /usr/lib/cpp1.31
651:
652:
653: printf:
654: [printf.c: 14] 0x400510: 27bdffe8 addiu sp,sp,-24
655: [printf.c: 14] 0x400514: afbf0014 sw ra,20(sp)
656: [printf.c: 14] 0x400518: afa5001c sw a1,28(sp)
657: [printf.c: 14] 0x40051c: afa60020 sw a2,32(sp)
658: [printf.c: 14] 0x400520: afa70024 sw a3,36(sp)
659: [printf.c: 18] 0x400524: 27a5001c addiu a1,sp,28
660:
661: it is however OK for functions that do not take arguments to have 0 size
662: frames.
663:
664: */
665:
666: #define STACK_ARGS_ADJUST(SIZE) \
667: { \
668: SIZE.constant += 4; \
669: if (SIZE.var) \
670: { \
671: rtx size1 = ARGS_SIZE_RTX (SIZE); \
672: rtx rounded = gen_reg_rtx (SImode); \
673: rtx label = gen_label_rtx (); \
674: emit_move_insn (rounded, size1); \
675: /* Needed: insns to jump to LABEL if ROUNDED is < 16. */ \
676: abort (); \
677: emit_move_insn (rounded, gen_rtx (CONST_INT, VOIDmode, 16)); \
678: emit_label (label); \
679: SIZE.constant = 0; \
680: SIZE.var = (tree) rounded; \
681: } \
682: else if (SIZE.constant < 16) \
683: SIZE.constant = 16; \
684: }
685:
686: /* Value is 1 if returning from a function call automatically
687: pops the arguments described by the number-of-args field in the call.
688: FUNTYPE is the data type of the function (as a tree),
689: or for a library call it is an identifier node for the subroutine name. */
690:
691: #define RETURN_POPS_ARGS(FUNTYPE) 0
692:
693:
694: /* Define how to find the value returned by a function.
695: VALTYPE is the data type of the value (as a tree).
696: If the precise function being called is known, FUNC is its FUNCTION_DECL;
697: otherwise, FUNC is 0. */
698:
699: #define FUNCTION_VALUE(VALTYPE, FUNC) \
700: gen_rtx (REG, TYPE_MODE (VALTYPE), \
701: (TYPE_MODE (VALTYPE) == SFmode) ||(TYPE_MODE (VALTYPE) == DFmode)?32 : 2)
702:
703: /* Define how to find the value returned by a library function
704: assuming the value has mode MODE. */
705:
706:
707: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, \
708: ((MODE) == DFmode || ( MODE) == SFmode) ? 32 : 2)
709:
710: /* 1 if N is a possible register number for a function value.
711: On the MIPS, R2 R3 and F0 F2 are the only register thus used. */
712: /* Currently, R2 and F0 are only implemented here ( C has no complex type)
713: */
714:
715: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 32)
716:
717: /* 1 if N is a possible register number for function argument passing.
718: */
719:
720: #define FUNCTION_ARG_REGNO_P(N) (((N) < 8 && (N) > 3) \
721: ||((N) < 48 && (N) > 44 && (0 == (N) % 2)))
722:
723: /* Define a data type for recording info about an argument list
724: during the scan of that argument list. This data type should
725: hold all necessary information about the function itself
726: and about the args processed so far, enough to enable macros
727: such as FUNCTION_ARG to determine where the next arg should go.
728: */
729: /* On MIPS the following automaton decides */
730: /* where to put things. */
731: /* If you dont believe it, look at Gerry Kane*/
732: /* 's book page D-22 */
733:
734: #define CUMULATIVE_ARGS struct { enum arg_state arg_rec_state;int restype,arg_num;}
735:
736: enum arg_state { ARG_STA_INIT =0,
737: ARG_STA_F =1, /* $f12 */
738: ARG_STA_FF =2, /* $f12 $f14 */
739: ARG_STA_FG =3, /* $f12 $6 */
740: ARG_STA_FGG =4, /* $f12 $6 $7 */
741: ARG_STA_FGF =5, /* $f12 $6 STACK */
742: ARG_STA_G =6, /* $4 */
743: ARG_STA_GF =7, /* $4 ($6,$7) */
744: ARG_STA_GG =8, /* $4 $5 */
745: ARG_STA_GGF =9, /* $4 $5 ($6,$7) */
746: ARG_STA_GGG =10,/* $4 $5 $6 */
747: ARG_STA_GGGF =11,/* $4 $5 $6 STACK */
748: ARG_STA_GGGG =12 /* $4 $5 $6 $7 */
749: };
750: #define ARG_STA_AUTOMA \
751: { \
752: {ARG_STA_F,ARG_STA_G,44,4 }, /* ARG_STA_INIT */ \
753: {ARG_STA_FF,ARG_STA_FG,46,6 }, /* ARG_STA_F */ \
754: {ARG_STA_FF,ARG_STA_FF,-1,-1 }, /* ARG_STA_FF */ \
755: {ARG_STA_FGF,ARG_STA_FGG,-1,7 }, /* ARG_STA_FG */ \
756: {ARG_STA_FGG,ARG_STA_FGG,-1,-1 }, /* ARG_STA_FGG */ \
757: {ARG_STA_FGF,ARG_STA_FGF,-1,-1 }, /* ARG_STA_FGF */ \
758: {ARG_STA_GF,ARG_STA_GG,-2,5 }, /* ARG_STA_G */ \
759: {ARG_STA_GF,ARG_STA_GF,-1,-1 }, /* ARG_STA_GF */ \
760: {ARG_STA_GGF,ARG_STA_GGG,-2,6 }, /* ARG_STA_GG */ \
761: {ARG_STA_GGF,ARG_STA_GGF,-1,-1 }, /* ARG_STA_GGF */ \
762: {ARG_STA_GGGF,ARG_STA_GGGG,-1,7 }, /* ARG_STA_GGG */ \
763: {ARG_STA_GGGF,ARG_STA_GGGF,-1,-1 }, /* ARG_STA_GGGF */ \
764: {ARG_STA_GGGG,ARG_STA_GGGG,-1,-1 } /* ARG_STA_GGGG */ \
765: }
766:
767: /* Initialize a variable CUM of type CUMULATIVE_ARGS
768: for a call to a function whose data type is FNTYPE.
769: For a library call, FNTYPE is 0.
770:
771: */
772:
773: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE) ((CUM.arg_rec_state) = ARG_STA_INIT,\
774: (CUM.arg_num) = 0, (CUM.restype = (int)VOIDmode))
775:
776: /* Update the data in CUM to advance over an argument
777: of mode MODE and data type TYPE.
778: (TYPE is null for libcalls where that information may not be available.) */
779:
780: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
781: ( function_arg_advance(&CUM,MODE,TYPE));
782:
783: extern enum arg_state function_arg_advance();
784:
785: /* Determine where to put an argument to a function.
786: Value is zero to push the argument on the stack,
787: or a hard register in which to store the argument.
788:
789: MODE is the argument's machine mode.
790: TYPE is the data type of the argument (as a tree).
791: This is null for libcalls where that information may
792: not be available.
793: CUM is a variable of type CUMULATIVE_ARGS which gives info about
794: the preceding args and about the function being called.
795: NAMED is nonzero if this argument is a named parameter
796: (otherwise it is an extra parameter matching an ellipsis). */
797:
798:
799:
800: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
801: ( (rtx) function_arg(&CUM,MODE,TYPE,NAMED))
802:
803: /* For an arg passed partly in registers and partly in memory,
804: this is the number of registers used.
805: For args passed entirely in registers or entirely in memory, zero.
806: */
807:
808: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) (0)
809:
810:
811: /* This macro generates the assembly code for function entry.
812: FILE is a stdio stream to output the code to.
813: SIZE is an int: how many units of temporary storage to allocate.
814: Refer to the array `regs_ever_live' to determine which registers
815: to save; `regs_ever_live[I]' is nonzero if register number I
816: is ever used in the function. This macro is responsible for
817: knowing which registers should not be saved even if used. */
818:
819:
820: /* ALIGN FRAMES on double word boundaries */
821:
822: #define AL_ADJUST_ALIGN(LOC) (((LOC)+7) & 0xfffffff8)
823:
824:
825: /* The problem of Varargs comes from the register passing conventions
826: for Floating Point data. There is a conflict when we send registers
827: back to stack between registers $4,$5 $6,$7 and $f12, $f14.
828:
829: The current implementation:
830: a/ tries to figure out if the current routines uses varargs.(It becomes
831: ``suspect''.) This is currently done by looking for a special
832: static character string constant.
833:
834: b/when a function is suspected of using varags, a larger reg
835: save_area is allocated which will hold regs f12 and f14. The varargs
836: macros then have to find where is the argument they are looking for.
837: This is made easier by a modification in stack frame layout for
838: these functions:the stack frame-size is accessible on stack at
839: location 4($30).
840:
841: Total overhead in PROLOGUE: 2 inns to put stacksize on stack
842: 2 sw.d to save floating registers.
843: (Only when Varargs suspected)
844:
845: The only problem with ``thinking'', is that when functions are
846: thought using varargs and dont do it, they get the above entry
847: overhead.However the current method is quite precise, and is *safe*.
848:
849:
850: See va-mips.h for more information on varargs
851:
852: */
853: extern int varargs_suspect;
854: extern int this_varargs_suspect ;
855:
856: #define VARARGS_SUSPECT(COND) varargs_suspect |= (COND)
857: #define VARARGS_NOTSUSPECT varargs_suspect = 0
858: #define VARARGS_SUSPECTED (varargs_suspect)
859:
860: #define THIS_VARARGS_SUSPECT(COND) this_varargs_suspect |= (COND)
861: #define THIS_VARARGS_NOTSUSPECT this_varargs_suspect = 0
862: #define THIS_VARARGS_SUSPECTED (this_varargs_suspect)
863:
1.1.1.2 ! root 864: /* When eliminating the frame pointer, this is the size of the frame
! 865: aside from explicit stack slots. */
! 866: extern int frame_stack_difference;
1.1 root 867:
868: #define FUNCTION_PROLOGUE(FILE, SIZE) \
869: { register int regno; \
870: register int mask = 0, fmask=0; \
871: register int push_loc = 0,tsize = SIZE+8; \
872: char *fp_str; \
873: extern char *reg_numchar[]; \
874: extern int current_function_total_framesize; \
1.1.1.2 ! root 875: extern char call_used_regs[]; \
1.1 root 876: this_varargs_suspect = VARARGS_SUSPECTED ; \
877: fp_str = TARGET_NAME_REGS ? reg_names[STACK_POINTER_REGNUM] \
878: : reg_numchar[STACK_POINTER_REGNUM]; \
879: for (regno = 0; regno < 32; regno++) \
880: if ( MUST_SAVE_REG_LOGUES \
1.1.1.2 ! root 881: || (regs_ever_live[regno] && !call_used_regs[regno])) \
1.1 root 882: {tsize += 4; mask |= 1 << regno;} \
883: for (regno = 32; regno < FIRST_PSEUDO_REGISTER; regno += 2) \
1.1.1.2 ! root 884: if (regs_ever_live[regno] && !call_used_regs[regno]) \
1.1 root 885: {tsize += 8; fmask |= 1 << (regno-32);} \
886: if (THIS_VARARGS_SUSPECTED) tsize += 16; \
887: fprintf (FILE," #PROLOGUE\n"); \
888: regno = STACK_POINTER_REGNUM; \
889: tsize = AL_ADJUST_ALIGN (tsize); \
890: \
891: if (!frame_pointer_needed) \
1.1.1.2 ! root 892: frame_stack_difference \
! 893: = ((!(regs_ever_live[29] || regs_ever_live[30] \
! 894: || fmask || mask \
! 895: || (SIZE > 0))) \
! 896: ? 0:tsize); \
1.1 root 897: \
898: push_loc = 0; current_function_total_framesize = tsize; \
899: fprintf (FILE, " #\t.mask\t0x%x\n", mask); \
900: if (frame_pointer_needed || regs_ever_live[29] || regs_ever_live[30] \
901: || fmask || mask \
902: || (SIZE > 0)) \
903: fprintf (FILE,"\tsubu\t%s,%d\t#temp=%5d,saveregs=%5d, sfo=%5d\n", \
904: TARGET_NAME_REGS ? reg_names[29] \
905: :reg_numchar[29],tsize,SIZE,tsize-SIZE, \
906: STARTING_FRAME_OFFSET); \
907: else fprintf (FILE," #NO STACK PUSH:\tSP %sused, FP %sused, FP %sneeded\n",\
908: regs_ever_live[29]? "":"un", \
909: regs_ever_live[30]? "":"un", \
910: frame_pointer_needed ?"" : "not "); \
911: for (regno = 31; regno >= 30; regno--) \
912: { \
913: if (MUST_SAVE_REG_LOGUES \
1.1.1.2 ! root 914: || (regs_ever_live[regno] && !call_used_regs[regno])) \
1.1 root 915: { \
916: fprintf (FILE, "\tsw\t%s,%d(%s)\n", \
917: TARGET_NAME_REGS ? reg_names[regno] : reg_numchar[regno], \
918: push_loc, fp_str); \
919: push_loc += 4; \
920: } \
921: } \
922: if (THIS_VARARGS_SUSPECTED) \
923: { int fregno; \
924: fprintf (FILE, "\taddi\t%s,$0,%d\t#Varargs suspicion\n", \
925: TARGET_NAME_REGS ? reg_names[9] : reg_numchar[9], \
926: tsize); \
927: fprintf (FILE, "\tsw\t%s,%d(%s)\t#Varargs suspicion\n", \
928: TARGET_NAME_REGS ? reg_names[9] : reg_numchar[9], \
929: tsize - 4, \
930: TARGET_NAME_REGS ? reg_names[29] : reg_numchar[29]); \
931: for (fregno = 44; fregno< 48; fregno += 2) \
932: { \
933: fprintf (FILE, "\ts.d\t%s,%d(%s)\t#Varargs Suspicion\n", \
934: ((TARGET_NAME_REGS) \
935: ? reg_names[fregno] : reg_numchar[fregno]), \
936: push_loc, fp_str); \
937: push_loc += 8; \
938: } \
939: } \
940: for (regno = 29; regno >= 0; regno--) \
941: { \
942: if (MUST_SAVE_REG_LOGUES \
1.1.1.2 ! root 943: || (regs_ever_live[regno] && !call_used_regs[regno])) \
1.1 root 944: { \
945: fprintf (FILE, "\tsw\t%s,%d(%s)\n", \
946: TARGET_NAME_REGS ? reg_names[regno] : reg_numchar[regno], \
947: push_loc, fp_str); \
948: push_loc += 4; \
949: } \
950: } \
951: fprintf (FILE, " #\t.fmask\t0x%x\n", fmask); \
952: for (regno = 32; regno < FIRST_PSEUDO_REGISTER; regno += 2) \
1.1.1.2 ! root 953: if (regs_ever_live[regno] && !call_used_regs[regno]) \
1.1 root 954: { \
955: fprintf (FILE, "\ts.d\t%s,%d(%s)\n", \
956: (TARGET_NAME_REGS) ? reg_names[regno] : reg_numchar[regno], \
957: push_loc, fp_str); \
958: push_loc += 8; \
959: } \
960: if (frame_pointer_needed) \
1.1.1.2 ! root 961: { \
! 962: if (CONST_OK_FOR_LETTER_P (tsize, 'I')) \
! 963: fprintf (FILE, "\taddiu %s,%s,%d\t#Establish FramePTR\n", \
! 964: (TARGET_NAME_REGS ? reg_names[FRAME_POINTER_REGNUM] \
! 965: : reg_numchar[FRAME_POINTER_REGNUM]), \
! 966: (TARGET_NAME_REGS ? reg_names[29] : reg_numchar[29]), \
! 967: tsize); \
! 968: else \
! 969: { \
! 970: fprintf (FILE, "\tlui $15,0x%x\n", (tsize >> 16) & 0xffff); \
! 971: fprintf (FILE, "\tori $15,0x%x\n", tsize & 0xffff); \
! 972: fprintf (FILE, "\taddu %s,%s,$15\t#Establish FramePTR\n", \
! 973: (TARGET_NAME_REGS ? reg_names[FRAME_POINTER_REGNUM] \
! 974: : reg_numchar[FRAME_POINTER_REGNUM]), \
! 975: (TARGET_NAME_REGS ? reg_names[29] : reg_numchar[29]));\
! 976: } \
! 977: } \
1.1 root 978: fprintf (FILE," #END PROLOGUE\n"); \
979: }
980:
981: /* Output assembler code to FILE to increment profiler label # LABELNO
982: for profiling a function entry. */
983:
984: #define FUNCTION_PROFILER(FILE, LABELNO) \
985: fprintf (FILE, "ERROR\t profiler LP%d,r0\n", (LABELNO));
986:
987: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
988: the stack pointer does not matter. The value is tested only in
989: functions that have frame pointers.
990: No definition is equivalent to always zero. */
991:
992: extern int may_call_alloca;
993: extern int current_function_pretend_args_size;
994:
995: #define EXIT_IGNORE_STACK 0
996:
997:
998: /* This declaration is needed due to traditional/ANSI
999: incompatibilities which cannot be #ifdefed away
1000: because they occur inside of macros. Sigh. */
1001:
1002:
1003: extern union tree_node *current_function_decl;
1004: extern char *current_function_name;
1005:
1006: /* Tell prologue and epilogue if Register containing return
1007: address should be saved / restored
1008: */
1009:
1010: #define MUST_SAVE_REG_LOGUES (( frame_pointer_needed && (regno == 30)) \
1011: ||( (regno == 31) && regs_ever_live[31]) \
1012: )
1013:
1014:
1015: /* This macro generates the assembly code for function exit,
1016: on machines that need it. If FUNCTION_EPILOGUE is not defined
1017: then individual return instructions are generated for each
1018: return statement. Args are same as for FUNCTION_PROLOGUE. */
1019:
1020:
1021: #define FUNCTION_EPILOGUE(FILE, SIZE) \
1022: { register int regno; \
1023: register int mask = 0; \
1024: register int fmask = 0; \
1025: char *fp_str; \
1026: char *sp_str; \
1027: register int push_loc ; \
1028: extern char *reg_numchar[]; \
1029: extern char *current_function_name; \
1030: extern int current_function_total_framesize; \
1.1.1.2 ! root 1031: extern char call_used_regs[]; \
1.1 root 1032: push_loc = 0; \
1033: regno = STACK_POINTER_REGNUM; \
1034: sp_str = TARGET_NAME_REGS ? reg_names[STACK_POINTER_REGNUM] \
1035: : reg_numchar[STACK_POINTER_REGNUM]; \
1036: fp_str = TARGET_NAME_REGS ? reg_names[8] \
1037: :reg_numchar[8]; \
1038: fprintf (FILE," #EPILOGUE\n"); \
1.1.1.2 ! root 1039: if (frame_pointer_needed) \
1.1 root 1040: fprintf (FILE,"\taddu\t%s,$0,%s\t# sp not trusted here \n", \
1041: fp_str, \
1042: TARGET_NAME_REGS ? reg_names[FRAME_POINTER_REGNUM] \
1043: :reg_numchar[FRAME_POINTER_REGNUM] \
1044: ); \
1045: for (regno = 0; regno < 32; regno++) \
1046: if ( MUST_SAVE_REG_LOGUES \
1.1.1.2 ! root 1047: || (regs_ever_live[regno] && !call_used_regs[regno])) \
1.1 root 1048: mask |= 1 << regno; \
1049: fprintf (FILE, " #\t.mask\t0x%x\n", mask); \
1050: for (regno = 31; regno >= 0; regno--) \
1051: { if ( MUST_SAVE_REG_LOGUES \
1.1.1.2 ! root 1052: || (regs_ever_live[regno] && !call_used_regs[regno])) \
1.1 root 1053: { \
1054: fprintf (FILE,"\tlw\t%s,%d(%s)\n", \
1055: TARGET_NAME_REGS ? reg_names[regno] \
1056: : reg_numchar[regno], \
1057: (frame_pointer_needed ? \
1058: push_loc - current_function_total_framesize: \
1059: push_loc), \
1060: (frame_pointer_needed ? fp_str :sp_str)); \
1061: push_loc += 4; \
1062: } \
1063: if ( THIS_VARARGS_SUSPECTED && (regno == 30)) push_loc += 16; \
1064: } \
1065: for (regno = 32; regno < FIRST_PSEUDO_REGISTER; regno += 2) \
1.1.1.2 ! root 1066: if (regs_ever_live[regno] && !call_used_regs[regno]) \
1.1 root 1067: fmask |= 1 << (regno-32); \
1068: fprintf (FILE, " #\t.fmask\t0x%x\n", fmask); \
1069: for (regno = 32; regno < FIRST_PSEUDO_REGISTER; regno += 2) \
1070: { \
1.1.1.2 ! root 1071: if (regs_ever_live[regno] && !call_used_regs[regno]) \
1.1 root 1072: { \
1073: fprintf (FILE,"\tl.d\t%s,%d(%s)\n", \
1074: ( ( TARGET_NAME_REGS) ? reg_names[regno] \
1075: : reg_numchar[regno]), \
1076: (frame_pointer_needed ? \
1077: push_loc - current_function_total_framesize \
1078: : push_loc), \
1079: (frame_pointer_needed ? fp_str :sp_str)); \
1080: push_loc += 8; \
1081: } \
1082: } \
1083: if (frame_pointer_needed) \
1084: fprintf (FILE,"\taddu\t%s,$0,%s\t# sp not trusted here \n", \
1085: TARGET_NAME_REGS ? reg_names[STACK_POINTER_REGNUM] \
1086: :reg_numchar[STACK_POINTER_REGNUM], \
1087: TARGET_NAME_REGS ? reg_names[8] \
1088: :reg_numchar[8] \
1089: ); \
1090: else \
1091: if (regs_ever_live[29]|| regs_ever_live[30] \
1092: || fmask || mask \
1093: || (SIZE > 0)) \
1094: fprintf (FILE,"\taddu\t%s,%d\t\n",TARGET_NAME_REGS ? reg_names[29]\
1095: :reg_numchar[29],current_function_total_framesize); \
1096: fprintf (FILE,"\tj\t$31\n"); \
1097: fprintf (FILE," #END EPILOGUE\n"); \
1098: fprintf (FILE," \t.end\t%s\n",current_function_name); \
1099: THIS_VARARGS_NOTSUSPECT; VARARGS_NOTSUSPECT;}
1100:
1101: /* If the memory Address ADDR is relative to the frame pointer,
1102: correct it to be relative to the stack pointer. This is for
1103: when we don't use a frame pointer.
1104: ADDR should be a variable name. */
1105:
1106: #define FIX_FRAME_POINTER_ADDRESS(ADDR,DEPTH) \
1107: { rtx newaddr; \
1108: int frame_offset = -1; \
1109: /* fprintf(stderr,"FIX_FRAME depth=%d\n",DEPTH); */ \
1110: if(ADDR == frame_pointer_rtx) \
1111: frame_offset = 0; \
1112: else \
1113: if (GET_CODE(ADDR) == PLUS) \
1114: if(XEXP(ADDR,0) == frame_pointer_rtx) \
1115: if(GET_CODE(XEXP(ADDR,1)) == CONST_INT) \
1116: frame_offset = INTVAL(XEXP(ADDR,1)); \
1117: else abort_with_insn(ADDR,"Unable to FIX"); \
1118: else if (XEXP(ADDR,1) == frame_pointer_rtx) \
1119: if(GET_CODE(XEXP(ADDR,0)) == CONST_INT) \
1120: frame_offset = INTVAL(XEXP(ADDR,0)); \
1121: else abort_with_insn(ADDR,"Unable to FIX"); \
1122: else; \
1123: if (frame_offset >= 0) \
1.1.1.2 ! root 1124: { newaddr \
! 1125: = gen_rtx (PLUS,Pmode,stack_pointer_rtx, \
! 1126: gen_rtx (CONST_INT, VOIDmode, \
! 1127: (frame_offset + (DEPTH) \
! 1128: + frame_stack_difference))); \
1.1 root 1129: ADDR = newaddr; \
1130: } \
1131: }
1132:
1133:
1134:
1135: /* Addressing modes, and classification of registers for them. */
1136:
1137: /* #define HAVE_POST_INCREMENT */
1138: /* #define HAVE_POST_DECREMENT */
1139:
1140: /* #define HAVE_PRE_DECREMENT */
1141: /* #define HAVE_PRE_INCREMENT */
1142:
1143: /* These assume that REGNO is a hard or pseudo reg number.
1144: They give nonzero only if REGNO is a hard reg of the suitable class
1145: or a pseudo reg currently allocated to a suitable hard reg.
1146: These definitions are NOT overridden anywhere. */
1147:
1148: #define REGNO_OK_FOR_INDEX_P(regno) \
1149: ((regno) < FIRST_PSEUDO_REGISTER || reg_renumber[regno] >= 0)
1150: #define REGNO_OK_FOR_BASE_P(regno) \
1151: ((regno) < FIRST_PSEUDO_REGISTER || reg_renumber[regno] >= 0)
1152: #define REGNO_OK_FOR_FP_P(REGNO) \
1153: (((REGNO) ^ 0x20) < 32 || (unsigned) (reg_renumber[REGNO] ^ 0x20) < 32)
1154:
1155: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1156: and check its validity for a certain class.
1157: We have two alternate definitions for each of them.
1158: The usual definition accepts all pseudo regs; the other rejects them all.
1159: The symbol REG_OK_STRICT causes the latter definition to be used.
1160:
1161: Most source files want to accept pseudo regs in the hope that
1162: they will get allocated to the class that the insn wants them to be in.
1163: Some source files that are used after register allocation
1164: need to be strict. */
1165:
1166: #ifndef REG_OK_STRICT
1167:
1168: /* Nonzero if X is a hard reg that can be used as an index or if
1169: it is a pseudo reg. */
1170: #define REG_OK_FOR_INDEX_P(X) 1
1171: /* Nonzero if X is a hard reg that can be used as a base reg
1172: of if it is a pseudo reg. */
1173: #define REG_OK_FOR_BASE_P(X) 1
1174:
1175: #else
1176:
1177: /* Nonzero if X is a hard reg that can be used as an index. */
1178: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1179: /* Nonzero if X is a hard reg that can be used as a base reg. */
1180: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1181:
1182: #endif
1183:
1184: #define REG_OK_FOR_CLASS_P(X, C) 0
1185:
1186: #define REGNO_OK_FOR_CLASS_P(X, C) 0
1187:
1188: #define ADDRESS_REG_P(X) \
1189: (GET_CODE (X) == REG )
1190:
1191: /* 1 if X is an fp register. */
1192:
1193: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1194:
1195: /* Maximum number of registers that can appear in a valid memory address. */
1196:
1197: #define MAX_REGS_PER_ADDRESS 1
1198:
1199: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1200: that is a valid memory address for an instruction.
1201: The MODE argument is the machine mode for the MEM expression
1202: that wants to use this address.
1203:
1204: The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
1205: except for CONSTANT_ADDRESS_P which is actually machine-independent. */
1206:
1207: /* 1 if X is an address that we could indirect through. */
1208: #define INDIRECTABLE_ADDRESS_P(X) \
1209: (CONSTANT_ADDRESS_P (X) \
1210: || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1211: || (GET_CODE (X) == PLUS \
1212: && GET_CODE (XEXP (X, 0)) == REG \
1213: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1214: && CONSTANT_ADDRESS_P (XEXP (X, 1))))
1215:
1216:
1217:
1218: /* 1 if X is an address which is (+ (reg) (+ (const_int) (symbol_ref) )) */
1219: #define FIXED_FRAME_PTR_REL_P(X) \
1220: ( (GET_CODE(X) == PLUS) \
1221: && (GET_CODE(XEXP((X),0)) == REG) \
1222: && (GET_CODE(XEXP((X),1)) == PLUS) \
1223: && (GET_CODE(XEXP(XEXP((X),1),0)) == CONST_INT) \
1224: && (GET_CODE(XEXP(XEXP((X),1),1)) == SYMBOL_REF))
1225:
1226: /* Go to ADDR if X is a valid address not using indexing.
1227: (This much is the easy part.) */
1228: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1229: { register rtx xfoob = (X); \
1230: if (GET_CODE (xfoob) == REG) goto ADDR; \
1231: if (INDIRECTABLE_ADDRESS_P (xfoob)) goto ADDR; \
1232: if (FIXED_FRAME_PTR_REL_P (xfoob)) goto ADDR; \
1233: }
1234:
1235:
1236:
1237:
1238: #define CONSTANT_ADDRESS_P(X) \
1239: (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1240: || GET_CODE (X) == CONST_INT \
1241: || GET_CODE (X) == CONST)
1242:
1243: /* Nonzero if the constant value X is a legitimate general operand.
1244: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
1245:
1246: Anything but a CONST_DOUBLE can be made to work. */
1247:
1248: #define LEGITIMATE_CONSTANT_P(X) \
1249: (GET_CODE (X) != CONST_DOUBLE)
1250:
1251: /* Try machine-dependent ways of modifying an illegitimate address
1252: to be legitimate. If we find one, return the new, valid address.
1253: This macro is used in only one place: `memory_address' in explow.c.
1254:
1255: OLDX is the address as it was before break_out_memory_refs was called.
1256: In some cases it is useful to look at this to decide what needs to be done.
1257:
1258: MODE and WIN are passed so that this macro can use
1259: GO_IF_LEGITIMATE_ADDRESS.
1260:
1261: It is always safe for this macro to do nothing. It exists to recognize
1262: opportunities to optimize the output.
1263:
1264: For the MIPS (so far ..), nothing needs to be done.
1265:
1266: ACHTUNG this is actually used by the FLOW analysis to get rid
1267: of statements....
1268:
1269: */
1270:
1271: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}
1272:
1273: /* Go to LABEL if ADDR (a legitimate address expression)
1274: has an effect that depends on the machine mode it is used for.
1275: */
1276:
1277: /* See if this is of any use here */
1278:
1279: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1280: { }
1281:
1282:
1283: /* Specify the machine mode that this machine uses
1284: for the index in the tablejump instruction. */
1285: #define CASE_VECTOR_MODE SImode
1286:
1287: /* Define this if the tablejump instruction expects the table
1288: to contain offsets from the address of the table.
1289: Do not define this if the table should contain absolute addresses. */
1290: /* #define CASE_VECTOR_PC_RELATIVE */
1291:
1292: /* Specify the tree operation to be used to convert reals to integers. */
1293: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1294:
1295: /* This is the kind of divide that is easiest to do in the general case. */
1296: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1297:
1298: /* Define this as 1 if `char' should by default be signed; else as 0. */
1299: #define DEFAULT_SIGNED_CHAR 1
1300:
1301: /* Max number of bytes we can move from memory to memory
1302: in one reasonably fast instruction. */
1303: #define MOVE_MAX 4
1304:
1305: /* Nonzero if access to memory by bytes is slow and undesirable. */
1306: #define SLOW_BYTE_ACCESS 0
1307:
1308: /* On Sun 4, this limit is 2048. We use 1500 to be safe,
1309: since the length can run past this up to a continuation point. */
1310: #define DBX_CONTIN_LENGTH 1500
1311:
1312: /* We assume that the store-condition-codes instructions store 0 for false
1313: and some other value for true. This is the value stored for true. */
1314:
1315: #define STORE_FLAG_VALUE 1
1316:
1317: /* Define this if zero-extension is slow (more than one real instruction). */
1318: #define SLOW_ZERO_EXTEND
1319:
1320: /* Define if shifts truncate the shift count
1321: which implies one can omit a sign-extension or zero-extension
1322: of a shift count.
1323:
1324: Only 5 bits are used in SLLV and SRLV
1325: */
1326: #define SHIFT_COUNT_TRUNCATED
1327:
1328:
1329: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1330: is done just by pretending it is already truncated. */
1331: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1332:
1333: /* Specify the machine mode that pointers have.
1334: After generation of rtl, the compiler makes no further distinction
1335: between pointers and any other objects of this machine mode. */
1336: #define Pmode SImode
1337:
1338: /* A function address in a call instruction
1339: is a word address (for indexing purposes)
1340: so give the MEM rtx a words's mode. */
1341:
1342: #define FUNCTION_MODE SImode
1343:
1344: /* Compute the cost of computing a constant rtl expression RTX
1345: whose rtx-code is CODE. The body of this macro is a portion
1346: of a switch statement. If the code is computed here,
1347: return it with a return statement. Otherwise, break from the switch. */
1348:
1349: #define CONST_COSTS(RTX,CODE) \
1350: case CONST_INT: \
1351: /* Constant zero is super cheap due to register 0. */ \
1352: if (RTX == const0_rtx) return 0; \
1353: if ((INTVAL (RTX) < 0x7fff) && (- INTVAL(RTX) < 0x7fff)) return 1; \
1354: case CONST: \
1355: case LABEL_REF: \
1356: case SYMBOL_REF: \
1357: return 3; \
1358: case CONST_DOUBLE: \
1359: return 5;
1360:
1361: /* Tell final.c how to eliminate redundant test instructions. */
1362:
1363: /* Here we define machine-dependent flags and fields in cc_status
1364: (see `conditions.h'). No extra ones are needed for the vax. */
1365: /* Tell final.c how to eliminate redundant test instructions. */
1366:
1367: /* Tell final.c how to eliminate redundant test instructions. */
1368:
1369: /* Here we define machine-dependent flags and fields in cc_status
1370: (see `conditions.h'). No extra ones are needed for the vax. */
1371:
1372: /* Store in cc_status the expressions
1373: that the condition codes will describe
1374: after execution of an instruction whose pattern is EXP.
1375: Do not alter them if the instruction would not alter the cc's. */
1376:
1377: #define NOTICE_UPDATE_CC(EXP, INSN) \
1378: CC_STATUS_INIT;
1379:
1380:
1381: /* Here we define machine-dependent flags and fields in cc_status
1382: (see `conditions.h'). */
1383:
1384:
1385: /* Control the assembler format that we output. */
1386:
1387: /* Output at beginning of assembler file. */
1388:
1389: #define ASM_FILE_START(FILE) \
1390: { \
1391: if (TARGET_NAME_REGS) \
1392: fprintf (FILE, "#include <regdef.h>\n\t.verstamp\t%s\n", TARGET_VERSNUM);\
1393: else fprintf (FILE, " #\t.verstamp\t%s\n", TARGET_VERSNUM); \
1394: /* print_options(FILE); */ \
1395: if (TARGET_GP_OPT) \
1396: fprintf (FILE, "#ifdef %sRESCAN_GCC\n", "__x_"); \
1397: }
1398:
1399: /* Output to assembler file text saying following lines
1400: may contain character constants, extra white space, comments, etc. */
1401:
1402: #define ASM_APP_ON " #APP\n"
1403:
1404: /* Output to assembler file text saying following lines
1405: no longer contain unusual constructs. */
1406:
1407: #define ASM_APP_OFF " #NO_APP\n"
1408:
1409: /* Output before read-only data. */
1410:
1411: #define TEXT_SECTION_ASM_OP ".text"
1412:
1413: /* Output before writable data. */
1414:
1415: #define DATA_SECTION_ASM_OP ".data"
1416:
1417: #define ASM_OUTPUT_MIPS_SECTIONS
1418: #define OUTPUT_MIPS_SECTION_THRESHOLD ((mips_section_threshold >= 0 )?\
1419: mips_section_threshold : mips_section_get())
1420:
1421: /* Output before writable short data. */
1422:
1423: #define SDATA_SECTION_ASM_OP ".sdata"
1424:
1425: /* How to refer to registers in assembler output.
1426: This sequence is indexed by compiler's hard-register-number (see above). */
1427:
1428: #define REGISTER_NAMES \
1429: {"$0", "at", "v0", "v1", "a0", "a1", "a2", "a3", "t0", \
1430: "t1", "t2", "t3", "t4", "t5", "t6", "t7","s0", \
1431: "s1","s2","s3","s4","s5","s6","s7","t8","t9", \
1432: "k0","k1","gp","sp","fp","ra", \
1433: "$f0","$f1","$f2","$f3","$f4","$f5","$f6","$f7","$f8","$f9", \
1434: "$f10","$f11","$f12","$f13","$f14","$f15","$f16","$f17","$f18","$f19", \
1435: "$f20","$f21","$f22","$f23","$f24","$f25","$f26","$f27","$f28","$f29", \
1436: "$f30","$f31" \
1437: }
1438: #define REGISTER_NUMCHAR \
1439: { \
1440: "$0","$1","$2","$3","$4","$5","$6","$7","$8","$9", \
1441: "$10","$11","$12","$13","$14","$15","$16","$17","$18","$19", \
1442: "$20","$21","$22","$23","$24","$25","$26","$27","$28","$29", \
1443: "$30","$31", \
1444: "$f0","$f1","$f2","$f3","$f4","$f5","$f6","$f7","$f8","$f9", \
1445: "$f10","$f11","$f12","$f13","$f14","$f15","$f16","$f17","$f18","$f19", \
1446: "$f20","$f21","$f22","$f23","$f24","$f25","$f26","$f27","$f28","$f29", \
1447: "$f30","$f31" \
1448: }
1449:
1450:
1451: /* How to renumber registers for dbx and gdb.
1452: MIPS needs no change in the numeration. */
1453:
1454: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1455:
1456: /* Define results of standard character escape sequences. */
1457: #define TARGET_BELL 007
1458: #define TARGET_BS 010
1459: #define TARGET_TAB 011
1460: #define TARGET_NEWLINE 012
1461: #define TARGET_VT 013
1462: #define TARGET_FF 014
1463: #define TARGET_CR 015
1464:
1465: /* LIST OF PRINT OPERAND CODES
1466:
1467:
1468: /* 'x' X is CONST_INT, prints 16 bits in
1469: ** Hexadecimal format = "0x%4x",
1470: ** 'd' output integer constant in decimal,
1471: ** 'u' Prints an 'u' if flag -mnofixed-ovfl
1472: ** has been set, thus selecting addu
1473: ** instruction instead of add.
1474: */
1475:
1476:
1477: /* Print an instruction operand X on file FILE.
1478: CODE is the code from the %-spec that requested printing this operand;
1479: if `%z3' was used to print operand 3, then CODE is 'z'.
1480: CODE is used as follows:
1481:
1482: LIST OF PRINT OPERAND CODES
1483:
1484:
1485: 'x' X is CONST_INT, prints 16 bits in
1486: ** Hexadecimal format = "0x%4x",
1487: ** 'd' output integer constant in decimal,
1488: ** ':' Prints an 'u' if flag -mnofixed-ovfl
1489: ** has been set, thus selecting addu
1490: ** instruction instead of add.
1491: */
1492:
1493: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1494: ((CODE) == ':')
1495:
1496: #define PRINT_OPERAND(FILE, X, CODE) \
1497: { if ((CODE) == ':') \
1498: {if (TARGET_NOFIXED_OVFL)fprintf(FILE,"u");} \
1499: else if (GET_CODE (X) == REG) \
1500: { extern char *reg_numchar[]; \
1501: fprintf (FILE, "%s", TARGET_NAME_REGS ?reg_names[REGNO (X)] \
1502: :reg_numchar[REGNO (X) ]); \
1503: } \
1504: else \
1505: { \
1506: if (GET_CODE (X) == MEM) \
1507: output_address (XEXP (X, 0)); \
1508: else if (GET_CODE (X) == CONST_DOUBLE) \
1509: { union { double d; int i[2]; } u; \
1510: union { float f; int i; } u1; \
1511: u.i[0] = CONST_DOUBLE_LOW (X); \
1512: u.i[1] = CONST_DOUBLE_HIGH (X); \
1513: u1.f = u.d; \
1514: if (GET_MODE (X) == SFmode) \
1515: u.d = u1.f; \
1516: fprintf (FILE, "%.20e", u.d); } \
1517: else \
1518: { if ((CODE == 'x') && (GET_CODE(X) == CONST_INT)) \
1519: fprintf(FILE,"0x%x",0xffff & (INTVAL(X))); \
1520: else { if ((CODE == 'd') && (GET_CODE(X) == CONST_INT)) \
1521: fprintf(FILE,"%d",(INTVAL(X))); \
1522: else \
1523: { \
1524: if ((CODE) == 'd') abort(); \
1525: else output_addr_const (FILE, X);} \
1526: }}}}
1527:
1528: /* Print a memory operand whose address is X, on file FILE. */
1529:
1530: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1531: { register rtx reg1, reg2, breg, ireg; \
1532: register rtx addr = ADDR; \
1533: rtx offset; \
1534: extern char *reg_numchar[]; \
1535: /* my_print_rtx(addr);*/ \
1536: retry: \
1537: switch (GET_CODE (addr)) \
1538: { \
1539: case REG: \
1540: fprintf (FILE, "0(%s)", TARGET_NAME_REGS ? reg_names [REGNO (addr)]\
1541: : reg_numchar[REGNO(addr)]); \
1542: break; \
1543: case MEM: \
1544: case PRE_DEC: \
1545: case POST_INC: \
1546: abort(); \
1547: break; \
1548: case PLUS: \
1549: if( (GET_CODE (XEXP(addr,0)) == REG) \
1550: && (GET_CODE (XEXP(addr,1)) == PLUS) \
1551: && (GET_CODE (XEXP(XEXP(addr,1),1)) == SYMBOL_REF) \
1552: && (GET_CODE (XEXP(XEXP(addr,1),0)) == CONST_INT)) \
1553: {output_address(XEXP(XEXP(addr,1),0)); \
1554: fprintf(FILE,"+"); \
1555: output_address(XEXP(XEXP(addr,1),1)); \
1556: breg = XEXP(addr,0); \
1557: fprintf(FILE,"(%s)", TARGET_NAME_REGS ? \
1558: reg_names[REGNO (breg)]: reg_numchar[REGNO(breg)]); \
1559: break; \
1560: } \
1561: \
1562: reg1 = 0; reg2 = 0; \
1563: ireg = 0; breg = 0; \
1564: offset = 0; \
1565: /*fprintf(stderr,"PRINT_OPERAND_ADDRESS"); */ \
1566: if (CONSTANT_ADDRESS_P (XEXP (addr, 0)) \
1567: || GET_CODE (XEXP (addr, 0)) == MEM) \
1568: { \
1569: offset = XEXP (addr, 0); \
1570: addr = XEXP (addr, 1); \
1571: } \
1572: else if (CONSTANT_ADDRESS_P (XEXP (addr, 1)) \
1573: || GET_CODE (XEXP (addr, 1)) == MEM) \
1574: { \
1575: offset = XEXP (addr, 1); \
1576: addr = XEXP (addr, 0); \
1577: } \
1578: if (GET_CODE (addr) != PLUS) ; \
1579: else if (GET_CODE (XEXP (addr, 0)) == MULT) \
1580: { \
1581: reg1 = XEXP (addr, 0); \
1582: addr = XEXP (addr, 1); \
1583: } \
1584: else if (GET_CODE (XEXP (addr, 1)) == MULT) \
1585: { \
1586: reg1 = XEXP (addr, 1); \
1587: addr = XEXP (addr, 0); \
1588: } \
1589: else if (GET_CODE (XEXP (addr, 0)) == REG) \
1590: { \
1591: reg1 = XEXP (addr, 0); \
1592: addr = XEXP (addr, 1); \
1593: } \
1594: else if (GET_CODE (XEXP (addr, 1)) == REG) \
1595: { \
1596: reg1 = XEXP (addr, 1); \
1597: addr = XEXP (addr, 0); \
1598: } \
1599: if (GET_CODE (addr) == REG || GET_CODE (addr) == MULT) \
1600: { if (reg1 == 0) reg1 = addr; else reg2 = addr; addr = 0; } \
1601: if (offset != 0) { if (addr != 0) abort (); addr = offset; } \
1602: if (reg1 != 0 && GET_CODE (reg1) == MULT) \
1603: { breg = reg2; ireg = reg1; } \
1604: else if (reg2 != 0 && GET_CODE (reg2) == MULT) \
1605: { breg = reg1; ireg = reg2; } \
1606: else if (reg2 != 0 || GET_CODE (addr) == MEM) \
1607: { breg = reg2; ireg = reg1; } \
1608: else \
1609: { breg = reg1; ireg = reg2; } \
1610: if (addr != 0) \
1611: output_address (offset); \
1612: if (breg != 0) \
1613: { if (GET_CODE (breg) != REG) abort (); \
1614: fprintf (FILE, "(%s)", TARGET_NAME_REGS ? \
1615: reg_names[REGNO (breg)]: reg_numchar[REGNO(breg)]); }\
1616: if (ireg != 0) \
1617: { if (GET_CODE (ireg) == MULT) ireg = XEXP (ireg, 0); \
1618: if (GET_CODE (ireg) != REG) abort (); \
1619: fprintf (FILE, "[%s]", TARGET_NAME_REGS ? \
1620: reg_names[REGNO (ireg)]: reg_numchar[REGNO(ireg)]); }\
1621: break; \
1622: default: \
1623: output_addr_const (FILE, addr); \
1624: }}
1625:
1626:
1627: /* This is how to output a note to DBX telling it the line number
1628: to which the following sequence of instructions corresponds.
1629:
1630: This is needed for SunOS 4.0, and should not hurt for 3.2
1631: versions either. */
1632: #define ASM_OUTPUT_SOURCE_LINE(file, line) \
1633: { static int sym_lineno = 1; \
1634: fprintf (file, " #.stabn 68,0,%d,LM%d\nLM%d:\n", \
1635: line, sym_lineno, sym_lineno); \
1636: sym_lineno += 1; }
1637:
1638: /* This is how to output the definition of a user-level label named NAME,
1639: such as the label on a static function or variable NAME. */
1640:
1641: #define ASM_OUTPUT_LABEL(FILE,NAME) \
1642: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1643:
1644: /* This is how to output a command to make the user-level label named NAME
1645: defined for reference from other files. */
1646:
1647: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1648: do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); \
1649: fputs ("\n", FILE); \
1650: if(TARGET_GP_OPT) {fputs ("#define _gccx__",FILE); \
1651: assemble_name(FILE,NAME); \
1652: fputs ("\n", FILE); \
1653: } \
1654: } while (0)
1655:
1656: #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
1657: fprintf(FILE,"\t.ent\t%s\n",NAME); \
1658: current_function_name = NAME; \
1659: ASM_OUTPUT_LABEL(FILE,NAME);
1660:
1661: /* This is how to output a reference to a user-level label named NAME.
1662: `assemble_name' uses this. */
1663:
1664: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1665: fprintf (FILE, "%s", NAME)
1666:
1667: /* This is how to output an internal numbered label where
1668: PREFIX is the class of label and NUM is the number within the class. */
1669:
1670: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1.1.1.2 ! root 1671: fprintf (FILE, "$%s%d:\n", PREFIX, NUM)
1.1 root 1672:
1673: /* This is how to store into the string LABEL
1674: the symbol_ref name of an internal numbered label where
1675: PREFIX is the class of label and NUM is the number within the class.
1676: This is suitable for output with `assemble_name'. */
1677:
1678: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1.1.1.2 ! root 1679: sprintf (LABEL, "*$%s%d", PREFIX, NUM)
1.1 root 1680:
1681: /* This is how to output an assembler line defining a `double' constant. */
1682:
1683: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1684: fprintf (FILE, "\t.double %.20e\n", (VALUE))
1685:
1686: /* This is how to output an assembler line defining a `float' constant. */
1687:
1688: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1689: fprintf (FILE, "\t.float %.12e\n", (VALUE))
1690:
1691: /* This is how to output an assembler line defining an `int' constant. */
1692:
1693: #define ASM_OUTPUT_INT(FILE,VALUE) \
1694: ( fprintf (FILE, "\t.word "), \
1695: output_addr_const (FILE, (VALUE)), \
1696: fprintf (FILE, "\n"))
1697:
1698: /* Likewise for `char' and `short' constants. */
1699:
1700: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1701: ( fprintf (FILE, "\t.half "), \
1702: output_addr_const (FILE, (VALUE)), \
1703: fprintf (FILE, "\n"))
1704:
1705: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1706: ( fprintf (FILE, "\t.byte "), \
1707: output_addr_const (FILE, (VALUE)), \
1708: fprintf (FILE, "\n"))
1709:
1710: /* This is how to output an assembler line for a numeric constant byte. */
1711:
1712: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1713: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1714:
1715: /* This is how to output an element of a case-vector that is absolute. */
1716:
1717: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1.1.1.2 ! root 1718: fprintf (FILE, "\t.word $L%d\n", VALUE)
1.1 root 1719:
1720: /* This is how to output an element of a case-vector that is relative.
1721: (We do not use such vectors,
1722: but we must define this macro anyway.) */
1723:
1724: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1.1.1.2 ! root 1725: fprintf (FILE, "\t.word $L%d-$L%d\n", VALUE, REL)
1.1 root 1726:
1727: /* This is how to output an assembler line
1728: that says to advance the location counter
1729: to a multiple of 2**LOG bytes. */
1730:
1731: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1732: fprintf (FILE, "\t.align %d\n", (LOG))
1733:
1734: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1735: fprintf (FILE, "\t.space %d\n", (SIZE))
1736:
1737: /* The support of .comm and .extern below permits to take advantage
1738: of the SDATA/SBSS sections supported by the MIPS ASSEMBLER and LOADER
1739: However some problems have to be solved
1740: a/ externs should be included ONCE
1741: b/ the same external cannot appear both on an extern and .comm stmt
1742: in the same assembly
1743: c/ for the whole scheme to bring some benefit, .comm should appear
1744: in front of the source asm -- whereas GCC put them at the end
1745: */
1746:
1747:
1748: /* ALL THESE PROBLEMS ARE PRESENTLY SOLVED */
1749: /* USING CONDITIONAL ASSEMBLY + FILE RESCAN */
1750:
1751: #define EXTRA_SECTIONS in_sdata
1752:
1753: /* Define the additional functions to select our additional sections. */
1754:
1755: /* on the MIPS it is not a good idea to put constants in the
1756: text section, since this defeats the sdata/data mechanism. This
1757: is especially true when -O2 is used. In this case an effort is
1758: made to address with faster (gp) register relative addressing,
1759: which can only get at sdata and sbss items (there is no stext !!)
1760: */
1761: #define EXTRA_SECTION_FUNCTIONS \
1762: void \
1763: sdata_section () \
1764: { \
1765: if (in_section != in_sdata) \
1766: { \
1767: fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \
1768: in_section = in_sdata; \
1769: } \
1770: }
1771:
1772: /* Given a decl node or constant node, choose the section to output it in
1773: and select that section. */
1774:
1775: /* following takes care of constants emitted from
1776: the hash table entries (see above comment)
1777: */
1778: #define SELECT_SECTION_MODE(MODE,RTX) \
1779: { \
1780: extern int mips_section_threshold; \
1781: if (( GET_MODE_SIZE(MODE)/ BITS_PER_UNIT) \
1782: <= OUTPUT_MIPS_SECTION_THRESHOLD) \
1783: sdata_section(); \
1784: else \
1785: data_section (); \
1786: } \
1787:
1788: #define SELECT_SECTION(DECL) \
1789: { \
1790: extern int mips_section_threshold; \
1791: if (int_size_in_bytes (TREE_TYPE (DECL)) \
1792: <= OUTPUT_MIPS_SECTION_THRESHOLD) \
1793: sdata_section (); \
1794: else \
1795: data_section (); \
1796: }
1797:
1798: /* This says how to output an assembler line
1799: to define a global common symbol. */
1800:
1801: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1802: ( ((TARGET_GP_OPT)? \
1803: fprintf((FILE),"\n#else"),0 :0), \
1804: fputs ("\n\t.comm ", (FILE)), \
1805: assemble_name ((FILE), (NAME)), \
1806: fprintf ((FILE), ",%d\n", (ROUNDED)), \
1807: (TARGET_GP_OPT ? (fputs("\n#define _gccx__",(FILE)), \
1808: assemble_name((FILE),NAME),0):0), \
1809: ((TARGET_GP_OPT)? \
1810: fprintf((FILE),"\n#endif\n#ifdef %sRESCAN_GCC","__x_"),0 :0) \
1811: )
1812:
1813:
1814: /* This says how to output an external */
1815: /* It would be possible not to output anything and let undefined */
1816: /* symbol become external. However the assembler uses length information on*/
1817: /* externals to allocate in data/sdata bss/sbss, thereby saving exec time */
1818:
1819: #define ASM_OUTPUT_EXTERNAL(FILE,DECL,NAME) \
1820: mips_output_external(FILE,DECL,NAME)
1821:
1822:
1823: /* This says how to output an assembler line
1824: to define a local common symbol. */
1825:
1826: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1827: ( fputs ("\n\t.lcomm\t", (FILE)), \
1828: assemble_name ((FILE), (NAME)), \
1829: fprintf ((FILE), ",%d\n", (ROUNDED)))
1830:
1831: /* This says what to print at the end of the assembly file */
1832: #define ASM_FILE_END(FILE) \
1833: mips_asm_file_end(FILE)
1834:
1835: /* Store in OUTPUT a string (made with alloca) containing
1836: an assembler-name for a local static variable named NAME.
1837: LABELNO is an integer which is different for each call. */
1838:
1839: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1840: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1841: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1842:
1843: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1844: (fprintf (FILE,"ERROR: ASM_OUTPUT_REG_POP\n"))
1845: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1846: (fprintf (FILE,"ERROR: ASM_OUTPUT_REG_PUSH\n"))
1847:
1848: /* The following macro is taken from the */
1849: /* C-text of varasm.c. It has been modified */
1850: /* to handle the VARARG_SUSPECTED hack */
1851: #define ASM_OUTPUT_ASCII(FILE, P , SIZE) \
1852: { int i; \
1853: fprintf ((FILE), "\t.ascii \""); \
1854: VARARGS_SUSPECT( 0 == strncmp((P),"__%%VARARGS",11)); \
1855: for (i = 0; i < (SIZE); i++) \
1856: { \
1857: register int c = (P)[i]; \
1858: if (i != 0 && (i / 200) * 200 == i) \
1859: fprintf ((FILE), "\"\n\t.ascii \""); \
1860: if (c == '\"' || c == '\\') \
1861: putc ('\\', (FILE)); \
1862: if (c >= ' ' && c < 0177) \
1863: putc (c, (FILE)); \
1864: else \
1865: { \
1866: fprintf ((FILE), "\\%o", c); \
1867: /* After an octal-escape, if a digit follows, \
1868: terminate one string constant and start another. \
1869: The Vax assembler fails to stop reading the escape \
1870: after three digits, so this is the only way we \
1871: can get it to parse the data properly. */ \
1872: if (i < (SIZE) - 1 && (P)[i + 1] >= '0' && (P)[i + 1] <= '9')\
1873: fprintf ((FILE), "\"\n\t.ascii \""); \
1874: } \
1875: } \
1876: fprintf ((FILE), "\"\n"); \
1877: }
1878:
1879:
1880:
1881: /* Define the parentheses used to group arithmetic operations
1882: in assembler code. */
1883:
1884: #define ASM_OPEN_PAREN "("
1885: #define ASM_CLOSE_PAREN ")"
1886:
1887: /* Specify what to precede various sizes of constant with
1888: in the output file. */
1889:
1890: #define ASM_INT_OP ".word "
1891: #define ASM_SHORT_OP ".half "
1892: #define ASM_CHAR_OP ".byte "
1893:
1894:
1895: #define DEBUG_LOG_INSN(X) { \
1896: extern rtx al_log_insn_debug; \
1897: al_log_insn_debug=(X); }
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