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1.1 root 1: /* Definitions of target machine for GNU compiler, for Sun SPARC.
2: Copyright (C) 1988 Free Software Foundation, Inc.
3: Contributed by Michael Tiemann ([email protected]).
4:
5: This file is part of GNU CC.
6:
7: GNU CC is free software; you can redistribute it and/or modify
8: it under the terms of the GNU General Public License as published by
9: the Free Software Foundation; either version 1, or (at your option)
10: any later version.
11:
12: GNU CC is distributed in the hope that it will be useful,
13: but WITHOUT ANY WARRANTY; without even the implied warranty of
14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15: GNU General Public License for more details.
16:
17: You should have received a copy of the GNU General Public License
18: along with GNU CC; see the file COPYING. If not, write to
19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20:
21: /* Note that some other tm- files include this one and then override
22: many of the definitions that relate to assembler syntax. */
23:
24: /* Specify library to handle `-a' basic block profiling. */
25:
26: #define LIB_SPEC "%{a:/usr/lib/bb_link.o} \
27: %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p} "
28:
29: /* Provide required defaults for linker -e and -d switches.
30: Also, it is hard to debug with shared libraries,
31: so don't use them if going to debug. */
32:
33: #define LINK_SPEC "%{!e*:-e start} -dc -dp %{g:-Bstatic} %{static:-Bstatic} %{-Bstatic}"
34:
35: /* Special flags to the Sun-4 assembler when using pipe for input. */
36:
37: #define ASM_SPEC " %{pipe:-} "
38:
39: /* Prevent error on `-sun4' option. */
40:
41: #define CC1_SPEC "%{sun4:}"
42:
43: /* Names to predefine in the preprocessor for this target machine. */
44:
45: #define CPP_PREDEFINES "-Dsparc -Dsun -Dunix"
46:
47: /* Print subsidiary information on the compiler version in use. */
48:
49: #define TARGET_VERSION fprintf (stderr, " (sparc)");
50:
51: /* Generate DBX debugging information. */
52:
53: #define DBX_DEBUGGING_INFO
54:
55: /* Run-time compilation parameters selecting different hardware subsets. */
56:
57: extern int target_flags;
58:
59: /* Nonzero if we should generate code to use the fpu. */
60: #define TARGET_FPU (target_flags & 1)
61:
62: /* Nonzero if we should use FUNCTION_EPILOGUE. Otherwise, we
63: use fast return insns, but lose some generality. */
64: #define TARGET_EPILOGUE (target_flags & 2)
65:
66: /* Nonzero if we expect to be passed through the Sun
67: optimizing assembler. This requires us to generate
68: code which we otherwise would not. For example,
69: calls via pointers-to-functions must be output
70: specially because Sun assemble does not do proper flow
71: analysis for this case. */
72: #define TARGET_SUN_ASM (target_flags & 4)
73:
74: /* Nonzero if we should do eager peepholes for conditional branch
75: scheduling. */
76: #define TARGET_EAGER (target_flags & 8)
77:
78: /* Macro to define tables used to set the flags.
79: This is a list in braces of pairs in braces,
80: each pair being { "NAME", VALUE }
81: where VALUE is the bits to set or minus the bits to clear.
82: An empty string NAME is used to identify the default VALUE. */
83:
84: #define TARGET_SWITCHES \
85: { {"fpu", 1}, \
86: {"soft-float", -1}, \
87: {"epilogue", 2}, \
88: {"no-epilogue", -2}, \
89: {"sun-asm", 4}, \
90: {"eager", 8}, \
91: { "", TARGET_DEFAULT}}
92:
93: #define TARGET_DEFAULT 3
94:
95: /* target machine storage layout */
96:
97: /* Define this if most significant bit is lowest numbered
98: in instructions that operate on numbered bit-fields. */
99: #define BITS_BIG_ENDIAN
100:
101: /* Define this if most significant byte of a word is the lowest numbered. */
102: /* This is true on the SPARC. */
103: #define BYTES_BIG_ENDIAN
104:
105: /* Define this if most significant word of a multiword number is numbered. */
106: /* For SPARC we can decide arbitrarily
107: since there are no machine instructions for them. */
108: /* #define WORDS_BIG_ENDIAN */
109:
110: /* number of bits in an addressible storage unit */
111: #define BITS_PER_UNIT 8
112:
113: /* Width in bits of a "word", which is the contents of a machine register.
114: Note that this is not necessarily the width of data type `int';
115: if using 16-bit ints on a 68000, this would still be 32.
116: But on a machine with 16-bit registers, this would be 16. */
117: #define BITS_PER_WORD 32
118:
119: /* Width of a word, in units (bytes). */
120: #define UNITS_PER_WORD 4
121:
122: /* Width in bits of a pointer.
123: See also the macro `Pmode' defined below. */
124: #define POINTER_SIZE 32
125:
126: /* Allocation boundary (in *bits*) for storing pointers in memory. */
127: #define POINTER_BOUNDARY 32
128:
129: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
130: #define PARM_BOUNDARY 32
131:
132: /* Boundary (in *bits*) on which stack pointer should be aligned. */
133: #define STACK_BOUNDARY 64
134:
135: /* Allocation boundary (in *bits*) for the code of a function. */
136: #define FUNCTION_BOUNDARY 32
137:
138: /* Alignment of field after `int : 0' in a structure. */
139: #define EMPTY_FIELD_BOUNDARY 32
140:
141: /* Every structure's size must be a multiple of this. */
142: #define STRUCTURE_SIZE_BOUNDARY 8
143:
144: /* A bitfield declared as `int' forces `int' alignment for the struct. */
145: #define PCC_BITFIELD_TYPE_MATTERS
146:
147: /* No data type wants to be aligned rounder than this. */
148: #define BIGGEST_ALIGNMENT 64
149:
150: /* Define this if move instructions will actually fail to work
151: when given unaligned data. */
152: #define STRICT_ALIGNMENT
153:
154: /* Things that must be doubleword aligned cannot go in the text section,
155: because the linker fails to align the text section enough!
156: Put them in the data section. */
157: #define MAX_TEXT_ALIGN 32
158:
159: #define SELECT_SECTION(T) \
160: { \
161: if (TREE_CODE (T) == VAR_DECL) \
162: { \
163: if (TREE_READONLY (T) && ! TREE_VOLATILE (T) \
164: && DECL_ALIGN (T) <= MAX_TEXT_ALIGN) \
165: text_section (); \
166: else \
167: data_section (); \
168: } \
169: if (*tree_code_type[(int) TREE_CODE (T)] == 'c') \
170: { \
171: if ((TREE_CODE (T) == STRING_CST && flag_writable_strings) \
172: || TYPE_ALIGN (TREE_TYPE (T)) > MAX_TEXT_ALIGN) \
173: data_section (); \
174: else \
175: text_section (); \
176: } \
177: }
178:
179: #define SELECT_RTX_SECTION(MODE, X) \
180: { \
181: if (GET_MODE_BITSIZE (MODE) > MAX_TEXT_ALIGN) \
182: text_section (); \
183: else \
184: data_section (); \
185: }
186:
187: /* Standard register usage. */
188:
189: /* Number of actual hardware registers.
190: The hardware registers are assigned numbers for the compiler
191: from 0 to just below FIRST_PSEUDO_REGISTER.
192: All registers that the compiler knows about must be given numbers,
193: even those that are not normally considered general registers.
194:
195: SPARC has 32 fullword registers and 32 floating point registers. */
196:
197: #define FIRST_PSEUDO_REGISTER 64
198:
199: /* 1 for registers that have pervasive standard uses
200: and are not available for the register allocator.
201: On SPARC, this includes all the global registers
202: (registers r[0] through r[7]) and the callee return
203: address register, r[15]. */
204: #define FIXED_REGISTERS \
205: {1, 1, 1, 1, 1, 1, 1, 1, \
206: 0, 0, 0, 0, 0, 0, 1, 1, \
207: 0, 0, 0, 0, 0, 0, 0, 0, \
208: 0, 0, 0, 0, 0, 0, 1, 1, \
209: \
210: 1, 1, 0, 0, 0, 0, 0, 0, \
211: 0, 0, 0, 0, 0, 0, 0, 0, \
212: 0, 0, 0, 0, 0, 0, 0, 0, \
213: 0, 0, 0, 0, 0, 0, 0, 0}
214:
215:
216: /* 1 for registers not available across function calls.
217: These must include the FIXED_REGISTERS and also any
218: registers that can be used without being saved.
219: The latter must include the registers where values are returned
220: and the register where structure-value addresses are passed.
221: Aside from that, you can include as many other registers as you like. */
222: #define CALL_USED_REGISTERS \
223: {1, 1, 1, 1, 1, 1, 1, 1, \
224: 1, 1, 1, 1, 1, 1, 1, 1, \
225: 0, 0, 0, 0, 0, 0, 0, 0, \
226: 0, 0, 0, 0, 0, 0, 1, 1, \
227: \
228: 1, 1, 1, 1, 1, 1, 1, 1, \
229: 1, 1, 1, 1, 1, 1, 1, 1, \
230: 1, 1, 1, 1, 1, 1, 1, 1, \
231: 1, 1, 1, 1, 1, 1, 1, 1}
232:
233: /* Return number of consecutive hard regs needed starting at reg REGNO
234: to hold something of mode MODE.
235: This is ordinarily the length in words of a value of mode MODE
236: but can be less for certain modes in special long registers.
237:
238: On SPARC, ordinary registers hold 32 bits worth;
239: this means both integer and floating point registers. */
240: #define HARD_REGNO_NREGS(REGNO, MODE) \
241: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
242:
243: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
244: On SPARC, the cpu registers can hold any mode but the float registers
245: can only hold SFmode or DFmode. */
246: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
247: ((REGNO) < 32 ? ((GET_MODE_SIZE (MODE) <= 4) ? 1 : ((REGNO) & 1) == 0) : \
248: ((MODE) == SFmode ? 1 : (MODE) == DFmode && ((REGNO) & 1) == 0))
249:
250: /* Value is 1 if it is a good idea to tie two pseudo registers
251: when one has mode MODE1 and one has mode MODE2.
252: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
253: for any hard reg, then this must be 0 for correct output. */
254: #define MODES_TIEABLE_P(MODE1, MODE2) \
255: (((MODE1) == SFmode || (MODE1) == DFmode) \
256: == ((MODE2) == SFmode || (MODE2) == DFmode))
257:
258: /* Specify the registers used for certain standard purposes.
259: The values of these macros are register numbers. */
260:
261: /* SPARC pc isn't overloaded on a register that the compiler knows about. */
262: /* #define PC_REGNUM */
263:
264: /* Register to use for pushing function arguments. */
265: #define STACK_POINTER_REGNUM 14
266:
267: /* Actual top-of-stack address is 92 greater
268: than the contents of the stack pointer register. */
269: #define STACK_POINTER_OFFSET 92
270:
271: /* Base register for access to local variables of the function. */
272: #define FRAME_POINTER_REGNUM 30
273:
274: /* Value should be nonzero if functions must have frame pointers.
275: Zero means the frame pointer need not be set up (and parms
276: may be accessed via the stack pointer) in functions that seem suitable.
277: This is computed in `reload', in reload1.c. */
278: #define FRAME_POINTER_REQUIRED 1
279:
280: /* Base register for access to arguments of the function. */
281: #define ARG_POINTER_REGNUM 30
282:
283: /* Register in which static-chain is passed to a function. */
284: /* ??? */
285: #define STATIC_CHAIN_REGNUM 1
286:
287:
288: /* Functions which return large structures get the address
289: to place the wanted value at offset 64 from the frame. */
290: #define STRUCT_VALUE_OFFSET 64 /* Used only in other #defines in this file. */
291: #define STRUCT_VALUE \
292: gen_rtx (MEM, Pmode, \
293: gen_rtx (PLUS, SImode, stack_pointer_rtx, \
294: gen_rtx (CONST_INT, VOIDmode, STRUCT_VALUE_OFFSET)))
295: #define STRUCT_VALUE_INCOMING \
296: gen_rtx (MEM, Pmode, \
297: gen_rtx (PLUS, SImode, frame_pointer_rtx, \
298: gen_rtx (CONST_INT, VOIDmode, STRUCT_VALUE_OFFSET)))
299:
300: /* Define the classes of registers for register constraints in the
301: machine description. Also define ranges of constants.
302:
303: One of the classes must always be named ALL_REGS and include all hard regs.
304: If there is more than one class, another class must be named NO_REGS
305: and contain no registers.
306:
307: The name GENERAL_REGS must be the name of a class (or an alias for
308: another name such as ALL_REGS). This is the class of registers
309: that is allowed by "g" or "r" in a register constraint.
310: Also, registers outside this class are allocated only when
311: instructions express preferences for them.
312:
313: The classes must be numbered in nondecreasing order; that is,
314: a larger-numbered class must never be contained completely
315: in a smaller-numbered class.
316:
317: For any two classes, it is very desirable that there be another
318: class that represents their union. */
319:
320: /* The SPARC has two kinds of registers, general and floating point. */
321:
322: enum reg_class { NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES };
323:
324: #define N_REG_CLASSES (int) LIM_REG_CLASSES
325:
326: /* Give names of register classes as strings for dump file. */
327:
328: #define REG_CLASS_NAMES \
329: {"NO_REGS", "GENERAL_REGS", "FP_REGS", "ALL_REGS" }
330:
331: /* Define which registers fit in which classes.
332: This is an initializer for a vector of HARD_REG_SET
333: of length N_REG_CLASSES. */
334:
335: #define REG_CLASS_CONTENTS {{0, 0}, {-1, 0}, {0, -1}, {-1, -1}}
336:
337: /* The same information, inverted:
338: Return the class number of the smallest class containing
339: reg number REGNO. This could be a conditional expression
340: or could index an array. */
341:
342: #define REGNO_REG_CLASS(REGNO) \
343: ((REGNO) >= 32 ? FP_REGS : GENERAL_REGS)
344:
345: /* The class value for index registers, and the one for base regs. */
346: #define INDEX_REG_CLASS GENERAL_REGS
347: #define BASE_REG_CLASS GENERAL_REGS
348:
349: /* Get reg_class from a letter such as appears in the machine description. */
350:
351: #define REG_CLASS_FROM_LETTER(C) \
352: ((C) == 'f' ? FP_REGS : NO_REGS)
353:
354: /* The letters I, J, K, L and M in a register constraint string
355: can be used to stand for particular ranges of immediate operands.
356: This macro defines what the ranges are.
357: C is the letter, and VALUE is a constant value.
358: Return 1 if VALUE is in the range specified by C.
359:
360: For SPARC, `I' is used for the range of constants an insn
361: can actually contain.
362: `J' is used for the range which is just zero (since that is R0).
363: `K' is used for the 5-bit operand of a compare insns. */
364:
365: #define SMALL_INT(X) ((unsigned) (INTVAL (X) + 0x1000) < 0x2000)
366:
367: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
368: ((C) == 'I' ? (unsigned) ((VALUE) + 0x1000) < 0x2000 \
369: : (C) == 'J' ? (VALUE) == 0 \
370: : (C) == 'K' ? (unsigned) (VALUE) < 0x20 \
371: : 0)
372:
373: /* Similar, but for floating constants, and defining letters G and H.
374: Here VALUE is the CONST_DOUBLE rtx itself. */
375:
376: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
377: ((C) == 'G' && XINT (VALUE, 0) == 0 && XINT (VALUE, 1) == 0)
378:
379: /* Given an rtx X being reloaded into a reg required to be
380: in class CLASS, return the class of reg to actually use.
381: In general this is just CLASS; but on some machines
382: in some cases it is preferable to use a more restrictive class. */
383: #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
384:
385: /* Return the maximum number of consecutive registers
386: needed to represent mode MODE in a register of class CLASS. */
387: /* On SPARC, this is the size of MODE in words,
388: except in the FP regs, where a single reg is always enough. */
389: #define CLASS_MAX_NREGS(CLASS, MODE) \
390: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
391:
392: /* Stack layout; function entry, exit and calling. */
393:
394: /* Define this if pushing a word on the stack
395: makes the stack pointer a smaller address. */
396: #define STACK_GROWS_DOWNWARD
397:
398: /* Define this if the nominal address of the stack frame
399: is at the high-address end of the local variables;
400: that is, each additional local variable allocated
401: goes at a more negative offset in the frame. */
402: #define FRAME_GROWS_DOWNWARD
403:
404: /* Offset within stack frame to start allocating local variables at.
405: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
406: first local allocated. Otherwise, it is the offset to the BEGINNING
407: of the first local allocated. */
408: #define STARTING_FRAME_OFFSET -16
409:
410: /* If we generate an insn to push BYTES bytes,
411: this says how many the stack pointer really advances by.
412: On SPARC, don't define this because there are no push insns. */
413: /* #define PUSH_ROUNDING(BYTES) */
414:
415: /* Offset of first parameter from the argument pointer register value.
416: This is 64 for the ins and locals, plus 4 for the struct-return reg
417: if this function isn't going to use it. */
418: #define FIRST_PARM_OFFSET(FNDECL) \
419: (DECL_MODE (DECL_RESULT (fndecl)) == BLKmode \
420: ? STRUCT_VALUE_OFFSET : STRUCT_VALUE_OFFSET + 4)
421:
422: /* Offset from top-of-stack address to location to store the
423: function parameter if it can't go in a register.
424: Addresses for following parameters are computed relative to this one. */
425: #define FIRST_PARM_CALLER_OFFSET(FNDECL) \
426: (STRUCT_VALUE_OFFSET + 4 - STACK_POINTER_OFFSET)
427:
428: /* When a parameter is passed in a register, stack space is still
429: allocated for it. */
430: #define REG_PARM_STACK_SPACE
431:
432: /* Value is 1 if returning from a function call automatically
433: pops the arguments described by the number-of-args field in the call.
434: FUNTYPE is the data type of the function (as a tree),
435: or for a library call it is an identifier node for the subroutine name. */
436:
437: #define RETURN_POPS_ARGS(FUNTYPE) 0
438:
439: /* Some subroutine macros specific to this machine. */
440: #define BASE_RETURN_VALUE_REG(MODE) \
441: ((MODE) == SFmode || (MODE) == DFmode ? 32 : 8)
442: #define BASE_OUTGOING_VALUE_REG(MODE) \
443: ((MODE) == SFmode || (MODE) == DFmode ? 32 : 24)
444: #define BASE_PASSING_ARG_REG(MODE) (8)
445: #define BASE_INCOMING_ARG_REG(MODE) (24)
446:
447: /* Define how to find the value returned by a function.
448: VALTYPE is the data type of the value (as a tree).
449: If the precise function being called is known, FUNC is its FUNCTION_DECL;
450: otherwise, FUNC is 0. */
451:
452: /* On SPARC the value is found in the first "output" register. */
453:
454: #define FUNCTION_VALUE(VALTYPE, FUNC) \
455: gen_rtx (REG, TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG (TYPE_MODE (VALTYPE)))
456:
457: /* But the called function leaves it in the first "input" register. */
458:
459: #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \
460: gen_rtx (REG, TYPE_MODE (VALTYPE), BASE_OUTGOING_VALUE_REG (TYPE_MODE (VALTYPE)))
461:
462: /* Define how to find the value returned by a library function
463: assuming the value has mode MODE. */
464:
465: #define LIBCALL_VALUE(MODE) \
466: gen_rtx (REG, MODE, BASE_RETURN_VALUE_REG (MODE))
467:
468: /* 1 if N is a possible register number for a function value
469: as seen by the caller.
470: On SPARC, the first "output" reg is used for integer values,
471: and the first floating point register is used for floating point values. */
472:
473: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 8 || (N) == 32)
474:
475: /* 1 if N is a possible register number for function argument passing.
476: On SPARC, these are the "output" registers. */
477:
478: #define FUNCTION_ARG_REGNO_P(N) ((N) < 14 && (N) > 7)
479:
480: /* Define a data type for recording info about an argument list
481: during the scan of that argument list. This data type should
482: hold all necessary information about the function itself
483: and about the args processed so far, enough to enable macros
484: such as FUNCTION_ARG to determine where the next arg should go.
485:
486: On SPARC, this is a single integer, which is a number of words
487: of arguments scanned so far (including the invisible argument,
488: if any, which holds the structure-value-address).
489: Thus 7 or more means all following args should go on the stack. */
490:
491: #define CUMULATIVE_ARGS int
492:
493: /* Define the number of register that can hold parameters.
494: This macro is used only in other macro definitions below. */
495: #define NPARM_REGS 6
496:
497: /* Initialize a variable CUM of type CUMULATIVE_ARGS
498: for a call to a function whose data type is FNTYPE.
499: For a library call, FNTYPE is 0.
500:
501: On SPARC, the offset always starts at 0: the first parm reg is always
502: the same reg. */
503:
504: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE) ((CUM) = 0)
505:
506: /* Update the data in CUM to advance over an argument
507: of mode MODE and data type TYPE.
508: (TYPE is null for libcalls where that information may not be available.) */
509:
510: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
511: ((CUM) += ((MODE) != BLKmode \
512: ? (GET_MODE_SIZE (MODE) + 3) / 4 \
513: : (int_size_in_bytes (TYPE) + 3) / 4))
514:
515: /* Determine where to put an argument to a function.
516: Value is zero to push the argument on the stack,
517: or a hard register in which to store the argument.
518:
519: MODE is the argument's machine mode.
520: TYPE is the data type of the argument (as a tree).
521: This is null for libcalls where that information may
522: not be available.
523: CUM is a variable of type CUMULATIVE_ARGS which gives info about
524: the preceding args and about the function being called.
525: NAMED is nonzero if this argument is a named parameter
526: (otherwise it is an extra parameter matching an ellipsis). */
527:
528: /* On SPARC the first six args are normally in registers
529: and the rest are pushed. Any arg that starts within the first 6 words
530: is at least partially passed in a register unless its data type forbids. */
531:
532: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
533: ((CUM) < NPARM_REGS && ((TYPE)==0 || ! TREE_ADDRESSABLE ((tree)(TYPE))) \
534: ? gen_rtx (REG, (MODE), BASE_PASSING_ARG_REG (MODE) + (CUM)) : 0)
535:
536: /* Define where a function finds its arguments.
537: This is different from FUNCTION_ARG because of register windows. */
538:
539: #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
540: ((CUM) < NPARM_REGS && ((TYPE)==0 || ! TREE_ADDRESSABLE ((tree)(TYPE))) \
541: ? gen_rtx (REG, (MODE), BASE_INCOMING_ARG_REG (MODE) + (CUM)) : 0)
542:
543: /* For an arg passed partly in registers and partly in memory,
544: this is the number of registers used.
545: For args passed entirely in registers or entirely in memory, zero.
546: Any arg that starts in the first 6 regs but won't entirely fit in them
547: needs partial registers on the Sparc. */
548:
549: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
550: (((CUM) < NPARM_REGS && ((TYPE)==0 || ! TREE_ADDRESSABLE ((tree)(TYPE)))\
551: && ((CUM) \
552: + ((MODE) == BLKmode \
553: ? (int_size_in_bytes (TYPE) + 3) / 4 \
554: : (GET_MODE_SIZE (MODE) + 3) / 4)) - NPARM_REGS > 0) \
555: ? (NPARM_REGS - (CUM)) \
556: : 0)
557:
558: /* Output the label for a function definition. */
559:
560: #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
561: { \
562: extern tree double_type_node, float_type_node; \
563: if (TREE_TYPE (DECL) == float_type_node) \
564: fprintf (FILE, "\t.proc 6\n"); \
565: else if (TREE_TYPE (DECL) == double_type_node) \
566: fprintf (FILE, "\t.proc 7\n"); \
567: else if (TREE_TYPE (DECL) == void_type_node) \
568: fprintf (FILE, "\t.proc 0\n"); \
569: else fprintf (FILE, "\t.proc 1\n"); \
570: ASM_OUTPUT_LABEL (FILE, NAME); \
571: }
572:
573: /* This macro generates the assembly code for function entry.
574: FILE is a stdio stream to output the code to.
575: SIZE is an int: how many units of temporary storage to allocate.
576: Refer to the array `regs_ever_live' to determine which registers
577: to save; `regs_ever_live[I]' is nonzero if register number I
578: is ever used in the function. This macro is responsible for
579: knowing which registers should not be saved even if used. */
580:
581: /* On SPARC, move-double insns between fpu and cpu need an 8-byte block
582: of memory. If any fpu reg is used in the function, we allocate
583: such a block here, at the bottom of the frame, just in case it's needed.
584:
585: If this function is a leaf procedure, then we may choose not
586: to do a "save" insn. Currently we do this only if it touches
587: the "output" registers. The "local" and "input" registers
588: are off limits. It might be better to allow one such register
589: to go to the stack, but I doubt it. */
590:
591: #define FUNCTION_PROLOGUE(FILE, SIZE) \
592: { \
593: extern char call_used_regs[]; \
594: extern int current_function_pretend_args_size; \
595: extern int frame_pointer_needed; \
596: int fsize = (((SIZE) + 7 - STARTING_FRAME_OFFSET) & -8); \
597: int actual_fsize; \
598: int n_fregs = 0, i; \
599: int n_iregs = 64; \
600: for (i = 32; i < FIRST_PSEUDO_REGISTER; i++) \
601: if (regs_ever_live[i] && ! call_used_regs[i]) \
602: n_fregs++; \
603: for (i = 16; i < 32; i++) \
604: if (regs_ever_live[i]) { n_iregs = 96; break; } \
605: fprintf (FILE, "\t!#PROLOGUE# 0\n"); \
606: actual_fsize = fsize + n_iregs + (n_fregs*4+7 & -8); \
607: fsize += current_function_pretend_args_size+7 & -8; \
608: actual_fsize += current_function_pretend_args_size+7 & -8; \
609: if (actual_fsize < 4096) \
610: fprintf (FILE, "\tsave %%sp,-%d,%%sp\n", actual_fsize); \
611: else \
612: { \
613: fprintf (FILE, "\tsethi %%hi(0x%x),%%g1\n\tadd %%g1,%%lo(0x%x),%%g1\n", \
614: -actual_fsize, -actual_fsize); \
615: fprintf (FILE, "\tsave %%sp,%%g1,%%sp\n"); \
616: } \
617: fprintf (FILE, "\t!#PROLOGUE# 1\n"); \
618: if (n_fregs) \
619: { \
620: for (i = 32, n_fregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
621: if (regs_ever_live[i] && ! call_used_regs[i]) \
622: { \
623: if (regs_ever_live[i+1] && ! call_used_regs[i+1]) \
624: fprintf (FILE, "\tstd %s,[%%sp+0x%x]\n", \
625: reg_names[i], n_iregs + 4 * n_fregs), \
626: n_fregs += 2, i += 1; \
627: else \
628: fprintf (FILE, "\tstf %s,[%%sp+0x%x]\n", \
629: reg_names[i], n_iregs + 4 * n_fregs++); \
630: } \
631: } \
632: if (regs_ever_live[32]) \
633: fprintf (FILE, "\tst %s,[%%fp-16]\n\tst %s,[%%fp-12]\n", \
634: reg_names[0], reg_names[0]); \
635: }
636:
637: /* Output assembler code to FILE to increment profiler label # LABELNO
638: for profiling a function entry. */
639:
640: #define FUNCTION_PROFILER(FILE, LABELNO) \
641: fprintf (FILE, "\tsethi %%hi(LP%d),%%o0\n\tcall mcount\n\tor %%lo(LP%d),%%o0,%%o0\n", \
642: (LABELNO), (LABELNO))
643:
644: /* Output assembler code to FILE to initialize this source file's
645: basic block profiling info, if that has not already been done. */
646:
647: #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
648: fprintf (FILE, "\tsethi %%hi(LPBX0),%%o0\n\tld [%%lo(LPBX0)+%%o0],%%o1\n\ttst %%o1\n\tbne LPY%d\n\tnop\n\tcall ___bb_init_func\n\tnop\nLPY%d:\n", \
649: (LABELNO), (LABELNO))
650:
651: /* Output assembler code to FILE to increment the entry-count for
652: the BLOCKNO'th basic block in this source file. */
653:
654: #define BLOCK_PROFILER(FILE, BLOCKNO) \
655: { \
656: int blockn = (BLOCKNO); \
657: fprintf (FILE, "\tsethi %%hi(LPBX2+%d),%%g1\n\tld [%%lo(LPBX2+%d)+%%g1],%%g2\n\
658: \tadd %%g2,1,%%g2\n\tst %%g2,[%%lo(LPBX2+%d)+%%g1]\n", \
659: 4 * blockn, 4 * blockn, 4 * blockn); \
660: CC_STATUS_INIT; /* We have clobbered %g1. Also %g2. */ \
661: }
662:
663: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
664: the stack pointer does not matter. The value is tested only in
665: functions that have frame pointers.
666: No definition is equivalent to always zero. */
667:
668: extern int may_call_alloca;
669: extern int current_function_pretend_args_size;
670:
671: #define EXIT_IGNORE_STACK \
672: (get_frame_size () != 0 \
673: || may_call_alloca || current_function_pretend_args_size)
674:
675: /* This macro generates the assembly code for function exit,
676: on machines that need it. If FUNCTION_EPILOGUE is not defined
677: then individual return instructions are generated for each
678: return statement. Args are same as for FUNCTION_PROLOGUE.
679:
680: The function epilogue should not depend on the current stack pointer!
681: It should use the frame pointer only. This is mandatory because
682: of alloca; we also take advantage of it to omit stack adjustments
683: before returning. */
684:
685: /* This declaration is needed due to traditional/ANSI
686: incompatibilities which cannot be #ifdefed away
687: because they occur inside of macros. Sigh. */
688: extern union tree_node *current_function_decl;
689:
690: #define FUNCTION_EPILOGUE(FILE, SIZE) \
691: { \
692: extern char call_used_regs[]; \
693: extern int may_call_alloca; \
694: extern int current_function_pretend_args_size; \
695: extern int max_pending_stack_adjust; \
696: extern int frame_pointer_needed; \
697: int fsize = (((SIZE) + 7 - STARTING_FRAME_OFFSET) & -8); \
698: int actual_fsize; \
699: int n_fregs = 0, i; \
700: int n_iregs = 64; \
701: for (i = 32, n_fregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
702: if (regs_ever_live[i] && ! call_used_regs[i]) \
703: n_fregs++; \
704: for (i = 16; i < 32; i++) \
705: if (regs_ever_live[i]) { n_iregs = 96; break; } \
706: actual_fsize = fsize + n_iregs + (n_fregs*4+7 & -8); \
707: actual_fsize += current_function_pretend_args_size+7 & -8; \
708: fsize += current_function_pretend_args_size+7 & -8; \
709: if (n_fregs) \
710: { \
711: char *base; \
712: int offset; \
713: if (fsize < 4096) \
714: { base = "%fp"; offset = n_iregs - actual_fsize; } \
715: else \
716: { base = "%g1"; offset = n_iregs; \
717: if (fsize < 4096) \
718: fprintf (FILE, "sethi %%hi(0x%x),%%g1\n\tadd %%g1,%%lo(0x%x),%%g1\n\tadd %%fp,%%g1,%%g1\n", -actual_fsize, -actual_fsize);\
719: } \
720: for (i = 32, n_fregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
721: if (regs_ever_live[i] && ! call_used_regs[i]) \
722: { \
723: if (regs_ever_live[i+1] && ! call_used_regs[i+1]) \
724: fprintf (FILE, "\tldd [%s%+d],%s\n", \
725: base, offset + 4 * n_fregs, \
726: reg_names[i]), \
727: n_fregs += 2, i += 1; \
728: else \
729: fprintf (FILE, "\tldf [%s%+d],%s\n", \
730: base, offset + 4 * n_fregs++, \
731: reg_names[i]); \
732: } \
733: } \
734: fprintf (FILE, "\tret\n\trestore\n"); \
735: }
736:
737: /* If the memory address ADDR is relative to the frame pointer,
738: correct it to be relative to the stack pointer instead.
739: This is for when we don't use a frame pointer.
740: ADDR should be a variable name. */
741:
742: #define FIX_FRAME_POINTER_ADDRESS(ADDR,DEPTH) \
743: { int offset = -1; \
744: rtx regs = stack_pointer_rtx; \
745: if (ADDR == frame_pointer_rtx) \
746: offset = 0; \
747: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx \
748: && GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \
749: offset = INTVAL (XEXP (ADDR, 1)); \
750: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx) \
751: { rtx other_reg = XEXP (ADDR, 1); \
752: offset = 0; \
753: regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
754: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 1) == frame_pointer_rtx) \
755: { rtx other_reg = XEXP (ADDR, 0); \
756: offset = 0; \
757: regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
758: if (offset >= 0) \
759: { int regno; \
760: extern char call_used_regs[]; \
761: for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
762: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
763: offset += 4; \
764: offset -= 4; \
765: ADDR = plus_constant (regs, offset + (DEPTH)); } }
766:
767: /* Addressing modes, and classification of registers for them. */
768:
769: /* #define HAVE_POST_INCREMENT */
770: /* #define HAVE_POST_DECREMENT */
771:
772: /* #define HAVE_PRE_DECREMENT */
773: /* #define HAVE_PRE_INCREMENT */
774:
775: /* Macros to check register numbers against specific register classes. */
776:
777: /* These assume that REGNO is a hard or pseudo reg number.
778: They give nonzero only if REGNO is a hard reg of the suitable class
779: or a pseudo reg currently allocated to a suitable hard reg.
780: Since they use reg_renumber, they are safe only once reg_renumber
781: has been allocated, which happens in local-alloc.c. */
782:
783: #define REGNO_OK_FOR_INDEX_P(REGNO) \
784: ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
785: #define REGNO_OK_FOR_BASE_P(REGNO) \
786: ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
787: #define REGNO_OK_FOR_FP_P(REGNO) \
788: (((REGNO) ^ 0x20) < 32 || (unsigned) (reg_renumber[REGNO] ^ 0x20) < 32)
789:
790: /* Now macros that check whether X is a register and also,
791: strictly, whether it is in a specified class.
792:
793: These macros are specific to the SPARC, and may be used only
794: in code for printing assembler insns and in conditions for
795: define_optimization. */
796:
797: /* 1 if X is an fp register. */
798:
799: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
800:
801: /* Maximum number of registers that can appear in a valid memory address. */
802:
803: #define MAX_REGS_PER_ADDRESS 2
804:
805: /* Recognize any constant value that is a valid address. */
806:
807: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
808:
809: /* Nonzero if the constant value X is a legitimate general operand.
810: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
811:
812: Anything but a CONST_DOUBLE can be made to work. */
813:
814: #define LEGITIMATE_CONSTANT_P(X) \
815: (GET_CODE (X) != CONST_DOUBLE)
816:
817: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
818: and check its validity for a certain class.
819: We have two alternate definitions for each of them.
820: The usual definition accepts all pseudo regs; the other rejects
821: them unless they have been allocated suitable hard regs.
822: The symbol REG_OK_STRICT causes the latter definition to be used.
823:
824: Most source files want to accept pseudo regs in the hope that
825: they will get allocated to the class that the insn wants them to be in.
826: Source files for reload pass need to be strict.
827: After reload, it makes no difference, since pseudo regs have
828: been eliminated by then. */
829:
830: #ifndef REG_OK_STRICT
831:
832: /* Nonzero if X is a hard reg that can be used as an index
833: or if it is a pseudo reg. */
834: #define REG_OK_FOR_INDEX_P(X) (((unsigned) REGNO (X)) - 32 >= 32)
835: /* Nonzero if X is a hard reg that can be used as a base reg
836: or if it is a pseudo reg. */
837: #define REG_OK_FOR_BASE_P(X) (((unsigned) REGNO (X)) - 32 >= 32)
838:
839: #else
840:
841: /* Nonzero if X is a hard reg that can be used as an index. */
842: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
843: /* Nonzero if X is a hard reg that can be used as a base reg. */
844: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
845:
846: #endif
847:
848: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
849: that is a valid memory address for an instruction.
850: The MODE argument is the machine mode for the MEM expression
851: that wants to use this address.
852:
853: On SPARC, the actual legitimate addresses must be REG+REG or REG+SMALLINT.
854: But we can treat a SYMBOL_REF as legitimate if it is part of this
855: function's constant-pool, because such addresses can actually
856: be output as REG+SMALLINT.
857:
858: Try making SYMBOL_REF (and other things which are CONSTANT_ADDRESS_P)
859: a legitimate address, regardless. Because the only insns which can use
860: memory are load or store insns, the added hair in the machine description
861: is not that bad. It should also speed up the compiler by halving the number
862: of insns it must manage for each (MEM (SYMBOL_REF ...)) involved. */
863:
864: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
865: { if (GET_CODE (X) == REG) \
866: { if (REG_OK_FOR_BASE_P (X)) goto ADDR; } \
867: else if (GET_CODE (X) == PLUS) \
868: { \
869: if (GET_CODE (XEXP (X, 0)) == REG \
870: && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
871: { \
872: if (GET_CODE (XEXP (X, 1)) == REG \
873: && REG_OK_FOR_INDEX_P (XEXP (X, 1))) \
874: goto ADDR; \
875: if (GET_CODE (XEXP (X, 1)) == CONST_INT \
876: && INTVAL (XEXP (X, 1)) >= -0x1000 \
877: && INTVAL (XEXP (X, 1)) < 0x1000) \
878: goto ADDR; \
879: } \
880: else if (GET_CODE (XEXP (X, 1)) == REG \
881: && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
882: { \
883: if (GET_CODE (XEXP (X, 0)) == REG \
884: && REG_OK_FOR_INDEX_P (XEXP (X, 0))) \
885: goto ADDR; \
886: if (GET_CODE (XEXP (X, 0)) == CONST_INT \
887: && INTVAL (XEXP (X, 0)) >= -0x1000 \
888: && INTVAL (XEXP (X, 0)) < 0x1000) \
889: goto ADDR; \
890: } \
891: } \
892: else if (CONSTANT_ADDRESS_P (X)) \
893: goto ADDR; \
894: }
895:
896: /* Try machine-dependent ways of modifying an illegitimate address
897: to be legitimate. If we find one, return the new, valid address.
898: This macro is used in only one place: `memory_address' in explow.c.
899:
900: OLDX is the address as it was before break_out_memory_refs was called.
901: In some cases it is useful to look at this to decide what needs to be done.
902:
903: MODE and WIN are passed so that this macro can use
904: GO_IF_LEGITIMATE_ADDRESS.
905:
906: It is always safe for this macro to do nothing. It exists to recognize
907: opportunities to optimize the output. */
908:
909: /* On SPARC, change REG+N into REG+REG, and REG+(X*Y) into REG+REG. */
910:
911: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
912: { if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
913: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
914: copy_to_mode_reg (SImode, XEXP (X, 1))); \
915: if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
916: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
917: copy_to_mode_reg (SImode, XEXP (X, 0))); \
918: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
919: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
920: force_operand (XEXP (X, 0), 0)); \
921: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
922: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
923: force_operand (XEXP (X, 1), 0)); \
924: if (GET_CODE (x) == SYMBOL_REF) \
925: (X) = copy_to_reg (X); \
926: if (memory_address_p (MODE, X)) \
927: goto WIN; }
928:
929: /* Go to LABEL if ADDR (a legitimate address expression)
930: has an effect that depends on the machine mode it is used for.
931: On the SPARC this is never true. */
932:
933: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
934:
935: /* Specify the machine mode that this machine uses
936: for the index in the tablejump instruction. */
937: #define CASE_VECTOR_MODE SImode
938:
939: /* Define this if the tablejump instruction expects the table
940: to contain offsets from the address of the table.
941: Do not define this if the table should contain absolute addresses. */
942: /* #define CASE_VECTOR_PC_RELATIVE */
943:
944: /* Specify the tree operation to be used to convert reals to integers. */
945: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
946:
947: /* This is the kind of divide that is easiest to do in the general case. */
948: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
949:
950: /* Define this as 1 if `char' should by default be signed; else as 0. */
951: #define DEFAULT_SIGNED_CHAR 1
952:
953: /* Max number of bytes we can move from memory to memory
954: in one reasonably fast instruction. */
955: #define MOVE_MAX 4
956:
957: /* Nonzero if access to memory by bytes is slow and undesirable. */
958: #define SLOW_BYTE_ACCESS 0
959:
960: /* We assume that the store-condition-codes instructions store 0 for false
961: and some other value for true. This is the value stored for true. */
962:
963: #define STORE_FLAG_VALUE 1
964:
965: /* When a prototype says `char' or `short', really pass an `int'. */
966: #define PROMOTE_PROTOTYPES
967:
968: /* Define if shifts truncate the shift count
969: which implies one can omit a sign-extension or zero-extension
970: of a shift count. */
971: #define SHIFT_COUNT_TRUNCATED
972:
973: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
974: is done just by pretending it is already truncated. */
975: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
976:
977: /* Specify the machine mode that pointers have.
978: After generation of rtl, the compiler makes no further distinction
979: between pointers and any other objects of this machine mode. */
980: #define Pmode SImode
981:
982: /* A function address in a call instruction
983: is a byte address (for indexing purposes)
984: so give the MEM rtx a byte's mode. */
985: #define FUNCTION_MODE SImode
986:
987: /* Define this if addresses of constant functions
988: shouldn't be put through pseudo regs where they can be cse'd.
989: Desirable on machines where ordinary constants are expensive
990: but a CALL with constant address is cheap. */
991: #define NO_FUNCTION_CSE
992:
993: /* Define subroutines to call to handle multiply and divide.
994: Use the subroutines that Sun's library provides.
995: The `*' prevents an underscore from being prepended by the compiler. */
996:
997: #define DIVSI3_LIBCALL "*.div"
998: #define UDIVSI3_LIBCALL "*.udiv"
999: #define MODSI3_LIBCALL "*.rem"
1000: #define UMODSI3_LIBCALL "*.urem"
1001: #define MULSI3_LIBCALL "*.mul"
1002: #define UMULSI3_LIBCALL "*.umul"
1003:
1004: /* Compute the cost of computing a constant rtl expression RTX
1005: whose rtx-code is CODE. The body of this macro is a portion
1006: of a switch statement. If the code is computed here,
1007: return it with a return statement. Otherwise, break from the switch. */
1008:
1009: #define CONST_COSTS(RTX,CODE) \
1010: case CONST_INT: \
1011: if (INTVAL (RTX) < 0x1000 && INTVAL (RTX) >= -0x1000) return 0; \
1012: case CONST: \
1013: case LABEL_REF: \
1014: case SYMBOL_REF: \
1015: return 2; \
1016: case CONST_DOUBLE: \
1017: return 4;
1018:
1019: /* Tell final.c how to eliminate redundant test instructions. */
1020:
1021: /* Here we define machine-dependent flags and fields in cc_status
1022: (see `conditions.h'). */
1023:
1024: /* This holds the value sourcing %hi(%g1). We keep this info
1025: around so that mem/mem ops, such as increment and decrement,
1026: etc, can be performed reasonably. */
1027: #define CC_STATUS_MDEP rtx
1028:
1029: /* Nonzero if the results of the previous comparison are
1030: in the floating point condition code register. */
1031:
1032: #define CC_IN_FCCR 04000
1033:
1034: /* Nonzero if the results of the previous comparison are
1035: int the coprocessor's condition code register. */
1036:
1037: #define CC_IN_CCCR 010000
1038:
1039: /* Nonzero if we know (easily) that floating point register f0
1040: (f1) contains the value 0. */
1041: #define CC_F0_IS_0 020000
1042: #define CC_F1_IS_0 040000
1043:
1044: /* Nonzero if we know the value of %hi(%g1). */
1045: #define CC_KNOW_HI_G1 0100000
1046:
1047: #define CC_STATUS_MDEP_INIT (cc_status.mdep = 0)
1048:
1049: /* Store in cc_status the expressions
1050: that the condition codes will describe
1051: after execution of an instruction whose pattern is EXP.
1052: Do not alter them if the instruction would not alter the cc's. */
1053:
1054: #define NOTICE_UPDATE_CC(EXP, INSN) \
1055: { if (GET_CODE (EXP) == SET) \
1056: { if (SET_DEST (EXP) == cc0_rtx) \
1057: { cc_status.flags = 0; \
1058: cc_status.value1 = SET_DEST (EXP); \
1059: cc_status.value2 = SET_SRC (EXP); } \
1060: else if (GET_CODE (SET_SRC (EXP)) == CALL) \
1061: { CC_STATUS_INIT; } \
1062: else if (GET_CODE (SET_DEST (EXP)) == REG) \
1063: { if (cc_status.value1 \
1064: && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value1)) \
1065: cc_status.value1 = 0; \
1066: if (cc_status.value2 \
1067: && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value2)) \
1068: cc_status.value2 = 0; \
1069: } \
1070: else if (GET_CODE (SET_DEST (EXP)) == MEM) \
1071: { rtx x = cc_status.mdep; int know = cc_status.flags & CC_KNOW_HI_G1; \
1072: CC_STATUS_INIT; \
1073: if (x && know) \
1074: { cc_status.mdep = x; cc_status.flags |= CC_KNOW_HI_G1; } \
1075: } \
1076: } \
1077: else if (GET_CODE (EXP) == PARALLEL \
1078: && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \
1079: { if (SET_DEST (XVECEXP (EXP, 0, 0)) == cc0_rtx) \
1080: { cc_status.flags = 0; \
1081: cc_status.value1 = SET_DEST (XVECEXP (EXP, 0, 0)); \
1082: cc_status.value2 = SET_SRC (XVECEXP (EXP, 0, 0)); \
1083: } \
1084: else if (GET_CODE (SET_SRC (XVECEXP (EXP, 0, 0))) == CALL) \
1085: { /* all bets are off */ CC_STATUS_INIT; } \
1086: else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == REG) \
1087: { if (cc_status.value1 \
1088: && reg_overlap_mentioned_p (SET_DEST (XVECEXP (EXP, 0, 0)), cc_status.value1)) \
1089: cc_status.value1 = 0; \
1090: if (cc_status.value2 \
1091: && reg_overlap_mentioned_p (SET_DEST (XVECEXP (EXP, 0, 0)), cc_status.value2)) \
1092: cc_status.value2 = 0; \
1093: } \
1094: else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == MEM) \
1095: { rtx x = cc_status.mdep; int know = cc_status.flags & CC_KNOW_HI_G1; \
1096: CC_STATUS_INIT; \
1097: if (x && know) \
1098: { cc_status.mdep = x; cc_status.flags |= CC_KNOW_HI_G1; } \
1099: } \
1100: } \
1101: else if (GET_CODE (EXP) == PARALLEL) \
1102: /* insn-peep has changed this insn beyond recognition
1103: by NOTICE_UPDATE_CC. However, we know it is either
1104: a call or a branch with a delay slot filled, so we can
1105: give up on knowing condition codes in any case. */ \
1106: { CC_STATUS_INIT; } \
1107: else if (GET_CODE (EXP) == CALL) \
1108: { /* all bets are off */ CC_STATUS_INIT; } \
1109: }
1110:
1111: /* Control the assembler format that we output. */
1112:
1113: /* Output at beginning of assembler file. */
1114:
1115: #define ASM_FILE_START(file)
1116:
1117: /* Output to assembler file text saying following lines
1118: may contain character constants, extra white space, comments, etc. */
1119:
1120: #define ASM_APP_ON ""
1121:
1122: /* Output to assembler file text saying following lines
1123: no longer contain unusual constructs. */
1124:
1125: #define ASM_APP_OFF ""
1126:
1127: /* Output before read-only data. */
1128:
1129: #define TEXT_SECTION_ASM_OP ".text"
1130:
1131: /* Output before writable data. */
1132:
1133: #define DATA_SECTION_ASM_OP ".data"
1134:
1135: /* How to refer to registers in assembler output.
1136: This sequence is indexed by compiler's hard-register-number (see above). */
1137:
1138: #define REGISTER_NAMES \
1139: {"%g0", "%g1", "%g2", "%g3", "%g4", "%g5", "%g6", "%g7", \
1140: "%o0", "%o1", "%o2", "%o3", "%o4", "%o5", "%sp", "%o7", \
1141: "%l0", "%l1", "%l2", "%l3", "%l4", "%l5", "%l6", "%l7", \
1142: "%i0", "%i1", "%i2", "%i3", "%i4", "%i5", "%fp", "%i7", \
1143: "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7", \
1144: "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15", \
1145: "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23", \
1146: "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31"} \
1147:
1148: /* How to renumber registers for dbx and gdb. */
1149:
1150: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1151:
1152: /* On Sun 4, this limit is 2048. We use 1500 to be safe,
1153: since the length can run past this up to a continuation point. */
1154: #define DBX_CONTIN_LENGTH 1500
1155:
1156: /* This is how to output a note to DBX telling it the line number
1157: to which the following sequence of instructions corresponds.
1158:
1159: This is needed for SunOS 4.0, and should not hurt for 3.2
1160: versions either. */
1161: #define ASM_OUTPUT_SOURCE_LINE(file, line) \
1162: { static int sym_lineno = 1; \
1163: fprintf (file, ".stabn 68,0,%d,LM%d\nLM%d:\n", \
1164: line, sym_lineno, sym_lineno); \
1165: sym_lineno += 1; }
1166:
1167: /* This is how to output the definition of a user-level label named NAME,
1168: such as the label on a static function or variable NAME. */
1169:
1170: #define ASM_OUTPUT_LABEL(FILE,NAME) \
1171: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1172:
1173: /* This is how to output a command to make the user-level label named NAME
1174: defined for reference from other files. */
1175:
1176: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1177: do { fputs (".global ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1178:
1179: /* This is how to output a reference to a user-level label named NAME.
1180: `assemble_name' uses this. */
1181:
1182: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1183: fprintf (FILE, "_%s", NAME)
1184:
1185: /* This is how to output an internal numbered label where
1186: PREFIX is the class of label and NUM is the number within the class. */
1187:
1188: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1189: fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1190:
1191: /* This is how to store into the string LABEL
1192: the symbol_ref name of an internal numbered label where
1193: PREFIX is the class of label and NUM is the number within the class.
1194: This is suitable for output with `assemble_name'. */
1195:
1196: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1197: sprintf (LABEL, "*%s%d", PREFIX, NUM)
1198:
1199: /* This is how to output an assembler line defining a `double' constant. */
1200:
1201: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1202: (isinf ((VALUE)) \
1203: ? fprintf (FILE, "\t.double 0r%s99e999\n", ((VALUE) > 0 ? "" : "-")) \
1204: : fprintf (FILE, "\t.double 0r%.20e\n", (VALUE)))
1205:
1206: /* This is how to output an assembler line defining a `float' constant. */
1207:
1208: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1209: (isinf ((VALUE)) \
1210: ? fprintf (FILE, "\t.single 0r%s99e999\n", ((VALUE) > 0 ? "" : "-")) \
1211: : fprintf (FILE, "\t.single 0r%.20e\n", (VALUE)))
1212:
1213: /* This is how to output an assembler line defining an `int' constant. */
1214:
1215: #define ASM_OUTPUT_INT(FILE,VALUE) \
1216: ( fprintf (FILE, "\t.word "), \
1217: output_addr_const (FILE, (VALUE)), \
1218: fprintf (FILE, "\n"))
1219:
1220: /* Likewise for `char' and `short' constants. */
1221:
1222: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1223: ( fprintf (FILE, "\t.half "), \
1224: output_addr_const (FILE, (VALUE)), \
1225: fprintf (FILE, "\n"))
1226:
1227: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1228: ( fprintf (FILE, "\t.byte "), \
1229: output_addr_const (FILE, (VALUE)), \
1230: fprintf (FILE, "\n"))
1231:
1232: /* This is how to output an assembler line for a numeric constant byte. */
1233:
1234: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1235: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1236:
1237: /* This is how to output an element of a case-vector that is absolute. */
1238:
1239: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1240: fprintf (FILE, "\t.word L%d\n", VALUE)
1241:
1242: /* This is how to output an element of a case-vector that is relative.
1243: (SPARC does not use such vectors,
1244: but we must define this macro anyway.) */
1245:
1246: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1247: fprintf (FILE, "\t.word L%d-L%d\n", VALUE, REL)
1248:
1249: /* This is how to output an assembler line
1250: that says to advance the location counter
1251: to a multiple of 2**LOG bytes. */
1252:
1253: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1254: if ((LOG) != 0) \
1255: fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1256:
1257: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1258: fprintf (FILE, "\t.skip %d\n", (SIZE))
1259:
1260: /* This says how to output an assembler line
1261: to define a global common symbol. */
1262:
1263: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1264: ( fputs (".global ", (FILE)), \
1265: assemble_name ((FILE), (NAME)), \
1266: fputs ("\n.common ", (FILE)), \
1267: assemble_name ((FILE), (NAME)), \
1268: fprintf ((FILE), ",%d,\"bss\"\n", (ROUNDED)))
1269:
1270: /* This says how to output an assembler line
1271: to define a local common symbol. */
1272:
1273: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1274: ( fputs ("\n.reserve ", (FILE)), \
1275: assemble_name ((FILE), (NAME)), \
1276: fprintf ((FILE), ",%d,\"bss\"\n", (ROUNDED)))
1277:
1278: /* Store in OUTPUT a string (made with alloca) containing
1279: an assembler-name for a local static variable named NAME.
1280: LABELNO is an integer which is different for each call. */
1281:
1282: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1283: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1284: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1285:
1286: /* Define the parentheses used to group arithmetic operations
1287: in assembler code. */
1288:
1289: #define ASM_OPEN_PAREN "("
1290: #define ASM_CLOSE_PAREN ")"
1291:
1292: /* Define results of standard character escape sequences. */
1293: #define TARGET_BELL 007
1294: #define TARGET_BS 010
1295: #define TARGET_TAB 011
1296: #define TARGET_NEWLINE 012
1297: #define TARGET_VT 013
1298: #define TARGET_FF 014
1299: #define TARGET_CR 015
1300:
1301: /* Print operand X (an rtx) in assembler syntax to file FILE.
1302: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1303: For `%' followed by punctuation, CODE is the punctuation and X is null.
1304:
1305: On SPARC, the CODE can be `r', meaning this is a register-only operand
1306: and an immediate zero should be represented as `r0'.
1307: It can also be `m', meaning that X is a memory reference but print
1308: its address as a non-memory operand. */
1309:
1310: #define PRINT_OPERAND(FILE, X, CODE) \
1311: { if (GET_CODE (X) == REG) \
1312: fprintf (FILE, "%s", reg_names[REGNO (X)]); \
1313: else if ((CODE) == 'm') \
1314: output_address (XEXP (X, 0)); \
1315: else if (GET_CODE (X) == MEM) \
1316: { \
1317: fputc ('[', FILE); \
1318: output_address (XEXP (X, 0)); \
1319: fputc (']', FILE); \
1320: } \
1321: else if (GET_CODE (X) == CONST_DOUBLE) \
1322: abort (); \
1323: else if ((CODE) == 'r' && (X) == const0_rtx) \
1324: fprintf (FILE, "%%g0"); \
1325: else if ((CODE) == 'C') switch (GET_CODE (X)) \
1326: { \
1327: case EQ: fputs ("e", FILE); break; \
1328: case NE: fputs ("ne", FILE); break; \
1329: case GT: fputs ("g", FILE); break; \
1330: case GE: fputs ("ge", FILE); break; \
1331: case LT: fputs ("l", FILE); break; \
1332: case LE: fputs ("le", FILE); break; \
1333: case GTU: fputs ("gu", FILE); break; \
1334: case GEU: fputs ("geu", FILE); break; \
1335: case LTU: fputs ("lu", FILE); break; \
1336: case LEU: fputs ("leu", FILE); break; \
1337: } \
1338: else if ((CODE) == 'N') switch (GET_CODE (X)) \
1339: { \
1340: case EQ: fputs ("ne", FILE); break; \
1341: case NE: fputs ("e", FILE); break; \
1342: case GT: fputs ("le", FILE); break; \
1343: case GE: fputs ("l", FILE); break; \
1344: case LT: fputs ("ge", FILE); break; \
1345: case LE: fputs ("g", FILE); break; \
1346: case GTU: fputs ("leu", FILE); break; \
1347: case GEU: fputs ("lu", FILE); break; \
1348: case LTU: fputs ("geu", FILE); break; \
1349: case LEU: fputs ("gu", FILE); break; \
1350: } \
1351: else if ((CODE) == 'F') switch (GET_CODE (X)) \
1352: { \
1353: case EQ: fputs ("ne", FILE); break; \
1354: case NE: fputs ("e", FILE); break; \
1355: case GT: fputs ("ule", FILE); break; \
1356: case GE: fputs ("ul", FILE); break; \
1357: case LT: fputs ("uge", FILE); break; \
1358: case LE: fputs ("ug", FILE); break; \
1359: default: abort (); \
1360: } \
1361: else { output_addr_const (FILE, X); }}
1362:
1363: /* Print a memory address as an operand to reference that memory location. */
1364:
1365: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1366: { register rtx base, index = 0; \
1367: int offset = 0; \
1368: register rtx addr = ADDR; \
1369: if (GET_CODE (addr) == REG) \
1370: { \
1371: fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1372: } \
1373: else if (GET_CODE (addr) == PLUS) \
1374: { \
1375: if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1376: offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1);\
1377: else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1378: offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0);\
1379: else \
1380: base = XEXP (addr, 0), index = XEXP (addr, 1); \
1381: fprintf (FILE, "%s", reg_names[REGNO (base)]); \
1382: if (index == 0) \
1383: fprintf (FILE, "%+d", offset); \
1384: else \
1385: fprintf (FILE, "+%s", reg_names[REGNO (index)]); \
1386: } \
1387: else \
1388: { \
1389: output_addr_const (FILE, addr); \
1390: } \
1391: }
1392:
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