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1.1 root 1: /* Definitions of target machine for GNU compiler, for Sun SPARC.
2: Copyright (C) 1988 Free Software Foundation, Inc.
3: Contributed by Michael Tiemann ([email protected]).
4:
5: This file is part of GNU CC.
6:
7: GNU CC is free software; you can redistribute it and/or modify
8: it under the terms of the GNU General Public License as published by
9: the Free Software Foundation; either version 1, or (at your option)
10: any later version.
11:
12: GNU CC is distributed in the hope that it will be useful,
13: but WITHOUT ANY WARRANTY; without even the implied warranty of
14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15: GNU General Public License for more details.
16:
17: You should have received a copy of the GNU General Public License
18: along with GNU CC; see the file COPYING. If not, write to
19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20:
21: /* Note that some other tm- files include this one and then override
22: many of the definitions that relate to assembler syntax. */
23:
24: /* Specify library to handle `-a' basic block profiling. */
25:
26: #define LIB_SPEC "%{a:/usr/lib/bb_link.o} \
27: %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p} "
28:
29: /* Provide required defaults for linker -e and -d switches.
30: Also, it is hard to debug with shared libraries,
31: so don't use them if going to debug. */
32:
33: #define LINK_SPEC "%{!e*:-e start} -dc -dp %{g:-Bstatic} %{static:-Bstatic} %{-Bstatic}"
34:
35: /* Special flags to the Sun-4 assembler when using pipe for input. */
36:
37: #define ASM_SPEC " %{pipe:-} "
38:
39: /* Prevent error on `-sun4' option. */
40:
41: #define CC1_SPEC "%{sun4:}"
42:
43: /* Names to predefine in the preprocessor for this target machine. */
44:
45: #define CPP_PREDEFINES "-Dsparc -Dsun -Dunix"
46:
47: /* Print subsidiary information on the compiler version in use. */
48:
49: #define TARGET_VERSION fprintf (stderr, " (sparc)");
50:
51: /* Generate DBX debugging information. */
52:
53: #define DBX_DEBUGGING_INFO
54:
55: /* Run-time compilation parameters selecting different hardware subsets. */
56:
57: extern int target_flags;
58:
59: /* Nonzero if we should generate code to use the fpu. */
60: #define TARGET_FPU (target_flags & 1)
61:
62: /* Nonzero if we should use FUNCTION_EPILOGUE. Otherwise, we
63: use fast return insns, but lose some generality. */
64: #define TARGET_EPILOGUE (target_flags & 2)
65:
66: /* Nonzero if we expect to be passed through the Sun
67: optimizing assembler. This requires us to generate
68: code which we otherwise would not. For example,
69: calls via pointers-to-functions must be output
70: specially because Sun assemble does not do proper flow
71: analysis for this case. */
72: #define TARGET_SUN_ASM (target_flags & 4)
73:
74: /* Nonzero if we should do eager peepholes for conditional branch
75: scheduling. */
76: #define TARGET_EAGER (target_flags & 8)
77:
78: /* Macro to define tables used to set the flags.
79: This is a list in braces of pairs in braces,
80: each pair being { "NAME", VALUE }
81: where VALUE is the bits to set or minus the bits to clear.
82: An empty string NAME is used to identify the default VALUE. */
83:
84: #define TARGET_SWITCHES \
85: { {"fpu", 1}, \
86: {"soft-float", -1}, \
87: {"epilogue", 2}, \
88: {"no-epilogue", -2}, \
89: {"sun-asm", 4}, \
90: {"eager", 8}, \
91: { "", TARGET_DEFAULT}}
92:
93: #define TARGET_DEFAULT 3
94:
95: /* target machine storage layout */
96:
97: /* Define this if most significant bit is lowest numbered
98: in instructions that operate on numbered bit-fields. */
99: #define BITS_BIG_ENDIAN
100:
101: /* Define this if most significant byte of a word is the lowest numbered. */
102: /* This is true on the SPARC. */
103: #define BYTES_BIG_ENDIAN
104:
105: /* Define this if most significant word of a multiword number is numbered. */
106: /* For SPARC we can decide arbitrarily
107: since there are no machine instructions for them. */
108: /* #define WORDS_BIG_ENDIAN */
109:
110: /* number of bits in an addressible storage unit */
111: #define BITS_PER_UNIT 8
112:
113: /* Width in bits of a "word", which is the contents of a machine register.
114: Note that this is not necessarily the width of data type `int';
115: if using 16-bit ints on a 68000, this would still be 32.
116: But on a machine with 16-bit registers, this would be 16. */
117: #define BITS_PER_WORD 32
118:
119: /* Width of a word, in units (bytes). */
120: #define UNITS_PER_WORD 4
121:
122: /* Width in bits of a pointer.
123: See also the macro `Pmode' defined below. */
124: #define POINTER_SIZE 32
125:
126: /* Allocation boundary (in *bits*) for storing pointers in memory. */
127: #define POINTER_BOUNDARY 32
128:
129: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
130: #define PARM_BOUNDARY 32
131:
132: /* Boundary (in *bits*) on which stack pointer should be aligned. */
133: #define STACK_BOUNDARY 64
134:
135: /* Allocation boundary (in *bits*) for the code of a function. */
136: #define FUNCTION_BOUNDARY 32
137:
138: /* Alignment of field after `int : 0' in a structure. */
139: #define EMPTY_FIELD_BOUNDARY 32
140:
141: /* Every structure's size must be a multiple of this. */
142: #define STRUCTURE_SIZE_BOUNDARY 8
143:
144: /* A bitfield declared as `int' forces `int' alignment for the struct. */
145: #define PCC_BITFIELD_TYPE_MATTERS
146:
147: /* No data type wants to be aligned rounder than this. */
148: #define BIGGEST_ALIGNMENT 64
149:
150: /* Define this if move instructions will actually fail to work
151: when given unaligned data. */
152: #define STRICT_ALIGNMENT
153:
154: /* Things that must be doubleword aligned cannot go in the text section,
155: because the linker fails to align the text section enough!
156: Put them in the data section. */
157: #define MAX_TEXT_ALIGN 32
158:
159: #define SELECT_SECTION(T) \
160: { \
161: if (TREE_CODE (T) == VAR_DECL) \
162: { \
163: if (TREE_READONLY (T) && ! TREE_VOLATILE (T) \
164: && DECL_ALIGN (T) <= MAX_TEXT_ALIGN) \
165: text_section (); \
166: else \
167: data_section (); \
168: } \
169: if (*tree_code_type[(int) TREE_CODE (T)] == 'c') \
170: { \
171: if ((TREE_CODE (T) == STRING_CST && flag_writable_strings) \
172: || TYPE_ALIGN (TREE_TYPE (T)) > MAX_TEXT_ALIGN) \
173: data_section (); \
174: else \
175: text_section (); \
176: } \
177: }
178:
1.1.1.2 ! root 179: /* Use text section for a constant
! 180: unless we need more alignment than that offers. */
1.1 root 181: #define SELECT_RTX_SECTION(MODE, X) \
182: { \
1.1.1.2 ! root 183: if (GET_MODE_BITSIZE (MODE) <= MAX_TEXT_ALIGN)\
1.1 root 184: text_section (); \
185: else \
186: data_section (); \
187: }
188:
189: /* Standard register usage. */
190:
191: /* Number of actual hardware registers.
192: The hardware registers are assigned numbers for the compiler
193: from 0 to just below FIRST_PSEUDO_REGISTER.
194: All registers that the compiler knows about must be given numbers,
195: even those that are not normally considered general registers.
196:
197: SPARC has 32 fullword registers and 32 floating point registers. */
198:
199: #define FIRST_PSEUDO_REGISTER 64
200:
201: /* 1 for registers that have pervasive standard uses
202: and are not available for the register allocator.
203: On SPARC, this includes all the global registers
204: (registers r[0] through r[7]) and the callee return
205: address register, r[15]. */
206: #define FIXED_REGISTERS \
207: {1, 1, 1, 1, 1, 1, 1, 1, \
208: 0, 0, 0, 0, 0, 0, 1, 1, \
209: 0, 0, 0, 0, 0, 0, 0, 0, \
210: 0, 0, 0, 0, 0, 0, 1, 1, \
211: \
212: 1, 1, 0, 0, 0, 0, 0, 0, \
213: 0, 0, 0, 0, 0, 0, 0, 0, \
214: 0, 0, 0, 0, 0, 0, 0, 0, \
215: 0, 0, 0, 0, 0, 0, 0, 0}
216:
217:
218: /* 1 for registers not available across function calls.
219: These must include the FIXED_REGISTERS and also any
220: registers that can be used without being saved.
221: The latter must include the registers where values are returned
222: and the register where structure-value addresses are passed.
223: Aside from that, you can include as many other registers as you like. */
224: #define CALL_USED_REGISTERS \
225: {1, 1, 1, 1, 1, 1, 1, 1, \
226: 1, 1, 1, 1, 1, 1, 1, 1, \
227: 0, 0, 0, 0, 0, 0, 0, 0, \
228: 0, 0, 0, 0, 0, 0, 1, 1, \
229: \
230: 1, 1, 1, 1, 1, 1, 1, 1, \
231: 1, 1, 1, 1, 1, 1, 1, 1, \
232: 1, 1, 1, 1, 1, 1, 1, 1, \
233: 1, 1, 1, 1, 1, 1, 1, 1}
234:
235: /* Return number of consecutive hard regs needed starting at reg REGNO
236: to hold something of mode MODE.
237: This is ordinarily the length in words of a value of mode MODE
238: but can be less for certain modes in special long registers.
239:
240: On SPARC, ordinary registers hold 32 bits worth;
241: this means both integer and floating point registers. */
242: #define HARD_REGNO_NREGS(REGNO, MODE) \
243: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
244:
245: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
246: On SPARC, the cpu registers can hold any mode but the float registers
247: can only hold SFmode or DFmode. */
248: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
249: ((REGNO) < 32 ? ((GET_MODE_SIZE (MODE) <= 4) ? 1 : ((REGNO) & 1) == 0) : \
250: ((MODE) == SFmode ? 1 : (MODE) == DFmode && ((REGNO) & 1) == 0))
251:
252: /* Value is 1 if it is a good idea to tie two pseudo registers
253: when one has mode MODE1 and one has mode MODE2.
254: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
255: for any hard reg, then this must be 0 for correct output. */
256: #define MODES_TIEABLE_P(MODE1, MODE2) \
257: (((MODE1) == SFmode || (MODE1) == DFmode) \
258: == ((MODE2) == SFmode || (MODE2) == DFmode))
259:
260: /* Specify the registers used for certain standard purposes.
261: The values of these macros are register numbers. */
262:
263: /* SPARC pc isn't overloaded on a register that the compiler knows about. */
264: /* #define PC_REGNUM */
265:
266: /* Register to use for pushing function arguments. */
267: #define STACK_POINTER_REGNUM 14
268:
269: /* Actual top-of-stack address is 92 greater
270: than the contents of the stack pointer register. */
271: #define STACK_POINTER_OFFSET 92
272:
273: /* Base register for access to local variables of the function. */
274: #define FRAME_POINTER_REGNUM 30
275:
276: /* Value should be nonzero if functions must have frame pointers.
277: Zero means the frame pointer need not be set up (and parms
278: may be accessed via the stack pointer) in functions that seem suitable.
279: This is computed in `reload', in reload1.c. */
280: #define FRAME_POINTER_REQUIRED 1
281:
282: /* Base register for access to arguments of the function. */
283: #define ARG_POINTER_REGNUM 30
284:
285: /* Register in which static-chain is passed to a function. */
286: /* ??? */
287: #define STATIC_CHAIN_REGNUM 1
288:
289:
290: /* Functions which return large structures get the address
291: to place the wanted value at offset 64 from the frame. */
292: #define STRUCT_VALUE_OFFSET 64 /* Used only in other #defines in this file. */
293: #define STRUCT_VALUE \
294: gen_rtx (MEM, Pmode, \
295: gen_rtx (PLUS, SImode, stack_pointer_rtx, \
296: gen_rtx (CONST_INT, VOIDmode, STRUCT_VALUE_OFFSET)))
297: #define STRUCT_VALUE_INCOMING \
298: gen_rtx (MEM, Pmode, \
299: gen_rtx (PLUS, SImode, frame_pointer_rtx, \
300: gen_rtx (CONST_INT, VOIDmode, STRUCT_VALUE_OFFSET)))
301:
302: /* Define the classes of registers for register constraints in the
303: machine description. Also define ranges of constants.
304:
305: One of the classes must always be named ALL_REGS and include all hard regs.
306: If there is more than one class, another class must be named NO_REGS
307: and contain no registers.
308:
309: The name GENERAL_REGS must be the name of a class (or an alias for
310: another name such as ALL_REGS). This is the class of registers
311: that is allowed by "g" or "r" in a register constraint.
312: Also, registers outside this class are allocated only when
313: instructions express preferences for them.
314:
315: The classes must be numbered in nondecreasing order; that is,
316: a larger-numbered class must never be contained completely
317: in a smaller-numbered class.
318:
319: For any two classes, it is very desirable that there be another
320: class that represents their union. */
321:
322: /* The SPARC has two kinds of registers, general and floating point. */
323:
324: enum reg_class { NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES };
325:
326: #define N_REG_CLASSES (int) LIM_REG_CLASSES
327:
328: /* Give names of register classes as strings for dump file. */
329:
330: #define REG_CLASS_NAMES \
331: {"NO_REGS", "GENERAL_REGS", "FP_REGS", "ALL_REGS" }
332:
333: /* Define which registers fit in which classes.
334: This is an initializer for a vector of HARD_REG_SET
335: of length N_REG_CLASSES. */
336:
337: #define REG_CLASS_CONTENTS {{0, 0}, {-1, 0}, {0, -1}, {-1, -1}}
338:
339: /* The same information, inverted:
340: Return the class number of the smallest class containing
341: reg number REGNO. This could be a conditional expression
342: or could index an array. */
343:
344: #define REGNO_REG_CLASS(REGNO) \
345: ((REGNO) >= 32 ? FP_REGS : GENERAL_REGS)
346:
347: /* The class value for index registers, and the one for base regs. */
348: #define INDEX_REG_CLASS GENERAL_REGS
349: #define BASE_REG_CLASS GENERAL_REGS
350:
351: /* Get reg_class from a letter such as appears in the machine description. */
352:
353: #define REG_CLASS_FROM_LETTER(C) \
354: ((C) == 'f' ? FP_REGS : NO_REGS)
355:
356: /* The letters I, J, K, L and M in a register constraint string
357: can be used to stand for particular ranges of immediate operands.
358: This macro defines what the ranges are.
359: C is the letter, and VALUE is a constant value.
360: Return 1 if VALUE is in the range specified by C.
361:
362: For SPARC, `I' is used for the range of constants an insn
363: can actually contain.
364: `J' is used for the range which is just zero (since that is R0).
365: `K' is used for the 5-bit operand of a compare insns. */
366:
367: #define SMALL_INT(X) ((unsigned) (INTVAL (X) + 0x1000) < 0x2000)
368:
369: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
370: ((C) == 'I' ? (unsigned) ((VALUE) + 0x1000) < 0x2000 \
371: : (C) == 'J' ? (VALUE) == 0 \
372: : (C) == 'K' ? (unsigned) (VALUE) < 0x20 \
373: : 0)
374:
375: /* Similar, but for floating constants, and defining letters G and H.
376: Here VALUE is the CONST_DOUBLE rtx itself. */
377:
378: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
379: ((C) == 'G' && XINT (VALUE, 0) == 0 && XINT (VALUE, 1) == 0)
380:
381: /* Given an rtx X being reloaded into a reg required to be
382: in class CLASS, return the class of reg to actually use.
383: In general this is just CLASS; but on some machines
384: in some cases it is preferable to use a more restrictive class. */
385: #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
386:
387: /* Return the maximum number of consecutive registers
388: needed to represent mode MODE in a register of class CLASS. */
389: /* On SPARC, this is the size of MODE in words,
390: except in the FP regs, where a single reg is always enough. */
391: #define CLASS_MAX_NREGS(CLASS, MODE) \
392: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
393:
394: /* Stack layout; function entry, exit and calling. */
395:
396: /* Define this if pushing a word on the stack
397: makes the stack pointer a smaller address. */
398: #define STACK_GROWS_DOWNWARD
399:
400: /* Define this if the nominal address of the stack frame
401: is at the high-address end of the local variables;
402: that is, each additional local variable allocated
403: goes at a more negative offset in the frame. */
404: #define FRAME_GROWS_DOWNWARD
405:
406: /* Offset within stack frame to start allocating local variables at.
407: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
408: first local allocated. Otherwise, it is the offset to the BEGINNING
409: of the first local allocated. */
410: #define STARTING_FRAME_OFFSET -16
411:
412: /* If we generate an insn to push BYTES bytes,
413: this says how many the stack pointer really advances by.
414: On SPARC, don't define this because there are no push insns. */
415: /* #define PUSH_ROUNDING(BYTES) */
416:
417: /* Offset of first parameter from the argument pointer register value.
418: This is 64 for the ins and locals, plus 4 for the struct-return reg
419: if this function isn't going to use it. */
420: #define FIRST_PARM_OFFSET(FNDECL) \
421: (DECL_MODE (DECL_RESULT (fndecl)) == BLKmode \
422: ? STRUCT_VALUE_OFFSET : STRUCT_VALUE_OFFSET + 4)
423:
424: /* Offset from top-of-stack address to location to store the
425: function parameter if it can't go in a register.
426: Addresses for following parameters are computed relative to this one. */
427: #define FIRST_PARM_CALLER_OFFSET(FNDECL) \
428: (STRUCT_VALUE_OFFSET + 4 - STACK_POINTER_OFFSET)
429:
430: /* When a parameter is passed in a register, stack space is still
431: allocated for it. */
432: #define REG_PARM_STACK_SPACE
433:
434: /* Value is 1 if returning from a function call automatically
435: pops the arguments described by the number-of-args field in the call.
436: FUNTYPE is the data type of the function (as a tree),
437: or for a library call it is an identifier node for the subroutine name. */
438:
439: #define RETURN_POPS_ARGS(FUNTYPE) 0
440:
441: /* Some subroutine macros specific to this machine. */
442: #define BASE_RETURN_VALUE_REG(MODE) \
443: ((MODE) == SFmode || (MODE) == DFmode ? 32 : 8)
444: #define BASE_OUTGOING_VALUE_REG(MODE) \
445: ((MODE) == SFmode || (MODE) == DFmode ? 32 : 24)
446: #define BASE_PASSING_ARG_REG(MODE) (8)
447: #define BASE_INCOMING_ARG_REG(MODE) (24)
448:
449: /* Define how to find the value returned by a function.
450: VALTYPE is the data type of the value (as a tree).
451: If the precise function being called is known, FUNC is its FUNCTION_DECL;
452: otherwise, FUNC is 0. */
453:
454: /* On SPARC the value is found in the first "output" register. */
455:
456: #define FUNCTION_VALUE(VALTYPE, FUNC) \
457: gen_rtx (REG, TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG (TYPE_MODE (VALTYPE)))
458:
459: /* But the called function leaves it in the first "input" register. */
460:
461: #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \
462: gen_rtx (REG, TYPE_MODE (VALTYPE), BASE_OUTGOING_VALUE_REG (TYPE_MODE (VALTYPE)))
463:
464: /* Define how to find the value returned by a library function
465: assuming the value has mode MODE. */
466:
467: #define LIBCALL_VALUE(MODE) \
468: gen_rtx (REG, MODE, BASE_RETURN_VALUE_REG (MODE))
469:
470: /* 1 if N is a possible register number for a function value
471: as seen by the caller.
472: On SPARC, the first "output" reg is used for integer values,
473: and the first floating point register is used for floating point values. */
474:
475: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 8 || (N) == 32)
476:
477: /* 1 if N is a possible register number for function argument passing.
478: On SPARC, these are the "output" registers. */
479:
480: #define FUNCTION_ARG_REGNO_P(N) ((N) < 14 && (N) > 7)
481:
482: /* Define a data type for recording info about an argument list
483: during the scan of that argument list. This data type should
484: hold all necessary information about the function itself
485: and about the args processed so far, enough to enable macros
486: such as FUNCTION_ARG to determine where the next arg should go.
487:
488: On SPARC, this is a single integer, which is a number of words
489: of arguments scanned so far (including the invisible argument,
490: if any, which holds the structure-value-address).
491: Thus 7 or more means all following args should go on the stack. */
492:
493: #define CUMULATIVE_ARGS int
494:
495: /* Define the number of register that can hold parameters.
496: This macro is used only in other macro definitions below. */
497: #define NPARM_REGS 6
498:
499: /* Initialize a variable CUM of type CUMULATIVE_ARGS
500: for a call to a function whose data type is FNTYPE.
501: For a library call, FNTYPE is 0.
502:
503: On SPARC, the offset always starts at 0: the first parm reg is always
504: the same reg. */
505:
506: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE) ((CUM) = 0)
507:
508: /* Update the data in CUM to advance over an argument
509: of mode MODE and data type TYPE.
510: (TYPE is null for libcalls where that information may not be available.) */
511:
512: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
513: ((CUM) += ((MODE) != BLKmode \
514: ? (GET_MODE_SIZE (MODE) + 3) / 4 \
515: : (int_size_in_bytes (TYPE) + 3) / 4))
516:
517: /* Determine where to put an argument to a function.
518: Value is zero to push the argument on the stack,
519: or a hard register in which to store the argument.
520:
521: MODE is the argument's machine mode.
522: TYPE is the data type of the argument (as a tree).
523: This is null for libcalls where that information may
524: not be available.
525: CUM is a variable of type CUMULATIVE_ARGS which gives info about
526: the preceding args and about the function being called.
527: NAMED is nonzero if this argument is a named parameter
528: (otherwise it is an extra parameter matching an ellipsis). */
529:
530: /* On SPARC the first six args are normally in registers
531: and the rest are pushed. Any arg that starts within the first 6 words
532: is at least partially passed in a register unless its data type forbids. */
533:
534: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
535: ((CUM) < NPARM_REGS && ((TYPE)==0 || ! TREE_ADDRESSABLE ((tree)(TYPE))) \
536: ? gen_rtx (REG, (MODE), BASE_PASSING_ARG_REG (MODE) + (CUM)) : 0)
537:
538: /* Define where a function finds its arguments.
539: This is different from FUNCTION_ARG because of register windows. */
540:
541: #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
542: ((CUM) < NPARM_REGS && ((TYPE)==0 || ! TREE_ADDRESSABLE ((tree)(TYPE))) \
543: ? gen_rtx (REG, (MODE), BASE_INCOMING_ARG_REG (MODE) + (CUM)) : 0)
544:
545: /* For an arg passed partly in registers and partly in memory,
546: this is the number of registers used.
547: For args passed entirely in registers or entirely in memory, zero.
548: Any arg that starts in the first 6 regs but won't entirely fit in them
549: needs partial registers on the Sparc. */
550:
551: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
552: (((CUM) < NPARM_REGS && ((TYPE)==0 || ! TREE_ADDRESSABLE ((tree)(TYPE)))\
553: && ((CUM) \
554: + ((MODE) == BLKmode \
555: ? (int_size_in_bytes (TYPE) + 3) / 4 \
556: : (GET_MODE_SIZE (MODE) + 3) / 4)) - NPARM_REGS > 0) \
557: ? (NPARM_REGS - (CUM)) \
558: : 0)
559:
560: /* Output the label for a function definition. */
561:
562: #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
563: { \
564: extern tree double_type_node, float_type_node; \
565: if (TREE_TYPE (DECL) == float_type_node) \
566: fprintf (FILE, "\t.proc 6\n"); \
567: else if (TREE_TYPE (DECL) == double_type_node) \
568: fprintf (FILE, "\t.proc 7\n"); \
569: else if (TREE_TYPE (DECL) == void_type_node) \
570: fprintf (FILE, "\t.proc 0\n"); \
571: else fprintf (FILE, "\t.proc 1\n"); \
572: ASM_OUTPUT_LABEL (FILE, NAME); \
573: }
574:
575: /* This macro generates the assembly code for function entry.
576: FILE is a stdio stream to output the code to.
577: SIZE is an int: how many units of temporary storage to allocate.
578: Refer to the array `regs_ever_live' to determine which registers
579: to save; `regs_ever_live[I]' is nonzero if register number I
580: is ever used in the function. This macro is responsible for
581: knowing which registers should not be saved even if used. */
582:
583: /* On SPARC, move-double insns between fpu and cpu need an 8-byte block
584: of memory. If any fpu reg is used in the function, we allocate
585: such a block here, at the bottom of the frame, just in case it's needed.
586:
587: If this function is a leaf procedure, then we may choose not
588: to do a "save" insn. Currently we do this only if it touches
589: the "output" registers. The "local" and "input" registers
590: are off limits. It might be better to allow one such register
591: to go to the stack, but I doubt it. */
592:
593: #define FUNCTION_PROLOGUE(FILE, SIZE) \
594: { \
595: extern char call_used_regs[]; \
596: extern int current_function_pretend_args_size; \
597: extern int frame_pointer_needed; \
598: int fsize = (((SIZE) + 7 - STARTING_FRAME_OFFSET) & -8); \
599: int actual_fsize; \
600: int n_fregs = 0, i; \
601: int n_iregs = 64; \
602: for (i = 32; i < FIRST_PSEUDO_REGISTER; i++) \
603: if (regs_ever_live[i] && ! call_used_regs[i]) \
604: n_fregs++; \
605: for (i = 16; i < 32; i++) \
606: if (regs_ever_live[i]) { n_iregs = 96; break; } \
607: fprintf (FILE, "\t!#PROLOGUE# 0\n"); \
608: actual_fsize = fsize + n_iregs + (n_fregs*4+7 & -8); \
609: fsize += current_function_pretend_args_size+7 & -8; \
610: actual_fsize += current_function_pretend_args_size+7 & -8; \
611: if (actual_fsize < 4096) \
612: fprintf (FILE, "\tsave %%sp,-%d,%%sp\n", actual_fsize); \
613: else \
614: { \
615: fprintf (FILE, "\tsethi %%hi(0x%x),%%g1\n\tadd %%g1,%%lo(0x%x),%%g1\n", \
616: -actual_fsize, -actual_fsize); \
617: fprintf (FILE, "\tsave %%sp,%%g1,%%sp\n"); \
618: } \
619: fprintf (FILE, "\t!#PROLOGUE# 1\n"); \
620: if (n_fregs) \
621: { \
622: for (i = 32, n_fregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
623: if (regs_ever_live[i] && ! call_used_regs[i]) \
624: { \
625: if (regs_ever_live[i+1] && ! call_used_regs[i+1]) \
626: fprintf (FILE, "\tstd %s,[%%sp+0x%x]\n", \
627: reg_names[i], n_iregs + 4 * n_fregs), \
628: n_fregs += 2, i += 1; \
629: else \
630: fprintf (FILE, "\tstf %s,[%%sp+0x%x]\n", \
631: reg_names[i], n_iregs + 4 * n_fregs++); \
632: } \
633: } \
634: if (regs_ever_live[32]) \
635: fprintf (FILE, "\tst %s,[%%fp-16]\n\tst %s,[%%fp-12]\n", \
636: reg_names[0], reg_names[0]); \
637: }
638:
639: /* Output assembler code to FILE to increment profiler label # LABELNO
640: for profiling a function entry. */
641:
642: #define FUNCTION_PROFILER(FILE, LABELNO) \
643: fprintf (FILE, "\tsethi %%hi(LP%d),%%o0\n\tcall mcount\n\tor %%lo(LP%d),%%o0,%%o0\n", \
644: (LABELNO), (LABELNO))
645:
646: /* Output assembler code to FILE to initialize this source file's
647: basic block profiling info, if that has not already been done. */
648:
649: #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
650: fprintf (FILE, "\tsethi %%hi(LPBX0),%%o0\n\tld [%%lo(LPBX0)+%%o0],%%o1\n\ttst %%o1\n\tbne LPY%d\n\tnop\n\tcall ___bb_init_func\n\tnop\nLPY%d:\n", \
651: (LABELNO), (LABELNO))
652:
653: /* Output assembler code to FILE to increment the entry-count for
654: the BLOCKNO'th basic block in this source file. */
655:
656: #define BLOCK_PROFILER(FILE, BLOCKNO) \
657: { \
658: int blockn = (BLOCKNO); \
659: fprintf (FILE, "\tsethi %%hi(LPBX2+%d),%%g1\n\tld [%%lo(LPBX2+%d)+%%g1],%%g2\n\
660: \tadd %%g2,1,%%g2\n\tst %%g2,[%%lo(LPBX2+%d)+%%g1]\n", \
661: 4 * blockn, 4 * blockn, 4 * blockn); \
662: CC_STATUS_INIT; /* We have clobbered %g1. Also %g2. */ \
663: }
664:
665: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
666: the stack pointer does not matter. The value is tested only in
667: functions that have frame pointers.
668: No definition is equivalent to always zero. */
669:
670: extern int may_call_alloca;
671: extern int current_function_pretend_args_size;
672:
673: #define EXIT_IGNORE_STACK \
674: (get_frame_size () != 0 \
675: || may_call_alloca || current_function_pretend_args_size)
676:
677: /* This macro generates the assembly code for function exit,
678: on machines that need it. If FUNCTION_EPILOGUE is not defined
679: then individual return instructions are generated for each
680: return statement. Args are same as for FUNCTION_PROLOGUE.
681:
682: The function epilogue should not depend on the current stack pointer!
683: It should use the frame pointer only. This is mandatory because
684: of alloca; we also take advantage of it to omit stack adjustments
685: before returning. */
686:
687: /* This declaration is needed due to traditional/ANSI
688: incompatibilities which cannot be #ifdefed away
689: because they occur inside of macros. Sigh. */
690: extern union tree_node *current_function_decl;
691:
692: #define FUNCTION_EPILOGUE(FILE, SIZE) \
693: { \
694: extern char call_used_regs[]; \
695: extern int may_call_alloca; \
696: extern int current_function_pretend_args_size; \
697: extern int max_pending_stack_adjust; \
698: extern int frame_pointer_needed; \
699: int fsize = (((SIZE) + 7 - STARTING_FRAME_OFFSET) & -8); \
700: int actual_fsize; \
701: int n_fregs = 0, i; \
702: int n_iregs = 64; \
703: for (i = 32, n_fregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
704: if (regs_ever_live[i] && ! call_used_regs[i]) \
705: n_fregs++; \
706: for (i = 16; i < 32; i++) \
707: if (regs_ever_live[i]) { n_iregs = 96; break; } \
708: actual_fsize = fsize + n_iregs + (n_fregs*4+7 & -8); \
709: actual_fsize += current_function_pretend_args_size+7 & -8; \
710: fsize += current_function_pretend_args_size+7 & -8; \
711: if (n_fregs) \
712: { \
713: char *base; \
714: int offset; \
715: if (fsize < 4096) \
716: { base = "%fp"; offset = n_iregs - actual_fsize; } \
717: else \
718: { base = "%g1"; offset = n_iregs; \
719: if (fsize < 4096) \
720: fprintf (FILE, "sethi %%hi(0x%x),%%g1\n\tadd %%g1,%%lo(0x%x),%%g1\n\tadd %%fp,%%g1,%%g1\n", -actual_fsize, -actual_fsize);\
721: } \
722: for (i = 32, n_fregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
723: if (regs_ever_live[i] && ! call_used_regs[i]) \
724: { \
725: if (regs_ever_live[i+1] && ! call_used_regs[i+1]) \
726: fprintf (FILE, "\tldd [%s%+d],%s\n", \
727: base, offset + 4 * n_fregs, \
728: reg_names[i]), \
729: n_fregs += 2, i += 1; \
730: else \
731: fprintf (FILE, "\tldf [%s%+d],%s\n", \
732: base, offset + 4 * n_fregs++, \
733: reg_names[i]); \
734: } \
735: } \
736: fprintf (FILE, "\tret\n\trestore\n"); \
737: }
738:
739: /* If the memory address ADDR is relative to the frame pointer,
740: correct it to be relative to the stack pointer instead.
741: This is for when we don't use a frame pointer.
742: ADDR should be a variable name. */
743:
744: #define FIX_FRAME_POINTER_ADDRESS(ADDR,DEPTH) \
745: { int offset = -1; \
746: rtx regs = stack_pointer_rtx; \
747: if (ADDR == frame_pointer_rtx) \
748: offset = 0; \
749: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx \
750: && GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \
751: offset = INTVAL (XEXP (ADDR, 1)); \
752: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx) \
753: { rtx other_reg = XEXP (ADDR, 1); \
754: offset = 0; \
755: regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
756: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 1) == frame_pointer_rtx) \
757: { rtx other_reg = XEXP (ADDR, 0); \
758: offset = 0; \
759: regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
760: if (offset >= 0) \
761: { int regno; \
762: extern char call_used_regs[]; \
763: for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
764: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
765: offset += 4; \
766: offset -= 4; \
767: ADDR = plus_constant (regs, offset + (DEPTH)); } }
768:
769: /* Addressing modes, and classification of registers for them. */
770:
771: /* #define HAVE_POST_INCREMENT */
772: /* #define HAVE_POST_DECREMENT */
773:
774: /* #define HAVE_PRE_DECREMENT */
775: /* #define HAVE_PRE_INCREMENT */
776:
777: /* Macros to check register numbers against specific register classes. */
778:
779: /* These assume that REGNO is a hard or pseudo reg number.
780: They give nonzero only if REGNO is a hard reg of the suitable class
781: or a pseudo reg currently allocated to a suitable hard reg.
782: Since they use reg_renumber, they are safe only once reg_renumber
783: has been allocated, which happens in local-alloc.c. */
784:
785: #define REGNO_OK_FOR_INDEX_P(REGNO) \
786: ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
787: #define REGNO_OK_FOR_BASE_P(REGNO) \
788: ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
789: #define REGNO_OK_FOR_FP_P(REGNO) \
790: (((REGNO) ^ 0x20) < 32 || (unsigned) (reg_renumber[REGNO] ^ 0x20) < 32)
791:
792: /* Now macros that check whether X is a register and also,
793: strictly, whether it is in a specified class.
794:
795: These macros are specific to the SPARC, and may be used only
796: in code for printing assembler insns and in conditions for
797: define_optimization. */
798:
799: /* 1 if X is an fp register. */
800:
801: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
802:
803: /* Maximum number of registers that can appear in a valid memory address. */
804:
805: #define MAX_REGS_PER_ADDRESS 2
806:
807: /* Recognize any constant value that is a valid address. */
808:
809: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
810:
811: /* Nonzero if the constant value X is a legitimate general operand.
812: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
813:
814: Anything but a CONST_DOUBLE can be made to work. */
815:
816: #define LEGITIMATE_CONSTANT_P(X) \
817: (GET_CODE (X) != CONST_DOUBLE)
818:
819: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
820: and check its validity for a certain class.
821: We have two alternate definitions for each of them.
822: The usual definition accepts all pseudo regs; the other rejects
823: them unless they have been allocated suitable hard regs.
824: The symbol REG_OK_STRICT causes the latter definition to be used.
825:
826: Most source files want to accept pseudo regs in the hope that
827: they will get allocated to the class that the insn wants them to be in.
828: Source files for reload pass need to be strict.
829: After reload, it makes no difference, since pseudo regs have
830: been eliminated by then. */
831:
832: #ifndef REG_OK_STRICT
833:
834: /* Nonzero if X is a hard reg that can be used as an index
835: or if it is a pseudo reg. */
836: #define REG_OK_FOR_INDEX_P(X) (((unsigned) REGNO (X)) - 32 >= 32)
837: /* Nonzero if X is a hard reg that can be used as a base reg
838: or if it is a pseudo reg. */
839: #define REG_OK_FOR_BASE_P(X) (((unsigned) REGNO (X)) - 32 >= 32)
840:
841: #else
842:
843: /* Nonzero if X is a hard reg that can be used as an index. */
844: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
845: /* Nonzero if X is a hard reg that can be used as a base reg. */
846: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
847:
848: #endif
849:
850: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
851: that is a valid memory address for an instruction.
852: The MODE argument is the machine mode for the MEM expression
853: that wants to use this address.
854:
855: On SPARC, the actual legitimate addresses must be REG+REG or REG+SMALLINT.
856: But we can treat a SYMBOL_REF as legitimate if it is part of this
857: function's constant-pool, because such addresses can actually
858: be output as REG+SMALLINT.
859:
860: Try making SYMBOL_REF (and other things which are CONSTANT_ADDRESS_P)
861: a legitimate address, regardless. Because the only insns which can use
862: memory are load or store insns, the added hair in the machine description
863: is not that bad. It should also speed up the compiler by halving the number
864: of insns it must manage for each (MEM (SYMBOL_REF ...)) involved. */
865:
866: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
867: { if (GET_CODE (X) == REG) \
868: { if (REG_OK_FOR_BASE_P (X)) goto ADDR; } \
869: else if (GET_CODE (X) == PLUS) \
870: { \
871: if (GET_CODE (XEXP (X, 0)) == REG \
872: && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
873: { \
874: if (GET_CODE (XEXP (X, 1)) == REG \
875: && REG_OK_FOR_INDEX_P (XEXP (X, 1))) \
876: goto ADDR; \
877: if (GET_CODE (XEXP (X, 1)) == CONST_INT \
878: && INTVAL (XEXP (X, 1)) >= -0x1000 \
879: && INTVAL (XEXP (X, 1)) < 0x1000) \
880: goto ADDR; \
881: } \
882: else if (GET_CODE (XEXP (X, 1)) == REG \
883: && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
884: { \
885: if (GET_CODE (XEXP (X, 0)) == REG \
886: && REG_OK_FOR_INDEX_P (XEXP (X, 0))) \
887: goto ADDR; \
888: if (GET_CODE (XEXP (X, 0)) == CONST_INT \
889: && INTVAL (XEXP (X, 0)) >= -0x1000 \
890: && INTVAL (XEXP (X, 0)) < 0x1000) \
891: goto ADDR; \
892: } \
893: } \
894: else if (CONSTANT_ADDRESS_P (X)) \
895: goto ADDR; \
896: }
897:
898: /* Try machine-dependent ways of modifying an illegitimate address
899: to be legitimate. If we find one, return the new, valid address.
900: This macro is used in only one place: `memory_address' in explow.c.
901:
902: OLDX is the address as it was before break_out_memory_refs was called.
903: In some cases it is useful to look at this to decide what needs to be done.
904:
905: MODE and WIN are passed so that this macro can use
906: GO_IF_LEGITIMATE_ADDRESS.
907:
908: It is always safe for this macro to do nothing. It exists to recognize
909: opportunities to optimize the output. */
910:
911: /* On SPARC, change REG+N into REG+REG, and REG+(X*Y) into REG+REG. */
912:
913: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
914: { if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
915: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
916: copy_to_mode_reg (SImode, XEXP (X, 1))); \
917: if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
918: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
919: copy_to_mode_reg (SImode, XEXP (X, 0))); \
920: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
921: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
922: force_operand (XEXP (X, 0), 0)); \
923: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
924: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
925: force_operand (XEXP (X, 1), 0)); \
926: if (GET_CODE (x) == SYMBOL_REF) \
927: (X) = copy_to_reg (X); \
928: if (memory_address_p (MODE, X)) \
929: goto WIN; }
930:
931: /* Go to LABEL if ADDR (a legitimate address expression)
932: has an effect that depends on the machine mode it is used for.
933: On the SPARC this is never true. */
934:
935: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
936:
937: /* Specify the machine mode that this machine uses
938: for the index in the tablejump instruction. */
939: #define CASE_VECTOR_MODE SImode
940:
941: /* Define this if the tablejump instruction expects the table
942: to contain offsets from the address of the table.
943: Do not define this if the table should contain absolute addresses. */
944: /* #define CASE_VECTOR_PC_RELATIVE */
945:
946: /* Specify the tree operation to be used to convert reals to integers. */
947: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
948:
949: /* This is the kind of divide that is easiest to do in the general case. */
950: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
951:
952: /* Define this as 1 if `char' should by default be signed; else as 0. */
953: #define DEFAULT_SIGNED_CHAR 1
954:
955: /* Max number of bytes we can move from memory to memory
956: in one reasonably fast instruction. */
957: #define MOVE_MAX 4
958:
959: /* Nonzero if access to memory by bytes is slow and undesirable. */
960: #define SLOW_BYTE_ACCESS 0
961:
962: /* We assume that the store-condition-codes instructions store 0 for false
963: and some other value for true. This is the value stored for true. */
964:
965: #define STORE_FLAG_VALUE 1
966:
967: /* When a prototype says `char' or `short', really pass an `int'. */
968: #define PROMOTE_PROTOTYPES
969:
970: /* Define if shifts truncate the shift count
971: which implies one can omit a sign-extension or zero-extension
972: of a shift count. */
973: #define SHIFT_COUNT_TRUNCATED
974:
975: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
976: is done just by pretending it is already truncated. */
977: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
978:
979: /* Specify the machine mode that pointers have.
980: After generation of rtl, the compiler makes no further distinction
981: between pointers and any other objects of this machine mode. */
982: #define Pmode SImode
983:
984: /* A function address in a call instruction
985: is a byte address (for indexing purposes)
986: so give the MEM rtx a byte's mode. */
987: #define FUNCTION_MODE SImode
988:
989: /* Define this if addresses of constant functions
990: shouldn't be put through pseudo regs where they can be cse'd.
991: Desirable on machines where ordinary constants are expensive
992: but a CALL with constant address is cheap. */
993: #define NO_FUNCTION_CSE
994:
995: /* Define subroutines to call to handle multiply and divide.
996: Use the subroutines that Sun's library provides.
997: The `*' prevents an underscore from being prepended by the compiler. */
998:
999: #define DIVSI3_LIBCALL "*.div"
1000: #define UDIVSI3_LIBCALL "*.udiv"
1001: #define MODSI3_LIBCALL "*.rem"
1002: #define UMODSI3_LIBCALL "*.urem"
1003: #define MULSI3_LIBCALL "*.mul"
1004: #define UMULSI3_LIBCALL "*.umul"
1005:
1006: /* Compute the cost of computing a constant rtl expression RTX
1007: whose rtx-code is CODE. The body of this macro is a portion
1008: of a switch statement. If the code is computed here,
1009: return it with a return statement. Otherwise, break from the switch. */
1010:
1011: #define CONST_COSTS(RTX,CODE) \
1012: case CONST_INT: \
1013: if (INTVAL (RTX) < 0x1000 && INTVAL (RTX) >= -0x1000) return 0; \
1014: case CONST: \
1015: case LABEL_REF: \
1016: case SYMBOL_REF: \
1017: return 2; \
1018: case CONST_DOUBLE: \
1019: return 4;
1020:
1021: /* Tell final.c how to eliminate redundant test instructions. */
1022:
1023: /* Here we define machine-dependent flags and fields in cc_status
1024: (see `conditions.h'). */
1025:
1026: /* This holds the value sourcing %hi(%g1). We keep this info
1027: around so that mem/mem ops, such as increment and decrement,
1028: etc, can be performed reasonably. */
1029: #define CC_STATUS_MDEP rtx
1030:
1031: /* Nonzero if the results of the previous comparison are
1032: in the floating point condition code register. */
1033:
1034: #define CC_IN_FCCR 04000
1035:
1036: /* Nonzero if the results of the previous comparison are
1037: int the coprocessor's condition code register. */
1038:
1039: #define CC_IN_CCCR 010000
1040:
1041: /* Nonzero if we know (easily) that floating point register f0
1042: (f1) contains the value 0. */
1043: #define CC_F0_IS_0 020000
1044: #define CC_F1_IS_0 040000
1045:
1046: /* Nonzero if we know the value of %hi(%g1). */
1047: #define CC_KNOW_HI_G1 0100000
1048:
1049: #define CC_STATUS_MDEP_INIT (cc_status.mdep = 0)
1050:
1051: /* Store in cc_status the expressions
1052: that the condition codes will describe
1053: after execution of an instruction whose pattern is EXP.
1054: Do not alter them if the instruction would not alter the cc's. */
1055:
1056: #define NOTICE_UPDATE_CC(EXP, INSN) \
1057: { if (GET_CODE (EXP) == SET) \
1058: { if (SET_DEST (EXP) == cc0_rtx) \
1059: { cc_status.flags = 0; \
1060: cc_status.value1 = SET_DEST (EXP); \
1061: cc_status.value2 = SET_SRC (EXP); } \
1062: else if (GET_CODE (SET_SRC (EXP)) == CALL) \
1063: { CC_STATUS_INIT; } \
1064: else if (GET_CODE (SET_DEST (EXP)) == REG) \
1065: { if (cc_status.value1 \
1066: && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value1)) \
1067: cc_status.value1 = 0; \
1068: if (cc_status.value2 \
1069: && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value2)) \
1070: cc_status.value2 = 0; \
1071: } \
1072: else if (GET_CODE (SET_DEST (EXP)) == MEM) \
1073: { rtx x = cc_status.mdep; int know = cc_status.flags & CC_KNOW_HI_G1; \
1074: CC_STATUS_INIT; \
1075: if (x && know) \
1076: { cc_status.mdep = x; cc_status.flags |= CC_KNOW_HI_G1; } \
1077: } \
1078: } \
1079: else if (GET_CODE (EXP) == PARALLEL \
1080: && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \
1081: { if (SET_DEST (XVECEXP (EXP, 0, 0)) == cc0_rtx) \
1082: { cc_status.flags = 0; \
1083: cc_status.value1 = SET_DEST (XVECEXP (EXP, 0, 0)); \
1084: cc_status.value2 = SET_SRC (XVECEXP (EXP, 0, 0)); \
1085: } \
1086: else if (GET_CODE (SET_SRC (XVECEXP (EXP, 0, 0))) == CALL) \
1087: { /* all bets are off */ CC_STATUS_INIT; } \
1088: else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == REG) \
1089: { if (cc_status.value1 \
1090: && reg_overlap_mentioned_p (SET_DEST (XVECEXP (EXP, 0, 0)), cc_status.value1)) \
1091: cc_status.value1 = 0; \
1092: if (cc_status.value2 \
1093: && reg_overlap_mentioned_p (SET_DEST (XVECEXP (EXP, 0, 0)), cc_status.value2)) \
1094: cc_status.value2 = 0; \
1095: } \
1096: else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == MEM) \
1097: { rtx x = cc_status.mdep; int know = cc_status.flags & CC_KNOW_HI_G1; \
1098: CC_STATUS_INIT; \
1099: if (x && know) \
1100: { cc_status.mdep = x; cc_status.flags |= CC_KNOW_HI_G1; } \
1101: } \
1102: } \
1103: else if (GET_CODE (EXP) == PARALLEL) \
1104: /* insn-peep has changed this insn beyond recognition
1105: by NOTICE_UPDATE_CC. However, we know it is either
1106: a call or a branch with a delay slot filled, so we can
1107: give up on knowing condition codes in any case. */ \
1108: { CC_STATUS_INIT; } \
1109: else if (GET_CODE (EXP) == CALL) \
1110: { /* all bets are off */ CC_STATUS_INIT; } \
1111: }
1112:
1113: /* Control the assembler format that we output. */
1114:
1115: /* Output at beginning of assembler file. */
1116:
1117: #define ASM_FILE_START(file)
1118:
1119: /* Output to assembler file text saying following lines
1120: may contain character constants, extra white space, comments, etc. */
1121:
1122: #define ASM_APP_ON ""
1123:
1124: /* Output to assembler file text saying following lines
1125: no longer contain unusual constructs. */
1126:
1127: #define ASM_APP_OFF ""
1128:
1129: /* Output before read-only data. */
1130:
1131: #define TEXT_SECTION_ASM_OP ".text"
1132:
1133: /* Output before writable data. */
1134:
1135: #define DATA_SECTION_ASM_OP ".data"
1136:
1137: /* How to refer to registers in assembler output.
1138: This sequence is indexed by compiler's hard-register-number (see above). */
1139:
1140: #define REGISTER_NAMES \
1141: {"%g0", "%g1", "%g2", "%g3", "%g4", "%g5", "%g6", "%g7", \
1142: "%o0", "%o1", "%o2", "%o3", "%o4", "%o5", "%sp", "%o7", \
1143: "%l0", "%l1", "%l2", "%l3", "%l4", "%l5", "%l6", "%l7", \
1144: "%i0", "%i1", "%i2", "%i3", "%i4", "%i5", "%fp", "%i7", \
1145: "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7", \
1146: "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15", \
1147: "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23", \
1148: "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31"} \
1149:
1150: /* How to renumber registers for dbx and gdb. */
1151:
1152: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1153:
1154: /* On Sun 4, this limit is 2048. We use 1500 to be safe,
1155: since the length can run past this up to a continuation point. */
1156: #define DBX_CONTIN_LENGTH 1500
1157:
1158: /* This is how to output a note to DBX telling it the line number
1159: to which the following sequence of instructions corresponds.
1160:
1161: This is needed for SunOS 4.0, and should not hurt for 3.2
1162: versions either. */
1163: #define ASM_OUTPUT_SOURCE_LINE(file, line) \
1164: { static int sym_lineno = 1; \
1165: fprintf (file, ".stabn 68,0,%d,LM%d\nLM%d:\n", \
1166: line, sym_lineno, sym_lineno); \
1167: sym_lineno += 1; }
1168:
1169: /* This is how to output the definition of a user-level label named NAME,
1170: such as the label on a static function or variable NAME. */
1171:
1172: #define ASM_OUTPUT_LABEL(FILE,NAME) \
1173: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1174:
1175: /* This is how to output a command to make the user-level label named NAME
1176: defined for reference from other files. */
1177:
1178: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1179: do { fputs (".global ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1180:
1181: /* This is how to output a reference to a user-level label named NAME.
1182: `assemble_name' uses this. */
1183:
1184: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1185: fprintf (FILE, "_%s", NAME)
1186:
1187: /* This is how to output an internal numbered label where
1188: PREFIX is the class of label and NUM is the number within the class. */
1189:
1190: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1191: fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1192:
1193: /* This is how to store into the string LABEL
1194: the symbol_ref name of an internal numbered label where
1195: PREFIX is the class of label and NUM is the number within the class.
1196: This is suitable for output with `assemble_name'. */
1197:
1198: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1199: sprintf (LABEL, "*%s%d", PREFIX, NUM)
1200:
1201: /* This is how to output an assembler line defining a `double' constant. */
1202:
1203: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1204: (isinf ((VALUE)) \
1205: ? fprintf (FILE, "\t.double 0r%s99e999\n", ((VALUE) > 0 ? "" : "-")) \
1206: : fprintf (FILE, "\t.double 0r%.20e\n", (VALUE)))
1207:
1208: /* This is how to output an assembler line defining a `float' constant. */
1209:
1210: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1211: (isinf ((VALUE)) \
1212: ? fprintf (FILE, "\t.single 0r%s99e999\n", ((VALUE) > 0 ? "" : "-")) \
1213: : fprintf (FILE, "\t.single 0r%.20e\n", (VALUE)))
1214:
1215: /* This is how to output an assembler line defining an `int' constant. */
1216:
1217: #define ASM_OUTPUT_INT(FILE,VALUE) \
1218: ( fprintf (FILE, "\t.word "), \
1219: output_addr_const (FILE, (VALUE)), \
1220: fprintf (FILE, "\n"))
1221:
1222: /* Likewise for `char' and `short' constants. */
1223:
1224: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1225: ( fprintf (FILE, "\t.half "), \
1226: output_addr_const (FILE, (VALUE)), \
1227: fprintf (FILE, "\n"))
1228:
1229: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1230: ( fprintf (FILE, "\t.byte "), \
1231: output_addr_const (FILE, (VALUE)), \
1232: fprintf (FILE, "\n"))
1233:
1234: /* This is how to output an assembler line for a numeric constant byte. */
1235:
1236: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1237: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1238:
1239: /* This is how to output an element of a case-vector that is absolute. */
1240:
1241: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1242: fprintf (FILE, "\t.word L%d\n", VALUE)
1243:
1244: /* This is how to output an element of a case-vector that is relative.
1245: (SPARC does not use such vectors,
1246: but we must define this macro anyway.) */
1247:
1248: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1249: fprintf (FILE, "\t.word L%d-L%d\n", VALUE, REL)
1250:
1251: /* This is how to output an assembler line
1252: that says to advance the location counter
1253: to a multiple of 2**LOG bytes. */
1254:
1255: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1256: if ((LOG) != 0) \
1257: fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1258:
1259: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1260: fprintf (FILE, "\t.skip %d\n", (SIZE))
1261:
1262: /* This says how to output an assembler line
1263: to define a global common symbol. */
1264:
1265: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1266: ( fputs (".global ", (FILE)), \
1267: assemble_name ((FILE), (NAME)), \
1268: fputs ("\n.common ", (FILE)), \
1269: assemble_name ((FILE), (NAME)), \
1270: fprintf ((FILE), ",%d,\"bss\"\n", (ROUNDED)))
1271:
1272: /* This says how to output an assembler line
1273: to define a local common symbol. */
1274:
1275: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1276: ( fputs ("\n.reserve ", (FILE)), \
1277: assemble_name ((FILE), (NAME)), \
1278: fprintf ((FILE), ",%d,\"bss\"\n", (ROUNDED)))
1279:
1280: /* Store in OUTPUT a string (made with alloca) containing
1281: an assembler-name for a local static variable named NAME.
1282: LABELNO is an integer which is different for each call. */
1283:
1284: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1285: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1286: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1287:
1288: /* Define the parentheses used to group arithmetic operations
1289: in assembler code. */
1290:
1291: #define ASM_OPEN_PAREN "("
1292: #define ASM_CLOSE_PAREN ")"
1293:
1294: /* Define results of standard character escape sequences. */
1295: #define TARGET_BELL 007
1296: #define TARGET_BS 010
1297: #define TARGET_TAB 011
1298: #define TARGET_NEWLINE 012
1299: #define TARGET_VT 013
1300: #define TARGET_FF 014
1301: #define TARGET_CR 015
1302:
1303: /* Print operand X (an rtx) in assembler syntax to file FILE.
1304: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1305: For `%' followed by punctuation, CODE is the punctuation and X is null.
1306:
1307: On SPARC, the CODE can be `r', meaning this is a register-only operand
1308: and an immediate zero should be represented as `r0'.
1309: It can also be `m', meaning that X is a memory reference but print
1310: its address as a non-memory operand. */
1311:
1312: #define PRINT_OPERAND(FILE, X, CODE) \
1313: { if (GET_CODE (X) == REG) \
1314: fprintf (FILE, "%s", reg_names[REGNO (X)]); \
1315: else if ((CODE) == 'm') \
1316: output_address (XEXP (X, 0)); \
1317: else if (GET_CODE (X) == MEM) \
1318: { \
1319: fputc ('[', FILE); \
1320: output_address (XEXP (X, 0)); \
1321: fputc (']', FILE); \
1322: } \
1323: else if (GET_CODE (X) == CONST_DOUBLE) \
1324: abort (); \
1325: else if ((CODE) == 'r' && (X) == const0_rtx) \
1326: fprintf (FILE, "%%g0"); \
1327: else if ((CODE) == 'C') switch (GET_CODE (X)) \
1328: { \
1329: case EQ: fputs ("e", FILE); break; \
1330: case NE: fputs ("ne", FILE); break; \
1331: case GT: fputs ("g", FILE); break; \
1332: case GE: fputs ("ge", FILE); break; \
1333: case LT: fputs ("l", FILE); break; \
1334: case LE: fputs ("le", FILE); break; \
1335: case GTU: fputs ("gu", FILE); break; \
1336: case GEU: fputs ("geu", FILE); break; \
1337: case LTU: fputs ("lu", FILE); break; \
1338: case LEU: fputs ("leu", FILE); break; \
1339: } \
1340: else if ((CODE) == 'N') switch (GET_CODE (X)) \
1341: { \
1342: case EQ: fputs ("ne", FILE); break; \
1343: case NE: fputs ("e", FILE); break; \
1344: case GT: fputs ("le", FILE); break; \
1345: case GE: fputs ("l", FILE); break; \
1346: case LT: fputs ("ge", FILE); break; \
1347: case LE: fputs ("g", FILE); break; \
1348: case GTU: fputs ("leu", FILE); break; \
1349: case GEU: fputs ("lu", FILE); break; \
1350: case LTU: fputs ("geu", FILE); break; \
1351: case LEU: fputs ("gu", FILE); break; \
1352: } \
1353: else if ((CODE) == 'F') switch (GET_CODE (X)) \
1354: { \
1355: case EQ: fputs ("ne", FILE); break; \
1356: case NE: fputs ("e", FILE); break; \
1357: case GT: fputs ("ule", FILE); break; \
1358: case GE: fputs ("ul", FILE); break; \
1359: case LT: fputs ("uge", FILE); break; \
1360: case LE: fputs ("ug", FILE); break; \
1361: default: abort (); \
1362: } \
1363: else { output_addr_const (FILE, X); }}
1364:
1365: /* Print a memory address as an operand to reference that memory location. */
1366:
1367: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1368: { register rtx base, index = 0; \
1369: int offset = 0; \
1370: register rtx addr = ADDR; \
1371: if (GET_CODE (addr) == REG) \
1372: { \
1373: fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1374: } \
1375: else if (GET_CODE (addr) == PLUS) \
1376: { \
1377: if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1378: offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1);\
1379: else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1380: offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0);\
1381: else \
1382: base = XEXP (addr, 0), index = XEXP (addr, 1); \
1383: fprintf (FILE, "%s", reg_names[REGNO (base)]); \
1384: if (index == 0) \
1385: fprintf (FILE, "%+d", offset); \
1386: else \
1387: fprintf (FILE, "+%s", reg_names[REGNO (index)]); \
1388: } \
1389: else \
1390: { \
1391: output_addr_const (FILE, addr); \
1392: } \
1393: }
1394:
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