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1.1 root 1: /* Definitions of target machine for GNU compiler, for Sun SPARC.
2: Copyright (C) 1988 Free Software Foundation, Inc.
3: Contributed by Michael Tiemann ([email protected]).
4:
5: This file is part of GNU CC.
6:
7: GNU CC is free software; you can redistribute it and/or modify
8: it under the terms of the GNU General Public License as published by
9: the Free Software Foundation; either version 1, or (at your option)
10: any later version.
11:
12: GNU CC is distributed in the hope that it will be useful,
13: but WITHOUT ANY WARRANTY; without even the implied warranty of
14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15: GNU General Public License for more details.
16:
17: You should have received a copy of the GNU General Public License
18: along with GNU CC; see the file COPYING. If not, write to
19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20:
21: /* Note that some other tm- files include this one and then override
22: many of the definitions that relate to assembler syntax. */
23:
24: /* Specify library to handle `-a' basic block profiling. */
25:
26: #define LIB_SPEC "%{a:/usr/lib/bb_link.o} \
27: %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p} "
28:
29: /* Provide required defaults for linker -e and -d switches.
30: Also, it is hard to debug with shared libraries,
31: so don't use them if going to debug. */
32:
1.1.1.3 root 33: #define LINK_SPEC "%{!e*:-e start} -dc -dp %{g:-Bstatic} %{static:-Bstatic} %{Bstatic}"
1.1 root 34:
35: /* Special flags to the Sun-4 assembler when using pipe for input. */
36:
37: #define ASM_SPEC " %{pipe:-} "
38:
1.1.1.3 root 39: /* Prevent error on `-dalign', `-sun4' and `-target sun4' options. */
1.1 root 40:
1.1.1.3 root 41: #define CC1_SPEC "%{dalign:} %{sun4:} %{target:}"
42:
43: /* These compiler options take an argument. We ignore -target for now. */
44:
45: #define WORD_SWITCH_TAKES_ARG(STR) (!strcmp (STR, "target"))
1.1 root 46:
47: /* Names to predefine in the preprocessor for this target machine. */
48:
49: #define CPP_PREDEFINES "-Dsparc -Dsun -Dunix"
50:
51: /* Print subsidiary information on the compiler version in use. */
52:
53: #define TARGET_VERSION fprintf (stderr, " (sparc)");
54:
55: /* Generate DBX debugging information. */
56:
57: #define DBX_DEBUGGING_INFO
58:
59: /* Run-time compilation parameters selecting different hardware subsets. */
60:
61: extern int target_flags;
62:
63: /* Nonzero if we should generate code to use the fpu. */
64: #define TARGET_FPU (target_flags & 1)
65:
66: /* Nonzero if we should use FUNCTION_EPILOGUE. Otherwise, we
67: use fast return insns, but lose some generality. */
68: #define TARGET_EPILOGUE (target_flags & 2)
69:
70: /* Nonzero if we expect to be passed through the Sun
71: optimizing assembler. This requires us to generate
72: code which we otherwise would not. For example,
73: calls via pointers-to-functions must be output
74: specially because Sun assemble does not do proper flow
75: analysis for this case. */
76: #define TARGET_SUN_ASM (target_flags & 4)
77:
78: /* Nonzero if we should do eager peepholes for conditional branch
79: scheduling. */
80: #define TARGET_EAGER (target_flags & 8)
81:
82: /* Macro to define tables used to set the flags.
83: This is a list in braces of pairs in braces,
84: each pair being { "NAME", VALUE }
85: where VALUE is the bits to set or minus the bits to clear.
86: An empty string NAME is used to identify the default VALUE. */
87:
88: #define TARGET_SWITCHES \
89: { {"fpu", 1}, \
90: {"soft-float", -1}, \
91: {"epilogue", 2}, \
92: {"no-epilogue", -2}, \
93: {"sun-asm", 4}, \
94: {"eager", 8}, \
95: { "", TARGET_DEFAULT}}
96:
97: #define TARGET_DEFAULT 3
98:
99: /* target machine storage layout */
100:
101: /* Define this if most significant bit is lowest numbered
102: in instructions that operate on numbered bit-fields. */
103: #define BITS_BIG_ENDIAN
104:
105: /* Define this if most significant byte of a word is the lowest numbered. */
106: /* This is true on the SPARC. */
107: #define BYTES_BIG_ENDIAN
108:
109: /* Define this if most significant word of a multiword number is numbered. */
110: /* For SPARC we can decide arbitrarily
111: since there are no machine instructions for them. */
112: /* #define WORDS_BIG_ENDIAN */
113:
114: /* number of bits in an addressible storage unit */
115: #define BITS_PER_UNIT 8
116:
117: /* Width in bits of a "word", which is the contents of a machine register.
118: Note that this is not necessarily the width of data type `int';
119: if using 16-bit ints on a 68000, this would still be 32.
120: But on a machine with 16-bit registers, this would be 16. */
121: #define BITS_PER_WORD 32
122:
123: /* Width of a word, in units (bytes). */
124: #define UNITS_PER_WORD 4
125:
126: /* Width in bits of a pointer.
127: See also the macro `Pmode' defined below. */
128: #define POINTER_SIZE 32
129:
130: /* Allocation boundary (in *bits*) for storing pointers in memory. */
131: #define POINTER_BOUNDARY 32
132:
133: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
134: #define PARM_BOUNDARY 32
135:
136: /* Boundary (in *bits*) on which stack pointer should be aligned. */
137: #define STACK_BOUNDARY 64
138:
139: /* Allocation boundary (in *bits*) for the code of a function. */
140: #define FUNCTION_BOUNDARY 32
141:
142: /* Alignment of field after `int : 0' in a structure. */
143: #define EMPTY_FIELD_BOUNDARY 32
144:
145: /* Every structure's size must be a multiple of this. */
146: #define STRUCTURE_SIZE_BOUNDARY 8
147:
148: /* A bitfield declared as `int' forces `int' alignment for the struct. */
1.1.1.3 root 149: #define PCC_BITFIELD_TYPE_MATTERS 1
1.1 root 150:
151: /* No data type wants to be aligned rounder than this. */
152: #define BIGGEST_ALIGNMENT 64
153:
154: /* Define this if move instructions will actually fail to work
155: when given unaligned data. */
156: #define STRICT_ALIGNMENT
157:
158: /* Things that must be doubleword aligned cannot go in the text section,
159: because the linker fails to align the text section enough!
160: Put them in the data section. */
161: #define MAX_TEXT_ALIGN 32
162:
163: #define SELECT_SECTION(T) \
164: { \
165: if (TREE_CODE (T) == VAR_DECL) \
166: { \
167: if (TREE_READONLY (T) && ! TREE_VOLATILE (T) \
168: && DECL_ALIGN (T) <= MAX_TEXT_ALIGN) \
169: text_section (); \
170: else \
171: data_section (); \
172: } \
173: if (*tree_code_type[(int) TREE_CODE (T)] == 'c') \
174: { \
175: if ((TREE_CODE (T) == STRING_CST && flag_writable_strings) \
176: || TYPE_ALIGN (TREE_TYPE (T)) > MAX_TEXT_ALIGN) \
177: data_section (); \
178: else \
179: text_section (); \
180: } \
181: }
182:
1.1.1.2 root 183: /* Use text section for a constant
184: unless we need more alignment than that offers. */
1.1 root 185: #define SELECT_RTX_SECTION(MODE, X) \
186: { \
1.1.1.2 root 187: if (GET_MODE_BITSIZE (MODE) <= MAX_TEXT_ALIGN)\
1.1 root 188: text_section (); \
189: else \
190: data_section (); \
191: }
192:
193: /* Standard register usage. */
194:
195: /* Number of actual hardware registers.
196: The hardware registers are assigned numbers for the compiler
197: from 0 to just below FIRST_PSEUDO_REGISTER.
198: All registers that the compiler knows about must be given numbers,
199: even those that are not normally considered general registers.
200:
201: SPARC has 32 fullword registers and 32 floating point registers. */
202:
203: #define FIRST_PSEUDO_REGISTER 64
204:
205: /* 1 for registers that have pervasive standard uses
206: and are not available for the register allocator.
207: On SPARC, this includes all the global registers
208: (registers r[0] through r[7]) and the callee return
209: address register, r[15]. */
210: #define FIXED_REGISTERS \
211: {1, 1, 1, 1, 1, 1, 1, 1, \
212: 0, 0, 0, 0, 0, 0, 1, 1, \
213: 0, 0, 0, 0, 0, 0, 0, 0, \
214: 0, 0, 0, 0, 0, 0, 1, 1, \
215: \
216: 1, 1, 0, 0, 0, 0, 0, 0, \
217: 0, 0, 0, 0, 0, 0, 0, 0, \
218: 0, 0, 0, 0, 0, 0, 0, 0, \
219: 0, 0, 0, 0, 0, 0, 0, 0}
220:
221:
222: /* 1 for registers not available across function calls.
223: These must include the FIXED_REGISTERS and also any
224: registers that can be used without being saved.
225: The latter must include the registers where values are returned
226: and the register where structure-value addresses are passed.
227: Aside from that, you can include as many other registers as you like. */
228: #define CALL_USED_REGISTERS \
229: {1, 1, 1, 1, 1, 1, 1, 1, \
230: 1, 1, 1, 1, 1, 1, 1, 1, \
231: 0, 0, 0, 0, 0, 0, 0, 0, \
232: 0, 0, 0, 0, 0, 0, 1, 1, \
233: \
234: 1, 1, 1, 1, 1, 1, 1, 1, \
235: 1, 1, 1, 1, 1, 1, 1, 1, \
236: 1, 1, 1, 1, 1, 1, 1, 1, \
237: 1, 1, 1, 1, 1, 1, 1, 1}
238:
239: /* Return number of consecutive hard regs needed starting at reg REGNO
240: to hold something of mode MODE.
241: This is ordinarily the length in words of a value of mode MODE
242: but can be less for certain modes in special long registers.
243:
244: On SPARC, ordinary registers hold 32 bits worth;
245: this means both integer and floating point registers. */
246: #define HARD_REGNO_NREGS(REGNO, MODE) \
247: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
248:
249: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
250: On SPARC, the cpu registers can hold any mode but the float registers
251: can only hold SFmode or DFmode. */
252: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
253: ((REGNO) < 32 ? ((GET_MODE_SIZE (MODE) <= 4) ? 1 : ((REGNO) & 1) == 0) : \
254: ((MODE) == SFmode ? 1 : (MODE) == DFmode && ((REGNO) & 1) == 0))
255:
256: /* Value is 1 if it is a good idea to tie two pseudo registers
257: when one has mode MODE1 and one has mode MODE2.
258: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
259: for any hard reg, then this must be 0 for correct output. */
260: #define MODES_TIEABLE_P(MODE1, MODE2) \
261: (((MODE1) == SFmode || (MODE1) == DFmode) \
262: == ((MODE2) == SFmode || (MODE2) == DFmode))
263:
264: /* Specify the registers used for certain standard purposes.
265: The values of these macros are register numbers. */
266:
267: /* SPARC pc isn't overloaded on a register that the compiler knows about. */
268: /* #define PC_REGNUM */
269:
270: /* Register to use for pushing function arguments. */
271: #define STACK_POINTER_REGNUM 14
272:
273: /* Actual top-of-stack address is 92 greater
274: than the contents of the stack pointer register. */
275: #define STACK_POINTER_OFFSET 92
276:
277: /* Base register for access to local variables of the function. */
278: #define FRAME_POINTER_REGNUM 30
279:
280: /* Value should be nonzero if functions must have frame pointers.
281: Zero means the frame pointer need not be set up (and parms
282: may be accessed via the stack pointer) in functions that seem suitable.
283: This is computed in `reload', in reload1.c. */
284: #define FRAME_POINTER_REQUIRED 1
285:
286: /* Base register for access to arguments of the function. */
287: #define ARG_POINTER_REGNUM 30
288:
289: /* Register in which static-chain is passed to a function. */
290: /* ??? */
291: #define STATIC_CHAIN_REGNUM 1
292:
293:
294: /* Functions which return large structures get the address
295: to place the wanted value at offset 64 from the frame. */
296: #define STRUCT_VALUE_OFFSET 64 /* Used only in other #defines in this file. */
297: #define STRUCT_VALUE \
298: gen_rtx (MEM, Pmode, \
299: gen_rtx (PLUS, SImode, stack_pointer_rtx, \
300: gen_rtx (CONST_INT, VOIDmode, STRUCT_VALUE_OFFSET)))
301: #define STRUCT_VALUE_INCOMING \
302: gen_rtx (MEM, Pmode, \
303: gen_rtx (PLUS, SImode, frame_pointer_rtx, \
304: gen_rtx (CONST_INT, VOIDmode, STRUCT_VALUE_OFFSET)))
305:
306: /* Define the classes of registers for register constraints in the
307: machine description. Also define ranges of constants.
308:
309: One of the classes must always be named ALL_REGS and include all hard regs.
310: If there is more than one class, another class must be named NO_REGS
311: and contain no registers.
312:
313: The name GENERAL_REGS must be the name of a class (or an alias for
314: another name such as ALL_REGS). This is the class of registers
315: that is allowed by "g" or "r" in a register constraint.
316: Also, registers outside this class are allocated only when
317: instructions express preferences for them.
318:
319: The classes must be numbered in nondecreasing order; that is,
320: a larger-numbered class must never be contained completely
321: in a smaller-numbered class.
322:
323: For any two classes, it is very desirable that there be another
324: class that represents their union. */
325:
326: /* The SPARC has two kinds of registers, general and floating point. */
327:
328: enum reg_class { NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES };
329:
330: #define N_REG_CLASSES (int) LIM_REG_CLASSES
331:
332: /* Give names of register classes as strings for dump file. */
333:
334: #define REG_CLASS_NAMES \
335: {"NO_REGS", "GENERAL_REGS", "FP_REGS", "ALL_REGS" }
336:
337: /* Define which registers fit in which classes.
338: This is an initializer for a vector of HARD_REG_SET
339: of length N_REG_CLASSES. */
340:
341: #define REG_CLASS_CONTENTS {{0, 0}, {-1, 0}, {0, -1}, {-1, -1}}
342:
343: /* The same information, inverted:
344: Return the class number of the smallest class containing
345: reg number REGNO. This could be a conditional expression
346: or could index an array. */
347:
348: #define REGNO_REG_CLASS(REGNO) \
349: ((REGNO) >= 32 ? FP_REGS : GENERAL_REGS)
350:
351: /* The class value for index registers, and the one for base regs. */
352: #define INDEX_REG_CLASS GENERAL_REGS
353: #define BASE_REG_CLASS GENERAL_REGS
354:
355: /* Get reg_class from a letter such as appears in the machine description. */
356:
357: #define REG_CLASS_FROM_LETTER(C) \
358: ((C) == 'f' ? FP_REGS : NO_REGS)
359:
360: /* The letters I, J, K, L and M in a register constraint string
361: can be used to stand for particular ranges of immediate operands.
362: This macro defines what the ranges are.
363: C is the letter, and VALUE is a constant value.
364: Return 1 if VALUE is in the range specified by C.
365:
366: For SPARC, `I' is used for the range of constants an insn
367: can actually contain.
368: `J' is used for the range which is just zero (since that is R0).
369: `K' is used for the 5-bit operand of a compare insns. */
370:
371: #define SMALL_INT(X) ((unsigned) (INTVAL (X) + 0x1000) < 0x2000)
372:
373: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
374: ((C) == 'I' ? (unsigned) ((VALUE) + 0x1000) < 0x2000 \
375: : (C) == 'J' ? (VALUE) == 0 \
376: : (C) == 'K' ? (unsigned) (VALUE) < 0x20 \
377: : 0)
378:
379: /* Similar, but for floating constants, and defining letters G and H.
380: Here VALUE is the CONST_DOUBLE rtx itself. */
381:
1.1.1.4 ! root 382: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
! 383: ((C) == 'G' && CONST_DOUBLE_LOW ((VALUE)) == 0 \
! 384: && CONST_DOUBLE_HIGH ((VALUE)) == 0)
1.1 root 385:
386: /* Given an rtx X being reloaded into a reg required to be
387: in class CLASS, return the class of reg to actually use.
388: In general this is just CLASS; but on some machines
389: in some cases it is preferable to use a more restrictive class. */
390: #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
391:
392: /* Return the maximum number of consecutive registers
393: needed to represent mode MODE in a register of class CLASS. */
394: /* On SPARC, this is the size of MODE in words,
395: except in the FP regs, where a single reg is always enough. */
396: #define CLASS_MAX_NREGS(CLASS, MODE) \
397: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
398:
399: /* Stack layout; function entry, exit and calling. */
400:
401: /* Define this if pushing a word on the stack
402: makes the stack pointer a smaller address. */
403: #define STACK_GROWS_DOWNWARD
404:
405: /* Define this if the nominal address of the stack frame
406: is at the high-address end of the local variables;
407: that is, each additional local variable allocated
408: goes at a more negative offset in the frame. */
409: #define FRAME_GROWS_DOWNWARD
410:
411: /* Offset within stack frame to start allocating local variables at.
412: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
413: first local allocated. Otherwise, it is the offset to the BEGINNING
414: of the first local allocated. */
415: #define STARTING_FRAME_OFFSET -16
416:
417: /* If we generate an insn to push BYTES bytes,
418: this says how many the stack pointer really advances by.
419: On SPARC, don't define this because there are no push insns. */
420: /* #define PUSH_ROUNDING(BYTES) */
421:
422: /* Offset of first parameter from the argument pointer register value.
423: This is 64 for the ins and locals, plus 4 for the struct-return reg
424: if this function isn't going to use it. */
425: #define FIRST_PARM_OFFSET(FNDECL) \
426: (DECL_MODE (DECL_RESULT (fndecl)) == BLKmode \
427: ? STRUCT_VALUE_OFFSET : STRUCT_VALUE_OFFSET + 4)
428:
429: /* Offset from top-of-stack address to location to store the
430: function parameter if it can't go in a register.
431: Addresses for following parameters are computed relative to this one. */
432: #define FIRST_PARM_CALLER_OFFSET(FNDECL) \
433: (STRUCT_VALUE_OFFSET + 4 - STACK_POINTER_OFFSET)
434:
435: /* When a parameter is passed in a register, stack space is still
436: allocated for it. */
437: #define REG_PARM_STACK_SPACE
438:
439: /* Value is 1 if returning from a function call automatically
440: pops the arguments described by the number-of-args field in the call.
441: FUNTYPE is the data type of the function (as a tree),
442: or for a library call it is an identifier node for the subroutine name. */
443:
444: #define RETURN_POPS_ARGS(FUNTYPE) 0
445:
446: /* Some subroutine macros specific to this machine. */
447: #define BASE_RETURN_VALUE_REG(MODE) \
448: ((MODE) == SFmode || (MODE) == DFmode ? 32 : 8)
449: #define BASE_OUTGOING_VALUE_REG(MODE) \
450: ((MODE) == SFmode || (MODE) == DFmode ? 32 : 24)
451: #define BASE_PASSING_ARG_REG(MODE) (8)
452: #define BASE_INCOMING_ARG_REG(MODE) (24)
453:
454: /* Define how to find the value returned by a function.
455: VALTYPE is the data type of the value (as a tree).
456: If the precise function being called is known, FUNC is its FUNCTION_DECL;
457: otherwise, FUNC is 0. */
458:
459: /* On SPARC the value is found in the first "output" register. */
460:
461: #define FUNCTION_VALUE(VALTYPE, FUNC) \
462: gen_rtx (REG, TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG (TYPE_MODE (VALTYPE)))
463:
464: /* But the called function leaves it in the first "input" register. */
465:
466: #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \
467: gen_rtx (REG, TYPE_MODE (VALTYPE), BASE_OUTGOING_VALUE_REG (TYPE_MODE (VALTYPE)))
468:
469: /* Define how to find the value returned by a library function
470: assuming the value has mode MODE. */
471:
472: #define LIBCALL_VALUE(MODE) \
473: gen_rtx (REG, MODE, BASE_RETURN_VALUE_REG (MODE))
474:
475: /* 1 if N is a possible register number for a function value
476: as seen by the caller.
477: On SPARC, the first "output" reg is used for integer values,
478: and the first floating point register is used for floating point values. */
479:
480: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 8 || (N) == 32)
481:
482: /* 1 if N is a possible register number for function argument passing.
483: On SPARC, these are the "output" registers. */
484:
485: #define FUNCTION_ARG_REGNO_P(N) ((N) < 14 && (N) > 7)
486:
487: /* Define a data type for recording info about an argument list
488: during the scan of that argument list. This data type should
489: hold all necessary information about the function itself
490: and about the args processed so far, enough to enable macros
491: such as FUNCTION_ARG to determine where the next arg should go.
492:
493: On SPARC, this is a single integer, which is a number of words
494: of arguments scanned so far (including the invisible argument,
495: if any, which holds the structure-value-address).
496: Thus 7 or more means all following args should go on the stack. */
497:
498: #define CUMULATIVE_ARGS int
499:
500: /* Define the number of register that can hold parameters.
501: This macro is used only in other macro definitions below. */
502: #define NPARM_REGS 6
503:
504: /* Initialize a variable CUM of type CUMULATIVE_ARGS
505: for a call to a function whose data type is FNTYPE.
506: For a library call, FNTYPE is 0.
507:
508: On SPARC, the offset always starts at 0: the first parm reg is always
509: the same reg. */
510:
511: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE) ((CUM) = 0)
512:
513: /* Update the data in CUM to advance over an argument
514: of mode MODE and data type TYPE.
515: (TYPE is null for libcalls where that information may not be available.) */
516:
517: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
518: ((CUM) += ((MODE) != BLKmode \
519: ? (GET_MODE_SIZE (MODE) + 3) / 4 \
520: : (int_size_in_bytes (TYPE) + 3) / 4))
521:
522: /* Determine where to put an argument to a function.
523: Value is zero to push the argument on the stack,
524: or a hard register in which to store the argument.
525:
526: MODE is the argument's machine mode.
527: TYPE is the data type of the argument (as a tree).
528: This is null for libcalls where that information may
529: not be available.
530: CUM is a variable of type CUMULATIVE_ARGS which gives info about
531: the preceding args and about the function being called.
532: NAMED is nonzero if this argument is a named parameter
533: (otherwise it is an extra parameter matching an ellipsis). */
534:
535: /* On SPARC the first six args are normally in registers
536: and the rest are pushed. Any arg that starts within the first 6 words
537: is at least partially passed in a register unless its data type forbids. */
538:
539: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1.1.1.3 root 540: ((CUM) < NPARM_REGS \
541: && ((TYPE)==0 || ! TREE_ADDRESSABLE ((tree)(TYPE))) \
542: && ((MODE) != BLKmode || (TYPE_ALIGN ((TYPE)) % 32 == 0)) \
1.1 root 543: ? gen_rtx (REG, (MODE), BASE_PASSING_ARG_REG (MODE) + (CUM)) : 0)
544:
545: /* Define where a function finds its arguments.
546: This is different from FUNCTION_ARG because of register windows. */
547:
548: #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
1.1.1.3 root 549: ((CUM) < NPARM_REGS \
550: && ((TYPE)==0 || ! TREE_ADDRESSABLE ((tree)(TYPE))) \
551: && ((MODE) != BLKmode || (TYPE_ALIGN ((TYPE)) % 32 == 0)) \
1.1 root 552: ? gen_rtx (REG, (MODE), BASE_INCOMING_ARG_REG (MODE) + (CUM)) : 0)
553:
554: /* For an arg passed partly in registers and partly in memory,
555: this is the number of registers used.
556: For args passed entirely in registers or entirely in memory, zero.
557: Any arg that starts in the first 6 regs but won't entirely fit in them
558: needs partial registers on the Sparc. */
559:
560: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1.1.1.3 root 561: (((CUM) < NPARM_REGS \
562: && ((TYPE)==0 || ! TREE_ADDRESSABLE ((tree)(TYPE))) \
563: && ((MODE) != BLKmode || (TYPE_ALIGN ((TYPE)) % 32 == 0)) \
1.1 root 564: && ((CUM) \
565: + ((MODE) == BLKmode \
566: ? (int_size_in_bytes (TYPE) + 3) / 4 \
567: : (GET_MODE_SIZE (MODE) + 3) / 4)) - NPARM_REGS > 0) \
568: ? (NPARM_REGS - (CUM)) \
569: : 0)
570:
571: /* Output the label for a function definition. */
572:
573: #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
574: { \
575: extern tree double_type_node, float_type_node; \
576: if (TREE_TYPE (DECL) == float_type_node) \
577: fprintf (FILE, "\t.proc 6\n"); \
578: else if (TREE_TYPE (DECL) == double_type_node) \
579: fprintf (FILE, "\t.proc 7\n"); \
580: else if (TREE_TYPE (DECL) == void_type_node) \
581: fprintf (FILE, "\t.proc 0\n"); \
582: else fprintf (FILE, "\t.proc 1\n"); \
583: ASM_OUTPUT_LABEL (FILE, NAME); \
584: }
585:
586: /* This macro generates the assembly code for function entry.
587: FILE is a stdio stream to output the code to.
588: SIZE is an int: how many units of temporary storage to allocate.
589: Refer to the array `regs_ever_live' to determine which registers
590: to save; `regs_ever_live[I]' is nonzero if register number I
591: is ever used in the function. This macro is responsible for
592: knowing which registers should not be saved even if used. */
593:
594: /* On SPARC, move-double insns between fpu and cpu need an 8-byte block
595: of memory. If any fpu reg is used in the function, we allocate
596: such a block here, at the bottom of the frame, just in case it's needed.
597:
598: If this function is a leaf procedure, then we may choose not
599: to do a "save" insn. Currently we do this only if it touches
600: the "output" registers. The "local" and "input" registers
601: are off limits. It might be better to allow one such register
602: to go to the stack, but I doubt it. */
603:
604: #define FUNCTION_PROLOGUE(FILE, SIZE) \
605: { \
606: extern char call_used_regs[]; \
607: extern int current_function_pretend_args_size; \
608: extern int frame_pointer_needed; \
609: int fsize = (((SIZE) + 7 - STARTING_FRAME_OFFSET) & -8); \
610: int actual_fsize; \
611: int n_fregs = 0, i; \
612: int n_iregs = 64; \
613: for (i = 32; i < FIRST_PSEUDO_REGISTER; i++) \
614: if (regs_ever_live[i] && ! call_used_regs[i]) \
615: n_fregs++; \
616: for (i = 16; i < 32; i++) \
617: if (regs_ever_live[i]) { n_iregs = 96; break; } \
618: fprintf (FILE, "\t!#PROLOGUE# 0\n"); \
619: actual_fsize = fsize + n_iregs + (n_fregs*4+7 & -8); \
620: fsize += current_function_pretend_args_size+7 & -8; \
621: actual_fsize += current_function_pretend_args_size+7 & -8; \
622: if (actual_fsize < 4096) \
623: fprintf (FILE, "\tsave %%sp,-%d,%%sp\n", actual_fsize); \
624: else \
625: { \
626: fprintf (FILE, "\tsethi %%hi(0x%x),%%g1\n\tadd %%g1,%%lo(0x%x),%%g1\n", \
627: -actual_fsize, -actual_fsize); \
628: fprintf (FILE, "\tsave %%sp,%%g1,%%sp\n"); \
629: } \
630: fprintf (FILE, "\t!#PROLOGUE# 1\n"); \
631: if (n_fregs) \
632: { \
633: for (i = 32, n_fregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
634: if (regs_ever_live[i] && ! call_used_regs[i]) \
635: { \
636: if (regs_ever_live[i+1] && ! call_used_regs[i+1]) \
637: fprintf (FILE, "\tstd %s,[%%sp+0x%x]\n", \
638: reg_names[i], n_iregs + 4 * n_fregs), \
639: n_fregs += 2, i += 1; \
640: else \
641: fprintf (FILE, "\tstf %s,[%%sp+0x%x]\n", \
642: reg_names[i], n_iregs + 4 * n_fregs++); \
643: } \
644: } \
645: if (regs_ever_live[32]) \
646: fprintf (FILE, "\tst %s,[%%fp-16]\n\tst %s,[%%fp-12]\n", \
647: reg_names[0], reg_names[0]); \
648: }
649:
650: /* Output assembler code to FILE to increment profiler label # LABELNO
651: for profiling a function entry. */
652:
653: #define FUNCTION_PROFILER(FILE, LABELNO) \
654: fprintf (FILE, "\tsethi %%hi(LP%d),%%o0\n\tcall mcount\n\tor %%lo(LP%d),%%o0,%%o0\n", \
655: (LABELNO), (LABELNO))
656:
657: /* Output assembler code to FILE to initialize this source file's
658: basic block profiling info, if that has not already been done. */
659:
660: #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
1.1.1.4 ! root 661: fprintf (FILE, "\tsethi %%hi(LPBX0),%%o0\n\tld [%%lo(LPBX0)+%%o0],%%o1\n\ttst %%o1\n\tbne LPY%d\n\tadd %%o0,%%lo(LPBX0),%%o0\n\tcall ___bb_init_func\n\tnop\nLPY%d:\n", \
1.1 root 662: (LABELNO), (LABELNO))
663:
664: /* Output assembler code to FILE to increment the entry-count for
665: the BLOCKNO'th basic block in this source file. */
666:
667: #define BLOCK_PROFILER(FILE, BLOCKNO) \
668: { \
669: int blockn = (BLOCKNO); \
670: fprintf (FILE, "\tsethi %%hi(LPBX2+%d),%%g1\n\tld [%%lo(LPBX2+%d)+%%g1],%%g2\n\
671: \tadd %%g2,1,%%g2\n\tst %%g2,[%%lo(LPBX2+%d)+%%g1]\n", \
672: 4 * blockn, 4 * blockn, 4 * blockn); \
673: CC_STATUS_INIT; /* We have clobbered %g1. Also %g2. */ \
674: }
675:
676: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
677: the stack pointer does not matter. The value is tested only in
678: functions that have frame pointers.
679: No definition is equivalent to always zero. */
680:
681: extern int may_call_alloca;
682: extern int current_function_pretend_args_size;
683:
684: #define EXIT_IGNORE_STACK \
685: (get_frame_size () != 0 \
686: || may_call_alloca || current_function_pretend_args_size)
687:
688: /* This macro generates the assembly code for function exit,
689: on machines that need it. If FUNCTION_EPILOGUE is not defined
690: then individual return instructions are generated for each
691: return statement. Args are same as for FUNCTION_PROLOGUE.
692:
693: The function epilogue should not depend on the current stack pointer!
694: It should use the frame pointer only. This is mandatory because
695: of alloca; we also take advantage of it to omit stack adjustments
696: before returning. */
697:
698: /* This declaration is needed due to traditional/ANSI
699: incompatibilities which cannot be #ifdefed away
700: because they occur inside of macros. Sigh. */
701: extern union tree_node *current_function_decl;
702:
703: #define FUNCTION_EPILOGUE(FILE, SIZE) \
704: { \
705: extern char call_used_regs[]; \
706: extern int may_call_alloca; \
707: extern int current_function_pretend_args_size; \
708: extern int max_pending_stack_adjust; \
709: extern int frame_pointer_needed; \
710: int fsize = (((SIZE) + 7 - STARTING_FRAME_OFFSET) & -8); \
711: int actual_fsize; \
712: int n_fregs = 0, i; \
713: int n_iregs = 64; \
714: for (i = 32, n_fregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
715: if (regs_ever_live[i] && ! call_used_regs[i]) \
716: n_fregs++; \
717: for (i = 16; i < 32; i++) \
718: if (regs_ever_live[i]) { n_iregs = 96; break; } \
719: actual_fsize = fsize + n_iregs + (n_fregs*4+7 & -8); \
720: actual_fsize += current_function_pretend_args_size+7 & -8; \
721: fsize += current_function_pretend_args_size+7 & -8; \
722: if (n_fregs) \
723: { \
724: char *base; \
725: int offset; \
726: if (fsize < 4096) \
727: { base = "%fp"; offset = n_iregs - actual_fsize; } \
728: else \
729: { base = "%g1"; offset = n_iregs; \
730: if (fsize < 4096) \
731: fprintf (FILE, "sethi %%hi(0x%x),%%g1\n\tadd %%g1,%%lo(0x%x),%%g1\n\tadd %%fp,%%g1,%%g1\n", -actual_fsize, -actual_fsize);\
732: } \
733: for (i = 32, n_fregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
734: if (regs_ever_live[i] && ! call_used_regs[i]) \
735: { \
736: if (regs_ever_live[i+1] && ! call_used_regs[i+1]) \
737: fprintf (FILE, "\tldd [%s%+d],%s\n", \
738: base, offset + 4 * n_fregs, \
739: reg_names[i]), \
740: n_fregs += 2, i += 1; \
741: else \
742: fprintf (FILE, "\tldf [%s%+d],%s\n", \
743: base, offset + 4 * n_fregs++, \
744: reg_names[i]); \
745: } \
746: } \
747: fprintf (FILE, "\tret\n\trestore\n"); \
748: }
749:
750: /* If the memory address ADDR is relative to the frame pointer,
751: correct it to be relative to the stack pointer instead.
752: This is for when we don't use a frame pointer.
753: ADDR should be a variable name. */
754:
755: #define FIX_FRAME_POINTER_ADDRESS(ADDR,DEPTH) \
756: { int offset = -1; \
757: rtx regs = stack_pointer_rtx; \
758: if (ADDR == frame_pointer_rtx) \
759: offset = 0; \
760: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx \
761: && GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \
762: offset = INTVAL (XEXP (ADDR, 1)); \
763: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx) \
764: { rtx other_reg = XEXP (ADDR, 1); \
765: offset = 0; \
766: regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
767: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 1) == frame_pointer_rtx) \
768: { rtx other_reg = XEXP (ADDR, 0); \
769: offset = 0; \
770: regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
771: if (offset >= 0) \
772: { int regno; \
773: extern char call_used_regs[]; \
774: for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
775: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
776: offset += 4; \
777: offset -= 4; \
778: ADDR = plus_constant (regs, offset + (DEPTH)); } }
779:
780: /* Addressing modes, and classification of registers for them. */
781:
782: /* #define HAVE_POST_INCREMENT */
783: /* #define HAVE_POST_DECREMENT */
784:
785: /* #define HAVE_PRE_DECREMENT */
786: /* #define HAVE_PRE_INCREMENT */
787:
788: /* Macros to check register numbers against specific register classes. */
789:
790: /* These assume that REGNO is a hard or pseudo reg number.
791: They give nonzero only if REGNO is a hard reg of the suitable class
792: or a pseudo reg currently allocated to a suitable hard reg.
793: Since they use reg_renumber, they are safe only once reg_renumber
794: has been allocated, which happens in local-alloc.c. */
795:
796: #define REGNO_OK_FOR_INDEX_P(REGNO) \
797: ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
798: #define REGNO_OK_FOR_BASE_P(REGNO) \
799: ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
800: #define REGNO_OK_FOR_FP_P(REGNO) \
801: (((REGNO) ^ 0x20) < 32 || (unsigned) (reg_renumber[REGNO] ^ 0x20) < 32)
802:
803: /* Now macros that check whether X is a register and also,
804: strictly, whether it is in a specified class.
805:
806: These macros are specific to the SPARC, and may be used only
807: in code for printing assembler insns and in conditions for
808: define_optimization. */
809:
810: /* 1 if X is an fp register. */
811:
812: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
813:
814: /* Maximum number of registers that can appear in a valid memory address. */
815:
816: #define MAX_REGS_PER_ADDRESS 2
817:
818: /* Recognize any constant value that is a valid address. */
819:
820: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
821:
822: /* Nonzero if the constant value X is a legitimate general operand.
823: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
824:
825: Anything but a CONST_DOUBLE can be made to work. */
826:
827: #define LEGITIMATE_CONSTANT_P(X) \
828: (GET_CODE (X) != CONST_DOUBLE)
829:
830: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
831: and check its validity for a certain class.
832: We have two alternate definitions for each of them.
833: The usual definition accepts all pseudo regs; the other rejects
834: them unless they have been allocated suitable hard regs.
835: The symbol REG_OK_STRICT causes the latter definition to be used.
836:
837: Most source files want to accept pseudo regs in the hope that
838: they will get allocated to the class that the insn wants them to be in.
839: Source files for reload pass need to be strict.
840: After reload, it makes no difference, since pseudo regs have
841: been eliminated by then. */
842:
843: #ifndef REG_OK_STRICT
844:
845: /* Nonzero if X is a hard reg that can be used as an index
846: or if it is a pseudo reg. */
847: #define REG_OK_FOR_INDEX_P(X) (((unsigned) REGNO (X)) - 32 >= 32)
848: /* Nonzero if X is a hard reg that can be used as a base reg
849: or if it is a pseudo reg. */
850: #define REG_OK_FOR_BASE_P(X) (((unsigned) REGNO (X)) - 32 >= 32)
851:
852: #else
853:
854: /* Nonzero if X is a hard reg that can be used as an index. */
855: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
856: /* Nonzero if X is a hard reg that can be used as a base reg. */
857: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
858:
859: #endif
860:
861: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
862: that is a valid memory address for an instruction.
863: The MODE argument is the machine mode for the MEM expression
864: that wants to use this address.
865:
866: On SPARC, the actual legitimate addresses must be REG+REG or REG+SMALLINT.
867: But we can treat a SYMBOL_REF as legitimate if it is part of this
868: function's constant-pool, because such addresses can actually
869: be output as REG+SMALLINT.
870:
871: Try making SYMBOL_REF (and other things which are CONSTANT_ADDRESS_P)
872: a legitimate address, regardless. Because the only insns which can use
873: memory are load or store insns, the added hair in the machine description
874: is not that bad. It should also speed up the compiler by halving the number
875: of insns it must manage for each (MEM (SYMBOL_REF ...)) involved. */
876:
877: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
878: { if (GET_CODE (X) == REG) \
879: { if (REG_OK_FOR_BASE_P (X)) goto ADDR; } \
880: else if (GET_CODE (X) == PLUS) \
881: { \
882: if (GET_CODE (XEXP (X, 0)) == REG \
883: && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
884: { \
885: if (GET_CODE (XEXP (X, 1)) == REG \
886: && REG_OK_FOR_INDEX_P (XEXP (X, 1))) \
887: goto ADDR; \
888: if (GET_CODE (XEXP (X, 1)) == CONST_INT \
889: && INTVAL (XEXP (X, 1)) >= -0x1000 \
890: && INTVAL (XEXP (X, 1)) < 0x1000) \
891: goto ADDR; \
892: } \
893: else if (GET_CODE (XEXP (X, 1)) == REG \
894: && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
895: { \
896: if (GET_CODE (XEXP (X, 0)) == REG \
897: && REG_OK_FOR_INDEX_P (XEXP (X, 0))) \
898: goto ADDR; \
899: if (GET_CODE (XEXP (X, 0)) == CONST_INT \
900: && INTVAL (XEXP (X, 0)) >= -0x1000 \
901: && INTVAL (XEXP (X, 0)) < 0x1000) \
902: goto ADDR; \
903: } \
904: } \
905: else if (CONSTANT_ADDRESS_P (X)) \
906: goto ADDR; \
907: }
908:
909: /* Try machine-dependent ways of modifying an illegitimate address
910: to be legitimate. If we find one, return the new, valid address.
911: This macro is used in only one place: `memory_address' in explow.c.
912:
913: OLDX is the address as it was before break_out_memory_refs was called.
914: In some cases it is useful to look at this to decide what needs to be done.
915:
916: MODE and WIN are passed so that this macro can use
917: GO_IF_LEGITIMATE_ADDRESS.
918:
919: It is always safe for this macro to do nothing. It exists to recognize
920: opportunities to optimize the output. */
921:
922: /* On SPARC, change REG+N into REG+REG, and REG+(X*Y) into REG+REG. */
923:
924: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
925: { if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
926: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
927: copy_to_mode_reg (SImode, XEXP (X, 1))); \
928: if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
929: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
930: copy_to_mode_reg (SImode, XEXP (X, 0))); \
931: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
932: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
933: force_operand (XEXP (X, 0), 0)); \
934: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
935: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
936: force_operand (XEXP (X, 1), 0)); \
937: if (GET_CODE (x) == SYMBOL_REF) \
938: (X) = copy_to_reg (X); \
939: if (memory_address_p (MODE, X)) \
940: goto WIN; }
941:
942: /* Go to LABEL if ADDR (a legitimate address expression)
943: has an effect that depends on the machine mode it is used for.
944: On the SPARC this is never true. */
945:
946: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
947:
948: /* Specify the machine mode that this machine uses
949: for the index in the tablejump instruction. */
950: #define CASE_VECTOR_MODE SImode
951:
952: /* Define this if the tablejump instruction expects the table
953: to contain offsets from the address of the table.
954: Do not define this if the table should contain absolute addresses. */
955: /* #define CASE_VECTOR_PC_RELATIVE */
956:
957: /* Specify the tree operation to be used to convert reals to integers. */
958: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
959:
960: /* This is the kind of divide that is easiest to do in the general case. */
961: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
962:
963: /* Define this as 1 if `char' should by default be signed; else as 0. */
964: #define DEFAULT_SIGNED_CHAR 1
965:
966: /* Max number of bytes we can move from memory to memory
967: in one reasonably fast instruction. */
968: #define MOVE_MAX 4
969:
970: /* Nonzero if access to memory by bytes is slow and undesirable. */
971: #define SLOW_BYTE_ACCESS 0
972:
973: /* We assume that the store-condition-codes instructions store 0 for false
974: and some other value for true. This is the value stored for true. */
975:
976: #define STORE_FLAG_VALUE 1
977:
978: /* When a prototype says `char' or `short', really pass an `int'. */
979: #define PROMOTE_PROTOTYPES
980:
981: /* Define if shifts truncate the shift count
982: which implies one can omit a sign-extension or zero-extension
983: of a shift count. */
984: #define SHIFT_COUNT_TRUNCATED
985:
986: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
987: is done just by pretending it is already truncated. */
988: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
989:
990: /* Specify the machine mode that pointers have.
991: After generation of rtl, the compiler makes no further distinction
992: between pointers and any other objects of this machine mode. */
993: #define Pmode SImode
994:
995: /* A function address in a call instruction
996: is a byte address (for indexing purposes)
997: so give the MEM rtx a byte's mode. */
998: #define FUNCTION_MODE SImode
999:
1000: /* Define this if addresses of constant functions
1001: shouldn't be put through pseudo regs where they can be cse'd.
1002: Desirable on machines where ordinary constants are expensive
1003: but a CALL with constant address is cheap. */
1004: #define NO_FUNCTION_CSE
1005:
1006: /* Define subroutines to call to handle multiply and divide.
1007: Use the subroutines that Sun's library provides.
1008: The `*' prevents an underscore from being prepended by the compiler. */
1009:
1010: #define DIVSI3_LIBCALL "*.div"
1011: #define UDIVSI3_LIBCALL "*.udiv"
1012: #define MODSI3_LIBCALL "*.rem"
1013: #define UMODSI3_LIBCALL "*.urem"
1014: #define MULSI3_LIBCALL "*.mul"
1015: #define UMULSI3_LIBCALL "*.umul"
1016:
1017: /* Compute the cost of computing a constant rtl expression RTX
1018: whose rtx-code is CODE. The body of this macro is a portion
1019: of a switch statement. If the code is computed here,
1020: return it with a return statement. Otherwise, break from the switch. */
1021:
1022: #define CONST_COSTS(RTX,CODE) \
1023: case CONST_INT: \
1024: if (INTVAL (RTX) < 0x1000 && INTVAL (RTX) >= -0x1000) return 0; \
1025: case CONST: \
1026: case LABEL_REF: \
1027: case SYMBOL_REF: \
1028: return 2; \
1029: case CONST_DOUBLE: \
1030: return 4;
1031:
1032: /* Tell final.c how to eliminate redundant test instructions. */
1033:
1034: /* Here we define machine-dependent flags and fields in cc_status
1035: (see `conditions.h'). */
1036:
1037: /* This holds the value sourcing %hi(%g1). We keep this info
1038: around so that mem/mem ops, such as increment and decrement,
1039: etc, can be performed reasonably. */
1040: #define CC_STATUS_MDEP rtx
1041:
1042: /* Nonzero if the results of the previous comparison are
1043: in the floating point condition code register. */
1044:
1045: #define CC_IN_FCCR 04000
1046:
1047: /* Nonzero if the results of the previous comparison are
1048: int the coprocessor's condition code register. */
1049:
1050: #define CC_IN_CCCR 010000
1051:
1052: /* Nonzero if we know (easily) that floating point register f0
1053: (f1) contains the value 0. */
1054: #define CC_F0_IS_0 020000
1055: #define CC_F1_IS_0 040000
1056:
1057: /* Nonzero if we know the value of %hi(%g1). */
1058: #define CC_KNOW_HI_G1 0100000
1059:
1060: #define CC_STATUS_MDEP_INIT (cc_status.mdep = 0)
1061:
1062: /* Store in cc_status the expressions
1063: that the condition codes will describe
1064: after execution of an instruction whose pattern is EXP.
1065: Do not alter them if the instruction would not alter the cc's. */
1066:
1067: #define NOTICE_UPDATE_CC(EXP, INSN) \
1068: { if (GET_CODE (EXP) == SET) \
1069: { if (SET_DEST (EXP) == cc0_rtx) \
1070: { cc_status.flags = 0; \
1071: cc_status.value1 = SET_DEST (EXP); \
1072: cc_status.value2 = SET_SRC (EXP); } \
1073: else if (GET_CODE (SET_SRC (EXP)) == CALL) \
1074: { CC_STATUS_INIT; } \
1075: else if (GET_CODE (SET_DEST (EXP)) == REG) \
1076: { if (cc_status.value1 \
1077: && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value1)) \
1078: cc_status.value1 = 0; \
1079: if (cc_status.value2 \
1080: && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value2)) \
1081: cc_status.value2 = 0; \
1082: } \
1083: else if (GET_CODE (SET_DEST (EXP)) == MEM) \
1084: { rtx x = cc_status.mdep; int know = cc_status.flags & CC_KNOW_HI_G1; \
1085: CC_STATUS_INIT; \
1086: if (x && know) \
1087: { cc_status.mdep = x; cc_status.flags |= CC_KNOW_HI_G1; } \
1088: } \
1089: } \
1090: else if (GET_CODE (EXP) == PARALLEL \
1091: && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \
1092: { if (SET_DEST (XVECEXP (EXP, 0, 0)) == cc0_rtx) \
1093: { cc_status.flags = 0; \
1094: cc_status.value1 = SET_DEST (XVECEXP (EXP, 0, 0)); \
1095: cc_status.value2 = SET_SRC (XVECEXP (EXP, 0, 0)); \
1096: } \
1097: else if (GET_CODE (SET_SRC (XVECEXP (EXP, 0, 0))) == CALL) \
1098: { /* all bets are off */ CC_STATUS_INIT; } \
1099: else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == REG) \
1100: { if (cc_status.value1 \
1101: && reg_overlap_mentioned_p (SET_DEST (XVECEXP (EXP, 0, 0)), cc_status.value1)) \
1102: cc_status.value1 = 0; \
1103: if (cc_status.value2 \
1104: && reg_overlap_mentioned_p (SET_DEST (XVECEXP (EXP, 0, 0)), cc_status.value2)) \
1105: cc_status.value2 = 0; \
1106: } \
1107: else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == MEM) \
1108: { rtx x = cc_status.mdep; int know = cc_status.flags & CC_KNOW_HI_G1; \
1109: CC_STATUS_INIT; \
1110: if (x && know) \
1111: { cc_status.mdep = x; cc_status.flags |= CC_KNOW_HI_G1; } \
1112: } \
1113: } \
1114: else if (GET_CODE (EXP) == PARALLEL) \
1115: /* insn-peep has changed this insn beyond recognition
1116: by NOTICE_UPDATE_CC. However, we know it is either
1117: a call or a branch with a delay slot filled, so we can
1118: give up on knowing condition codes in any case. */ \
1119: { CC_STATUS_INIT; } \
1120: else if (GET_CODE (EXP) == CALL) \
1121: { /* all bets are off */ CC_STATUS_INIT; } \
1122: }
1.1.1.3 root 1123:
1124: #define OUTPUT_JUMP(NORMAL, NO_OV, FLOAT) \
1125: { if (cc_prev_status.flags & CC_IN_FCCR) \
1126: return FLOAT; \
1127: if (cc_prev_status.flags & CC_NO_OVERFLOW) \
1128: return NO_OV; \
1129: return NORMAL; }
1.1 root 1130:
1131: /* Control the assembler format that we output. */
1132:
1133: /* Output at beginning of assembler file. */
1134:
1135: #define ASM_FILE_START(file)
1136:
1137: /* Output to assembler file text saying following lines
1138: may contain character constants, extra white space, comments, etc. */
1139:
1140: #define ASM_APP_ON ""
1141:
1142: /* Output to assembler file text saying following lines
1143: no longer contain unusual constructs. */
1144:
1145: #define ASM_APP_OFF ""
1146:
1147: /* Output before read-only data. */
1148:
1149: #define TEXT_SECTION_ASM_OP ".text"
1150:
1151: /* Output before writable data. */
1152:
1153: #define DATA_SECTION_ASM_OP ".data"
1154:
1155: /* How to refer to registers in assembler output.
1156: This sequence is indexed by compiler's hard-register-number (see above). */
1157:
1158: #define REGISTER_NAMES \
1159: {"%g0", "%g1", "%g2", "%g3", "%g4", "%g5", "%g6", "%g7", \
1160: "%o0", "%o1", "%o2", "%o3", "%o4", "%o5", "%sp", "%o7", \
1161: "%l0", "%l1", "%l2", "%l3", "%l4", "%l5", "%l6", "%l7", \
1162: "%i0", "%i1", "%i2", "%i3", "%i4", "%i5", "%fp", "%i7", \
1163: "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7", \
1164: "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15", \
1165: "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23", \
1166: "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31"} \
1167:
1168: /* How to renumber registers for dbx and gdb. */
1169:
1170: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1171:
1172: /* On Sun 4, this limit is 2048. We use 1500 to be safe,
1173: since the length can run past this up to a continuation point. */
1174: #define DBX_CONTIN_LENGTH 1500
1175:
1176: /* This is how to output a note to DBX telling it the line number
1177: to which the following sequence of instructions corresponds.
1178:
1179: This is needed for SunOS 4.0, and should not hurt for 3.2
1180: versions either. */
1181: #define ASM_OUTPUT_SOURCE_LINE(file, line) \
1182: { static int sym_lineno = 1; \
1183: fprintf (file, ".stabn 68,0,%d,LM%d\nLM%d:\n", \
1184: line, sym_lineno, sym_lineno); \
1185: sym_lineno += 1; }
1186:
1187: /* This is how to output the definition of a user-level label named NAME,
1188: such as the label on a static function or variable NAME. */
1189:
1190: #define ASM_OUTPUT_LABEL(FILE,NAME) \
1191: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1192:
1193: /* This is how to output a command to make the user-level label named NAME
1194: defined for reference from other files. */
1195:
1196: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1197: do { fputs (".global ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1198:
1199: /* This is how to output a reference to a user-level label named NAME.
1200: `assemble_name' uses this. */
1201:
1202: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1203: fprintf (FILE, "_%s", NAME)
1204:
1205: /* This is how to output an internal numbered label where
1206: PREFIX is the class of label and NUM is the number within the class. */
1207:
1208: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1209: fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1210:
1211: /* This is how to store into the string LABEL
1212: the symbol_ref name of an internal numbered label where
1213: PREFIX is the class of label and NUM is the number within the class.
1214: This is suitable for output with `assemble_name'. */
1215:
1216: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1217: sprintf (LABEL, "*%s%d", PREFIX, NUM)
1218:
1219: /* This is how to output an assembler line defining a `double' constant. */
1220:
1221: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1222: (isinf ((VALUE)) \
1223: ? fprintf (FILE, "\t.double 0r%s99e999\n", ((VALUE) > 0 ? "" : "-")) \
1224: : fprintf (FILE, "\t.double 0r%.20e\n", (VALUE)))
1225:
1226: /* This is how to output an assembler line defining a `float' constant. */
1227:
1228: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1229: (isinf ((VALUE)) \
1230: ? fprintf (FILE, "\t.single 0r%s99e999\n", ((VALUE) > 0 ? "" : "-")) \
1231: : fprintf (FILE, "\t.single 0r%.20e\n", (VALUE)))
1232:
1233: /* This is how to output an assembler line defining an `int' constant. */
1234:
1235: #define ASM_OUTPUT_INT(FILE,VALUE) \
1236: ( fprintf (FILE, "\t.word "), \
1237: output_addr_const (FILE, (VALUE)), \
1238: fprintf (FILE, "\n"))
1239:
1240: /* Likewise for `char' and `short' constants. */
1241:
1242: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1243: ( fprintf (FILE, "\t.half "), \
1244: output_addr_const (FILE, (VALUE)), \
1245: fprintf (FILE, "\n"))
1246:
1247: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1248: ( fprintf (FILE, "\t.byte "), \
1249: output_addr_const (FILE, (VALUE)), \
1250: fprintf (FILE, "\n"))
1251:
1252: /* This is how to output an assembler line for a numeric constant byte. */
1253:
1254: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1255: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1256:
1257: /* This is how to output an element of a case-vector that is absolute. */
1258:
1259: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1260: fprintf (FILE, "\t.word L%d\n", VALUE)
1261:
1262: /* This is how to output an element of a case-vector that is relative.
1263: (SPARC does not use such vectors,
1264: but we must define this macro anyway.) */
1265:
1266: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1267: fprintf (FILE, "\t.word L%d-L%d\n", VALUE, REL)
1268:
1269: /* This is how to output an assembler line
1270: that says to advance the location counter
1271: to a multiple of 2**LOG bytes. */
1272:
1273: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1274: if ((LOG) != 0) \
1275: fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1276:
1277: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1.1.1.3 root 1278: fprintf (FILE, "\t.skip %u\n", (SIZE))
1.1 root 1279:
1280: /* This says how to output an assembler line
1281: to define a global common symbol. */
1282:
1283: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1284: ( fputs (".global ", (FILE)), \
1285: assemble_name ((FILE), (NAME)), \
1286: fputs ("\n.common ", (FILE)), \
1287: assemble_name ((FILE), (NAME)), \
1.1.1.3 root 1288: fprintf ((FILE), ",%u,\"bss\"\n", (ROUNDED)))
1.1 root 1289:
1290: /* This says how to output an assembler line
1291: to define a local common symbol. */
1292:
1293: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1294: ( fputs ("\n.reserve ", (FILE)), \
1295: assemble_name ((FILE), (NAME)), \
1.1.1.3 root 1296: fprintf ((FILE), ",%u,\"bss\"\n", (ROUNDED)))
1.1 root 1297:
1298: /* Store in OUTPUT a string (made with alloca) containing
1299: an assembler-name for a local static variable named NAME.
1300: LABELNO is an integer which is different for each call. */
1301:
1302: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1303: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1304: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1305:
1306: /* Define the parentheses used to group arithmetic operations
1307: in assembler code. */
1308:
1309: #define ASM_OPEN_PAREN "("
1310: #define ASM_CLOSE_PAREN ")"
1311:
1312: /* Define results of standard character escape sequences. */
1313: #define TARGET_BELL 007
1314: #define TARGET_BS 010
1315: #define TARGET_TAB 011
1316: #define TARGET_NEWLINE 012
1317: #define TARGET_VT 013
1318: #define TARGET_FF 014
1319: #define TARGET_CR 015
1320:
1321: /* Print operand X (an rtx) in assembler syntax to file FILE.
1322: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1323: For `%' followed by punctuation, CODE is the punctuation and X is null.
1324:
1325: On SPARC, the CODE can be `r', meaning this is a register-only operand
1326: and an immediate zero should be represented as `r0'.
1327: It can also be `m', meaning that X is a memory reference but print
1.1.1.3 root 1328: its address as a non-memory operand.
1329:
1330: Codes C, N, F, I, and U are used for printing the opcodes of conditional
1331: branches. C prints the opcode for a given condition; N the negated opcode.
1332: F prints the negated floating point opcode (different because of nans).
1333: I prints the opcode that ignores the overflow bit, and U its negation. */
1.1 root 1334:
1335: #define PRINT_OPERAND(FILE, X, CODE) \
1336: { if (GET_CODE (X) == REG) \
1337: fprintf (FILE, "%s", reg_names[REGNO (X)]); \
1338: else if ((CODE) == 'm') \
1339: output_address (XEXP (X, 0)); \
1340: else if (GET_CODE (X) == MEM) \
1341: { \
1342: fputc ('[', FILE); \
1343: output_address (XEXP (X, 0)); \
1344: fputc (']', FILE); \
1345: } \
1346: else if (GET_CODE (X) == CONST_DOUBLE) \
1347: abort (); \
1348: else if ((CODE) == 'r' && (X) == const0_rtx) \
1349: fprintf (FILE, "%%g0"); \
1350: else if ((CODE) == 'C') switch (GET_CODE (X)) \
1351: { \
1352: case EQ: fputs ("e", FILE); break; \
1353: case NE: fputs ("ne", FILE); break; \
1354: case GT: fputs ("g", FILE); break; \
1355: case GE: fputs ("ge", FILE); break; \
1356: case LT: fputs ("l", FILE); break; \
1357: case LE: fputs ("le", FILE); break; \
1358: case GTU: fputs ("gu", FILE); break; \
1359: case GEU: fputs ("geu", FILE); break; \
1360: case LTU: fputs ("lu", FILE); break; \
1361: case LEU: fputs ("leu", FILE); break; \
1362: } \
1.1.1.3 root 1363: else if ((CODE) == 'I') switch (GET_CODE (X)) \
1364: { \
1365: case EQ: fputs ("e", FILE); break; \
1366: case NE: fputs ("ne", FILE); break; \
1367: case GE: fputs ("pos", FILE); break; \
1368: case LT: fputs ("neg", FILE); break; \
1369: default: \
1370: abort (); \
1371: } \
1372: else if ((CODE) == 'U') switch (GET_CODE (X)) \
1373: { \
1374: case EQ: fputs ("ne", FILE); break; \
1375: case NE: fputs ("e", FILE); break; \
1376: case GE: fputs ("neg", FILE); break; \
1377: case LT: fputs ("pos", FILE); break; \
1378: default: \
1379: abort (); \
1380: } \
1.1 root 1381: else if ((CODE) == 'N') switch (GET_CODE (X)) \
1382: { \
1383: case EQ: fputs ("ne", FILE); break; \
1384: case NE: fputs ("e", FILE); break; \
1385: case GT: fputs ("le", FILE); break; \
1386: case GE: fputs ("l", FILE); break; \
1387: case LT: fputs ("ge", FILE); break; \
1388: case LE: fputs ("g", FILE); break; \
1389: case GTU: fputs ("leu", FILE); break; \
1390: case GEU: fputs ("lu", FILE); break; \
1391: case LTU: fputs ("geu", FILE); break; \
1392: case LEU: fputs ("gu", FILE); break; \
1393: } \
1394: else if ((CODE) == 'F') switch (GET_CODE (X)) \
1395: { \
1396: case EQ: fputs ("ne", FILE); break; \
1397: case NE: fputs ("e", FILE); break; \
1398: case GT: fputs ("ule", FILE); break; \
1399: case GE: fputs ("ul", FILE); break; \
1400: case LT: fputs ("uge", FILE); break; \
1401: case LE: fputs ("ug", FILE); break; \
1402: default: abort (); \
1403: } \
1404: else { output_addr_const (FILE, X); }}
1405:
1406: /* Print a memory address as an operand to reference that memory location. */
1407:
1408: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1409: { register rtx base, index = 0; \
1410: int offset = 0; \
1411: register rtx addr = ADDR; \
1412: if (GET_CODE (addr) == REG) \
1413: { \
1414: fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1415: } \
1416: else if (GET_CODE (addr) == PLUS) \
1417: { \
1418: if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1419: offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1);\
1420: else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1421: offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0);\
1422: else \
1423: base = XEXP (addr, 0), index = XEXP (addr, 1); \
1424: fprintf (FILE, "%s", reg_names[REGNO (base)]); \
1425: if (index == 0) \
1426: fprintf (FILE, "%+d", offset); \
1427: else \
1428: fprintf (FILE, "+%s", reg_names[REGNO (index)]); \
1429: } \
1430: else \
1431: { \
1432: output_addr_const (FILE, addr); \
1433: } \
1434: }
1435:
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