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1.1 root 1: /* Definitions of target machine for GNU compiler, for Sun SPARC.
2: Copyright (C) 1988 Free Software Foundation, Inc.
3: Contributed by Michael Tiemann ([email protected]).
4:
5: This file is part of GNU CC.
6:
7: GNU CC is free software; you can redistribute it and/or modify
8: it under the terms of the GNU General Public License as published by
9: the Free Software Foundation; either version 1, or (at your option)
10: any later version.
11:
12: GNU CC is distributed in the hope that it will be useful,
13: but WITHOUT ANY WARRANTY; without even the implied warranty of
14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15: GNU General Public License for more details.
16:
17: You should have received a copy of the GNU General Public License
18: along with GNU CC; see the file COPYING. If not, write to
19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20:
21: /* Note that some other tm- files include this one and then override
22: many of the definitions that relate to assembler syntax. */
23:
24: /* Specify library to handle `-a' basic block profiling. */
25:
26: #define LIB_SPEC "%{a:/usr/lib/bb_link.o} \
27: %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p} "
28:
29: /* Provide required defaults for linker -e and -d switches.
30: Also, it is hard to debug with shared libraries,
31: so don't use them if going to debug. */
32:
1.1.1.5 ! root 33: #define LINK_SPEC "%{!e*:-e start} -dc -dp %{static:-Bstatic} %{Bstatic} \
! 34: %{assert*}"
1.1 root 35:
36: /* Special flags to the Sun-4 assembler when using pipe for input. */
37:
38: #define ASM_SPEC " %{pipe:-} "
39:
1.1.1.3 root 40: /* Prevent error on `-dalign', `-sun4' and `-target sun4' options. */
1.1 root 41:
1.1.1.3 root 42: #define CC1_SPEC "%{dalign:} %{sun4:} %{target:}"
43:
44: /* These compiler options take an argument. We ignore -target for now. */
45:
1.1.1.5 ! root 46: #define WORD_SWITCH_TAKES_ARG(STR) \
! 47: (!strcmp (STR, "target") || !strcmp (STR, "Tdata") \
! 48: || !strcmp (STR, "assert"))
1.1 root 49:
50: /* Names to predefine in the preprocessor for this target machine. */
51:
52: #define CPP_PREDEFINES "-Dsparc -Dsun -Dunix"
53:
54: /* Print subsidiary information on the compiler version in use. */
55:
56: #define TARGET_VERSION fprintf (stderr, " (sparc)");
57:
58: /* Generate DBX debugging information. */
59:
60: #define DBX_DEBUGGING_INFO
61:
62: /* Run-time compilation parameters selecting different hardware subsets. */
63:
64: extern int target_flags;
65:
66: /* Nonzero if we should generate code to use the fpu. */
67: #define TARGET_FPU (target_flags & 1)
68:
69: /* Nonzero if we should use FUNCTION_EPILOGUE. Otherwise, we
70: use fast return insns, but lose some generality. */
71: #define TARGET_EPILOGUE (target_flags & 2)
72:
73: /* Nonzero if we expect to be passed through the Sun
74: optimizing assembler. This requires us to generate
75: code which we otherwise would not. For example,
76: calls via pointers-to-functions must be output
77: specially because Sun assemble does not do proper flow
78: analysis for this case. */
79: #define TARGET_SUN_ASM (target_flags & 4)
80:
81: /* Nonzero if we should do eager peepholes for conditional branch
82: scheduling. */
83: #define TARGET_EAGER (target_flags & 8)
84:
85: /* Macro to define tables used to set the flags.
86: This is a list in braces of pairs in braces,
87: each pair being { "NAME", VALUE }
88: where VALUE is the bits to set or minus the bits to clear.
89: An empty string NAME is used to identify the default VALUE. */
90:
91: #define TARGET_SWITCHES \
92: { {"fpu", 1}, \
93: {"soft-float", -1}, \
94: {"epilogue", 2}, \
95: {"no-epilogue", -2}, \
96: {"sun-asm", 4}, \
97: {"eager", 8}, \
98: { "", TARGET_DEFAULT}}
99:
100: #define TARGET_DEFAULT 3
101:
102: /* target machine storage layout */
103:
104: /* Define this if most significant bit is lowest numbered
105: in instructions that operate on numbered bit-fields. */
106: #define BITS_BIG_ENDIAN
107:
108: /* Define this if most significant byte of a word is the lowest numbered. */
109: /* This is true on the SPARC. */
110: #define BYTES_BIG_ENDIAN
111:
112: /* Define this if most significant word of a multiword number is numbered. */
113: /* For SPARC we can decide arbitrarily
114: since there are no machine instructions for them. */
115: /* #define WORDS_BIG_ENDIAN */
116:
117: /* number of bits in an addressible storage unit */
118: #define BITS_PER_UNIT 8
119:
120: /* Width in bits of a "word", which is the contents of a machine register.
121: Note that this is not necessarily the width of data type `int';
122: if using 16-bit ints on a 68000, this would still be 32.
123: But on a machine with 16-bit registers, this would be 16. */
124: #define BITS_PER_WORD 32
125:
126: /* Width of a word, in units (bytes). */
127: #define UNITS_PER_WORD 4
128:
129: /* Width in bits of a pointer.
130: See also the macro `Pmode' defined below. */
131: #define POINTER_SIZE 32
132:
133: /* Allocation boundary (in *bits*) for storing pointers in memory. */
134: #define POINTER_BOUNDARY 32
135:
136: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
137: #define PARM_BOUNDARY 32
138:
139: /* Boundary (in *bits*) on which stack pointer should be aligned. */
140: #define STACK_BOUNDARY 64
141:
142: /* Allocation boundary (in *bits*) for the code of a function. */
143: #define FUNCTION_BOUNDARY 32
144:
145: /* Alignment of field after `int : 0' in a structure. */
146: #define EMPTY_FIELD_BOUNDARY 32
147:
148: /* Every structure's size must be a multiple of this. */
149: #define STRUCTURE_SIZE_BOUNDARY 8
150:
151: /* A bitfield declared as `int' forces `int' alignment for the struct. */
1.1.1.3 root 152: #define PCC_BITFIELD_TYPE_MATTERS 1
1.1 root 153:
154: /* No data type wants to be aligned rounder than this. */
155: #define BIGGEST_ALIGNMENT 64
156:
157: /* Define this if move instructions will actually fail to work
158: when given unaligned data. */
159: #define STRICT_ALIGNMENT
160:
161: /* Things that must be doubleword aligned cannot go in the text section,
162: because the linker fails to align the text section enough!
163: Put them in the data section. */
164: #define MAX_TEXT_ALIGN 32
165:
166: #define SELECT_SECTION(T) \
167: { \
168: if (TREE_CODE (T) == VAR_DECL) \
169: { \
170: if (TREE_READONLY (T) && ! TREE_VOLATILE (T) \
171: && DECL_ALIGN (T) <= MAX_TEXT_ALIGN) \
172: text_section (); \
173: else \
174: data_section (); \
175: } \
176: if (*tree_code_type[(int) TREE_CODE (T)] == 'c') \
177: { \
178: if ((TREE_CODE (T) == STRING_CST && flag_writable_strings) \
179: || TYPE_ALIGN (TREE_TYPE (T)) > MAX_TEXT_ALIGN) \
180: data_section (); \
181: else \
182: text_section (); \
183: } \
184: }
185:
1.1.1.2 root 186: /* Use text section for a constant
187: unless we need more alignment than that offers. */
1.1 root 188: #define SELECT_RTX_SECTION(MODE, X) \
189: { \
1.1.1.2 root 190: if (GET_MODE_BITSIZE (MODE) <= MAX_TEXT_ALIGN)\
1.1 root 191: text_section (); \
192: else \
193: data_section (); \
194: }
195:
196: /* Standard register usage. */
197:
198: /* Number of actual hardware registers.
199: The hardware registers are assigned numbers for the compiler
200: from 0 to just below FIRST_PSEUDO_REGISTER.
201: All registers that the compiler knows about must be given numbers,
202: even those that are not normally considered general registers.
203:
204: SPARC has 32 fullword registers and 32 floating point registers. */
205:
206: #define FIRST_PSEUDO_REGISTER 64
207:
208: /* 1 for registers that have pervasive standard uses
209: and are not available for the register allocator.
210: On SPARC, this includes all the global registers
211: (registers r[0] through r[7]) and the callee return
212: address register, r[15]. */
213: #define FIXED_REGISTERS \
214: {1, 1, 1, 1, 1, 1, 1, 1, \
215: 0, 0, 0, 0, 0, 0, 1, 1, \
216: 0, 0, 0, 0, 0, 0, 0, 0, \
217: 0, 0, 0, 0, 0, 0, 1, 1, \
218: \
219: 1, 1, 0, 0, 0, 0, 0, 0, \
220: 0, 0, 0, 0, 0, 0, 0, 0, \
221: 0, 0, 0, 0, 0, 0, 0, 0, \
222: 0, 0, 0, 0, 0, 0, 0, 0}
223:
224:
225: /* 1 for registers not available across function calls.
226: These must include the FIXED_REGISTERS and also any
227: registers that can be used without being saved.
228: The latter must include the registers where values are returned
229: and the register where structure-value addresses are passed.
230: Aside from that, you can include as many other registers as you like. */
231: #define CALL_USED_REGISTERS \
232: {1, 1, 1, 1, 1, 1, 1, 1, \
233: 1, 1, 1, 1, 1, 1, 1, 1, \
234: 0, 0, 0, 0, 0, 0, 0, 0, \
235: 0, 0, 0, 0, 0, 0, 1, 1, \
236: \
237: 1, 1, 1, 1, 1, 1, 1, 1, \
238: 1, 1, 1, 1, 1, 1, 1, 1, \
239: 1, 1, 1, 1, 1, 1, 1, 1, \
240: 1, 1, 1, 1, 1, 1, 1, 1}
241:
242: /* Return number of consecutive hard regs needed starting at reg REGNO
243: to hold something of mode MODE.
244: This is ordinarily the length in words of a value of mode MODE
245: but can be less for certain modes in special long registers.
246:
247: On SPARC, ordinary registers hold 32 bits worth;
248: this means both integer and floating point registers. */
249: #define HARD_REGNO_NREGS(REGNO, MODE) \
250: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
251:
252: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
253: On SPARC, the cpu registers can hold any mode but the float registers
254: can only hold SFmode or DFmode. */
255: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
256: ((REGNO) < 32 ? ((GET_MODE_SIZE (MODE) <= 4) ? 1 : ((REGNO) & 1) == 0) : \
257: ((MODE) == SFmode ? 1 : (MODE) == DFmode && ((REGNO) & 1) == 0))
258:
259: /* Value is 1 if it is a good idea to tie two pseudo registers
260: when one has mode MODE1 and one has mode MODE2.
261: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
262: for any hard reg, then this must be 0 for correct output. */
263: #define MODES_TIEABLE_P(MODE1, MODE2) \
264: (((MODE1) == SFmode || (MODE1) == DFmode) \
265: == ((MODE2) == SFmode || (MODE2) == DFmode))
266:
267: /* Specify the registers used for certain standard purposes.
268: The values of these macros are register numbers. */
269:
270: /* SPARC pc isn't overloaded on a register that the compiler knows about. */
271: /* #define PC_REGNUM */
272:
273: /* Register to use for pushing function arguments. */
274: #define STACK_POINTER_REGNUM 14
275:
276: /* Actual top-of-stack address is 92 greater
277: than the contents of the stack pointer register. */
278: #define STACK_POINTER_OFFSET 92
279:
280: /* Base register for access to local variables of the function. */
281: #define FRAME_POINTER_REGNUM 30
282:
283: /* Value should be nonzero if functions must have frame pointers.
284: Zero means the frame pointer need not be set up (and parms
285: may be accessed via the stack pointer) in functions that seem suitable.
286: This is computed in `reload', in reload1.c. */
287: #define FRAME_POINTER_REQUIRED 1
288:
289: /* Base register for access to arguments of the function. */
290: #define ARG_POINTER_REGNUM 30
291:
292: /* Register in which static-chain is passed to a function. */
293: /* ??? */
294: #define STATIC_CHAIN_REGNUM 1
295:
296:
297: /* Functions which return large structures get the address
298: to place the wanted value at offset 64 from the frame. */
299: #define STRUCT_VALUE_OFFSET 64 /* Used only in other #defines in this file. */
300: #define STRUCT_VALUE \
301: gen_rtx (MEM, Pmode, \
302: gen_rtx (PLUS, SImode, stack_pointer_rtx, \
303: gen_rtx (CONST_INT, VOIDmode, STRUCT_VALUE_OFFSET)))
304: #define STRUCT_VALUE_INCOMING \
305: gen_rtx (MEM, Pmode, \
306: gen_rtx (PLUS, SImode, frame_pointer_rtx, \
307: gen_rtx (CONST_INT, VOIDmode, STRUCT_VALUE_OFFSET)))
308:
309: /* Define the classes of registers for register constraints in the
310: machine description. Also define ranges of constants.
311:
312: One of the classes must always be named ALL_REGS and include all hard regs.
313: If there is more than one class, another class must be named NO_REGS
314: and contain no registers.
315:
316: The name GENERAL_REGS must be the name of a class (or an alias for
317: another name such as ALL_REGS). This is the class of registers
318: that is allowed by "g" or "r" in a register constraint.
319: Also, registers outside this class are allocated only when
320: instructions express preferences for them.
321:
322: The classes must be numbered in nondecreasing order; that is,
323: a larger-numbered class must never be contained completely
324: in a smaller-numbered class.
325:
326: For any two classes, it is very desirable that there be another
327: class that represents their union. */
328:
329: /* The SPARC has two kinds of registers, general and floating point. */
330:
331: enum reg_class { NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES };
332:
333: #define N_REG_CLASSES (int) LIM_REG_CLASSES
334:
335: /* Give names of register classes as strings for dump file. */
336:
337: #define REG_CLASS_NAMES \
338: {"NO_REGS", "GENERAL_REGS", "FP_REGS", "ALL_REGS" }
339:
340: /* Define which registers fit in which classes.
341: This is an initializer for a vector of HARD_REG_SET
342: of length N_REG_CLASSES. */
343:
344: #define REG_CLASS_CONTENTS {{0, 0}, {-1, 0}, {0, -1}, {-1, -1}}
345:
346: /* The same information, inverted:
347: Return the class number of the smallest class containing
348: reg number REGNO. This could be a conditional expression
349: or could index an array. */
350:
351: #define REGNO_REG_CLASS(REGNO) \
352: ((REGNO) >= 32 ? FP_REGS : GENERAL_REGS)
353:
354: /* The class value for index registers, and the one for base regs. */
355: #define INDEX_REG_CLASS GENERAL_REGS
356: #define BASE_REG_CLASS GENERAL_REGS
357:
358: /* Get reg_class from a letter such as appears in the machine description. */
359:
360: #define REG_CLASS_FROM_LETTER(C) \
361: ((C) == 'f' ? FP_REGS : NO_REGS)
362:
363: /* The letters I, J, K, L and M in a register constraint string
364: can be used to stand for particular ranges of immediate operands.
365: This macro defines what the ranges are.
366: C is the letter, and VALUE is a constant value.
367: Return 1 if VALUE is in the range specified by C.
368:
369: For SPARC, `I' is used for the range of constants an insn
370: can actually contain.
371: `J' is used for the range which is just zero (since that is R0).
372: `K' is used for the 5-bit operand of a compare insns. */
373:
374: #define SMALL_INT(X) ((unsigned) (INTVAL (X) + 0x1000) < 0x2000)
375:
376: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
377: ((C) == 'I' ? (unsigned) ((VALUE) + 0x1000) < 0x2000 \
378: : (C) == 'J' ? (VALUE) == 0 \
379: : (C) == 'K' ? (unsigned) (VALUE) < 0x20 \
380: : 0)
381:
382: /* Similar, but for floating constants, and defining letters G and H.
383: Here VALUE is the CONST_DOUBLE rtx itself. */
384:
1.1.1.4 root 385: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
386: ((C) == 'G' && CONST_DOUBLE_LOW ((VALUE)) == 0 \
387: && CONST_DOUBLE_HIGH ((VALUE)) == 0)
1.1 root 388:
389: /* Given an rtx X being reloaded into a reg required to be
390: in class CLASS, return the class of reg to actually use.
391: In general this is just CLASS; but on some machines
392: in some cases it is preferable to use a more restrictive class. */
393: #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
394:
395: /* Return the maximum number of consecutive registers
396: needed to represent mode MODE in a register of class CLASS. */
397: /* On SPARC, this is the size of MODE in words,
398: except in the FP regs, where a single reg is always enough. */
399: #define CLASS_MAX_NREGS(CLASS, MODE) \
400: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
401:
402: /* Stack layout; function entry, exit and calling. */
403:
404: /* Define this if pushing a word on the stack
405: makes the stack pointer a smaller address. */
406: #define STACK_GROWS_DOWNWARD
407:
408: /* Define this if the nominal address of the stack frame
409: is at the high-address end of the local variables;
410: that is, each additional local variable allocated
411: goes at a more negative offset in the frame. */
412: #define FRAME_GROWS_DOWNWARD
413:
414: /* Offset within stack frame to start allocating local variables at.
415: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
416: first local allocated. Otherwise, it is the offset to the BEGINNING
417: of the first local allocated. */
418: #define STARTING_FRAME_OFFSET -16
419:
420: /* If we generate an insn to push BYTES bytes,
421: this says how many the stack pointer really advances by.
422: On SPARC, don't define this because there are no push insns. */
423: /* #define PUSH_ROUNDING(BYTES) */
424:
425: /* Offset of first parameter from the argument pointer register value.
426: This is 64 for the ins and locals, plus 4 for the struct-return reg
427: if this function isn't going to use it. */
428: #define FIRST_PARM_OFFSET(FNDECL) \
1.1.1.5 ! root 429: (DECL_MODE (DECL_RESULT (FNDECL)) == BLKmode \
1.1 root 430: ? STRUCT_VALUE_OFFSET : STRUCT_VALUE_OFFSET + 4)
431:
432: /* Offset from top-of-stack address to location to store the
433: function parameter if it can't go in a register.
434: Addresses for following parameters are computed relative to this one. */
435: #define FIRST_PARM_CALLER_OFFSET(FNDECL) \
436: (STRUCT_VALUE_OFFSET + 4 - STACK_POINTER_OFFSET)
437:
438: /* When a parameter is passed in a register, stack space is still
439: allocated for it. */
440: #define REG_PARM_STACK_SPACE
441:
442: /* Value is 1 if returning from a function call automatically
443: pops the arguments described by the number-of-args field in the call.
444: FUNTYPE is the data type of the function (as a tree),
445: or for a library call it is an identifier node for the subroutine name. */
446:
447: #define RETURN_POPS_ARGS(FUNTYPE) 0
448:
449: /* Some subroutine macros specific to this machine. */
450: #define BASE_RETURN_VALUE_REG(MODE) \
451: ((MODE) == SFmode || (MODE) == DFmode ? 32 : 8)
452: #define BASE_OUTGOING_VALUE_REG(MODE) \
453: ((MODE) == SFmode || (MODE) == DFmode ? 32 : 24)
454: #define BASE_PASSING_ARG_REG(MODE) (8)
455: #define BASE_INCOMING_ARG_REG(MODE) (24)
456:
457: /* Define how to find the value returned by a function.
458: VALTYPE is the data type of the value (as a tree).
459: If the precise function being called is known, FUNC is its FUNCTION_DECL;
460: otherwise, FUNC is 0. */
461:
462: /* On SPARC the value is found in the first "output" register. */
463:
464: #define FUNCTION_VALUE(VALTYPE, FUNC) \
465: gen_rtx (REG, TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG (TYPE_MODE (VALTYPE)))
466:
467: /* But the called function leaves it in the first "input" register. */
468:
469: #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \
470: gen_rtx (REG, TYPE_MODE (VALTYPE), BASE_OUTGOING_VALUE_REG (TYPE_MODE (VALTYPE)))
471:
472: /* Define how to find the value returned by a library function
473: assuming the value has mode MODE. */
474:
475: #define LIBCALL_VALUE(MODE) \
476: gen_rtx (REG, MODE, BASE_RETURN_VALUE_REG (MODE))
477:
478: /* 1 if N is a possible register number for a function value
479: as seen by the caller.
480: On SPARC, the first "output" reg is used for integer values,
481: and the first floating point register is used for floating point values. */
482:
483: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 8 || (N) == 32)
484:
485: /* 1 if N is a possible register number for function argument passing.
486: On SPARC, these are the "output" registers. */
487:
488: #define FUNCTION_ARG_REGNO_P(N) ((N) < 14 && (N) > 7)
489:
490: /* Define a data type for recording info about an argument list
491: during the scan of that argument list. This data type should
492: hold all necessary information about the function itself
493: and about the args processed so far, enough to enable macros
494: such as FUNCTION_ARG to determine where the next arg should go.
495:
496: On SPARC, this is a single integer, which is a number of words
497: of arguments scanned so far (including the invisible argument,
498: if any, which holds the structure-value-address).
499: Thus 7 or more means all following args should go on the stack. */
500:
501: #define CUMULATIVE_ARGS int
502:
503: /* Define the number of register that can hold parameters.
504: This macro is used only in other macro definitions below. */
505: #define NPARM_REGS 6
506:
507: /* Initialize a variable CUM of type CUMULATIVE_ARGS
508: for a call to a function whose data type is FNTYPE.
509: For a library call, FNTYPE is 0.
510:
511: On SPARC, the offset always starts at 0: the first parm reg is always
512: the same reg. */
513:
514: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE) ((CUM) = 0)
515:
516: /* Update the data in CUM to advance over an argument
517: of mode MODE and data type TYPE.
518: (TYPE is null for libcalls where that information may not be available.) */
519:
520: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
521: ((CUM) += ((MODE) != BLKmode \
522: ? (GET_MODE_SIZE (MODE) + 3) / 4 \
523: : (int_size_in_bytes (TYPE) + 3) / 4))
524:
525: /* Determine where to put an argument to a function.
526: Value is zero to push the argument on the stack,
527: or a hard register in which to store the argument.
528:
529: MODE is the argument's machine mode.
530: TYPE is the data type of the argument (as a tree).
531: This is null for libcalls where that information may
532: not be available.
533: CUM is a variable of type CUMULATIVE_ARGS which gives info about
534: the preceding args and about the function being called.
535: NAMED is nonzero if this argument is a named parameter
536: (otherwise it is an extra parameter matching an ellipsis). */
537:
538: /* On SPARC the first six args are normally in registers
539: and the rest are pushed. Any arg that starts within the first 6 words
540: is at least partially passed in a register unless its data type forbids. */
541:
542: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1.1.1.3 root 543: ((CUM) < NPARM_REGS \
544: && ((TYPE)==0 || ! TREE_ADDRESSABLE ((tree)(TYPE))) \
545: && ((MODE) != BLKmode || (TYPE_ALIGN ((TYPE)) % 32 == 0)) \
1.1 root 546: ? gen_rtx (REG, (MODE), BASE_PASSING_ARG_REG (MODE) + (CUM)) : 0)
547:
548: /* Define where a function finds its arguments.
549: This is different from FUNCTION_ARG because of register windows. */
550:
551: #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
1.1.1.3 root 552: ((CUM) < NPARM_REGS \
553: && ((TYPE)==0 || ! TREE_ADDRESSABLE ((tree)(TYPE))) \
554: && ((MODE) != BLKmode || (TYPE_ALIGN ((TYPE)) % 32 == 0)) \
1.1 root 555: ? gen_rtx (REG, (MODE), BASE_INCOMING_ARG_REG (MODE) + (CUM)) : 0)
556:
557: /* For an arg passed partly in registers and partly in memory,
558: this is the number of registers used.
559: For args passed entirely in registers or entirely in memory, zero.
560: Any arg that starts in the first 6 regs but won't entirely fit in them
561: needs partial registers on the Sparc. */
562:
563: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1.1.1.3 root 564: (((CUM) < NPARM_REGS \
565: && ((TYPE)==0 || ! TREE_ADDRESSABLE ((tree)(TYPE))) \
566: && ((MODE) != BLKmode || (TYPE_ALIGN ((TYPE)) % 32 == 0)) \
1.1 root 567: && ((CUM) \
568: + ((MODE) == BLKmode \
569: ? (int_size_in_bytes (TYPE) + 3) / 4 \
570: : (GET_MODE_SIZE (MODE) + 3) / 4)) - NPARM_REGS > 0) \
571: ? (NPARM_REGS - (CUM)) \
572: : 0)
573:
574: /* Output the label for a function definition. */
575:
576: #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
577: { \
578: extern tree double_type_node, float_type_node; \
579: if (TREE_TYPE (DECL) == float_type_node) \
580: fprintf (FILE, "\t.proc 6\n"); \
581: else if (TREE_TYPE (DECL) == double_type_node) \
582: fprintf (FILE, "\t.proc 7\n"); \
583: else if (TREE_TYPE (DECL) == void_type_node) \
584: fprintf (FILE, "\t.proc 0\n"); \
585: else fprintf (FILE, "\t.proc 1\n"); \
586: ASM_OUTPUT_LABEL (FILE, NAME); \
587: }
588:
589: /* This macro generates the assembly code for function entry.
590: FILE is a stdio stream to output the code to.
591: SIZE is an int: how many units of temporary storage to allocate.
592: Refer to the array `regs_ever_live' to determine which registers
593: to save; `regs_ever_live[I]' is nonzero if register number I
594: is ever used in the function. This macro is responsible for
595: knowing which registers should not be saved even if used. */
596:
597: /* On SPARC, move-double insns between fpu and cpu need an 8-byte block
598: of memory. If any fpu reg is used in the function, we allocate
599: such a block here, at the bottom of the frame, just in case it's needed.
600:
601: If this function is a leaf procedure, then we may choose not
602: to do a "save" insn. Currently we do this only if it touches
603: the "output" registers. The "local" and "input" registers
604: are off limits. It might be better to allow one such register
605: to go to the stack, but I doubt it. */
606:
607: #define FUNCTION_PROLOGUE(FILE, SIZE) \
608: { \
609: extern char call_used_regs[]; \
610: extern int current_function_pretend_args_size; \
611: extern int frame_pointer_needed; \
612: int fsize = (((SIZE) + 7 - STARTING_FRAME_OFFSET) & -8); \
613: int actual_fsize; \
614: int n_fregs = 0, i; \
615: int n_iregs = 64; \
616: for (i = 32; i < FIRST_PSEUDO_REGISTER; i++) \
617: if (regs_ever_live[i] && ! call_used_regs[i]) \
618: n_fregs++; \
619: for (i = 16; i < 32; i++) \
620: if (regs_ever_live[i]) { n_iregs = 96; break; } \
621: fprintf (FILE, "\t!#PROLOGUE# 0\n"); \
622: actual_fsize = fsize + n_iregs + (n_fregs*4+7 & -8); \
623: fsize += current_function_pretend_args_size+7 & -8; \
624: actual_fsize += current_function_pretend_args_size+7 & -8; \
625: if (actual_fsize < 4096) \
626: fprintf (FILE, "\tsave %%sp,-%d,%%sp\n", actual_fsize); \
627: else \
628: { \
629: fprintf (FILE, "\tsethi %%hi(0x%x),%%g1\n\tadd %%g1,%%lo(0x%x),%%g1\n", \
630: -actual_fsize, -actual_fsize); \
631: fprintf (FILE, "\tsave %%sp,%%g1,%%sp\n"); \
632: } \
633: fprintf (FILE, "\t!#PROLOGUE# 1\n"); \
634: if (n_fregs) \
635: { \
636: for (i = 32, n_fregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
637: if (regs_ever_live[i] && ! call_used_regs[i]) \
638: { \
639: if (regs_ever_live[i+1] && ! call_used_regs[i+1]) \
640: fprintf (FILE, "\tstd %s,[%%sp+0x%x]\n", \
641: reg_names[i], n_iregs + 4 * n_fregs), \
642: n_fregs += 2, i += 1; \
643: else \
644: fprintf (FILE, "\tstf %s,[%%sp+0x%x]\n", \
645: reg_names[i], n_iregs + 4 * n_fregs++); \
646: } \
647: } \
648: if (regs_ever_live[32]) \
649: fprintf (FILE, "\tst %s,[%%fp-16]\n\tst %s,[%%fp-12]\n", \
650: reg_names[0], reg_names[0]); \
651: }
652:
653: /* Output assembler code to FILE to increment profiler label # LABELNO
654: for profiling a function entry. */
655:
656: #define FUNCTION_PROFILER(FILE, LABELNO) \
657: fprintf (FILE, "\tsethi %%hi(LP%d),%%o0\n\tcall mcount\n\tor %%lo(LP%d),%%o0,%%o0\n", \
658: (LABELNO), (LABELNO))
659:
660: /* Output assembler code to FILE to initialize this source file's
661: basic block profiling info, if that has not already been done. */
662:
663: #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
1.1.1.4 root 664: fprintf (FILE, "\tsethi %%hi(LPBX0),%%o0\n\tld [%%lo(LPBX0)+%%o0],%%o1\n\ttst %%o1\n\tbne LPY%d\n\tadd %%o0,%%lo(LPBX0),%%o0\n\tcall ___bb_init_func\n\tnop\nLPY%d:\n", \
1.1 root 665: (LABELNO), (LABELNO))
666:
667: /* Output assembler code to FILE to increment the entry-count for
668: the BLOCKNO'th basic block in this source file. */
669:
670: #define BLOCK_PROFILER(FILE, BLOCKNO) \
671: { \
672: int blockn = (BLOCKNO); \
673: fprintf (FILE, "\tsethi %%hi(LPBX2+%d),%%g1\n\tld [%%lo(LPBX2+%d)+%%g1],%%g2\n\
674: \tadd %%g2,1,%%g2\n\tst %%g2,[%%lo(LPBX2+%d)+%%g1]\n", \
675: 4 * blockn, 4 * blockn, 4 * blockn); \
676: CC_STATUS_INIT; /* We have clobbered %g1. Also %g2. */ \
677: }
678:
679: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
680: the stack pointer does not matter. The value is tested only in
681: functions that have frame pointers.
682: No definition is equivalent to always zero. */
683:
684: extern int may_call_alloca;
685: extern int current_function_pretend_args_size;
686:
687: #define EXIT_IGNORE_STACK \
688: (get_frame_size () != 0 \
689: || may_call_alloca || current_function_pretend_args_size)
690:
691: /* This macro generates the assembly code for function exit,
692: on machines that need it. If FUNCTION_EPILOGUE is not defined
693: then individual return instructions are generated for each
694: return statement. Args are same as for FUNCTION_PROLOGUE.
695:
696: The function epilogue should not depend on the current stack pointer!
697: It should use the frame pointer only. This is mandatory because
698: of alloca; we also take advantage of it to omit stack adjustments
699: before returning. */
700:
701: /* This declaration is needed due to traditional/ANSI
702: incompatibilities which cannot be #ifdefed away
703: because they occur inside of macros. Sigh. */
704: extern union tree_node *current_function_decl;
705:
706: #define FUNCTION_EPILOGUE(FILE, SIZE) \
707: { \
708: extern char call_used_regs[]; \
709: extern int may_call_alloca; \
710: extern int current_function_pretend_args_size; \
711: extern int max_pending_stack_adjust; \
712: extern int frame_pointer_needed; \
713: int fsize = (((SIZE) + 7 - STARTING_FRAME_OFFSET) & -8); \
714: int actual_fsize; \
715: int n_fregs = 0, i; \
716: int n_iregs = 64; \
717: for (i = 32, n_fregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
718: if (regs_ever_live[i] && ! call_used_regs[i]) \
719: n_fregs++; \
720: for (i = 16; i < 32; i++) \
721: if (regs_ever_live[i]) { n_iregs = 96; break; } \
722: actual_fsize = fsize + n_iregs + (n_fregs*4+7 & -8); \
723: actual_fsize += current_function_pretend_args_size+7 & -8; \
724: fsize += current_function_pretend_args_size+7 & -8; \
725: if (n_fregs) \
726: { \
727: char *base; \
728: int offset; \
729: if (fsize < 4096) \
730: { base = "%fp"; offset = n_iregs - actual_fsize; } \
731: else \
732: { base = "%g1"; offset = n_iregs; \
733: if (fsize < 4096) \
734: fprintf (FILE, "sethi %%hi(0x%x),%%g1\n\tadd %%g1,%%lo(0x%x),%%g1\n\tadd %%fp,%%g1,%%g1\n", -actual_fsize, -actual_fsize);\
735: } \
736: for (i = 32, n_fregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
737: if (regs_ever_live[i] && ! call_used_regs[i]) \
738: { \
739: if (regs_ever_live[i+1] && ! call_used_regs[i+1]) \
740: fprintf (FILE, "\tldd [%s%+d],%s\n", \
741: base, offset + 4 * n_fregs, \
742: reg_names[i]), \
743: n_fregs += 2, i += 1; \
744: else \
745: fprintf (FILE, "\tldf [%s%+d],%s\n", \
746: base, offset + 4 * n_fregs++, \
747: reg_names[i]); \
748: } \
749: } \
750: fprintf (FILE, "\tret\n\trestore\n"); \
751: }
752:
753: /* If the memory address ADDR is relative to the frame pointer,
754: correct it to be relative to the stack pointer instead.
755: This is for when we don't use a frame pointer.
756: ADDR should be a variable name. */
757:
758: #define FIX_FRAME_POINTER_ADDRESS(ADDR,DEPTH) \
759: { int offset = -1; \
760: rtx regs = stack_pointer_rtx; \
761: if (ADDR == frame_pointer_rtx) \
762: offset = 0; \
763: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx \
764: && GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \
765: offset = INTVAL (XEXP (ADDR, 1)); \
766: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx) \
767: { rtx other_reg = XEXP (ADDR, 1); \
768: offset = 0; \
769: regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
770: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 1) == frame_pointer_rtx) \
771: { rtx other_reg = XEXP (ADDR, 0); \
772: offset = 0; \
773: regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
774: if (offset >= 0) \
775: { int regno; \
776: extern char call_used_regs[]; \
777: for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
778: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
779: offset += 4; \
780: offset -= 4; \
781: ADDR = plus_constant (regs, offset + (DEPTH)); } }
782:
783: /* Addressing modes, and classification of registers for them. */
784:
785: /* #define HAVE_POST_INCREMENT */
786: /* #define HAVE_POST_DECREMENT */
787:
788: /* #define HAVE_PRE_DECREMENT */
789: /* #define HAVE_PRE_INCREMENT */
790:
791: /* Macros to check register numbers against specific register classes. */
792:
793: /* These assume that REGNO is a hard or pseudo reg number.
794: They give nonzero only if REGNO is a hard reg of the suitable class
795: or a pseudo reg currently allocated to a suitable hard reg.
796: Since they use reg_renumber, they are safe only once reg_renumber
797: has been allocated, which happens in local-alloc.c. */
798:
799: #define REGNO_OK_FOR_INDEX_P(REGNO) \
800: ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
801: #define REGNO_OK_FOR_BASE_P(REGNO) \
802: ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
803: #define REGNO_OK_FOR_FP_P(REGNO) \
804: (((REGNO) ^ 0x20) < 32 || (unsigned) (reg_renumber[REGNO] ^ 0x20) < 32)
805:
806: /* Now macros that check whether X is a register and also,
807: strictly, whether it is in a specified class.
808:
809: These macros are specific to the SPARC, and may be used only
810: in code for printing assembler insns and in conditions for
811: define_optimization. */
812:
813: /* 1 if X is an fp register. */
814:
815: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
816:
817: /* Maximum number of registers that can appear in a valid memory address. */
818:
819: #define MAX_REGS_PER_ADDRESS 2
820:
821: /* Recognize any constant value that is a valid address. */
822:
823: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
824:
825: /* Nonzero if the constant value X is a legitimate general operand.
826: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
827:
828: Anything but a CONST_DOUBLE can be made to work. */
829:
830: #define LEGITIMATE_CONSTANT_P(X) \
831: (GET_CODE (X) != CONST_DOUBLE)
832:
833: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
834: and check its validity for a certain class.
835: We have two alternate definitions for each of them.
836: The usual definition accepts all pseudo regs; the other rejects
837: them unless they have been allocated suitable hard regs.
838: The symbol REG_OK_STRICT causes the latter definition to be used.
839:
840: Most source files want to accept pseudo regs in the hope that
841: they will get allocated to the class that the insn wants them to be in.
842: Source files for reload pass need to be strict.
843: After reload, it makes no difference, since pseudo regs have
844: been eliminated by then. */
845:
846: #ifndef REG_OK_STRICT
847:
848: /* Nonzero if X is a hard reg that can be used as an index
849: or if it is a pseudo reg. */
850: #define REG_OK_FOR_INDEX_P(X) (((unsigned) REGNO (X)) - 32 >= 32)
851: /* Nonzero if X is a hard reg that can be used as a base reg
852: or if it is a pseudo reg. */
853: #define REG_OK_FOR_BASE_P(X) (((unsigned) REGNO (X)) - 32 >= 32)
854:
855: #else
856:
857: /* Nonzero if X is a hard reg that can be used as an index. */
858: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
859: /* Nonzero if X is a hard reg that can be used as a base reg. */
860: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
861:
862: #endif
863:
864: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
865: that is a valid memory address for an instruction.
866: The MODE argument is the machine mode for the MEM expression
867: that wants to use this address.
868:
869: On SPARC, the actual legitimate addresses must be REG+REG or REG+SMALLINT.
870: But we can treat a SYMBOL_REF as legitimate if it is part of this
871: function's constant-pool, because such addresses can actually
872: be output as REG+SMALLINT.
873:
874: Try making SYMBOL_REF (and other things which are CONSTANT_ADDRESS_P)
875: a legitimate address, regardless. Because the only insns which can use
876: memory are load or store insns, the added hair in the machine description
877: is not that bad. It should also speed up the compiler by halving the number
878: of insns it must manage for each (MEM (SYMBOL_REF ...)) involved. */
879:
880: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
881: { if (GET_CODE (X) == REG) \
882: { if (REG_OK_FOR_BASE_P (X)) goto ADDR; } \
883: else if (GET_CODE (X) == PLUS) \
884: { \
885: if (GET_CODE (XEXP (X, 0)) == REG \
886: && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
887: { \
888: if (GET_CODE (XEXP (X, 1)) == REG \
889: && REG_OK_FOR_INDEX_P (XEXP (X, 1))) \
890: goto ADDR; \
891: if (GET_CODE (XEXP (X, 1)) == CONST_INT \
892: && INTVAL (XEXP (X, 1)) >= -0x1000 \
893: && INTVAL (XEXP (X, 1)) < 0x1000) \
894: goto ADDR; \
895: } \
896: else if (GET_CODE (XEXP (X, 1)) == REG \
897: && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
898: { \
899: if (GET_CODE (XEXP (X, 0)) == REG \
900: && REG_OK_FOR_INDEX_P (XEXP (X, 0))) \
901: goto ADDR; \
902: if (GET_CODE (XEXP (X, 0)) == CONST_INT \
903: && INTVAL (XEXP (X, 0)) >= -0x1000 \
904: && INTVAL (XEXP (X, 0)) < 0x1000) \
905: goto ADDR; \
906: } \
907: } \
908: else if (CONSTANT_ADDRESS_P (X)) \
909: goto ADDR; \
910: }
911:
912: /* Try machine-dependent ways of modifying an illegitimate address
913: to be legitimate. If we find one, return the new, valid address.
914: This macro is used in only one place: `memory_address' in explow.c.
915:
916: OLDX is the address as it was before break_out_memory_refs was called.
917: In some cases it is useful to look at this to decide what needs to be done.
918:
919: MODE and WIN are passed so that this macro can use
920: GO_IF_LEGITIMATE_ADDRESS.
921:
922: It is always safe for this macro to do nothing. It exists to recognize
923: opportunities to optimize the output. */
924:
925: /* On SPARC, change REG+N into REG+REG, and REG+(X*Y) into REG+REG. */
926:
927: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
928: { if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
929: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
930: copy_to_mode_reg (SImode, XEXP (X, 1))); \
931: if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
932: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
933: copy_to_mode_reg (SImode, XEXP (X, 0))); \
934: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
935: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
936: force_operand (XEXP (X, 0), 0)); \
937: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
938: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
939: force_operand (XEXP (X, 1), 0)); \
940: if (GET_CODE (x) == SYMBOL_REF) \
941: (X) = copy_to_reg (X); \
942: if (memory_address_p (MODE, X)) \
943: goto WIN; }
944:
945: /* Go to LABEL if ADDR (a legitimate address expression)
946: has an effect that depends on the machine mode it is used for.
947: On the SPARC this is never true. */
948:
949: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
950:
951: /* Specify the machine mode that this machine uses
952: for the index in the tablejump instruction. */
953: #define CASE_VECTOR_MODE SImode
954:
955: /* Define this if the tablejump instruction expects the table
956: to contain offsets from the address of the table.
957: Do not define this if the table should contain absolute addresses. */
958: /* #define CASE_VECTOR_PC_RELATIVE */
959:
960: /* Specify the tree operation to be used to convert reals to integers. */
961: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
962:
963: /* This is the kind of divide that is easiest to do in the general case. */
964: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
965:
966: /* Define this as 1 if `char' should by default be signed; else as 0. */
967: #define DEFAULT_SIGNED_CHAR 1
968:
969: /* Max number of bytes we can move from memory to memory
970: in one reasonably fast instruction. */
971: #define MOVE_MAX 4
972:
973: /* Nonzero if access to memory by bytes is slow and undesirable. */
974: #define SLOW_BYTE_ACCESS 0
975:
976: /* We assume that the store-condition-codes instructions store 0 for false
977: and some other value for true. This is the value stored for true. */
978:
979: #define STORE_FLAG_VALUE 1
980:
981: /* When a prototype says `char' or `short', really pass an `int'. */
982: #define PROMOTE_PROTOTYPES
983:
984: /* Define if shifts truncate the shift count
985: which implies one can omit a sign-extension or zero-extension
986: of a shift count. */
987: #define SHIFT_COUNT_TRUNCATED
988:
989: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
990: is done just by pretending it is already truncated. */
991: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
992:
993: /* Specify the machine mode that pointers have.
994: After generation of rtl, the compiler makes no further distinction
995: between pointers and any other objects of this machine mode. */
996: #define Pmode SImode
997:
998: /* A function address in a call instruction
999: is a byte address (for indexing purposes)
1000: so give the MEM rtx a byte's mode. */
1001: #define FUNCTION_MODE SImode
1002:
1003: /* Define this if addresses of constant functions
1004: shouldn't be put through pseudo regs where they can be cse'd.
1005: Desirable on machines where ordinary constants are expensive
1006: but a CALL with constant address is cheap. */
1007: #define NO_FUNCTION_CSE
1008:
1009: /* Define subroutines to call to handle multiply and divide.
1010: Use the subroutines that Sun's library provides.
1011: The `*' prevents an underscore from being prepended by the compiler. */
1012:
1013: #define DIVSI3_LIBCALL "*.div"
1014: #define UDIVSI3_LIBCALL "*.udiv"
1015: #define MODSI3_LIBCALL "*.rem"
1016: #define UMODSI3_LIBCALL "*.urem"
1017: #define MULSI3_LIBCALL "*.mul"
1018: #define UMULSI3_LIBCALL "*.umul"
1019:
1020: /* Compute the cost of computing a constant rtl expression RTX
1021: whose rtx-code is CODE. The body of this macro is a portion
1022: of a switch statement. If the code is computed here,
1023: return it with a return statement. Otherwise, break from the switch. */
1024:
1025: #define CONST_COSTS(RTX,CODE) \
1026: case CONST_INT: \
1027: if (INTVAL (RTX) < 0x1000 && INTVAL (RTX) >= -0x1000) return 0; \
1028: case CONST: \
1029: case LABEL_REF: \
1030: case SYMBOL_REF: \
1031: return 2; \
1032: case CONST_DOUBLE: \
1033: return 4;
1034:
1035: /* Tell final.c how to eliminate redundant test instructions. */
1036:
1037: /* Here we define machine-dependent flags and fields in cc_status
1038: (see `conditions.h'). */
1039:
1040: /* This holds the value sourcing %hi(%g1). We keep this info
1041: around so that mem/mem ops, such as increment and decrement,
1042: etc, can be performed reasonably. */
1043: #define CC_STATUS_MDEP rtx
1044:
1045: /* Nonzero if the results of the previous comparison are
1046: in the floating point condition code register. */
1047:
1048: #define CC_IN_FCCR 04000
1049:
1050: /* Nonzero if the results of the previous comparison are
1051: int the coprocessor's condition code register. */
1052:
1053: #define CC_IN_CCCR 010000
1054:
1055: /* Nonzero if we know (easily) that floating point register f0
1056: (f1) contains the value 0. */
1057: #define CC_F0_IS_0 020000
1058: #define CC_F1_IS_0 040000
1059:
1060: /* Nonzero if we know the value of %hi(%g1). */
1061: #define CC_KNOW_HI_G1 0100000
1062:
1063: #define CC_STATUS_MDEP_INIT (cc_status.mdep = 0)
1064:
1065: /* Store in cc_status the expressions
1066: that the condition codes will describe
1067: after execution of an instruction whose pattern is EXP.
1068: Do not alter them if the instruction would not alter the cc's. */
1069:
1070: #define NOTICE_UPDATE_CC(EXP, INSN) \
1071: { if (GET_CODE (EXP) == SET) \
1072: { if (SET_DEST (EXP) == cc0_rtx) \
1073: { cc_status.flags = 0; \
1074: cc_status.value1 = SET_DEST (EXP); \
1075: cc_status.value2 = SET_SRC (EXP); } \
1076: else if (GET_CODE (SET_SRC (EXP)) == CALL) \
1077: { CC_STATUS_INIT; } \
1078: else if (GET_CODE (SET_DEST (EXP)) == REG) \
1079: { if (cc_status.value1 \
1080: && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value1)) \
1081: cc_status.value1 = 0; \
1082: if (cc_status.value2 \
1083: && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value2)) \
1084: cc_status.value2 = 0; \
1085: } \
1086: else if (GET_CODE (SET_DEST (EXP)) == MEM) \
1087: { rtx x = cc_status.mdep; int know = cc_status.flags & CC_KNOW_HI_G1; \
1088: CC_STATUS_INIT; \
1089: if (x && know) \
1090: { cc_status.mdep = x; cc_status.flags |= CC_KNOW_HI_G1; } \
1091: } \
1092: } \
1093: else if (GET_CODE (EXP) == PARALLEL \
1094: && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \
1095: { if (SET_DEST (XVECEXP (EXP, 0, 0)) == cc0_rtx) \
1096: { cc_status.flags = 0; \
1097: cc_status.value1 = SET_DEST (XVECEXP (EXP, 0, 0)); \
1098: cc_status.value2 = SET_SRC (XVECEXP (EXP, 0, 0)); \
1099: } \
1100: else if (GET_CODE (SET_SRC (XVECEXP (EXP, 0, 0))) == CALL) \
1101: { /* all bets are off */ CC_STATUS_INIT; } \
1102: else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == REG) \
1103: { if (cc_status.value1 \
1104: && reg_overlap_mentioned_p (SET_DEST (XVECEXP (EXP, 0, 0)), cc_status.value1)) \
1105: cc_status.value1 = 0; \
1106: if (cc_status.value2 \
1107: && reg_overlap_mentioned_p (SET_DEST (XVECEXP (EXP, 0, 0)), cc_status.value2)) \
1108: cc_status.value2 = 0; \
1109: } \
1110: else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == MEM) \
1111: { rtx x = cc_status.mdep; int know = cc_status.flags & CC_KNOW_HI_G1; \
1112: CC_STATUS_INIT; \
1113: if (x && know) \
1114: { cc_status.mdep = x; cc_status.flags |= CC_KNOW_HI_G1; } \
1115: } \
1116: } \
1117: else if (GET_CODE (EXP) == PARALLEL) \
1118: /* insn-peep has changed this insn beyond recognition
1119: by NOTICE_UPDATE_CC. However, we know it is either
1120: a call or a branch with a delay slot filled, so we can
1121: give up on knowing condition codes in any case. */ \
1122: { CC_STATUS_INIT; } \
1123: else if (GET_CODE (EXP) == CALL) \
1124: { /* all bets are off */ CC_STATUS_INIT; } \
1125: }
1.1.1.3 root 1126:
1127: #define OUTPUT_JUMP(NORMAL, NO_OV, FLOAT) \
1128: { if (cc_prev_status.flags & CC_IN_FCCR) \
1129: return FLOAT; \
1130: if (cc_prev_status.flags & CC_NO_OVERFLOW) \
1131: return NO_OV; \
1132: return NORMAL; }
1.1 root 1133:
1134: /* Control the assembler format that we output. */
1135:
1136: /* Output at beginning of assembler file. */
1137:
1138: #define ASM_FILE_START(file)
1139:
1140: /* Output to assembler file text saying following lines
1141: may contain character constants, extra white space, comments, etc. */
1142:
1143: #define ASM_APP_ON ""
1144:
1145: /* Output to assembler file text saying following lines
1146: no longer contain unusual constructs. */
1147:
1148: #define ASM_APP_OFF ""
1149:
1150: /* Output before read-only data. */
1151:
1152: #define TEXT_SECTION_ASM_OP ".text"
1153:
1154: /* Output before writable data. */
1155:
1156: #define DATA_SECTION_ASM_OP ".data"
1157:
1158: /* How to refer to registers in assembler output.
1159: This sequence is indexed by compiler's hard-register-number (see above). */
1160:
1161: #define REGISTER_NAMES \
1162: {"%g0", "%g1", "%g2", "%g3", "%g4", "%g5", "%g6", "%g7", \
1163: "%o0", "%o1", "%o2", "%o3", "%o4", "%o5", "%sp", "%o7", \
1164: "%l0", "%l1", "%l2", "%l3", "%l4", "%l5", "%l6", "%l7", \
1165: "%i0", "%i1", "%i2", "%i3", "%i4", "%i5", "%fp", "%i7", \
1166: "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7", \
1167: "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15", \
1168: "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23", \
1169: "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31"} \
1170:
1171: /* How to renumber registers for dbx and gdb. */
1172:
1173: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1174:
1175: /* On Sun 4, this limit is 2048. We use 1500 to be safe,
1176: since the length can run past this up to a continuation point. */
1177: #define DBX_CONTIN_LENGTH 1500
1178:
1179: /* This is how to output a note to DBX telling it the line number
1180: to which the following sequence of instructions corresponds.
1181:
1182: This is needed for SunOS 4.0, and should not hurt for 3.2
1183: versions either. */
1184: #define ASM_OUTPUT_SOURCE_LINE(file, line) \
1185: { static int sym_lineno = 1; \
1186: fprintf (file, ".stabn 68,0,%d,LM%d\nLM%d:\n", \
1187: line, sym_lineno, sym_lineno); \
1188: sym_lineno += 1; }
1189:
1190: /* This is how to output the definition of a user-level label named NAME,
1191: such as the label on a static function or variable NAME. */
1192:
1193: #define ASM_OUTPUT_LABEL(FILE,NAME) \
1194: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1195:
1196: /* This is how to output a command to make the user-level label named NAME
1197: defined for reference from other files. */
1198:
1199: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1200: do { fputs (".global ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1201:
1202: /* This is how to output a reference to a user-level label named NAME.
1203: `assemble_name' uses this. */
1204:
1205: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1206: fprintf (FILE, "_%s", NAME)
1207:
1208: /* This is how to output an internal numbered label where
1209: PREFIX is the class of label and NUM is the number within the class. */
1210:
1211: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1212: fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1213:
1214: /* This is how to store into the string LABEL
1215: the symbol_ref name of an internal numbered label where
1216: PREFIX is the class of label and NUM is the number within the class.
1217: This is suitable for output with `assemble_name'. */
1218:
1219: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1220: sprintf (LABEL, "*%s%d", PREFIX, NUM)
1221:
1222: /* This is how to output an assembler line defining a `double' constant. */
1223:
1224: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1225: (isinf ((VALUE)) \
1226: ? fprintf (FILE, "\t.double 0r%s99e999\n", ((VALUE) > 0 ? "" : "-")) \
1227: : fprintf (FILE, "\t.double 0r%.20e\n", (VALUE)))
1228:
1229: /* This is how to output an assembler line defining a `float' constant. */
1230:
1231: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1232: (isinf ((VALUE)) \
1233: ? fprintf (FILE, "\t.single 0r%s99e999\n", ((VALUE) > 0 ? "" : "-")) \
1234: : fprintf (FILE, "\t.single 0r%.20e\n", (VALUE)))
1235:
1236: /* This is how to output an assembler line defining an `int' constant. */
1237:
1238: #define ASM_OUTPUT_INT(FILE,VALUE) \
1239: ( fprintf (FILE, "\t.word "), \
1240: output_addr_const (FILE, (VALUE)), \
1241: fprintf (FILE, "\n"))
1242:
1243: /* Likewise for `char' and `short' constants. */
1244:
1245: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1246: ( fprintf (FILE, "\t.half "), \
1247: output_addr_const (FILE, (VALUE)), \
1248: fprintf (FILE, "\n"))
1249:
1250: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1251: ( fprintf (FILE, "\t.byte "), \
1252: output_addr_const (FILE, (VALUE)), \
1253: fprintf (FILE, "\n"))
1254:
1255: /* This is how to output an assembler line for a numeric constant byte. */
1256:
1257: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1258: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1259:
1260: /* This is how to output an element of a case-vector that is absolute. */
1261:
1262: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1263: fprintf (FILE, "\t.word L%d\n", VALUE)
1264:
1265: /* This is how to output an element of a case-vector that is relative.
1266: (SPARC does not use such vectors,
1267: but we must define this macro anyway.) */
1268:
1269: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1270: fprintf (FILE, "\t.word L%d-L%d\n", VALUE, REL)
1271:
1272: /* This is how to output an assembler line
1273: that says to advance the location counter
1274: to a multiple of 2**LOG bytes. */
1275:
1276: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1277: if ((LOG) != 0) \
1278: fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1279:
1280: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1.1.1.3 root 1281: fprintf (FILE, "\t.skip %u\n", (SIZE))
1.1 root 1282:
1283: /* This says how to output an assembler line
1284: to define a global common symbol. */
1285:
1286: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1287: ( fputs (".global ", (FILE)), \
1288: assemble_name ((FILE), (NAME)), \
1289: fputs ("\n.common ", (FILE)), \
1290: assemble_name ((FILE), (NAME)), \
1.1.1.3 root 1291: fprintf ((FILE), ",%u,\"bss\"\n", (ROUNDED)))
1.1 root 1292:
1293: /* This says how to output an assembler line
1294: to define a local common symbol. */
1295:
1296: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1297: ( fputs ("\n.reserve ", (FILE)), \
1298: assemble_name ((FILE), (NAME)), \
1.1.1.3 root 1299: fprintf ((FILE), ",%u,\"bss\"\n", (ROUNDED)))
1.1 root 1300:
1301: /* Store in OUTPUT a string (made with alloca) containing
1302: an assembler-name for a local static variable named NAME.
1303: LABELNO is an integer which is different for each call. */
1304:
1305: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1306: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1307: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1308:
1309: /* Define the parentheses used to group arithmetic operations
1310: in assembler code. */
1311:
1312: #define ASM_OPEN_PAREN "("
1313: #define ASM_CLOSE_PAREN ")"
1314:
1315: /* Define results of standard character escape sequences. */
1316: #define TARGET_BELL 007
1317: #define TARGET_BS 010
1318: #define TARGET_TAB 011
1319: #define TARGET_NEWLINE 012
1320: #define TARGET_VT 013
1321: #define TARGET_FF 014
1322: #define TARGET_CR 015
1323:
1324: /* Print operand X (an rtx) in assembler syntax to file FILE.
1325: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1326: For `%' followed by punctuation, CODE is the punctuation and X is null.
1327:
1328: On SPARC, the CODE can be `r', meaning this is a register-only operand
1329: and an immediate zero should be represented as `r0'.
1330: It can also be `m', meaning that X is a memory reference but print
1.1.1.3 root 1331: its address as a non-memory operand.
1332:
1333: Codes C, N, F, I, and U are used for printing the opcodes of conditional
1334: branches. C prints the opcode for a given condition; N the negated opcode.
1335: F prints the negated floating point opcode (different because of nans).
1336: I prints the opcode that ignores the overflow bit, and U its negation. */
1.1 root 1337:
1338: #define PRINT_OPERAND(FILE, X, CODE) \
1339: { if (GET_CODE (X) == REG) \
1340: fprintf (FILE, "%s", reg_names[REGNO (X)]); \
1341: else if ((CODE) == 'm') \
1342: output_address (XEXP (X, 0)); \
1343: else if (GET_CODE (X) == MEM) \
1344: { \
1345: fputc ('[', FILE); \
1346: output_address (XEXP (X, 0)); \
1347: fputc (']', FILE); \
1348: } \
1349: else if (GET_CODE (X) == CONST_DOUBLE) \
1350: abort (); \
1351: else if ((CODE) == 'r' && (X) == const0_rtx) \
1352: fprintf (FILE, "%%g0"); \
1353: else if ((CODE) == 'C') switch (GET_CODE (X)) \
1354: { \
1355: case EQ: fputs ("e", FILE); break; \
1356: case NE: fputs ("ne", FILE); break; \
1357: case GT: fputs ("g", FILE); break; \
1358: case GE: fputs ("ge", FILE); break; \
1359: case LT: fputs ("l", FILE); break; \
1360: case LE: fputs ("le", FILE); break; \
1361: case GTU: fputs ("gu", FILE); break; \
1362: case GEU: fputs ("geu", FILE); break; \
1363: case LTU: fputs ("lu", FILE); break; \
1364: case LEU: fputs ("leu", FILE); break; \
1365: } \
1.1.1.3 root 1366: else if ((CODE) == 'I') switch (GET_CODE (X)) \
1367: { \
1368: case EQ: fputs ("e", FILE); break; \
1369: case NE: fputs ("ne", FILE); break; \
1370: case GE: fputs ("pos", FILE); break; \
1371: case LT: fputs ("neg", FILE); break; \
1372: default: \
1373: abort (); \
1374: } \
1375: else if ((CODE) == 'U') switch (GET_CODE (X)) \
1376: { \
1377: case EQ: fputs ("ne", FILE); break; \
1378: case NE: fputs ("e", FILE); break; \
1379: case GE: fputs ("neg", FILE); break; \
1380: case LT: fputs ("pos", FILE); break; \
1381: default: \
1382: abort (); \
1383: } \
1.1 root 1384: else if ((CODE) == 'N') switch (GET_CODE (X)) \
1385: { \
1386: case EQ: fputs ("ne", FILE); break; \
1387: case NE: fputs ("e", FILE); break; \
1388: case GT: fputs ("le", FILE); break; \
1389: case GE: fputs ("l", FILE); break; \
1390: case LT: fputs ("ge", FILE); break; \
1391: case LE: fputs ("g", FILE); break; \
1392: case GTU: fputs ("leu", FILE); break; \
1393: case GEU: fputs ("lu", FILE); break; \
1394: case LTU: fputs ("geu", FILE); break; \
1395: case LEU: fputs ("gu", FILE); break; \
1396: } \
1397: else if ((CODE) == 'F') switch (GET_CODE (X)) \
1398: { \
1399: case EQ: fputs ("ne", FILE); break; \
1400: case NE: fputs ("e", FILE); break; \
1401: case GT: fputs ("ule", FILE); break; \
1402: case GE: fputs ("ul", FILE); break; \
1403: case LT: fputs ("uge", FILE); break; \
1404: case LE: fputs ("ug", FILE); break; \
1405: default: abort (); \
1406: } \
1407: else { output_addr_const (FILE, X); }}
1408:
1409: /* Print a memory address as an operand to reference that memory location. */
1410:
1411: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1412: { register rtx base, index = 0; \
1413: int offset = 0; \
1414: register rtx addr = ADDR; \
1415: if (GET_CODE (addr) == REG) \
1416: { \
1417: fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1418: } \
1419: else if (GET_CODE (addr) == PLUS) \
1420: { \
1421: if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1422: offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1);\
1423: else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1424: offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0);\
1425: else \
1426: base = XEXP (addr, 0), index = XEXP (addr, 1); \
1427: fprintf (FILE, "%s", reg_names[REGNO (base)]); \
1428: if (index == 0) \
1429: fprintf (FILE, "%+d", offset); \
1430: else \
1431: fprintf (FILE, "+%s", reg_names[REGNO (index)]); \
1432: } \
1433: else \
1434: { \
1435: output_addr_const (FILE, addr); \
1436: } \
1437: }
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