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1.1 root 1: /* Definitions of target machine for GNU compiler, for SPUR chip.
2: Copyright (C) 1988 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
6: GNU CC is free software; you can redistribute it and/or modify
7: it under the terms of the GNU General Public License as published by
8: the Free Software Foundation; either version 1, or (at your option)
9: any later version.
10:
11: GNU CC is distributed in the hope that it will be useful,
12: but WITHOUT ANY WARRANTY; without even the implied warranty of
13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14: GNU General Public License for more details.
15:
16: You should have received a copy of the GNU General Public License
17: along with GNU CC; see the file COPYING. If not, write to
18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19:
20:
21: /* Note that some other tm- files include this one and then override
22: many of the definitions that relate to assembler syntax. */
23:
24:
25: /* Names to predefine in the preprocessor for this target machine. */
26:
27: #define CPP_PREDEFINES "-Dspur"
28:
29: /* Print subsidiary information on the compiler version in use. */
30: #define TARGET_VERSION fprintf (stderr, " (spur)");
31:
32: /* Run-time compilation parameters selecting different hardware subsets.
33:
34: On the SPUR, we don't yet need any. */
35:
36: extern int target_flags;
37:
38: /* Nonzero if we should generate code to use the fpu. */
39: #define TARGET_FPU (target_flags & 1)
40:
41: /* Nonzero if we should expand constant shifts into series of shift
42: instructions. */
43: #define TARGET_EXPAND_SHIFTS (target_flags & 2)
44:
45: /* Nonzero if we should generate long jumps for compares. */
46: #define TARGET_LONG_JUMPS (target_flags & 4)
47:
48: /* Macro to define tables used to set the flags.
49: This is a list in braces of pairs in braces,
50: each pair being { "NAME", VALUE }
51: where VALUE is the bits to set or minus the bits to clear.
52: An empty string NAME is used to identify the default VALUE. */
53:
54: #define TARGET_SWITCHES \
55: { {"fpu", 1}, \
56: {"soft-float", -1}, \
57: {"expand-shifts", 2}, \
58: {"lib-shifts", -2}, \
59: {"long-jumps", 4}, \
60: {"short-jumps", -4}, \
61: { "", TARGET_DEFAULT}}
62:
63: #define TARGET_DEFAULT 0
64:
65: /* target machine storage layout */
66:
67: /* Define this if most significant bit is lowest numbered
68: in instructions that operate on numbered bit-fields.
69: This is a moot question on the SPUR due to the lack of bit-field insns. */
70: /* #define BITS_BIG_ENDIAN */
71:
72: /* Define this if most significant byte of a word is the lowest numbered. */
73: /* That is not true on SPUR. */
74: /* #define BYTES_BIG_ENDIAN */
75:
76: /* Define this if most significant word of a multiword number is numbered. */
77: /* For SPUR we can decide arbitrarily
78: since there are no machine instructions for them. */
79: /* #define WORDS_BIG_ENDIAN */
80:
81: /* number of bits in an addressible storage unit */
82: #define BITS_PER_UNIT 8
83:
84: /* Width in bits of a "word", which is the contents of a machine register.
85: Note that this is not necessarily the width of data type `int';
86: if using 16-bit ints on a 68000, this would still be 32.
87: But on a machine with 16-bit registers, this would be 16. */
88: #define BITS_PER_WORD 32
89:
90: /* Width of a word, in units (bytes). */
91: #define UNITS_PER_WORD 4
92:
93: /* Width in bits of a pointer.
94: See also the macro `Pmode' defined below. */
95: #define POINTER_SIZE 32
96:
97: /* Allocation boundary (in *bits*) for storing pointers in memory. */
98: #define POINTER_BOUNDARY 32
99:
100: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
101: #define PARM_BOUNDARY 64
102:
103: /* Boundary (in *bits*) on which stack pointer should be aligned. */
104: #define STACK_BOUNDARY 64
105:
106: /* Allocation boundary (in *bits*) for the code of a function. */
107: #define FUNCTION_BOUNDARY 32
108:
109: /* Alignment of field after `int : 0' in a structure. */
110: #define EMPTY_FIELD_BOUNDARY 32
111:
112: /* Every structure's size must be a multiple of this. */
113: #define STRUCTURE_SIZE_BOUNDARY 32
114:
115: /* No data type wants to be aligned rounder than this. */
116: #define BIGGEST_ALIGNMENT 64
117:
118: /* Define this if move instructions will actually fail to work
119: when given unaligned data. */
120: #define STRICT_ALIGNMENT
121:
122: /* Standard register usage. */
123:
124: /* Number of actual hardware registers.
125: The hardware registers are assigned numbers for the compiler
126: from 0 to just below FIRST_PSEUDO_REGISTER.
127: All registers that the compiler knows about must be given numbers,
128: even those that are not normally considered general registers.
129:
130: SPUR has 32 fullword registers and 15 floating point registers. */
131:
132: #define FIRST_PSEUDO_REGISTER 47
133:
134: /* 1 for registers that have pervasive standard uses
135: and are not available for the register allocator.
136: On SPUR, this includes all the global registers
137: and the callee return address register. */
138: #define FIXED_REGISTERS \
139: {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
140: 1, 0, 0, 0, 0, 0, \
141: 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \
142: 1, 0, 0, 0, 0, 0, \
143: 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
144:
145: /* 1 for registers not available across function calls.
146: These must include the FIXED_REGISTERS and also any
147: registers that can be used without being saved.
148: The latter must include the registers where values are returned
149: and the register where structure-value addresses are passed.
150: Aside from that, you can include as many other registers as you like. */
151: #define CALL_USED_REGISTERS \
152: {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
153: 1, 0, 0, 0, 0, 0, \
154: 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \
155: 1, 1, 1, 1, 1, 1, \
156: 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0}
157:
158: /* Return number of consecutive hard regs needed starting at reg REGNO
159: to hold something of mode MODE.
160: This is ordinarily the length in words of a value of mode MODE
161: but can be less for certain modes in special long registers.
162:
163: On SPUR, ordinary registers hold 32 bits worth;
164: a single floating point register is always enough for
165: anything that can be stored in them at all. */
166: #define HARD_REGNO_NREGS(REGNO, MODE) \
167: ((REGNO) >= 32 ? 1 \
168: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
169:
170: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
171: On SPUR, the cpu registers can hold any mode but the float registers
172: can hold only SFmode or DFmode. And they can't hold anything if use
173: of hardware floating point is disabled. */
174: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
175: (((REGNO) < 32 && (GET_MODE_SIZE (MODE) <= 4 || (REGNO) < 31)) \
176: || (TARGET_FPU && ((MODE) == SFmode || (MODE) == DFmode)))
177:
178: /* Value is 1 if it is a good idea to tie two pseudo registers
179: when one has mode MODE1 and one has mode MODE2.
180: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
181: for any hard reg, then this must be 0 for correct output. */
182: #define MODES_TIEABLE_P(MODE1, MODE2) \
183: (((MODE1) == SFmode || (MODE1) == DFmode) \
184: == ((MODE2) == SFmode || (MODE2) == DFmode))
185:
186: /* Specify the registers used for certain standard purposes.
187: The values of these macros are register numbers. */
188:
189: /* SPUR pc isn't overloaded on a register that the compiler knows about. */
190: /* #define PC_REGNUM */
191:
192: /* Register to use for pushing function arguments. */
193: #define STACK_POINTER_REGNUM 4
194:
195: /* Base register for access to local variables of the function. */
196: #define FRAME_POINTER_REGNUM 25
197:
198: /* Value should be nonzero if functions must have frame pointers.
199: Zero means the frame pointer need not be set up (and parms
200: may be accessed via the stack pointer) in functions that seem suitable.
201: This is computed in `reload', in reload1.c. */
202: #define FRAME_POINTER_REQUIRED 1
203:
204: /* Base register for access to arguments of the function. */
205: #define ARG_POINTER_REGNUM 25
206:
207: /* Register in which static-chain is passed to a function. */
208: /* ??? */
209: #define STATIC_CHAIN_REGNUM 8
210:
211: /* Register in which address to store a structure value
212: is passed to a function. */
213: #define STRUCT_VALUE_REGNUM 27
214: #define STRUCT_VALUE_INCOMING_REGNUM 11
215:
216: /* Define the classes of registers for register constraints in the
217: machine description. Also define ranges of constants.
218:
219: One of the classes must always be named ALL_REGS and include all hard regs.
220: If there is more than one class, another class must be named NO_REGS
221: and contain no registers.
222:
223: The name GENERAL_REGS must be the name of a class (or an alias for
224: another name such as ALL_REGS). This is the class of registers
225: that is allowed by "g" or "r" in a register constraint.
226: Also, registers outside this class are allocated only when
227: instructions express preferences for them.
228:
229: The classes must be numbered in nondecreasing order; that is,
230: a larger-numbered class must never be contained completely
231: in a smaller-numbered class.
232:
233: For any two classes, it is very desirable that there be another
234: class that represents their union. */
235:
236: /* The 68000 has two kinds of registers, hence four classes. */
237:
238: enum reg_class { NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES };
239:
240: #define N_REG_CLASSES (int) LIM_REG_CLASSES
241:
242: /* Give names of register classes as strings for dump file. */
243:
244: #define REG_CLASS_NAMES \
245: {"NO_REGS", "GENERAL_REGS", "FP_REGS", "ALL_REGS" }
246:
247: /* Define which registers fit in which classes.
248: This is an initializer for a vector of HARD_REG_SET
249: of length N_REG_CLASSES. */
250:
251: #define REG_CLASS_CONTENTS {{0, 0}, {-1, 0}, {0, 0x7fff}, {-1, 0x7fff}}
252:
253: /* The same information, inverted:
254: Return the class number of the smallest class containing
255: reg number REGNO. This could be a conditional expression
256: or could index an array. */
257:
258: #define REGNO_REG_CLASS(REGNO) \
259: ((REGNO) >= 32 ? FP_REGS : GENERAL_REGS)
260:
261: /* The class value for index registers, and the one for base regs. */
262: #define INDEX_REG_CLASS GENERAL_REGS
263: #define BASE_REG_CLASS GENERAL_REGS
264:
265: /* Get reg_class from a letter such as appears in the machine description. */
266:
267: #define REG_CLASS_FROM_LETTER(C) \
268: ((C) == 'f' ? FP_REGS : NO_REGS)
269:
270: /* The letters I, J, K, L and M in a register constraint string
271: can be used to stand for particular ranges of immediate operands.
272: This macro defines what the ranges are.
273: C is the letter, and VALUE is a constant value.
274: Return 1 if VALUE is in the range specified by C.
275:
276: For SPUR, `I' is used for the range of constants an insn
277: can actually contain.
278: `J' is used for the range which is just zero (since that is R0).
279: `K' is used for the 5-bit operand of a compare insns. */
280:
281: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
282: ((C) == 'I' ? (unsigned) ((VALUE) + 0x2000) < 0x4000 \
283: : (C) == 'J' ? (VALUE) == 0 \
284: : (C) == 'K' ? (unsigned) (VALUE) < 0x20 \
285: : 0)
286:
287: /* Similar, but for floating constants, and defining letters G and H.
288: Here VALUE is the CONST_DOUBLE rtx itself. */
289:
290: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
291: ((C) == 'G' && XINT (VALUE, 0) == 0 && XINT (VALUE, 1) == 0)
292:
293: /* Given an rtx X being reloaded into a reg required to be
294: in class CLASS, return the class of reg to actually use.
295: In general this is just CLASS; but on some machines
296: in some cases it is preferable to use a more restrictive class. */
297: #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
298:
299: /* Return the maximum number of consecutive registers
300: needed to represent mode MODE in a register of class CLASS. */
301: /* On SPUR, this is the size of MODE in words,
302: except in the FP regs, where a single reg is always enough. */
303: #define CLASS_MAX_NREGS(CLASS, MODE) \
304: ((CLASS) == FP_REGS ? 1 \
305: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
306:
307: /* Stack layout; function entry, exit and calling. */
308:
309: /* Define this if pushing a word on the stack
310: makes the stack pointer a smaller address. */
311: #define STACK_GROWS_DOWNWARD
312:
313: /* Define this if the nominal address of the stack frame
314: is at the high-address end of the local variables;
315: that is, each additional local variable allocated
316: goes at a more negative offset in the frame. */
317: #define FRAME_GROWS_DOWNWARD
318:
319: /* Offset within stack frame to start allocating local variables at.
320: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
321: first local allocated. Otherwise, it is the offset to the BEGINNING
322: of the first local allocated. */
323: #define STARTING_FRAME_OFFSET 0
324:
325: /* If we generate an insn to push BYTES bytes,
326: this says how many the stack pointer really advances by.
327: On SPUR, don't define this because there are no push insns. */
328: /* #define PUSH_ROUNDING(BYTES) */
329:
330: /* Offset of first parameter from the argument pointer register value. */
331: #define FIRST_PARM_OFFSET(FNDECL) 0
332:
333: /* Value is 1 if returning from a function call automatically
334: pops the arguments described by the number-of-args field in the call.
335: FUNTYPE is the data type of the function (as a tree),
336: or for a library call it is an identifier node for the subroutine name. */
337:
338: #define RETURN_POPS_ARGS(FUNTYPE) 0
339:
340: /* Define how to find the value returned by a function.
341: VALTYPE is the data type of the value (as a tree).
342: If the precise function being called is known, FUNC is its FUNCTION_DECL;
343: otherwise, FUNC is 0. */
344:
345: /* On SPUR the value is found in the second "output" register. */
346:
347: #define FUNCTION_VALUE(VALTYPE, FUNC) \
348: gen_rtx (REG, TYPE_MODE (VALTYPE), 27)
349:
350: /* But the called function leaves it in the second "input" register. */
351:
352: #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \
353: gen_rtx (REG, TYPE_MODE (VALTYPE), 11)
354:
355: /* Define how to find the value returned by a library function
356: assuming the value has mode MODE. */
357:
358: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 27)
359:
360: /* 1 if N is a possible register number for a function value
361: as seen by the caller.
362: On SPUR, the first "output" reg is the only register thus used. */
363:
364: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 27)
365:
366: /* 1 if N is a possible register number for function argument passing.
367: On SPUR, these are the "output" registers. */
368:
369: #define FUNCTION_ARG_REGNO_P(N) ((N) < 32 && (N) > 26)
370:
371: /* Define a data type for recording info about an argument list
372: during the scan of that argument list. This data type should
373: hold all necessary information about the function itself
374: and about the args processed so far, enough to enable macros
375: such as FUNCTION_ARG to determine where the next arg should go.
376:
377: On SPUR, this is a single integer, which is a number of words
378: of arguments scanned so far (including the invisible argument,
379: if any, which holds the structure-value-address).
380: Thus 5 or more means all following args should go on the stack. */
381:
382: #define CUMULATIVE_ARGS int
383:
384: /* Initialize a variable CUM of type CUMULATIVE_ARGS
385: for a call to a function whose data type is FNTYPE.
386: For a library call, FNTYPE is 0.
387:
388: On SPUR, the offset normally starts at 0, but starts at 4 bytes
389: when the function gets a structure-value-address as an
390: invisible first argument. */
391:
392: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE) \
393: ((CUM) = ((FNTYPE) != 0 && TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode))
394:
395: /* Update the data in CUM to advance over an argument
396: of mode MODE and data type TYPE.
397: (TYPE is null for libcalls where that information may not be available.) */
398:
399: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
400: ((CUM) += ((MODE) != BLKmode \
401: ? (GET_MODE_SIZE (MODE) + 3) / 4 \
402: : (int_size_in_bytes (TYPE) + 3) / 4))
403:
404: /* Determine where to put an argument to a function.
405: Value is zero to push the argument on the stack,
406: or a hard register in which to store the argument.
407:
408: MODE is the argument's machine mode.
409: TYPE is the data type of the argument (as a tree).
410: This is null for libcalls where that information may
411: not be available.
412: CUM is a variable of type CUMULATIVE_ARGS which gives info about
413: the preceding args and about the function being called.
414: NAMED is nonzero if this argument is a named parameter
415: (otherwise it is an extra parameter matching an ellipsis). */
416:
417: /* On SPUR the first five words of args are normally in registers
418: and the rest are pushed. But any arg that won't entirely fit in regs
419: is pushed. */
420:
421: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
422: (5 >= ((CUM) \
423: + ((MODE) == BLKmode \
424: ? (int_size_in_bytes (TYPE) + 3) / 4 \
425: : (GET_MODE_SIZE (MODE) + 3) / 4)) \
426: ? gen_rtx (REG, (MODE), 27 + (CUM)) \
427: : 0)
428:
429: /* Define where a function finds its arguments.
430: This is different from FUNCTION_ARG because of register windows. */
431:
432: #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
433: (5 >= ((CUM) \
434: + ((MODE) == BLKmode \
435: ? (int_size_in_bytes (TYPE) + 3) / 4 \
436: : (GET_MODE_SIZE (MODE) + 3) / 4)) \
437: ? gen_rtx (REG, (MODE), 11 + (CUM)) \
438: : 0)
439:
440: /* For an arg passed partly in registers and partly in memory,
441: this is the number of registers used.
442: For args passed entirely in registers or entirely in memory, zero. */
443:
444: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
445:
446: /* This macro generates the assembly code for function entry.
447: FILE is a stdio stream to output the code to.
448: SIZE is an int: how many units of temporary storage to allocate.
449: Refer to the array `regs_ever_live' to determine which registers
450: to save; `regs_ever_live[I]' is nonzero if register number I
451: is ever used in the function. This macro is responsible for
452: knowing which registers should not be saved even if used. */
453:
454: /* On spur, move-double insns between fpu and cpu need an 8-byte block
455: of memory. If any fpu reg is used in the function, we allocate
456: such a block here, at the bottom of the frame, just in case it's needed. */
457:
458: #define FUNCTION_PROLOGUE(FILE, SIZE) \
459: { \
460: extern char call_used_regs[]; \
461: extern int current_function_pretend_args_size; \
462: int fsize = ((SIZE) + 7) & ~7; \
463: int nregs, i, fp_used = 0; \
464: for (i = 32, nregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
465: { \
466: if (regs_ever_live[i] && ! call_used_regs[i]) \
467: nregs++; \
468: if (regs_ever_live[i]) fp_used = 1; \
469: } \
470: if (fp_used) fsize += 8; \
471: fprintf (FILE, "0:\trd_special r24,pc\n"); \
472: fprintf (FILE, "\tand r24,r24,$~0x3\n"); \
473: fprintf (FILE, "\tadd_nt r25,r4,$%d\n", \
474: - current_function_pretend_args_size); \
475: if (fsize + nregs != 0 || current_function_pretend_args_size > 0)\
476: { \
477: int n = - fsize - nregs * 16; \
478: if (n >= -8192) \
479: fprintf (FILE, "\tadd_nt r4,r25,$%d\n", n); \
480: else \
481: { \
482: fprintf (FILE, "\tadd_nt r4,r25,$-8192\n"); \
483: n += 8192; \
484: while (n < -8192) \
485: fprintf (FILE, "\tadd_nt r4,r4,$-8192\n"), n += 8192; \
486: if (n != 0) \
487: fprintf (FILE, "\tadd_nt r4,r4,$%d\n", n); \
488: } \
489: } \
490: for (i = 32, nregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
491: if (regs_ever_live[i] && ! call_used_regs[i]) \
492: { \
493: fprintf (FILE, "\tst_ext1 %s,r4,$%d\n", \
494: reg_names[i], 8 * nregs++); \
495: fprintf (FILE, "\tst_ext2 %s,r4,$%d\n", \
496: reg_names[i], 8 * nregs++); \
497: } \
498: }
499:
500: /* Output assembler code to FILE to increment profiler label # LABELNO
501: for profiling a function entry. */
502:
503: #define FUNCTION_PROFILER(FILE, LABELNO) \
504: abort ();
505:
506: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
507: the stack pointer does not matter. The value is tested only in
508: functions that have frame pointers.
509: No definition is equivalent to always zero. */
510:
511: extern int may_call_alloca;
512: extern int current_function_pretend_args_size;
513:
514: #define EXIT_IGNORE_STACK \
515: (get_frame_size () != 0 \
516: || may_call_alloca || current_function_pretend_args_size)
517:
518: /* This macro generates the assembly code for function exit,
519: on machines that need it. If FUNCTION_EPILOGUE is not defined
520: then individual return instructions are generated for each
521: return statement. Args are same as for FUNCTION_PROLOGUE.
522:
523: The function epilogue should not depend on the current stack pointer!
524: It should use the frame pointer only. This is mandatory because
525: of alloca; we also take advantage of it to omit stack adjustments
526: before returning. */
527:
528: #define FUNCTION_EPILOGUE(FILE, SIZE) \
529: { \
530: extern char call_used_regs[]; \
531: extern int may_call_alloca; \
532: extern int current_function_pretend_args_size; \
533: int fsize = ((SIZE) + 7) & ~7; \
534: int nregs, i, fp_used = 0; \
535: for (i = 32, nregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
536: { \
537: if (regs_ever_live[i] && ! call_used_regs[i]) \
538: nregs++; \
539: if (regs_ever_live[i]) fp_used = 1; \
540: } \
541: if (fp_used) fsize += 8; \
542: if (nregs != 0) \
543: { \
544: fprintf (FILE, "\tadd_nt r4,r25,$%d\n", - fsize - nregs * 16); \
545: for (i = 32, nregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
546: if (regs_ever_live[i] && ! call_used_regs[i]) \
547: { \
548: fprintf (FILE, "\tld_ext1 %s,r4,$%d\n\tnop\n", \
549: reg_names[i], 8 * nregs++); \
550: fprintf (FILE, "\tld_ext2 %s,r4,$%d\n\tnop\n", \
551: reg_names[i], 8 * nregs++); \
552: } \
553: } \
554: if (fsize != 0 || nregs != 0 || may_call_alloca \
555: || current_function_pretend_args_size > 0) \
556: fprintf (FILE, "\tadd_nt r4,r25,$%d\n", \
557: current_function_pretend_args_size); \
558: fprintf (FILE, "\treturn r10,$8\n\tnop\n"); \
559: }
560:
561: /* If the memory address ADDR is relative to the frame pointer,
562: correct it to be relative to the stack pointer instead.
563: This is for when we don't use a frame pointer.
564: ADDR should be a variable name. */
565:
566: #define FIX_FRAME_POINTER_ADDRESS(ADDR,DEPTH) abort ();
567:
568: /* Addressing modes, and classification of registers for them. */
569:
570: /* #define HAVE_POST_INCREMENT */
571: /* #define HAVE_POST_DECREMENT */
572:
573: /* #define HAVE_PRE_DECREMENT */
574: /* #define HAVE_PRE_INCREMENT */
575:
576: /* Macros to check register numbers against specific register classes. */
577:
578: /* These assume that REGNO is a hard or pseudo reg number.
579: They give nonzero only if REGNO is a hard reg of the suitable class
580: or a pseudo reg currently allocated to a suitable hard reg.
581: Since they use reg_renumber, they are safe only once reg_renumber
582: has been allocated, which happens in local-alloc.c. */
583:
584: #define REGNO_OK_FOR_INDEX_P(REGNO) \
585: ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
586: #define REGNO_OK_FOR_BASE_P(REGNO) \
587: ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
588: #define REGNO_OK_FOR_FP_P(REGNO) \
589: (((REGNO) ^ 0x20) < 14 || (unsigned) (reg_renumber[REGNO] ^ 0x20) < 14)
590:
591: /* Now macros that check whether X is a register and also,
592: strictly, whether it is in a specified class.
593:
594: These macros are specific to the SPUR, and may be used only
595: in code for printing assembler insns and in conditions for
596: define_optimization. */
597:
598: /* 1 if X is an fp register. */
599:
600: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
601:
602: /* Maximum number of registers that can appear in a valid memory address. */
603:
604: #define MAX_REGS_PER_ADDRESS 2
605:
606: /* Recognize any constant value that is a valid address. */
607:
608: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
609:
610: /* Nonzero if the constant value X is a legitimate general operand.
611: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
612:
613: #define LEGITIMATE_CONSTANT_P(X) \
614: ((GET_CODE (X) == CONST_INT \
615: && (unsigned) (INTVAL (X) + 0x2000) < 0x4000)\
616: || (GET_CODE (X) == SYMBOL_REF && (X)->unchanging))
617:
618: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
619: and check its validity for a certain class.
620: We have two alternate definitions for each of them.
621: The usual definition accepts all pseudo regs; the other rejects
622: them unless they have been allocated suitable hard regs.
623: The symbol REG_OK_STRICT causes the latter definition to be used.
624:
625: Most source files want to accept pseudo regs in the hope that
626: they will get allocated to the class that the insn wants them to be in.
627: Source files for reload pass need to be strict.
628: After reload, it makes no difference, since pseudo regs have
629: been eliminated by then. */
630:
631: #ifndef REG_OK_STRICT
632:
633: /* Nonzero if X is a hard reg that can be used as an index
634: or if it is a pseudo reg. */
635: #define REG_OK_FOR_INDEX_P(X) (((unsigned) REGNO (X)) - 32 >= 14)
636: /* Nonzero if X is a hard reg that can be used as a base reg
637: or if it is a pseudo reg. */
638: #define REG_OK_FOR_BASE_P(X) (((unsigned) REGNO (X)) - 32 >= 14)
639:
640: #else
641:
642: /* Nonzero if X is a hard reg that can be used as an index. */
643: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
644: /* Nonzero if X is a hard reg that can be used as a base reg. */
645: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
646:
647: #endif
648:
649: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
650: that is a valid memory address for an instruction.
651: The MODE argument is the machine mode for the MEM expression
652: that wants to use this address.
653:
654: On SPUR, the actual legitimate addresses must be REG+SMALLINT or REG+REG.
655: Actually, REG+REG is not legitimate for stores, so
656: it is obtained only by combination on loads.
657: We can treat a SYMBOL_REF as legitimate if it is part of this
658: function's constant-pool, because such addresses can actually
659: be output as REG+SMALLINT. */
660:
661: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
662: { if (GET_CODE (X) == REG \
663: && REG_OK_FOR_BASE_P (X)) \
664: goto ADDR; \
665: if (GET_CODE (X) == SYMBOL_REF && (X)->unchanging) \
666: goto ADDR; \
667: if (GET_CODE (X) == PLUS \
668: && GET_CODE (XEXP (X, 0)) == REG \
669: && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
670: { \
671: if (GET_CODE (XEXP (X, 1)) == CONST_INT \
672: && INTVAL (XEXP (X, 1)) >= -0x2000 \
673: && INTVAL (XEXP (X, 1)) < 0x2000) \
674: goto ADDR; \
675: } \
676: }
677:
678: /* Try machine-dependent ways of modifying an illegitimate address
679: to be legitimate. If we find one, return the new, valid address.
680: This macro is used in only one place: `memory_address' in explow.c.
681:
682: OLDX is the address as it was before break_out_memory_refs was called.
683: In some cases it is useful to look at this to decide what needs to be done.
684:
685: MODE and WIN are passed so that this macro can use
686: GO_IF_LEGITIMATE_ADDRESS.
687:
688: It is always safe for this macro to do nothing. It exists to recognize
689: opportunities to optimize the output. */
690:
691: /* On SPUR, change REG+N into REG+REG, and REG+(X*Y) into REG+REG. */
692:
693: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
694: { if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
695: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
696: copy_to_mode_reg (SImode, XEXP (X, 1))); \
697: if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
698: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
699: copy_to_mode_reg (SImode, XEXP (X, 0))); \
700: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
701: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
702: force_operand (XEXP (X, 0), 0)); \
703: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
704: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
705: force_operand (XEXP (X, 1), 0)); \
706: if (memory_address_p (MODE, X)) \
707: goto WIN; }
708:
709: /* Go to LABEL if ADDR (a legitimate address expression)
710: has an effect that depends on the machine mode it is used for.
711: On the SPUR this is never true. */
712:
713: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
714:
715: /* Specify the machine mode that this machine uses
716: for the index in the tablejump instruction. */
717: #define CASE_VECTOR_MODE SImode
718:
719: /* Define this if the tablejump instruction expects the table
720: to contain offsets from the address of the table.
721: Do not define this if the table should contain absolute addresses. */
722: /* #define CASE_VECTOR_PC_RELATIVE */
723:
724: /* Specify the tree operation to be used to convert reals to integers. */
725: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
726:
727: /* This is the kind of divide that is easiest to do in the general case. */
728: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
729:
730: /* Define this as 1 if `char' should by default be signed; else as 0. */
731: #define DEFAULT_SIGNED_CHAR 0
732:
733: /* Max number of bytes we can move from memory to memory
734: in one reasonably fast instruction. */
735: #define MOVE_MAX 4
736:
737: /* Nonzero if access to memory by bytes is slow and undesirable. */
738: #define SLOW_BYTE_ACCESS 1
739:
740: /* This is BSD, so it wants DBX format. */
741: #define DBX_DEBUGGING_INFO
742:
743: /* Do not break .stabs pseudos into continuations. */
744: #define DBX_CONTIN_LENGTH 0
745:
746: /* Don't try to use the `x' type-cross-reference character in DBX data.
747: Also has the consequence of putting each struct, union or enum
748: into a separate .stabs, containing only cross-refs to the others. */
749: #define DBX_NO_XREFS
750:
751: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
752: is done just by pretending it is already truncated. */
753: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
754:
755: /* Specify the machine mode that pointers have.
756: After generation of rtl, the compiler makes no further distinction
757: between pointers and any other objects of this machine mode. */
758: #define Pmode SImode
759:
760: /* A function address in a call instruction
761: is a byte address (for indexing purposes)
762: so give the MEM rtx a byte's mode. */
763: #define FUNCTION_MODE SImode
764:
765: /* Define this if addresses of constant functions
766: shouldn't be put through pseudo regs where they can be cse'd.
767: Desirable on machines where ordinary constants are expensive
768: but a CALL with constant address is cheap. */
769: #define NO_FUNCTION_CSE
770:
771: /* Compute the cost of computing a constant rtl expression RTX
772: whose rtx-code is CODE. The body of this macro is a portion
773: of a switch statement. If the code is computed here,
774: return it with a return statement. Otherwise, break from the switch. */
775:
776: #define CONST_COSTS(RTX,CODE) \
777: case CONST_INT: \
778: if (INTVAL (RTX) < 0x2000 && INTVAL (RTX) >= -0x2000) return 1; \
779: case CONST: \
780: case LABEL_REF: \
781: case SYMBOL_REF: \
782: return 2; \
783: case CONST_DOUBLE: \
784: return 4;
785:
786: /* Tell final.c how to eliminate redundant test instructions. */
787:
788: /* Here we define machine-dependent flags and fields in cc_status
789: (see `conditions.h'). */
790:
791: /* (None are needed on SPUR.) */
792:
793: /* Store in cc_status the expressions
794: that the condition codes will describe
795: after execution of an instruction whose pattern is EXP.
796: Do not alter them if the instruction would not alter the cc's. */
797:
798: /* The SPUR does not really have a condition code. */
799:
800: #define NOTICE_UPDATE_CC(EXP, INSN) \
801: { CC_STATUS_INIT; }
802:
803: /* Control the assembler format that we output. */
804:
805: /* Output at beginning of assembler file. */
806:
807: #define ASM_FILE_START(FILE)
808:
809: /* Output to assembler file text saying following lines
810: may contain character constants, extra white space, comments, etc. */
811:
812: #define ASM_APP_ON ""
813:
814: /* Output to assembler file text saying following lines
815: no longer contain unusual constructs. */
816:
817: #define ASM_APP_OFF ""
818:
819: /* Output before read-only data. */
820:
821: #define TEXT_SECTION_ASM_OP ".text"
822:
823: /* Output before writable data. */
824:
825: #define DATA_SECTION_ASM_OP ".data"
826:
827: /* How to refer to registers in assembler output.
828: This sequence is indexed by compiler's hard-register-number (see above). */
829:
830: #define REGISTER_NAMES \
831: {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \
832: "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", \
833: "r20", "r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", \
834: "r30", "r31", \
835: "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9", \
836: "f10", "f11", "f12", "f13", "f14" }
837:
838: /* How to renumber registers for dbx and gdb. */
839:
840: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
841:
842: /* This is how to output the definition of a user-level label named NAME,
843: such as the label on a static function or variable NAME. */
844:
845: #define ASM_OUTPUT_LABEL(FILE,NAME) \
846: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
847:
848: /* This is how to output a command to make the user-level label named NAME
849: defined for reference from other files. */
850:
851: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
852: do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
853:
854: /* This is how to output a reference to a user-level label named NAME.
855: `assemble_name' uses this. */
856:
857: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
858: fprintf (FILE, "_%s", NAME)
859:
860: /* This is how to output an internal numbered label where
861: PREFIX is the class of label and NUM is the number within the class. */
862:
863: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
864: fprintf (FILE, "%s%d:\n", PREFIX, NUM)
865:
866: /* This is how to store into the string LABEL
867: the symbol_ref name of an internal numbered label where
868: PREFIX is the class of label and NUM is the number within the class.
869: This is suitable for output with `assemble_name'. */
870:
871: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
872: sprintf (LABEL, "*%s%d", PREFIX, NUM)
873:
874: /* This is how to output an assembler line defining a `double' constant. */
875:
876: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
877: fprintf (FILE, "\t.double %.20e\n", (VALUE))
878:
879: /* This is how to output an assembler line defining a `float' constant. */
880:
881: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
882: fprintf (FILE, "\t.single %.12e\n", (VALUE))
883:
884: /* This is how to output an assembler line defining an `int' constant. */
885:
886: #define ASM_OUTPUT_INT(FILE,VALUE) \
887: ( fprintf (FILE, "\t.long "), \
888: output_addr_const (FILE, (VALUE)), \
889: fprintf (FILE, "\n"))
890:
891: /* Likewise for `char' and `short' constants. */
892:
893: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
894: ( fprintf (FILE, "\t.word "), \
895: output_addr_const (FILE, (VALUE)), \
896: fprintf (FILE, "\n"))
897:
898: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
899: ( fprintf (FILE, "\t.byte "), \
900: output_addr_const (FILE, (VALUE)), \
901: fprintf (FILE, "\n"))
902:
903: /* This is how to output an assembler line for a numeric constant byte. */
904:
905: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
906: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
907:
908: /* This is how to output code to push a register on the stack.
909: It need not be very fast code. */
910:
911: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
912: fprintf (FILE, "\tadd_nt r4,r4,$-4\n\tst_32 %s,r4,$0\n", reg_names[REGNO])
913:
914: /* This is how to output an insn to pop a register from the stack.
915: It need not be very fast code. */
916:
917: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
918: fprintf (FILE, "\tld_32 %s,r4,$0\n\tadd_nt r4,r4,$4\n", reg_names[REGNO])
919:
920: /* This is how to output an element of a case-vector that is absolute. */
921:
922: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
923: fprintf (FILE, "\t.long L%d\n", VALUE)
924:
925: /* This is how to output an element of a case-vector that is relative.
926: (SPUR does not use such vectors,
927: but we must define this macro anyway.) */
928:
929: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
930: fprintf (FILE, "\t.word L%d-L%d\n", VALUE, REL)
931:
932: /* This is how to output an assembler line
933: that says to advance the location counter
934: to a multiple of 2**LOG bytes. */
935:
936: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
937: if ((LOG) != 0) \
938: fprintf (FILE, "\t.align %d\n", (LOG))
939:
940: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
941: fprintf (FILE, "\t.space %d\n", (SIZE))
942:
943: /* This says how to output an assembler line
944: to define a global common symbol. */
945:
946: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
947: ( fputs (".comm ", (FILE)), \
948: assemble_name ((FILE), (NAME)), \
949: fprintf ((FILE), ",%d\n", (ROUNDED)))
950:
951: /* This says how to output an assembler line
952: to define a local common symbol. */
953:
954: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
955: ( fputs (".lcomm ", (FILE)), \
956: assemble_name ((FILE), (NAME)), \
957: fprintf ((FILE), ",%d\n", (ROUNDED)))
958:
959: /* Store in OUTPUT a string (made with alloca) containing
960: an assembler-name for a local static variable named NAME.
961: LABELNO is an integer which is different for each call. */
962:
963: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
964: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
965: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
966:
967: /* Define the parentheses used to group arithmetic operations
968: in assembler code. */
969:
970: #define ASM_OPEN_PAREN "("
971: #define ASM_CLOSE_PAREN ")"
972:
973: /* Define results of standard character escape sequences. */
974: #define TARGET_BELL 007
975: #define TARGET_BS 010
976: #define TARGET_TAB 011
977: #define TARGET_NEWLINE 012
978: #define TARGET_VT 013
979: #define TARGET_FF 014
980: #define TARGET_CR 015
981:
982: /* Print operand X (an rtx) in assembler syntax to file FILE.
983: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
984: For `%' followed by punctuation, CODE is the punctuation and X is null.
985:
986: On SPUR, the CODE can be `r', meaning this is a register-only operand
987: and an immediate zero should be represented as `r0'. */
988:
989: #define PRINT_OPERAND(FILE, X, CODE) \
990: { if (GET_CODE (X) == REG) \
991: fprintf (FILE, "%s", reg_names[REGNO (X)]); \
992: else if (GET_CODE (X) == MEM) \
993: output_address (XEXP (X, 0)); \
994: else if (GET_CODE (X) == CONST_DOUBLE) \
995: abort (); \
996: else if ((CODE) == 'r' && (X) == const0_rtx) \
997: fprintf (FILE, "r0"); \
998: else { putc ('$', FILE); output_addr_const (FILE, X); }}
999:
1000: /* Print a memory address as an operand to reference that memory location. */
1001:
1002: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1003: { register rtx base, index = 0; \
1004: int offset = 0; \
1005: register rtx addr = ADDR; \
1006: if (GET_CODE (addr) == REG) \
1007: { \
1008: fprintf (FILE, "%s,$0", reg_names[REGNO (addr)]); \
1009: } \
1010: else if (GET_CODE (addr) == PLUS) \
1011: { \
1012: if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1013: offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1);\
1014: else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1015: offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0);\
1016: else \
1017: base = XEXP (addr, 0), index = XEXP (addr, 1); \
1018: fprintf (FILE, "%s,", reg_names[REGNO (base)]); \
1019: if (index == 0) \
1020: fprintf (FILE, "$%d", offset); \
1021: else \
1022: fprintf (FILE, "%s,", reg_names[REGNO (index)]); \
1023: } \
1024: else \
1025: { \
1026: fprintf (FILE, "r24,$("); \
1027: output_addr_const (FILE, addr); \
1028: fprintf (FILE, "-0b)"); \
1029: } \
1030: }
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