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1.1 root 1: /* Subroutines for insn-output.c for Vax.
2: Copyright (C) 1987 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
6: GNU CC is free software; you can redistribute it and/or modify
7: it under the terms of the GNU General Public License as published by
8: the Free Software Foundation; either version 2, or (at your option)
9: any later version.
10:
11: GNU CC is distributed in the hope that it will be useful,
12: but WITHOUT ANY WARRANTY; without even the implied warranty of
13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14: GNU General Public License for more details.
15:
16: You should have received a copy of the GNU General Public License
17: along with GNU CC; see the file COPYING. If not, write to
18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19:
20: #include <stdio.h>
21: #include "config.h"
22: #include "rtl.h"
23: #include "regs.h"
24: #include "hard-reg-set.h"
25: #include "real.h"
26: #include "insn-config.h"
27: #include "conditions.h"
28: #include "insn-flags.h"
29: #include "output.h"
30: #include "insn-attr.h"
31:
32:
1.1.1.2 ! root 33: /* This is like nonimmediate_operand with a restriction on the type of MEM. */
1.1 root 34:
35: void
36: split_quadword_operands (operands, low, n)
37: rtx *operands, *low;
38: {
39: int i;
40: /* Split operands. */
41:
42: low[0] = low[1] = low[2] = 0;
43: for (i = 0; i < 3; i++)
44: {
45: if (low[i])
46: /* it's already been figured out */;
47: else if (GET_CODE (operands[i]) == MEM
48: && (GET_CODE (XEXP (operands[i], 0)) == POST_INC))
49: {
50: rtx addr = XEXP (operands[i], 0);
51: operands[i] = low[i] = gen_rtx (MEM, SImode, addr);
52: if (which_alternative == 0 && i == 0)
53: {
54: addr = XEXP (operands[i], 0);
55: operands[i+1] = low[i+1] = gen_rtx (MEM, SImode, addr);
56: }
57: }
58: else
59: {
60: low[i] = operand_subword (operands[i], 0, 0, DImode);
61: operands[i] = operand_subword (operands[i], 1, 0, DImode);
62: }
63: }
64: }
65:
66: print_operand_address (file, addr)
67: FILE *file;
68: register rtx addr;
69: {
70: register rtx reg1, reg2, breg, ireg;
71: rtx offset;
72:
73: retry:
74: switch (GET_CODE (addr))
75: {
76: case MEM:
77: fprintf (file, "*");
78: addr = XEXP (addr, 0);
79: goto retry;
80:
81: case REG:
82: fprintf (file, "(%s)", reg_names[REGNO (addr)]);
83: break;
84:
85: case PRE_DEC:
86: fprintf (file, "-(%s)", reg_names[REGNO (XEXP (addr, 0))]);
87: break;
88:
89: case POST_INC:
90: fprintf (file, "(%s)+", reg_names[REGNO (XEXP (addr, 0))]);
91: break;
92:
93: case PLUS:
94: /* There can be either two or three things added here. One must be a
95: REG. One can be either a REG or a MULT of a REG and an appropriate
96: constant, and the third can only be a constant or a MEM.
97:
98: We get these two or three things and put the constant or MEM in
99: OFFSET, the MULT or REG in IREG, and the REG in BREG. If we have
100: a register and can't tell yet if it is a base or index register,
101: put it into REG1. */
102:
103: reg1 = 0; ireg = 0; breg = 0; offset = 0;
104:
105: if (CONSTANT_ADDRESS_P (XEXP (addr, 0))
106: || GET_CODE (XEXP (addr, 0)) == MEM)
107: {
108: offset = XEXP (addr, 0);
109: addr = XEXP (addr, 1);
110: }
111: else if (CONSTANT_ADDRESS_P (XEXP (addr, 1))
112: || GET_CODE (XEXP (addr, 1)) == MEM)
113: {
114: offset = XEXP (addr, 1);
115: addr = XEXP (addr, 0);
116: }
117: else if (GET_CODE (XEXP (addr, 1)) == MULT)
118: {
119: ireg = XEXP (addr, 1);
120: addr = XEXP (addr, 0);
121: }
122: else if (GET_CODE (XEXP (addr, 0)) == MULT)
123: {
124: ireg = XEXP (addr, 0);
125: addr = XEXP (addr, 1);
126: }
127: else if (GET_CODE (XEXP (addr, 1)) == REG)
128: {
129: reg1 = XEXP (addr, 1);
130: addr = XEXP (addr, 0);
131: }
1.1.1.2 ! root 132: else if (GET_CODE (XEXP (addr, 0)) == REG)
! 133: {
! 134: reg1 = XEXP (addr, 0);
! 135: addr = XEXP (addr, 1);
! 136: }
1.1 root 137: else
138: abort ();
139:
140: if (GET_CODE (addr) == REG)
141: {
142: if (reg1)
143: ireg = addr;
144: else
145: reg1 = addr;
146: }
147: else if (GET_CODE (addr) == MULT)
148: ireg = addr;
149: else if (GET_CODE (addr) == PLUS)
150: {
151: if (CONSTANT_ADDRESS_P (XEXP (addr, 0))
152: || GET_CODE (XEXP (addr, 0)) == MEM)
153: {
154: if (offset)
155: {
156: if (GET_CODE (offset) == CONST_INT)
157: offset = plus_constant (XEXP (addr, 0), INTVAL (offset));
158: else if (GET_CODE (XEXP (addr, 0)) == CONST_INT)
159: offset = plus_constant (offset, INTVAL (XEXP (addr, 0)));
160: else
161: abort ();
162: }
163: offset = XEXP (addr, 0);
164: }
165: else if (GET_CODE (XEXP (addr, 0)) == REG)
166: {
167: if (reg1)
168: ireg = reg1, breg = XEXP (addr, 0), reg1 = 0;
169: else
170: reg1 = XEXP (addr, 0);
171: }
172: else if (GET_CODE (XEXP (addr, 0)) == MULT)
173: {
174: if (ireg)
175: abort ();
176: ireg = XEXP (addr, 0);
177: }
178: else
179: abort ();
180:
181: if (CONSTANT_ADDRESS_P (XEXP (addr, 1))
182: || GET_CODE (XEXP (addr, 1)) == MEM)
183: {
184: if (offset)
185: {
186: if (GET_CODE (offset) == CONST_INT)
187: offset = plus_constant (XEXP (addr, 1), INTVAL (offset));
188: else if (GET_CODE (XEXP (addr, 1)) == CONST_INT)
189: offset = plus_constant (offset, INTVAL (XEXP (addr, 1)));
190: else
191: abort ();
192: }
193: offset = XEXP (addr, 1);
194: }
195: else if (GET_CODE (XEXP (addr, 1)) == REG)
196: {
197: if (reg1)
198: ireg = reg1, breg = XEXP (addr, 1), reg1 = 0;
199: else
200: reg1 = XEXP (addr, 1);
201: }
202: else if (GET_CODE (XEXP (addr, 1)) == MULT)
203: {
204: if (ireg)
205: abort ();
206: ireg = XEXP (addr, 1);
207: }
208: else
209: abort ();
210: }
211: else
212: abort ();
213:
214: /* If REG1 is non-zero, figure out if it is a base or index register. */
215: if (reg1)
216: {
217: if (breg != 0 || (offset && GET_CODE (offset) == MEM))
218: {
219: if (ireg)
220: abort ();
221: ireg = reg1;
222: }
223: else
224: breg = reg1;
225: }
226:
227: if (offset != 0)
228: output_address (offset);
229:
230: if (breg != 0)
231: fprintf (file, "(%s)", reg_names[REGNO (breg)]);
232:
233: if (ireg != 0)
234: {
235: if (GET_CODE (ireg) == MULT)
236: ireg = XEXP (ireg, 0);
237: if (GET_CODE (ireg) != REG)
238: abort ();
239: fprintf (file, "[%s]", reg_names[REGNO (ireg)]);
240: }
241: break;
242:
243: default:
244: output_addr_const (file, addr);
245: }
246: }
247:
248: char *
249: rev_cond_name (op)
250: rtx op;
251: {
252: switch (GET_CODE (op))
253: {
254: case EQ:
255: return "neq";
256: case NE:
257: return "eql";
258: case LT:
259: return "geq";
260: case LE:
261: return "gtr";
262: case GT:
263: return "leq";
264: case GE:
265: return "lss";
266: case LTU:
267: return "gequ";
268: case LEU:
269: return "gtru";
270: case GTU:
271: return "lequ";
272: case GEU:
273: return "lssu";
274:
275: default:
276: abort ();
277: }
278: }
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